WO2014181756A1 - Electronic component - Google Patents

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Publication number
WO2014181756A1
WO2014181756A1 PCT/JP2014/062098 JP2014062098W WO2014181756A1 WO 2014181756 A1 WO2014181756 A1 WO 2014181756A1 JP 2014062098 W JP2014062098 W JP 2014062098W WO 2014181756 A1 WO2014181756 A1 WO 2014181756A1
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WO
WIPO (PCT)
Prior art keywords
conductor
parallel
coil
electronic component
insulator layer
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PCT/JP2014/062098
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French (fr)
Japanese (ja)
Inventor
薫 立花
大喜 橋本
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株式会社村田製作所
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Publication of WO2014181756A1 publication Critical patent/WO2014181756A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F17/0013Printed inductances with stacked layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01FMAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00Fixed inductances of the signal type 
    • H01F17/0006Printed inductances
    • H01F2017/004Printed inductances with the coil helically wound around an axis without a core

Definitions

  • the present invention relates to an electronic component, and more particularly, to an electronic component including a laminate in which insulator layers are laminated.
  • a multilayer chip inductor described in Patent Document 1 As an invention related to a conventional electronic component, for example, a multilayer chip inductor described in Patent Document 1 is known.
  • the coil In the multilayer chip inductor, the coil has a spiral shape by connecting a plurality of coil patterns. Two coil patterns having the same shape are provided and connected in parallel to each other. Thereby, in the multilayer chip inductor described in Patent Document 1, the DC resistance of the coil is reduced.
  • an object of the present invention is to provide an electronic component that can reduce the height in the stacking direction while reducing the DC resistance.
  • An electronic component includes a stacked body in which a plurality of insulating layers are stacked, and a rectangular annular shape that is provided in the insulating layers and overlaps each other when viewed in plan from the stacking direction.
  • a spiral coil including a plurality of coil conductors forming a track, a first via-hole conductor connecting the plurality of coil conductors and penetrating the insulator layer in the stacking direction, and the coil
  • the parallel conductor provided in the insulator layer different from the insulator layer provided with the coil conductor is connected in parallel to the coil conductor and penetrates the insulator layer in the stacking direction.
  • Second via hole It comprises a body, a, characterized by.
  • the height in the stacking direction can be reduced while reducing the DC resistance.
  • FIG. 1 is an external perspective view of an electronic component 10a according to an embodiment.
  • FIG. 2 is an exploded perspective view of the multilayer body 12 of the electronic component 10a.
  • FIG. 3 is a plan view in which the coil conductors 18a to 18d and the parallel conductors 20a to 20c are overlapped.
  • the stacking direction of the electronic components 10a is defined as the vertical direction
  • the direction in which the long side extends when the electronic component 10a is viewed in plan from the upper side is defined as the front-rear direction
  • the electronic component 10a is planar from the upper side.
  • the direction in which the short side extends when viewed is defined as the left-right direction.
  • the electronic component 10a includes a multilayer body 12, external electrodes 14a and 14b, parallel conductors 20a to 20c, via-hole conductors v11 to v13, and a coil L.
  • the laminated body 12 has a rectangular parallelepiped shape, and the insulating layers 16a to 16j are laminated in this order from the upper side to the lower side.
  • the insulator layers 16a to 16j have a rectangular shape, and are made of, for example, a magnetic material made of Ni—Cu—Zn ferrite.
  • the upper surface of the insulator layers 16a to 16j is referred to as a front surface
  • the lower surface of the insulator layers 16a to 16j is referred to as a back surface.
  • the coil L has a spiral shape that goes downward while rotating counterclockwise, and includes coil conductors 18a to 18d, lead conductors 22a and 22b, and via-hole conductors v1 to v3.
  • the coil conductors 18a to 18d, the lead conductors 22a and 22b, and the via hole conductors v1 to v3 are made of, for example, a conductive material containing Ag as a main component.
  • the coil conductors 18a to 18d overlap each other to form a rectangular (annular) track R along the outer edges of the insulator layers 16a to 16j when viewed from above. That is, the two long sides of the track R are parallel to the two long sides of the insulator layers 16a to 16j, and the two short sides of the track R are the two short sides of the insulator layers 16a to 16j. Parallel to the side.
  • the coil conductor 18a is a linear conductor that is provided on the surface of the insulator layer 16d and circulates counterclockwise.
  • the coil conductor 18a has a length corresponding to a half circumference, and overlaps the long side on the left side of the track R and the short side on the front side.
  • the coil conductor 18b is a linear conductor that is provided on the surface of the insulator layer 16e and circulates counterclockwise.
  • the coil conductor 18b has a length corresponding to 1 ⁇ 2 circumference and overlaps the long side on the right side of the track R and the short side on the back side.
  • the coil conductor 18c is a linear conductor that is provided on the surface of the insulator layer 16f and circulates counterclockwise.
  • the coil conductor 18c has a length corresponding to 1 ⁇ 2 circumference and overlaps the long side on the left side of the track R and the long side of the short side on the front side.
  • the coil conductor 18d is a linear conductor that is provided on the surface of the insulator layer 16g and circulates counterclockwise.
  • the coil conductor 18d has a length corresponding to 3/4 rounds, and is provided along the right long side, the rear short side, and the left long side of the track R.
  • the upstream end of the coil conductors 18a to 18d in the counterclockwise direction is referred to as an upstream end, and the downstream end is referred to as a downstream end.
  • the via-hole conductor v1 penetrates the insulating layer 16d in the vertical direction, and connects the downstream end of the coil conductor 18a and the upstream end of the coil conductor 18b.
  • the via-hole conductor v2 penetrates the insulator layer 16e in the vertical direction, and connects the downstream end of the coil conductor 18b and the upstream end of the coil conductor 18c.
  • the via-hole conductor v3 penetrates the insulator layer 16f in the vertical direction, and connects the downstream end of the coil conductor 18c and the upstream end of the coil conductor 18d.
  • the parallel conductor 20a is a linear conductor that is provided on the surface of the insulator layer 16d on which the coil conductor 18a is provided and overlaps the long side on the right side of the track R when viewed from above. However, the parallel conductor 20a does not overlap the two short sides of the track R when viewed from above.
  • the parallel conductor 20a is connected to the downstream end of the coil conductor 18a. That is, the coil conductor 18a and the parallel conductor 20a provided on the surface of the same insulator layer 16d are connected.
  • the parallel conductor 20a overlaps with a portion of the coil conductor 18b that overlaps the long side on the right side of the track R when viewed from above.
  • the parallel conductor 20b is a linear conductor that is provided on the surface of the insulator layer 16e on which the coil conductor 18b is provided, and overlaps the long side on the left side of the track R when viewed from above. However, the parallel conductor 20b does not overlap the two short sides of the track R when viewed from above.
  • the parallel conductor 20b is connected to the downstream end of the coil conductor 18b. That is, the coil conductor 18b and the parallel conductor 20b provided on the surface of the same insulator layer 16e are connected.
  • the parallel conductor 20b overlaps the portion of the coil conductor 18c that overlaps the long side on the left side of the track R when viewed from above.
  • the parallel conductor 20c is a linear conductor that is provided on the surface of the insulator layer 16f on which the coil conductor 18c is provided and overlaps the long side on the right side of the track R when viewed from above. However, the parallel conductor 20c does not overlap the two short sides of the track R when viewed from above.
  • the parallel conductor 20c is connected to the downstream end of the coil conductor 18c. That is, the coil conductor 18c and the parallel conductor 20c provided on the surface of the same insulator layer 16f are connected.
  • the parallel conductor 20c overlaps the portion of the coil conductor 18d that overlaps the long side on the right side of the track R when viewed from above.
  • the coil conductor 18a overlaps the long side where the parallel conductor 20a does not overlap in the track R when viewed from above. Further, the coil conductor 18a has an upstream short side in the counterclockwise direction (that is, a short side on the rear side) with respect to the long side where the parallel conductor 20a does not overlap in the track R when viewed from above. Do not overlap.
  • the coil conductor 18b overlaps the long side where the parallel conductor 20b does not overlap in the track R when viewed from above. Furthermore, the coil conductor 18b has a short side on the upstream side in the counterclockwise direction (that is, the short side on the front side) with respect to the long side where the parallel conductor 20b does not overlap in the track R when viewed in plan from above. There is no overlap.
  • the coil conductor 18c overlaps the long side where the parallel conductor 20c does not overlap in the track R when viewed from above. Furthermore, the coil conductor 18c has an upstream short side (that is, a rear short side) in the counterclockwise direction with respect to the long side where the parallel conductor 20c does not overlap in the track R when viewed in plan from above. Do not overlap.
  • the via-hole conductor v11 penetrates the insulator layer 16d in the vertical direction, and connects the rear end of the parallel conductor 20a and the right rear corner of the coil conductor 18b.
  • the parallel conductor 20a is connected in parallel through the via-hole conductors v1 and v11 to the coil conductor 18b provided on the surface of the insulator layer 16e different from the insulator layer 16d provided with the parallel conductor 20a.
  • the parallel conductor 20a is connected in parallel to the coil conductor 18b positioned below the parallel conductor 20a.
  • the parallel conductor 20a is connected in parallel to a portion of the coil conductor 18b that overlaps the long side on the right side of the track R.
  • the via-hole conductor v12 penetrates the insulator layer 16e in the vertical direction and connects the front end of the parallel conductor 20b and the left front corner of the coil conductor 18c.
  • the parallel conductor 20b is connected in parallel via the via-hole conductors v2 and v12 to the coil conductor 18c provided on the surface of the insulator layer 16f different from the insulator layer 16e provided with the parallel conductor 20b.
  • the parallel conductor 20b is connected in parallel to the coil conductor 18c positioned on the lower side with respect to the parallel conductor 20b.
  • the parallel conductor 20b is connected in parallel to a portion of the coil conductor 18c that overlaps the long side on the left side of the track R.
  • the via-hole conductor v13 passes through the insulating layer 16f in the vertical direction, and connects the rear end of the parallel conductor 20c and the right rear corner of the coil conductor 18d.
  • the parallel conductor 20c is connected in parallel via the via-hole conductors v3 and v13 to the coil conductor 18d provided on the surface of the insulator layer 16g different from the insulator layer 16f provided with the parallel conductor 20c.
  • the parallel conductor 20c is connected in parallel to the coil conductor 18d located on the lower side with respect to the parallel conductor 20c.
  • the parallel conductor 20c is connected in parallel to a portion of the coil conductor 18d that overlaps the long side on the right side of the track R.
  • the lead conductor 22a is provided on the surface of the insulator layer 16d, and is connected to the upstream end of the coil conductor 18a.
  • the lead conductor 22a is drawn to the short side on the back side of the insulator layer 16d.
  • the lead conductor 22b is provided on the surface of the insulator layer 16g, and is connected to the downstream end of the coil conductor 18d.
  • the lead conductor 22b is drawn to the short side on the front side of the insulator layer 16g.
  • the external electrode 14a covers the rear end face of the multilayer body 12 and is folded back to four faces adjacent to the end face.
  • the rear end surface of the stacked body 12 is a surface formed by connecting the short sides on the rear side of the insulator layers 16a to 16j. Thereby, the external electrode 14a is connected to the lead conductor 22a.
  • the external electrode 14b covers the front end face of the laminate 12 and is folded back to four faces adjacent to the end face.
  • the front end surface of the stacked body 12 is a surface formed by connecting the front short sides of the insulating layers 16a to 16j. Thereby, the external electrode 14b is connected to the lead conductor 22b.
  • ceramic green sheets to be the insulator layers 16a to 16j shown in FIG. 2 are formed. Specifically, ferric oxide (Fe 2 O 3 ), zinc oxide (ZnO), copper oxide (CuO), and nickel oxide (NiO) were weighed at a predetermined ratio, and each material was put into a ball mill as a raw material. Wet preparation. The obtained mixture is dried and pulverized, and the obtained powder is calcined at 800 ° C. for 1 hour. The obtained calcined powder is wet pulverized by a ball mill, dried and then crushed to obtain a ferrite ceramic powder.
  • ferric oxide Fe 2 O 3
  • zinc oxide ZnO
  • CuO copper oxide
  • NiO nickel oxide
  • a binder (vinyl acetate, water-soluble acrylic, etc.), a plasticizer, a wetting material, and a dispersing agent are added and mixed with a ball mill, and then defoamed under reduced pressure.
  • the obtained ceramic slurry is formed into a sheet shape on a carrier sheet by a doctor blade method and dried to produce ceramic green sheets to be the insulator layers 16a to 16j.
  • via-hole conductors v1 to v3 and v11 to v13 are formed on the ceramic green sheets to be the insulator layers 16d to 16f, respectively. Specifically, via holes are formed by irradiating the ceramic green sheets to be the insulator layers 16d to 16f with a laser beam. Next, the via hole is filled with a conductive paste such as Ag, Pd, Cu, Au or an alloy thereof by a method such as printing.
  • the coil conductors 18a to 18d, the parallel conductors 20a to 20c, and the lead conductors 22a and 22b are formed on the ceramic green sheets to be the insulator layers 16d to 16g.
  • a conductive paste mainly composed of Ag, Pd, Cu, Au, or an alloy thereof is applied on the ceramic green sheets to be the insulator layers 16d to 16g by a screen printing method or a photolithography method.
  • the coil conductors 18a to 18d, the parallel conductors 20a to 20c, and the lead conductors 22a and 22b are formed by applying by a method.
  • the step of forming the coil conductors 18a to 18d, the parallel conductors 20a to 20c, and the lead conductors 22a and 22b and the step of filling the via holes with the conductive paste may be performed in the same step.
  • the ceramic green sheets to be the insulator layers 16a to 16j are arranged in this order and laminated and pressure-bonded.
  • the ceramic green sheets to be the ceramic green sheets to be the insulator layers 16a to 16j are laminated and pressure-bonded one by one and temporarily pressed, and then the unfired mother laminate is pressed by a hydrostatic press or the like. Perform final crimping. Thereby, an unfired mother laminated body is obtained.
  • the mother laminated body is cut into a laminated body 12 having a predetermined size with a cutting blade. Thereby, the unfired laminated body 12 is obtained.
  • the unbaked laminate 12 is subjected to binder removal processing and baking.
  • the binder removal treatment is performed, for example, in a low oxygen atmosphere at 500 ° C. for 2 hours. Firing is performed, for example, at 870 ° C. to 900 ° C. for 2.5 hours.
  • the laminated body 12 is barrel-processed and chamfered. Thereafter, an electrode paste whose main component is silver is applied and baked on the surface of the laminate 12 by, for example, a dipping method or the like, thereby forming silver electrodes to be the external electrodes 14a and 14b. The silver electrode is baked at 800 ° C. for 1 hour.
  • the external electrodes 14a and 14b are formed by performing Ni plating and Sn plating on the surface of the silver electrode. Through the above steps, an electronic component 10a as shown in FIG. 1 is completed.
  • the height of the electronic component 10a in the vertical direction can be reduced. More specifically, the parallel conductors 20a to 20c are provided on the insulator layers 16d to 16f provided with the coil conductors 18a to 18c. Therefore, in the electronic component 10a, it is not necessary to add a new insulator layer in order to provide the parallel conductors 20a to 20c. As a result, the vertical height of the electronic component 10a is reduced.
  • the direct current resistance of the coil L can be reduced. More specifically, in the electronic component 10a, the parallel conductors 20a to 20c are connected in parallel to the coil conductors 18b to 18d via the via-hole conductors v1 to v3 and v11 to v13 that penetrate the insulator layers 16e to 16g in the vertical direction. ing. Thereby, since there are two current paths in the portion where the parallel conductors 20a to 20c of the coil conductors 18b to 18d are connected in parallel, the DC resistance in the portion is reduced. As a result, the direct current resistance of the coil L is reduced.
  • the capacitance generated between the parallel conductors 20a to 20c and the external electrodes 14a and 14b can be reduced. More specifically, the external electrodes 14a and 14b are respectively provided on the end surfaces formed by connecting the short sides of the insulator layers 16a to 16j. Therefore, the external electrodes 14a and 14b easily form a capacitance between the conductors overlapping the short side of the track R. Therefore, in the electronic component 10a, the parallel conductors 20a to 20c do not overlap the two short sides of the track R when viewed from above. This suppresses the formation of capacitance between the external electrodes 14a and 14b and the parallel conductors 20a to 20c.
  • the coil conductor 18a has a short side on the upstream side in the counterclockwise direction (that is, the short side on the rear side) with respect to the long side on which the parallel conductor 20a does not overlap the track R when viewed in plan from above. It does not overlap (side).
  • the coil conductor 18a and the parallel conductor 20a are separated by the length of the short side of the track R.
  • occurrence of a short circuit between the coil conductor 18a and the parallel conductor 20a is suppressed.
  • the occurrence of a short circuit between the coil conductor 18b and the parallel conductor 20b and between the coil conductor 18c and the parallel conductor 20c is suppressed.
  • FIG. 4 is an exploded perspective view of the multilayer body 112 of the electronic component 110 according to the comparative example.
  • the inventor of the present application prepared a sample having the structure of the electronic component 110 shown in FIG. 4 (hereinafter referred to as a sample of Comparative Example 1).
  • the electronic component 110 is different from the electronic component 10a in that the parallel conductors 20a to 20c are not provided.
  • what added 100 to the reference number of each structure of the electronic component 10a was used for the reference number of each structure of the electronic component 110.
  • FIG. 4
  • the inventor of the present application prepares a sample (hereinafter referred to as a sample of Comparative Example 2) having a double helical structure in which two coil conductors 118a to 118d in FIG. did. Further, the inventor of the present application prepared a sample having the structure of the electronic component 10a (hereinafter referred to as the sample of Example 1). 2 and 4, the number of turns of the coil L is 2.5. However, in the samples of Comparative Example 1 and Example 1, a set of coil conductors 18 b and 18 c (a set of coil conductors 118 b and 118 c) is used. Three sets were added, and the number of turns of the coil L was set to 5.5. On the other hand, in the sample of Comparative Example 2, the number of turns of the coil L was set to 7.5 turns in order to match the inductance value (impedance value) with Comparative Example 1 and Example 1 as described later.
  • Length L1 Length in the front-rear direction inside the coil
  • Length L2 Length in the left-right direction inside the coil
  • Length L3 From the front and rear end faces of the laminates 12, 112 of the external electrodes 14a, 14b
  • Folding length L4 Length of coil L in the front-rear direction
  • Length L5 Length of coil L in the left-right direction
  • L6 Total length of coil L in the front-rear direction and the lengths of lead conductors 22a and 22b Width
  • W1 Distance from the short side of the annular track R to the front and rear end faces of the stacked bodies 12, 112 Width W2: From the long side of the circular track R to the right and left side surfaces of the stacked bodies 12, 112 Distance width W3: Thickness width W4 at the front and rear end faces of the external electrodes 14a, 14b: Thickness turn number T (not shown) on the right and left side surfaces of the external electrodes 14a,
  • Table 1 is a table showing the size of each part of the samples of Comparative Example 1, Comparative Example 2, and Example 1.
  • the units of the lengths L1 to L6 and the widths W1 to W4 are ⁇ m.
  • the unit of the number of turns T is a turn.
  • the unit of area S is ⁇ m 2 .
  • the inductance value, the impedance value at 100 MHz, the DC resistance value, and the height in the vertical direction of the electronic component were measured and calculated.
  • Table 2 is a table showing measurement results and calculation results.
  • the inductance values (impedance values) of the samples of Comparative Example 1, Comparative Example 2, and Example 1 are aligned.
  • the number of turns of the coil was adjusted as described above.
  • the DC resistance value was a relatively large value of 0.364 ⁇ .
  • the DC resistance value decreased to 0.248 ⁇ .
  • the height of the sample of the comparative example 2 (274 ⁇ m) is the height of the sample of the comparative example 1 (274 ⁇ m). 130 ⁇ m).
  • the DC resistance value (0.261 ⁇ ) of the sample of Example 1 is significantly smaller than the DC resistance value (0.364 ⁇ ) of the sample of Comparative Example 1, and the DC resistance value of the sample of Comparative Example 2 ( Is relatively close to 0.248 ⁇ ).
  • the height of the sample of Example 1 (130 ⁇ m) is lower than the height of the sample of Comparative Example 2 (274 ⁇ m), and is equal to the height of the sample of Comparative Example 1 (130 ⁇ m). As described above, in the sample of Example 1, it is possible to reduce the height while reducing the DC resistance value.
  • FIG. 5 is an external perspective view of an electronic component 10b according to a modification.
  • FIG. 6 is an exploded perspective view of the multilayer body 12 of the electronic component 10b according to the modification.
  • the electronic component 10b differs from the electronic component 10a in that the positions where the external electrodes 14a and 14b are provided are different and that via-hole conductors v21 to v27 are provided instead of the lead conductors 22a and 22b.
  • the electronic component 10b will be described focusing on the differences.
  • the external electrode 14a is provided on the upper surface of the multilayer body 12, and is folded back to four surfaces adjacent to the upper surface.
  • the external electrode 14b is provided on the bottom surface of the multilayer body 12, and is folded back to four surfaces adjacent to the bottom surface.
  • the via-hole conductors v21 to v23 penetrate the insulator layers 16a to 16c in the vertical direction and are connected to each other to constitute one via-hole conductor.
  • the upper end of the via-hole conductor v21 is connected to the external electrode 14a.
  • the lower end of the via-hole conductor v23 is connected to the upstream end of the coil conductor 18a.
  • the via-hole conductors v24 to v27 pass through the insulating layers 16g to 16j in the vertical direction and are connected to each other to constitute one via-hole conductor.
  • the upper end of the via-hole conductor v24 is connected to the downstream end of the coil conductor 18d.
  • the lower end of the via-hole conductor v27 is connected to the external electrode 14b.
  • the electronic component 10b configured as described above is mounted on the circuit board such that the right or left side surface faces the circuit board.
  • the height in the vertical direction of the electronic component 10b can be reduced in the same manner as the electronic component 10a.
  • the direct current resistance of the coil L can be reduced as in the electronic component 10a.
  • the occurrence of a short circuit between the coil conductor 18a and the parallel conductor 20a is suppressed, as with the electronic component 10a.
  • the electronic component according to the present invention is not limited to the electronic components 10a and 10b, and can be changed within the scope of the gist thereof.
  • the parallel conductors 20a to 20c may not be connected to the coil conductors 18a to 18c, respectively.
  • the coil conductor and the parallel conductor are connected in parallel by forming a via-hole conductor that penetrates through each of the insulator layers 16d to 16f.
  • the coil conductors 18a to 18c may have a length other than the length corresponding to 1 ⁇ 2 circumference. That is, the coil conductors 18a to 18c may be longer or shorter than a length corresponding to 1 ⁇ 2 circumference.
  • the trajectory R has a rectangular shape.
  • the rectangular shape includes a rectangle with corners and a rounded rectangle with rounded and chamfered corners.
  • Each round rectangle also includes a track shape in which the ends of two long sides are connected by a semicircle. In this case, the semicircle corresponds to the short side.
  • the present invention is useful for electronic components, and is particularly excellent in that the height in the stacking direction can be reduced while reducing direct current resistance.

Abstract

Provided is an electronic component that can have a reduced height in the direction of lamination while effecting a reduction in DC resistance. The electronic component (10) is characterized by being provided with: a laminate body (12) resulting from laminating insulating body layers (16); a helical coil (L) containing coil conductors (18), which are provided to the insulating body layers (16), overlap each other, and form annular paths having an elongated shape, and a via hole conductor (v) that is connected to the coil conductors (18) and penetrates the insulating body layers (16) in the direction of lamination; a parallel conductor (20) that is provided to the insulating body layers (16) to which the coil conductors (18) are provided, overlaps the long side of the annular paths, and does not overlap the short side of the annular paths; and a via hole conductor (v) that connects to the coil conductor (18) in parallel the parallel conductor (20) provided to the insulating body layers (16) differing from the insulating body layers (16) to which the coil conductors (18) are provided.

Description

電子部品Electronic components
 本発明は、電子部品に関し、より特定的には、絶縁体層が積層されてなる積層体を備える電子部品に関する。 The present invention relates to an electronic component, and more particularly, to an electronic component including a laminate in which insulator layers are laminated.
 従来の電子部品に関する発明としては、例えば、特許文献1に記載の積層チップインダクタが知られている。該積層チップインダクタでは、コイルは、複数のコイル用パターンが接続されることにより螺旋状をなしている。また、同じ形状を有するコイル用パターンが2つずつ設けられ、互いに並列に接続されている。これにより、特許文献1に記載の積層チップインダクタでは、コイルの直流抵抗の低減が図られている。 As an invention related to a conventional electronic component, for example, a multilayer chip inductor described in Patent Document 1 is known. In the multilayer chip inductor, the coil has a spiral shape by connecting a plurality of coil patterns. Two coil patterns having the same shape are provided and connected in parallel to each other. Thereby, in the multilayer chip inductor described in Patent Document 1, the DC resistance of the coil is reduced.
 ところで、特許文献1に記載の積層チップインダクタでは、同じ形状を有するコイル用パターンが2つずつ並列に接続されている。そのため、コイルの直流抵抗の低減を図ることができるものの、絶縁体層の積層数が多くなり、積層チップインダクタの積層方向の高さが高くなってしまう。 Incidentally, in the multilayer chip inductor described in Patent Document 1, two coil patterns having the same shape are connected in parallel. Therefore, although the direct current resistance of the coil can be reduced, the number of insulator layers stacked increases, and the height of the multilayer chip inductor in the stacking direction increases.
特開2001-358016号公報JP 2001-358016 A
 そこで、本発明の目的は、直流抵抗の低減を図りつつ、積層方向の高さを低減できる電子部品を提供することである。 Therefore, an object of the present invention is to provide an electronic component that can reduce the height in the stacking direction while reducing the DC resistance.
 本発明の一形態に係る電子部品は、複数の絶縁体層が積層されてなる積層体と、前記絶縁体層に設けられ、かつ、積層方向から平面視したときに互いに重なり合って長方形状の環状の軌道を形成している複数のコイル導体、及び、該複数のコイル導体を接続し、かつ、前記絶縁体層を積層方向に貫通する第1のビアホール導体を含む螺旋状のコイルと、前記コイル導体が設けられている前記絶縁体層に設けられている並列導体であって、前記環状の軌道の長辺に重なっており、かつ、該環状の軌道の短辺に重なっていない並列導体と、前記コイル導体に対して、該コイル導体が設けられている前記絶縁体層とは異なる前記絶縁体層に設けられている前記並列導体を並列接続させ、かつ、前記絶縁体層を積層方向に貫通する第2のビアホール導体と、を備えていること、を特徴とする。 An electronic component according to an embodiment of the present invention includes a stacked body in which a plurality of insulating layers are stacked, and a rectangular annular shape that is provided in the insulating layers and overlaps each other when viewed in plan from the stacking direction. A spiral coil including a plurality of coil conductors forming a track, a first via-hole conductor connecting the plurality of coil conductors and penetrating the insulator layer in the stacking direction, and the coil A parallel conductor provided in the insulator layer provided with a conductor, which overlaps a long side of the annular track, and a parallel conductor which does not overlap a short side of the annular track; The parallel conductor provided in the insulator layer different from the insulator layer provided with the coil conductor is connected in parallel to the coil conductor and penetrates the insulator layer in the stacking direction. Second via hole It comprises a body, a, characterized by.
 本発明によれば、直流抵抗の低減を図りつつ、積層方向の高さを低減できる。 According to the present invention, the height in the stacking direction can be reduced while reducing the DC resistance.
一実施形態に係る電子部品の外観斜視図である。It is an external appearance perspective view of the electronic component which concerns on one Embodiment. 電子部品の積層体の分解斜視図である。It is a disassembled perspective view of the laminated body of an electronic component. コイル導体及び並列導体を重ねて平面視した図である。It is the figure which piled up the coil conductor and the parallel conductor, and was planarly viewed. 比較例に係る電子部品の積層体の分解斜視図である。It is a disassembled perspective view of the laminated body of the electronic component which concerns on a comparative example. 変形例に係る電子部品の外観斜視図である。It is an external appearance perspective view of the electronic component which concerns on a modification. 変形例に係る電子部品の積層体の分解斜視図である。It is a disassembled perspective view of the laminated body of the electronic component which concerns on a modification.
 以下に、本発明の実施形態に係る電子部品について説明する。 Hereinafter, an electronic component according to an embodiment of the present invention will be described.
(電子部品の構成)
 以下に、本発明の一実施形態に係る電子部品の構成について図面を参照しながら説明する。図1は、一実施形態に係る電子部品10aの外観斜視図である。図2は、電子部品10aの積層体12の分解斜視図である。図3は、コイル導体18a~18d及び並列導体20a~20cを重ねて平面視した図である。以下では、電子部品10aの積層方向を上下方向と定義し、上側から電子部品10aを平面視したときに長辺が延在している方向を前後方向と定義し、上側から電子部品10aを平面視したときに短辺が延在している方向を左右方向と定義する。
(Configuration of electronic parts)
The configuration of an electronic component according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is an external perspective view of an electronic component 10a according to an embodiment. FIG. 2 is an exploded perspective view of the multilayer body 12 of the electronic component 10a. FIG. 3 is a plan view in which the coil conductors 18a to 18d and the parallel conductors 20a to 20c are overlapped. In the following, the stacking direction of the electronic components 10a is defined as the vertical direction, the direction in which the long side extends when the electronic component 10a is viewed in plan from the upper side is defined as the front-rear direction, and the electronic component 10a is planar from the upper side. The direction in which the short side extends when viewed is defined as the left-right direction.
 電子部品10aは、図1及び図2に示すように、積層体12、外部電極14a,14b、並列導体20a~20c、ビアホール導体v11~v13及びコイルLを備えている。 1 and 2, the electronic component 10a includes a multilayer body 12, external electrodes 14a and 14b, parallel conductors 20a to 20c, via-hole conductors v11 to v13, and a coil L.
 積層体12は、直方体状をなしており、絶縁体層16a~16jが上側から下側へとこの順に積層されて構成されている。絶縁体層16a~16jは、図2に示すように、長方形状をなしており、例えば、Ni-Cu-Zn系フェライトからなる磁性体材料により作製されている。以下では、絶縁体層16a~16jの上側の面を表面と呼び、絶縁体層16a~16jの下側の面を裏面と呼ぶ。 The laminated body 12 has a rectangular parallelepiped shape, and the insulating layers 16a to 16j are laminated in this order from the upper side to the lower side. As shown in FIG. 2, the insulator layers 16a to 16j have a rectangular shape, and are made of, for example, a magnetic material made of Ni—Cu—Zn ferrite. Hereinafter, the upper surface of the insulator layers 16a to 16j is referred to as a front surface, and the lower surface of the insulator layers 16a to 16j is referred to as a back surface.
 コイルLは、反時計回りに周回しながら下側に向かって進行する螺旋状をなしており、コイル導体18a~18d、引き出し導体22a,22b及びビアホール導体v1~v3を含んでいる。コイル導体18a~18d、引き出し導体22a,22b及びビアホール導体v1~v3は、例えば、Agを主成分とする導電性材料により作製されている。 The coil L has a spiral shape that goes downward while rotating counterclockwise, and includes coil conductors 18a to 18d, lead conductors 22a and 22b, and via-hole conductors v1 to v3. The coil conductors 18a to 18d, the lead conductors 22a and 22b, and the via hole conductors v1 to v3 are made of, for example, a conductive material containing Ag as a main component.
 コイル導体18a~18dは、上側から平面視したときに、図3に示すように、互いに重なり合って絶縁体層16a~16jの外縁に沿った長方形状(環状)の軌道Rを形成している。すなわち、軌道Rの2本の長辺は、絶縁体層16a~16jの2本の長辺に平行であり、軌道Rの2本の短辺は、絶縁体層16a~16jの2本の短辺に平行である。 As shown in FIG. 3, the coil conductors 18a to 18d overlap each other to form a rectangular (annular) track R along the outer edges of the insulator layers 16a to 16j when viewed from above. That is, the two long sides of the track R are parallel to the two long sides of the insulator layers 16a to 16j, and the two short sides of the track R are the two short sides of the insulator layers 16a to 16j. Parallel to the side.
 コイル導体18aは、絶縁体層16dの表面上に設けられており、反時計回りに周回する線状導体である。コイル導体18aは、1/2周分の長さを有しており、軌道Rの左側の長辺及び前側の短辺に重なっている。 The coil conductor 18a is a linear conductor that is provided on the surface of the insulator layer 16d and circulates counterclockwise. The coil conductor 18a has a length corresponding to a half circumference, and overlaps the long side on the left side of the track R and the short side on the front side.
 コイル導体18bは、絶縁体層16eの表面上に設けられており、反時計回りに周回する線状導体である。コイル導体18bは、1/2周分の長さを有しており、軌道Rの右側の長辺及び後ろ側の短辺に重なっている。 The coil conductor 18b is a linear conductor that is provided on the surface of the insulator layer 16e and circulates counterclockwise. The coil conductor 18b has a length corresponding to ½ circumference and overlaps the long side on the right side of the track R and the short side on the back side.
 コイル導体18cは、絶縁体層16fの表面上に設けられており、反時計回りに周回する線状導体である。コイル導体18cは、1/2周分の長さを有しており、軌道Rの左側の長辺及び前側の短辺の長辺に重なっている。 The coil conductor 18c is a linear conductor that is provided on the surface of the insulator layer 16f and circulates counterclockwise. The coil conductor 18c has a length corresponding to ½ circumference and overlaps the long side on the left side of the track R and the long side of the short side on the front side.
 コイル導体18dは、絶縁体層16gの表面上に設けられており、反時計回りに周回する線状導体である。コイル導体18dは、3/4周分の長さを有しており、軌道Rの右側の長辺、後ろ側の短辺及び左側の長辺に沿って設けられている。以下では、コイル導体18a~18dの反時計回り方向の上流側の端部を上流端と呼び、下流側の端部を下流端と呼ぶ。 The coil conductor 18d is a linear conductor that is provided on the surface of the insulator layer 16g and circulates counterclockwise. The coil conductor 18d has a length corresponding to 3/4 rounds, and is provided along the right long side, the rear short side, and the left long side of the track R. Hereinafter, the upstream end of the coil conductors 18a to 18d in the counterclockwise direction is referred to as an upstream end, and the downstream end is referred to as a downstream end.
 ビアホール導体v1は、絶縁体層16dを上下方向に貫通しており、コイル導体18aの下流端とコイル導体18bの上流端とを接続している。ビアホール導体v2は、絶縁体層16eを上下方向に貫通しており、コイル導体18bの下流端とコイル導体18cの上流端とを接続している。ビアホール導体v3は、絶縁体層16fを上下方向に貫通しており、コイル導体18cの下流端とコイル導体18dの上流端とを接続している。 The via-hole conductor v1 penetrates the insulating layer 16d in the vertical direction, and connects the downstream end of the coil conductor 18a and the upstream end of the coil conductor 18b. The via-hole conductor v2 penetrates the insulator layer 16e in the vertical direction, and connects the downstream end of the coil conductor 18b and the upstream end of the coil conductor 18c. The via-hole conductor v3 penetrates the insulator layer 16f in the vertical direction, and connects the downstream end of the coil conductor 18c and the upstream end of the coil conductor 18d.
 並列導体20aは、コイル導体18aが設けられている絶縁体層16dの表面上に設けられており、上側から平面視したときに、軌道Rの右側の長辺と重なる線状導体である。ただし、並列導体20aは、上側から平面視したときに、軌道Rの2本の短辺に重なっていない。また、並列導体20aは、コイル導体18aの下流端に接続されている。すなわち、同一の絶縁体層16dの表面上に設けられているコイル導体18aと並列導体20aとは接続されている。また、並列導体20aは、上側から平面視したときに、コイル導体18bにおいて軌道Rの右側の長辺と重なる部分と重なっている。 The parallel conductor 20a is a linear conductor that is provided on the surface of the insulator layer 16d on which the coil conductor 18a is provided and overlaps the long side on the right side of the track R when viewed from above. However, the parallel conductor 20a does not overlap the two short sides of the track R when viewed from above. The parallel conductor 20a is connected to the downstream end of the coil conductor 18a. That is, the coil conductor 18a and the parallel conductor 20a provided on the surface of the same insulator layer 16d are connected. In addition, the parallel conductor 20a overlaps with a portion of the coil conductor 18b that overlaps the long side on the right side of the track R when viewed from above.
 並列導体20bは、コイル導体18bが設けられている絶縁体層16eの表面上に設けられており、上側から平面視したときに、軌道Rの左側の長辺と重なる線状導体である。ただし、並列導体20bは、上側から平面視したときに、軌道Rの2本の短辺に重なっていない。また、並列導体20bは、コイル導体18bの下流端に接続されている。すなわち、同一の絶縁体層16eの表面上に設けられているコイル導体18bと並列導体20bとは接続されている。並列導体20bは、上側から平面視したときに、コイル導体18cにおいて軌道Rの左側の長辺と重なる部分と重なっている。 The parallel conductor 20b is a linear conductor that is provided on the surface of the insulator layer 16e on which the coil conductor 18b is provided, and overlaps the long side on the left side of the track R when viewed from above. However, the parallel conductor 20b does not overlap the two short sides of the track R when viewed from above. The parallel conductor 20b is connected to the downstream end of the coil conductor 18b. That is, the coil conductor 18b and the parallel conductor 20b provided on the surface of the same insulator layer 16e are connected. The parallel conductor 20b overlaps the portion of the coil conductor 18c that overlaps the long side on the left side of the track R when viewed from above.
 並列導体20cは、コイル導体18cが設けられている絶縁体層16fの表面上に設けられており、上側から平面視したときに、軌道Rの右側の長辺と重なる線状導体である。ただし、並列導体20cは、上側から平面視したときに、軌道Rの2本の短辺に重なっていない。また、並列導体20cは、コイル導体18cの下流端に接続されている。すなわち、同一の絶縁体層16fの表面上に設けられているコイル導体18cと並列導体20cとは接続されている。並列導体20cは、上側から平面視したときに、コイル導体18dにおいて軌道Rの右側の長辺と重なる部分と重なっている。 The parallel conductor 20c is a linear conductor that is provided on the surface of the insulator layer 16f on which the coil conductor 18c is provided and overlaps the long side on the right side of the track R when viewed from above. However, the parallel conductor 20c does not overlap the two short sides of the track R when viewed from above. The parallel conductor 20c is connected to the downstream end of the coil conductor 18c. That is, the coil conductor 18c and the parallel conductor 20c provided on the surface of the same insulator layer 16f are connected. The parallel conductor 20c overlaps the portion of the coil conductor 18d that overlaps the long side on the right side of the track R when viewed from above.
 ここで、コイル導体18aは、上側から平面視したときに、軌道Rにおいて並列導体20aが重なっていない長辺に重なっている。更に、コイル導体18aは、上側から平面視したときに、軌道Rにおいて並列導体20aが重なっていない長辺に対して反時計回り方向の上流側の短辺(すなわち、後ろ側の短辺)には重なっていない。 Here, the coil conductor 18a overlaps the long side where the parallel conductor 20a does not overlap in the track R when viewed from above. Further, the coil conductor 18a has an upstream short side in the counterclockwise direction (that is, a short side on the rear side) with respect to the long side where the parallel conductor 20a does not overlap in the track R when viewed from above. Do not overlap.
 また、コイル導体18bは、上側から平面視したときに、軌道Rにおいて並列導体20bが重なっていない長辺に重なっている。更に、コイル導体18bは、上側から平面視したときに、軌道Rにおいて並列導体20bが重なっていない長辺に対して反時計回り方向の上流側の短辺(すなわち、前側の短辺)には重なっていない。 Further, the coil conductor 18b overlaps the long side where the parallel conductor 20b does not overlap in the track R when viewed from above. Furthermore, the coil conductor 18b has a short side on the upstream side in the counterclockwise direction (that is, the short side on the front side) with respect to the long side where the parallel conductor 20b does not overlap in the track R when viewed in plan from above. There is no overlap.
 また、コイル導体18cは、上側から平面視したときに、軌道Rにおいて並列導体20cが重なっていない長辺に重なっている。更に、コイル導体18cは、上側から平面視したときに、軌道Rにおいて並列導体20cが重なっていない長辺に対して反時計回り方向の上流側の短辺(すなわち、後ろ側の短辺)には重なっていない。 Further, the coil conductor 18c overlaps the long side where the parallel conductor 20c does not overlap in the track R when viewed from above. Furthermore, the coil conductor 18c has an upstream short side (that is, a rear short side) in the counterclockwise direction with respect to the long side where the parallel conductor 20c does not overlap in the track R when viewed in plan from above. Do not overlap.
 ビアホール導体v11は、絶縁体層16dを上下方向に貫通しており、並列導体20aの後ろ側の端部とコイル導体18bの右後ろ側の角とを接続している。これにより、並列導体20aは、並列導体20aが設けられている絶縁体層16dとは異なる絶縁体層16eの表面に設けられているコイル導体18bに対してビアホール導体v1,v11を介して並列接続されている。本実施形態では、並列導体20aは、並列導体20aに対して下側に位置するコイル導体18bに並列接続されている。並列導体20aは、コイル導体18bにおける軌道Rの右側の長辺と重なる部分に並列接続されている。 The via-hole conductor v11 penetrates the insulator layer 16d in the vertical direction, and connects the rear end of the parallel conductor 20a and the right rear corner of the coil conductor 18b. Thereby, the parallel conductor 20a is connected in parallel through the via-hole conductors v1 and v11 to the coil conductor 18b provided on the surface of the insulator layer 16e different from the insulator layer 16d provided with the parallel conductor 20a. Has been. In the present embodiment, the parallel conductor 20a is connected in parallel to the coil conductor 18b positioned below the parallel conductor 20a. The parallel conductor 20a is connected in parallel to a portion of the coil conductor 18b that overlaps the long side on the right side of the track R.
 ビアホール導体v12は、絶縁体層16eを上下方向に貫通しており、並列導体20bの前側の端部とコイル導体18cの左前側の角とを接続している。これにより、並列導体20bは、並列導体20bが設けられている絶縁体層16eとは異なる絶縁体層16fの表面に設けられているコイル導体18cに対してビアホール導体v2,v12を介して並列接続されている。本実施形態では、並列導体20bは、並列導体20bに対して下側に位置するコイル導体18cに並列接続されている。また、並列導体20bは、コイル導体18cにおける軌道Rの左側の長辺と重なる部分に並列接続されている。 The via-hole conductor v12 penetrates the insulator layer 16e in the vertical direction and connects the front end of the parallel conductor 20b and the left front corner of the coil conductor 18c. Thus, the parallel conductor 20b is connected in parallel via the via-hole conductors v2 and v12 to the coil conductor 18c provided on the surface of the insulator layer 16f different from the insulator layer 16e provided with the parallel conductor 20b. Has been. In the present embodiment, the parallel conductor 20b is connected in parallel to the coil conductor 18c positioned on the lower side with respect to the parallel conductor 20b. The parallel conductor 20b is connected in parallel to a portion of the coil conductor 18c that overlaps the long side on the left side of the track R.
 ビアホール導体v13は、絶縁体層16fを上下方向に貫通しており、並列導体20cの後ろ側の端部とコイル導体18dの右後ろ側の角とを接続している。これにより、並列導体20cは、並列導体20cが設けられている絶縁体層16fとは異なる絶縁体層16gの表面に設けられているコイル導体18dに対してビアホール導体v3,v13を介して並列接続されている。本実施形態では、並列導体20cは、並列導体20cに対して下側に位置するコイル導体18dに並列接続されている。並列導体20cは、コイル導体18dにおける軌道Rの右側の長辺と重なる部分に並列接続されている。 The via-hole conductor v13 passes through the insulating layer 16f in the vertical direction, and connects the rear end of the parallel conductor 20c and the right rear corner of the coil conductor 18d. Thus, the parallel conductor 20c is connected in parallel via the via-hole conductors v3 and v13 to the coil conductor 18d provided on the surface of the insulator layer 16g different from the insulator layer 16f provided with the parallel conductor 20c. Has been. In the present embodiment, the parallel conductor 20c is connected in parallel to the coil conductor 18d located on the lower side with respect to the parallel conductor 20c. The parallel conductor 20c is connected in parallel to a portion of the coil conductor 18d that overlaps the long side on the right side of the track R.
 引き出し導体22aは、絶縁体層16dの表面上に設けられており、コイル導体18aの上流端に接続されている。また、引き出し導体22aは、絶縁体層16dの後ろ側の短辺に引き出されている。引き出し導体22bは、絶縁体層16gの表面上に設けられており、コイル導体18dの下流端に接続されている。また、引き出し導体22bは、絶縁体層16gの前側の短辺に引き出されている。 The lead conductor 22a is provided on the surface of the insulator layer 16d, and is connected to the upstream end of the coil conductor 18a. The lead conductor 22a is drawn to the short side on the back side of the insulator layer 16d. The lead conductor 22b is provided on the surface of the insulator layer 16g, and is connected to the downstream end of the coil conductor 18d. The lead conductor 22b is drawn to the short side on the front side of the insulator layer 16g.
 外部電極14aは、積層体12の後ろ側の端面を覆っていると共に、該端面に隣接する4つの面に折り返されている。積層体12の後ろ側の端面は、絶縁体層16a~16jの後ろ側の短辺が連なって形成されている面である。これにより、外部電極14aは、引き出し導体22aと接続されている。 The external electrode 14a covers the rear end face of the multilayer body 12 and is folded back to four faces adjacent to the end face. The rear end surface of the stacked body 12 is a surface formed by connecting the short sides on the rear side of the insulator layers 16a to 16j. Thereby, the external electrode 14a is connected to the lead conductor 22a.
 外部電極14bは、積層体12の前側の端面を覆っていると共に、該端面に隣接する4つの面に折り返されている。積層体12の前側の端面は、絶縁体層16a~16jの前側の短辺が連なって形成されている面である。これにより、外部電極14bは、引き出し導体22bと接続されている。 The external electrode 14b covers the front end face of the laminate 12 and is folded back to four faces adjacent to the end face. The front end surface of the stacked body 12 is a surface formed by connecting the front short sides of the insulating layers 16a to 16j. Thereby, the external electrode 14b is connected to the lead conductor 22b.
(電子部品の製造方法)
 以上のように構成された電子部品10aの製造方法について図面を参照しながら説明する。
(Method for manufacturing electronic parts)
A method for manufacturing the electronic component 10a configured as described above will be described with reference to the drawings.
 まず、図2に示す絶縁体層16a~16jとなるべきセラミックグリーンシートを形成する。具体的には、酸化第二鉄(Fe23)、酸化亜鉛(ZnO)及び酸化銅(CuO)及び酸化ニッケル(NiO)を所定の比率で秤量したそれぞれの材料を原材料としてボールミルに投入し、湿式調合を行う。得られた混合物を乾燥してから粉砕し、得られた粉末を800℃で1時間仮焼する。得られた仮焼粉末をボールミルにて湿式粉砕した後、乾燥してから解砕して、フェライトセラミック粉末を得る。 First, ceramic green sheets to be the insulator layers 16a to 16j shown in FIG. 2 are formed. Specifically, ferric oxide (Fe 2 O 3 ), zinc oxide (ZnO), copper oxide (CuO), and nickel oxide (NiO) were weighed at a predetermined ratio, and each material was put into a ball mill as a raw material. Wet preparation. The obtained mixture is dried and pulverized, and the obtained powder is calcined at 800 ° C. for 1 hour. The obtained calcined powder is wet pulverized by a ball mill, dried and then crushed to obtain a ferrite ceramic powder.
 このフェライトセラミック粉末に対して結合剤(酢酸ビニル、水溶性アクリル等)と可塑剤、湿潤材、分散剤を加えてボールミルで混合を行い、その後、減圧により脱泡を行う。得られたセラミックスラリーをドクターブレード法により、キャリアシート上にシート状に形成して乾燥させ、絶縁体層16a~16jとなるべきセラミックグリーンシートを作製する。 To this ferrite ceramic powder, a binder (vinyl acetate, water-soluble acrylic, etc.), a plasticizer, a wetting material, and a dispersing agent are added and mixed with a ball mill, and then defoamed under reduced pressure. The obtained ceramic slurry is formed into a sheet shape on a carrier sheet by a doctor blade method and dried to produce ceramic green sheets to be the insulator layers 16a to 16j.
 次に、絶縁体層16d~16fとなるべきセラミックグリーンシートのそれぞれに、ビアホール導体v1~v3,v11~v13を形成する。具体的には、絶縁体層16d~16fとなるべきセラミックグリーンシートにレーザビームを照射してビアホールを形成する。次に、このビアホールに対して、Ag,Pd,Cu,Auやこれらの合金などの導電性ペーストを印刷塗布などの方法により充填する。 Next, via-hole conductors v1 to v3 and v11 to v13 are formed on the ceramic green sheets to be the insulator layers 16d to 16f, respectively. Specifically, via holes are formed by irradiating the ceramic green sheets to be the insulator layers 16d to 16f with a laser beam. Next, the via hole is filled with a conductive paste such as Ag, Pd, Cu, Au or an alloy thereof by a method such as printing.
 次に、絶縁体層16d~16gとなるべきセラミックグリーンシート上にコイル導体18a~18d、並列導体20a~20c及び引き出し導体22a,22bを形成する。具体的には、絶縁体層16d~16gとなるべきセラミックグリーンシート上に、Ag,Pd,Cu,Auやこれらの合金などを主成分とする導電性ペーストをスクリーン印刷法やフォトリソグラフィ法などの方法で塗布することにより、コイル導体18a~18d、並列導体20a~20c及び引き出し導体22a,22bを形成する。なお、コイル導体18a~18d、並列導体20a~20c及び引き出し導体22a,22bを形成する工程とビアホールに対して導電性ペーストを充填する工程とは、同じ工程において行われてもよい。 Next, the coil conductors 18a to 18d, the parallel conductors 20a to 20c, and the lead conductors 22a and 22b are formed on the ceramic green sheets to be the insulator layers 16d to 16g. Specifically, a conductive paste mainly composed of Ag, Pd, Cu, Au, or an alloy thereof is applied on the ceramic green sheets to be the insulator layers 16d to 16g by a screen printing method or a photolithography method. The coil conductors 18a to 18d, the parallel conductors 20a to 20c, and the lead conductors 22a and 22b are formed by applying by a method. The step of forming the coil conductors 18a to 18d, the parallel conductors 20a to 20c, and the lead conductors 22a and 22b and the step of filling the via holes with the conductive paste may be performed in the same step.
 次に、図2に示すように、絶縁体層16a~16jとなるべきセラミックグリーンシートをこの順に並べて積層・圧着する。絶縁体層16a~16jとなるべきセラミックグリーンシートとなるべきセラミックグリーンシートの積層・圧着は、1枚ずつ積層して仮圧着した後、未焼成のマザー積層体を静水圧プレスなどにより加圧して本圧着を行う。これにより、未焼成のマザー積層体を得る。 Next, as shown in FIG. 2, the ceramic green sheets to be the insulator layers 16a to 16j are arranged in this order and laminated and pressure-bonded. The ceramic green sheets to be the ceramic green sheets to be the insulator layers 16a to 16j are laminated and pressure-bonded one by one and temporarily pressed, and then the unfired mother laminate is pressed by a hydrostatic press or the like. Perform final crimping. Thereby, an unfired mother laminated body is obtained.
 次に、マザー積層体をカット刃により所定寸法の積層体12にカットする。これにより未焼成の積層体12が得られる。この未焼成の積層体12に脱バインダー処理及び焼成を行う。脱バインダー処理は、例えば、低酸素雰囲気中において500℃で2時間の条件で行われる。焼成は、例えば、870℃~900℃で2.5時間の条件で行われる。 Next, the mother laminated body is cut into a laminated body 12 having a predetermined size with a cutting blade. Thereby, the unfired laminated body 12 is obtained. The unbaked laminate 12 is subjected to binder removal processing and baking. The binder removal treatment is performed, for example, in a low oxygen atmosphere at 500 ° C. for 2 hours. Firing is performed, for example, at 870 ° C. to 900 ° C. for 2.5 hours.
 次に、積層体12にバレル加工を施して、面取りを行う。その後、積層体12の表面に、例えば、浸漬法等の方法により主成分が銀である電極ペーストを塗布及び焼き付けすることにより、外部電極14a,14bとなるべき銀電極を形成する。銀電極の焼き付けは、800℃で1時間行われる。 Next, the laminated body 12 is barrel-processed and chamfered. Thereafter, an electrode paste whose main component is silver is applied and baked on the surface of the laminate 12 by, for example, a dipping method or the like, thereby forming silver electrodes to be the external electrodes 14a and 14b. The silver electrode is baked at 800 ° C. for 1 hour.
 最後に、銀電極の表面に、Niめっき及びSnめっきを施すことにより、外部電極14a,14bを形成する。以上の工程を経て、図1に示すような電子部品10aが完成する。 Finally, the external electrodes 14a and 14b are formed by performing Ni plating and Sn plating on the surface of the silver electrode. Through the above steps, an electronic component 10a as shown in FIG. 1 is completed.
(効果)
 本実施形態に係る電子部品10aによれば、電子部品10aの上下方向の高さを低減できる。より詳細には、並列導体20a~20cは、コイル導体18a~18cが設けられている絶縁体層16d~16fに設けられている。そのため、電子部品10aでは、並列導体20a~20cを設けるために新たな絶縁体層を追加する必要がない。その結果、電子部品10aの上下方向の高さが低減される。
(effect)
According to the electronic component 10a according to the present embodiment, the height of the electronic component 10a in the vertical direction can be reduced. More specifically, the parallel conductors 20a to 20c are provided on the insulator layers 16d to 16f provided with the coil conductors 18a to 18c. Therefore, in the electronic component 10a, it is not necessary to add a new insulator layer in order to provide the parallel conductors 20a to 20c. As a result, the vertical height of the electronic component 10a is reduced.
 更に、電子部品10aによれば、コイルLの直流抵抗の低減を図ることができる。より詳細には、電子部品10aでは、並列導体20a~20cは、絶縁体層16e~16gを上下方向に貫通するビアホール導体v1~v3,v11~v13を介してコイル導体18b~18dに並列接続されている。これにより、コイル導体18b~18dにおける並列導体20a~20cが並列接続されている部分では、電流経路が2本になるので、かかる部分における直流抵抗が低減される。その結果、コイルLの直流抵抗の低減が図られている。 Furthermore, according to the electronic component 10a, the direct current resistance of the coil L can be reduced. More specifically, in the electronic component 10a, the parallel conductors 20a to 20c are connected in parallel to the coil conductors 18b to 18d via the via-hole conductors v1 to v3 and v11 to v13 that penetrate the insulator layers 16e to 16g in the vertical direction. ing. Thereby, since there are two current paths in the portion where the parallel conductors 20a to 20c of the coil conductors 18b to 18d are connected in parallel, the DC resistance in the portion is reduced. As a result, the direct current resistance of the coil L is reduced.
 また、電子部品10aによれば、並列導体20a~20cと外部電極14a,14bとの間に発生する容量を低減できる。より詳細には、外部電極14a,14bはそれぞれ、絶縁体層16a~16jの短辺が連なって形成されている端面に設けられている。そのため、外部電極14a,14bは、軌道Rの短辺と重なる導体との間において容量を形成しやすい。そこで、電子部品10aでは、並列導体20a~20cは、上側から平面視したときに、軌道Rの2本の短辺と重なっていない。これにより、外部電極14a,14bと並列導体20a~20cとの間に容量が形成されることが抑制される。 Further, according to the electronic component 10a, the capacitance generated between the parallel conductors 20a to 20c and the external electrodes 14a and 14b can be reduced. More specifically, the external electrodes 14a and 14b are respectively provided on the end surfaces formed by connecting the short sides of the insulator layers 16a to 16j. Therefore, the external electrodes 14a and 14b easily form a capacitance between the conductors overlapping the short side of the track R. Therefore, in the electronic component 10a, the parallel conductors 20a to 20c do not overlap the two short sides of the track R when viewed from above. This suppresses the formation of capacitance between the external electrodes 14a and 14b and the parallel conductors 20a to 20c.
 また、電子部品10aによれば、コイル導体18aと並列導体20aとの間においてショートが発生することが抑制される。より詳細には、コイル導体18aは、上側から平面視したときに、軌道Rにおいて並列導体20aが重なっていない長辺に対して反時計回り方向の上流側の短辺(すなわち、後ろ側の短辺)には重なっていない。これにより、コイル導体18aと並列導体20aとが軌道Rの短辺の長さだけ離れるようになる。その結果、コイル導体18aと並列導体20aとの間でショートが発生することが抑制される。なお、同じ理由により、コイル導体18bと並列導体20bとの間、及び、コイル導体18cと並列導体20cとの間においてショートが発生することが抑制される。 Moreover, according to the electronic component 10a, occurrence of a short circuit between the coil conductor 18a and the parallel conductor 20a is suppressed. More specifically, the coil conductor 18a has a short side on the upstream side in the counterclockwise direction (that is, the short side on the rear side) with respect to the long side on which the parallel conductor 20a does not overlap the track R when viewed in plan from above. It does not overlap (side). Thereby, the coil conductor 18a and the parallel conductor 20a are separated by the length of the short side of the track R. As a result, occurrence of a short circuit between the coil conductor 18a and the parallel conductor 20a is suppressed. For the same reason, the occurrence of a short circuit between the coil conductor 18b and the parallel conductor 20b and between the coil conductor 18c and the parallel conductor 20c is suppressed.
(実験結果)
 本願発明者は、電子部品10aが奏する効果をより明確にするために、以下に説明する評価を行った。図4は、比較例に係る電子部品110の積層体112の分解斜視図である。
(Experimental result)
The inventor of the present application performed the evaluation described below in order to clarify the effect of the electronic component 10a. FIG. 4 is an exploded perspective view of the multilayer body 112 of the electronic component 110 according to the comparative example.
 本願発明者は、図4に示す電子部品110の構造を有するサンプル(以下、比較例1のサンプルと言う)を用意した。電子部品110は、並列導体20a~20cが設けられていない点において電子部品10aと相違する。なお、電子部品110の各構成の参照符号には、電子部品10aの各構成の参照符号に100を足したものを用いた。 The inventor of the present application prepared a sample having the structure of the electronic component 110 shown in FIG. 4 (hereinafter referred to as a sample of Comparative Example 1). The electronic component 110 is different from the electronic component 10a in that the parallel conductors 20a to 20c are not provided. In addition, what added 100 to the reference number of each structure of the electronic component 10a was used for the reference number of each structure of the electronic component 110. FIG.
 また、本願発明者は、電子部品110において図4のコイル導体118a~118dが2つずつビアホール導体により並列接続された2重らせん構造を有するサンプル(以下、比較例2のサンプルと言う)を用意した。更に、本願発明者は、電子部品10aの構造を有するサンプル(以下、実施例1のサンプルと言う)を用意した。なお、図2及び図4では、コイルLのターン数が2.5ターンであるが、比較例1と実施例1のサンプルではコイル導体18b、18cの組(コイル導体118b、118cの組)を3組増やし、コイルLのターン数を5.5ターンとした。一方で、比較例2のサンプルでは後述するように比較例1や実施例1とインダクタンス値(インピーダンス値)を合わせるためにコイルLのターン数を7.5ターンとした。 Further, the inventor of the present application prepares a sample (hereinafter referred to as a sample of Comparative Example 2) having a double helical structure in which two coil conductors 118a to 118d in FIG. did. Further, the inventor of the present application prepared a sample having the structure of the electronic component 10a (hereinafter referred to as the sample of Example 1). 2 and 4, the number of turns of the coil L is 2.5. However, in the samples of Comparative Example 1 and Example 1, a set of coil conductors 18 b and 18 c (a set of coil conductors 118 b and 118 c) is used. Three sets were added, and the number of turns of the coil L was set to 5.5. On the other hand, in the sample of Comparative Example 2, the number of turns of the coil L was set to 7.5 turns in order to match the inductance value (impedance value) with Comparative Example 1 and Example 1 as described later.
 以下に、比較例1、比較例2及び実施例1のサンプルの各部のサイズについて図2及び図3を参照しながら説明する。なお、以下のサイズは、コイルLのターン数を除いて、比較例1、比較例2及び実施例1のサンプルにおいて共通である。 Hereinafter, the size of each part of the samples of Comparative Example 1, Comparative Example 2, and Example 1 will be described with reference to FIGS. The following sizes are common to the samples of Comparative Example 1, Comparative Example 2, and Example 1 except for the number of turns of the coil L.
長さL1:コイルL内部の前後方向の長さ
長さL2:コイルL内部の左右方向の長さ
長さL3:外部電極14a,14bの積層体12,112の前側及び後ろ側の端面からの折り返し長さ
長さL4:コイルLの前後方向の長さ
長さL5:コイルLの左右方向の長さ
長さL6:コイルLの前後方向の長さ及び引き出し導体22a,22bの長さの合計
幅W1:環状の軌道Rの短辺から積層体12,112の前側及び後ろ側の端面までの距離
幅W2:環状の軌道Rの長辺から積層体12,112の右側及び左側の側面までの距離
幅W3:外部電極14a,14bの前側及び後ろ側の端面における厚み
幅W4:外部電極14a,14bの右側及び左側の側面における厚み
ターン数T(図示せず):コイルLのターン数
面積S(図示せず):コイルL内部の面積
Length L1: Length in the front-rear direction inside the coil L Length L2: Length in the left-right direction inside the coil L Length L3: From the front and rear end faces of the laminates 12, 112 of the external electrodes 14a, 14b Folding length L4: Length of coil L in the front-rear direction Length L5: Length of coil L in the left-right direction L6: Total length of coil L in the front-rear direction and the lengths of lead conductors 22a and 22b Width W1: Distance from the short side of the annular track R to the front and rear end faces of the stacked bodies 12, 112 Width W2: From the long side of the circular track R to the right and left side surfaces of the stacked bodies 12, 112 Distance width W3: Thickness width W4 at the front and rear end faces of the external electrodes 14a, 14b: Thickness turn number T (not shown) on the right and left side surfaces of the external electrodes 14a, 14b: Turn number area S of the coil L (Not shown): Coil L Area of the part
 表1は、比較例1、比較例2および実施例1のサンプルの各部のサイズを示した表である。なお、長さL1~L6及び幅W1~W4の単位はμmである。ターン数Tの単位はターンである。面積Sの単位はμm2である。 Table 1 is a table showing the size of each part of the samples of Comparative Example 1, Comparative Example 2, and Example 1. The units of the lengths L1 to L6 and the widths W1 to W4 are μm. The unit of the number of turns T is a turn. The unit of area S is μm 2 .
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
 また、その他の条件について以下に列挙する。 Also, other conditions are listed below.
電子部品のサイズ:前後方向の長さ×左右方向の幅=0.4mm×0.2mm
積層体のサイズ:前後方向の長さ×左右方向の幅=0.37mm×0.18mm
絶縁体層の比透磁率:180
絶縁体層の比誘電率:15
絶縁体層の厚み:3μm
Ag導電率:6.289×107(S/m)
コイル導体及び引き出し導体の厚み:5μm
コイル導体の幅:30μm
ビアホール導体の上下方向の長さ:3μm
積層体の外層厚みの合計:25μm
なお、積層体の外層厚みとは、絶縁体層16a~16c(あるいは絶縁体層16g~16j)のトータルの厚みである。
Size of electronic component: length in the front-rear direction × width in the left-right direction = 0.4 mm × 0.2 mm
Laminate size: length in the front-rear direction × width in the left-right direction = 0.37 mm × 0.18 mm
Insulating layer relative permeability: 180
Dielectric constant of insulator layer: 15
Insulator layer thickness: 3 μm
Ag conductivity: 6.289 × 10 7 (S / m)
Coil conductor and lead conductor thickness: 5 μm
Coil conductor width: 30 μm
Via hole conductor length in the vertical direction: 3 μm
Total outer layer thickness of the laminate: 25 μm
The outer layer thickness of the laminate is the total thickness of the insulator layers 16a to 16c (or the insulator layers 16g to 16j).
 以上のように構成された比較例1、比較例2及び実施例1のサンプルにおいて、インダクタンス値、100MHzにおけるインピーダンス値、直流抵抗値、電子部品の上下方向の高さを測定及び計算した。表2は、測定結果及び計算結果を示した表である。なお、比較例1、比較例2および実施例1のサンプルを正確に対比するために、比較例1、比較例2及び実施例1のサンプルのインダクタンス値(インピーダンス値)を揃えている。また、インダクタンス値(インピーダンス値)の値を揃える手段としては、上述の通りコイルのターン数を調節することで行った。 In the samples of Comparative Example 1, Comparative Example 2, and Example 1 configured as described above, the inductance value, the impedance value at 100 MHz, the DC resistance value, and the height in the vertical direction of the electronic component were measured and calculated. Table 2 is a table showing measurement results and calculation results. In order to accurately compare the samples of Comparative Example 1, Comparative Example 2, and Example 1, the inductance values (impedance values) of the samples of Comparative Example 1, Comparative Example 2, and Example 1 are aligned. As a means for aligning the inductance value (impedance value), the number of turns of the coil was adjusted as described above.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
 比較例1のサンプルでは、直流抵抗値が0.364Ωと比較的に大きな値となった。これに対して、コイル導体118a~118dが2つずつビアホール導体により並列接続された構造を有する比較例2のサンプルでは、直流抵抗値が0.248Ωと減少した。しかしながら、比較例2のサンプルでは比較例1のサンプルに比べてコイル導体118a~118dが多く積層されているため、比較例2のサンプルの高さ(274μm)は比較例1のサンプルの高さ(130μm)よりも高くなった。 In the sample of Comparative Example 1, the DC resistance value was a relatively large value of 0.364Ω. In contrast, in the sample of Comparative Example 2 having a structure in which the coil conductors 118a to 118d are connected in parallel by two via-hole conductors, the DC resistance value decreased to 0.248Ω. However, since the coil conductors 118a to 118d are more laminated in the sample of the comparative example 2 than the sample of the comparative example 1, the height of the sample of the comparative example 2 (274 μm) is the height of the sample of the comparative example 1 (274 μm). 130 μm).
 一方、実施例1のサンプルの直流抵抗値(0.261Ω)は、比較例1のサンプルの直流抵抗値(0.364Ω)よりも大幅に小さく、また、比較例2のサンプルの直流抵抗値(0.248Ω)に比較的に近い。更に、実施例1のサンプルの高さ(130μm)は、比較例2のサンプルの高さ(274μm)よりも低く、比較例1のサンプルの高さ(130μm)と等しい。以上より、実施例1のサンプルでは、直流抵抗値の低減を図りつつ、低背化を図ることができる。 On the other hand, the DC resistance value (0.261Ω) of the sample of Example 1 is significantly smaller than the DC resistance value (0.364Ω) of the sample of Comparative Example 1, and the DC resistance value of the sample of Comparative Example 2 ( Is relatively close to 0.248Ω). Further, the height of the sample of Example 1 (130 μm) is lower than the height of the sample of Comparative Example 2 (274 μm), and is equal to the height of the sample of Comparative Example 1 (130 μm). As described above, in the sample of Example 1, it is possible to reduce the height while reducing the DC resistance value.
(変形例)
 以下に、変形例に係る電子部品10bについて図面を参照しながら説明する。図5は、変形例に係る電子部品10bの外観斜視図である。図6は、変形例に係る電子部品10bの積層体12の分解斜視図である。
(Modification)
Below, the electronic component 10b which concerns on a modification is demonstrated, referring drawings. FIG. 5 is an external perspective view of an electronic component 10b according to a modification. FIG. 6 is an exploded perspective view of the multilayer body 12 of the electronic component 10b according to the modification.
 電子部品10bは、外部電極14a,14bが設けられている位置が異なる点、及び、引き出し導体22a,22bの代わりにビアホール導体v21~v27が設けられている点において電子部品10aと相違する。以下に、電子部品10bについてかかる相違点を中心に説明する。 The electronic component 10b differs from the electronic component 10a in that the positions where the external electrodes 14a and 14b are provided are different and that via-hole conductors v21 to v27 are provided instead of the lead conductors 22a and 22b. Hereinafter, the electronic component 10b will be described focusing on the differences.
 より詳細には、外部電極14aは、積層体12の上面に設けられていると共に、上面に隣接する4つの面に折り返されている。また、外部電極14bは、積層体12の底面に設けられていると共に、底面に隣接する4つの面に折り返されている。 More specifically, the external electrode 14a is provided on the upper surface of the multilayer body 12, and is folded back to four surfaces adjacent to the upper surface. The external electrode 14b is provided on the bottom surface of the multilayer body 12, and is folded back to four surfaces adjacent to the bottom surface.
 また、ビアホール導体v21~v23は、絶縁体層16a~16cを上下方向に貫通しており、互いに接続されることにより1本のビアホール導体を構成している。ビアホール導体v21の上端は、外部電極14aに接続されている。ビアホール導体v23の下端は、コイル導体18aの上流端に接続されている。 The via-hole conductors v21 to v23 penetrate the insulator layers 16a to 16c in the vertical direction and are connected to each other to constitute one via-hole conductor. The upper end of the via-hole conductor v21 is connected to the external electrode 14a. The lower end of the via-hole conductor v23 is connected to the upstream end of the coil conductor 18a.
 また、ビアホール導体v24~v27は、絶縁体層16g~16jを上下方向に貫通しており、互いに接続されることにより1本のビアホール導体を構成している。ビアホール導体v24の上端は、コイル導体18dの下流端に接続されている。ビアホール導体v27の下端は、外部電極14bに接続されている。 Further, the via-hole conductors v24 to v27 pass through the insulating layers 16g to 16j in the vertical direction and are connected to each other to constitute one via-hole conductor. The upper end of the via-hole conductor v24 is connected to the downstream end of the coil conductor 18d. The lower end of the via-hole conductor v27 is connected to the external electrode 14b.
 以上のように構成された電子部品10bは、右側又は左側の側面が回路基板に対向するように、回路基板上に実装される。 The electronic component 10b configured as described above is mounted on the circuit board such that the right or left side surface faces the circuit board.
 本実施形態に係る電子部品10bによれば、電子部品10aと同様に、電子部品10bの上下方向の高さを低減できる。 According to the electronic component 10b according to the present embodiment, the height in the vertical direction of the electronic component 10b can be reduced in the same manner as the electronic component 10a.
 更に、電子部品10bによれば、電子部品10aと同様に、コイルLの直流抵抗の低減を図ることができる。 Furthermore, according to the electronic component 10b, the direct current resistance of the coil L can be reduced as in the electronic component 10a.
 また、電子部品10bによれば、電子部品10aと同様に、コイル導体18aと並列導体20aとの間においてショートが発生することが抑制される。 Moreover, according to the electronic component 10b, the occurrence of a short circuit between the coil conductor 18a and the parallel conductor 20a is suppressed, as with the electronic component 10a.
(その他の実施形態)
 本発明に係る電子部品は、前記電子部品10a,10bに限らずその要旨の範囲内において変更可能である。
(Other embodiments)
The electronic component according to the present invention is not limited to the electronic components 10a and 10b, and can be changed within the scope of the gist thereof.
 電子部品10a,10bにおいて、並列導体20a~20cはそれぞれ、コイル導体18a~18cに対して接続されていなくてもよい。この場合、各絶縁体層16d~16fを貫通するビアホール導体を形成することで、コイル導体と並列導体とが並列接続される。 In the electronic components 10a and 10b, the parallel conductors 20a to 20c may not be connected to the coil conductors 18a to 18c, respectively. In this case, the coil conductor and the parallel conductor are connected in parallel by forming a via-hole conductor that penetrates through each of the insulator layers 16d to 16f.
 また、電子部品10a,10bにおいて、コイル導体18a~18cは、1/2周分の長さ以外の長さを有していてもよい。すなわち、コイル導体18a~18cは1/2周分の長さよりも長くてもよいし、短くてもよい。 Further, in the electronic components 10a and 10b, the coil conductors 18a to 18c may have a length other than the length corresponding to ½ circumference. That is, the coil conductors 18a to 18c may be longer or shorter than a length corresponding to ½ circumference.
 なお、軌道Rは、長方形状をなしているとしている。この長方形状とは、角が存在する長方形や、角が丸く面取りされた角丸長方形も含む。また、各丸長方形には、2本の長辺の端部同士が半円により接続されたトラック形状も含まれる。この場合、半円が短辺に相当する。 Note that the trajectory R has a rectangular shape. The rectangular shape includes a rectangle with corners and a rounded rectangle with rounded and chamfered corners. Each round rectangle also includes a track shape in which the ends of two long sides are connected by a semicircle. In this case, the semicircle corresponds to the short side.
 以上のように、本発明は、電子部品に有用であり、特に、直流抵抗の低減を図りつつ、積層方向の高さを低減できる点において優れている。 As described above, the present invention is useful for electronic components, and is particularly excellent in that the height in the stacking direction can be reduced while reducing direct current resistance.
 L コイル
 R 軌道
 v1~v3,v11~v13,v21~v27 ビアホール導体
 10a,10b 電子部品
 12 積層体
 16a~16j 絶縁体層
 18a~18d コイル導体
 20a~20c 並列導体
L coil R orbit v1 to v3, v11 to v13, v21 to v27 Via- hole conductor 10a, 10b Electronic component 12 Laminated body 16a to 16j Insulator layer 18a to 18d Coil conductor 20a to 20c Parallel conductor

Claims (4)

  1.  複数の絶縁体層が積層されてなる積層体と、
     前記絶縁体層に設けられ、かつ、積層方向から平面視したときに互いに重なり合って長方形状の環状の軌道を形成している複数のコイル導体、及び、該複数のコイル導体を接続し、かつ、前記絶縁体層を積層方向に貫通する第1のビアホール導体を含む螺旋状のコイルと、
     前記コイル導体が設けられている前記絶縁体層に設けられている並列導体であって、前記環状の軌道の長辺に重なっており、かつ、該環状の軌道の短辺に重なっていない並列導体と、
     前記コイル導体に対して、該コイル導体が設けられている前記絶縁体層とは異なる前記絶縁体層に設けられている前記並列導体を並列接続させ、かつ、前記絶縁体層を積層方向に貫通する第2のビアホール導体と、
     を備えていること、
     を特徴とする電子部品。
    A laminate formed by laminating a plurality of insulator layers;
    A plurality of coil conductors that are provided in the insulator layer and overlap each other to form a rectangular ring-shaped track when viewed in plan from the stacking direction; and the plurality of coil conductors are connected; and A spiral coil including a first via-hole conductor penetrating the insulator layer in the stacking direction;
    A parallel conductor provided in the insulator layer provided with the coil conductor, wherein the parallel conductor overlaps a long side of the annular track and does not overlap a short side of the annular track When,
    The parallel conductor provided in the insulator layer different from the insulator layer provided with the coil conductor is connected in parallel to the coil conductor and penetrates the insulator layer in the stacking direction. A second via-hole conductor that
    Having
    Electronic parts characterized by
  2.  前記複数の絶縁体層は、前記環状の軌道の2本の長辺に平行な2本の長辺、及び、該環状の軌道の2本の短辺に平行な2本の短辺を有する長方形状をなしており、
     前記電子部品は、
     前記複数の絶縁体層の短辺が連なって形成されている前記積層体の2つの端面のそれぞれに設けられている第1の外部電極及び第2の外部電極であって、前記コイルに電気的に接続される第1の外部電極及び第2の外部電極を、
     更に備えていること、
     を特徴とする請求項1に記載の電子部品。
    The plurality of insulator layers are rectangular having two long sides parallel to two long sides of the annular track and two short sides parallel to two short sides of the ring track. In the shape of
    The electronic component is
    A first external electrode and a second external electrode provided on each of two end faces of the multilayer body formed by connecting short sides of the plurality of insulator layers, and electrically connected to the coil A first external electrode and a second external electrode connected to
    More
    The electronic component according to claim 1.
  3.  前記コイルは、所定方向に周回しながら積層方向の一方側に向かって進行する螺旋状をなしており、
     前記並列導体は、該並列導体に対して積層方向の一方側に設けられている前記コイル導体に並列接続されており、
     前記並列導体が設けられている前記絶縁体層に設けられている前記コイル導体は、積層方向から平面視したときに、前記環状の軌道において該並列導体が重なっていない長辺に重なっていると共に、該環状の軌道において該並列導体が重なっていない長辺に対して所定方向の上流側の短辺には重なっていないこと、
     を特徴とする請求項1又は請求項2のいずれかに記載の電子部品。
    The coil has a spiral shape that advances toward one side in the stacking direction while rotating in a predetermined direction,
    The parallel conductor is connected in parallel to the coil conductor provided on one side in the stacking direction with respect to the parallel conductor,
    The coil conductor provided in the insulator layer provided with the parallel conductor overlaps with a long side where the parallel conductor does not overlap in the annular track when viewed in plan from the stacking direction. The upstream side in a predetermined direction does not overlap the long side where the parallel conductor does not overlap in the annular track,
    The electronic component according to claim 1, wherein:
  4.  同一の前記絶縁体層に設けられている前記コイル導体と前記並列導体とは接続されており、
     前記並列導体は、前記第1のビアホール導体及び前記第2のビアホール導体を介して、該並列導体が設けられている前記絶縁体層とは異なる前記絶縁体層に設けられている前記コイル導体に並列接続されていること、
     を特徴とする請求項1ないし請求項3のいずれかに記載の電子部品。
    The coil conductor and the parallel conductor provided in the same insulator layer are connected,
    The parallel conductor is connected to the coil conductor provided in the insulator layer different from the insulator layer in which the parallel conductor is provided via the first via hole conductor and the second via hole conductor. Connected in parallel,
    The electronic component according to any one of claims 1 to 3, wherein:
PCT/JP2014/062098 2013-05-08 2014-05-01 Electronic component WO2014181756A1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107527708A (en) * 2016-06-16 2017-12-29 株式会社村田制作所 Electronic unit
CN114999768A (en) * 2021-03-01 2022-09-02 Tdk株式会社 Laminated coil component

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010245134A (en) * 2009-04-02 2010-10-28 Murata Mfg Co Ltd Electronic component and method of manufacturing same
JP2013162101A (en) * 2012-02-08 2013-08-19 Taiyo Yuden Co Ltd Laminate inductor

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010245134A (en) * 2009-04-02 2010-10-28 Murata Mfg Co Ltd Electronic component and method of manufacturing same
JP2013162101A (en) * 2012-02-08 2013-08-19 Taiyo Yuden Co Ltd Laminate inductor

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107527708A (en) * 2016-06-16 2017-12-29 株式会社村田制作所 Electronic unit
CN107527708B (en) * 2016-06-16 2019-12-27 株式会社村田制作所 Electronic component
CN114999768A (en) * 2021-03-01 2022-09-02 Tdk株式会社 Laminated coil component

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