WO2014131311A1

WO2014131311A1 - Current source generator

Info

Publication number: WO2014131311A1
Application number: PCT/CN2013/090719
Authority: WO
Inventors: 易律凡; 谢豪律
Original assignee: 中兴通讯股份有限公司
Priority date: 2013-02-27
Filing date: 2013-12-27
Publication date: 2014-09-04
Also published as: CN104007777B; CN104007777A

Abstract

A current source generator comprises: a bandgap source core module (201) configured for generating a stable reference voltage; a separating module 1 (202), connected to the bandgap source core module (201) and configured for performing noise separation on the stable reference voltage; a filter (203), connected to the separating module 1 (202) and configured for filtering the stable reference voltage on which the noise separation has been performed; a reference current generator (204), connected to the filter (203) and configured for generating a reference current; a separating module 2 (205) connected to the bandgap source core module (201) and configured for performing noise separation on the stable reference voltage; and a PTAT current generator (206) connected to the separating module 2 (205) and configured for generating a current with a positive temperature coefficient.

Description

Current source generator

Technical field

The present invention relates to the field of microelectronics, and more particularly to a current source generator including a reference source.

Background technique

In the field of electronic equipment, especially mobile phone RF communication integrated circuit design, it is necessary to generate low power consumption, high PSRR (Power Supply Rejection Ratio), low noise, ultra low temperature coefficient through bandgap. Adjustable precision voltage and current, as well as accurate current with positive temperature coefficient, such as low current as low as luA, 5uA. It is more important for a SOC (System on Chip) chip, requires low cost, is digitally adjustable, requires high PSRR, low output impedance, low power consumption, and small area, suitable for integration.

Figure 1 is a schematic diagram of the structure of a typical bandgap source. Using the ratio of the devices of D1 and D2, and using the op amp to equalize Va and Vb, and then modulating the resistance values of the appropriate R1, R2, and R3 to obtain the reference voltage. Vref, completes the design of the current generator. However, this structure can only produce an accurate reference voltage, and its power consumption and PSRR performance are generally not achieved, and a low power, high PSRR, low noise reference source is not achieved.

For modern highly integrated SOC chips, the inversion of the digital signal will bring an inherent noise source, which has a great influence on the key analog circuits. The crosstalk of the power supply reduces the accuracy of the AC (accumulation register) of the bandgap source. It is important to design a current generator with a high PSRR over a wide spectral range.

The PSRR is usually relatively large at low frequencies, weak at intermediate frequencies, and large at high frequencies. At the same time, the reference source needs to output a low impedance, so that in a wide frequency range, when the noise source is connected in parallel, the fluctuation effect on the output can be effectively reduced.

The ripple factors of the bandgap source are: power supply fluctuations, output fluctuations, process fluctuations, device mismatch, package effects, temperature fluctuations, as shown in Table 1:

Table 1 Summary of various sources of error in band gap sources Error Source DC AC Randomness Systemic Impact Process Fluctuation 疋 No 很大 No Large Package Changes 疋疋 No

Power fluctuations 疋疋 No 疋 Very large load fluctuations 疋疋 No 疋 Large

Temperature fluctuation 疋 No No 疋 Small

To reduce temperature range fluctuations, many high-level temperature compensation techniques have been developed, such as quadrature temperature compensation, exponential temperature compensation, piecewise linear compensation, and temperature-dependent resistance ratio compensation. The basic idea is to implement a mathematical function to cancel the high-order temperature coefficient of the PN junction. However, these methods require accurate current mirror matching, which would otherwise introduce an error voltage at the reference voltage output. Therefore, the precise reference sources that combine high performances are limited by process and layout. Summary of the invention

The embodiment of the invention provides a current source generator for solving the problems of low power consumption, high PSRR and low noise of the current source generator in the related art, and provides a current source and a small temperature change. A current source that rises with increasing temperature (PTAT).

An embodiment of the present invention provides a current source generator, including:

a bandgap source core module configured to generate a stable reference voltage;

The isolation module is connected to the band gap source core module, and is configured to perform noise isolation on the stable reference voltage;

a filter, connected to the isolation module, configured to filter the stable reference voltage after the noise is isolated;

a reference current generator, coupled to the filter, configured to generate a reference current; and an isolation module 2 coupled to the bandgap source core module, configured to perform noise isolation on the stable reference voltage; A positive temperature coefficient PTAT current generator is coupled to the isolation module 2 and is configured to generate a current having a positive temperature coefficient.

Optionally, the bandgap source core module comprises: a pre-low dropout regulator Pre-LDO circuit, metal oxide semiconductor field effect transistors MP1, MP2, MP3, MP4, MN1 and MN2, and transistors PNP1, PNP2 and PNP3 Wherein, the gates of MP1 are respectively connected to the gates of MP2, MP3, and MP4; the sources of MP1, MP2, MP3, and MP4 are all connected to the Pre-LDO circuit; the gate of MP2 is connected to its drain; the gate of MN1 Connected to the gate of MN2, the gate of MN1 is connected to its drain; the source stages of MP1, MP2, MP3 and MP4 are connected in sequence; the drain of MP1 is connected to the drain of MN1; the drain of MP2 is connected to the drain of MN2 The source of MN1 is connected to the emitter of PNP1 through resistor R1, the source of MN2 is connected to the emitter of PNP2, the base of PNP1 is connected to the base of PNP2, and the emitter of PNP2 is connected to the drain of MP3 through resistor R2. The emitter of PNP3 is connected to the drain of MP4 through resistor R3, and the base of PNP3 is connected to its collector; the collectors of PNP1, PNP2 and PNP3 are connected in turn.

Optionally, the MP1, MP2, MN1, and MN2 tubes form a self-biased mirror current source structure; adjusting the aspect ratio of MP1, MP2, MP3, and MP4 such that the currents in MP1, MP2, MP3, and MP4 are 1:1: 4:1 ; MN1 and MN2 form an N-type current mirror whose drain is made equal by an operational amplifier.

Optionally, the Pre-LDO circuit includes: an error amplifier, a metal oxide semiconductor field effect transistor PM6 and an NM7; wherein the two input terminals of the error amplifier are respectively connected to the drains of the MP1 and the MP2, and the output ends are respectively connected to the PM6. The drain is connected to the gate of NM7; the drain of PM6 is connected to the drain of NM7; the source of NM7 is grounded.

Optionally, the error amplifier comprises: metal oxide semiconductor field effect transistors PM1, PM2, PM3, PM4, MN1, MN2 and MN3; wherein the gate of PM1 is connected to the gate of PM2, the source of PM1 The pole is connected to the source of PM2, the drain of PM1 is connected to the drain of NM1, the gate of PM1 is connected to its drain, the drain of PM2 is connected to the source of PM3, PM4, the drain of PM3 and the drain of NM2. The drain of PM4 is connected to the drain of NM3, the drain of NM3 is connected to its gate, the gates of NM1, NM2 and NM3 are connected in turn, the sources of NM1, NM2 and NM3 are connected in sequence, and the gate of PM3 is The gate of PM4 is the two inputs A, B of the error amplifier EA, and the source of PM4 is the output V_out of the error amplifier EA.

Optionally, the isolation module 1 includes: an operational amplifier, where the negative terminal of the operational amplifier Connected to the output;

The isolation module 1 and the isolation module 2 have the same structure.

Optionally, the filtering module comprises: a MOS capacitor and a resistor connected to each other.

Optionally, wherein the resistance of the resistor in the filter module is greater than 50 kQ and less than 200 kQ; the capacitance of the MOS capacitor is greater than O.lnf and less than lnf.

Optionally, the current source generator further includes:

A self-calibrating resistor module, connected between the filter and the reference current generator, is configured to provide a resistance value that achieves a set accuracy.

Optionally, the self-calibrating resistor module comprises: a resistance corrector and a resistor string controller, and a resistor comparator; wherein the resistor comparator compares the accurate reference voltage with the to-be-compared voltage, and the comparison result is fed back to the resistor corrector Correction, the resistor value is adjusted by the resistor string controller to generate the standby voltage in the opposite direction; when the accurate reference voltage and the standby voltage are within the set range of the resistor comparator, the calibrated voltage is obtained.

The beneficial effects of the embodiments of the present invention are as follows:

The embodiment of the present invention overcomes the defect of high power supply voltage through the band gap source core module including Pre-LDO, realizes the purpose of low power supply and low power consumption; and realizes low power consumption and low noise by using the isolation module and the filter module. And the purpose of high PSRR. BRIEF abstract

Figure 1 is a schematic structural view of a related band gap source;

2 is a schematic structural diagram of a current source generator according to an embodiment of the present invention;

3 is a circuit schematic diagram of a bandgap source core module and a PTAT current generator in an embodiment of the present invention;

4 is a circuit schematic diagram of a Pre-LDO circuit in an embodiment of the present invention;

5 is a circuit schematic diagram of an error amplifier in an embodiment of the present invention;

6 is a circuit schematic diagram of an isolation module in an embodiment of the present invention;

7 is a circuit schematic diagram of a filtering module according to an embodiment of the present invention; FIG. 8 is a schematic structural diagram of another current source generator according to an embodiment of the present invention; FIG. 9 is a schematic diagram of a resistor calibration algorithm according to an embodiment of the present invention. Preferred embodiment of the invention

The embodiments of the present invention are described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict.

Embodiments of the present invention provide a current source generator that is low power, low power, and accurately adjustable based on a pre-dropout regulator structure (Pre-LDO), isolation, and filtering.

For PSRR, it is mainly a cascode self-biasing structure or a Pre-LDO pre-adjustment structure of input voltage, which is a compromise between low voltage and low power consumption;

For low noise, consider the choice of devices such as Metal Oxid Semiconductor (MOS) field effect transistors, the use of isolation structures, and even some special considerations, such as the introduction of filter structures;

For fine-tuned current generators, this is achieved by combining modern digital microelectronics and state machine control techniques.

Based on the above various high performance indicators, the embodiments of the present invention provide a current source generator capable of simultaneously implementing multiple high performance indicators.

As shown in FIG. 2, an embodiment of the present invention relates to a current source generator, including:

a bandgap source core module 201 for generating a stable reference voltage;

An isolation module 202 is connected to the band gap source core module for performing noise isolation on the stable reference voltage;

a filter 203, connected to the isolation module, configured to filter the stable reference voltage after the noise is isolated;

a reference current generator 204, connected to the filter, for generating a reference current; an isolation module 205, connected to the bandgap source core module, for performing noise isolation on the stable reference voltage; A PTAT current generator 206 is coupled to the isolation module 2 for generating a positive temperature coefficient current.

As shown in FIG. 3, the bandgap source core module includes: a Pre-LDO circuit, metal oxide semiconductor field effect transistors MP1, MP2, MP3, MP4, MN1, and MN2, and transistors PNP1, PNP2, and PNP3; wherein, the gate of MP1 The poles are connected to the gates of MP2, MP3, and MP4 respectively; the sources of MP1, MP2, MP3, and MP4 are connected to the Pre-LDO circuit; the gate of MP2 is connected to its drain; the gate of MN1 is connected to the gate of MN2. The gate of MN1 is connected to its drain; the source stages of MP1, MP2, MP3 and MP4 are connected together; the drain of MP1 is connected to the drain of MN1; the drain of MP2 is connected to the drain of MN2; the source of MN1 Connected to the emitter of PNP1 through resistor R1, the source of MN2 is connected to the emitter of PNP2, the base of PNP1 is connected to the base of PNP2; the emitter of PNP2 is connected to the drain of MP3 through resistor R2; the emitter of PNP3 The base of PNP3 is connected to its collector through a resistor R3 connected to the drain of MP4; the collectors of PNP1, PNP2 and PNP3 are connected together.

PNP1 and PNP2, PNP3 are lateral PNP tubes. The MP1, MP2, MN1, and MN2 transistors form a self-biased mirror current source structure to increase the output resistance and reduce the current mismatch caused by the channel modulation effect, thereby reducing the error between the mirror currents. By adjusting the width to length ratio of MP1 ~ MP4, the current relationship between the branches MP1, MP2, MP3 and MP4 in Figure 3 satisfies 1:1:4:1.

MN1 and MN2 form an N-type current mirror, whose drains are made equal by the operational amplifier, and the MN1, MN2 group component voltage circuits are composed of a combination of MP2 and MP3, and consist of a negative temperature coefficient portion (CTAT) and a positive temperature coefficient portion (PTAT). The stable reference voltage V _{ref is} stabilized. MP1 and MP2, MP3, MP4 tubes are P-type current mirror tubes, MN1 and MN2 also constitute current mirrors, which are N-type current common-gate structures, and Rl, R2 and PNP1 and PNP2 are triodes that generate PTAT parts. PNP3 and R3 are mirror images and output PTAT current.

Assuming the supply voltage is V _dd , the output is V. , V. The internal resistance of V _dd is r _ds , V. The output impedance to ground is Z. The internal resistance of the feedback loop is Z. _ _ref . then

p^ U - ^ ^re f I - ( ^Z ll ^Z 0- re/

Z _Mef is effective when the loop gain is high, affecting the PSRR from low frequency to intermediate frequency; Z. Increase in the loop Effective at low margins, affecting PSRR from mid to high frequencies. The addition of the Pre-LDO circuit enhances Z _0-ref and improves the PSRR from low frequency to intermediate frequency. In addition, according to the power supply voltage division, the principle of PSRR can be improved. After the Pre-LDO circuit is added, the PSRR is greatly improved, and the noise is also improved.

4 is a circuit schematic diagram of a Pre-LDO circuit. The Pre-LDO circuit includes an error amplifier EA, metal oxide semiconductor field effect transistors PM6 and NM7, and two input terminals of the error amplifier EA are respectively connected to drains of MP1 and MP2. The output is connected to the drain of PM6 and the gate of NM7 respectively; the drain of PM6 is connected to the drain of NM7; the source of NM7 is grounded.

The output of the error amplifier EA is connected to the source follower. The drain of NM7 is fed back to the drain of PM6, and this drain is directly output as the output Vafterldo of the Pre-LDO circuit.

The structure of the error amplifier EA is as shown in FIG. 5. The error amplifier EA includes: metal oxide semiconductor field effect transistors PM1, PM2, PM3, PM4, NM1, NM2, and NM3; wherein the gate of PM1 is connected to the gate of PM2, The source of PM1 is connected to the source of PM2, the drain of PM1 is connected to the drain of NM1, the gate of PM1 is connected to its drain, the drain of PM2 is connected to the source of PM3 and PM4, and the drain of PM3 is The drain of NM2 is connected; the drain of PM4 is connected to the drain of NM3, the drain of NM3 is connected to its gate, the gates of NM1, NM2 and NM3 are connected together, and the sources of NM1, NM2 and NM3 are connected together, PM3 and PM4 gate of the gate of the source of the error amplifier EA two input terminals a, B, PM4 extremely output of the error amplifier EA V- _out.

The error amplifier EA is based on the PMOS tube's op amp structure and the NMOS is anti-symmetric. The advantage of this design is that the noise is further reduced.

6 is a circuit schematic diagram of the isolation module. The isolation module 1 and the isolation module 2 in FIG. 2 have the same structure. Hereinafter, the isolation module 1 is described. The isolation module 1 includes: an operational amplifier, wherein the negative terminal of the operational amplifier is connected to the output terminal. Through the negative terminal of the operational amplifier and the output connected, the obtained analog buffer (buffer) is isolated, and the effective impedance is applied to the input voltage. The cascode structure is used to isolate the noise. The selected MOS transistor is long channel and large W. The /L device is used to achieve small output headroom and large output resistance. Such an isolation module is very beneficial for improving the noise performance.

7 is a circuit schematic diagram of a filter module, the filter module includes MOS capacitors and resistors connected to each other, wherein the resistance of the resistor is greater than 50 kQ and less than 200 kQ; the capacitance of the MOS capacitor is greater than 0.1nf, and less than lnf. The filter module is realized by a large resistance and a large MOS capacitor that can be realized on the integrated circuit, and improves the PSRR of the intermediate frequency to the high frequency; thus, the capacitor for avoiding the external connection of the integrated circuit chip is realized, and the bill of material (Bill of Material, BOM) is reduced. .

In addition, the current source generator of the embodiment of the invention further includes:

A self-calibrating resistor module, connected between the filter and the reference current generator, to provide accurate resistance values.

The structure of the self-calibrating resistor module is shown in Figure 8. The self-calibrating resistor module includes: a resistor corrector 801 and a resistor string controller 802, a resistor comparator 803, and FIG. 9 is a schematic diagram of a resistor calibration algorithm. The resistor comparator compares the accurate reference voltage with the voltage to be compared to produce a positive or negative deviation. The result of the comparison is fed back to the resistance corrector (RCAL) for correction, and the switching network is changed by the resistor string controller (eg, after multiple resistors are connected in parallel) The resistance value is used as the final output resistance. Each resistor is connected to a switch. By controlling the closing of the switch, the resistance of the output resistor is adjusted. The resistance value is adjusted to generate the opposite voltage in the opposite direction. When the accurate reference voltage is used, When the specific voltage is within the set range of the resistor comparator, the digital algorithm engine is fixed to obtain the calibrated voltage. That is: the logic is controlled by a digital algorithm engine that drives successive approximations until the correction of the fluctuations is achieved. In Fig. 8, BG_top represents the current source generator of Fig. 2, that is, Fig. 8 is an extension of the current source generator of Fig. 2.

A current calibration module is also included in FIG. 8. The current calibration module includes: a current corrector and a current controller, a current-to-voltage converter, and a current comparator, wherein the current controller switches from the Iptati mirrored in FIG. Configuring different combinations of currents mirrored to 1/2* I _ptatl , l/4* I _ptatl , l/8* I _ptatl , and finally different currents such as from 5/8* ^ to ll/8* I _ptatl can be formed; The Calibrator (ICAL) is a digital hardware-implemented module that selects the different configurations of the current controller based on the output of the comparator; the current comparator generates the PTAT voltage and the corrected V _xul (via external precision resistor access) To compare, the results of the comparison are fed back to the current corrector for correction until the ripple is corrected.

It should be noted that both the resistor comparator and the current comparator are comparative voltages. The reason for this is to make it easier to understand whether the function is to correct the resistor or current.

Before the resistance is corrected, the current is corrected, so that the voltage and current generated by the resistance, capacitance, MOS tube, and PNP tube fluctuations are corrected in the line after the current source generator is powered up.

As can be seen from the above embodiment, by applying a power supply voltage to a Pre-LDO or an operational amplifier, The output voltage of the op amp provides a bias voltage for the entire core circuit. The bias voltage of the entire core circuit is independent of the supply voltage, making the entire bandgap reference circuit have a very high power supply rejection ratio. The simulation results based on SPECTRE show that the power supply rejection ratio is up to 120 dB, the temperature coefficient is 18 ppm/°C in the temperature range of -40°C to 125 °C, and the power consumption is only 400uA, which can be widely used in analog/digital. In integrated circuit modules such as converters, digital-to-analog converters, and bias circuits. Through the isolation module one and the isolation module two, the loop gain is increased, the power supply rejection ratio PSRR can be effectively improved, and the noise performance can be improved; wherein the capacitor can filter some noise; the capacitor can be added in the main path of the power supply noise conversion to the output. In addition to noise.

The current source generator of the embodiment of the invention has the advantages of high PSRR, ultra-low temperature coefficient, extremely low noise performance, positive temperature coefficient, low noise, etc., and can provide accurate current for many occasions.

One of ordinary skill in the art will appreciate that all or a portion of the above steps may be accomplished by a program instructing the associated hardware, such as a read-only memory, a magnetic disk, or an optical disk. Alternatively, all or part of the steps of the above embodiments may also be implemented using one or more integrated circuits. Correspondingly, each module/unit in the above embodiment may be implemented in the form of hardware or in the form of a software function module. The invention is not limited to any specific form of combination of hardware and software.

The above description is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention. In view of the present invention, various other modifications, equivalents, improvements, etc., should be made without departing from the spirit and scope of the invention. It is included in the scope of protection of the present invention.

Industrial applicability

The embodiment of the present invention overcomes the defect of high power supply voltage through the band gap source core module including Pre-LDO, realizes the purpose of low power supply and low power consumption; and realizes low power consumption and low noise by using the isolation module and the filter module. And the purpose of high PSRR.

Claims

Claim

1. A current source generator comprising:

a bandgap source core module configured to generate a stable reference voltage;

a reference current generator, coupled to the filter, configured to generate a reference current; and an isolation module 2 coupled to the bandgap source core module, configured to perform noise isolation on the stable reference voltage;

A positive temperature coefficient PTAT current generator, coupled to the isolation module two, is configured to generate a positive temperature coefficient of current.

2. The current source generator of claim 1, wherein the bandgap source core module comprises: a pre-dropout regulator Pre-LDO circuit, a metal oxide semiconductor field effect transistor MP1, MP2, MP3, MP4 , MN1 and MN2, and triodes PNP1, PNP2 and PNP3;

Wherein, the gates of the MP1 are respectively connected to the gates of the MP2, the MP3, and the MP4;

The sources of MP1, MP2, MP3 and MP4 are connected to the Pre-LDO circuit;

The gate of MP2 is connected to its drain;

The gate of MN1 is connected to the gate of MN2, and the gate of MN1 is connected to its drain;

The source levels of MP1, MP2, MP3, and MP4 are sequentially connected;

The drain of MP1 is connected to the drain of MN1;

The drain of MP2 is connected to the drain of MN2;

The source of MN1 is connected to the emitter of PNP1 through resistor R1, the source of MN2 is connected to the emitter of PNP2, and the base of PNP1 is connected to the base of PNP2;

The emitter of PNP2 is connected to the drain of MP3 through a resistor R2;

The emitter of PNP3 is connected to the drain of MP4 through resistor R3, and the base of PNP3 is connected to it. Pole connection;

The collectors of PNP1, PNP2 and PNP3 are sequentially connected.

3. The current source generator according to claim 2, wherein

The MP1, MP2, MN1 and MN2 tubes form a self-biased mirror current source structure;

Adjust the aspect ratio of MP1, MP2, MP3, and MP4 so that the currents in MP1, MP2, MP3, and MP4 are 1:1:4:1;

MN1 and MN2 form an N-type current mirror whose drain is made equal by an op amp.

4. The current source generator according to claim 2 or 3, wherein

The Pre-LDO circuit includes: an error amplifier, a metal oxide semiconductor field effect transistor PM6 and an NM7;

Wherein, the two input terminals of the error amplifier are respectively connected to the drains of MP1 and MP2, and the output terminals are respectively connected to the drain of PM6 and the gate of NM7;

The drain of PM6 is connected to the drain of NM7;

The source of the NM7 is grounded.

5. The current source generator according to claim 4, wherein the error amplifier comprises: metal oxide semiconductor field effect transistors PM1, PM2, PM3, PM4, NM1, NM2, and NM3; wherein, a gate of PM1 The gate of PM2 is connected, the source of PM1 is connected to the source of PM2, the drain of PM1 is connected to the drain of NM1, the gate of PM1 is connected to its drain, and the drain of PM2 is connected to the source of PM3 and PM4. , the drain of PM3 is connected to the drain of NM2;

The drain of PM4 is connected to the drain of NM3, the drain of NM3 is connected to its gate, the gates of NM1, NM2 and NM3 are connected in sequence, the sources of NM1, NM2 and NM3 are connected in sequence, the gate of PM3 and the gate of PM4 The source of the two input terminals A, B, and PM4 of the extreme error amplifier EA is the output of the error amplifier EA V out°

6. The current source generator according to claim 1, 2, 3 or 5, wherein the isolation module 1 comprises: an operational amplifier, wherein a negative terminal of the operational amplifier is connected to the output terminal;

The isolation module 1 and the isolation module 2 have the same structure.

7. The current source generator of claim 6, wherein the filtering module comprises: Connected MOS capacitors and resistors.

8. The current source generator according to claim 7, wherein the resistance of the resistor in the filter module is greater than 50 kQ and less than 200 kQ; the capacitance of the MOS capacitor is greater than O.lnf and less than lnf.

The current source generator of claim 1, 2, 3, 5, 7 or 8, wherein the current source generator further comprises:

10. The current source generator of claim 9, wherein the self-calibrating resistor module comprises: a resistor corrector and a resistor string controller, a resistor comparator;

Wherein, the resistance comparator compares the accurate reference voltage with the to-be-compared voltage, and the comparison result is fed back to the resistance corrector for correction, and the resistance value is adjusted by the resistor string controller to generate a reverse voltage in a reverse direction;

When the precise reference voltage and the standby voltage are within the set range of the resistor comparator, the calibrated voltage is obtained.