WO2014126438A1 - Semiconductor light-emitting element and production method therefor - Google Patents

Semiconductor light-emitting element and production method therefor Download PDF

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Publication number
WO2014126438A1
WO2014126438A1 PCT/KR2014/001282 KR2014001282W WO2014126438A1 WO 2014126438 A1 WO2014126438 A1 WO 2014126438A1 KR 2014001282 W KR2014001282 W KR 2014001282W WO 2014126438 A1 WO2014126438 A1 WO 2014126438A1
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semiconductor layer
layer
electrode
light emitting
conductive semiconductor
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PCT/KR2014/001282
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French (fr)
Korean (ko)
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하준석
이인우
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전남대학교산학협력단
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/42Transparent materials

Definitions

  • the present invention relates to the field of semiconductor devices, and more particularly, to a semiconductor light emitting device and a method of manufacturing the same.
  • a light emitting device is a semiconductor device in which light emission occurs when electrons and holes recombine at a junction portion of a p-type and n-type semiconductor.
  • the semiconductor light emitting device has a longer life and lower power consumption than conventional light emitting devices such as incandescent lamps.
  • Such a group III nitride semiconductor has the advantage of being able to emit the light of the blue series that has been weak.
  • the group III nitride semiconductor there is a disadvantage that it is grown on a specific substrate such as a sapphire substrate.
  • a specific substrate such as a sapphire substrate.
  • an insulated substrate such as sapphire
  • a vertical light emitting device has been developed and used to arrange the electrode structure on the lower surface side of the light emitting structure and connect the electrode to the semiconductor layer of the light emitting structure through via holes.
  • FIGS. 4 and 5 show a conventional vertical semiconductor light emitting device, which is a sectional view taken along a plan view and a line B-B ', respectively.
  • the conventional vertical semiconductor light emitting device has a light emitting structure in which the n-GaN layer 110, the active layer 130, and the p-GaN layer 120 are stacked from above, and the bottom surface of the light emitting structure (p-GaN layer) as shown.
  • the n-type electrode 210 is disposed on an outer surface of the 120 and includes an electrode structure electrically connected to the n-GaN layer through one or more via holes 310.
  • the second electrode 220 of the electrode structure is stacked on the lower surface of the p-GaN layer 120 is electrically connected to the p-GaN (120) layer.
  • the via hole 310 for connecting the first electrode 210 exposes the n-GaN layer 110 through the second electrode 220, the p-GaN layer 120, and the active layer 130.
  • the n-type electrode 210 is disposed in the via hole 310 to be electrically connected to the n-GaN layer 110.
  • an insulating layer 230 is disposed between the second electrode 22 and the first electrode 21 and on the inner wall surface of the via hole 310 to insulate the first electrode 21 from other elements.
  • the submounting substrate 250 bonded through the bonding layer 240 is disposed below.
  • the n-type electrode 210 and the n-GaN layer 110 are connected through the plurality of via holes 310, a large number of via holes 310 are disposed. Otherwise, as can be seen in FIG. 4, the region with a small current distribution is enlarged. In addition, it is not easy to form the plurality of via holes 310 in the micro process, and the entire light emitting area has to be reduced since the active layer 130 is lost as much as the via holes 310.
  • the present invention provides a semiconductor light emitting device having an improved current spreading effect by forming a current spreading layer on an upper surface of a semiconductor layer as a light emitting device in which an electrode and a semiconductor layer of the light emitting structure are connected through at least one via hole formed in the light emitting structure.
  • the present invention provides a semiconductor light emitting device in which the number of via holes is reduced by increasing the current spreading effect by the current spreading layer.
  • the present invention provides a semiconductor light emitting device in which the amount of light emitted is increased and the series resistance is reduced by reducing the thickness of the semiconductor layer disposed on the light emitting structure.
  • the present invention provides a method of manufacturing the above-described improved semiconductor light emitting device.
  • the present invention provides a semiconductor light emitting device comprising: a light emitting structure comprising a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer sequentially stacked from above; An electrode structure stacked on the lower surface of the second conductive semiconductor layer in the light emitting structure; And a current spreading layer formed on the first conductive semiconductor layer.
  • the electrode structure may include a second electrode stacked on a lower surface of the second conductive semiconductor layer and at least one via hole penetrating through the second electrode, the second conductive semiconductor layer, and the active layer.
  • a first electrode electrically connected to the semiconductor layer, and an insulating film insulating the first electrode from the second electrode, the second conductive semiconductor layer, and the active layer.
  • the second electrode may be a light reflection layer.
  • the second electrode has an exposed portion in which the current spreading layer, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer are partially removed, and an electrode pad is disposed on the exposed portion. .
  • the current spreading layer may be formed of a conductive material, and the current spreading layer may be formed of any one of a transparent conductive oxide (TCO), graphene, gold, tungsten, indium, and nickel.
  • TCO transparent conductive oxide
  • the first conductive semiconductor layer may have a thickness of 0.3 to 0.5 ⁇ m.
  • the semiconductor light emitting device of the present invention comprises: a light emitting structure in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially stacked from above; A p-type electrode disposed on a lower surface of the p-type semiconductor layer in the light emitting structure and electrically connected to the p-type semiconductor layer; An n-type electrode electrically connected to the n-type semiconductor layer through at least one via hole passing through the p-type electrode, the p-type semiconductor layer, and the active layer; And an insulating film insulating the n-type electrode from the p-type electrode, the p-type semiconductor layer, and the active layer.
  • a current spreading layer made of a conductive material is disposed on the n-type semiconductor layer.
  • the p-type electrode has an exposed portion by partially removing the current spreading layer, the n-type semiconductor layer, the active layer, and the p-type semiconductor layer, and an electrode pad is formed on the exposed portion.
  • the n-type semiconductor layer may have a thickness of 0.3 to 0.5 ⁇ m.
  • the present invention provides a method for manufacturing a semiconductor light emitting device, the method comprising: preparing a growth base layer; Forming a light emitting structure by sequentially stacking a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the growth base layer; Forming an electrode structure including a first electrode and a second electrode on the second conductive semiconductor layer; Removing the growth base layer to expose the first conductive semiconductor layer; And forming a current spreading layer on an exposed surface of the first conductive semiconductor layer.
  • the forming of the electrode structure may include: forming a second electrode on the second conductive semiconductor layer; Forming at least one via hole through the second electrode, the second conductive semiconductor layer, and the active layer to expose the first conductive semiconductor layer; Forming an insulating film on an upper surface of the second electrode and an inner wall surface of the at least one via hole; And forming a first electrode electrically connected to the first conductive semiconductor layer through the one or more via holes.
  • the growth base layer is removed to further remove the exposed surface of the first conductive semiconductor layer to a predetermined thickness.
  • the first conductive semiconductor layer may have a thickness of 0.3 ⁇ m to 0.5 ⁇ m.
  • the first conductive semiconductor layer and the second conductive semiconductor layer are n-GaN doped with n-type impurities and p-GaN doped with p-type impurities, respectively.
  • the growth base layer may include sapphire substrate and u-GaN which is not doped with impurities.
  • the manufacturing method of the present invention after forming the exposed portion of the second electrode by partially removing the current spreading layer, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer.
  • the method may further include forming an electrode pad at the site.
  • a light emitting device in which an electrode and a semiconductor layer are connected through a via hole formed in a light emitting structure is provided.
  • the semiconductor light emitting device can reduce the number of via holes by increasing the current spreading effect by the current spreading layer, and also facilitate the manufacturing process. As a result, process stability and reliability are increased.
  • the present invention can provide a high quality light emitting device by reducing the amount of light emitted and the series resistance is reduced by reducing the thickness of the semiconductor layer disposed on the light emitting structure.
  • FIG. 1 is a plan view schematically showing a semiconductor light emitting device according to a preferred embodiment of the present invention.
  • FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1.
  • 3A to 3I are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a preferred embodiment of the present invention.
  • FIG. 4 and 5 show a conventional semiconductor light emitting device, which is a sectional view taken along a plan view and a line B-B ', respectively.
  • FIG. 1 is a plan view schematically showing a light emitting device according to a preferred embodiment of the present invention.
  • FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1.
  • a semiconductor light emitting device includes a semiconductor layer in which an electrode disposed on one side of a light emitting structure is positioned on the light emitting structure through a via hole passing through a portion of the light emitting structure.
  • a semiconductor layer in which an electrode disposed on one side of a light emitting structure is positioned on the light emitting structure through a via hole passing through a portion of the light emitting structure.
  • the so-called vertical light emitting device electrically connected to the.
  • the semiconductor light emitting device includes a light emitting structure 1, an electrode structure 2 disposed on the lower surface side thereof, and a current spreading layer 41 formed on the upper surface of the light emitting structure 1. Include.
  • the light emitting structure 1 includes a first conductive semiconductor layer 11, an active layer 13, and a second conductive semiconductor layer 12 sequentially stacked from above.
  • the "sequential lamination from the top" as used herein is not laminated from the top to the bottom in the actual manufacturing process, it is to reverse the substrate in the middle of the manufacturing process.
  • the first conductive semiconductor layer 11 is first stacked on the growth base layer, and then the active layer 13 and the second conductive semiconductor layer 12 are sequentially stacked. Subsequently, after the substrate is stacked up to the submounting substrate 25, the substrate is inverted to perform the remaining process.
  • the electrode structure 2 is disposed on the outer surface (lower surface) of the second conductive semiconductor layer 12, and the second electrode 22 and the insulating film sequentially stacked from the second conductive semiconductor layer 12 side. 23, and a first electrode 21.
  • the electrode structure 2 may include a bonding layer 24 formed on the bottom surface of the first electrode 21 and a conductive submounting substrate 25.
  • the second electrode 22 of the electrode structure 2 is stacked on the outer surface of the second conductive semiconductor layer 12 and electrically connected to the second conductive semiconductor layer 12.
  • the second electrode 22 may serve as a reflective layer.
  • the semiconductor light emitting device includes a second electrode 22, a second conductive semiconductor layer 12, and one or more via holes 31 penetrating through the active layer 13.
  • An insulating film 23 is formed on the outer surface of the second electrode 22 and the inner wall surface of the via hole 31.
  • the first electrode 21 is electrically connected to the first conductive semiconductor layer 11 through the via hole 31. As illustrated, the first electrode 21 is electrically insulated from the second electrode 22 and the active layer 13 by the insulating film 23.
  • the via hole 31 extends to the inside of the first conductive semiconductor layer 11, so that the first electrode 21 is aligned with the first conductive semiconductor layer 11 in the first conductive semiconductor layer 11. Can be electrically connected.
  • the second electrode 22 is a reflective layer, or an additional reflective layer (not shown) further interposed between the second electrode 22 and the second conductive semiconductor layer 12. As a result, the light of the light emitting structure 1 is reflected toward the first conductive semiconductor layer 11.
  • a bonding layer 24 electrically connected to the first electrode 21 may be provided on the outer surface (lower surface) of the insulating layer 23.
  • the submounting substrate 25 is provided on the outer surface of the bonding layer 24.
  • the semiconductor light emitting device of the preferred embodiment of the present invention includes a current spreading layer 41 formed on the outer surface (upper surface) of the first conductive semiconductor layer 11.
  • the current spreading layer 41 may be formed of a conductive material, and preferably, may be formed of any one of a transparent current oxide (TCO), graphene, gold, tungsten, indium, and nickel.
  • TCO transparent current oxide
  • the surface of the first conductive semiconductor layer 11 may be removed to a predetermined depth before forming the current spreading layer 41.
  • the first conductive semiconductor layer 11 may have a thickness of 0.3 ⁇ m to 0.5 ⁇ m.
  • the second electrode 22 is partially exposed by exposing the current spreading layer 41, the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 12. Has an exposed portion 221.
  • the electrode pad 222 is formed on the exposed portion 221 so that the wire 223 may be connected.
  • the first conductive semiconductor layer 11 may be, for example, an n-type nitride semiconductor such as n-GaN, and the second conductive semiconductor layer 12 may be, for example, p ⁇ .
  • P-type nitride semiconductor such as GaN.
  • the material for the active layer 13 may be selected according to the first and second conductive semiconductor layers 11 and 12.
  • the active layer 13 may be formed of a material having an energy band gap less than that of the first and second conductive semiconductor layers 11 and 12.
  • the current spreading layer 41 is disposed on the first conductive semiconductor layer 11, the current spreading effect is increased and the series resistance is lowered. Furthermore, the number of via holes 31 for the first electrode 21 can be reduced due to the current spreading layer 41. This is because the active layer 13 is less reduced, so that the light emitting area increases. In addition, in the semiconductor light emitting device according to the preferred embodiment of the present invention, since the first conductive semiconductor layer 11 is thinner than the conventional one, the amount of light emitted is increased.
  • the growth base layer 50 is prepared.
  • the growth base layer 50 may include, for example, a sapphire substrate 51 and a u-GaN layer 52 which is not doped with impurities grown thereon.
  • the light emitting structure 1 is formed on the u-GaN layer 52 of the growth base layer 50.
  • the light emitting structure 1 may be formed by sequentially forming the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 12 on the u-GaN layer 52. do.
  • the first conductive semiconductor layer 11 may be an n-GaN layer
  • the second conductive semiconductor layer 12 may be a p-GaN layer.
  • the electrode structure 2 is formed on the light emitting structure 1 as shown in FIGS. 3b to 3d.
  • the second electrode 22 is formed on the second conductive semiconductor layer 12 (FIG. 3B)
  • the second electrode 22 and the second conductive semiconductor layer are formed through photolithography and etching processes. (12) and the active layer 13 are partially removed to form a via hole 31 exposing the first conductive semiconductor layer 11.
  • the via hole 31 is extended to the inside of the first conductive semiconductor layer 11, so that the first electrode 21 may be formed within the first conductive semiconductor layer 11 as described below. It may be electrically connected to the conductive semiconductor layer 11. As such, the via hole 31 reaches the inside of the first conductive semiconductor layer 11 so that the first electrode 21 is more secure than the other layers other than the first conductive semiconductor layer 11 as described below. Can be insulated.
  • the first electrode 21 is formed in the via hole 31 (FIG. 3D).
  • the first electrode 21 thus formed is electrically connected to the first conductive semiconductor layer 11 at the bottom of each via hole 31 and electrically insulated from the remaining layers.
  • the conductive submounting substrate 25 is bonded through the bonding layer 24 (FIG. 3E).
  • the bonding layer 24 is formed on the insulating film 23 and the first electrode 21 to form a first metal layer electrically connected to the first electrode 21, and a second metal layer and a second metal layer formed on the submounting substrate 25.
  • the solder layer may be interposed between the first and second metal layers. This is because the first metal layer is formed on the insulating film 23 and the first electrode 21, and then sequentially stacked on the solder layer and the second metal layer submounting substrate 25 to bond the solder layer and the first metal layer. It can be implemented in a way.
  • the growth base layer 50 is removed. Specifically, the sapphire substrate 51 is removed by, for example, laser lift-off (FIG. 3F), and the u-GaN layer 52 is removed by etching (FIG. 3F). At this time, the surface of the first conductive semiconductor layer 11 is further removed to a predetermined depth, preferably, etched to a distance close to the via hole 31 (FIG. 3G). For example, as shown in FIG. 3G, the first conductive semiconductor layer 11 left after the surface is removed to a predetermined depth may be 0.3 to 0.5 ⁇ m.
  • portions of the current spreading layer 41, the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 12 are removed and partially exposed.
  • the exposed portion 221 of the second electrode 22 is formed.
  • the electrode pad 222 and the wire 223 are connected to the exposed portion 221.
  • first conductive semiconductor layer 12 second conductive semiconductor layer
  • active layer 21 first electrode
  • growth base 51 sapphire substrate
  • electrode pad 223 wire

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Abstract

Disclosed are a semiconductor light-emitting element and a production method therefor. The semiconductor light-emitting element comprises: a light-emitting structure; an electrode structure which is disposed laminated on the lower-surface side of the light-emitting structure, and having an electrode electrically connected to a semiconductor layer of the light-emitting structure through a via hole; and a current-spreading layer formed on a semiconductor layer disposed on the upper part of the light-emitting structure. Because of the current-spreading layer, the number of via holes can be reduced and the light-emitting efficiency enhanced.

Description

반도체 발광 소자 및 그 제조방법Semiconductor light emitting device and manufacturing method thereof
본 발명은 반도체 소자 분야에 관한 것으로서, 보다 상세하게는 반도체 발광 소자 및 그 제조방법에 관한 것이다.The present invention relates to the field of semiconductor devices, and more particularly, to a semiconductor light emitting device and a method of manufacturing the same.
현재, LED와 같은 반도체 발광 소자가 다양한 조명기구에 이용되고 있다. 발광 소자는 p형과 n형 반도체의 접합 부분에서 전자와 정공이 재결합할 때 광방출이 일어나는 반도체 장치이다.Currently, semiconductor light emitting devices such as LEDs are used in various lighting fixtures. A light emitting device is a semiconductor device in which light emission occurs when electrons and holes recombine at a junction portion of a p-type and n-type semiconductor.
이러한 반도체 발광 소자는 백열등과 같은 기존의 발광기구에 비해 수명이 길고, 소비전력이 작다.The semiconductor light emitting device has a longer life and lower power consumption than conventional light emitting devices such as incandescent lamps.
최근에는 Ⅲ족 질화물 반도체에 대한 연구와 그를 이용한 제품 생산이 활발하게 이루어지고 있다. 이러한 Ⅲ족 질화물 반도체는 그 동안 취약하였던 청색계열의 빛을 방출할 수 있다는 장점이 있다.Recently, research on group III nitride semiconductors and production of products using the same have been actively conducted. Such a group III nitride semiconductor has the advantage of being able to emit the light of the blue series that has been weak.
다만, Ⅲ족 질화물 반도체의 경우에는 사파이어기판과 같은 특정한 기판 상에서 성장된다는 단점이 있다. 사파이어와 같은 절연 기판의 경우, 발광 소자를 수평형으로 제조할 때 전극 배치에 큰 제약이 있다. 따라서 전극구조를 발광구조물의 하면측에 배치하고 비아홀을 통해 전극을 발광구조물의 반도체층과 연결하는 수직형 발광 소자가 개발되어 이용되고 있다.However, in the case of the group III nitride semiconductor, there is a disadvantage that it is grown on a specific substrate such as a sapphire substrate. In the case of an insulated substrate such as sapphire, there is a big limitation in the arrangement of electrodes when the light emitting device is manufactured horizontally. Therefore, a vertical light emitting device has been developed and used to arrange the electrode structure on the lower surface side of the light emitting structure and connect the electrode to the semiconductor layer of the light emitting structure through via holes.
도 4와 도 5는 종래의 수직형 반도체 발광 소자를 도시한 도면으로서, 각각 평면도와 B-B'선에 따른 단면도이다.4 and 5 show a conventional vertical semiconductor light emitting device, which is a sectional view taken along a plan view and a line B-B ', respectively.
종래의 수직형 반도체 발광 소자는 도시한 바와 같이 위로부터 n-GaN층(110), 활성층(130) 및 p-GaN층(120)이 적층된 발광구조물과, 발광구조물의 하면(p-GaN층(120)의 외부면)에 배치되고 n형전극(210)이 하나 이상의 비아홀(310)을 통해 n-GaN층과 전기적으로 연결된 전극구조물을 포함한다. 또한 전극구조물 중 제2전극(220)은 p-GaN층(120)의 하면 상에 적층되어 p-GaN(120)층과 전기적으로 연결된다. 따라서 제1전극(210)을 연결하기 위한 비아홀(310)이 제2전극(220), p-GaN층(120), 및 활성층(130)을 관통하여 n-GaN층(110)을 노출하는 형태를 갖는다. 이러한 비아홀(310) 내에 n형전극(210)이 배치되어 n-GaN층(110)과 전기적으로 연결된다. 또한 절연막(230)이 제2전극(22)과 제1전극(21) 사이와 비아홀(310)의 내측벽면에 배치되어 제1전극(21)을 다른 요소들과 절연시킨다. 하부에는 본딩층(240)을 통해 접착된 서브마운팅기판(250)이 배치된다.The conventional vertical semiconductor light emitting device has a light emitting structure in which the n-GaN layer 110, the active layer 130, and the p-GaN layer 120 are stacked from above, and the bottom surface of the light emitting structure (p-GaN layer) as shown. The n-type electrode 210 is disposed on an outer surface of the 120 and includes an electrode structure electrically connected to the n-GaN layer through one or more via holes 310. In addition, the second electrode 220 of the electrode structure is stacked on the lower surface of the p-GaN layer 120 is electrically connected to the p-GaN (120) layer. Therefore, the via hole 310 for connecting the first electrode 210 exposes the n-GaN layer 110 through the second electrode 220, the p-GaN layer 120, and the active layer 130. Has The n-type electrode 210 is disposed in the via hole 310 to be electrically connected to the n-GaN layer 110. In addition, an insulating layer 230 is disposed between the second electrode 22 and the first electrode 21 and on the inner wall surface of the via hole 310 to insulate the first electrode 21 from other elements. The submounting substrate 250 bonded through the bonding layer 240 is disposed below.
이상과 같은 종래기술에 따른 반도체 발광 소자는 복수개의 비아홀(310)을 통해 n형전극(210)과 n-GaN층(110)이 연결되기 때문에 많은 수의 비아홀(310)이 배치되었다. 그렇지 않을 경우, 도 4에서 알 수 있는 바와 같이, 전류분포가 작은 영역이 확대된다. 미세공정에서 복수개의 비아홀(310)을 형성하는 것이 쉽지 않을 뿐만 아니라, 그러한 많은 비아홀(310) 만큼 활성층(130)이 손실되기 때문에 전체 발광면적이 축소될 수밖에 없었다.In the semiconductor light emitting device according to the related art as described above, since the n-type electrode 210 and the n-GaN layer 110 are connected through the plurality of via holes 310, a large number of via holes 310 are disposed. Otherwise, as can be seen in FIG. 4, the region with a small current distribution is enlarged. In addition, it is not easy to form the plurality of via holes 310 in the micro process, and the entire light emitting area has to be reduced since the active layer 130 is lost as much as the via holes 310.
(선행기술문헌)(Prior art document)
(특허문헌)(Patent literature)
한국특허공개 10-2010-0054756Korean Patent Publication 10-2010-0054756
본 발명은 발광구조물에 형성되는 하나 이상의 비아홀을 통해 전극과 발광구조물의 반도체층이 연결되는 발광 소자로서 전류펼침층을 반도체층 상면에 형성하여 전류 펼침 효과가 향상된 반도체 발광 소자를 제공한다.The present invention provides a semiconductor light emitting device having an improved current spreading effect by forming a current spreading layer on an upper surface of a semiconductor layer as a light emitting device in which an electrode and a semiconductor layer of the light emitting structure are connected through at least one via hole formed in the light emitting structure.
본 발명은 전류펼침층에 의한 전류 펼침 효과가 증가됨으로써 비아홀의 숫자가 감소된 반도체 발광 소자를 제공한다.The present invention provides a semiconductor light emitting device in which the number of via holes is reduced by increasing the current spreading effect by the current spreading layer.
본 발명은 발광구조물의 상부에 배치되는 반도체층의 두께를 줄임으로써 상대적으로 방출되는 광량이 증가되고 직렬저항이 감소된 반도체 발광 소자를 제공한다.The present invention provides a semiconductor light emitting device in which the amount of light emitted is increased and the series resistance is reduced by reducing the thickness of the semiconductor layer disposed on the light emitting structure.
본 발명은 상술한 개선된 반도체 발광 소자를 제조하는 방법을 제공한다.The present invention provides a method of manufacturing the above-described improved semiconductor light emitting device.
본 발명은 반도체 발광 소자를 제공하며, 이 반도체 발광 소자는: 위에서부터 순차로 적층된 제1도전형 반도체층, 활성층, 및 제2도전형 반도체층을 포함하는 발광구조물; 상기 발광구조물에 있어서 상기 제2도전형 반도체층의 하면에 적층 배치된 전극구조물; 및 상기 제1도전형 반도체층 상에 형성된 전류펼침층;을 포함한다.The present invention provides a semiconductor light emitting device comprising: a light emitting structure comprising a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer sequentially stacked from above; An electrode structure stacked on the lower surface of the second conductive semiconductor layer in the light emitting structure; And a current spreading layer formed on the first conductive semiconductor layer.
상기 전극구조물은, 상기 제2도전형 반도체층의 하면에 적층 형성된 제2전극과, 상기 제2전극, 상기 제2도전형 반도체층 및 상기 활성층을 관통하는 하나 이상의 비아홀을 통해 상기 제1도전형 반도체층과 전기적으로 연결되는 제1전극과, 상기 제1전극을 상기 제2전극, 상기 제2도전형 반도체층, 및 상기 활성층과 절연시키는 절연막을 포함한다.The electrode structure may include a second electrode stacked on a lower surface of the second conductive semiconductor layer and at least one via hole penetrating through the second electrode, the second conductive semiconductor layer, and the active layer. A first electrode electrically connected to the semiconductor layer, and an insulating film insulating the first electrode from the second electrode, the second conductive semiconductor layer, and the active layer.
상기 제2전극은 광반사층일 수 있다.The second electrode may be a light reflection layer.
상기 제2전극은 상기 전류펼침층, 상기 제1도전형 반도체층, 상기 활성층, 및 상기 제2도전형 반도체층이 부분적으로 제거되어 노출된 노출부위를 가지고, 상기 노출부위에는 전극패드가 배치된다.The second electrode has an exposed portion in which the current spreading layer, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer are partially removed, and an electrode pad is disposed on the exposed portion. .
상기 전류펼침층은 도전성 물질로 형성되며, 상기 전류펼침층은 투명전도성산화물(TCO), 그래핀, 금, 텅스텐, 인듐, 니켈 중 어느 하나로 형성될 수 있다.The current spreading layer may be formed of a conductive material, and the current spreading layer may be formed of any one of a transparent conductive oxide (TCO), graphene, gold, tungsten, indium, and nickel.
상기 제1도전형 반도체층은 0.3 내지 0.5㎛의 두께를 가질 수 있다.The first conductive semiconductor layer may have a thickness of 0.3 to 0.5 μm.
본 발명의 반도체 발광 소자는: 위에서부터 n형 반도체층, 활성층, 및 p형 반도체층이 순차로 적층된 발광구조물; 상기 발광구조물에 있어서 상기 p형 반도체층의 하면 상에 배치되어 상기 p형 반도체층과 전기적으로 연결된 p형 전극; 상기 p형 전극, 상기 p형 반도체층, 및 상기 활성층을 관통하는 하나 이상의 비아홀을 통해 상기 n형 반도체층과 전기적으로 접속된 n형 전극; 및 상기 n형 전극을 상기 p형 전극, 상기 p형 반도체층, 및 상기 활성층과 절연시키는 절연막;을 포함하고, 상기 n형 반도체층 상면 상에는 도전성 물질로 이루어진 전류펼침층이 배치된다.The semiconductor light emitting device of the present invention comprises: a light emitting structure in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially stacked from above; A p-type electrode disposed on a lower surface of the p-type semiconductor layer in the light emitting structure and electrically connected to the p-type semiconductor layer; An n-type electrode electrically connected to the n-type semiconductor layer through at least one via hole passing through the p-type electrode, the p-type semiconductor layer, and the active layer; And an insulating film insulating the n-type electrode from the p-type electrode, the p-type semiconductor layer, and the active layer. A current spreading layer made of a conductive material is disposed on the n-type semiconductor layer.
상기 p형 전극은 상기 전류펼침층, 상기 n형 반도체층, 상기 활성층, 및 상기 p형 반도체층이 부분적으로 제거되어 노출된 노출부위를 가지며, 상기 노출부위에는 전극패드가 형성된다.The p-type electrode has an exposed portion by partially removing the current spreading layer, the n-type semiconductor layer, the active layer, and the p-type semiconductor layer, and an electrode pad is formed on the exposed portion.
상기 n형 반도체층은 0.3 내지 0.5㎛의 두께를 가질 수 있다.The n-type semiconductor layer may have a thickness of 0.3 to 0.5㎛.
본 발명은 반도체 발광 소자 제조방법을 제공하며, 이 방법은: 성장기반층을 준비하는 단계; 상기 성장기반층 상에 제1도전형 반도체층, 활성층, 및 제2도전형 반도체층을 순차로 적층하여 발광구조물을 형성하는 단계; 상기 제2도전형 반도체층 상에 제1전극과 제2전극을 포함하는 전극구조물을 형성하는 단계; 상기 성장기반층을 제거하여 상기 제1도전형 반도체층을 노출시키는 단계; 및 상기 제1도전형 반도체층의 노출된 표면 상에 전류펼침층을 형성하는 단계;를 포함한다.The present invention provides a method for manufacturing a semiconductor light emitting device, the method comprising: preparing a growth base layer; Forming a light emitting structure by sequentially stacking a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the growth base layer; Forming an electrode structure including a first electrode and a second electrode on the second conductive semiconductor layer; Removing the growth base layer to expose the first conductive semiconductor layer; And forming a current spreading layer on an exposed surface of the first conductive semiconductor layer.
상기 전극구조물을 형성하는 단계는: 상기 제2도전형 반도체층 상에 제2전극을 형성하는 단계; 상기 제2전극, 상기 제2도전형 반도체층, 및 상기 활성층을 관통하여 상기 제1도전형 반도체층을 노출시키는 하나 이상의 비아홀을 형성하는 단계; 상기 제2전극 상면과 상기 하나 이상의 비아홀의 내측벽면에 절연막을 형성하는 단계; 및 상기 하나 이상의 비아홀을 통해 상기 제1도전형 반도체층과 전기적으로 연결되는 제1전극을 형성하는 단계;를 포함한다.The forming of the electrode structure may include: forming a second electrode on the second conductive semiconductor layer; Forming at least one via hole through the second electrode, the second conductive semiconductor layer, and the active layer to expose the first conductive semiconductor layer; Forming an insulating film on an upper surface of the second electrode and an inner wall surface of the at least one via hole; And forming a first electrode electrically connected to the first conductive semiconductor layer through the one or more via holes.
상기 성장기반층이 제거되어 노출된 상기 제1도전형 반도체층의 표면을 소정 두께로 더 제거한다.The growth base layer is removed to further remove the exposed surface of the first conductive semiconductor layer to a predetermined thickness.
표면이 제거된 후 상기 제1도전형 반도체층은 0.3 내지 0.5㎛의 두께를 가질 수 있다.After the surface is removed, the first conductive semiconductor layer may have a thickness of 0.3 μm to 0.5 μm.
상기 제1도전형 반도체층과 상기 제2도전형 반도체층은 각각 n형 불순물이 도핑된 n-GaN과 p형 불순물이 도핑된 p-GaN이다.The first conductive semiconductor layer and the second conductive semiconductor layer are n-GaN doped with n-type impurities and p-GaN doped with p-type impurities, respectively.
상기 성장기반층은 사파이어기판과 불순물이 도핑되지 않은 u-GaN을 포함할 수 있다.The growth base layer may include sapphire substrate and u-GaN which is not doped with impurities.
또한 본 발명의 제조방법은 상기 전류펼침층, 상기 제1도전형 반도체층, 상기 활성층, 및 상기 제2도전형 반도체층을 부분적으로 제거하여 상기 제2전극의 노출부위를 형성한 후, 상기 노출부위에 전극패드를 형성하는 단계를 더 포함할 수 있다.In addition, the manufacturing method of the present invention after forming the exposed portion of the second electrode by partially removing the current spreading layer, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer. The method may further include forming an electrode pad at the site.
본 발명에 따르면, 발광구조물에 형성되는 비아홀을 통해 전극과 반도체층이 연결되는 발광 소자로서 전류펼침층을 반도체층 상면에 형성하여 전류 펼침 효과가 향상된 반도체 발광 소자가 제공된다. 이러한 반도체 발광 소자는 전류펼침층에 의한 전류 펼침 효과가 증대됨으로써 비아홀의 숫자를 줄일 수 있으며, 제조공정 역시 용이해지게 된다. 결국 공정 안정성과 신뢰성이 높아진다. 더불어 본 발명은 발광구조물의 상부에 배치되는 반도체층의 두께를 줄임으로써 상대적으로 방출되는 광량이 증가되고 직렬저항이 감소되어 고품질의 발광 소자를 제공할 수 있다.According to the present invention, a light emitting device in which an electrode and a semiconductor layer are connected through a via hole formed in a light emitting structure is provided. The semiconductor light emitting device can reduce the number of via holes by increasing the current spreading effect by the current spreading layer, and also facilitate the manufacturing process. As a result, process stability and reliability are increased. In addition, the present invention can provide a high quality light emitting device by reducing the amount of light emitted and the series resistance is reduced by reducing the thickness of the semiconductor layer disposed on the light emitting structure.
도 1은 본 발명의 바람직한 실시예에 따른 반도체 발광 소자를 개략적으로 도시한 평면도이다.1 is a plan view schematically showing a semiconductor light emitting device according to a preferred embodiment of the present invention.
도 2는 도 1의 A-A'선에 따른 단면도이다.FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1.
도 3a 내지 도 3i는 본 발명의 바람직한 실시예에 따른 반도체 발광 소자의 제조방법을 설명하기 위한 공정 단면도이다.3A to 3I are cross-sectional views illustrating a method of manufacturing a semiconductor light emitting device according to a preferred embodiment of the present invention.
도 4 및 도 5는 종래의 반도체 발광 소자를 도시한 도면으로서, 각각 평면도와 B-B'선에 따른 단면도이다. 4 and 5 show a conventional semiconductor light emitting device, which is a sectional view taken along a plan view and a line B-B ', respectively.
이하 첨부한 도면을 참조하여 본 발명의 실시예를 상세하게 설명한다. 본 발명의 실시예를 설명함에 있어서, 관련된 공지기능 혹은 구성에 대한 구체적인 설명이 본 발명의 요지를 불필요하게 흐릴 수 있다고 판단되는 경우 그 상세한 설명을 생략한다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the embodiments of the present invention, if it is determined that a detailed description of a related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.
도 1은 본 발명의 바람직한 실시예에 따른 발광 소자를 개략적으로 도시한 평면도이다. 도 2는 도 1의 A-A'에 따른 단면도이다.1 is a plan view schematically showing a light emitting device according to a preferred embodiment of the present invention. FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1.
도 1 및 도 2를 참조하면, 본 발명의 바람직한 실시예에 따른 반도체 발광 소자는 발광구조물의 일측에 배치된 어느 전극이 발광구조물의 일부분을 관통하는 비아홀을 통해 발광구조물의 상부에 위치하는 반도체층에 전기적으로 연결되는 소위 수직형 발광 소자에 해당한다.1 and 2, a semiconductor light emitting device according to a preferred embodiment of the present invention includes a semiconductor layer in which an electrode disposed on one side of a light emitting structure is positioned on the light emitting structure through a via hole passing through a portion of the light emitting structure. Corresponds to the so-called vertical light emitting device electrically connected to the.
이러한 본 발명의 바람직한 실시예에 따른 반도체 발광 소자는 발광구조물(1)과, 그 하부면 측에 배치된 전극구조물(2)과, 발광구조물(1)의 상면에 형성된 전류펼침층(41)을 포함한다.The semiconductor light emitting device according to the preferred embodiment of the present invention includes a light emitting structure 1, an electrode structure 2 disposed on the lower surface side thereof, and a current spreading layer 41 formed on the upper surface of the light emitting structure 1. Include.
발광구조물(1)은 위로부터 순차로 적층된 제1도전형 반도체층(11), 활성층(13), 및 제2도전형 반도체층(12)을 포함한다. 참고적으로, 여기에서 말하는 '위로부터 순차로 적층'은 실제 제조공정에서 위로부터 아래방향으로 적층되는 것이 아니고, 제조공정의 중간과정에서 기판을 반전시키게 된다. 아래 본 발명의 제조방법에서 설명하는 바와 같이 실제로는 성장기반층 상에 제1도전형 반도체층(11)이 먼저 적층 형성된 후 활성층(13)과 제2도전형 반도체층(12)이 순차로 적층되며, 이후 서브마운팅기판(25)까지 적층된 이후에 기판이 반전되어 나머지 공정을 수행된다.The light emitting structure 1 includes a first conductive semiconductor layer 11, an active layer 13, and a second conductive semiconductor layer 12 sequentially stacked from above. For reference, the "sequential lamination from the top" as used herein is not laminated from the top to the bottom in the actual manufacturing process, it is to reverse the substrate in the middle of the manufacturing process. As described below in the manufacturing method of the present invention, the first conductive semiconductor layer 11 is first stacked on the growth base layer, and then the active layer 13 and the second conductive semiconductor layer 12 are sequentially stacked. Subsequently, after the substrate is stacked up to the submounting substrate 25, the substrate is inverted to perform the remaining process.
전극구조물(2)은 제2도전형 반도체층(12)의 외부면(하면) 상에 배치되며, 제2도전형 반도체층(12) 쪽에서부터 순차로 적층된 제2전극(22), 절연막(23), 및 제1전극(21)을 포함한다. 전극구조물(2)은 제1전극(21)의 하면 상에 형성된 본딩층(24)과 도전성의 서브마운팅기판(25)을 포함할 수 있다.The electrode structure 2 is disposed on the outer surface (lower surface) of the second conductive semiconductor layer 12, and the second electrode 22 and the insulating film sequentially stacked from the second conductive semiconductor layer 12 side. 23, and a first electrode 21. The electrode structure 2 may include a bonding layer 24 formed on the bottom surface of the first electrode 21 and a conductive submounting substrate 25.
구체적으로, 전극구조물(2)의 제2전극(22)은 제2도전형 반도체층(12)의 외부면 상에 적층되어 제2도전형 반도체층(12)과 전기적으로 연결된다. 여기서 제2전극(22)은 반사층으로서의 역할을 수행할 수 있다.Specifically, the second electrode 22 of the electrode structure 2 is stacked on the outer surface of the second conductive semiconductor layer 12 and electrically connected to the second conductive semiconductor layer 12. The second electrode 22 may serve as a reflective layer.
본 발명의 바람직한 실시예에 따른 반도체 발광 소자는 제2전극(22), 제2도전형 반도체층(12), 및 활성층(13)을 관통하는 하나 이상의 비아홀(31)이 구비된다. 제2전극(22)의 외부면 상과 비아홀(31)의 내측벽면에는 절연막(23)이 형성된다.The semiconductor light emitting device according to the preferred embodiment of the present invention includes a second electrode 22, a second conductive semiconductor layer 12, and one or more via holes 31 penetrating through the active layer 13. An insulating film 23 is formed on the outer surface of the second electrode 22 and the inner wall surface of the via hole 31.
이러한 비아홀(31)을 통해 제1전극(21)이 제1도전형 반도체층(11)과 전기적으로 연결된다. 도시한 바와 같이 제1전극(21)은 절연막(23)에 의해 제2전극(22) 및 활성층(13)과는 전기적으로 절연된다.The first electrode 21 is electrically connected to the first conductive semiconductor layer 11 through the via hole 31. As illustrated, the first electrode 21 is electrically insulated from the second electrode 22 and the active layer 13 by the insulating film 23.
바람직하게는 비아홀(31)은 제1도전형 반도체층(11)의 내부까지 연장됨으로써 제1전극(21)이 제1도전형 반도체층(11) 내부에서 제1도전형 반도체층(11)과 전기적으로 연결되도록 할 수 있다.Preferably, the via hole 31 extends to the inside of the first conductive semiconductor layer 11, so that the first electrode 21 is aligned with the first conductive semiconductor layer 11 in the first conductive semiconductor layer 11. Can be electrically connected.
본 발명의 반도체 발광 소자는 상술한 바와 같이 제2전극(22)이 반사층이거나, 제2전극(22)와 제2도전형 반도체층(12) 사이에 추가로 개재되는 추가적인 반사층(미도시)에 의해 발광구조물(1)의 광이 제1도전형 반도체층(11) 쪽으로 반사된다.In the semiconductor light emitting device of the present invention, as described above, the second electrode 22 is a reflective layer, or an additional reflective layer (not shown) further interposed between the second electrode 22 and the second conductive semiconductor layer 12. As a result, the light of the light emitting structure 1 is reflected toward the first conductive semiconductor layer 11.
절연막(23)의 외부면(하면) 상에는 제1전극(21)과 전기적으로 연결된 본딩층(24)이 구비될 수 있다. 본딩층(24)의 외부면 상에 서브마운팅기판(25)이 구비된다.A bonding layer 24 electrically connected to the first electrode 21 may be provided on the outer surface (lower surface) of the insulating layer 23. The submounting substrate 25 is provided on the outer surface of the bonding layer 24.
본 발명의 바람직한 실시예의 반도체 발광 소자는 제1도전형 반도체층(11)의 외부면(상면) 상에 형성된 전류펼침층(41)을 포함한다. 전류펼침층(41)은 도전성 물질로 형성될 수 있고, 바람직하게는 투명전도성산화물(transparent current oxide, TCO), 그래핀, 금, 텅스텐, 인듐, 니켈 중 어느 하나로 형성될 수 있다.The semiconductor light emitting device of the preferred embodiment of the present invention includes a current spreading layer 41 formed on the outer surface (upper surface) of the first conductive semiconductor layer 11. The current spreading layer 41 may be formed of a conductive material, and preferably, may be formed of any one of a transparent current oxide (TCO), graphene, gold, tungsten, indium, and nickel.
더 바람직하게는 제1도전형 반도체층(11)은 전류펼침층(41)을 형성하기 전에 표면이 소정깊이로 제거된 것일 수 있다. 이 경우 제1도전형 반도체층(11)은 0.3 내지 0.5㎛의 두께를 가질 수 있다.More preferably, the surface of the first conductive semiconductor layer 11 may be removed to a predetermined depth before forming the current spreading layer 41. In this case, the first conductive semiconductor layer 11 may have a thickness of 0.3 μm to 0.5 μm.
또한 바람직하게는 제2전극(22)은 전류펼침층(41), 제1도전형 반도체층(11), 활성층(13), 및 제2도전형 반도체층(12)이 부분적으로 제거되어 노출된 노출부위(221)를 가진다. 이러한 노출부위(221)에는 전극패드(222)가 형성되어 와이어(223)가 연결될 수 있다.Also, preferably, the second electrode 22 is partially exposed by exposing the current spreading layer 41, the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 12. Has an exposed portion 221. The electrode pad 222 is formed on the exposed portion 221 so that the wire 223 may be connected.
이상의 본 발명의 바람직한 실시예에 따른 반도체 발광소자는 제1도전형 반도체층(11)이 예컨대 n-GaN과 같은 n형 질화물 반도체일 수 있고, 제2도전형 반도체층(12)은 예컨대 p-GaN과 같은 p형 질화물 반도체일 수 있다.In the semiconductor light emitting device according to the preferred embodiment of the present invention, the first conductive semiconductor layer 11 may be, for example, an n-type nitride semiconductor such as n-GaN, and the second conductive semiconductor layer 12 may be, for example, p−. P-type nitride semiconductor such as GaN.
활성층(13)을 위한 물질은 제1 및 제2도전형 반도체층(11, 12)에 따라서 선택될 수 있다. 이를테면, 활성층(13)은 제1 및 제2도전형 반도체층(11, 12)의 에너지 밴드갭보다 적은 에너지 밴드갭을 가지는 물질로 형성될 수 있다.The material for the active layer 13 may be selected according to the first and second conductive semiconductor layers 11 and 12. For example, the active layer 13 may be formed of a material having an energy band gap less than that of the first and second conductive semiconductor layers 11 and 12.
본 발명의 바람직한 실시예에 따른 반도체 발광 소자는 제1도전형 반도체층(11) 상에 전류펼침층(41)이 있기 때문에 전류펼침 효과가 높아지고 직렬저항이 낮아지게 된다. 나아가 전류펼침층(41)으로 인해 제1전극(21)을 위한 비아홀(31)의 수를 감소시킬 수 있다. 이는 활성층(13)이 상대적으로 덜 줄어들기 때문에 그 만큼 발광면적이 늘어난다. 또한 본 발명의 바람직한 실시예에 따른 반도체 발광 소자는 제1도전형 반도체층(11)이 기존보다 얇아지기 때문에 방출되는 광량이 증가하게 된다.In the semiconductor light emitting device according to the preferred embodiment of the present invention, since the current spreading layer 41 is disposed on the first conductive semiconductor layer 11, the current spreading effect is increased and the series resistance is lowered. Furthermore, the number of via holes 31 for the first electrode 21 can be reduced due to the current spreading layer 41. This is because the active layer 13 is less reduced, so that the light emitting area increases. In addition, in the semiconductor light emitting device according to the preferred embodiment of the present invention, since the first conductive semiconductor layer 11 is thinner than the conventional one, the amount of light emitted is increased.
이하에서는 도 3a 내지 도 3i를 참조하여 반도체 발광 소자 제조방법을 설명한다.Hereinafter, a method of manufacturing a semiconductor light emitting device will be described with reference to FIGS. 3A to 3I.
먼저 성장기반층(50)을 준비한다. 성장기반층(50)은 예를 들어 사파이어기판(51)과 그 위에 성장된 불순물이 도핑되지 않은 u-GaN층(52)을 포함하는 것일 수 있다.First, the growth base layer 50 is prepared. The growth base layer 50 may include, for example, a sapphire substrate 51 and a u-GaN layer 52 which is not doped with impurities grown thereon.
도 3a에서와 같이, 이러한 성장기반층(50)의 u-GaN층(52) 상에 발광구조물(1)을 형성한다.As shown in FIG. 3A, the light emitting structure 1 is formed on the u-GaN layer 52 of the growth base layer 50.
예를 들어, 발광구조물(1)의 형성은 u-GaN층(52) 상에 제1도전형 반도체층(11), 활성층(13), 및 제2도전형 반도체층(12)을 순차로 형성한다. 제1도전형 반도체층(11)은 n-GaN층이고, 제2도전형 반도체층(12)은 p-GaN층일 수 있다.For example, the light emitting structure 1 may be formed by sequentially forming the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 12 on the u-GaN layer 52. do. The first conductive semiconductor layer 11 may be an n-GaN layer, and the second conductive semiconductor layer 12 may be a p-GaN layer.
이어, 도 3b 내지 도 도 3d와 같이 발광구조물(1) 상에 전극구조물(2)을 형성한다.Next, the electrode structure 2 is formed on the light emitting structure 1 as shown in FIGS. 3b to 3d.
예를 들어, 제2도전형 반도체층(12) 상에 제2전극(22)을 형성한 후(도 3b), 포토리소그래피 및 에칭 공정을 통해 제2전극(22), 제2도전형 반도체층(12), 및 활성층(13)을 부분적으로 제거하여 제1도전형 반도체층(11)을 노출시키는 비아홀(31)을 형성한다.For example, after the second electrode 22 is formed on the second conductive semiconductor layer 12 (FIG. 3B), the second electrode 22 and the second conductive semiconductor layer are formed through photolithography and etching processes. (12) and the active layer 13 are partially removed to form a via hole 31 exposing the first conductive semiconductor layer 11.
이때, 바람직하게는 비아홀(31)을 제1도전형 반도체층(11)의 내부까지 연장되도록 함으로써, 후술되는 바와 같이 제1전극(21)이 제1도전형 반도체층(11) 내부에서 제1도전형 반도체층(11)과 전기적으로 연결되도록 할 수 있다. 이와 같이 비아홀(31)이 제1도전형 반도체층(11) 내부에 까지 이르게 됨으로써 아래에 설명되는 바와 같이 제1전극(21)이 제1도전형 반도체층(11) 외의 다른 층들과는 보다 더 확실하게 절연될 수 있게 된다.In this case, preferably, the via hole 31 is extended to the inside of the first conductive semiconductor layer 11, so that the first electrode 21 may be formed within the first conductive semiconductor layer 11 as described below. It may be electrically connected to the conductive semiconductor layer 11. As such, the via hole 31 reaches the inside of the first conductive semiconductor layer 11 so that the first electrode 21 is more secure than the other layers other than the first conductive semiconductor layer 11 as described below. Can be insulated.
이어, 제2전극(22) 상과 비아홀(31)의 내측벽면에 이르는 절연막(23)을 형성한 후(도 3c), 비아홀(31) 내부에 제1전극(21)을 형성한다(도 3d). 이렇게 형성된 제1전극(21)은 각 비아홀(31)의 바닥 부위에서 제1도전형 반도체층(11)과 전기적 연결되고, 나머지 층들과는 전기적으로 절연된다.Subsequently, after forming the insulating film 23 on the second electrode 22 and reaching the inner wall surface of the via hole 31 (FIG. 3C), the first electrode 21 is formed in the via hole 31 (FIG. 3D). ). The first electrode 21 thus formed is electrically connected to the first conductive semiconductor layer 11 at the bottom of each via hole 31 and electrically insulated from the remaining layers.
이어서, 본딩층(24)을 통해 도전성 서브마운팅기판(25)을 접착한다(도 3e). 본딩층(24)은 절연막(23) 상과 제1전극(21) 상에 형성되어 제1전극(21)과 전기적으로 연결된 제1금속층과 서브마운팅기판(25) 상에 형성된 제2금속층과 제1 및 제2 금속층 사이에 개재되는 솔더층을 포함할 수 있다. 이는 제1금속층을 절연막(23) 상과 제1전극(21) 상에 형성 한 후, 솔더층과 제2금속층 서브마운팅기판(25) 상에 순차로 적층 형성하여 솔더층과 제1금속층을 접착하는 방식으로 구현될 수 있다.Next, the conductive submounting substrate 25 is bonded through the bonding layer 24 (FIG. 3E). The bonding layer 24 is formed on the insulating film 23 and the first electrode 21 to form a first metal layer electrically connected to the first electrode 21, and a second metal layer and a second metal layer formed on the submounting substrate 25. The solder layer may be interposed between the first and second metal layers. This is because the first metal layer is formed on the insulating film 23 and the first electrode 21, and then sequentially stacked on the solder layer and the second metal layer submounting substrate 25 to bond the solder layer and the first metal layer. It can be implemented in a way.
다음에, 성장기반층(50)을 제거한다. 구체적으로, 사파이어기판(51)을 예를 들어 레이저 리프트 오프로 제거한 후(도 3f), u-GaN층(52)을 에칭으로 제거한다(도 3f). 이때, 제1도전형 반도체층(11)의 표면도 소정 깊이로 더 제거하는데, 바람직하게는 비아홀(31) 근접하는 거리까지 식각한다(도 3g). 예를 들어, 도 3g에서와 같이, 표면이 소정깊이로 제거된 후 남겨진 제1도전형 반도체층(11)은 0.3 내지 0.5㎛일 수 있다.Next, the growth base layer 50 is removed. Specifically, the sapphire substrate 51 is removed by, for example, laser lift-off (FIG. 3F), and the u-GaN layer 52 is removed by etching (FIG. 3F). At this time, the surface of the first conductive semiconductor layer 11 is further removed to a predetermined depth, preferably, etched to a distance close to the via hole 31 (FIG. 3G). For example, as shown in FIG. 3G, the first conductive semiconductor layer 11 left after the surface is removed to a predetermined depth may be 0.3 to 0.5 μm.
이후, 도 3i와 같이, 전류펼침층(41), 제1도전형 반도체층(11), 활성층(13), 및 제2도전형 반도체층(12)의 일부분을 제거하여, 부분적으로 노출된 제2전극(22)의 노출부위(221)를 형성한다. 이어, 노출부위(221)에는 전극패드(222)와 와이어(223)를 연결한다.Subsequently, as shown in FIG. 3I, portions of the current spreading layer 41, the first conductive semiconductor layer 11, the active layer 13, and the second conductive semiconductor layer 12 are removed and partially exposed. The exposed portion 221 of the second electrode 22 is formed. Next, the electrode pad 222 and the wire 223 are connected to the exposed portion 221.
이상, 본 발명의 상세한 설명에서는 구체적인 실시예에 관해서 설명하였으나, 본 발명의 범위에서 벗어나지 않는 한도 내에서 여러 가지 변형이 가능함은 당해 분야에서 통상의 지식을 가진 자에게 있어서 자명하다 할 것이다.In the foregoing detailed description of the present invention, specific embodiments have been described. However, it will be apparent to those skilled in the art that various modifications can be made without departing from the scope of the present invention.
(부호의 설명)(Explanation of the sign)
1: 발광구조물 2: 전극구조물1: light emitting structure 2: electrode structure
11: 제1도전형 반도체층 12: 제2도전형 반도체층11: first conductive semiconductor layer 12: second conductive semiconductor layer
13: 활성층 21: 제1전극13: active layer 21: first electrode
22: 제2전극 23: 절연막22: second electrode 23: insulating film
24: 본딩층 25: 서브마운팅기판24: bonding layer 25: submounting substrate
31: 비아홀 41: 전류펼침층31: via hole 41: current spreading layer
50: 성장기반층 51: 사파이어기판50: growth base 51: sapphire substrate
52: u-GaN층 221: 노출부위52: u-GaN layer 221: exposed part
222: 전극패드 223: 와이어222: electrode pad 223: wire

Claims (17)

  1. 위에서부터 순차로 적층된 제1도전형 반도체층, 활성층, 및 제2도전형 반도체층을 포함하는 발광구조물;A light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer sequentially stacked from above;
    상기 발광구조물에 있어서 상기 제2도전형 반도체층의 하면에 적층 배치된 전극구조물; 및An electrode structure stacked on the lower surface of the second conductive semiconductor layer in the light emitting structure; And
    상기 제1도전형 반도체층 상에 형성된 전류펼침층;을 포함하는, 반도체 발광 소자.And a current spreading layer formed on the first conductive semiconductor layer.
  2. 청구항 1에 있어서, 상기 전극구조물은,The method according to claim 1, wherein the electrode structure,
    상기 제2도전형 반도체층의 하면에 적층 형성된 제2전극과,A second electrode stacked on a lower surface of the second conductive semiconductor layer,
    상기 제2전극, 상기 제2도전형 반도체층 및 상기 활성층을 관통하는 하나 이상의 비아홀을 통해 상기 제1도전형 반도체층과 전기적으로 연결되는 제1전극과,A first electrode electrically connected to the first conductive semiconductor layer through at least one via hole penetrating through the second electrode, the second conductive semiconductor layer, and the active layer;
    상기 제1전극을 상기 제2전극, 상기 제2도전형 반도체층, 및 상기 활성층과 절연시키는 절연막을 포함하는 것인, 반도체 발광 소자.And an insulating film which insulates the first electrode from the second electrode, the second conductive semiconductor layer, and the active layer.
  3. 청구항 2에 있어서,The method according to claim 2,
    상기 제2전극은 광반사층인 것인, 반도체 발광 소자.The second electrode is a light reflecting layer, semiconductor light emitting device.
  4. 청구항 3에 있어서, The method according to claim 3,
    상기 제2전극은 상기 전류펼침층, 상기 제1도전형 반도체층, 상기 활성층, 및 상기 제2도전형 반도체층이 부분적으로 제거되어 노출된 노출부위를 가지고,The second electrode has an exposed portion exposed by partially removing the current spreading layer, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer.
    상기 노출부위에는 전극패드가 배치되는 것인, 반도체 발광 소자.An electrode pad is disposed on the exposed portion, the semiconductor light emitting device.
  5. 청구항 1에 있어서,The method according to claim 1,
    상기 전류펼침층은 도전성 물질로 형성되는 것인, 반도체 발광 소자.The current spreading layer is formed of a conductive material, semiconductor light emitting device.
  6. 청구항 5에 있어서,The method according to claim 5,
    상기 전류펼침층은 투명전도성산화물(TCO), 그래핀, 금, 텅스텐, 인듐, 니켈 중 어느 하나로 형성되는 것인, 반도체 발광 소자.The current spreading layer is formed of any one of a transparent conductive oxide (TCO), graphene, gold, tungsten, indium, nickel, semiconductor light emitting device.
  7. 청구항 1에 있어서,The method according to claim 1,
    상기 제1도전형 반도체층은 0.3 내지 0.5㎛의 두께를 가지는 것인, 반도체 발광 소자.The first conductive semiconductor layer has a thickness of 0.3 to 0.5㎛, semiconductor light emitting device.
  8. 위에서부터 n형 반도체층, 활성층, 및 p형 반도체층이 순차로 적층된 발광구조물;A light emitting structure in which an n-type semiconductor layer, an active layer, and a p-type semiconductor layer are sequentially stacked from above;
    상기 발광구조물에 있어서 상기 p형 반도체층의 하면 상에 배치되어 상기 p형 반도체층과 전기적으로 연결된 p형 전극;A p-type electrode disposed on a lower surface of the p-type semiconductor layer in the light emitting structure and electrically connected to the p-type semiconductor layer;
    상기 p형 전극, 상기 p형 반도체층, 및 상기 활성층을 관통하는 하나 이상의 비아홀을 통해 상기 n형 반도체층과 전기적으로 접속된 n형 전극; 및An n-type electrode electrically connected to the n-type semiconductor layer through at least one via hole passing through the p-type electrode, the p-type semiconductor layer, and the active layer; And
    상기 n형 전극을 상기 p형 전극, 상기 p형 반도체층, 및 상기 활성층과 절연시키는 절연막;을 포함하고,And an insulating film insulating the n-type electrode from the p-type electrode, the p-type semiconductor layer, and the active layer.
    상기 n형 반도체층 상면 상에는 도전성 물질로 이루어진 전류펼침층이 배치된 것인, 반도체 발광 소자.The current spreading layer made of a conductive material is disposed on the n-type semiconductor layer upper surface, the semiconductor light emitting device.
  9. 청구항 8에 있어서,The method according to claim 8,
    상기 p형 전극은 상기 전류펼침층, 상기 n형 반도체층, 상기 활성층, 및 상기 p형 반도체층이 부분적으로 제거되어 노출된 노출부위를 가지며,The p-type electrode has an exposed portion exposed by partially removing the current spreading layer, the n-type semiconductor layer, the active layer, and the p-type semiconductor layer,
    상기 노출부위에는 전극패드가 형성된 것인, 반도체 발광 소자.Electrode pad is formed on the exposed portion, the semiconductor light emitting device.
  10. 청구항 8에 있어서,The method according to claim 8,
    상기 n형 반도체층은 0.3 내지 0.5㎛의 두께를 가지는 것인, 반도체 발광 소자.The n-type semiconductor layer is a semiconductor light emitting device having a thickness of 0.3 to 0.5㎛.
  11. 반도체 발광 소자 제조방법으로서:As a method of manufacturing a semiconductor light emitting device:
    성장기반층을 준비하는 단계;Preparing a growth base layer;
    상기 성장기반층 상에 제1도전형 반도체층, 활성층, 및 제2도전형 반도체층을 순차로 적층하여 발광구조물을 형성하는 단계;Forming a light emitting structure by sequentially stacking a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the growth base layer;
    상기 제2도전형 반도체층 상에 제1전극과 제2전극을 포함하는 전극구조물을 형성하는 단계;Forming an electrode structure including a first electrode and a second electrode on the second conductive semiconductor layer;
    상기 성장기반층을 제거하여 상기 제1도전형 반도체층을 노출시키는 단계; 및Removing the growth base layer to expose the first conductive semiconductor layer; And
    상기 제1도전형 반도체층의 노출된 표면 상에 전류펼침층을 형성하는 단계;를 포함하는, 반도체 발광 소자 제조방법.And forming a current spreading layer on the exposed surface of the first conductive semiconductor layer.
  12. 청구항 11에 있어서, 상기 전극구조물을 형성하는 단계는:The method of claim 11, wherein the forming of the electrode structure comprises:
    상기 제2도전형 반도체층 상에 제2전극을 형성하는 단계;Forming a second electrode on the second conductive semiconductor layer;
    상기 제2전극, 상기 제2도전형 반도체층, 및 상기 활성층을 관통하여 상기 제1도전형 반도체층을 노출시키는 하나 이상의 비아홀을 형성하는 단계;Forming at least one via hole through the second electrode, the second conductive semiconductor layer, and the active layer to expose the first conductive semiconductor layer;
    상기 제2전극 상면과 상기 하나 이상의 비아홀의 내측벽면에 절연막을 형성하는 단계; 및Forming an insulating film on an upper surface of the second electrode and an inner wall surface of the at least one via hole; And
    상기 하나 이상의 비아홀을 통해 상기 제1도전형 반도체층과 전기적으로 연결되는 제1전극을 형성하는 단계;를 포함하는 것인, 반도체 발광 소자 제조방법.And forming a first electrode electrically connected to the first conductive semiconductor layer through the one or more via holes.
  13. 청구항 11에 있어서,The method according to claim 11,
    상기 성장기반층이 제거되어 노출된 상기 제1도전형 반도체층의 표면을 소정 두께로 더 제거하는 것인, 반도체 발광 소자 제조방법.And removing the surface of the first conductive semiconductor layer exposed by removing the growth base layer to a predetermined thickness.
  14. 청구항 13에 있어서,The method according to claim 13,
    표면이 제거된 후 상기 제1도전형 반도체층은 0.3 내지 0.5㎛의 두께를 가지는 것인, 반도체 발광 소자 제조방법.After the surface is removed, the first conductive semiconductor layer has a thickness of 0.3 to 0.5㎛, a semiconductor light emitting device manufacturing method.
  15. 청구항 14에 있어서,The method according to claim 14,
    상기 제1도전형 반도체층과 상기 제2도전형 반도체층은 각각 n형 불순물이 도핑된 n-GaN과 p형 불순물이 도핑된 p-GaN인 것인, 반도체 발광 소자 제조방법.And the first conductive semiconductor layer and the second conductive semiconductor layer are n-GaN doped with n-type impurities and p-GaN doped with p-type impurities, respectively.
  16. 청구항 13에 있어서,The method according to claim 13,
    상기 성장기반층은 사파이어기판과 불순물이 도핑되지 않은 u-GaN을 포함하는 것인, 반도체 발광 소자 제조방법.The growth base layer is a semiconductor light emitting device manufacturing method comprising a sapphire substrate and u-GaN doped with impurities.
  17. 청구항 13에 있어서,The method according to claim 13,
    상기 전류펼침층, 상기 제1도전형 반도체층, 상기 활성층, 및 상기 제2도전형 반도체층을 부분적으로 제거하여 상기 제2전극의 노출부위를 형성한 후, 상기 노출부위에 전극패드를 형성하는 단계를 더 포함하는 것인, 반도체 발광 소자 제조방법.Forming an exposed portion of the second electrode by partially removing the current spreading layer, the first conductive semiconductor layer, the active layer, and the second conductive semiconductor layer, and then forming an electrode pad on the exposed portion The method of manufacturing a semiconductor light emitting device further comprising.
PCT/KR2014/001282 2013-02-18 2014-02-18 Semiconductor light-emitting element and production method therefor WO2014126438A1 (en)

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CN109713101A (en) * 2018-12-28 2019-05-03 映瑞光电科技(上海)有限公司 GaN base LED thin-film LED and preparation method thereof
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