CN109713101A - GaN base LED thin-film LED and preparation method thereof - Google Patents
GaN base LED thin-film LED and preparation method thereof Download PDFInfo
- Publication number
- CN109713101A CN109713101A CN201811629260.XA CN201811629260A CN109713101A CN 109713101 A CN109713101 A CN 109713101A CN 201811629260 A CN201811629260 A CN 201811629260A CN 109713101 A CN109713101 A CN 109713101A
- Authority
- CN
- China
- Prior art keywords
- layer
- gan
- groove
- gan layers
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
The invention discloses a kind of GaN base LED thin-film LED and preparation method thereof, the chip includes: the undoped layer stacked gradually, N-GaN layers, quantum well layer and P-GaN layers；Groove, groove is through P-GaN layers and N-GaN layers of quantum well layer and exposure, and transparency conducting layer is formed on P-GaN layer, and the spacing between the edge of the side wall of groove and the side wall of groove is in preset range；Reflecting layer is formed on transparency conducting layer；First insulating layer, be formed on reflecting layer and cover groove side wall and P-GaN layers；Barrier layer is formed on reflecting layer；Second insulating layer is formed on barrier layer and the first insulating layer；Bonded substrate and the bonded layer in bonded substrate, bonded layer fill groove to be electrically connected with N-GaN layers；And P electrode, it is formed in the side of P-GaN layers, quantum well layer, N-GaN layers and undoped layer, and be electrically connected with P-GaN layer by barrier layer, the present invention improves the light emission rate of chip.
Description
Technical field
The present invention relates to LED chip manufacturing field, in particular to a kind of GaN base LED thin-film LED and its preparation side
Method.
Background technique
The structure of current GaN base LED is divided into positive assembling structure, inverted structure and vertical structure.Positive assembling structure LED has two
A obvious disadvantage, in the same side of LED, electric current must flow transversely through n-GaN layers, lead for the p of the LED of assembling structure positive first, n-electrode
Current crowding is caused, local pyrexia amount is high, limits driving current；Secondly as the thermal conductivity of Sapphire Substrate (growth substrates)
Difference, it is serious to hinder scattering and disappearing for heat.In order to solve heat dissipation problem, Lumileds Lighting company, the U.S. has invented
Cartridge chip (Flipchip) technology, heat dissipation effect are greatly improved, but common GaN base inverted structure LED is still
The phenomenon that transverse structure, current crowding, still exists, and still limits the further promotion of driving current.
Compared to traditional GaN base LED formal dress and inverted structure, vertical structure has good heat dissipation, can carry high current,
The advantages that luminous intensity is high, and power consumption is small, the service life is long, is widely used in general illumination, Landscape Lighting, special lighting, automobile
The fields such as illumination, become the solution of generation high-power GaN-based LED great potential, are just more and more paid close attention to by industry
And research.
The P-GaN layer surface of existing major part GaN base LED thin-film LED is successively to be formed by P-GaN layers and Ag layers
Laminated construction, Ag layers of effect as Ohmic contact and reflecting mirror simultaneously.But there are P-GaN layers and Ag layer in above structure
Between the problem of adhering to sexual abnormality, therefore further provide to be respectively formed in the P-GaN layer surface respectively and play ohm and connect
The transparency conducting layer (transparency conducting layer) of touching effect and the reflecting layer for playing the role of reflecting mirror；Such structure can be to avoid P-GaN
The problem of sexual abnormality is adhered between layer and Ag layer, while can also play stronger reflex, with more by transparency conducting layer and
Reflecting layer is separated from design, the stronger advantage of flexibility.
The study found that the transparency conducting layer of transparency conducting layer is close to the edge of the side wall of the groove to the groove
The size of distance of side wall will affect the light emission rate of the GaN base LED thin-film LED.
Summary of the invention
The object of the present invention is to provide a kind of GaN base LED thin-film LEDs and preparation method thereof, by changing transparent lead
The size of electric layer, so that transparency conducting layer exposes part P-GaN layers of N-GaN layers and the top side wall close to groove, so that
The transparency conducting layer is in preset range close to the distance of the side wall at the edge of the side wall of the groove to the groove, real
Now improve the purpose of the light emission rate of GaN base LED thin-film LED.
In order to achieve the goal above, the invention is realized by the following technical scheme:
A kind of GaN base LED thin-film LED, comprising: the undoped layer that stacks gradually, N-GaN layers, quantum well layer and P-
GaN layer；Groove, the groove is through described P-GaN layers and quantum well layer and described N-GaN layers of exposure；Transparency conducting layer, shape
On P-GaN layer described in Cheng Yu, the transparency conducting layer exposes the part of described N-GaN layers and the top side wall close to the groove
P-GaN layers, spacing of the transparency conducting layer between the edge of the side wall of the groove and the side wall of the groove is in
In preset range；Reflecting layer is formed on the transparency conducting layer；First insulating layer, first insulating layer are formed in described
On reflecting layer and described part P-GaN layers of the side wall of the covering groove and exposure；Barrier layer is formed in the reflecting layer
On.Second insulating layer is formed on the barrier layer and the first insulating layer；Bonded substrate and in the bonded substrate
Bonded layer, the bonded layer fill the groove towards the second insulating layer to be electrically connected with described N-GaN layers；It is blunt
Change layer, on the side wall and first insulating layer for covering P-GaN layers described, quantum well layer, N-GaN layers and undoped layer；With
And P electrode, be formed in the side of P-GaN layers described, quantum well layer, N-GaN layers and undoped layer, and by the barrier layer with
The P-GaN layers of electric connection.
Further, further includes: rough surface is formed in the undoped layer away from N-GaN layers of the surface.
Further, the preset range is 2 μm~50 μm.
Further, the top surface in the reflecting layer and the first insulating layer top surface are located in same level.
Further, the material of the passivation layer is SiO2；The material of the transparency conducting layer is ITO, ZnO or AZO；Institute
State the first insulating layer and be that one of SiO2, SiN, SiON, Al2O3, TiO2 are formed by single layer structure, alternatively, for SiO2,
Any combination in SiN, SiON, Al2O3, TiO2 is formed by laminated construction；The material in the reflecting layer is Ag, Al or Rh；
The material on the barrier layer is one of Ti, TiW, Pt, Ni, Au, Cr or a variety of；The second insulating layer be SiO2, SiN,
One of SiON, Al2O3, TiO2 are formed by single layer structure, alternatively, for appointing in SiO2, SiN, SiON, Al2O3, TiO2
Meaning combination is formed by laminated construction.
On the other hand, a kind of preparation method of GaN base LED thin-film LED a, comprising: growth substrates are provided, in institute
It states and is sequentially formed with undoped layer, N-GaN layers, quantum well layer and P-GaN layers in growth substrates；To P-GaN layers and the quantum
Well layer is performed etching to obtain groove, and the groove exposes N-GaN layers described；Electrically conducting transparent is formed on P-GaN layers described
Layer, the transparency conducting layer exposes part P-GaN layers of described N-GaN layers and the top side wall close to the groove, so that institute
Spacing of the transparency conducting layer between the edge of the side wall of the groove and the side wall of the groove is stated to be in preset range；
Reflecting layer is formed on the transparency conducting layer, forms the first insulating layer, the first insulating layer covering on the reflecting layer
The side wall of the groove；Barrier layer is formed on the reflecting layer；It is formed on the barrier layer and the surface of the first insulating layer
Second insulating layer performs etching first insulating layer and second insulating layer of the bottom portion of groove, exposes the N-GaN
Layer；Bonded layer is formed on the second insulating layer, and the bonded layer fills the groove, and is electrically connected with exposed N-GaN layer
It connects；A bonded substrate is bonded on the bonded layer；Remove the growth substrates；To the undoped layer, N-GaN layers, quantum
Well layer and P-GaN layers perform etching, to obtain exposing the N-MESA table top of first insulating layer；In the bonded substrate
Form passivation layer on global surface, the passivation layer cover first insulating layer, undoped layer, N-GaN layers, quantum well layer and
P-GaN layers；It defines P electrode and forms area, the P electrode forms area and is located at the P-GaN floor, quantum well layer, N-GaN floor and do not mix
The side of diamicton forms the passivation layer in area to the P electrode and the first insulating layer performs etching, exposes the barrier layer,
P electrode is formed on the barrier layer；And the passivation layer on the undoped layer surface is performed etching, expose it is described not
Doped layer.
Further, further include following procedure: the passivation layer on the luminous zone surface being performed etching, institute is exposed
State undoped layer.
Further, further include following procedure: roughening treatment being carried out to the undoped layer and forms rough surface.
Further, the area of section for being parallel to the growth substrates surface of the transparency conducting layer is less than the P-
The area of section for being parallel to the growth substrates surface of GaN layer；The reflecting layer is parallel to the growth substrates surface
Area of section is identical as the area of section for being parallel to the growth substrates surface of the transparency conducting layer.
Further, the preset range are as follows: 2 μm~50 μm.
The present invention has following technical effect that
By the present invention in that obtaining the part P-GaN that transparency conducting layer exposes N-GaN layers and the top side wall close to groove
Layer, so that the transparency conducting layer is in default model close to the distance of the side wall at the edge of the side wall of the groove to the groove
In enclosing, realizes the light emission rate for improving GaN base LED thin-film LED, improve the brightness of chip.Further, it does not mix described
Diamicton, which carries out roughening treatment formation rough surface, can be improved light emission rate.
Detailed description of the invention
Fig. 1 is the flow diagram of GaN base LED thin-film LED preparation method provided by the embodiment of the present invention；
Fig. 2 a~Figure 12 a is the GaN in the manufacturing process of GaN base LED thin-film LED provided in an embodiment of the present invention
Base LED thin-film LED the schematic diagram of the section structure；
The vertical view signal that Fig. 2 b~Figure 12 b respectively corresponds as GaN base LED thin-film LED shown in Fig. 2 a~Figure 12 a
Figure.
Specific embodiment
Below in conjunction with flow chart and schematic diagram to a kind of GaN base LED thin-film LED preparation method of the invention into
Row more detailed description, which show a preferably embodiments of the invention, it should be appreciated that those skilled in the art can modify
Invention described herein and still realize advantageous effects of the invention.Therefore, following description should be understood as ability
Field technique personnel's is widely known, and is not intended as limitation of the present invention.
For clarity, not describing whole features of a practical embodiment.In the following description, it is not described in detail well known function
Energy and structure, because they can make the present invention chaotic due to unnecessary details.It will be understood that in any one embodiment of reality
Exploitation in, it is necessary to make a large amount of implementation details to realize the specific objective of developer, such as according to related system or related quotient
The limitation of industry changes into another embodiment by an embodiment.Additionally, it should think that this development may be multiple
It is miscellaneous and time-consuming, but to those skilled in the art it is only routine work.
The study found that the meeting shadow for the transparency conducting layer that the P-GaN layer surface in GaN base LED thin-film LED is covered with
Ring the light emission rate of the GaN base LED thin-film LED.Specifically, transparency conducting layer described above is close to the side of the groove
If the edge of wall to the groove side wall distance it is too small will lead to chip voltage increase, the transparency conducting layer is close to institute
If state the edge of the side wall of groove to the groove side wall distance it is excessive will lead to chip brightness reduction, that is, lead to chip
Light emission rate reduces.
Based on above-mentioned discovery, the present invention has the transparency conducting layer being sized to solve by being formed in P-GaN layer surface
The certainly above problem.
To be clearer and more comprehensible the purpose of the present invention, feature, a specific embodiment of the invention is made with reference to the accompanying drawing
Further instruction.It should be noted that attached drawing is all made of very simplified form and using non-accurate ratio, only to side
Just, the purpose of one embodiment of the invention is lucidly aided in illustrating.
As shown in Figure 1, the present embodiment provides a kind of preparation method of GaN base LED white light thin-film LED, including it is as follows
Process:
Step S1, a growth substrates are provided, undoped layer, N-GaN layers, quantum are sequentially formed in the growth substrates
Well layer and P-GaN layers.
Step S2, described P-GaN layers and quantum well layer are performed etching to obtain groove, the groove exposes the N-
GaN layer.
Step S3, form transparency conducting layer on P-GaN layers described, described N-GaN layer of the transparency conducting layer exposure with
Close to part P-GaN the layer of top side wall of the groove, the transparency conducting layer close to the side wall of the groove edge with
Spacing between the side wall of the groove is in preset range.
Step S4, the reflecting layer is formed on the transparency conducting layer, and the first insulating layer is formed on the reflecting layer,
First insulating layer covers the side wall of the groove.
Step S5, barrier layer is formed on the reflecting layer；
Step S6, second insulating layer is formed on the barrier layer and the surface of the first insulating layer, to the bottom portion of groove
First insulating layer and second insulating layer perform etching, expose N-GaN layers described.
Step S7, form bonded layer on the second insulating layer, the bonded layer fills the groove, and with it is exposed
N-GaN layers of electrical connection；A bonded substrate is bonded on the bonded layer.
Step S8, the growth substrates are removed.
Step S9, the undoped layer, N-GaN layers, quantum well layer and P-GaN layers are performed etching, to be exposed
The N-MESA table top of first insulating layer.
Step S10, passivation layer is formed on the global surface of the bonded substrate, the passivation layer covering described first is absolutely
Edge layer, undoped layer, N-GaN layers, quantum well layer and P-GaN layers；It defines P electrode and forms area, the P electrode forms area and is located at institute
The side for stating P-GaN layers, quantum well layer, N-GaN layers and undoped layer forms the passivation layer and first in area absolutely to the P electrode
Edge layer performs etching, and exposes the barrier layer, forms P electrode on the barrier layer.
Step S11, the passivation layer on the undoped layer surface is performed etching, exposes the undoped layer.
In the present embodiment, in the transparency conducting layer that P-GaN layer surface is formed, so that the transparency conducting layer is close to described recessed
Spacing between the edge of the side wall of slot and the side wall of the groove is in preset range, realizes the mesh for improving chip light-emitting rate
's.
The preset range is 2 μm~50 μm.In the present embodiment, side wall of the transparency conducting layer close to the groove
Edge and the groove side wall between spacing can be required according to the groove design in actual chips, according on chip
The half of spacing between the central axes of two adjacent grooves determines.
It referring specifically to Fig. 2 a~Figure 12 a and corresponds to refering to Fig. 2 b~Figure 12 b, wherein Fig. 2 a~Figure 12 a shows this
The corresponding device profile structural schematic diagram of each step of preparation method of GaN base LED white light thin-film LED in inventive embodiments；
Each step of preparation method that Fig. 2 b~Figure 12 b shows GaN base LED white light thin-film LED in the embodiment of the present invention is corresponding
Device schematic top plan view.
In conjunction with shown in Fig. 2 a and Fig. 2 b, a growth substrates 100 are provided, in the growth substrates 100 from the bottom to top successively
It is formed with undoped layer 200, N-GaN layer 201, quantum well layer (MQWs) 202 and P-GaN layer 203.Growth substrates 100 can be
Sapphire Substrate, silicon substrate, SiC substrate and patterned substrate etc..The growth substrates 100 are Sapphire Substrate.
The undoped layer 200, N-GaN layer 201, quantum well layer 202 and P-GaN layer 203 can use epitaxial layer can
To use MOCVD (metal organic chemical vapor deposition, Metal Organic Chemical Vapor Deposition) and/or MBE
Growing methods such as (molecular beam epitaxy, Molecular Beam Epitaxy) are formed.200 material of undoped layer is undoped
GaN material.
As shown in Figure 2 b, the undoped layer 200, N-GaN layer 201, quantum well layer (MQWs) 202 and P-GaN layer 203 are equal
It is aligned with growth substrates 100, in the present embodiment, top view is in symmetrical square.
In conjunction with shown in Fig. 3 a and Fig. 3 b, photoetching is carried out to the P-GaN layer 203 and quantum well layer 202, etches groove
300, the groove 300 exposes the N-GaN layer 201.The groove 300 can be a variety of properties, such as round or rectangular
Equal regular figures, and be uniformly distributed, to guarantee that the current distribution of final GaN base LED white light thin-film LED can be uniform.?
In the present embodiment, the groove 300 is single circular through hole, and the single circular through hole central distribution, that is, is located at and described does not mix
On the center of diamicton 200, N-GaN layer 201, quantum well layer 202 and P-GaN layer 203 and growth substrates 100.Specifically, such as
Shown in Fig. 3 b, in the present embodiment, the circular through hole center and the undoped layer 200, N-GaN layer 201, quantum well layer
202 and P-GaN layer 203 and growth substrates 100 share a center.
In conjunction with shown in Fig. 4 a and Fig. 4 b, transparency conducting layer 400, the transparency conducting layer are formed on the P-GaN layer 203
400 area of section for being parallel to the growth substrates surface is parallel to the growth substrates table less than the P-GaN layer 203
The area of section in face.The transparency conducting layer 400 is ohmic contact layer, the low-resistances high transparency such as material ITO, ZnO or AZO
Film.
As shown in Figure 4 b, the area of section for being parallel to the growth substrates surface of the transparency conducting layer 400 is less than
The area of section for being parallel to the growth substrates surface of the GaN base LED white light thin-film LED, that is, make described
Bright conductive layer 400 exposes the edge of the GaN base LED white light thin-film LED, comprehensively right convenient for being subsequently formed barrier layer
It is protected in the reflecting layer 501 being formed on the transparency conducting layer 400.
Specifically, carve to the transparency conducting layer 400, will be close to the top side wall of the groove 300 and
The P-GaN layer 203 close to the fringe region of the transparency conducting layer 400 is exposed, so that the transparency conducting layer 400
Spacing between the edge of side wall and the side wall of the groove 300 of the groove 300 is in preset range, described pre-
If range is 2 μm~50 μm.
The transparency conducting layer 400 is equipped with P electrode and forms area 402, and the P electrode forms area 402 and is located at transparency conducting layer
At 400 lower right corner (on the basis of Fig. 4 b), and expose the P-GaN layer 203.
It is good that the transparency conducting layer 400 has the reflecting layer 501 being subsequently formed and the P-GaN layer 203
Electrical connection.
In conjunction with shown in Fig. 5 a and Fig. 5 b, reflecting layer 501 is formed on the transparency conducting layer 400, and in the groove
300, the first insulating layer 500 is formed on the surface of P-GaN layer 203 and N-GaN layer 201.
Specifically, can be by forming the first insulation film on the global surface of the growth substrates 100, i.e., described first absolutely
Edge film covers the transparency conducting layer 400, the surface of the P-GaN layer 203 and the groove 300.Utilize photoetching process
The region to form the reflecting layer 501 is defined, recycles dry etching or wet etching that will need to form reflecting layer 501
First insulation film in region removes, specifically, in the present embodiment, it is described transparent for forming the region in the reflecting layer 501
400 surface of conductive layer, using dry etching or wet etching by first insulation film on the transparency conducting layer 400
Removal forms first insulating layer 500.First insulating layer 500 is, for example, SiO2、SiN、SiON、Al2O3、TiO2In
One kind being formed by single layer structure, alternatively, first insulating layer 500 is, for example, SiO2、SiN、SiON、Al2O3, in TiO2
Any combination is formed by laminated construction.
Later, formation reflection is deposited on 400 surface of transparency conducting layer using negtive photoresist removing (Lift-off) technology
Layer 501, the material in the reflecting layer 501 are Ag, Al or Rh.
In conjunction with shown in Fig. 6 a and Fig. 6 b, barrier layer 600 is formed on the reflecting layer 501.The barrier layer 600 also covers
The part of the surface of first insulating layer, so that the barrier layer 600 coats the reflecting layer 501.It puts down on the i.e. described barrier layer 600
Area of section of the row in the growth substrates surface is greater than section for being parallel to the growth substrates surface in the reflecting layer 501
Face area, but it is less than the section face for being parallel to the growth substrates surface of the GaN base LED white light thin-film LED
Product.The material on the barrier layer 600 is one of Ti, TiW, Pt, Ni, Au, Cr or a variety of.The barrier layer 600 is on the one hand
By coating the reflecting layer 501, to protect the reflecting layer 501 to prevent from being oxidized, while the gold in blocking reflected layer 501
Belong to diffusion, on the other hand, the barrier layer 600 can alleviate answering between each film layer of GaN base LED white light thin-film LED
Power enhances GaN base LED white light thin-film LED reliability.
In conjunction with shown in Fig. 7 a and Fig. 7 b, the second insulation is formed on the barrier layer 600 and the surface of the first insulating layer 500
Layer 502, etching remove first insulating layer 500 and second insulating layer 502 of 300 bottom of groove, described to expose
N-GaN layer 201.The exposed N-GaN layer 201 is used to form Ohmic contact face with subsequent bonded layer.The second insulating layer
502 can use PECVD method deposition or electron beam evaporation plating formed.The second insulating layer 502 is, for example, SiO2、SiN、
SiON、Al2O3、TiO2One of be formed by single layer structure, alternatively, the second insulating layer 502 be, for example, SiO2、SiN、
SiON、Al2O3、TiO2In any combination be formed by laminated construction.
Specifically, forming the second insulation film (Fig. 7 a on the GaN base LED white light thin-film LED overall situation surface
It is not shown in Fig. 7 b), i.e., described second insulation film covers 500 surface of the first insulating layer and the barrier layer 600, carves
Etching off is except the first insulating layer 500 and the second insulation film on the N-GaN layer 201 of 300 bottom of groove, the etching
The second insulation film afterwards is the second insulating layer 502.
In conjunction with shown in Fig. 8 a and Fig. 8 b, bonded layer 701 is formed in the second insulating layer 502, the bonded layer 701 will
The groove 300 is filled up completely, i.e., will be filled up completely inside circular through hole, and is formed with the surface of the N-GaN of exposure layer
Ohmic contact；Bonded substrate 702 is bonded on the bonded layer 701.
Specifically, the bonded layer 701 successively includes that can form ohm with 201 surface of N-GaN layer of the exposure to connect
The first floor bonded layer (being not shown in Fig. 8 a and Fig. 8 b) of touching, barrier metal layer (being not shown in Fig. 8 a and Fig. 8 b) and for it is subsequent
The bonded layer (being not shown in Fig. 8 a and Fig. 8 b) that the bonded substrate 702 of formation is bonded, wherein the material of the first floor bonded layer
Matter is Cr or Al etc.；The material of the barrier metal layer is one of Ti, Pt and TiW or a variety of；The bonded layer material example
For example Au, Sn, AuSn alloy or NiSn alloy etc..
Bonded substrate 702 is bonded on the bonded layer 701；Wherein, the bonded substrate 702 includes and the bonded layer
The the first bonded substrate layer (being not shown in Fig. 8 a and Fig. 8 b) being in contact and the second key on the first bonded substrate layer
It closes substrate layer (being not shown in Fig. 8 a and Fig. 8 b).The first bonded substrate layer and the bonded layer have good adhesiveness,
So that the two bonding is integrated.The first bonded substrate layer material is, for example, Cr or Ti etc..The second bonded substrate layer
Material is the electrically and thermally conductive substrates of good performance such as Si, Cu, Wcu or MoCu.
In conjunction with shown in Fig. 9 a and 9b, the growth substrates 100 are removed.It can usually be gone using laser lift-off or chemical stripping
Except the growth substrates 100.In general, undoped layer 200 can be made to form one layer of metal Ga on surface using laser lift-off, therefore,
It needs using the removal metal Ga such as acid or alkali, the solution used can be HCL or KOH.
In conjunction with shown in Figure 10 a and 10b, to the undoped layer 200, N-GaN layer 201, quantum well layer 202 and P-GaN layers
203 perform etching, to obtain exposing the MESA table top of first insulating layer 500；Specifically, can be fixed using photoetching process
Justice forms the region of luminous zone, is located at using mesa etch removal in addition to described undoped at remaining region of the luminous zone
Layer 200, N-GaN layer 201, quantum well layer 202 and P-GaN layer 201 etch work up to exposing first insulating layer 500
Skill can be for using wet process or dry method (ICP) etching.The region of the luminous zone is parallel to the growth substrates surface
Area of section be less than the GaN base LED white light thin-film LED be parallel to the growth substrates surface cut
Face area, that is, so that the luminous zone is exposed the edge of the GaN base LED white light thin-film LED, it is blunt convenient for being subsequently formed
Change layer to protect entire GaN base LED white light thin-film LED, specifically, protects GaN side wall Quantum Well, mainly to improve GaN
Base LED white light thin-film LED reliability.
In conjunction with shown in Figure 11 a and 11b, passivation layer 800 is formed on the global surface of the bonded substrate 702, it is described blunt
Change layer 800 and covers first insulating layer 500 and the undoped layer 200, N-GaN layer 201, quantum well layer 202 and P-GaN
Layer 203；The material of the passivation layer 800 is silica for protecting entire chip.Using photoetching process, the P is defined
Electrode forms area, and the P electrode forms area and is located at the P-GaN floor 203, quantum well layer 202, N-GaN floor 201 and undoped layer
200 side, specifically, the region of P electrode is lithographically formed on the passivation layer 500 on the MESA table top, in the present embodiment
In, the position in the region of the formation P electrode forms the position weight in area 402 with the P electrode being formed on the transparency conducting layer 400
It closes.
It removes the passivation layer 800 and the first insulating layer 500 at the region for forming P electrode and exposes the barrier layer
600, in the present embodiment, the passivation layer 800 and the first insulation can be removed using the technique of dry etching or wet etching
Layer 500.It is formed on the barrier layer 600 at the region of P electrode and forms P electrode 900.
In conjunction with shown in Figure 11 a and 11b, the passivation layer 800 for removing the luminous zone surface exposes the undoped layer 200,
And roughening treatment is carried out to the undoped layer 200 and forms rough surface.
Surface roughening treatment is, for example, that potassium hydroxide (KOH) solution, sulfuric acid (H2SO4) solution etc. is used to carry out wet process quarter
Erosion obtains rough surface to improve light emission rate.
Please continue to refer to Figure 12 a, in another side of the invention, it is also proposed that a kind of GaN base LED white light vertical structure core
Piece is formed using the preparation method of GaN base LED white light thin-film LED as described above, and the chip includes: successively heap
Folded undoped layer 200, N-GaN layer 201, quantum well layer 202 and P-GaN layer 203；Groove 300, the groove 300 run through institute
State P-GaN layer 203 and quantum well layer 202 and the exposure N-GaN layer 201；Transparency conducting layer 400 is formed in the P-GaN
On layer 203, the part of the exposure of transparency conducting layer 400 the N-GaN layer 201 and the top side wall close to the groove 300
P-GaN layer 203, the transparency conducting layer 400 close to the side wall of the groove 300 edge and the groove 300 side wall it
Between spacing be in preset range.
The preset range is 2 μm~50 μm.In the present embodiment, side wall of the transparency conducting layer close to the groove
Edge and the groove side wall between spacing can be required according to the groove design in actual chips, according on chip
The half of spacing between the central axes of two adjacent grooves determines.
Continue to refer to figure 1 2a, the GaN base LED white light thin-film LED further include: reflecting layer 501 is formed in described
On transparency conducting layer 400；First insulating layer 200, first insulating layer 500 are formed on the reflecting layer 501 and cover institute
State the side wall of groove 300；Barrier layer 600 is formed on the reflecting layer 501；Second insulating layer 502 is formed in the blocking
On layer 600 and the first insulating layer 500；Bonded substrate 702 and the bonded layer 701 in the bonded substrate 702, the key
Layer 701 is closed towards the second insulating layer 502, and fills the groove 300 to be electrically connected with the N-GaN layer 201；Passivation
Layer 800 covers the side wall and described the of the P-GaN layer 203, quantum well layer 202, N-GaN layer 201 and undoped layer 200
On one insulating layer 500；And P electrode 900, it is formed in the P-GaN layer 203, quantum well layer 202, N-GaN layer 201 and does not mix
The side of diamicton 200, and be electrically connected by the barrier layer 600 with the P-GaN layer 203.First insulating layer 500
Top surface and 400 top surface of transparency conducting layer are located in same level.Rough surface is formed in the undoped layer
On 200 surfaces.
In conclusion by forming transparency conducting layer on p-GaN layer surface, so that the close institute of the transparency conducting layer
The distance of side wall for stating the edge of the side wall of groove to the groove is in preset range, to solve due to transparency conducting layer
The spacing of second distribution figure to the first distribution figure is excessive to cause chip voltage to increase, if spacing is too small to lead to chip
Brightness, which reduces, and the edge of transparency conducting layer is greater than the edge of luminous zone reduces chip reliability, but the table of transparency conducting layer
Area will lead to the problem of chip voltage increases if very little.Further, roughening treatment is carried out to the undoped layer to be formed
Rough surface can be improved light emission rate, improve the brightness of chip.
It is discussed in detail although the contents of the present invention have passed through above preferred embodiment, but it should be appreciated that above-mentioned
Description is not considered as limitation of the present invention.After those skilled in the art have read above content, for of the invention
A variety of modifications and substitutions all will be apparent.Therefore, protection scope of the present invention should be limited to the appended claims.
Claims (10)
1. a kind of GaN base LED thin-film LED characterized by comprising
The undoped layer that stacks gradually, N-GaN layers, quantum well layer and P-GaN layers；
Groove, the groove is through described P-GaN layers and quantum well layer and described N-GaN layers of exposure；
Transparency conducting layer is formed on the P-GaN layer, and the transparency conducting layer exposes described N-GaN layers and close to described
Part P-GaN layers of the top side wall of groove, the transparency conducting layer is close to the edge and the groove of the side wall of the groove
Side wall between spacing be in preset range；
Reflecting layer is formed on the transparency conducting layer；
First insulating layer, first insulating layer is formed on the reflecting layer and the institute of the side wall of the covering groove and exposure
State part P-GaN layers；
Barrier layer is formed on the reflecting layer；
Second insulating layer is formed on the barrier layer and the first insulating layer；
Bonded substrate and the bonded layer in the bonded substrate, the bonded layer are filled out towards the second insulating layer
The groove is filled to be electrically connected with described N-GaN layers；
Passivation layer covers the side wall and first insulating layer of P-GaN layers described, quantum well layer, N-GaN layers and undoped layer
On；And
P electrode is formed in the side of P-GaN layers described, quantum well layer, N-GaN layers and undoped layer, and passes through the barrier layer
It is electrically connected with described P-GaN layers.
2. GaN base LED thin-film LED as described in claim 1, which is characterized in that further include: rough surface is formed in
The undoped layer deviates from N-GaN layers of the surface.
3. GaN base LED thin-film LED as described in claim 1, which is characterized in that the preset range is 2 μm~50 μ
m。
4. GaN base LED thin-film LED as claimed in claim 2, which is characterized in that the top surface in the reflecting layer and institute
The first insulating layer top surface is stated to be located in same level.
5. GaN base LED thin-film LED as claimed in claim 2, which is characterized in that the material of the passivation layer is
SiO2；The material of the transparency conducting layer is ITO, ZnO or AZO；First insulating layer be SiO2, SiN, SiON, Al2O3,
One of TiO2 is formed by single layer structure, alternatively, for any combination institute shape in SiO2, SiN, SiON, Al2O3, TiO2
At laminated construction；The material in the reflecting layer is Ag, Al or Rh；The material on the barrier layer is Ti, TiW, Pt, Ni, Au, Cr
One of or it is a variety of；The second insulating layer is that one of SiO2, SiN, SiON, Al2O3, TiO2 are formed by single layer knot
Structure, alternatively, being formed by laminated construction for any combination in SiO2, SiN, SiON, Al2O3, TiO2.
6. a kind of preparation method of GaN base LED thin-film LED characterized by comprising
One growth substrates are provided, undoped layer, N-GaN layers, quantum well layer and P-GaN are sequentially formed in the growth substrates
Layer；
Described P-GaN layers and quantum well layer are performed etching to obtain groove, the groove exposes N-GaN layers described；
Transparency conducting layer, transparency conducting layer exposure N-GaN layers and the close groove are formed on P-GaN layers described
Part P-GaN layers of top side wall so that the transparency conducting layer is close to the edge and the groove of the side wall of the groove
Side wall between spacing be in preset range；
Reflecting layer is formed on the transparency conducting layer, forms the first insulating layer, first insulating layer on the reflecting layer
Cover the side wall of the groove；
Barrier layer is formed on the reflecting layer；
Second insulating layer is formed on the barrier layer and the surface of the first insulating layer, it is exhausted to described the first of the bottom portion of groove
Edge layer and second insulating layer perform etching, and expose N-GaN layers described；
Bonded layer is formed on the second insulating layer, and the bonded layer fills the groove, and is electrically connected with exposed N-GaN layer
It connects；A bonded substrate is bonded on the bonded layer；
Remove the growth substrates；
The undoped layer, N-GaN layers, quantum well layer and P-GaN layers are performed etching, to obtain exposing first insulation
The N-MESA table top of layer；
Form passivation layer on the global surface of the bonded substrate, the passivation layer covers first insulating layer, undoped
Layer, N-GaN layers, quantum well layer and P-GaN layers；
It defines P electrode and forms area, the P electrode forms area and is located at the P-GaN floor, quantum well layer, N-GaN floor and undoped layer
Side, to the P electrode formed area passivation layer and the first insulating layer perform etching, the barrier layer is exposed, described
P electrode is formed on barrier layer；And
The passivation layer on the undoped layer surface is performed etching, the undoped layer is exposed.
7. the preparation method of GaN base LED thin-film LED as claimed in claim 6, which is characterized in that further include following mistake
Journey: the passivation layer on the luminous zone surface is performed etching, the undoped layer is exposed.
8. the preparation method of GaN base LED thin-film LED as claimed in claim 7, which is characterized in that further include following mistake
Journey: roughening treatment is carried out to the undoped layer and forms rough surface.
9. the preparation method of GaN base LED thin-film LED as claimed in claim 8, which is characterized in that the electrically conducting transparent
The area of section for being parallel to the growth substrates surface of layer is parallel to the growth substrates surface less than described P-GaN layers
Area of section.
10. the preparation method of GaN base LED thin-film LED as claimed in claim 9, which is characterized in that the default model
It encloses are as follows: 2 μm~50 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811629260.XA CN109713101A (en) | 2018-12-28 | 2018-12-28 | GaN base LED thin-film LED and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811629260.XA CN109713101A (en) | 2018-12-28 | 2018-12-28 | GaN base LED thin-film LED and preparation method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109713101A true CN109713101A (en) | 2019-05-03 |
Family
ID=66259379
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811629260.XA Pending CN109713101A (en) | 2018-12-28 | 2018-12-28 | GaN base LED thin-film LED and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109713101A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110690648A (en) * | 2019-07-09 | 2020-01-14 | 上海砷芯科技有限公司 | Laser device |
| CN111244244A (en) * | 2020-03-23 | 2020-06-05 | 华引芯（武汉）科技有限公司 | High-power LED chip and manufacturing method thereof |
| CN114628563A (en) * | 2022-05-12 | 2022-06-14 | 镭昱光电科技(苏州)有限公司 | Micro LED display chip and preparation method thereof |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102447031A (en) * | 2010-10-12 | 2012-05-09 | Lg伊诺特有限公司 | Light emitting device and light emitting device package thereof |
| US20130001584A1 (en) * | 2011-06-28 | 2013-01-03 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device |
| WO2014126438A1 (en) * | 2013-02-18 | 2014-08-21 | 전남대학교산학협력단 | Semiconductor light-emitting element and production method therefor |
| CN104733577A (en) * | 2015-03-30 | 2015-06-24 | 映瑞光电科技(上海)有限公司 | LED chip of perpendicular structure and manufacturing method thereof |
| CN107068810A (en) * | 2017-02-16 | 2017-08-18 | 华灿光电（浙江）有限公司 | A kind of preparation method of light-emitting diode chip for backlight unit |
| CN108389955A (en) * | 2018-02-28 | 2018-08-10 | 华南理工大学 | A kind of method that anaerobic dry etching reduces 3D through-hole superstructure LED chip voltages in hole |
| CN108847438A (en) * | 2018-03-30 | 2018-11-20 | 映瑞光电科技(上海)有限公司 | A kind of LED chip and its manufacturing method |
-
2018
- 2018-12-28 CN CN201811629260.XA patent/CN109713101A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102447031A (en) * | 2010-10-12 | 2012-05-09 | Lg伊诺特有限公司 | Light emitting device and light emitting device package thereof |
| US20130001584A1 (en) * | 2011-06-28 | 2013-01-03 | Kabushiki Kaisha Toshiba | Semiconductor light emitting device |
| WO2014126438A1 (en) * | 2013-02-18 | 2014-08-21 | 전남대학교산학협력단 | Semiconductor light-emitting element and production method therefor |
| CN104733577A (en) * | 2015-03-30 | 2015-06-24 | 映瑞光电科技(上海)有限公司 | LED chip of perpendicular structure and manufacturing method thereof |
| CN107068810A (en) * | 2017-02-16 | 2017-08-18 | 华灿光电（浙江）有限公司 | A kind of preparation method of light-emitting diode chip for backlight unit |
| CN108389955A (en) * | 2018-02-28 | 2018-08-10 | 华南理工大学 | A kind of method that anaerobic dry etching reduces 3D through-hole superstructure LED chip voltages in hole |
| CN108847438A (en) * | 2018-03-30 | 2018-11-20 | 映瑞光电科技(上海)有限公司 | A kind of LED chip and its manufacturing method |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110690648A (en) * | 2019-07-09 | 2020-01-14 | 上海砷芯科技有限公司 | Laser device |
| CN111244244A (en) * | 2020-03-23 | 2020-06-05 | 华引芯（武汉）科技有限公司 | High-power LED chip and manufacturing method thereof |
| CN111244244B (en) * | 2020-03-23 | 2021-03-30 | 华引芯（武汉）科技有限公司 | High-power LED chip and manufacturing method thereof |
| CN114628563A (en) * | 2022-05-12 | 2022-06-14 | 镭昱光电科技(苏州)有限公司 | Micro LED display chip and preparation method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP7384848B2 (en) | Manufacturing method of semiconductor light emitting device | |
| US10559717B2 (en) | Light-emitting device and manufacturing method thereof | |
| CN205159352U (en) | Light emitting apparatus | |
| TWI616004B (en) | Semiconductor light-emitting device | |
| CN105552180B (en) | A kind of production method of novel high-pressure LED | |
| CN107819060A (en) | Semiconductor light-emitting elements | |
| US9698197B2 (en) | High-voltage flip LED chip and manufacturing method thereof | |
| TW202220234A (en) | Light-emitting device | |
| CN109713089A (en) | GaN base LED white light thin-film LED and preparation method thereof | |
| GB2542542A (en) | Vertical LED chip structure and manufacturing method therefor | |
| TWI770225B (en) | Light-emitting device | |
| WO2011030789A1 (en) | Light-emitting device | |
| CN109713101A (en) | GaN base LED thin-film LED and preparation method thereof | |
| TWI816970B (en) | Light-emitting device and manufacturing method thereof | |
| CN104638069A (en) | Vertical LED (Light-Emitting Diode) chip structure and manufacturing method thereof | |
| CN105514230B (en) | GaN base LED vertical chip structure and preparation method thereof | |
| CN109346564A (en) | A kind of production method of upside-down mounting LED chip | |
| CN104795474A (en) | High-power led chip and manufacturing method thereof | |
| WO2023093446A1 (en) | Light-emitting diode chip and light-emitting apparatus | |
| TW201624760A (en) | Light-emitting device | |
| US20170256681A1 (en) | Light-emitting element | |
| CN116885072A (en) | Light emitting diode and light emitting module | |
| CN203607447U (en) | Led chip | |
| KR100969160B1 (en) | Light emitting device and method for fabricating the same | |
| CN205692852U (en) | A kind of flip LED chips |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20190503 |
|
| WD01 | Invention patent application deemed withdrawn after publication |