WO2014107986A1 - 倍频处理方法和装置 - Google Patents

倍频处理方法和装置 Download PDF

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Publication number
WO2014107986A1
WO2014107986A1 PCT/CN2013/086750 CN2013086750W WO2014107986A1 WO 2014107986 A1 WO2014107986 A1 WO 2014107986A1 CN 2013086750 W CN2013086750 W CN 2013086750W WO 2014107986 A1 WO2014107986 A1 WO 2014107986A1
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Prior art keywords
pulse signals
pulse
type
pulse signal
adjacent
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PCT/CN2013/086750
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English (en)
French (fr)
Inventor
李丹
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北大方正集团有限公司
方正信息产业控股有限公司
北京北大方正电子有限公司
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Application filed by 北大方正集团有限公司, 方正信息产业控股有限公司, 北京北大方正电子有限公司 filed Critical 北大方正集团有限公司
Priority to US14/760,119 priority Critical patent/US9806704B2/en
Publication of WO2014107986A1 publication Critical patent/WO2014107986A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/00006—Changing the frequency
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern

Definitions

  • the present invention relates to the field of printing technology, and in particular, to a frequency doubling processing method and apparatus. Background technique
  • the main imaging principle of on-demand inkjet printing digital printing equipment is when the substrate (for example, paper) arrives at the scheduled In position, the piezoelectric element included in the imaging unit nozzle extrudes the ink under the action of a pulse signal output from the encoder, and ejects ink droplets onto the surface of the substrate.
  • the lateral resolution of the printed image is determined by the physical position of the imaging unit head, the lateral resolution of the printed image is fixed; the vertical resolution of the printed image is determined by the frequency of the pulse signal output by the encoder, ie, the encoder output. The frequency of the pulse signal is different, and the vertical resolution of the printed image is different.
  • the encoder model is fixed, the frequency of the pulse signal output by the encoder is also fixed, and the longitudinal rate of the printed image is also fixed.
  • the frequency division frequency multiplication processing is performed on the pulse signal output from the encoder. Determining a frequency division value and a frequency multiplication value corresponding to the vertical resolution according to the determined longitudinal resolution of the print image, and performing frequency multiplication processing on the pulse signal output by the encoder according to the multiplication value corresponding to the vertical resolution, according to the The frequency division value corresponding to the vertical ⁇ rate is divided by the frequency-doubled processed signal. Since there may be redundant clock cycles during the frequency doubling processing, the period size distribution of the plurality of pulse signals after the frequency doubling processing is uneven, resulting in uneven distribution of the period size of the plurality of pulse signals after the frequency division processing. The pulse signal applied to the piezoelectric crystal included in the head of the image forming member is uneven, thereby causing poor quality of the printed image.
  • the method and device for frequency doubling processing provided by the embodiment of the present invention are used to solve the method for dividing frequency doubling processing of a pulse signal output by an encoder existing in the prior art, so that the quality of the printed image is poor.
  • the encoder For the two adjacent pulse signals output by the encoder, according to the time interval of the two adjacent pulse signals and the multiplication value corresponding to the longitudinal resolution, it is determined that the first type of pulse signal between the two adjacent pulse signals needs to be inserted The second type of pulse signal;
  • Two adjacent pulse signals are subjected to frequency multiplication processing according to the determined period of the first type of pulse signal and the period of the second type of pulse signal.
  • a frequency doubling processing apparatus includes:
  • a processing module configured to: for two adjacent pulse signals outputted by the encoder, determine a phase between two adjacent pulse signals according to a time interval of the two adjacent pulse signals and a frequency multiplication value corresponding to the longitudinal resolution a type of pulse signal and a second type of pulse signal;
  • a determining module configured to determine, according to a first pulse period corresponding to two adjacent pulse signals, a period of a first type of pulse signal to be inserted between two adjacent pulse signals, and a second corresponding to the two adjacent pulse signals The pulse period determines a period of the second type of pulse signal to be inserted between two adjacent pulse signals;
  • two adjacent The pulse signal is subjected to frequency multiplication processing.
  • the encoder for two adjacent pulse signals output by the encoder, according to the time interval of the two adjacent pulse signals and the multiplication value corresponding to the longitudinal resolution, it is determined that the insertion of two adjacent pulse signals is required.
  • the first type of pulse signal and the second type of pulse signal determining a period of the first type of pulse signal to be inserted between two adjacent pulse signals according to a first pulse period corresponding to two adjacent pulse signals, and according to two a second pulse period corresponding to the adjacent pulse signal determines a period of the second type of pulse signal to be inserted between the two adjacent pulse signals; according to the determined period of the first type of pulse signal and the period of the second type of pulse signal,
  • Two adjacent pulse signals are subjected to frequency multiplication processing, since the excess clock period is equally divided as much as possible into all the pulse signals between two adjacent pulse signals, so that the period is the first type of the first pulse period
  • the pulse signal is evenly distributed among all the pulse signals that need to be inserted between two adjacent pulse signals (or a second type of pulse that makes the period
  • FIG. 1 is a schematic flowchart of a frequency multiplication processing method according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a detailed method of frequency doubling processing according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of signals after frequency doubling processing according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a frequency multiplication processing apparatus according to an embodiment of the present invention. detailed description
  • the second pulse signal needs to be inserted.
  • a pulse signal and a second type of pulse signal determining a period of the first type of pulse signal to be inserted between two adjacent pulse signals according to a first pulse period corresponding to two adjacent pulse signals, and according to two adjacent The second pulse period corresponding to the pulse signal determines a period of the second type of pulse signal to be inserted between two adjacent pulse signals; according to the determined period of the first type of pulse signal and the period of the second type of pulse signal, two The adjacent pulse signal is subjected to frequency multiplication processing, and the first type of pulse signal having a period of the first pulse period is made because the redundant clock period is equally divided as much as possible into all the pulse signals between two adjacent pulse signals.
  • the frequency doubling processing method of the embodiment of the present invention includes the following steps:
  • Step 101 Determine, according to a time interval of two adjacent pulse signals and a multiplication value corresponding to the longitudinal resolution, for the two adjacent pulse signals output by the encoder, determine the first type to be inserted between two adjacent pulse signals. a pulse signal and a second type of pulse signal;
  • Step 102 Determine, according to a first pulse period corresponding to two adjacent pulse signals, a period of a first type of pulse signal to be inserted between two adjacent pulse signals, and a second pulse period corresponding to two adjacent pulse signals. Determining the week of the second type of pulse signal to be inserted between two adjacent pulse signals Period
  • Step 103 Perform frequency multiplication processing on two adjacent pulse signals according to the determined period of the first type of pulse signal and the period of the second type of pulse signal.
  • the encoder of the embodiment of the invention is configured to output a plurality of pulse signals.
  • the encoder is an encoder with a fixed number of lines, the encoder rotates once to give a fixed number of pulse signals.
  • the multiplication value and the frequency division value corresponding to the vertical rate are determined.
  • the method further includes:
  • the time interval of two adjacent pulse signals may be stored in the execution body of the embodiment of the present invention, or may be stored in other entities, and if necessary, retrieved by the execution body of the embodiment of the present invention; When the time interval of the adjacent pulse signal changes, the time interval stored is replaced by the changed time interval.
  • the time interval between two adjacent pulse signals is K system clock cycles
  • the configured multiplication value is M
  • the frequency multiplication processing of the embodiment of the present invention is required; if ⁇ 0, it is determined that there are redundant clock cycles, and there are W redundant clock cycles.
  • step 101 determining a first type of pulse signal and a second type of pulse signal that need to be inserted between two adjacent pulse signals, including:
  • the multiplier value determine the total number of pulse signals that need to be inserted between two adjacent pulse signals; the principle in all the pulse signals between, determine the need to insert the pulse signal between two adjacent pulse signals One type of pulse signal and the second type of pulse signal.
  • the sum of the number of the first type of pulse signals and the number of the second type of pulse signals is the total number of pulse signals required to be inserted between two adjacent pulse signals.
  • step 101 it is determined that a first type of pulse signal and a second type of pulse signal between two adjacent pulse signals need to be inserted, including:
  • the candidate first type of pulse signal is determined from all the pulse signals between two adjacent pulse signals to be inserted according to the following formula:
  • ( ⁇ ( -1 ) pulse signals are the (0th pulse signal) obtained after multiplication processing, and M is the multiplication value.
  • 0 ⁇ ( 2' -1 ) is the number of binary digits corresponding to the remainder of the time interval and the multiplication value.
  • step S2 determining the first type of pulse signal from the candidate first type of pulse signal, comprising: determining a time interval and a remainder of the multiplication value corresponding to a binary z'th bit value w(0; At a specific value, the (()-th) pulse signals among all the pulse signals that need to be inserted are determined from the candidate first type pulse signals as the first type of pulse signals.
  • the specific value can be set as needed, for example, 1.
  • the ((0-1)th pulse inserted for the need to determine the first type of pulse signal is inserted
  • the first pulse period and the second pulse period corresponding to two adjacent pulse signals are determined according to the following steps:
  • the first pulse period and the second pulse period are determined according to the multiplication value and the time interval.
  • the first pulse period and the second pulse period are determined based on the quotient of the time interval and the multiplication value.
  • the time interval between two adjacent pulse signals is K system clock cycles
  • the configured multiplication value is M
  • the first pulse period is determined as ⁇
  • the two pulse periods are (0+1), or the first pulse period is determined to be (S+l), and the second pulse period is ⁇ .
  • step 102 determining, according to a first pulse period corresponding to two adjacent pulse signals, a period of the first type of pulse signal to be inserted between two adjacent pulse signals, including:
  • the period of the first type of pulse signal is determined to be the first pulse period.
  • the period of the first type of pulse signal refers to a rising edge of the first type of pulse signal to a next hop pulse signal adjacent to the first type of pulse signal between which two adjacent pulse signals need to be inserted.
  • the period between the rising edges refers to a rising edge of the first type of pulse signal to a next hop pulse signal adjacent to the first type of pulse signal between which two adjacent pulse signals need to be inserted.
  • step 102 determining, according to a second pulse period corresponding to two adjacent pulse signals, a period of the second type of pulse signal to be inserted between two adjacent pulse signals, including:
  • the period of the second type of pulse signal is determined to be the second pulse period.
  • the period of the second type of pulse signal refers to a rising edge of the second type of pulse signal to a next hop pulse signal adjacent to the second type of pulse signal between two adjacent pulse signals to be inserted.
  • the period between the rising edges refers to a rising edge of the second type of pulse signal to a next hop pulse signal adjacent to the second type of pulse signal between two adjacent pulse signals to be inserted.
  • the present invention is only for the frequency doubling processing process of two adjacent ones of the plurality of pulse signals output by the encoder, and the frequency doubling processing process of any other two adjacent pulse signals and the present invention
  • the embodiments of the embodiments are similar, and details are not described herein again.
  • step 103 multiplying two adjacent pulse signals according to the determined period of the first type of pulse signal and the period of the second type of pulse signal, including: A first type of pulse signal and a second type of pulse signal are inserted between two adjacent pulse signals according to a first pulse period corresponding to the first type of pulse signal and a second pulse period corresponding to the second type of pulse signal.
  • the method further includes: inserting two adjacent pulse signals for two adjacent pulse signals according to the frequency division value corresponding to the vertical resolution.
  • the first type of pulse signal and the second type of pulse signal are frequency-divided.
  • Step 201 The fixed type encoder included in the digital printing device rotates once to give a fixed number of pulse signals, and two outputs for the encoder The time interval between adjacent pulse signals is stored by a digital printing device;
  • Step 202 The digital printing device determines, according to the longitudinal resolution of the configured print image, a multiplication value and a frequency division value corresponding to the longitudinal rate, which need to perform frequency division multiplication processing on two adjacent pulse signals output by the encoder;
  • Step 203 The digital printing device determines that there is an extra clock cycle according to the time interval of the two adjacent pulse signals and the multiplying value, and determines the redundant clock cycle (ie, the time interval of two adjacent pulse signals and the The remainder of the multiplier value);
  • Step 204 The digital printing device determines, according to the multiplication value, a total number of pulse signals that need to be inserted between two adjacent pulse signals;
  • the configured multiplier value is 14, it is determined that the total number of pulse signals between two adjacent pulse signals needs to be inserted is 13; if there are 6 redundant clock cycles, it is necessary to make 6 redundant clock cycles. It is distributed as evenly as possible among the 13 pulses that need to be inserted between two adjacent pulse signals.
  • Step 205 The digital printing device determines, according to a time interval and a multiplication value of two adjacent pulse signals, a candidate first type pulse signal from among all pulse signals required to insert two adjacent pulse signals; preferably, digital The printing device is interposed between two adjacent pulse signals according to the following formula The candidate first type of pulse signal is determined among all the pulse signals:
  • the ((0-1)th pulse signal of all the pulse signals to be inserted is the candidate first type pulse signal (that is, the ⁇ th pulse signal obtained after the frequency multiplication processing is the candidate first type pulse signal) .
  • T(0) M*(l/2);
  • Step 206 The digital printing device determines, according to the time interval and the remainder of the multiplication value, the binary bit value corresponding to the remainder, and when it is 1, determines, among the candidate first type pulse signals, all the pulse signals that need to be inserted.
  • the pulse signal is the first type of pulse signal
  • the ((2)-1) pulse signals that need to be inserted are the first type of pulse signals, that is, the first (*(l/8)-l), the first (*(3/ 8)-l), (*(5/8)-l) and (M*(7/8) - 1) pulse signals are the first type of pulse signals;
  • the 10 and 12 pulse signals are the first type of pulse signals, that is, the 2nd, 4th, 6th, 9th, 11th and 13th pulse signals obtained after the frequency doubling processing are the first type of pulse signals.
  • the square wave indicated by the solid line is two adjacent pulse signals output by the encoder, and the broken line indicates that all the pulse signals between two adjacent pulse signals need to be inserted, and two adjacent pulses are used.
  • a pulse signal in the signal is used as the first pulse signal obtained after frequency doubling processing;
  • the second, fourth, sixth, ninth, eleventh and thirteenth pulse signals obtained after the frequency doubling processing are the first type of pulse signals.
  • Step 207 the digital printing device will need to insert a pulse signal of the first type of pulse signal among all the pulse signals between two adjacent pulse signals as the second type of pulse signal;
  • the 3rd, 5th, 7th, 8th, 10th and 12th pulse signals obtained after the frequency multiplication processing are the second type of pulse signals.
  • Step 208 The digital printing device determines, according to the multiplication value and the time interval, a first pulse period and a second pulse period corresponding to the two adjacent pulse signals;
  • Step 209 the digital printing device determines that the period of the first type of pulse signal is the first pulse period, and determines that the period of the second type of pulse signal is the second pulse period;
  • the period of the first type of pulse signal is described by taking the second pulse signal obtained by the frequency doubling processing as an example.
  • the period of the second pulse signal refers to the rising edge of the second pulse signal.
  • the time interval between the rising edges of the third pulse signal obtained after the multiplication process is described by taking the second pulse signal obtained by the frequency doubling processing as an example.
  • the midpoint of the rising straight line (or curve) of the second pulse signal can be set as needed to the midpoint of the rising straight line (or curve) of the third pulse signal obtained after the multiplication processing.
  • the time interval between the two is the period of the second pulse signal, and the period of the other pulse signals is similarly implemented.
  • Step 210 The digital printing device inserts the first type of pulse signal and the second type between two adjacent pulse signals according to the first pulse period corresponding to the first type of pulse signal and the second pulse period corresponding to the second type of pulse signal. Pulse signal;
  • the first, third, fifth, eighth, tenth, and twelve pulse signals to be inserted are the first type of pulse signals.
  • the second, fourth, sixth, seventh, ninth and eleventh pulse signals that need to be input are the second type of pulse signals, and the first pulse period corresponding to the first type of pulse signals is determined to be 72 clock cycles, and the second type of pulse signals
  • the corresponding second pulse period is 71 clock cycles;
  • the period of the 1, 3, 5, 8, 10, and 12 pulse signals inserted according to the determined needs is 72 clock cycles, and the 2nd, 4th, 6th, 7th, 9th, and 11th pulse signals to be inserted are required.
  • the period is 71 clock cycles, and the first, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 and 12 pulse signals are inserted between two adjacent pulse signals, of which two
  • the schematic diagram of the adjacent pulse signal after 14 times frequency processing is shown in FIG.
  • Step 211 The digital printing device performs frequency division processing on the two adjacent pulse signals, the first type pulse signal and the second type pulse signal that need to be inserted between two adjacent pulse signals according to the frequency division value corresponding to the vertical resolution. ;
  • FIG. 1 The schematic diagram of two adjacent pulse signals after frequency multiplication processing, a first type of pulse signal and a second type of pulse signal that need to be inserted between two adjacent pulse signals is shown in FIG.
  • Step 212 The digital printing device applies the frequency-divided pulse signal to the piezoelectric crystal included in the imaging unit nozzle.
  • an embodiment of the present invention also provides a frequency doubling processing device and a digital printing device. Since the principle of solving the problem of these devices is similar to the method of the embodiment of the present invention, the implementation of the devices can be referred to the implementation of the method. , the repetition will not be repeated.
  • a frequency doubling processing apparatus includes:
  • the processing module 401 is configured to determine, for the two adjacent pulse signals output by the encoder, according to the time interval of the two adjacent pulse signals and the multiplication value corresponding to the longitudinal resolution, to determine that the insertion of two adjacent pulse signals is required. a first type of pulse signal and a second type of pulse signal;
  • a determining module 402 configured to determine, according to a first pulse period corresponding to two adjacent pulse signals, a period of a first type of pulse signal to be inserted between two adjacent pulse signals, and a second corresponding to the two adjacent pulse signals The two pulse period determines a period of the second type of pulse signal to be inserted between two adjacent pulse signals;
  • the frequency multiplication module 403 is configured to perform frequency multiplication processing on two adjacent pulse signals according to the determined period of the first type pulse signal and the period of the second type pulse signal.
  • the processing module 401 is specifically configured to determine, according to a time interval and a multiplication value of two adjacent pulse signals, a candidate first type pulse signal from all pulse signals between two adjacent pulse signals that need to be inserted; Determining the first type of pulse signal from the candidate first type of pulse signal according to the binary value corresponding to the remainder of the time interval and the multiplication value; and dividing all the pulse signals between the two adjacent pulse signals to be inserted A pulse signal other than a type of pulse signal is used as the second type of pulse signal.
  • the processing module 401 is specifically configured to determine a candidate first type of pulse signal from all pulse signals between two adjacent pulse signals that need to be inserted according to the following formula:
  • the processing module 401 is specifically configured to determine a binary bit value corresponding to a remainder of the time interval and the multiplication value, and determine, when the W(z') is a specific value, from the candidate first type pulse signal. (Y(i) -1 )
  • the pulse signals are the first type of pulse signals.
  • the determining module 402 is specifically configured to determine the first pulse period and the second pulse period according to the multiplication value and the time interval.
  • the frequency multiplication processing apparatus and the encoder of the embodiment of the present invention may be integrated together or may be two separate devices.
  • Also provided is a computer comprising one or more computer readable media with computer executable instructions that, when executed by a computer, perform the above-described frequency doubling processing method.
  • a computing device such as that described herein has hardware, including one or more processors or processing units, system memory, and some form of computer-readable media.
  • computer readable mediums include computer storage media and communication media.
  • Computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data.
  • Communication media typically embody computer readable instructions, data structures, program modules or other data in a modulated data signal, such as a carrier wave or other transmission mechanism, and includes any information delivery medium. Combinations of any of the above are also included within the scope of the computer.
  • the computer can be used in one or more computers, such as a computer's logical connections, to operate in a networked environment.
  • computers such as a computer's logical connections
  • the computing system environment is not intended to suggest any limitation as to the scope of use or functionality of the present invention.
  • the computer environment should not be construed as having any of the components or combinations thereof shown in the exemplary operating environment.
  • Examples of well-known computing systems, environments, and/or configurations suitable for use in aspects of the present invention include, but are not limited to: personal computers, server computers, handheld or laptop devices, multiprocessor systems , microprocessor-based systems, set-top boxes, programmable consumer electronics, mobile phones, networks
  • a distributed computing environment such as a PC, a small computer, a mainframe computer, or any of the above systems or devices.
  • Embodiments of the invention may be described in the general context of computer-executable instructions, such as program modules, being executed by one or more computing devices.
  • Computer executable instructions can be organized as software into one or more computer approveable components or modules.
  • the program module includes, It is not limited to routines, programs, objects, components, and data structures that perform specific tasks or implement specific abstract data types. Any number of such components or structures thereof can be utilized to implement aspects of the present invention.
  • aspects of the invention are not limited to the specific computer-executable instructions or specific components or modules illustrated in the figures and described herein.
  • Other embodiments of the invention may be implemented in a distributed computing environment having different computer-executable instructions or group lines having more or less functionality than those illustrated and described herein.
  • program modules can be located in a memory storage device, including memory storage devices.
  • embodiments of the present invention can be provided as a method, system, or computer program product.
  • the present invention can take the form of an entirely hardware embodiment, an entirely software embodiment, or a combination of software and hardware.
  • the present invention may employ a computer-usable storage medium (including but not limited to disk storage, in one or more of which contains computer usable program code.
  • the computational instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that instructions stored in the computer readable memory produce an article of manufacture including the instruction device.
  • the instruction means implements the functions specified in one or more blocks of the flow or in a flow or block diagram of the flowchart.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Facsimile Image Signal Circuits (AREA)
  • Transmission And Conversion Of Sensor Element Output (AREA)

Abstract

本发明实施例涉及印刷技术领域，特别涉及一种倍频处理方法和装置，用以解决打印图像的质量较差的问题。本发明实施例提供的倍频处理方法包括：针对编码器输出的两个相邻脉冲信号，根据两个相邻脉冲信号的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号之间的第一类脉冲信号和第二类脉冲信号；根据两个相邻脉冲信号对应的第一脉冲周期确定需要插入的第一类脉冲信号的周期，根据两个相邻脉冲信号对应的第二脉冲周期确定需要插入的第二类脉冲信号的周期；根据确定的第一类脉冲信号的周期和第二类脉冲信号的周期，对两个相邻脉冲信号进行倍频处理。本发明实施例实现了进一步提高图像的打印质量。

Description

倍频处理方法和装置 技术领域
本发明涉及印刷技术领域， 特别涉及一种倍频处理方法和装置。 背景技术
目前数码印刷 "¾：备，尤其是按需式喷墨印刷的数码印刷设备得到了快速发 展。按需式喷墨印刷的数码印刷设备的主要成像原理是当承印体（比如，纸张） 到达预定位置时，成像部件喷头包括的压电晶体在编码器输出的脉冲信号的作 用下将油墨挤出， 并向承印体的表面喷射墨滴成像。
不同的应用场景对该按需式喷墨印刷的数码印刷设备打印的图像的分辨 率的要求也不同。由于打印图像的横向分辨率是由成像部件喷头的物理位置决 定， 因而打印图像的横向分辨率是固定的； 打印图像的纵向^ 率是由编码器 输出的脉冲信号的频率决定， 即编码器输出的脉冲信号的频率不同， 打印图像 的纵向分辨率不同， 而一旦编码器的型号固定， 编码器输出的脉冲信号的频率 也是固定的， 则打印图像的纵向^ 率也是固定的。
为了实现灵活配置打印图像的纵向分辨率，在现有技术中，是通过对编码 器输出的脉冲信号进行分频倍频处理实现的。根据确定的打印图像的纵向分辨 率，确定该纵向分辨率对应的分频值和倍频值，根据该纵向分辨率对应的倍频 值，对编码器输出的脉冲信号进行倍频处理，根据该纵向^ 率对应的分频值， 对倍频处理后的信号进行分频处理。 由于在倍频处理时， 可能存在多余的时钟 周期， 因而造成倍频处理后的多个脉冲信号的周期大小分布不均匀，从而导致 分频处理后的多个脉冲信号的周期大小分布不均匀，施加到成像部件喷头包括 的压电晶体上的脉冲信号不均匀， 进而造成打印图像的质量较差。
综上所述， 目前为了实现灵活配置打印图像的纵向分辨率， 采用对编码器 输出的脉冲信号进行分频倍频处理的方法， 使得打印出来的图像的质量较差。 本说明书中对于 现有技术的描述不应 承认或者暗示：其中的 公知常识, 发明内容
本发明实施例提供的一种倍频处理方法和装置，用以解决现有技术中存在 的采用对编码器输出的脉冲信号进行分频倍频处理的方法，使得打印出来的图 像的质量较差的问题。
本发明实施例提供的一种倍频处理方法， 包括：
针对编码器输出的两个相邻脉冲信号，根据两个相邻脉冲信号的时间间隔 和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号之间的第一类脉 冲信号和第二类脉冲信号；
根据两个相邻脉冲信号对应的第一脉冲周期确定两个相邻脉冲信号之间 需要插入的第一类脉冲信号的周期，以及根据两个相邻脉冲信号对应的第二脉 冲周期确定两个相邻脉冲信号之间需要插入的第二类脉冲信号的周期；
根据确定的第一类脉冲信号的周期和第二类脉冲信号的周期，对两个相邻 脉冲信号进行倍频处理。
本发明提供的一种倍频处理装置， 包括：
处理模块， 用于针对编码器输出的两个相邻脉冲信号，根据两个相邻脉冲 信号的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号 之间的第一类脉冲信号和第二类脉冲信号；
确定模块，用于根据两个相邻脉冲信号对应的第一脉冲周期确定两个相邻 脉冲信号之间需要插入的第一类脉冲信号的周期，以及根据两个相邻脉冲信号 对应的第二脉冲周期确定两个相邻脉冲信号之间需要插入的第二类脉冲信号 的周期；
根据确定的第一类脉冲信号的周期和第二类脉冲信号的周期，对两个相邻 脉冲信号进行倍频处理。
在本发明实施例中，针对编码器输出的两个相邻脉冲信号，根据两个相邻 脉冲信号的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲 信号之间的第一类脉冲信号和第二类脉冲信号；根据两个相邻脉冲信号对应的 第一脉冲周期确定两个相邻脉冲信号之间需要插入的第一类脉冲信号的周期， 以及根据两个相邻脉冲信号对应的第二脉冲周期确定两个相邻脉冲信号之间 需要插入的第二类脉冲信号的周期；根据确定的第一类脉冲信号的周期和第二 类脉冲信号的周期，对两个相邻脉冲信号进行倍频处理， 由于将多余的时钟周 期尽可能地均分到需要插入两个相邻脉冲信号之间的所有脉冲信号中，使得周 期为第一脉冲周期的第一类脉冲信号均匀分布在需要插入两个相邻脉冲信号 之间的所有脉冲信号中（或使得周期为第二脉冲周期的第二类脉冲信号均匀分 布在需要插入两个相邻脉冲信号之间的所有脉冲信号中）， 从而使得分频处理 后的多个脉冲信号的周期大小分布均匀，进而使得施加到成像部件喷头包括的 压电晶体上的脉冲信号均匀， 进一步提高图像的打印质量。 附图说明
图 1为本发明实施例倍频处理方法流程示意图；
图 2为本发明实施例倍频处理的详细方法 ¾½示意图;
图 3为本发明实施例倍频处理后的信号示意图；
图 4为本发明实施例倍频处理装置结构示意图。 具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。应注意到： 除非 另外具体说明， 否则在这些实施例中阐述的部件和步骤的相对布置、数字表达 式和数值不限制本发明的范围。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的，决不作为对 本发明及其应用或使用的^ Γ限制。
对于相关领域普通技术人员已知的技术、 方法和设备可能不作详细讨论， 适当情况下， 所述技术、 方法和设备应当被视为授权说明书的一部分。 在这里示出和讨论的所有示例中， 任何具体值应被解释为仅仅是示例性 的， 而不是作为限制。 因此， 示例性实施例的其它示例可以具有不同的值。
本发明实施例，针对编码器输出的两个相邻脉冲信号，根据两个相邻脉冲 信号的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号 之间的第一类脉冲信号和第二类脉冲信号；根据两个相邻脉冲信号对应的第一 脉冲周期确定两个相邻脉冲信号之间需要插入的第一类脉冲信号的周期，以及 根据两个相邻脉冲信号对应的第二脉冲周期确定两个相邻脉冲信号之间需要 插入的第二类脉冲信号的周期；根据确定的第一类脉冲信号的周期和第二类脉 冲信号的周期，对两个相邻脉冲信号进行倍频处理， 由于将多余的时钟周期尽 可能地均分到需要插入两个相邻脉冲信号之间的所有脉冲信号中，使得周期为 第一脉冲周期的第一类脉冲信号均匀分布在需要插入两个相邻脉冲信号之间 的所有脉冲信号中（或使得周期为第二脉冲周期的第二类脉冲信号均匀分布在 需要插入两个相邻脉冲信号之间的所有脉冲信号中）， 从而使得分频处理后的 多个脉冲信号的周期大小分布均匀，进而使得施加到成像部件喷头包括的压电 晶体上的脉冲信号均匀， 进一步提高图像的打印质量。
下面结合说明书附图对本发明实施例作进一步详细描述。
如图 1所示， 本发明实施例倍频处理方法包括下列步骤：
步骤 101、 针对编码器输出的两个相邻脉冲信号， 根据两个相邻脉冲信号 的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号之间 的第一类脉冲信号和第二类脉冲信号；
步骤 102、 根据两个相邻脉冲信号对应的第一脉冲周期确定两个相邻脉冲 信号之间需要插入的第一类脉冲信号的周期，以及根据两个相邻脉冲信号对应 的第二脉冲周期确定两个相邻脉冲信号之间需要插入的第二类脉冲信号的周 期；
步骤 103、 根据确定的第一类脉冲信号的周期和第二类脉冲信号的周期， 对两个相邻脉冲信号进行倍频处理。
其中， 本发明实施例的编码器， 用于输出多个脉冲信号， 在该编码器为固 定线数的编码器时， 该编码器转动一周会给出固定数量的脉冲信号。
其中，根据配置的打印图像的纵向 率，确定该纵向^ 率对应的倍频 值和分频值。
较佳地， 在步骤 101、 确定需要插入两个相邻脉冲信号之间的第一类脉冲 信号和第二类脉冲信号之前， 还包括：
根据两个相邻脉冲信号的时间间隔和该倍频值，确定是否存在多余的时钟 周期； 在不存在多余的时钟周期时， 不需要进行本发明实施例的倍频处理； 以 ½存在多余的时钟周期时， 确定该多余的时钟周期。
其中，可以将两个相邻脉冲信号的时间间隔存储在本发明实施例的执行主 体中， 也可以存储在其他实体中， 在需要时， 由本发明实施例的执行主体去调 取； 在两个相邻脉冲信号的时间间隔改变时， 用改变的时间间隔代替存储的该 时间间隔。
比如，两个相邻脉冲信号的时间间隔为 K个系统时钟周期，配置的倍频值 为 M， 确定 mod( / 7k = ?， 如果 W = 0， 则确定不存在多余的时钟周期时， 不需要进行本发明实施例的倍频处理； 如果 ≠0， 则确定存在多余的时钟周 期， 存在 W个多余的时钟周期。
较佳地， 步骤 101、 确定需要插入两个相邻脉冲信号之间的第一类脉冲信 号和第二类脉冲信号， 包括：
根据倍频值， 确定需要插入两个相邻脉冲信号之间的脉冲信号的总个数； 间的所有脉冲信号中的原则，确定需要插入两个相邻脉冲信号之间的脉冲信号 中的第一类脉冲信号和第二类脉冲信号。 其中，第一类脉冲信号的个数与第二类脉冲信号的个数之和为需要插入两 个相邻脉冲信号之间的脉冲信号的总个数。
较佳地， 步骤 101中，确定需要插入两个相邻脉冲信号之间的第一类脉冲 信号和第二类脉冲信号， 包括：
51、根据两个相邻脉冲信号的时间间隔和倍频值，从需要插入两个相邻脉 冲信号之间的所有脉冲信号中确定候选第一类脉冲信号；
52、根据时间间隔和倍频值的余数对应的二进制的取值，从候选第一类脉 冲信号中确定第一类脉冲信号；
53、将需要插入两个相邻脉冲信号之间的所有脉冲信号中除第一类脉冲信 号之外的脉冲信号作为第二类脉冲信号。
较佳地， 步骤 Sl、 根据下列公式从需要插入两个相邻脉冲信号之间的所 有脉冲信号中确定候选第一类脉冲信号：
7( ) = *(2* 7 + 1) / 2i+l 其中， 需要插入的所有脉冲信号中的第（ (0-1)个脉冲信号为候选第一 类脉冲信号（由于倍频处理时， 将两个相邻脉冲信号中的一个脉冲信号作为倍 频处理后得到的第一个脉冲信号， 因而需要插入的所有脉冲信号中的第
( ^( -1 )个脉冲信号为倍频处理后得到的第 (0个脉冲信号）， M为倍频值，
0≤i<m, 0≤_/<2' (即， /在取 o~ ( w— 1 )中的每个值时， J都要取值
0~ ( 2' -1 )), 为时间间隔和倍频值的余数对应的二进制的位数。
较佳地， 步骤 S2、 从候选第一类脉冲信号中确定第一类脉冲信号， 包括： 确定时间间隔和倍频值的余数对应的二进制的第 z'位取值 w(0； 并在 为特定值时， 从候选第一类脉冲信号中确定需要插入的所有脉冲信号中 的第 （ ()-ΐ)个脉冲信号为第一类脉冲信号。
较佳地， 特定值可以根据需要设定， 比如为 1。
较佳地， 对于确定的为第一类脉冲信号的需要插入的第（ (0— 1 )个脉 冲信号， 如果 (0不能整除， 可以对 (0向上取整、 向下取整或者四舍五入 取值。
较佳地， 步骤 102、 根据下列步骤确定两个相邻脉冲信号对应的第一脉冲 周期和第二脉冲周期：
根据倍频值和时间间隔， 确定第一脉冲周期和第二脉冲周期。
较佳地，根据时间间隔和倍频值的商，确定第一脉冲周期和第二脉冲周期。 比如，两个相邻脉冲信号的时间间隔为 K个系统时钟周期，配置的倍频值 为 M， 时间间隔和倍频值的商为 /M = 2; 则确定第一脉冲周期为 ρ， 第二 脉冲周期为（0+1)， 或确定第一脉冲周期为 (S+l)， 第二脉冲周期为 β。
较佳地， 步骤 102、 根据两个相邻脉冲信号对应的第一脉冲周期确定两个 相邻脉冲信号之间需要插入的第一类脉冲信号的周期， 包括：
确定该第一类脉冲信号的周期为该第一脉冲周期。
较佳地，第一类脉冲信号的周期是指该第一类脉冲信号的上升沿到需要插 入两个相邻脉冲信号之间的、与该第一类脉冲信号相邻的下一跳脉冲信号的上 升沿之间的周期。
较佳地， 步骤 102、 根据两个相邻脉冲信号对应的第二脉冲周期确定两个 相邻脉冲信号之间需要插入的第二类脉冲信号的周期， 包括：
确定该第二类脉冲信号的周期为该第二脉冲周期。
较佳地，第二类脉冲信号的周期是指该第二类脉冲信号的上升沿到需要插 入两个相邻脉冲信号之间的、与该第二类脉冲信号相邻的下一跳脉冲信号的上 升沿之间的周期。
需要说明的是，本发明仅是针对编码器输出的多个脉冲信号中的两个相邻 脉冲信号的倍频处理过程进行介绍，其他任意两个相邻脉冲信号的倍频处理过 程与本发明实施例的实施方式类似， 在此不再赘述。
较佳地， 步骤 103、 根据确定的第一类脉冲信号的周期和第二类脉冲信号 的周期， 对两个相邻脉冲信号进行倍频处理， 包括： 根据第一类脉冲信号对应的第一脉冲周期和第二类脉冲信号对应的第二 脉冲周期， 在两个相邻脉冲信号之间插入第一类脉冲信号和第二类脉冲信号。
较佳地， 步骤 103、 对两个相邻脉冲信号进行倍频处理之后， 还包括： 根据纵向分辨率对应的分频值，对两个相邻脉冲信号、需要插入两个相邻 脉冲信号之间的第一类脉冲信号和第二类脉冲信号进行分频处理。
如图 2所示， 本发明实施例倍频处理的详细方法包括下列步骤： 步骤 201、 数码印刷设备包含的固定型号的编码器转动一周给出固定数量 的脉冲信号，针对该编码器输出的两个相邻脉冲信号之间的时间间隔， 由数码 印刷设备进行存储；
步骤 202、 数码印刷设备根据配置的打印图像的纵向分辨率， 确定该纵向 率对应的、需要对编码器输出的两个相邻脉冲信号进行分频倍频处理的倍 频值和分频值；
步骤 203、 数码印刷设备根据两个相邻脉冲信号的时间间隔和该倍频值， 确定存在多余的时钟周期， 并且确定该多余的时钟周期（即， 两个相邻脉冲信 号的时间间隔和该倍频值的余数 )；
比如， 两个相邻脉冲信号的时间间隔为 1000T ( T为系统时钟周期）， 配 置的倍频值为 14， 则 mod(1000/14) =6， 因而确定存在多余的时钟周期， 并确 定存在 6个多余的时钟周期。
步骤 204、 数码印刷设备根据倍频值， 确定需要插入两个相邻脉冲信号之 间的脉冲信号的总个数；
比如，配置的倍频值为 14，则确定需要插入两个相邻脉冲信号之间的脉冲 信号的总个数为 13;如果存在 6个多余的时钟周期，则需要使得 6个多余的时 钟周期尽可能均匀地分布在需要插入两个相邻脉冲信号之间的 13个脉冲中。
步骤 205、 数码印刷设备根据两个相邻脉冲信号的时间间隔和倍频值， 从 需要插入两个相邻脉冲信号之间的所有脉冲信号中确定候选第一类脉冲信号； 较佳地，数码印刷设备根据下列公式从需要插入两个相邻脉冲信号之间的 所有脉冲信号中确定候选第一类脉冲信号：
Figure imgf000011_0001
其中， 需要插入的所有脉冲信号中的第（ (0 -1)个脉冲信号为候选第一 类脉冲信号（即， 倍频处理后得到的第 ^ )个脉冲信号为候选第一类脉冲信 号)。
比如， 配置的倍频值 Μ为 14， 两个相邻脉冲信号的时间间隔为 1000T, 则时间间隔和倍频值的余数为 R =6, R用二进制表示为 110， R对应的二进 制的位数 w =3;
由于 0≤ < ， 0≤_/<2'， 则 ζ'取值为 0时， '取值为 0; 取值为 1 时， '取值为 0和 1; 取值为 2时， '取值为 0、 1、 2和 3;
在 取值为 0， '取值为 0时， T(0) = M*(l/2);
在 取值为 1， '取值为 0时， y(l) = M*(l/4)， 取值为 1， '取值为 1时， ： T(l) = M*(3/4);
在 取值为 2， '取值为 0时， Γ(2) = Μ*(1/8)， 取值为 2， '取值 为 1时， 7(2) = *(3/8); ζ·取值为 2， ·取值为 2时， 7(2) = *(5/8); ζ'取值为 2， '取值为 3时， y(2) = M*(7/8);
因而确定倍频处理后得到的第 Γ(0) = Μ*(1/2)、 7(1) = * (1/4)、 7(1) = *(3/4) 、 7(2) = *(1/8) 、 7(2) = *(3/8) 、 (2) = M*(5/8)和 (2) = M*(7/8)个脉冲信号为候选第一类脉冲信号。 其中，将两个相邻脉冲信号中的一个脉冲信号作为倍频处理后得到的第一 个脉冲信号， 因而针对倍频处理后得到的第 (0) = *(l/2)个脉冲信号， 即， 为需要插入的第 （ M*(l/2) - 1 )个脉冲信号， 其他候选第一类脉冲信 号的实施方式与本发明实施例 (0) = Μ*(1/2)的实施方式类似， 在此不再 赘述。
步骤 206、 数码印刷设备根据时间间隔和倍频值的余数， 确定该余数对应 的二进制的第 位取值 并在 为 1时， 从候选第一类脉冲信号中确 定需要插入的所有脉冲信号中的第（ (0—1 )个脉冲信号为第一类脉冲信号； 比如， 配置的倍频值 M为 14， 两个相邻脉冲信号的时间间隔为 1000T, 则时间间隔和倍频值的余数为 W =6， W用二进制表示为 110， W(z')为 W用二 进制表示时， 第 位取值， 则 W(0) = 0， R(l) = 1 , R(2) = 1；
由于 W(0) = 0， 因而需要插入的第 （ (0)— 1 )个脉冲信号不是第一类 脉冲信号；
由于 7?(1) = 1， 因而需要插入的第（ (i)— 1 )个脉冲信号^一类脉冲 信号， 即第（ M*(l/4)—l )个和第（ M*(3/4)— 1 )个脉冲信号是第一类 脉冲信号；
由于 W(2) = l， 因而需要插入的第 （ (2)— 1 )个脉冲信号是第一类脉 冲信号，即第（ *(l/8)-l )个、第（ *(3/8)-l )个、第（ *(5/8)-l ) 个和第（ M*(7/8) - 1 )个脉冲信号是第一类脉冲信号；
因而， 一共确定 6个（即， 时间间隔和倍频值的余数）第一类脉冲信号， 对确定的 和 (2)进行向上取整， 则确定需要插入的第 1、 3、 5、 8、 10 和 12个脉冲信号为第一类脉冲信号， 即， 倍频处理后得到的第 2、 4、 6、 9、 11和 13个脉冲信号为第一类脉冲信号。
如图 3所示，假设实线表示的方波为编码器输出的两个相邻脉冲信号，虚 线表示的为需要插入两个相邻脉冲信号之间的所有脉冲信号，将两个相邻脉冲 信号中的一个脉冲信号作为倍频处理后得到的第一个脉冲信号；
则倍频处理后得到的第 2、 4、 6、 9、 11和 13个脉冲信号为第一类脉冲信 号。 步骤 207、 数码印刷设备将需要插入两个相邻脉冲信号之间的所有脉冲信 号中除第一类脉冲信号 ^卜的脉冲信号作为第二类脉冲信号；
如图 3所示， 倍频处理后得到的第 3、 5、 7、 8、 10和 12个脉冲信号为第 二类脉冲信号。
步骤 208、 数码印刷设备根据倍频值和时间间隔， 确定两个相邻脉冲信号 对应的第一脉冲周期和第二脉冲周期；
比如， 配置的倍频值 M为 14， 两个相邻脉冲信号的时间间隔为 1000T, 则时间间隔和倍频值的商为 1000/14 = 71， 因而确定第一脉冲周期为 71+1=72 个时钟周期， 第二脉冲周期为 71个时钟周期；
步骤 209、数码印刷设备确定该第一类脉冲信号的周期为该第一脉冲周期， 以及确定该第二类脉冲信号的周期为该第二脉冲周期；
如图 3所示，以倍频处理后得到的第 2个脉冲信号为例对第一类脉冲信号 的周期进行说明，该第 2个脉冲信号的周期是指该第 2个脉冲信号的上升沿到 倍频处理后得到的第 3个脉冲信号的上升沿之间的时间间隔。
针对上升时间大于 0的情况，可以根据需要设置该第 2个脉冲信号的上升 直线（或曲线）的中点到倍频处理后得到的第 3个脉冲信号的上升直线（或曲 线）的中点之间的时间间隔为该第 2个脉冲信号的周期， 其他脉冲信号的周期 的实施情况与之类似。
步骤 210、 数码印刷设备根据第一类脉冲信号对应的第一脉冲周期和第二 类脉冲信号对应的第二脉冲周期，在两个相邻脉冲信号之间插入第一类脉冲信 号和第二类脉冲信号；
比如， 配置的倍频值 M为 14， 两个相邻脉冲信号的时间间隔为 1000T, 则确定需要插入的第 1、 3、 5、 8、 10和 12个脉冲信号为第一类脉冲信号， 需 t入的第 2、 4、 6、 7、 9和 11个脉冲信号为第二类脉冲信号， 并确定第一 类脉冲信号对应的第一脉冲周期为 72个时钟周期， 第二类脉冲信号对应的第 二脉冲周期为 71个时钟周期； 则根据确定的需要插入的第 1、 3、 5、 8、 10和 12个脉冲信号的周期为 72 个时钟周期， 以及需要插入的第 2、 4、 6、 7、 9和 11个脉冲信号的周期为 71 个时钟周期， 在两个相邻脉冲信号之间插入第 1、 2、 3、 4、 5、 6、 7、 8、 9、 10、 11和 12个脉冲信号，其中，对两个相邻脉冲信号进行 14倍频处理后的示 意图如图 3所示。
步骤 211、 数码印刷设备根据纵向分辨率对应的分频值， 对两个相邻脉冲 信号、需要插入两个相邻脉冲信号之间的第一类脉冲信号和第二类脉冲信号进 行分频处理；
其中，倍频处理后的两个相邻脉冲信号、需要插入两个相邻脉冲信号之间 的第一类脉冲信号和第二类脉冲信号的示意图如图 3所示。
步骤 212、 数码印刷设备将分频处理后的脉冲信号施加到成像部件喷头包 括的压电晶体上。
基于同一发明构思，本发明实施例中还提供了一种倍频处理装置和数码印 刷设备， 由于这些设备解决问题的原理与本发明实施例的方法相似， 因此这些 设备的实施可以参见方法的实施， 重复之处不再赘述。
图 4为本发明实施例倍频处理装置的结构示意图， 如图所示，本发明实施 例的倍频处理装置包括：
处理模块 401， 用于针对编码器输出的两个相邻脉冲信号， 根据两个相邻 脉冲信号的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲 信号之间的第一类脉冲信号和第二类脉冲信号；
确定模块 402， 用于根据两个相邻脉冲信号对应的第一脉冲周期确定两个 相邻脉冲信号之间需要插入的第一类脉冲信号的周期，以及根据两个相邻脉冲 信号对应的第二脉冲周期确定两个相邻脉冲信号之间需要插入的第二类脉冲 信号的周期；
倍频模块 403， 用于根据确定的第一类脉冲信号的周期和第二类脉冲信号 的周期， 对两个相邻脉冲信号进行倍频处理。 较佳地， 处理模块 401， 具体用于根据两个相邻脉冲信号的时间间隔和倍 频值，从需要插入两个相邻脉冲信号之间的所有脉冲信号中确定候选第一类脉 冲信号； 根据时间间隔和倍频值的余数对应的二进制的取值，从候选第一类脉 冲信号中确定第一类脉冲信号； 以及将需要插入两个相邻脉冲信号之间的所有 脉冲信号中除第一类脉冲信号之外的脉冲信号作为第二类脉冲信号。
较佳地， 处理模块 401， 具体用于根据下列公式从需要插入两个相邻脉冲 信号之间的所有脉冲信号中确定候选第一类脉冲信号：
7( ) = * (2 * y + 1) / 2i+l 其中， 需要插入的所有脉冲信号中的第（ (0 -1 )个脉冲信号为候选第一 类脉冲信号， M为倍频值， 0≤i < m , ≤j < 2 w为时间间隔和倍频值 的余数对应的二进制的位数。
较佳地， 处理模块 401， 具体用于确定时间间隔和倍频值的余数对应的二 进制的第 位取值 并在 W(z')为特定值时， 从候选第一类脉冲信号中确 定第 ( Y(i) -1 )个脉冲信号为第一类脉冲信号。
较佳地， 确定模块 402， 具体用于根据倍频值和时间间隔， 确定第一脉冲 周期和第二脉冲周期。
本发明实施例的倍频处理装置和编码器可以集成在一起，也可以是两个分 立的装置。
开还提供一种或多种具有计算机可执行指令的计算机可读介廣，所述 指令在由计算机执行时， 执行倍频处理方法， 其特 ^于， 该方法包括： 针对 编码器输出的两个相邻脉冲信号，根据两个相邻脉冲信号的时间间隔和纵向分 辨率对应的倍频值，确定需要插入两个相邻脉冲信号之间的第一类脉冲信号和 第二类脉冲信号；根据所述两个相邻脉冲信号对应的第一脉冲周期确定所述两 个相邻脉冲信号之间需要插入的第一类脉冲信号的周期，以及根据所述两个相 邻脉冲信号对应的第二脉冲周期确定所述两个相邻脉冲信号之间需要插入的 第二类脉冲信号的周期；根据确定的第一类脉冲信号的周期和第二类脉冲信号 的周期， 对所述两个相邻脉冲信号进行倍频处理。
开还提供一台包括带有计算机可执行指令的一个或多个计算机可读 介廣的计算机， 所述指令在由计算机执行时执行上述倍频处理方法。
示例性操作环境
诸如此处所描述的计算设备具有硬件， 包括一个或多个处理器或处理单 元、 系统存储器和某种形式的计算机可读介廣。作为示例而非限制， 计算机可 读介廣包括计算机存储介廣和通信介廣。计算机存储介廣包括以用于存储诸如 计算机可读指令、数据结构、程序模块或其它数据的信息的任何方法或技术实 现的易失性与非易失性、可移动与不可移动介廣。通信介廣一般以诸如载波或 其它传输机制等已调制数据信号来体现计算机可读指令、数据结构、程序模块 或其它数据， 并且包括任何信息传递介廣。 以上的任一种的組合也包括在计算 机可读介廣的范围之内。
计算机可使用至一个或多个 计算机，如 计算机的逻辑连接在网络 化环境中操作。尽管结合示例性计算系统环境进行了描述，但本发明的各实施 例可用于众多其它通用或专用计算系统环境或配置。计算系统环境并非旨在对 本发明的«¾"方面的使用范围或功能提出任何限制。此外， 计算机环境也不应 被解释成对于示例性操作环境中所示出的任一組件或其組合有任何依赖或要 求。 适用于本发明的各方面的公知的计算系统、 环境和 /或配置的示例包括， 但不仅限于： 个人计算机、 服务器计算机、 手持式或膝上型 i殳备、 多处理器系 统、 基于微处理器的系统、 机顶盒、 可编程消费电子产品、 移动电话、 网络
PC、 小型计算机、 大型计算机、 包括上面的系统或设备的中的任何一种的分 布式计算环境等等。
可以在由一台或多台计算设备执行的诸如程序模块之类的计算机可执行 的指令的一般上下文中来描述本发明的各实施例。计算机可执行指令可作为软 件被組织成一个或多个计算机可批行組件或模块。 一般而言， 程序模块包括， 但不限于，执行特定任务或实现特定抽象数据类型的例程、程序、对象、組件， 以及数据结构。可以利用任何数量的这样的組件或^及其組织来实现本发明 的各方面。例如，本发明的各方面不仅限于附图中所示出并且在此处所描述的 特定计算机可执行指令或特定組件或模块。本发明的其他实施例可以包括具有 比此处所示出和描述的功能更多或更少功能的不同的计算机可执行指令或組 行的分布式计算环境中实现。在分布式计算环境中，程序模块可以位于包括存 储器存 殳备在内的 和 计算 ^储介廣中。
域内的技术人员应明白， 本发明的实施例可提供为方法、 系统、或计 算机程序产品。 因此， 本发明可采用完全硬件实施例、 完全软件实施例、 或结 合软件和硬件方面的实施例的形式。 而且，本发明可采用在一个或多个其中包 含有计算机可用程序代码的计算机可用存储介廣 (包括但不限于磁盘存储器、
CD-ROM, 光学存储器等）上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、 i殳备（系统）、 和计算^序产 品的流程图和 /或方框图来描述的。应理解可由计算机程序指令实现流程图和 /或方框图中的每一 ¾½和 /或方框、以及 图和 /或方框图中的 ¾½和 / 或方框的结合。 可提供这些计算机程序指令到通用计算机、 专用计算机、嵌入 式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算 机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一 个流程或多个流程和 /或方框图一个方框或多个方框中指定的功能的装置。
这些计算^^序指令也可存储在能引导计算机或其他可编程数据处理设 备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中 的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个 流程和 /或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理 :备上，使 得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处 理，从而在计算 其他可编程设备上执行的指令提供用于实现在 图一个 流程或多个流程和 /或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本发明的优选实施例，但 ^域内的技^ 员一旦得知了基 本创造性概念， 则可对这些实施例作出另外的变更和修改。 所以， 所附权利要 求意^ ^释为包括优选实施例以及落入本发明范围的所有变更和修改。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发 明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及 其等同技术的范围之内， 则本发明也意图包^ t些改动和变型在内。

Claims

1、 一种倍频处理方法， 其特征在于， 该方法包括：
针对编码器输出的两个相邻脉冲信号，根据两个相邻脉冲信号的时间间隔 和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号之间的第一类脉 冲信号和第二类脉冲信号；
根据所述两个相邻脉冲信号对应的第一脉冲周期确定所述两个相邻脉冲 信号之间需要插入的第一类脉冲信号的周期，以及根据所述两个相邻脉冲信号 对应的第二脉冲周期确定所述两个相邻脉冲信号之间需要插入的第二类脉冲 信号的周期；
根据确定的第一类脉冲信号的周期和第二类脉冲信号的周期，对所述两个 相邻脉冲信号进行倍频处理。
2、 如权利要求 1所述的方法， 其特征在于， 确定需要插入两个相邻脉冲 信号之间的第一类脉冲信号和第二类脉冲信号， 包括：
根据两个相邻脉冲信号的时间间隔和所述倍频值，从需要插入两个相邻脉 冲信号之间的所有脉冲信号中确定候选第一类脉冲信号；
根据所述时间间隔和所述倍频值的余数对应的二进制的取值，从候选第一 类脉冲信号中确定第一类脉冲信号；
将需要插入两个相邻脉冲信号之间的所有脉冲信号中除第一类脉冲信号 ^^卜的脉冲信号作为第二类脉冲信号。
3、 如权利要求 2所述的方法， 其特征在于， 根据下列公式从需要插入两 个相邻脉冲信号之间的所有脉冲信号中确定候选第一类脉冲信号：
( ) = M * (2 * j + 2 +1 其中， 所述需要插入的所有脉冲信号中的第（ ^ ') -1 )个脉冲信号为候选 第一类脉冲信号， M为所述倍频值， 0≤i < m , ≤j < 2 w为所述时间 间隔和所述倍频值的余数对应的二进制的位数。
4、 如权利要求 3所述的方法， 其特征在于， 从候选第一类脉冲信号中确 定第一类脉冲信号， 包括：
确定所述时间间隔和所述倍频值的余数对应的二进制的第 位取值 w(0； 并在所述 W(z')为特定值时， 从候选第一类脉冲信号中确定所述第 ( Y(i) -1 ) 个脉冲信号为第一类脉冲信号。
5、 如权利要求 1所述的方法， 其特征在于， 根据下列步骤确定所述第一 脉冲周期和第二脉冲周期：
根据所述倍频值和所述时间间隔， 确定所述第一脉冲周期和第二脉冲周 期。
6、 一种倍频处理装置， 其特征在于， 该装置包括：
处理模块， 用于针对编码器输出的两个相邻脉冲信号，根据两个相邻脉冲 信号的时间间隔和纵向分辨率对应的倍频值，确定需要插入两个相邻脉冲信号 之间的第一类脉冲信号和第二类脉冲信号；
确定模块，用于根据所述两个相邻脉冲信号对应的第一脉冲周期确定所述 两个相邻脉冲信号之间需要插入的第一类脉冲信号的周期，以及根据所述两个 相邻脉冲信号对应的第二脉冲周期确定所述两个相邻脉冲信号之间需要插入 的第二类脉冲信号的周期；
倍频模块，用于根据确定的第一类脉冲信号的周期和第二类脉冲信号的周 期， 对所述两个相邻脉冲信号进行倍频处理。
7、 如权利要求 6所述的装置， 其特征在于， 所述处理模块， 具体用于根 据两个相邻脉冲信号的时间间隔和所述倍频值，从需要插入两个相邻脉冲信号 之间的所有脉冲信号中确定候选第一类脉冲信号；根据所述时间间隔和所述倍 频值的余数对应的二进制的取值，从候选第一类脉冲信号中确定第一类脉冲信 号； 以及将需要插入两个相邻脉冲信号之间的所有脉冲信号中除第一类脉冲信 号之外的脉冲信号作为第二类脉冲信号。
8、 如权利要求 7所述的装置， 其特征在于， 所述处理模块， 具体用于根 一类脉冲信号：
7( = *(2* j + 2i+i
其中， 所述需要插入的所有脉冲信号中的第（ ^ ) -1 )个脉冲信号为候选 第一类脉冲信号， M为所述倍频值， 0≤i<m, 0≤j< , w为所述时间 间隔和所述倍频值的余数对应的二进制的位数。
9、 如权利要求 8所述的装置， 其特征在于， 所述处理模块， 具体用于确 定所述时间间隔和所述倍频值的余数对应的二进制的第 位取值 W(z')；并在所 述 为特定值时， 从候选第一类脉冲信号中确定所述第 ( Υ{ί) -1 )个脉冲 信号为第一类脉冲信号。
10、 如权利要求 6所述的装置， 其特征在于， 所述确定模块， 具体用于根 据所述倍频值和所述时间间隔， 确定所述第一脉冲周期和第二脉冲周期。
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