WO2014107924A1 - 基于高频数字信号边沿锁定的激光外差干涉信号处理方法 - Google Patents
基于高频数字信号边沿锁定的激光外差干涉信号处理方法 Download PDFInfo
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B9/00—Measuring instruments characterised by the use of optical techniques
- G01B9/02—Interferometers
- G01B9/02001—Interferometers characterised by controlling or generating intrinsic radiation properties
- G01B9/02002—Interferometers characterised by controlling or generating intrinsic radiation properties using two or more frequencies
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B9/00—Measuring instruments characterised by the use of optical techniques
- G01B9/02—Interferometers
- G01B9/02083—Interferometers characterised by particular signal processing and presentation
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/14—Measuring arrangements characterised by the use of optical techniques for measuring distance or clearance between spaced objects or spaced apertures
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B9/00—Measuring instruments characterised by the use of optical techniques
- G01B9/02—Interferometers
- G01B9/02001—Interferometers characterised by controlling or generating intrinsic radiation properties
- G01B9/02007—Two or more frequencies or sources used for interferometric measurement
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B9/00—Measuring instruments characterised by the use of optical techniques
- G01B9/02—Interferometers
- G01B9/02055—Reduction or prevention of errors; Testing; Calibration
- G01B9/02062—Active error reduction, i.e. varying with time
- G01B9/02067—Active error reduction, i.e. varying with time by electronic control systems, i.e. using feedback acting on optics or light
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B9/00—Measuring instruments characterised by the use of optical techniques
- G01B9/02—Interferometers
- G01B9/02055—Reduction or prevention of errors; Testing; Calibration
- G01B9/0207—Error reduction by correction of the measurement signal based on independently determined error sources, e.g. using a reference interferometer
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01P—MEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
- G01P3/00—Measuring linear or angular speed; Measuring differences of linear or angular speeds
- G01P3/36—Devices characterised by the use of optical means, e.g. using infrared, visible, or ultraviolet light
Definitions
- Laser heterodyne interference signal processing method based on high frequency digital signal edge locking
- the present invention relates to a laser heterodyne interference signal processing method, and more particularly to a laser heterodyne interference signal processing method based on high frequency digital signal edge locking.
- the laser heterodyne interferometer has excellent response performance, high measurement accuracy, strong anti-interference ability, insensitivity to laser light intensity variation and direct traceability to the definition of meters, so it is widely used for high-precision displacement measurement and super Precision machining and inspection and calibration of instruments.
- the signal processing methods for laser heterodyne interference displacement measurement can be roughly divided into two categories: One is phase demodulation method, which realizes phase measurement by detecting the phase difference between the reference signal and the measurement signal, and has the characteristics of high measurement resolution book rate; One type is the frequency demodulation method, which realizes displacement measurement by directly counting the Doppler frequency, and has the characteristics of high measurement speed.
- the quality of the signal directly affects the accuracy and stability of the counting, when the oscilloscope is used for shaping
- the heterodyne interference signal is amplified, it is found that the rising edge of the signal is not ideal: On the one hand, the rising edge of the signal is not steep, which will cause the triggering time of the pulse counting to be inaccurate, thus affecting the phase difference detection of the reference signal and the measured signal.
- the whole-cycle interference fringe counting pulse is triggered incorrectly, which affects the correctness of the measurement result. Therefore, the improvement of laser heterodyne interference signal quality is a key technical problem that needs to be solved to improve measurement accuracy and accuracy.
- An object of the present invention is to provide a laser heterodyne interference signal processing method based on edge locking of high frequency digital signals.
- the high-frequency digital pulse signal is used to lock the rising edge of the interference signal, which not only improves the steepness of the rising edge of the interference signal, but also eliminates the false pulse jump caused by the noise, improves the quality of the interference signal, and solves the constraint interference measurement. Key technical issues with further improvements in accuracy.
- the reference signal and measurement signal of the laser heterodyne interferometer are processed by the respective photodetector, signal amplifier, filter circuit, voltage comparator and high frequency digital edge lock module, and then sent to the pulse count synchronous latch processing module. Obtaining the number of complete periodic interference fringes N ref , ⁇ and the number of filled pulses n ref in the period of one interference fringe, « mea ;
- ⁇ is the laser wavelength
- the invention adopts a high-frequency digital pulse signal to lock the rising edge of the laser heterodyne interference signal, thereby improving the steepness of the rising edge of the interference signal, eliminating the false pulse jump caused by the noise, improving the quality of the interference signal, and not changing the signal.
- the cycle does not have the phase delay of the rising edge of the signal, so it does not affect the subsequent phase measurement, which ensures the correctness of the laser heterodyne interference signal processing, and the signal processing method is easy to implement.
- the invention is suitable for optimizing the processing of the interference signal quality in the interferometric measurement technology, and improves the accuracy and measurement precision of the measurement result.
- Figure 1 is a schematic block diagram of the present invention.
- Fig. 2 is a block diagram showing the principle of processing the rising edge of the interference signal by using the high frequency digital pulse signal.
- Figure 3 is a waveform diagram showing the method of locking the rising edge of the interference signal using a high-frequency digital pulse signal.
- the light source of the laser heterodyne interferometer is a dual-frequency He-Ne frequency-stabilized laser
- the output laser wavelength is 632.8 nm
- the frequency difference is 2.26 MHz
- the maximum operating frequency of the photodetector is 10 MHz.
- EP2C20Q240C8N programmable logic chip (FPGA) to achieve high frequency based Laser heterodyne interference signal processing method for edge locking of word signals.
- the EP2C20Q240C8N chip has an internal maximum operating frequency of up to 400MHz, a 10-port operating frequency of 50MHz, and a built-in phase-locked loop.
- the laser heterodyne interference signal processing method based on the edge locking of the high frequency digital signal is implemented as follows:
- the reference signal and the measurement signal of the laser heterodyne interferometer detected by the first photodetector 1 and the second photodetector 8 are respectively amplified by the first signal amplifier 2 and the second signal amplifier 9, and amplified.
- the signal reaches the signal processing board via the transmission line, and then is filtered by the first filter circuit 3 and the second filter circuit 10, respectively, to filter out noise interference, and the analog interference is respectively performed by the first voltage comparator 4 and the second voltage comparator 11.
- the signal is converted into a digital interference signal; the reference digital interference signal and the measured digital interference signal enter the FPGA to the first high frequency digital edge lock module 5 and the second high frequency digital edge lock module 12.
- the active crystal oscillator 7 outputs an external clock signal of 50MHz, and is processed by the internal phase-locked multiplying module 13 of the FPGA to obtain a frequency/400MHz FPGA internal high-frequency clock signal, which is used on the one hand.
- the high frequency digital pulse signal of the first high frequency digital edge locking module 5 and the second high frequency digital edge locking module 12 respectively locks the rising edges of the reference digital interference signal and the measured digital interference signal, and is used on the other hand.
- the reference digital interference signal and the measured digital interference signal after the rising edge lock processing arrive at the pulse count synchronous latch processing module 6, in which the entire period interference fringe count and the interference of the reference signal and the measurement signal are completed.
- the fill pulse count in the fringe period, the count period of the reference signal and the measurement signal are N ref and N wake up, and the fill pulse count values in one interference fringe period are respectively ref and mea ,
- the serial communication module 14 is sent to the computer, and according to the following formula, the displacement and speed of the measured object are obtained:
- FIG. 2 it is a block diagram of the method for processing the rising edge of the interference signal by using the high frequency digital pulse signal. That is, the further description of the first high-frequency digital edge locking module 5 or the second high-frequency digital edge locking module 12 in FIG. 1 is specifically implemented as follows:
- High frequency digital edge locking module includes counting circuit 15 and locking processing circuit 16. Shaped The subsequent digital interference signal (pre-locking signal) reaches the high-frequency digital edge-locking processing module.
- the locking processing circuit 16 first locks the input digital interference signal to a high level, and simultaneously counts The circuit 15 pulses the high frequency digital pulse signal.
- the trigger lock processing circuit 16 locks the digital interference signal to a low level, so that the original digital interference signal is locked into a constant power.
- Figure 3 is a waveform diagram showing the method of processing the rising edge of the interference signal by using a high-frequency digital pulse signal.
- the high-frequency digital signal edge locking processing implemented by the high-frequency digital edge locking module can modulate the input digital interference signal (pre-locking signal) into a high-level narrow pulse signal (locked signal) under the action of the high-frequency digital pulse signal.
- FPGA internal high frequency clock signal frequency is 400MHz, the high-level pulse width of the signal by the minimum achievable after lock processing 0.5_ 8 s.
- the high-frequency digital signal edge locking processing method can significantly improve the rising edge steepness of the interference signal, eliminate the multi-rising edge phenomenon, improve the stability and correctness of the interference signal processing, and facilitate the laser heterodyne interference technology to implement high speed and high speed. Precision displacement measurement.
- the laser heterodyne interference signal processing method based on edge locking of high-frequency digital signals is used.
- the maximum operating frequency of the photodetector is 10 MHz, and the internal working of the EP2C20Q240C8N chip.
- the frequency is 400MHz and the 10-port operating frequency is 50MHz, the method can realize the laser heterodyne interference precision displacement of the measured object with a maximum motion velocity of about 2.4m/s.
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- Automation & Control Theory (AREA)
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- Instruments For Measurement Of Length By Optical Means (AREA)
Abstract
一种基于高频数字信号边沿锁定的激光外差干涉信号处理方法,包括:激光外差干涉仪的参考信号和测量信号经各自的光电探测器(1,8)、信号放大器(2,9)、滤波电路(3,10)、电压比较器(4,11)和高频数字边沿锁定模块(5,12)处理后,送入脉冲计数同步锁存处理模块(6),得到参考信号和测量信号的整周期干涉条纹数和一个干涉条纹周期内的填脉冲数,经串口通信模块(14)送至计算机,得到被测对象的位移和速度;采用高频数字脉冲信号对激光外差干涉信号的上升沿进行锁定处理,可以提高干涉信号上升沿的陡度和消除噪声干扰引起的错误脉冲,不会改变信号的周期,不存在信号上升沿的相位延迟,提高了后续信号处理的准确性和稳定性。
Description
基于高频数字信号边沿锁定的激光外差干涉信号处理方法 技术领域
本发明涉及激光外差干涉信号处理方法, 尤其是涉及一种基于高频数字信 号边沿锁定的激光外差干涉信号处理方法。
背景技术
激光外差干涉仪具有响应速度快、 测量精度高、 抗干扰能力强、 对激光的 光强变化不敏感和可直接溯源到说米定义等优越性能, 因此被广泛用于高精度位 移测量、 超精密加工制造及仪器的检测校准中。 激光外差干涉位移测量的信号 处理方法大致可分为两类: 一类为相位解调法, 通过检测参考信号和测量信号 间的相位差实现相位测量, 具有高测量分辨书率的特点; 另一类为频率解调法, 通过直接对多普勒频率进行计数实现位移测量, 具有高测量速度的特点。 在外 差干涉信号的频率解调法中, 在直接对多普勒频移信号进行脉冲计数实现位移 测量中, 信号的质量直接影响到计数的准确性和稳定性, 当用示波器对整形处 理后的外差干涉信号进行放大观察时, 发现信号的上升沿并不理想: 一方面是 信号的上升沿陡度不高, 会导致脉冲计数的触发时刻不准确, 从而影响参考信 号和测量信号相位差检测的精度; 另一方面由于噪声和高频谐波的干扰引起的 多上升沿现象, 会导致整周期干涉条紋计数脉冲错误触发, 从而影响测量结果 的正确性。 所以, 激光外差干涉信号质量的改善成为提高测量正确性和精度需 要解决的关键技术问题。
发明内容
本发明的目的在于提供一种基于高频数字信号边沿锁定的激光外差干涉信 号处理方法。 采用高频数字脉冲信号对干涉信号上升沿锁定处理技术, 不仅可 以提高干涉信号上升沿的陡度, 还可消除由于噪声引起的错误脉冲跳变, 提高 了干涉信号的质量, 解决了制约干涉测量精度进一步提高的关键技术问题。
本发明解决其技术问题所采用的技术方案是:
( 1 ) 激光外差干涉仪的参考信号和测量信号经各自的光电探测器、 信号放 大器、 滤波电路、 电压比较器和高频数字边沿锁定模块处理后, 送入脉冲计数 同步锁存处理模块, 得到参考信号和测量信号的整周期干涉条紋数 Nref、 ∞和 一个干涉条紋周期内的填脉冲数 nref、 «mea;
(2 ) 有源晶振输出的外部时钟信号经锁相倍频模块处理后, 输出频率为 f 的高频数字脉冲信号至高频数字边沿锁定模块和脉冲计数同步锁存处理模块;
(3 )参考信号和测量信号的整周期干涉条紋数 Nref Nmea和一个干涉条紋周 期内的填脉冲数 nref mK^ 串口通信模块送至计算机, 根据以下公式, 得到被 测对象的位移和速度: 被测对象的位移: L = (Nme NKf 被测对象的速度: v 一)
式中: λ为激光波长。
所述的高频数字边沿锁定模块, 在激光外差干涉信号的上升沿到来时, 采 用高频数字脉冲信号对其进行上升沿锁定处理, 转换成等高电平窄脉冲信号, 脉冲的宽度为 τ = η// η为高频数字脉冲信号的脉冲个数。
本发明具有的有益效果是:
本发明采用高频数字脉冲信号对激光外差干涉信号上升沿锁定处理, 提高 了干涉信号上升沿的陡度, 可消除由于噪声引起的错误脉冲跳变, 改善了干涉 信号的质量, 不改变信号的周期, 不会存在信号上升沿的相位延迟, 故不影响 后续的相位测量, 保证了激光外差干涉信号处理的正确性, 而且该信号处理方 法易于实现。 本发明适用于干涉测量技术中对干涉信号的质量进行优化处理, 提高了测量结果的准确性和测量精度。
附图说明
图 1是本发明的原理框图。
图 2是采用高频数字脉冲信号对干涉信号上升沿锁定处理方法的原理框图。 图 3 是采用高频数字脉冲信号对干涉信号上升沿锁定处理方法的波形示意 图。
图中: 1、 第一光电探测器, 2、 第一信号放大器, 3、 第一滤波电路, 4 第一电压比较器, 5、 第一高频数字边沿锁定模块, 6、 脉冲计数同步锁存处理 模块, 7、 有源晶振, 8、 第二光电探测器, 9、 第二信号放大器, 10、 第二滤波 电路, 11、 第二电压比较器, 12、 第二高频数字边沿锁定模块, 13、 锁相倍频 模块, 14、 串行通信模块, 15、 计数电路, 16、 锁定处理电路。
具体实施方式
下面结合附图和实施例对本发明加以详细说明。
本发明的实施例中激光外差干涉仪的光源为双频 He-Ne稳频激光器, 输出 激光波长为 632.8nm、 频差为 2.26MHz, 光电探测器的最高工作频率为 10MHz, 采用一型号为 EP2C20Q240C8N的可编程逻辑芯片 (FPGA) 来实现基于高频数
字信号边沿锁定的激光外差干涉信号处理方法。 EP2C20Q240C8N芯片的内部最 高工作频率高达 400MHz, 10端口工作频率达 50MHz, 内置锁相环。
具体实施如下:
如图 1 所示, 基于高频数字信号边沿锁定的激光外差干涉信号处理方法实 施步骤为:
( 1 )第一光电探测器 1和第二光电探测器 8探测到的激光外差干涉仪的参 考信号和测量信号分别经过第一信号放大器 2和第二信号放大器 9进行信号放 大, 放大后的信号经传输线到达信号处理板, 然后分别经第一滤波电路 3 和第 二滤波电路 10进行滤波处理, 滤除噪声干扰, 又分别经第一电压比较器 4和第 二电压比较器 11将模拟干涉信号转换为数字干涉信号; 参考数字干涉信号和测 量数字干涉信号进入 FPGA至第一高频数字边沿锁定模块 5和第二高频数字边 沿锁定模块 12。
(2 ) 有源晶振 7输出 50MHz的外部时钟信号, 经 FPGA内部的锁相倍频 模块 13倍频 8倍处理后, 得到频率 /为 400MHz的 FPGA内部高频时钟信号, 该信号一方面被用作第一高频数字边沿锁定模块 5 和第二高频数字边沿锁定模 块 12的高频数字脉冲信号, 分别对参考数字干涉信号和测量数字干涉信号的上 升沿进行锁定处理, 另一方面被用作脉冲计数同步锁存处理模块 6 的基准时钟 信号;
( 3 ) 经上升沿锁定处理后的参考数字干涉信号和测量数字干涉信号到达脉 冲计数同步锁存处理模块 6,在该模块中完成对参考信号和测量信号的整周期干 涉条紋计数和一个干涉条紋周期内的填脉冲计数, 参考信号和测量信号的整周 期干涉条紋计数值分别为 Nref和 N醒、一个干涉条紋周期内的填脉冲计数值分别 为《ref和《mea, 经串口通信模块 14送至计算机, 根据下列公式, 得到被测对象 的位移和速度:
被测对象的位移: L = (Nme NK 被测对象的速度: v = 式中: λ为激光波长。
如图 2所示, 为采用高频数字脉冲信号对干涉信号上升沿锁定处理方法的 原理框图。 即对图 1 中的第一高频数字边沿锁定模块 5或第二高频数字边沿锁 定模块 12的进一步说明, 具体实施为:
高频数字边沿锁定模块: 包含计数电路 15和锁定处理电路 16。经整形处理
后的数字干涉信号 (锁定前信号), 到达高频数字边沿锁定处理模块, 当该数字 干涉信号的上升沿到来时刻, 锁定处理电路 16将输入的数字干涉信号先锁定成 高电平, 同时计数电路 15对高频数字脉冲信号进行脉冲计数, 当计数值达到预 设阈值数 n时, 触发锁定处理电路 16将数字干涉信号再锁定为低电平, 这样原 数字干涉信号被锁定成等高电平窄脉冲信号 (锁定后信号) 输出。
图 3 所示, 为采用高频数字脉冲信号对干涉信号上升沿锁定处理方法的波 形示意图。 经整形处理后的数字干涉信号 (锁定前信号), 其上升沿存在着陡度 较低和多上升沿的问题, 如图 3 和图 30))所示, 该问题将影响干涉信号的相位 测量精度和引起整周期脉冲错误计数。 高频数字边沿锁定模块实施的高频数字 信号边沿锁定处理可在高频数字脉冲信号的作用下,将输入的数字干涉信号(锁 定前信号) 调制成等高电平窄脉冲信号 (锁定后信号), 信号的脉冲宽度为 τ, τ = /f, n为高频数字脉冲信号的脉冲个数 (预设阈值数)。 FPGA内部高频时钟 信号频率为 400MHz,则经锁定处理后的信号高电平脉冲的宽度最小可达 0.5_8s。 这种高频数字信号边沿锁定处理方法可以显著提高干涉信号的上升沿陡度, 消 除多上升沿现象, 提高了干涉信号处理的稳定性和正确性, 有利于激光外差干 涉技术实施高速、 高精度位移测量。
综上所述, 采用基于高频数字信号边沿锁定的激光外差干涉信号处理方法, 当激光波长为 632.8nm、频差为 2.26MHz,光电探测器的最高工作频率为 10MHz, EP2C20Q240C8N芯片的内部工作频率为 400MHz、 10端口工作频率为 50MHz 时, 该方法可实现被测对象最大运动速度约为 2.4m/s的激光外差干涉精密位移
Claims
1、 一种基于高频数字信号边沿锁定的激光外差干涉信号处理方法, 其特征 在于:
( 1 ) 激光外差干涉仪的参考信号和测量信号经各自的光电探测器、 信号放 大器、 滤波电路、 电压比较器和高频数字边沿锁定模块处理后, 送入脉冲计数 同步锁存处理模块, 得到参考信号和测量信号的整周期干涉条紋数 Nref、 ∞和 一个干涉条紋周期内的填脉冲数 nref、 «mea;
(2 ) 有源晶振输出的外部时钟信号经锁相倍频模块处理后, 输出频率为 f 的高频数字脉冲信号至高频数字边沿锁定模块和脉冲计数同步锁存处理模块;
(3 )参考信号和测量信号的整周期干涉条紋数 Nref、 Nmea和一个干涉条紋周 期内的填脉冲数 nref、 《mK^ 串口通信模块送至计算机, 根据以下公式, 得到被 测对象的位移和速度: 被测对象的位移: L = (Nme NK 被测对象的速度: v = — 一) 式中: λ为激光波长。
2、 根据权利要求 1所述的一种基于高频数字信号边沿锁定的激光外差干涉 信号处理方法, 其特征在于: 所述的高频数字边沿锁定模块, 在激光外差干涉 信号的上升沿到来时, 采用高频数字脉冲信号对其进行上升沿锁定处理, 转换 成等高电平窄脉冲信号, 脉冲的宽度为 τ = η//, η为高频数字脉冲信号的脉冲个 数。
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