WO2014094619A1 - White led chip and method for manufacturing same - Google Patents
White led chip and method for manufacturing same Download PDFInfo
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- WO2014094619A1 WO2014094619A1 PCT/CN2013/089823 CN2013089823W WO2014094619A1 WO 2014094619 A1 WO2014094619 A1 WO 2014094619A1 CN 2013089823 W CN2013089823 W CN 2013089823W WO 2014094619 A1 WO2014094619 A1 WO 2014094619A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/505—Wavelength conversion elements characterised by the shape, e.g. plate or foil
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0016—Processes relating to electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
Definitions
- the present disclosure generally relates to a semiconductor design and manufacture field, more particularly, to a white light emitting diode (LED) chip and a method for manufacturing the same.
- LED white light emitting diode
- a blue LED chip is coated with a YAG phosphor, the YAG phosphor is excited by a blue light emitted from the blue LED chip to emit a typical yellow-green light ranging from 500nm to 560nm, then the yellow-green light and the blue light are mixed into a white light.
- disadvantages of this method lie in difficult controls of a uniformity of the phosphor and a dispensing process, a bad light-emitting uniformity and a poor color consistency.
- a green LED chip, a red LED chip and a blue LED chip are combined and powered simultaneously to emit a green light, a red light and a blue light, and the three lights are mixed into the white light in a certain proportion.
- photodegradations and driving modes of the three LED chips are different, so it requires a complex driving circuit, which is unfavorable for device miniaturization.
- an ultraviolet LED chip is coated with a RGB phosphor, the RGB phosphor is excited by an ultraviolet light emitted from the ultraviolet LED chip to emit a trichromatic light, and then the trichromatic light is mixed into a white light.
- a disadvantage of this method is that an emitting efficiency is low, and a light transmittance may be reduced due to a decomposition of an epoxy.
- the white LED chip is usually manufactured on a sapphire substrate, and has a horizontal structure, that is, two electrodes are disposed on a same plane of the LED chip, which may not only increase a process complexity but also reduce a light emitting area of the LED chip. Furthermore, a poor thermal conductivity of the sapphire may shorten a lifetime of the LED chip.
- a method for manufacturing a vertical structural LED chip on the sapphire substrate comprises: irradiating a substrate by an ultraviolet laser, and then melting a buffer layer to separate the substrate to form a vertical structural LED chip.
- this method is easy to cause a permanent damage on an epitaxial layer, and laser equipment is very expensive, thus increasing a production cost.
- the present disclosure is directed to solve at least one of the problems existing in the prior art. Accordingly, a method for manufacturing a white LED chip and a white LED chip manufactured by the method are provided.
- the method for manufacturing the white LED chip comprises: providing a substrate; forming a buffer layer on the substrate; forming a semiconductor light-emitting structure on the buffer layer; forming a current diffusion layer on the semiconductor light-emitting structure; forming a phosphor layer on the current diffusion layer; and forming a first electrode in the phosphor layer; providing an introduced substrate, and bonding the introduced substrate with the phosphor layer and the first electrode under a first preset temperature and in an electric field; forming a second electrode in the substrate; and removing the introduced substrate.
- the white LED chip comprises: a substrate; a buffer layer formed on the substrate; a semiconductor light-emitting structure formed on the buffer layer; a current diffusion layer formed on the semiconductor light-emitting structure; a phosphor layer formed on the current diffusion layer; a first electrode formed in the phosphor layer; and a second electrode formed in the substrate.
- the method for manufacturing the white LED chip and the white LED chip manufactured by the method have at least following advantages.
- a size of the introduced substrate is not changed during a manufacturing process, so the introduced substrate can be used repeatedly, thus lowering a production cost.
- a phosphor layer may serve as a passivation layer, which may omit a dispensing step in a packaging procedure, thus reducing a manufacture cost.
- An ultimate chip has a vertical structure, and the two electrodes are located on two transverse planes respectively, which may increase an emitting area, thus improving an emitting efficiency.
- Figs. 1-9 are schematic cross-sectional views of intermediate statuses of a white LED manufactured in steps of a method for manufacturing a white LED according to an embodiment of the present disclosure.
- Fig. 10 is a schematic structural view of a white LED according to an embodiment of the present disclosure.
- relative terms such as “longitudinal”, “lateral”, “front”, “rear”, “right”, “left”, “lower”, “upper”, “horizontal”, “vertical”, “above”, “below”, “up”, “top”, “bottom” as well as derivative thereof (e.g., “horizontally”, “downwardly”, “upwardly”, etc.) should be construed to refer to the orientation as then described or as shown in the drawings under discussion. These relative terms are for convenience of description and do not require that the present disclosure be constructed or operated in a particular orientation.
- attachments, coupling and the like such as “mounted,” “connected,” “supported,” and “coupled” and variations thereof are used broadly and encompass both direct and indirect mountings, connections, supports, and couplers. Further, “connected” and “coupled” are not restricted to physical or mechanical connections or couplers.
- a method for manufacturing a white LED chip according to an embodiment of the present disclosure will be described below in conjunction with Figs. 1- 9.
- the method comprises following steps.
- a substrate 100 is provided.
- a material of LED may be gallium nitride based material
- the substrate 100 may be a non-conductive substrate which is suitable for growing gallium nitride, such as sapphire, LiA10 2 or LiGa0 2 .
- a buffer layer 200 is formed on the substrate 100.
- the buffer layer 200 may be deposited by MOCVD (Metal Organic Chemical Vapor Deposition).
- a material of the buffer layer 200 may comprise a low-temperature GaN or A1N.
- a semiconductor light-emitting structure is formed on the buffer layer 200.
- the semiconductor light-emitting structure may be deposited by MOCVD as well.
- this step comprises following substeps: forming an intrinsic layer 301 on the buffer layer 200; forming an n-type semiconductor layer 302 on the intrinsic layer 301; forming a quantum well layer on the n-type semiconductor layer; forming an electron blocking layer 304 on the quantum well layer 303; and forming a p-type semiconductor layer 305 on the electron blocking layer 304.
- a current diffusion layer 400 is formed on the semiconductor light-emitting structure. Specifically, the current diffusion layer 400 with a thickness of 250 nm -400nm is formed on the semiconductor light-emitting structure by vapor deposition. The current diffusion layer 400 may reduce a current blocking to improve antistatic ability. In one embodiment, in order to obtain a high transmittance and a low sheet resistance, an annealing treatment is performed for the current diffusion layer 400.
- a phosphor layer 500 is formed on the current diffusion layer 400.
- the phosphor layer 500 with a thickness ranging from 2 ⁇ m to 4 ⁇ m may be formed on the current diffusion layer 400 by wetting fluid droplet dispensing and spinning coating.
- the thickness of the phosphor layer 500 may be adjusted by controlling a rotation speed and a rotation time of a spin coating device. Since an emitting effect may be influenced by a thick phosphor layer 500, the thickness of the phosphor layer 500 needs to be adjusted in ⁇ m level.
- a first electrode 601 is formed in the phosphor layer.
- the first electrode 601 may be formed by photolithography, dry etching or wet etching, and vapor deposition.
- an introduced substrate 700 is provided, and the introduced substrate 700 is bonded with the phosphor layer 500 and the first electrode 601 under a first preset temperature and in an electric field.
- a material of the introduced substrate 700 comprises any one of doped silicon, doped germanium silicon and MgAl 2 0 4 .
- the substrate 100 is upside down placed on the introduced substrate 700 to be bonded with the introduced substrate 700 under the first preset temperature and in the electric field.
- the introduced substrate 700 is used to support a previously formed structure (i.e., patterns formed on the substrate 100).
- this step may comprise: connecting the previously formed structure to a positive electrode of a power supply and connecting the introduced substrate 700 to a negative electrode of the power supply; applying a proper voltage to the previously formed structure and the introduced substrate 700; heating the previously formed structure and the introduced substrate 700 to 300 ° C -700 ° C .
- a principle of the bonding is that the introduced substrate 700 is softened after being heated for a while, under the applied electric field, cations in the introduced substrate 700 drift toward to a bottom of the introduced substrate 700, thus forming a depletion layer on a top of the introduced substrate 700. Because the depletion layer is negatively charged, and the previously formed structure is positively charged, the introduced substrate and the previously formed structure can be bonded by a coulomb attractive force.
- the method may further comprise: thinning the substrate 100 by a mechanical thinning and/or a chemical thinning.
- the mechanical thinning comprises ejecting a slurry containing abrasive particles (such as diamond particles) to the substrate 10. Because a hardness of the abrasive particles is higher than that of the substrate 100, the substrate 100 is thinned by abrasions between the abrasive particles and the substrate 100.
- the chemical thinning comprises ejecting a slurry containing a solvent reactable with the substrate 100 to the substrate 100. The substrate 100 is thinned by a chemical reaction between the slurry and the substrate 100.
- the previously formed structure is mounted on the introduced substrate 700, and then the substrate 100 is thinned to an intended thickness.
- a heat dissipation effect may be improved, and the antistatic ability may be accordingly enhanced;
- a wafer may be directly cut into signal LED chips since the wafer has been thinned to the intended thickness, and thus a conventional thinning step may be omitted. It should be noted that the thinning step is optional.
- a second electrode 602 is formed in the substrate 100. Specifically, a part of the substrate 100 is etched until the buffer layer 200 by photolithography and etching, and a second electrode is formed in an etched region of the substrate 100 by vapor deposition.
- step S9 as shown in Fig. 9, the introduced substrate 700 is removed.
- a device formed by above steps is heated to 700°C-900°C and is maintained for a while, and then is fast cooled to separate the introduced substrate 700 from the phosphor layer 500 and the first electrode 601.
- a principle of the removing is that a thermal expansion coefficient of the introduced substrate 700 is different from that of the LED chip, and particularly, the thermal expansion coefficient of the first electrode 601 is different from that of the introduced substrate 700.
- the LED chip and the introduced substrate 700 which are originally in close contact with each other may generate different deformations due to different thermal expansion coefficients, thus achieving a nondestructive separation.
- Fig. 10 is a schematic structural view of the structure of the white LED according to an embodiment of the present disclosure.
- the white LED chip is manufactured by the above method. As shown in Fig. 10, the white LED chip comprises: a substrate 100; a buffer layer 200 formed on the substrate 100; a semiconductor light-emitting structure (comprising layers 301-305) formed on the buffer layer 200; a current diffusion layer 400 formed on the semiconductor light-emitting structure; a phosphor layer 500 formed on the current diffusion layer 400; a first electrode 601 formed in the phosphor layer 500; and a second electrode 602 formed in the substrate 100.
- the semiconductor light-emitting structure further comprises: an intrinsic layer 301 formed on the buffer layer 200; an n-type semiconductor layer 302 formed on the intrinsic layer 301; a quantum well layer 303 formed on the n-type semiconductor layer 302; an electron blocking layer 304 formed on the quantum well layer 303; and a p-type semiconductor layer 305 formed on the electron blocking layer 304.
- a material of the substrate comprises any one of sapphire, LiA10 2 and LiGa0 2 .
- a thickness of the phosphor layer ranges from 2 ⁇ m to 4 ⁇ m.
- the method for manufacturing the white LED chip and the white LED chip manufactured by the method have at least following advantages.
- a size of the introduced substrate is not changed during a manufacturing process, so the introduced substrate can be used repeatedly, thus lowering a production cost.
- a phosphor layer may serve as a passivation layer, which may omit a dispensing step in a packaging procedure, thus reducing a manufacture cost.
Abstract
A method for manufacturing a white LED chip, comprises: providing a substrate (100); forming a buffer layer (200) on the substrate; forming a semiconductor light-emitting structure on the buffer layer; forming a current diffusion layer (400) on the semiconductor light-emitting structure; forming a phosphor layer (500) on the current diffusion layer (400); forming a first electrode (601) in the phosphor layer (500); providing an introduced substrate (700); bonding the introduced substrate (700) with the phosphor layer (500) and the first electrode (601) under a first preset temperature and in an electric field; forming a second electrode (602) in the substrate (100); and removing the introduced substrate (700).
Description
WHITE LED CHIP AND METHOD FOR MANUFACTURING SAME
CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority to, and benefits of Chinese Patent Application No. 201210552348.2 filed with the State Intellectual Property Office, P. R. C. on December 18, 2012, the entire contents of which are incorporated herein by reference.
FIELD
The present disclosure generally relates to a semiconductor design and manufacture field, more particularly, to a white light emitting diode (LED) chip and a method for manufacturing the same.
BACKGROUND
An LED with advantages of high efficiency, low power consumption and long lifetime is widely used in many fields. Presently, there are three methods for manufacturing white LED chips.
In a first method, a blue LED chip is coated with a YAG phosphor, the YAG phosphor is excited by a blue light emitted from the blue LED chip to emit a typical yellow-green light ranging from 500nm to 560nm, then the yellow-green light and the blue light are mixed into a white light. However, disadvantages of this method lie in difficult controls of a uniformity of the phosphor and a dispensing process, a bad light-emitting uniformity and a poor color consistency.
In a second method, according to a RGB principle, a green LED chip, a red LED chip and a blue LED chip are combined and powered simultaneously to emit a green light, a red light and a blue light, and the three lights are mixed into the white light in a certain proportion. However, photodegradations and driving modes of the three LED chips are different, so it requires a complex driving circuit, which is unfavorable for device miniaturization.
In the third method, an ultraviolet LED chip is coated with a RGB phosphor, the RGB phosphor is excited by an ultraviolet light emitted from the ultraviolet LED chip to emit a trichromatic light, and then the trichromatic light is mixed into a white light. However, a disadvantage of this method is that an emitting efficiency is low, and a light transmittance may be reduced due to a decomposition of an epoxy.
The white LED chip is usually manufactured on a sapphire substrate, and has a horizontal
structure, that is, two electrodes are disposed on a same plane of the LED chip, which may not only increase a process complexity but also reduce a light emitting area of the LED chip. Furthermore, a poor thermal conductivity of the sapphire may shorten a lifetime of the LED chip. At present, there is a method for manufacturing a vertical structural LED chip on the sapphire substrate. The method comprises: irradiating a substrate by an ultraviolet laser, and then melting a buffer layer to separate the substrate to form a vertical structural LED chip. However, this method is easy to cause a permanent damage on an epitaxial layer, and laser equipment is very expensive, thus increasing a production cost.
SUMMARY
The present disclosure is directed to solve at least one of the problems existing in the prior art. Accordingly, a method for manufacturing a white LED chip and a white LED chip manufactured by the method are provided.
According to an aspect of the present disclosure, the method for manufacturing the white LED chip is provided. The method comprises: providing a substrate; forming a buffer layer on the substrate; forming a semiconductor light-emitting structure on the buffer layer; forming a current diffusion layer on the semiconductor light-emitting structure; forming a phosphor layer on the current diffusion layer; and forming a first electrode in the phosphor layer; providing an introduced substrate, and bonding the introduced substrate with the phosphor layer and the first electrode under a first preset temperature and in an electric field; forming a second electrode in the substrate; and removing the introduced substrate.
According to another aspect of the present disclosure, the white LED chip is provided. The white LED chip comprise: a substrate; a buffer layer formed on the substrate; a semiconductor light-emitting structure formed on the buffer layer; a current diffusion layer formed on the semiconductor light-emitting structure; a phosphor layer formed on the current diffusion layer; a first electrode formed in the phosphor layer; and a second electrode formed in the substrate.
According to the above embodiments of the present disclosure, the method for manufacturing the white LED chip and the white LED chip manufactured by the method have at least following advantages.
1. With a special bonding and undamaged separation between the introduced substrate and an epitaxial structure, the cost is lowered and it may not damage the epitaxial structure, and thus not
weakening an emitting performance of the LED chip.
2. A size of the introduced substrate is not changed during a manufacturing process, so the introduced substrate can be used repeatedly, thus lowering a production cost.
3. By coating the phosphor on a current diffusion layer, a phosphor layer may serve as a passivation layer, which may omit a dispensing step in a packaging procedure, thus reducing a manufacture cost.
4. With a phosphor coating technique to form a uniform phosphor layer, a color consistency may be improved.
5. An ultimate chip has a vertical structure, and the two electrodes are located on two transverse planes respectively, which may increase an emitting area, thus improving an emitting efficiency.
Additional aspects and advantages of the embodiments of present disclosure will be given in part in the following descriptions, become apparent in part from the following descriptions, or be learned from the practice of the embodiments of the present disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
These and other aspects and advantages of embodiments of the present disclosure will become apparent and more readily appreciated from the following descriptions made with reference to the drawings, in which:
Figs. 1-9 are schematic cross-sectional views of intermediate statuses of a white LED manufactured in steps of a method for manufacturing a white LED according to an embodiment of the present disclosure; and
Fig. 10 is a schematic structural view of a white LED according to an embodiment of the present disclosure.
DETAILED DESCRIPTION
Reference will be made in detail to embodiments of the present disclosure. The embodiments described herein with reference to drawings are explanatory, illustrative, and used to generally understand the present disclosure. The embodiments shall not be construed to limit the present disclosure. The same or similar elements and the elements having same or similar functions are denoted by like reference numerals throughout the descriptions.
In the description, relative terms such as "longitudinal", "lateral", "front", "rear", "right", "left", "lower", "upper", "horizontal", "vertical", "above", "below", "up", "top", "bottom" as well as derivative thereof (e.g., "horizontally", "downwardly", "upwardly", etc.) should be construed to refer to the orientation as then described or as shown in the drawings under discussion. These relative terms are for convenience of description and do not require that the present disclosure be constructed or operated in a particular orientation.
Unless specified or limited otherwise, terms concerning attachments, coupling and the like, such as "mounted," "connected," "supported," and "coupled" and variations thereof are used broadly and encompass both direct and indirect mountings, connections, supports, and couplers. Further, "connected" and "coupled" are not restricted to physical or mechanical connections or couplers.
A method for manufacturing a white LED chip according to an embodiment of the present disclosure will be described below in conjunction with Figs. 1- 9. The method comprises following steps.
In step SI, as shown in Fig. 1, a substrate 100 is provided. Generally, a material of LED may be gallium nitride based material, and the substrate 100 may be a non-conductive substrate which is suitable for growing gallium nitride, such as sapphire, LiA102 or LiGa02.
In step S2, as shown in Fig.2, a buffer layer 200 is formed on the substrate 100. Specifically, the buffer layer 200 may be deposited by MOCVD (Metal Organic Chemical Vapor Deposition). A material of the buffer layer 200 may comprise a low-temperature GaN or A1N.
In step S3, as shown in Fig. 2, a semiconductor light-emitting structure is formed on the buffer layer 200. Specifically, the semiconductor light-emitting structure may be deposited by MOCVD as well. In one embodiment, this step comprises following substeps: forming an intrinsic layer 301 on the buffer layer 200; forming an n-type semiconductor layer 302 on the intrinsic layer 301; forming a quantum well layer on the n-type semiconductor layer; forming an electron blocking layer 304 on the quantum well layer 303; and forming a p-type semiconductor layer 305 on the electron blocking layer 304.
In step S4, as shown in Fig. 3, a current diffusion layer 400 is formed on the semiconductor light-emitting structure. Specifically, the current diffusion layer 400 with a thickness of 250 nm -400nm is formed on the semiconductor light-emitting structure by vapor deposition. The current diffusion layer 400 may reduce a current blocking to improve antistatic ability. In one embodiment, in order to obtain a high transmittance and a low sheet resistance, an annealing treatment is
performed for the current diffusion layer 400.
In step S5, as shown in Fig. 4, a phosphor layer 500 is formed on the current diffusion layer 400. Specifically, the phosphor layer 500 with a thickness ranging from 2 μ m to 4 μ m may be formed on the current diffusion layer 400 by wetting fluid droplet dispensing and spinning coating. The thickness of the phosphor layer 500 may be adjusted by controlling a rotation speed and a rotation time of a spin coating device. Since an emitting effect may be influenced by a thick phosphor layer 500, the thickness of the phosphor layer 500 needs to be adjusted in μ m level.
In step S6, as shown in Fig. 5, a first electrode 601 is formed in the phosphor layer. Specifically, the first electrode 601 may be formed by photolithography, dry etching or wet etching, and vapor deposition.
In step S7, as shown in Fig. 6, an introduced substrate 700 is provided, and the introduced substrate 700 is bonded with the phosphor layer 500 and the first electrode 601 under a first preset temperature and in an electric field. Specifically, a material of the introduced substrate 700 comprises any one of doped silicon, doped germanium silicon and MgAl204. The substrate 100 is upside down placed on the introduced substrate 700 to be bonded with the introduced substrate 700 under the first preset temperature and in the electric field. In this case, the introduced substrate 700 is used to support a previously formed structure (i.e., patterns formed on the substrate 100). In one embodiment, this step may comprise: connecting the previously formed structure to a positive electrode of a power supply and connecting the introduced substrate 700 to a negative electrode of the power supply; applying a proper voltage to the previously formed structure and the introduced substrate 700; heating the previously formed structure and the introduced substrate 700 to 300°C -700°C .
A principle of the bonding is that the introduced substrate 700 is softened after being heated for a while, under the applied electric field, cations in the introduced substrate 700 drift toward to a bottom of the introduced substrate 700, thus forming a depletion layer on a top of the introduced substrate 700. Because the depletion layer is negatively charged, and the previously formed structure is positively charged, the introduced substrate and the previously formed structure can be bonded by a coulomb attractive force.
As shown in Fig. 7, in one embodiment, after the step S7, the method may further comprise: thinning the substrate 100 by a mechanical thinning and/or a chemical thinning. The mechanical thinning comprises ejecting a slurry containing abrasive particles (such as diamond particles) to
the substrate 10. Because a hardness of the abrasive particles is higher than that of the substrate 100, the substrate 100 is thinned by abrasions between the abrasive particles and the substrate 100. The chemical thinning comprises ejecting a slurry containing a solvent reactable with the substrate 100 to the substrate 100. The substrate 100 is thinned by a chemical reaction between the slurry and the substrate 100.
The previously formed structure is mounted on the introduced substrate 700, and then the substrate 100 is thinned to an intended thickness. In this way, on one hand a heat dissipation effect may be improved, and the antistatic ability may be accordingly enhanced; on the other hand, a wafer may be directly cut into signal LED chips since the wafer has been thinned to the intended thickness, and thus a conventional thinning step may be omitted. It should be noted that the thinning step is optional.
In step S8, as shown in Fig. 8, a second electrode 602 is formed in the substrate 100. Specifically, a part of the substrate 100 is etched until the buffer layer 200 by photolithography and etching, and a second electrode is formed in an etched region of the substrate 100 by vapor deposition.
In step S9, as shown in Fig. 9, the introduced substrate 700 is removed. Specifically, a device formed by above steps is heated to 700°C-900°C and is maintained for a while, and then is fast cooled to separate the introduced substrate 700 from the phosphor layer 500 and the first electrode 601. A principle of the removing is that a thermal expansion coefficient of the introduced substrate 700 is different from that of the LED chip, and particularly, the thermal expansion coefficient of the first electrode 601 is different from that of the introduced substrate 700. When the temperature changes, the LED chip and the introduced substrate 700 which are originally in close contact with each other may generate different deformations due to different thermal expansion coefficients, thus achieving a nondestructive separation.
Fig. 10 is a schematic structural view of the structure of the white LED according to an embodiment of the present disclosure.
The white LED chip is manufactured by the above method. As shown in Fig. 10, the white LED chip comprises: a substrate 100; a buffer layer 200 formed on the substrate 100; a semiconductor light-emitting structure (comprising layers 301-305) formed on the buffer layer 200; a current diffusion layer 400 formed on the semiconductor light-emitting structure; a phosphor layer 500 formed on the current diffusion layer 400; a first electrode 601 formed in the phosphor
layer 500; and a second electrode 602 formed in the substrate 100.
In one embodiment, the semiconductor light-emitting structure further comprises: an intrinsic layer 301 formed on the buffer layer 200; an n-type semiconductor layer 302 formed on the intrinsic layer 301; a quantum well layer 303 formed on the n-type semiconductor layer 302; an electron blocking layer 304 formed on the quantum well layer 303; and a p-type semiconductor layer 305 formed on the electron blocking layer 304.
In one embodiment, a material of the substrate comprises any one of sapphire, LiA102 and LiGa02.
In one embodiment, a thickness of the phosphor layer ranges from 2 μ m to 4 μ m.
According to the above embodiments of the present disclosure, the method for manufacturing the white LED chip and the white LED chip manufactured by the method have at least following advantages.
1. With a special bonding and undamaged separation between the introduced substrate and an epitaxial structure, the cost is lowered and it may not damage the epitaxial structure, and thus not weakening an emitting performance of the LED chip.
2. A size of the introduced substrate is not changed during a manufacturing process, so the introduced substrate can be used repeatedly, thus lowering a production cost.
3. By coating the phosphor on a current diffusion layer, a phosphor layer may serve as a passivation layer, which may omit a dispensing step in a packaging procedure, thus reducing a manufacture cost.
4. With a phosphor coating technique to form a uniform phosphor layer, a color consistency may be improved.
Reference throughout this specification to "an embodiment", "some embodiments", "some embodiments", "an example", "a specific examples", or "some examples" means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least some embodiments or example of the disclosure. Thus, the appearances of the phrases such as "in some embodiments", "in some embodiments", "in an embodiment", "an example", "a specific examples", or "some examples" in various places throughout this specification are not necessarily referring to the same embodiment or example of the disclosure. Furthermore, the particular features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.
Although explanatory embodiments have been shown and described, it would be appreciated by those skilled in the art that changes, alternatives, and modifications may be made in the embodiments without departing from spirit and principles of the disclosure. Such changes, alternatives, and modifications all fall into the scope of the claims and their equivalents.
Claims
1. A method for manufacturing a white LED chip, comprising:
providing a substrate;
forming a buffer layer on the substrate;
forming a semiconductor light-emitting structure on the buffer layer;
forming a current diffusion layer on the semiconductor light-emitting structure;
forming a phosphor layer on the current diffusion layer;
forming a first electrode in the phosphor layer;
providing an introduced substrate, and bonding the introduced substrate with the phosphor layer and the first electrode under a first preset temperature and in an electric field;
forming a second electrode in the substrate; and
removing the introduced substrate.
2. The method according to claim 1, wherein forming a semiconductor light-emitting structure on the buffer layer comprises:
forming an intrinsic layer on the buffer layer;
forming an n-type semiconductor layer on the intrinsic layer;
forming a quantum well layer on the n-type semiconductor layer;
forming an electron blocking layer on the quantum well layer; and
forming a p-type semiconductor layer on the electron blocking layer.
3. The method according to claim 1 or 2, wherein the first preset temperature ranges from 300 °C to 700°C .
4. The method according to any of claims 1-3, wherein a thermal expansion coefficient of the introduced substrate is different from that of the first electrode.
5. The method according to any of claims 1-4, wherein removing the introduced substrate comprises:
heating to a second preset temperature; and
fast cooling to separate the introduced substrate from the phosphor layer and the first electrode.
6. The method according to claim 5, wherein the second preset temperature ranges from 700 °C to 900°C .
7. The method according to any of claims 1-6, wherein a material of the substrate comprises any one of sapphire, LiA102 and LiGa02.
8. The method according to any of claim 1-7, wherein a material of the introduced substrate comprises any one of doped silicon, doped germanium silicon and MgAl204.
9. The method according to any of claims 1-8, wherein the phosphor layer is formed by wetting fluid droplet dispensing and spinning coating.
10. The method according to any of claims 1-9, wherein a thickness of the phosphor layer ranges from 2 μ m to 4 μ m.
11. A white LED chip, comprising:
a substrate;
a buffer layer formed on the substrate;
a semiconductor light-emitting structure formed on the buffer layer;
a current diffusion layer formed on the semiconductor light-emitting structure;
a phosphor layer formed on the current diffusion layer;
a first electrode formed in the phosphor layer; and
a second electrode formed in the substrate.
12. The white LED chip according to claim 11, wherein the semiconductor light-emitting structure comprises:
an intrinsic layer formed on the buffer layer;
an n-type semiconductor layer formed on the intrinsic layer;
a quantum well layer formed on the n-type semiconductor layer;
an electron blocking layer formed on the quantum well layer; and
a p-type semiconductor layer formed on the electron blocking layer.
13. The white LED chip according to any of claims 11-12, wherein a material of the substrate comprises any one of sapphire, LiA102 and LiGa02.
14. The white LED chip according to any of claims 11-12, wherein a thickness of the phosphor layer ranges from 2 μ m to 4 μ m.
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JPH0883929A (en) * | 1994-09-14 | 1996-03-26 | Rohm Co Ltd | Semiconductor light emitting element and manufacture thereof |
CN101777616A (en) * | 2010-01-29 | 2010-07-14 | 上海大学 | Zinc oxide-based transparent electrode light emitting diode and preparation method thereof |
CN101867002A (en) * | 2010-05-27 | 2010-10-20 | 常州美镓伟业光电科技有限公司 | Novel semiconductor light-emitting diode |
CN102683556A (en) * | 2011-03-15 | 2012-09-19 | 王清华 | White-light-emitting diode with fluorescent layer |
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TW518771B (en) * | 2001-09-13 | 2003-01-21 | United Epitaxy Co Ltd | LED and the manufacturing method thereof |
US7268051B2 (en) * | 2005-08-26 | 2007-09-11 | Corning Incorporated | Semiconductor on glass insulator with deposited barrier layer |
US20090061593A1 (en) * | 2007-08-28 | 2009-03-05 | Kishor Purushottam Gadkaree | Semiconductor Wafer Re-Use in an Exfoliation Process Using Heat Treatment |
US8062956B2 (en) * | 2009-08-26 | 2011-11-22 | Corning Incorporated | Semiconductor on insulator and methods of forming same using temperature gradient in an anodic bonding process |
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Patent Citations (4)
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JPH0883929A (en) * | 1994-09-14 | 1996-03-26 | Rohm Co Ltd | Semiconductor light emitting element and manufacture thereof |
CN101777616A (en) * | 2010-01-29 | 2010-07-14 | 上海大学 | Zinc oxide-based transparent electrode light emitting diode and preparation method thereof |
CN101867002A (en) * | 2010-05-27 | 2010-10-20 | 常州美镓伟业光电科技有限公司 | Novel semiconductor light-emitting diode |
CN102683556A (en) * | 2011-03-15 | 2012-09-19 | 王清华 | White-light-emitting diode with fluorescent layer |
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