WO2014094515A1 - 一种基于多路开关延时输出的液相脉冲放电系统 - Google Patents

一种基于多路开关延时输出的液相脉冲放电系统 Download PDF

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WO2014094515A1
WO2014094515A1 PCT/CN2013/087375 CN2013087375W WO2014094515A1 WO 2014094515 A1 WO2014094515 A1 WO 2014094515A1 CN 2013087375 W CN2013087375 W CN 2013087375W WO 2014094515 A1 WO2014094515 A1 WO 2014094515A1
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pulse
discharge
circuit
semiconductor switch
transmission line
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PCT/CN2013/087375
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English (en)
French (fr)
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黄逸凡
刘振
闫克平
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浙江大学
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/53—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback
    • H03K3/57—Generators characterised by the type of circuit or by the means used for producing pulses by the use of an energy-accumulating element discharged through the load by a switching device controlled by an external signal and not incorporating positive feedback the switching device being a semiconductor device

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  • the invention belongs to the field of pulse power technology, and in particular relates to a liquid phase pulse discharge system based on multi-channel switch delay output.
  • Liquid phase pulsed discharge is a technique that produces an arc or corona discharge by loading a high voltage pulse onto an electrode load in a liquid.
  • the working principle of the system is to use the capacitor energy storage to release the energy instantaneously by triggering the discharge switch to realize the output of the high-power electric pulse to realize the plasma discharge in the water body.
  • the system first converts the commercial frequency AC into a medium-high frequency alternating current, and then forms a high-voltage DC output through the transformer boost and the silicon stack rectification to charge the storage capacitor. After the charging is completed, the control circuit controls the high-power semiconductor switch to conduct and store energy.
  • the capacitor discharges the load through the transmission line.
  • the shock process produces a shock wave effect, also known as the "liquid electric effect.”
  • the pulse sound wave is generated due to the high temperature and high pressure of the plasma channel (region) generated by the high voltage pulse discharge in the liquid, causing a strong pulsation process of the bubble.
  • the bubble wall expands outward due to the internal high temperature and high pressure, and overcomes the external forces such as hydrostatic pressure, surface tension, and viscous force to work on the surrounding water body.
  • the internal pressure of the bubble gradually extinguishes, the internal temperature begins to decrease, the internal pressure also decreases, and the outward velocity of the bubble wall becomes smaller until the velocity is zero. At this time, the internal pressure of the bubble is much smaller than the hydrostatic pressure, and the bubble begins to shrink.
  • the internal pressure becomes larger again, and thus reciprocatingly forms a bubble pulsation.
  • the internal pressure is very large, and the pressure wave is generated.
  • the bubble radius is large, the internal pressure is smaller than the hydrostatic pressure.
  • a sparse wave is generated, and the sparse wave concentrates the acoustic energy of the low frequency part.
  • the bubble pulsation process has a periodicity, and the number of pulsations and the size of the cycle are determined by the energy and hydrostatic conditions of the bubble itself. When the energy is large, the number of pulsations is large, and the period is long; when the hydrostatic pressure is large, the number of pulsations is small and the period is short.
  • Liquid phase pulse discharge circuit that has been developed and applied 1 As shown, it mainly includes storage capacitors, freewheeling diodes, semiconductor switching transistors and transmission lines.
  • This circuit generally adopts a single-channel switch or a multi-way switch synchronous output method. If the main circuit parameters are fixed, that is, the storage capacitor capacity, the charging voltage and the load are constant, the output pulse width cannot be adjusted, and the pulse acoustic wave frequency generated by the discharge is Features are also not adjustable.
  • the method of adjusting the pulse sound wave frequency is: France SIG
  • France SIG The company adopts the method of adjusting the capacitance value and replacing the load, but the former is easy to ablate the relay switch, the latter needs to stop the operation, replace the load, and the operation is complicated and cumbersome; Netherlands Geo-Resource
  • Netherlands Geo-Resource The company adopts a method of adjusting the charging voltage of the capacitor, but this method cannot change the pulse width of the power supply output, and the frequency of the acoustic pulse changes little. Therefore, the above prior art methods are difficult to achieve fast amplitude modulation and widening of the acoustic pulse, thereby changing its frequency characteristics.
  • the present invention discloses a liquid phase pulse discharge system based on multi-way switch delay output, which can realize multi-channel pulse delay output, so that the output pulse width after superimposing and combining is adjustable. .
  • a liquid phase pulse discharge system based on a multi-switch delay output comprising: a main loop unit and a drive unit composed of an n-stage discharge loop, n Is a natural number greater than 1;
  • the driving unit is configured to sequentially output a discharge control signal to each stage of the discharge circuit
  • the discharge circuit is for storing electrical energy and performing pulse discharge to the load according to the discharge control signal.
  • the discharge circuit consists of two isolation diodes D1 ⁇ D2, a storage capacitor, a freewheeling diode, and a a semiconductor switch and a pulse transmission line; wherein one end of the storage capacitor is connected to the cathode of the isolation diode D1, the anode of the semiconductor switch, and the cathode of the freewheeling diode, the semiconductor switch The cathode is connected to the inner conductor of the pulse transmission line, and the outer conductor of the pulse transmission line is connected to the other end of the storage capacitor, the anode of the freewheeling diode and the anode of the isolation diode D2, and the gate of the semiconductor switch receives the discharge control signal.
  • the discharge circuit consists of two isolation diodes D1 ⁇ D2, a storage capacitor, a freewheeling diode, and a a semiconductor switch and a pulse transmission line; wherein one end of the storage capacitor is connected to the anode of the isolation diode D2, the cathode of the semiconductor switch, and the anode of the freewheeling diode, the semiconductor switch
  • the anode is connected to the inner conductor of the pulse transmission line
  • the outer conductor of the pulse transmission line is connected to the other end of the storage capacitor, the cathode of the freewheeling diode and the cathode of the isolation diode D1, and the gate of the semiconductor switch receives the discharge control signal.
  • Isolation diode D1 anode and isolation diode D2 A DC power source is loaded between the two ends of the cathode, and the DC power source is used to charge the storage capacitor through the isolation diode.
  • the isolation diode is composed of one diode or a plurality of diodes connected in series or in parallel; the functions of the two isolation diodes are to isolate each discharge circuit during the discharge phase to avoid high-voltage storage capacitors when multiple delay discharges are generated.
  • the phenomenon of charging the low-voltage storage capacitor through the charging circuit ensures the full release of energy, and also solves the problem that the current caused by the common storage capacitor rises too fast and breaks down. The problem with semiconductor switches.
  • the storage capacitor is composed of one capacitor or a plurality of capacitors connected in series or in parallel.
  • the freewheeling diode is composed of one diode or a plurality of diodes in series; the effect of current oscillation in the discharge loop can be eliminated.
  • the semiconductor switch is composed of a power semiconductor switch or a plurality of power semiconductor switches connected in series; Power semiconductor switches use common thyristors, IGCT (integrated gate commutated thyristors) or RSD (inverting switching transistors).
  • IGCT integrated gate commutated thyristors
  • RSD inverting switching transistors
  • the pulse transmission line uses a high voltage coaxial cable or other high voltage cable, and the other end is connected to the load.
  • the driving unit comprises a timing pulse signal generator, an optical isolation circuit and a signal amplification circuit; wherein:
  • the timing pulse signal generator is configured to generate n sets of pulse trigger signals in successive delays
  • the signal amplifying circuit is configured to receive the pulse trigger signal through an opto-isolation circuit, and amplify and boost the signal to output a discharge control signal.
  • the timing pulse signal generator is constructed by a crystal oscillator circuit, a DC voltage regulator circuit, a single chip microcomputer and an inverter circuit; wherein:
  • the crystal oscillator circuit is configured to provide a clock signal to the single chip microcomputer, and the DC voltage stabilizing circuit is used for The operating voltage is provided for the single chip microcomputer, and the single chip is used to output n groups of pulse trigger signals, and the inverting circuit is used to convert the high level trigger of the pulse trigger signal into a low level trigger.
  • the working principle of the invention is: high-voltage direct current charges the storage capacitors of the discharge circuits of the various stages through the isolation diodes, and the freewheeling diode is in the back pressure state.
  • the timing pulse signal generator After the charging is completed, the timing pulse signal generator generates a certain time interval.
  • Pulse trigger signal after photoelectric isolation and signal amplification, input pulse transformer, trigger each Discharge circuit Semiconductor switch. After the switch is turned on, the pulsed high current of each channel is loaded to the corresponding load through the pulse transmission line. Since the semiconductor switches of each discharge circuit are not synchronously turned on, the time difference of conduction is the time interval of the timing pulse trigger signal, so the voltage drop of the storage capacitors will be different.
  • the pulsed large current of each discharge circuit passes through the energy storage.
  • the isolation diodes at both ends of the capacitor are isolated to avoid the phenomenon that the high voltage capacitor in one loop charges the low voltage capacitor in the other loop, and on the other hand, the current caused by the common storage capacitor rises too fast and breaks down the semiconductor. Switch problem.
  • the power generation system of the present invention generates n discharges per discharge.
  • a pulse train consisting of a large pulse current; since the freewheeling diode is connected in parallel across the storage capacitor, each pulse is a single pulse and there is no current oscillation.
  • the process of generating a single pulse in each discharge loop is as follows: if the load is large and the loop is under damping or critical damping, the freewheeling diode is always in a back pressure state and is not conducting; if the load is small, the loop is in an underdamped state, The voltage across the storage capacitor reaches zero before the current, and the freewheeling diode is forwarded.
  • the high-power semiconductor switch is not turned off. The two are connected to the pulse transmission line to form a freewheeling circuit.
  • the current in the loop is maintained by the parasitic inductance. . When the current is less than the semiconductor switch holding current (tens of milliamps), the switch is turned off; this turn-off is a soft turn-off, and the loss to the device is small; when each discharge is completed, the system's one discharge process is completed.
  • the invention generates a trigger pulse string with a certain time interval through a timing pulse generator, triggers a multi-channel discharge circuit to form a discharge system, each discharge circuit discharges a single load, and independently generates a pulse sound wave; each time there is a time interval, each discharge circuit There is a phase difference between the generated pulse sound waves. Pulsed sound waves of different phases are superimposed to achieve pulse width extension, and the width and amplitude of the combined acoustic pulse can be adjusted by adjusting the phase difference. The wider the sound pulse width, the smaller the amplitude, the richer the low-frequency energy, the larger the inverse amplitude, and the richer the high-frequency energy.
  • This kind of adjustable-frequency amplitude-modulated acoustic pulse generation technology has important application prospects in the field of high-resolution seismic detection and hydroacoustics in the ocean; especially in the field of high-resolution seismic detection in the ocean, by adjusting the width of the acoustic pulse to adapt to different water depth conditions.
  • Figure 1 is a schematic view showing the structure of a conventional liquid phase pulse discharge system.
  • FIG. 2 is a schematic structural view of a positive pulse output of a liquid phase pulse discharge system according to the present invention.
  • FIG. 3 is a schematic diagram of the structure of the timing pulse signal generator.
  • Figure 4 is a schematic structural view of an optoelectronic isolation circuit and a signal amplifying circuit.
  • Fig. 5 is a structural schematic view showing the negative pulse output of the liquid phase pulse discharge system of the present invention.
  • Figure 6(a) and (b) show the current waveform of the system output with a delay interval of 100 ⁇ s and the spectrum of the acoustic waveform.
  • Figure 7(a) and (b) show the current waveform of the system output with a delay interval of 200 ⁇ s and the spectrum of the acoustic waveform.
  • Figure 2 Shown is a liquid phase pulse discharge system based on a multi-switch delay positive polarity output, comprising a main loop unit and a drive unit composed of a three-stage discharge loop; wherein:
  • the discharge circuit is used to store electrical energy and is provided according to the drive unit
  • the discharge control signal is pulse-discharged to the load and is a positive polarity pulse output; it is composed of two isolation diodes D1 ⁇ D2, a storage capacitor C, a freewheeling diode DT, a semiconductor switch GT and a pulse transmission line.
  • one end of the storage capacitor C is connected to the cathode of the isolation diode D1, the anode of the semiconductor switch GT and the cathode of the freewheeling diode DT, and the cathode and the pulse transmission line of the semiconductor switch GT L inner conductor is connected, pulse transmission line L outer conductor is connected to the other end of the storage capacitor C, the anode of the freewheeling diode DT and the anode of the isolation diode D2, the semiconductor switch GT The gate receives the discharge control signal, and the other end of the pulse transmission line L is connected to the load; the anode of the isolation diode D1 and the cathode of the isolation diode D2 are loaded with a DC power supply, and the DC power supply passes through the isolation diode to the storage capacitor. C is charging.
  • the storage capacitors are CBB solid capacitors encapsulated in epoxy resin, each having a capacitance of 30 ⁇ F and a rated charging voltage. 10kV, the maximum charging voltage is 5600V during operation; the isolation diode is composed of 4 fast-recovery diodes with a withstand voltage of 1600V; the semiconductor switch adopts forward and reverse withstand voltage 6500V pie-shaped thyristor; freewheeling diode is composed of two pie-shaped diodes with reverse withstand voltage of 4500V; pulse transmission line with inner and outer conductors are 200 strands diameter 0.3mm A coaxial transmission line composed of an enamelled copper wire.
  • the discharge control signal is outputted successively, and includes a timing pulse signal generator, an optical isolation circuit, and a signal amplification circuit;
  • the timing pulse signal generator is used to generate a set of 3 by successive delays.
  • a trigger pulse train consisting of a pulse trigger signal with a certain delay interval, and the delay interval is adjustable from 5 ⁇ s to 200 ⁇ s; in this embodiment,
  • the timing pulse signal generator is constructed by a crystal oscillator circuit, a DC voltage regulator circuit, a single chip microcomputer and an inverter circuit; the crystal oscillator circuit, the DC voltage regulator circuit and the inverter circuit are all connected to the single chip microcomputer.
  • the crystal oscillator circuit is used to provide a clock signal to the microcontroller. It uses a 12MHz vertical crystal oscillator (by two capacitors). CR1 ⁇ CR2 and a quartz crystal oscillator Z are built); DC voltage regulator circuit is used to provide working voltage for the single chip microcomputer. It uses LM2576T voltage regulator chip (by two adjustable resistors R4 ⁇ R5) Constructed), adjustable resistor is used to adjust the time interval of the pulse trigger signal; the single-chip microcomputer is used to output the n-group pulse trigger signal, which adopts the 96 series model of Intel87C196KC 16 Bit MCU; Inverter circuit is used to convert the trigger trigger signal high level trigger to low level trigger. It uses 74LS06 six inverter (three resistors R1 ⁇ R3 and three inverters INV1 ⁇ INV3) Construct).
  • the signal amplifying circuit is configured to receive the pulse trigger signal through the photoelectric isolation circuit, and amplify and boost the signal to output a discharge control signal;
  • the photoelectric isolation circuit and the signal amplification circuit are shown in FIG. 4, and the photoelectric isolation circuit has three optical couplings G1 ⁇ G3 and three current limiting resistors RS1 ⁇ RS3.
  • the anode of the optocoupler input terminal is connected to the 5V voltage through the current limiting resistor, and the cathode receives the pulse trigger signal.
  • the signal amplifying circuit consists of three triodes T1 ⁇ T3, six current limiting resistors RS4 ⁇ RS9, and three grounding resistors.
  • RS10 ⁇ RS12 and three pulse transformers Y1 ⁇ Y3 are constructed; the two output terminals of the pulse transformer are connected to the gate and cathode of the semiconductor switch in the corresponding discharge circuit; the pulse transformer adopts KCB
  • the pulse transformer of the series (New Sifang Electronics) has a ratio of 2:1.
  • the three-stage discharge circuit shares a DC power supply, and the DC power supply charges the storage capacitor through the isolation diode.
  • the freewheeling diode is in a back pressure state, and after the charging is completed, the timing pulse signal generator generates a certain time interval.
  • the trigger pulse train consisting of three pulse trigger signals is input into the pulse transformer after photoelectric isolation and signal amplification, and triggers the thyristor of each channel. After the thyristor is turned on, the pulsed high current of each channel is loaded to a separate load through the pulse transmission line.
  • Pulse transmission line length is 80 meters, the inductance is about 80 ⁇ H; the load is a radiation array composed of 100 discharge electrodes, and the load is 0.5 ⁇ in brine with a salinity of 53mS/cm. Left and right, at this time, each discharge circuit is in an under-damped state. When the voltage across the storage capacitor reaches zero before the current, the freewheeling diode is forward-conducting, and the thyristor is not turned off. The two and the pulse transmission line form a freewheeling circuit.
  • the current in the loop is maintained by the parasitic inductance storage of the transmission line; when the current is less than the holding current of the thyristor (tens of milliamps), the thyristor is softly turned off; when each discharge is completed, the one discharge process of the system is completed.
  • Figure 5 Shown is a liquid phase pulse discharge system based on a multi-switch delay positive polarity output, comprising a main loop unit consisting of a three-stage discharge loop and a drive unit; wherein:
  • the discharge circuit is used to store electrical energy and is provided according to the drive unit
  • the discharge control signal is pulse-discharged to the load and is a negative polarity pulse output; it is composed of two isolation diodes D1 ⁇ D2, a storage capacitor C, a freewheeling diode DT, a semiconductor switch GT and a pulse transmission line.
  • one end of the storage capacitor C is connected to the anode of the isolation diode D2, the cathode of the semiconductor switch GT and the anode of the freewheeling diode DT, and the anode and the pulse transmission line of the semiconductor switch GT L inner conductor is connected, pulse transmission line L outer conductor is connected to the other end of the storage capacitor C, the cathode of the freewheeling diode DT and the cathode of the isolation diode D1, the semiconductor switch GT
  • the gate receives the discharge control signal, and the other end of the pulse transmission line L is connected to the load; the anode of the isolation diode D1 and the cathode of the isolation diode D2 are loaded with a DC power supply, and the DC power supply passes through the isolation diode to the storage capacitor.
  • C is charging.
  • composition of the driving unit and the operating principle of the system are the same as those in the first embodiment.
  • Figure 6 and Figure 7 show the charging voltage of the capacitor in Figure 1 at 2500V.
  • the current output waveform and the acoustic waveform and spectrum analysis results are obtained.
  • Figure 6 shows the result of each system discharge delay interval of 100 ⁇ s.
  • Figure 7 shows the system discharge delay interval of 200.
  • ⁇ s comparing Fig. 6 and Fig. 7, it can be seen that as the discharge delay interval of each path becomes longer, the pulse width of the sound wave becomes wider, the amplitude becomes smaller, the energy of the high frequency component is suppressed, and the energy of the low frequency component becomes rich, thereby It is proved that the acoustic pulse width, amplitude and spectral characteristics of the output can be adjusted by adjusting the discharge delay interval of each channel of the system.

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Abstract

一种基于多路开关延时输出的液相脉冲放电系统，包括：由n级放电回路组成的主回路单元和驱动单元。驱动单元用于向各级放电回路逐次延时输出放电控制信号，放电回路用于存储电能并根据放电控制信号向负载进行脉冲放电。由于控制信号存在时间间隔，每一放电回路产生的脉冲声波间存在相位差，不同相位的脉冲声波叠加在一起，可实现脉宽延展，并可通过调节相位差来调节组合后声脉冲的宽度和幅度。其可应用在海洋高分辨率地震探测领域和水声学领域。

Description

一种基于多路开关延时输出的液相脉冲放电系统
本发明属于脉冲功率技术领域，具体涉及一种基于多路开关延时输出的液相脉冲放电系统。
液相脉冲放电是将高压脉冲加载到液体中的电极负载上产生电弧或电晕放电的技术。系统工作原理是采用电容储能，通过触发放电开关瞬间释放能量，实现高功率电脉冲的输出从而实现在水体中进行等离子体放电。系统首先将工频交流电转换成中高频交流电，再通过变压器升压和硅堆整流形成高压直流输出对储能电容进行充电，充电完成后，由控制电路控制触发大功率半导体开关导通，储能电容通过传输线对负载进行放电。放电过程会产生冲击波效应，又被称为"液电效应"。 脉冲声波的产生是由于液体中高压脉冲放电产生等离子体通道（区域）的高温高压引起了气泡的强烈脉动过程。等离子体生成时，气泡壁因内部高温高压向外膨胀，克服水静压、表面张力、粘滞力等外力对周围水体做功。随着气泡内部等离子体逐渐熄灭，内部温度开始下降，内部压强也随之下降，气泡壁的向外运动速度变小，直至速度为零，此时气泡内部压强远小于水静压，气泡开始收缩，在收缩过程中，内部压强再次变大，如此往复即形成气泡脉动。 气泡膨胀初始和坍缩时，内部压强非常大，产生的是压力波；而气泡半径较大时，内部压强小于水静压，此时产生的是稀疏波，稀疏波集中了低频部分的声能。气泡脉动过程具有周期性，脉动次数及周期大小由气泡本身具有的能量和水静压条件决定。能量大则脉动次数多，周期长；水静压大则脉动次数少，周期短。
目前，基于液相脉冲放电技术开发的等离子体震源或脉冲声源已应用于海洋高分辨率浅地层探测、水声研究等领域。尤其是海洋高分辨率浅地层探测领域，法国 SIG ，荷兰 GEO-Resource ，英国 Applied Acoustic 等公司开发了多款产品，我国自主开发的产品也在国家多个核电厂厂址选址、跨海大桥和海底隧道地质勘探调查等多个重大工程项目建设中实现了工程应用。已经开发并应用的液相脉冲放电电路如图 1 所示，主要包括储能电容、续流二极管、半导体开关管和传输线。此电路一般采用单路开关或者多路开关同步输出的方法，如果主回路参数固定，即储能电容容值、充电电压和负载一定的条件下，输出脉宽无法调节，放电产生的脉冲声波频率特性也无法调节。
对于海洋高分辨率地震探测，当遇到水深变化较快的水域，尤其是从浅水向深水变化时，需要根据水深及时降低等离子体震源产生的声脉冲主频。一般来说，地层对声波的吸收规律为 0.2dB/ 波长，因此降低主频可以提高地层穿透深度。目前，在单路开关输出或者多路开关同步输出的系统中，调节脉冲声波频率的方法有：法国 SIG 公司采用调节电容容值和更换负载的方法，但前者容易烧蚀继电器开关，后者需要停止作业，更换负载，操作复杂繁琐；荷兰 Geo-Resource 公司采用调节电容充电电压的方法，但这种方法无法改变电源输出脉宽，声脉冲频率变化很小。因此上述现有的技术方法都很难实现对声脉冲进行快速调幅调宽，从而改变其频率特性。
针对现有技术所存在的上述技术缺陷，本发明公开了一种基于多路开关延时输出的液相脉冲放电系统，能够实现多路脉冲延时输出 ，使得叠加组合后的输出脉宽可调。
一种基于多路开关延时输出的液相脉冲放电系统，包括：由 n 级放电回路组成的主回路单元和驱动单元， n 为大于 1 的自然数；
所述的 驱动单元用于向各 级放电回路 逐次延时输出放电控制信号；
所述的 放电回路用于存储电能并根据放电控制信号向负载进行脉冲放电。
对于正极性脉冲输出，所述的 放电回路 由两个隔离二极管 D1~D2 、一储能电容、一续流二极管、一 半导体开关 和一脉冲传输线组成；其中，储能电容的一端与隔离二极管 D1 的阴极、 半导体开关 的阳极和续流二极管的阴极相连， 半导体开关 的阴极与脉冲传输线内导体相连，脉冲传输线外导体与储能电容的另一端、续流二极管的阳极和隔离二极管 D2 的阳极相连， 半导体开关 的门极接收所述的放电控制信号。
对于负极性脉冲输出，所述的 放电回路 由两个隔离二极管 D1~D2 、一储能电容、一续流二极管、一 半导体开关 和一脉冲传输线组成；其中，储能电容的一端与隔离二极管 D2 的阳极、 半导体开关 的阴极和续流二极管的阳极相连， 半导体开关 的阳极与脉冲传输线内导体相连，脉冲传输线外导体与储能电容的另一端、续流二极管的阴极和隔离二极管 D1 的阴极相连， 半导体开关 的门极接收所述的放电控制信号。
隔离二极管 D1 的阳极与隔离二极管 D2 的阴极两端间加载直流电源，所述的直流电源用于通过隔离二极管对储能电容进行充电。
所述的隔离二极管由一个二极管组成或由多个二极管串联或并联组成；两个隔离二极管的作用是在放电阶段对每一放电回路进行隔离，避免多路延时放电产生时，高压储能电容通过充电回路对低压储能电容进行充电的现象，保证能量的充分释放，同时也解决储能电容共地引起的电流上升过快而击穿 半导体开关 的问题。
所述的储能电容由一个电容组成或由多个电容串联或并联组成。
所述的续流二极管由一个二极管组成或由多个二极管串联组成；能够消除放电回路中电流震荡的作用。
所述的 半导体开关 由一个功率半导体开关组成或由多个功率半导体开关串联组成； 所述的 功率半导体开关 采用普通晶闸管、 IGCT （集成门极换流晶闸管）或 RSD （反相开关晶体管）等。
所述的 脉冲传输线采用高压同轴电缆或其他高压电缆线，其另一端接负载。
所述的驱动单元包括时序脉冲信号发生器、光电隔离电路和信号放大电路；其中：
所述的时序脉冲信号发生器用于逐次 延时生成 n 组脉冲触发信号；
所述的信号放大电路用于通过光电隔离电路接收所述的脉冲触发信号，并对该信号进行放大升压后输出放电控制信号。
所述的时序脉冲信号发生器由晶振电路、直流稳压电路、单片机和反相电路构建；其中：
所述的晶振电路 用于 为单片机提供时钟信号，所述的直流稳压电路 用于 为单片机提供工作电压，所述的单片机 用于 输出 n 组脉冲触发信号， 所述的反相电路 用于将脉冲触发信号高电平触发转换为低电平触发。
本发明的工作原理为：高压直流通过隔离二极管对各级放电回路的储能电容进行充电，此时续流二极管处于反压状态，充电完成后，时序脉冲信号发生器产生有一定时间间隔的多个脉冲触发信号，经光电隔离和信号放大后输入脉冲变压器，触发每一 放电回路 的半导体开关。开关导通后，每一路的脉冲大电流通过脉冲传输线加载到对应负载上。由于每一路放电回路的半导体开关不是同步导通，导通的时间差为时序脉冲触发信号的时间间隔，因此储能电容的压降会有差异，此时每一放电回路的脉冲大电流通过储能电容两端的隔离二极管进行隔离，一方面避免某一回路中的高压电容对另一回路中的低压电容进行充电的现象，另一方面避免储能电容共地引起的电流上升太快而击穿半导体开关的问题。
本发明发电系统每次放电产生的是 n 个脉冲大电流组成的脉冲串；由于储能电容两端并联了续流二极管，因此每个脉冲都为单脉冲，不存在电流振荡。
每一放电回路产生单脉冲的过程如下：如果负载较大，回路处于过阻尼或临界阻尼时，续流二极管一直处于反压状态，不导通；如果负载较小，回路处于欠阻尼状态时，储能电容两端电压先于电流达到零点，此时续流二极管正向导通，大功率半导体开关并未关断，两者与脉冲传输线构成续流回路，回路中的电流由寄生电感储能维持。当电流小于半导体开关维持电流（几十毫安）时，开关断开；这种关断是软关断，对器件的损耗小；当每一路放电都结束时，系统的一次放电过程才完成。
本发明通过时序脉冲发生器产生有一定时间间隔的触发脉冲串，触发多路放电回路组成放电系统，每一放电回路对单个负载进行放电，独立产生脉冲声波；由于存在时间间隔，每一放电回路产生的脉冲声波间存在相位差。不同相位的脉冲声波叠加在一起，可实现脉宽延展，并可通过调节相位差来调节组合后声脉冲的宽度和幅度。声脉冲宽度越宽，幅度越小，低频能量越丰富，反则幅度越大，高频能量越丰富。
这种可调频调幅的声脉冲发生技术在海洋高分辨率地震探测领域和水声学领域有重要的应用前景；尤其是海洋高分辨率地震探测领域，通过调节声脉冲宽度来适应不同水深条件下的作业要求，且不需要中断作业过程，无需改变主回路电气参数或更换负载，因此特别适合大陆坡向海沟延伸过程的地震探测作业。
图 1 为现有液相脉冲放电系统的结构示意图。
图 2 为本发明液相脉冲放电系统正极性脉冲输出的结构示意图。
图 3 为时序脉冲信号发生器的结构示意图。
图 4 为光电隔离电路及信号放大电路的结构示意图。
图 5 为本发明液相脉冲放电系统负极性脉冲输出 的结构示意图。
图 6(a) 和 (b) 为延时间隔为 100 μs 系统输出的电流波形以及声波波形频谱图。
图 7(a) 和 (b) 为延时间隔为 200 μs 系统输出的电流波形以及声波波形频谱图。
为了更为具体地描述本发明，下面结合附图及具体实施方式对本发明的技术方案及其相关工作原理进行详细说明。
实施例 1
如图 2 所示，一种基于多路开关延时正极性输出的液相脉冲放电系统，包括由三级放电回路组成的主回路单元和驱动单元；其中：
放电回路用于存储电能并根据 驱动单元提供的 放电控制信号向负载进行脉冲放电且为正极性脉冲输出；其由两个隔离二极管 D1~D2 、一储能电容 C 、一续流二极管 DT 、一半导体开关 GT 和一脉冲传输线 L 组成；其中：储能电容 C 的一端与隔离二极管 D1 的阴极、半导体开关 GT 的阳极和续流二极管 DT 的阴极相连，半导体开关 GT 的阴极与脉冲传输线 L 内导体相连，脉冲传输线 L 外导体与储能电容 C 的另一端、续流二极管 DT 的阳极和隔离二极管 D2 的阳极相连，半导体开关 GT 的门极接收放电控制信号，脉冲传输线 L 的另一端接负载；隔离二极管 D1 的阳极和隔离二极管 D2 的阴极两端间加载直流电源，直流电源通过隔离二极管对储能电容 C 进行充电。
本实施方式中，储能电容 采用环氧树脂封装的 CBB 固态电容，每个电容容值为 30μF ，额定充电电压 10kV ，工作时最高充电电压为 5600V ； 隔离二极管 采用 4 只耐压 1600V 的快恢复二极管串联组成； 半导体开关 采用正反向耐压均为 6500V 的饼状晶闸管； 续流二极管 采用两只反向耐压为 4500V 的饼状二极管串联构成； 脉冲传输线 采用内外导体均为 200 股直径 0.3mm 漆包铜线构成的同轴传输线。
驱动单元用于向各 级放电回路 逐次延时输出放电控制信号，其包括时序脉冲信号发生器、光电隔离电路和信号放大电路；其中：
时序脉冲信号发生器用于逐次 延时生成一组由 3 个具有一定延时间隔的脉冲触发信号组成的触发脉冲串，延时间隔为 5μs 至 200μs 可调；本实施方式中， 时序脉冲信号发生器由晶振电路、直流稳压电路、单片机和反相电路构建；晶振电路、直流稳压电路和反相电路均与单片机相连。
如图 3 所示， 晶振电路 用于 为单片机提供时钟信号，其采用 12MHz 立式晶振（由两个电容 CR1~CR2 和一个石英晶体振荡器 Z 构建）；直流稳压电路 用于 为单片机提供工作电压，其采用 LM2576T 稳压芯片（由两个可调电阻 R4~R5 构建），可调电阻 用于调节脉冲触发信号的时间间隔； 单片机 用于 输出 n 组脉冲触发信号，其采用 96 系列型号为 Intel87C196KC 的 16 位单片机；反相电路用于将脉冲触发信号高电平触发转换为低电平触发，其 采用 74LS06 六反相器（ 由三个电阻 R1~R3 和三个反相器 INV1~INV3 构建）。
信号放大电路用于通过光电隔离电路接收 脉冲触发信号，并对该信号进行放大升压后输出 放电控制信号； 本实施方式中， 光电隔离电路和信号放大电路如图 4 所示，光电隔离电路由三个光耦 G1~G3 和三个限流电阻 RS1~RS3 组成，光耦输入端阳极通过限流电阻接 5V 电压，阴极接收 脉冲触发信号 ；信号放大电路由三个三极管 T1~T3 、六个限流电阻 RS4~RS9 、三个接地电阻 RS10~RS12 和三个脉冲变压器 Y1~Y3 构建；脉冲变压器两个输出端与对应 放电回路中 半导体开关的 门极和阴极相连； 脉冲变压器采用 KCB 系列（新创四方电子）的脉冲变压器，变比为 2:1 。
本实施方式中，三级放电回路共用一个直流电源，直流电源通过隔离二极管对储能电容进行充电，此时续流二极管处于反压状态，充电完成后，时序脉冲信号发生器产生有一定时间间隔的三个脉冲触发信号组成的触发脉冲串，经光电隔离和信号放大后输入脉冲变压器，触发每一路的晶闸管。晶闸管导通后，每一路的脉冲大电流通过脉冲传输线加载到独立的负载。脉冲传输线长度为 80 米，电感量约为 80 μ H 左右；负载采用 100 个放电电极组成的发射阵，在盐度为 53mS/cm 的盐水中负载大小为 0.5 Ω 左右，此时每一路放电回路都处于欠阻尼状态，当储能电容两端电压先于电流达到零点，续流二极管正向导通，晶闸管并未关断，两者与脉冲传输线构成续流回路，回路中的电流由传输线寄生电感储能维持；当电流小于晶闸管的维持电流（几十毫安）时，晶闸管软关断；当每一路放电都结束时，系统的一次放电过程才完成。
实施例 2
如图 5 所示，一种基于多路开关延时正极性输出的液相脉冲放电系统，包括由三级放电回路组成的主回路单元和一驱动单元；其中：
放电回路用于存储电能并根据 驱动单元提供的 放电控制信号向负载进行脉冲放电且为负极性脉冲输出；其由两个隔离二极管 D1~D2 、一储能电容 C 、一续流二极管 DT 、一半导体开关 GT 和一脉冲传输线 L 组成；其中：储能电容 C 的一端与隔离二极管 D2 的阳极、半导体开关 GT 的阴极和续流二极管 DT 的阳极相连，半导体开关 GT 的阳极与脉冲传输线 L 内导体相连，脉冲传输线 L 外导体与储能电容 C 的另一端、续流二极管 DT 的阴极和隔离二极管 D1 的阴极相连，半导体开关 GT 的门极接收放电控制信号，脉冲传输线 L 的另一端接负载；隔离二极管 D1 的阳极和隔离二极管 D2 的阴极两端间加载直流电源，直流电源通过隔离二极管对储能电容 C 进行充电。
本实施方式中， 驱动单元的组成以及系统的工作原理均与实施例 1 相同。
图 6 和图 7 为本实施例 1 在电容充电电压为 2500V 时得到电流输出波形以及声波波形和频谱分析结果，其中图 6 为系统每一路 放电延时间隔为 100 μs 的结果，图 7 为系统每一路 放电延时间隔为 200 μs 的结果，比较图 6 和图 7 可知，随着每一路的 放电延时 间隔变长，声波脉宽变宽，幅度变小，高频成分能量被压制，低频成分能量变丰富，由此可 证明通过调节系统每一路的放电延时间隔可以调整输出的声脉宽、幅度和频谱特性。

Claims (5)

  1. 一种基于多路开关延时输出的液相脉冲放电系统，其特征在于，包括：由n级放电回路组成的主回路单元和驱动单元，n为大于1的自然数；
    所述的驱动单元用于向各级放电回路逐次延时输出放电控制信号；
    所述的放电回路用于存储电能并根据放电控制信号向负载进行脉冲放电。
  2. 根据权利要求1所述的液相脉冲放电系统，其特征在于：对于正极性脉冲输出，所述的放电回路由两个隔离二极管D1~D2、一储能电容、一续流二极管、一半导体开关和一脉冲传输线组成；其中，储能电容的一端与隔离二极管D1的阴极、半导体开关的阳极和续流二极管的阴极相连，半导体开关的阴极与脉冲传输线内导体相连，脉冲传输线外导体与储能电容的另一端、续流二极管的阳极和隔离二极管D2的阳极相连，半导体开关的门极接收所述的放电控制信号。
  3. 根据权利要求1所述的液相脉冲放电系统，其特征在于：对于负极性脉冲输出，所述的放电回路由两个隔离二极管D1~D2、一储能电容、一续流二极管、一半导体开关和一脉冲传输线组成；其中，储能电容的一端与隔离二极管D2的阳极、半导体开关的阴极和续流二极管的阳极相连，半导体开关的阳极与脉冲传输线内导体相连，脉冲传输线外导体与储能电容的另一端、续流二极管的阴极和隔离二极管D1的阴极相连，半导体开关的门极接收所述的放电控制信号。
  4. 据权利要求1所述的液相脉冲放电系统，其特征在于：所述的驱动单元包括时序脉冲信号发生器、光电隔离电路和信号放大电路；其中：
    所述的时序脉冲信号发生器用于逐次延时生成n组脉冲触发信号；
    所述的信号放大电路用于通过光电隔离电路接收所述的脉冲触发信号，并对该信号进行放大升压后输出放电控制信号。
  5. 根据权利要求4所述的液相脉冲放电系统，其特征在于：所述的时序脉冲信号发生器由晶振电路、直流稳压电路、单片机和反相电路构建；所述的晶振电路用于为单片机提供时钟信号，所述的直流稳压电路用于为单片机提供工作电压，所述的单片机用于输出n组脉冲触发信号，所述的反相电路用于将脉冲触发信号高电平触发转换为低电平触发。
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