WO2014067353A1 - 中频模数转换装置 - Google Patents

中频模数转换装置 Download PDF

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Publication number
WO2014067353A1
WO2014067353A1 PCT/CN2013/083504 CN2013083504W WO2014067353A1 WO 2014067353 A1 WO2014067353 A1 WO 2014067353A1 CN 2013083504 W CN2013083504 W CN 2013083504W WO 2014067353 A1 WO2014067353 A1 WO 2014067353A1
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WO
WIPO (PCT)
Prior art keywords
module
filter
gain
analog
digital conversion
Prior art date
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PCT/CN2013/083504
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English (en)
French (fr)
Inventor
刘微
段亚娟
雷梦毕
李香玲
张国俊
Original Assignee
中兴通讯股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Priority to EP13850774.4A priority Critical patent/EP2916462A4/en
Priority to US14/440,094 priority patent/US9793938B2/en
Publication of WO2014067353A1 publication Critical patent/WO2014067353A1/zh

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference
    • H04B1/12—Neutralising, balancing, or compensation arrangements
    • H04B1/123—Neutralising, balancing, or compensation arrangements using adaptive balancing or compensation means
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
    • H04B1/0007—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain wherein the AD/DA conversion occurs at radiofrequency or intermediate frequency stage
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J1/00—Frequency-division multiplex systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems

Definitions

  • the present invention relates to the field of communications, and in particular to an intermediate frequency analog to digital conversion device.
  • BACKGROUND With the continuous development of communication technologies, there are more and more requirements for the number of carrier frequencies of wireless base station products.
  • Today's communication technologies require more channels to be implemented, resulting in an increase in the complexity of transceiver design and an increase in volume, as well as a series of problems such as increased cost and reduced reliability.
  • high integration and simple design have become a trend of technology.
  • the requirement of high integration can not only improve the quality and reliability of products, but also facilitate the development of platform design.
  • the current integration solutions mainly come in two forms: One way is radio frequency integrated circuit
  • RFIC Radio Frequency Integrated circuit
  • MCM Multi Chip Model
  • MCM Multi Chip Model
  • MCM Multi Chip Model
  • the high integration and high performance of MCM technology creates opportunities for further implementation of miniaturization.
  • MCM Multi Chip Model
  • MCM is to mount multiple bare chips directly on a single carrier or substrate, and then use multiple conductive metals to place multiple The bare chips are connected and finally packaged into a module (mod U le) using cast or ceramic encapsulation techniques. Since a plurality of chips are contained in one module, not only the package density is increased, but also the pitch between the plurality of chips is reduced, the wiring density is increased, and the performance and reliability of the entire module are significantly improved.
  • MCM technology can realize device development in a short time under the same integration degree, and the cost advantage is obvious.
  • RFIC is a new type of device that has emerged as an integrated circuit (IC) process improvement since the mid-1990s. It implements multiple RF functions on the same substrate. The implementation of RFIC is difficult and the development cycle is relatively long. There is no advantage in the initial cost. It is necessary to show the cost advantage under the order of 15K or more.
  • the bandwidth requirement of the circuit between the intermediate frequency gain amplifying module and the interface of the analog-to-digital converter (ADC) is different in different systems.
  • Embodiments of the present invention provide an intermediate frequency analog-to-digital conversion apparatus to at least solve the related art in that a filter between a gain amplifying module and an analog-to-digital conversion module is not adjustable, resulting in different standards or different frequency bands.
  • the technical problem of adjusting the circuit composition of the intermediate frequency analog to digital conversion device is required in the system.
  • an intermediate frequency analog-to-digital conversion apparatus includes: a gain attenuation module, a gain amplification module, a filter, and an analog-to-digital conversion module, wherein the gain attenuation module is configured to receive The IF signal is subjected to attenuation processing; the gain amplification module is connected to the gain attenuation module, and is configured to amplify a signal output by the gain attenuation module; the filter is a variable filter, and is connected to the gain amplification module, and is set to Filtering the signal amplified by the gain amplifying module, wherein the variable filter is a filter with adjustable filter coefficients; the analog-to-digital conversion module is connected to the filter, and is configured to be filtered by the filter The signal is converted to a digital signal.
  • the apparatus further includes: an SPI control module coupled to the variable filter, configured to control a filter coefficient of the variable filter.
  • the SPI control module is coupled to the gain attenuation module and configured to control an attenuation coefficient of the gain attenuation module.
  • the analog-to-digital conversion module is provided with a differential analog input interface and a digital output interface, wherein the differential analog input interface is configured to receive an intermediate frequency analog signal sent by the filter module, and the digital output interface is configured to convert the analog to digital The digital signal obtained after the module analog-to-digital conversion is sent out.
  • the above digital output interface is a JESD204B interface and/or an LVDS interface.
  • the gain attenuation module is further connected to the mixer and configured to receive the intermediate frequency signal output by the mixer.
  • the mixer described above is a mixer in a TDD or FDD wireless product.
  • the mixer described above is a mixer in a DPD feedback system.
  • the encapsulation is performed using MCM technology or RFIC technology.
  • a variable filter is employed in the intermediate frequency analog-to-digital conversion device. Therefore, the parameters of the filter can be adjusted according to the requirements of the system to meet different system requirements. In this way, the related art is solved because the filter between the gain amplifying module and the analog to digital conversion module is not adjustable, resulting in different systems.
  • FIG. 2 is a schematic diagram of another preferred structure of an intermediate frequency analog-to-digital conversion apparatus according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram showing the connection of the first application scenario of the intermediate frequency analog-to-digital conversion device according to the embodiment of the present invention
  • FIG. 4 is a schematic diagram of the connection of the first application scenario of the intermediate frequency analog-to-digital conversion device according to the embodiment of the present invention
  • the gain attenuation module 102 is configured to attenuate the received intermediate frequency signal
  • the gain amplifying module 104 is connected to the gain attenuating module 102 and configured to amplify a signal output by the gain attenuating module;
  • the filter 106 is a variable filter, and is connected to the gain amplifying module 104, and is configured to filter a signal amplified by the gain amplifying module, wherein the variable filter is a filter with adjustable filter coefficients.
  • the analog to digital conversion module 108 is coupled to the filter 106 and configured to convert the signal filtered by the filter into a digital signal.
  • a variable filter is employed in the intermediate frequency analog to digital conversion device. Therefore, the parameters of the filter can be adjusted to meet different system requirements according to the requirements of the system. In this way, the filter between the gain amplification module and the analog-to-digital conversion module in the prior art is not adjustable, so that the circuit composition of the intermediate frequency analog-to-digital conversion device is required in systems with different standards or different frequency bands.
  • the technical problem that the versatility caused by the adjustment is not strong has achieved the technical effect of improving the versatility of the intermediate frequency analog-digital conversion device. In a preferred embodiment, as shown in FIG.
  • the intermediate frequency analog-to-digital conversion device further includes: an SPI control module 202 coupled to the variable filter, configured to control filtering parameters of the variable filter That is, the serial interface (SPI) control module selects the filter pattern and the filter parameters of the filter to meet the system requirements of different bandwidths or different systems, and can support the bandwidth requirements under different conditions. Increase the flexibility of use.
  • the SPI control module is further coupled to the gain attenuation module and configured to control an attenuation coefficient of the gain attenuation module. That is, the SIP may not only be responsible for controlling the filter, but also control the parameters of the gain attenuation module according to the gain situation in the receiver to complete the adjustment of the magnitude of the signal.
  • FIG. 3 it is a schematic diagram of a preferred structure of a two-channel intermediate frequency analog-to-digital converter. Among them, an attenuator (corresponding to the above-described gain attenuating module 102), an amplifier (corresponding to the above-described gain amplifying module 104), and an analog converter (corresponding to the analog-digital conversion module 108 described above).
  • an attenuator corresponding to the above-described gain attenuating module 102
  • an amplifier corresponding to the above-described gain amplifying module 104
  • an analog converter corresponding to the analog-digital conversion module 108 described above.
  • the analog-to-digital conversion module may further be provided with a differential analog input interface and a digital output interface, wherein the differential analog input interface is configured to receive an intermediate frequency analog signal sent by the filter module, and the digital output interface is set to The digital signal obtained by analog-to-digital conversion of the analog-to-digital conversion module is sent out.
  • the differential analog input interface may be a differential circuit, and the corresponding digital output interface may be compatible with JESD204B (Jedec Stand 204 protocol version B) interface and/or LVDS (Low-Voltage Differential Signaling) interface. .
  • the serial interface can effectively reduce the device pins and package size, thereby achieving cost saving, reducing the number of pins of the FPGA (Field-Programmable Gate Array) and reducing the number of pins.
  • the number of traces in the digital part effectively reduces the trace area of the printed circuit board (PCB).
  • the analog-to-digital conversion module is provided with a differential digital interface, and is configured to transmit the digital signal obtained by analog-to-digital conversion of the analog-to-digital conversion module.
  • the differential digital interface described above may be a JES 204B interface and/or an LVDS interface.
  • the processed signal in the intermediate frequency digital-to-analog conversion device may be a signal obtained from the mixer, that is, the intermediate frequency signal output by the mixer is sent to the gain attenuation module of the intermediate frequency digital-to-analog conversion device and subjected to subsequent processing.
  • the gain attenuating module is further connected to the mixer and configured to receive the intermediate frequency signal output by the mixer.
  • the above intermediate frequency digital-to-analog conversion device can be used in TDD (Time Division Duplexing) or in wireless products for FDD (Frequency Division Duplexing), that is, the above-mentioned mixer is TDD.
  • the system is either a mixer in an FDD wireless product.
  • the above-mentioned mixer is a mixer in a DPD feedback system.
  • the above-mentioned intermediate frequency digital-to-analog conversion device may be packaged by MCM technology or by RFIC technology.
  • a single-chip integrated dual-channel intermediate frequency receiving device is provided by MCM or RFIC technology, and the device can directly convert an intermediate frequency analog input signal into a digital signal. Output, gain adjustable, filter bandwidth and sample rate configurable, support for FDD and TDD time slot shutdown.
  • the device can be used for a super-heterodyne receiver of a base station product and a Digital Pre-Distortion (DPD) receiving link.
  • DPD Digital Pre-Distortion
  • the method of first attenuating and then amplifying can be adopted, and the linear performance of the link is effectively ensured from the system design point of view.
  • the device has a large gain adjustment range, and the gain variation can be from 20dB to lj-11.5dB.
  • the input dynamic signal is adjusted for different levels of the level, and the overall dynamic range is effectively improved by adjusting the attenuation module.
  • the present invention can simplify the design of the intermediate frequency portion of the receiver as compared with the receiver intermediate frequency technique in the related art. With the increasing demand for platformization and multi-modality.
  • the filter between the gain amplifying module and the analog-to-digital converter (ADC) is implemented by a state-of-the-art tunable filter.
  • the bandwidth of the filter can be The selection is made via the SPI control module.
  • the adjustability of the filter coefficients is realized, and the adaptability of the receiver and the uniformity of the platform are improved.
  • the device provided by the present invention is used for converting an analog signal to a digital signal, and can be mainly composed of the following components: a gain attenuating module, a gain amplifying module, a filter module, an analog to digital conversion module, and an SPI. Control module. The functions implemented by each module are described in detail below.
  • a gain attenuation module configured to attenuate the input high-power IF analog signal to control the magnitude of the signal
  • Gain amplifier module (amplifier), mainly set to complete the power amplification of the signal
  • the filter module (filter), through the optional bandwidth filter, can support the bandwidth requirements under different conditions, and improve the flexibility of using the device;
  • an analog to digital conversion module (digital to analog converter), configured to convert continuous analog signals into discrete digital signals
  • SPI SPI Control Module
  • the above device can realize the following functions: In the TDD time-sharing operation, if the transmitting path works and the receiving path does not work, the internal gain amplifying module can be powered off by the control pin of the module, thereby effectively saving energy.
  • the intermediate frequency analog interface of the above device may be a differential input circuit. The signal is transmitted by using a differential circuit, which can effectively suppress common mode interference and improve the spurious performance of the circuit.
  • the digital interface i.e., the port that the device is configured to output to the digital signal, is compatible with the JESD 204B and LVDS interfaces.
  • the serial interface method effectively reduces the device pins and package size, saves cost, and reduces the number of pins for the FPGA, reduces the number of traces in the digital portion, and effectively reduces the printed circuit board ( Printed Circuit Board, referred to as PCB).
  • the above devices can support up to 500M input analog frequency range, up to 100M IF analog bandwidth and up to 370M sampling frequency. It has a large input level dynamic range and can support various wireless products, taking into account both TDD and FDD modes. In the TDD mode, consider the time-division work of sending and receiving, and have the power consumption adjustment function to achieve the purpose of energy saving.
  • the module supports flexible configuration at any sampling rate less than the highest sampling rate, while the bandwidth of the filter is flexibly configurable according to the corresponding sampling rate.
  • the device integration is improved by the MCM or the RFIC technology, the PCB cost and the device cost are saved, the design complexity is reduced, and the reliability of the product is improved.
  • the same PCB area can accommodate more channels, which improves the cost advantage of wireless transceivers to a certain extent and enhances the market competitiveness of products.
  • the analog signal from the intermediate frequency is amplified by the amplification module for the low power signal; for the high power signal, the different attenuation values of the attenuation module are adjusted, so that the overall gain of the module can be adjusted, so that the input analog level of the ADC is within the working range.
  • the ADC outputs a digital signal, preferably, to support JES204B or LVDS output.
  • Two application scenarios of the above-described intermediate frequency analog to digital conversion device shown in FIGS. 4 and 5 are shown.
  • Application scenario 1) The above-mentioned intermediate frequency analog-to-digital conversion device is applied to a receiver system and is suitable for wireless products such as TDD and FDD.
  • the device is set to the appropriate gain level based on the magnitude of the received signal power and the previous gain of the receiver mixer. If the input signal is a small signal, the device can be set to zero attenuation to ensure sufficient amplification of the small signal to reach the demodulation threshold of the baseband; if it is a large interference signal, pass the device Setting the appropriate amount of attenuation with the RF circuit before the mixer maximizes the linearity and NF at the receiver. For TDD time-sharing work, if the transmit path works and the receive path does not work, the control pin of the module can be used to control the internal gain amplification module to power off, thereby achieving the purpose of effectively saving power.
  • Application scenario 2) As shown in FIG.
  • the above intermediate frequency analog to digital conversion device is applied to a DPD feedback system in TDD and FDD wireless products.
  • the gain in the feedback system is generally constant and can be set to a suitable amount of attenuation or no attenuation depending on the signal level of the transmitter's power amplifier coupled to the feedback link. Since the linearity of the device does not change due to the magnitude of the attenuation value, it is not used in the feedback system to affect the linearity of the signal received by the feedback link due to the difference in attenuation values.
  • the feedback link takes a multi-order distortion component of the power amplifier, and therefore requires a wider intermediate frequency bandwidth, usually 3 to 5 times the transmission bandwidth, and the device can adjust the bandwidth of the low-pass filter accordingly according to the requirements of the feedback bandwidth.
  • the intermediate frequency analog-to-digital conversion device provided by the above embodiment can be used in both the TDD system and the FDD system, and realizes the requirement of sharing between the TDD and the FDD platform.
  • the gain amplification module inside the device can be powered off when the receiver is not working to save power consumption. Whether used in a receiver or a feedback system, it simplifies the design of the RF part link and is more flexible to use. At the same time, the use of integrated technology saves PCB area and reduces design costs.
  • a variable filter is used in the intermediate frequency analog-to-digital conversion device, so that the parameters of the filter can be adjusted according to the requirements of the system to meet different requirements. system requirement.
  • the filter between the gain amplifying module and the analog-to-digital conversion module is not adjustable, it is required to be centered in a system of different standards or different frequency bands.
  • the technical problem of adjusting the circuit composition of the frequency analog-to-digital conversion device achieves the technical effect of improving the versatility of the intermediate frequency analog-digital conversion device.

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  • Computer Networks & Wireless Communication (AREA)
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  • Circuits Of Receivers In General (AREA)

Abstract

本发明公开了一种中频模数转换装置，包括：增益衰减模块、增益放大模块、滤波器和模数转换模块，其中，增益衰减模块，设置为对接收到的中频信号进行衰减处理；增益放大模块，与增益衰减模块相连，设置为对从增益衰减模块输出的信号进行放大处理；滤波器是可变滤波器，与增益放大模块相连，设置为对经过增益放大器放大后的信号进行滤波处理；模数转换模块，与滤波器相连，设置为将经过滤波器滤波后的信号转换为数字信号。本发明解决了相关技术中由于增益放大模块和模数转换模块之间的滤波器是不可调的，而导致在不同制式或者不同频段的系统中需要对中频模数转换装置的电路组成进行调整的技术问题，达到了提高中频模数转换装置通用性的技术效果。

Description

中频模数转换装置
技术领域 本发明涉及通信领域， 具体而言， 涉及一种中频模数转换装置。 背景技术 随着通讯技术的不断发展， 对于无线基站产品载频个数的要求也越来越多。 现在 的通讯技术要求实现更多的通道， 从而导致了收发信机设计的复杂程度不断增加， 体 积也不断变大， 同时也带来了成本的增加和可靠性的降低等一系列的问题。 面对激烈 的市场竞争， 高集成度和设计简单已经成为一种技术的发展趋势， 高集成度的要求不 仅能够提高产品的质量和可靠性， 也有利于平台化设计的发展。 为了提高集成度， 目前的集成方案主要有两种形式： 一种方式是射频集成电路
(Radio Frequency Integrated circuit, 简称为 RFIC)， 另一种方式是多芯片模块系统 (Multi Chip Model, 简称为 MCM)。 下面对这两种集成方式进行具体描述。
MCM技术的高集成度、 高性能的特点为小型化的进一步实施创造了机会， MCM (Multi Chip Model)是将多个裸芯片直接安装在单个载体或基板上， 再通过高导电金 属将多个裸芯片连接起来， 最后用铸塑或陶瓷包封技术将其封装成一个模块 (modUle)。 由于在一个模块中含有多个芯片， 不仅提高了封装密度， 还由于多个芯片之间的间距 减小， 布线密度提高， 以至整个模块的性能以及可靠性都有明显提高。 MCM 技术在 相同的集成度下可以在较短时间内实现器件开发， 成本优势比较明显。
RFIC是 90年代中期以来随着集成电路（Integrated Circuit, 简称为 IC)工艺改进 而出现的一种新型器件， 在同一个基板上实现了多种射频功能。 RFIC的实现难度高和 开发周期比较长，初期成本没有优势，需要在 15K以上的订单下才能体现出成本优势。 目前， 一般的接收机中的中频模数转换装置中由于中频增益放大模块和模数转换 器 （Analog-to-Digital Converter, 简称为 ADC) 的接口之间的电路在不同制式下对带 宽的要求， 且该部分电路的滤波器一般是不可调的， 从而导致了接收机的应用平台难 以统一， 也就是接收机的通用性不强， 对于不同的制式和频段之间需要更改电路的组 成来完善， 无法真正的实现平台的统一。 针对上述的问题， 目前尚未提出有效的解决方案。 发明内容 本发明实施例提供了一种中频模数转换装置， 以至少解决相关技术中由于增益放 大模块和模数转换模块之间的滤波器是不可调的， 而导致在不同制式或者不同频段的 系统中需要对中频模数转换装置的电路组成进行调整的技术问题。 根据本发明实施例的一个方面， 提供了一种中频模数转换装置， 包括： 增益衰减 模块、 增益放大模块、 滤波器和模数转换模块， 其中， 上述增益衰减模块， 设置为对 接收到的中频信号进行衰减处理； 上述增益放大模块， 与上述增益衰减模块相连， 设 置为对上述增益衰减模块输出的信号进行放大处理； 上述滤波器是可变滤波器， 与上 述增益放大模块相连， 设置为对经过上述增益放大模块放大后的信号进行滤波处理， 上述可变滤波器是滤波系数可调的滤波器； 上述模数转换模块， 与上述滤波器相连， 设置为将经过上述滤波器滤波后的信号转换为数字信号。 优选地， 上述装置还包括： SPI 控制模块， 与上述可变滤波器耦合， 设置为对上 述可变滤波器的滤波系数进行控制。 优选地， 上述 SPI控制模块与上述增益衰减模块耦合， 设置为对上述增益衰减模 块的衰减系数进行控制。 优选地， 上述模数转换模块上设置有差分模拟输入接口和数字输出接口， 其中， 上述差分模拟输入接口设置为接收滤波器模块发送的中频模拟信号， 上述数字输出接 口设置为将上述模数转换模块模数转换后得到的数字信号发送出去。 优选地， 上述数字输出接口是 JESD204B接口和 /或 LVDS接口。 优选地， 上述增益衰减模块， 还与混频器相连， 设置为接收上述混频器输出的中 频信号。 优选地， 上述混频器是 TDD或者 FDD无线产品中的混频器。 优选地， 上述混频器是 DPD反馈系统中的混频器。 优选地， 采用 MCM技术或者 RFIC技术进行封装。 在本发明实施例中， 在中频模数转换装置中采用可变滤波器， 因此， 可以根据系 统的需求对滤波器的参数进行调整以满足不同的系统需求。 通过这种方式解决了相关 技术中由于增益放大模块和模数转换模块之间的滤波器是不可调的， 而导致在不同制 式或者不同频段的系统中需要对中频模数转换装置的电路组成进行调整的技术问题， 达到了提高中频模数转换装置通用性的技术效果。 附图说明 此处所说明的附图用来提供对本发明的进一步理解， 构成本申请的一部分， 本发 明的示意性实施例及其说明用于解释本发明， 并不构成对本发明的不当限定。 在附图 中- 图 1是根据本发明实施例的中频模数转换装置的一种优选结构示意图； 图 2是根据本发明实施例的中频模数转换装置的另一种优选结构示意图； 图 3是根据本发明实施例的中频模数转换装置的又一种优选结构示意图； 图 4是根据本发明实施例的中频模数转换装置的第一种应用场景的连接示意图； 图 5是根据本发明实施例的中频模数转换装置的第二种应用场景的连接示意图。 具体实施方式 下文中将参考附图并结合实施例来详细说明本发明。 需要说明的是， 在不冲突的 情况下， 本申请中的实施例及实施例中的特征可以相互组合。 本发明实施例提供了一种中频模数转换装置， 如图 1所示， 包括： 增益衰减模块
102、 增益放大模块 104、 滤波器 106和模数转换模块 108。 下面对这个结构进行具体 描述。
1 ) 所述增益衰减模块 102， 设置为对接收到的中频信号进行衰减；
2)所述增益放大模块 104， 与所述增益衰减模块 102相连， 设置为对增益衰减模 块输出的信号进行放大处理；
3 )滤波器 106是可变滤波器， 与所述增益放大模块 104相连， 设置为对经过所述 增益放大模块放大后的信号进行滤波处理， 其中， 可变滤波器是滤波系数可调的滤波 器；
4)所述模数转换模块 108， 与所述滤波器 106相连， 设置为将经过所述滤波器滤 波后的信号转换为数字信号。 在本优选实施方式中， 在中频模数转换装置中采用可变滤波器， 因此， 可以根据 系统的需求对滤波器的参数进行调整以满足不同的系统需求。 通过这种方式解决了现 有技术中在增益放大模块和模数转换模块之间的滤波器是不可调的， 从而使得在不同 制式或者不同频段的系统中需要对中频模数转换装置的电路组成进行调整而造成的通 用性不强的技术问题， 达到了提高中频模数转换装置通用性的技术效果。 在一个优选实施方式中， 如图 2所示， 上述中频模数转换装置还包括： SPI控制 模块 202， 与所述可变滤波器耦合， 设置为对所述可变滤波器的滤波参数进行控制， 即， 通过串行接口 （Serial Peripheral Interface, 简称为 SPI) 控制模块选择滤波器的样 式以及滤波器的滤波参数， 从而满足不同带宽或者不同制式的系统需求， 可以支持不 同条件下带宽的要求， 提高使用的灵活性。 如图 2所示， 上述 SPI控制模块还与所述增益衰减模块耦合， 设置为对增益衰减 模块的衰减系数进行控制。 即， 上述 SIP不仅可以负责对滤波器进行控制， 还可以根 据接收机中的增益情况对增益衰减模块的参数进行控制， 以完成对信号的大小幅度的 调整。 为了实现双通道或者是多通道的中频模数转换装置， 可以在一个装置中设置两个 或者多个上述中频模数转换装置， 这些中频模数转换装置可以通过一个 SPI控制模块 进行控制。 如图 3所示， 就是一个双通道中频模数转换装的一种优选结构示意图。 其 中， 衰减器 （相当于上述的增益衰减模块 102)， 放大器 （相当于上述的增益放大模块 104)， 模拟转换器 （相当于上述的模数转换模块 108)。 通过如图 3所示的装置， 并可 以同时对中频输入 1和中频输入 2进行处理以得到输出 1和输出 2， 实现了同时对两 组信号的处理。 在一个优选实施方式中， 上述的模数转换模块上还可以设置有差分模拟输入接口 和数字输出接口， 其中， 差分模拟输入接口设置为接收滤波器模块发送的中频模拟信 号，数字输出接口设置为将模数转换模块模数转换后得到的数字信号发送出去。其中， 上述的差分模拟输入接口可以采用差分电路， 相应的其中的数字输出接口可以兼容 JESD204B (Jedec Stand 204号协议版本 B)接口禾口 /或 LVDS (Low- Voltage Differential Signaling, 低压差分信号） 接口。 达到了有效抑制共模干扰， 提高电路的杂散性能的 技术效果。 同时， 采用串行接口， 可有效减少器件管脚及封装尺寸， 达到了节约成本 的目的， 减少了对 FPGA (Field— Programmable Gate Array, 现场可编程门阵列） 的管 脚的数量的需求， 降低了数字部分走线数量， 有效减少了单板印制电路板 （Printed Circuit Board, 简称为 PCB ) 的走线面积。 在一个优选实施方式中， 上述模数转换模块上设置有差分数字接口， 设置为将经 过所述模数转换模块的模数转换后得到的数字信号发送出去。 上述差分数字接口可以 是 JES204B接口禾口 /或 LVDS接口。 中频数模转换装置中的处理的信号可以是从混频器获取的信号， 即， 混频器输出 的中频信号发送到中频数模转换装置的增益衰减模块并进行后续的处理。 在一个优选 实施方式中， 所述增益衰减模块， 还与混频器相连， 设置为接收所述混频器输出的中 频信号。 上述的中频数模转换装置可以用于 TDD (Time Division Duplexing, 时分双工）也 可以是用于 FDD (Frequency Division Duplexing, 频分双工） 的无线产品中， 即， 上 述的混频器是 TDD系统或者是 FDD无线产品中的混频器。 当上述中频数模转换装置可以用于数字预失真 （Digital Pre-Distortion, 简称为 DPD) 反馈系统中， 例如， 上述的混频器是 DPD反馈系统中的混频器。 在上述各个优选实施方式中， 对于上述的中频数模转换装置可以采用 MCM技术 封装或者是采用 RFIC技术封装。 在本发明的优选实施例中， 在无线通信产品的基站设备中， 通过 MCM或 RFIC 技术， 提供一种单芯片集成的双通道中频接收装置， 该装置可将中频模拟输入信号直 接转换为数字信号输出，增益可调节，且滤波器带宽和采样速率可配置，同时支持 FDD 和 TDD时隙关断功能。 本装置可以用于基站产品的超外差式接收机以及数字预失真 （Digital Pre-Distortion, 简称为 DPD) 接收链路。 在对模拟信号处理部分可以采用先衰减后放 大的方式， 从系统设计角度出发， 有效保证了链路的线性性能。 同时该装置具有较大 的增益调节范围， 增益变化可以从 20dB至 lj-11.5dB。 针对电平大小的不同输入模拟信 号， 通过调节衰减模块， 有效提升了整体动态范围。 与相关技术中的接收机中频技术相比， 本发明能够简化接收机中频部分的设计。 随着平台化和多模化需求越来越高。 在本发明中在增益放大模块和模数转换器 (Analog-to-Digital Converter, 简称为 ADC) 之间的滤波器采用最先进的技术可调滤 波器来实现， 优选的， 滤波器的带宽可以通过 SPI控制模块进行选择。 通过这种方式 实现了滤波器系数的可调性， 提高了接收机的适应性， 和平台的统一性。 如图 3所示， 本发明所提供的装置用于完成模拟信号到数字信号的转换， 主要可 以由以下几个部分构成： 增益衰减模块、 增益放大模块、 滤波器模块、 模数转换模块 以及 SPI控制模块。 下面详细描述一下各模块实现的功能。
1 ) 增益衰减模块（衰减器）， 设置为对输入的大功率中频模拟信号进行衰减， 对信号的大小幅度进行控制；
2) 增益放大器模块 （放大器）， 主要设置为完成信号的功率放大；
3 ) 滤波器模块 （滤波器）， 通过可选带宽滤波器的方式， 可以支持不同条件 下的带宽要求， 提高了改装置使用的灵活性；
4) 模数转换模块 （数模转化器）， 设置为将连续的模拟信号转换为离散的数字信 号；
5 ) SPI控制模块 （SPI)， 设置为实现对增益的调整和对滤波器带宽的选择。 上述装置可以实现如下功能： 在 TDD分时工作中， 如果发射通路工作， 而接收通 路不工作， 则可以通过模块的控制管脚， 控制内部的增益放大模块下电， 有效节约了 能耗。 上述装置的中频模拟接口可以是差分输入电路。 采用差分电路的方式对信号进行 传输， 可以有效抑制共模干扰， 提高电路的杂散性能。 优选的， 数字接口， 即， 该装 置设置为对数字信号进行输出的端口兼容 JESD204B和 LVDS接口。 采用串行接口的 方式， 有效减少了器件管脚及封装尺寸， 节约了成本， 同时， 减少对于 FPGA的管脚 数量的需求， 降低了数字部分的走线数量， 有效减少了印制电路板 （Printed Circuit Board, 简称为 PCB) 的走线面积。 上述装置最高可以支持 500M的输入模拟频率范围， 最大 100M的中频模拟带宽 及最高 370M的采样频率， 具有较大的输入电平动态范围， 能支持各种无线产品， 兼 顾 TDD、 FDD两种模式。 在 TDD模式下， 考虑收发时分工作， 具有功耗调节功能， 达到了节能的目的。 模块支持在对小于最高采样速率的任意采样速率的灵活配置， 同 时滤波器的带宽根据对应的采样速率可灵活配置。 通过本发明的上述装置， 与现有技术相比， 通过 MCM或者 RFIC技术提高了器 件集成度， 同时节省了 PCB成本和器件成本、 降低了设计的复杂程度， 提升了产品的 可靠性。 同样的 PCB面积， 可以容纳更多的通道数量， 在一定程度上提高了无线收发 信机的成本优势， 提升了产品的市场竞争力。 下面结合附图对技术方案的实施作进一步的详细描述: 通过上述图 3示出的中频模数转换装置， 将中频模拟信号直接转换为数字信号输 出。来自中频的模拟信号， 对于小功率信号通过放大模块进行放大； 对于大功率信号， 调节衰减模块的不同衰减值， 使得模块整体增益可以被调整， 从而使得 ADC 的输入 模拟电平在工作范围内。 通过滤波器模块， 灵活选择不同带宽的滤波器， 支持不同场 景的需求。 ADC输出数字信号， 优选的， 可以支持 JES204B或 LVDS输出。 图 4和图 5示出的上述中频模数转换装置的两种应用场景。 应用场景 1 ): 上述中频模数转换装置应用于接收机系统中， 适用于 TDD、 FDD 等无线产品。 如图 4所示， 根据接收到的信号功率的大小以及接收机混频器以前的增 益情况设置本装置在合适的增益大小。 如果输入的信号是小信号， 则可以将本装置设 置为零衰减， 以保证小信号进行足够的放大， 达到基带的解调门限的要求； 如果是如 果的是大的干扰信号， 则通过本装置配合混频器之前的射频电路设置合适的衰减量使 得接收机处的线性和 NF达到最优。对于 TDD分时工作， 如果发射通路工作而接收通 路不工作， 则可以使用模块的控制管脚控制内部的增益放大模块下电， 从而达到有效 节约功耗的目的。 应用场景 2): 如图 5所示， 上述中频模数转换装置应用于 TDD、 FDD无线产品 中的 DPD反馈系统中。反馈系统中增益一般是保持不变的，可以根据发射机的功率放 大器耦合到反馈链路的信号电平大小， 设置本装置在合适的衰减量或者不衰减。 由于 本装置的线性不会因为衰减值的大小发生改变， 因此用在反馈系统中不会因为衰减值 的不同对反馈链路接收到的信号的线性产生影响。 优选的， 反馈链路采取功放的多阶 失真分量， 因此需要较宽的中频带宽， 通常为发射带宽的 3至 5倍， 该装置可以根据 反馈带宽的要求相应地调节低通滤波器的带宽， 以满足多模平台化的需求。 本实施例上述所提供的中频模数转换装置， 无论是在 TDD制式下或者是在 FDD 制式下， 都可以使用， 实现了 TDD和 FDD平台共享的需求。 在 TDD分时系统中， 当接收机不工作时可以将本装置内部的增益放大模块下电， 以节约功耗。 无论用在接 收机或是反馈系统中， 都能够简化射频部分链路的设计， 使用更加灵活。 同时， 采用 集成技术节约了 PCB面积， 降低了设计成本。 通过上述分析可知， 本发明可以达到以下效果： 在本优选实施方式中， 在中频模 数转换装置中采用可变滤波器， 因此， 可以根据系统的需求对滤波器的参数进行调整 以满足不同的系统需求。 通过这种方式解决了相关技术中由于增益放大模块和模数转 换模块之间的滤波器是不可调的， 而导致在不同制式或者不同频段的系统中需要对中 频模数转换装置的电路组成进行调整的技术问题， 达到了提高中频模数转换装置通用 性的技术效果。 尽管上文对本发明进行了详细说明， 但是本发明不限于此， 本技术领域技术人员 可以根据本发明的原理进行各种修改。 因此， 凡按照本发明原理所作的修改， 都应当 理解为落入本发明的保护范围。 以上所述仅为本发明的优选实施例而已， 并不用于限制本发明， 对于本领域的技 术人员来说， 本发明可以有各种更改和变化。 凡在本发明的精神和原则之内， 所作的 任何修改、 等同替换、 改进等， 均应包含在本发明的保护范围之内。

Claims

权 利 要 求 书
1. 一种中频模数转换装置， 包括： 增益衰减模块、 增益放大模块、 滤波器和模数 转换模块， 其中，
所述增益衰减模块， 设置为对接收到的中频信号进行衰减处理； 所述增益放大模块， 与所述增益衰减模块相连， 设置为对所述增益衰减模 块输出的信号进行放大处理；
所述滤波器是可变滤波器， 与所述增益放大模块相连， 设置为对经过所述 增益放大模块放大后的信号进行滤波处理， 所述可变滤波器是滤波系数可调的 滤波器；
所述模数转换模块， 与所述滤波器相连， 设置为将经过所述滤波器滤波后 的信号转换为数字信号。
2. 根据权利要求 1所述的装置， 其中， 还包括： 通过串行接口 SPI控制模块， 与 所述可变滤波器耦合， 设置为对所述可变滤波器的滤波系数进行控制。
3. 根据权利要求 2所述的装置， 其中， 所述 SPI控制模块与所述增益衰减模块耦 合， 设置为对所述增益衰减模块的衰减系数进行控制。
4. 根据权利要求 1至 3中任一项所述的装置， 其中， 所述模数转换模块上设置有 差分模拟输入接口和数字输出接口， 其中， 所述差分模拟输入接口设置为接收 滤波器模块发送的中频模拟信号， 所述数字输出接口设置为将所述模数转换模 块模数转换后得到的数字信号发送出去。
5. 根据权利要求 1至 3所述的装置， 其中， 所述数字输出接口是 JESD204B接口 和 /或低压差分信号 LVDS接口。
6. 根据权利要求 1所述的装置， 其中， 所述增益衰减模块， 还与混频器相连， 设 置为接收所述混频器输出的中频信号。
7. 根据权利要求 6所述的装置， 其中， 所述混频器是时分双工 TDD或者频分双 工 FDD无线产品中的混频器。
8. 根据权利要求 6所述的装置，其中，所述混频器是数字预失真 DPD反馈系统中 的混频器。 根据权利要求 1至 3中任一项所述的装置， 其中， 采用多芯片模块系统 MCM 技术或者射频集成电路 RFIC技术进行封装。
PCT/CN2013/083504 2012-11-01 2013-09-13 中频模数转换装置 WO2014067353A1 (zh)

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