WO2014050304A1

WO2014050304A1 - Photoelectric conversion element and method for manufacturing same

Info

Publication number: WO2014050304A1
Application number: PCT/JP2013/070938
Authority: WO
Inventors: 訓裕川本; 洋平川上
Original assignee: 三洋電機株式会社
Priority date: 2012-09-27
Filing date: 2013-08-01
Publication date: 2014-04-03
Also published as: JPWO2014050304A1

Abstract

A photoelectric conversion element (10) comprising an i layer (43) that is an intrinsic amorphous semiconductor layer formed in the back surface side of a substrate (40), said substrate being a crystalline semiconductor layer, a p layer (44) that is a p-type amorphous semiconductor layer formed on the i layer (43), and a TCO (46) that is a transparent conductive film layer formed on the p layer (43), wherein the boron (B) concentration in the thickness direction of the p layer (43) has a peak position (X₂) that is located closer to the i layer (43) than the interface position (X₄) with the TCO (46). The B concentration may decrease from the peak position (X₂) toward the interface position (X₄) with the TCO (56) either step-by-step, gradually or stepwise. When the substrate (40) is in the n-type, it is preferred that, in the light receiving surface side thereof, the i layer that is an intrinsic amorphous semiconductor layer, an n layer that is an n-type amorphous semiconductor layer formed on the i layer, and the TCO that is a transparent conductive film layer formed on the n layer are arranged so that the peak position of the phosphorus (P) concentration of the n layer is located in the side of the n-type substrate (40) with the i layer interposed.

Description

Photoelectric conversion element and manufacturing method thereof

The present invention relates to a photoelectric conversion element and a manufacturing method thereof.

A photovoltaic device in which a thin intrinsic amorphous semiconductor film is interposed between pn junctions is known (Patent Document 1).

Further, in manufacturing the photovoltaic device as described above, a method of forming an n-type amorphous semiconductor layer with a plurality of substrates mounted on a tray is known (Patent Document 2).

Japanese Patent Laid-Open No. 4-199750 JP 2008-135556 A

It is to suppress the influence of boron mixed in the interface between the substrate and the intrinsic amorphous semiconductor layer when the photoelectric conversion element is formed using the same apparatus. Specifically, when a photovoltaic element is formed by repeatedly using a tray on which a substrate is mounted, boron (B) attached to the tray is prevented from entering the interface between the substrate and the intrinsic amorphous semiconductor layer. That is.

A photoelectric conversion element according to the present invention includes an intrinsic amorphous semiconductor layer formed on a crystalline semiconductor layer, a p-type amorphous semiconductor layer formed on the intrinsic amorphous semiconductor layer, and a p-type amorphous semiconductor. The p-type amorphous semiconductor layer has a peak acceptor concentration closer to the intrinsic amorphous semiconductor layer than the position of the interface with the transparent conductive layer. Has a position.

In the method for manufacturing a photoelectric conversion element according to the present invention, a crystalline semiconductor is disposed in a tray, an intrinsic amorphous semiconductor layer is formed on the crystalline semiconductor, and a p-type amorphous is formed on the intrinsic amorphous semiconductor layer. The crystalline semiconductor layer is formed, the stacked body in which the intrinsic amorphous semiconductor layer and the p-type amorphous semiconductor layer are formed on the crystalline semiconductor is taken out, and the next crystalline semiconductor is arranged using the same tray. A method of manufacturing a photoelectric conversion element in which a process is repeated. A p-type amorphous semiconductor layer is formed by forming an acceptor concentration at a predetermined peak concentration and then decreasing the acceptor concentration from the peak concentration. This completes the formation of the p-type amorphous semiconductor layer.

The photoelectric conversion element according to the present invention includes an intrinsic amorphous semiconductor layer formed on the light-receiving surface side of the crystalline semiconductor layer, and the same conductivity type as the crystalline semiconductor layer formed on the intrinsic amorphous semiconductor layer. A conductive amorphous semiconductor layer containing a plurality of impurities, and a transparent conductive film layer formed on the conductive amorphous semiconductor layer, wherein the conductive amorphous semiconductor layer is the intrinsic amorphous The concentration of the impurity reaches a peak at a position on the crystalline semiconductor layer side with the semiconductor layer interposed therebetween, and the concentration of the impurity decreases at a position closer to the transparent conductive film layer than the position.

With the above structure, the acceptor concentration at the interface of the transparent conductive film layer of the p-type amorphous semiconductor layer is lower than the peak concentration. Therefore, when the next photoelectric conversion element is formed using the same manufacturing apparatus, the substrate is not intrinsically non-uniform. The influence of boron mixed at the interface of the crystalline semiconductor film can be suppressed.

According to at least one of the above-described structures, the impurity concentration of the conductive amorphous semiconductor layer having the same conductivity type as that of the crystalline semiconductor layer formed on the i layer is set on the light-receiving surface side with the i layer interposed therebetween. Since the peak concentration is obtained at the position on the layer side, a large potential difference between the crystalline semiconductor layer and the conductive amorphous semiconductor layer can be obtained. Thereby, the light absorption loss as a photoelectric conversion element can be suppressed.

It is a figure which shows the structure of the photoelectric conversion element of embodiment. In the photoelectric conversion element of embodiment, it is a figure which shows the boron (B) density | concentration distribution of a p-type amorphous semiconductor layer. It is a figure which shows the relationship between B density | concentration and a characteristic in a prior art. In the photoelectric conversion element of embodiment, it is a figure which shows the relationship between the peak density _| concentration _BPEAK of boron (B) of a p-type amorphous semiconductor layer, and a characteristic. It is a figure which shows the procedure of the manufacturing method of the photoelectric conversion element in embodiment. It is a figure which shows the structure of the photoelectric conversion element of other embodiment. FIG. 7 is a diagram showing a phosphorus (P) concentration distribution of a light-receiving surface side type amorphous semiconductor layer in the photoelectric conversion element of the embodiment of FIG. 6. In the photoelectric conversion element of other embodiment, it is a figure which shows the structure in case the conductivity type of a crystalline semiconductor layer is p-type. It is a figure which shows the structure of the modification of FIG. It is a figure which shows the structure of the modification of FIG. It is a figure which shows the structure of the modification of FIG.

Hereinafter, embodiments will be described in detail with reference to the drawings. In the following, as a structure of the photoelectric conversion element, an intrinsic amorphous semiconductor layer and a p-type amorphous semiconductor layer are stacked on the light receiving surface side with a substrate which is a crystalline semiconductor layer interposed, and an intrinsic amorphous material is formed on the back surface side. Although a stacked layer of a semiconductor layer and an n-type amorphous semiconductor layer is described, this is an example for explanation, and is intrinsic formed on the crystalline semiconductor layer regardless of whether it is on the light receiving surface side or the back surface side. Any p-type amorphous semiconductor layer may be formed on the amorphous semiconductor layer. In the following description, each amorphous semiconductor layer is formed over the entire surface of the substrate. However, this is used as a schematic explanation, and each amorphous semiconductor layer is attached to the substrate using a selection mask or the like. Alternatively, it may be formed selectively. For example, an n-type amorphous semiconductor layer and a p-type amorphous semiconductor layer may be selectively formed on one side of the substrate to form a planar pn junction.

The thickness, concentration, etc. described below are illustrative examples, and can be appropriately changed according to the specifications of the photoelectric conversion element. Hereinafter, in all the drawings, one or the corresponding element is denoted by the same reference numeral, and redundant description is omitted.

FIG. 1 is a diagram showing a configuration of a photoelectric conversion element. The photoelectric conversion element 10 includes a substrate 40. An intrinsic amorphous semiconductor layer 41, an n-type amorphous semiconductor layer 42, and a transparent conductive film layer 45 are provided on the light receiving surface side of the substrate 40 (upper side on the paper surface of FIG. 1). In addition, an intrinsic amorphous semiconductor layer 43, a p-type amorphous semiconductor layer 44, and a transparent conductive film layer 46 are provided on the back side of the substrate 40 (lower side on the paper surface of FIG. 1). The p-type amorphous semiconductor layer 44 includes a first p-type amorphous semiconductor layer 44-1, a second p-type amorphous semiconductor layer 44-2, and a third p-type amorphous semiconductor layer. 44-3.

Hereinafter, unless otherwise specified, the crystalline semiconductor layer is denoted as a substrate, the intrinsic amorphous semiconductor layer as i layer, the p-type amorphous semiconductor layer as p layer, and the transparent conductive film layer as TCO. As the acceptor element that is a p-type element, boron (B) other than boron (B) can be used. In the following, the acceptor concentration is referred to as B concentration, assuming that boron is used. The i layer, p layer, and TCO formed on the back side of the substrate will be described below.

The substrate 40 is a crystalline semiconductor material. The substrate 40 can be an n-type or p-type conductive crystalline semiconductor substrate. As the substrate 40, a single crystal silicon substrate, a polycrystalline silicon substrate, a gallium arsenide (GaAs) substrate, an indium phosphide (InP) substrate, or the like can be used. The substrate 40 absorbs the incident light and generates a carrier pair of electrons and holes by photoelectric conversion. Hereinafter, an example in which n-type single crystal silicon is used as the substrate 40 will be described. In FIG. 1, this is shown by assuming that the substrate 40 is nc-Si.

The substrate 40 is cleaned with a hydrofluoric acid (HF) aqueous solution or an RCA cleaning solution. Moreover, you may form a texture structure (illustration omitted) in the surface and back surface of a board | substrate using alkaline etching liquids, such as potassium hydroxide (KOH) aqueous solution.

I layer 41 is formed on substrate 40 after cleaning. The i layer 41 can be an amorphous semiconductor layer containing hydrogen, for example. The i layer 41 can be formed by plasma CVD (PECVD), catalytic CVD (Cat-CVD), sputtering, or the like. As the plasma CVD method, an RF plasma CVD method, a VHF plasma CVD method having a higher frequency, or a microplasma CVD method can be used. Hereinafter, an example using the RF plasma CVD method will be described.

For example, by supplying hydrogen as a silicon-containing gas such as silane (SiH ₄ ) and a dilution gas, applying RF high-frequency power to parallel plate electrodes or the like to generate plasma, and supplying it to the film formation surface of the heated substrate i Layer 41 is formed. The substrate temperature during film formation can be about 150 to 250 ° C., and the RF power density can be about 1 to 20 mW / cm ² .

The i layer 41 is thinned so as to suppress light absorption as much as possible, and thick enough to sufficiently passivate the surface of the substrate. An example of the thickness of the i layer is about 1 to 25 nm, preferably about 5 to 10 nm. In FIG. 1, the i layer 41 is indicated as ia.

The n layer 42 is formed on the i layer 41. The n layer 42 includes a donor that is an n-type conductivity element in an amorphous semiconductor layer containing hydrogen. The n layer 42 can be formed by a plasma CVD method, a catalytic CVD method, a sputtering method, or the like. As the plasma CVD method, an RF plasma CVD method can be used. Hereinafter, an example using the RF plasma CVD method will be described.

For example, a gas containing an n-type element such as phosphine (PH ₃ ) is added to a silicon-containing gas such as silane (SiH ₄ ), diluted with hydrogen and supplied, and RF high-frequency power is applied to parallel plate electrodes and the like. The p layer is formed by turning it into plasma and supplying it to the film formation surface of the heated substrate. The substrate temperature during film formation can be about 150 to 250 ° C., and the RF power density can be about 1 to 20 mW / cm ² . An example of the thickness of the n layer is about 5 to 20 nm, preferably about 10 to 15 nm. In FIG. 1, this is shown by assuming that the n layer 42 is na.

The i layer 43 is formed on the surface of the substrate 40 opposite to the main surface on which the i layer 41 is formed. The i layer 43 can be formed in the same manner as the i layer 41. In FIG. 1, the i layer 43 is shown as ia.

The p layer 44 is formed on the i layer 43. The p layer 44 includes an acceptor which is a p-type conductivity element in an amorphous semiconductor layer containing hydrogen. The p layer 44 can be formed by a plasma CVD method, a catalytic CVD method, a sputtering method, or the like. As the plasma CVD method, an RF plasma CVD method can be used. Hereinafter, an example using the RF plasma CVD method will be described.

For example, a gas containing a p-type element such as diborane (B ₂ H ₆ ) is added to a silicon-containing gas such as silane (SiH ₄ ), diluted with hydrogen, and supplied with RF high frequency power to parallel plate electrodes, etc. Then, the p layer 44 is formed by turning it into plasma and supplying it to the film formation surface of the heated substrate. The substrate temperature during film formation can be about 150 to 250 ° C., and the RF power density can be about 1 to 20 mW / cm ² . An example of the thickness of the p layer 44 is about 5 to 20 nm, preferably about 10 to 15 nm. In FIG. 1, the p layer 44 is shown as pa.

The p layer 44 includes a first p-type amorphous semiconductor layer (first p layer) 44-1, a second p-type amorphous semiconductor layer (second p layer) 44-2, 3 p-type amorphous semiconductor layers (second p-layer) 44-3. The boron (B) concentration in the second p layer 44-2 is higher than the B concentration in the first p layer 44-1. Further, the B concentration of the first p layer 44-1 is lower than the B concentration of the third p layer 44-3. Details of the p layer 44 will be described later.

The TCO 45 is formed on the n layer 42. The TCO 46 is formed on the p layer 44.

TCO

45 and 46 are transparent conductive film layers, for example, metal oxides such as indium oxide (In ₂ O ₃ ), zinc oxide (ZnO), tin oxide (SnO ₂ ), and titanium oxide (TiO ₂ ) having a polycrystalline structure. It is comprised including at least one. Elements such as tin (Sn), zinc (Zn), tungsten (W), antimony (Sb), titanium (Ti), cerium (Ce), and gallium (Ga) may be added to these metal oxides. . TCO can be formed by a thin film forming method such as an evaporation method, a plasma CVD method, or a sputtering method. The thickness of the TCO can be adjusted as appropriate depending on the refractive index, but as an example, it is about 70 to 100 nm.

On the TCOs 45 and 46, metal electrodes (not shown) formed using, for example, silver paste are formed. By connecting the wiring material to the metal electrode, the electric power generated in the photoelectric conversion element 10 is output to the outside of the solar cell module.

FIG. 2 is a diagram showing the configuration of the photoelectric conversion element 10 and the distribution of B concentration in the p-type amorphous semiconductor layer constituting the photoelectric conversion element 10.

FIG. 2A is a configuration diagram of the photoelectric conversion element 10. In the photoelectric conversion element 10, a crystalline semiconductor layer is used as a substrate 40, an intrinsic amorphous semiconductor layer (i layer) 41 and an n-type amorphous semiconductor layer (n layer) 42 are stacked on the light receiving surface side, and on the back surface side. An intrinsic amorphous semiconductor layer (i layer) 43 and a p-type amorphous semiconductor layer (p layer) 44 are stacked. On the light receiving surface side, a transparent conductive film layer (TCO) 45 is formed on the n layer 42, and on the back surface side, a transparent conductive film layer (TCO) 46 is formed on the p layer 44.

FIG. 2B is a B concentration distribution diagram of the p layer. In the B concentration distribution chart, the vertical axis is the B concentration, the horizontal axis is the position in the thickness direction of the p layer 44 from the interface of the i layer 43 to the interface of the TCO 46, and X ₀ is the interface of the i layer 43 and the p layer 44. The position X ₄ is the position of the interface between the p layer 44 and the TCO 46. When forming the photoelectric conversion element 10, when the i layer 43 is formed on the substrate 40 and then the p layer 44 is formed on the i layer 43, X ₀ is the starting position of the p layer 44 formation, X ₄ is the end position of the p layer 44 formation.

The B concentration distribution 11 has a constant concentration from X ₀ to X ₁ which is the position of the interface of the i layer 43 along the thickness direction of the p layer 44. Of the p layer 44, X ₀ to X ₁ are the first p layer 44-1. The thickness from X ₀ to X ₁ can be about ３ of the total thickness of the p layer. The constant concentration in this region can be about 10 ¹⁹ / cm ³ .

Next, the B concentration is further increased with X ₁ to obtain B _PEAK, and B _PEAK is maintained until X ₂ . Of the p layer 44, X ₁ to X ₂ are the second p layer 44-2. B _PEAK is set to an optimum concentration as the p layer of the pn junction in the photoelectric conversion element 10. For example, B _PEAK can be set to about 10 ²² / cm ³ . The thickness from X ₁ to X ₂ is about ½ of the total thickness of the p layer.

Then, the B _TCO to lower the B concentration in front of the X ₃ of X _4, to maintain the B _TCO to X _4. Of the p layer 44, X ₂ to X ₄ are the third p layer 44-3. Decreasing the B concentration from X ₂ to X ₃ is stepped or continuous. For example, in the p layer formation process, when the processing time corresponding to X ₂ is reached, the gas flow rate of diborane (B ₂ H ₆ ) containing boron is reduced to the target value. As a result, the B concentration can be changed in steps from B _PEAK to B _{TCO within} a thickness of several nm. B _TCO can be about 10 ²⁰ / cm ³ .

The B concentration may be decreased by other than the step shape. For example, it may be a gradually decreasing shape that gradually decreases, or may be a staircase shape that decreases in several steps. In these cases, the position X ₃ that becomes B _{TCO only} needs to be between X ₄ and may be B _TCO just at the position of X ₄ .

Therefore, B concentration in the p layer 44, the low concentration in the first p-layer 44-1 from the interface X ₀ of the i layer 43 to X _1, in the second p-layer 44-2 from X ₁ to X ₂ The third p-layer 44-3 from the high concentration X ₃ to the interface of the TCO 46 has a three concentration structure of medium concentration. Further, the position of B _PEAK at which the B concentration reaches a peak is between X ₁ and X ₂ , and has a position at which the B concentration reaches a peak on the i layer side from X ₄ which is the position of the interface with the TCO.

The operation and effect of such a configuration will be described in detail below in comparison with the prior art. FIG. 2 shows a conventional B concentration distribution 12 for comparison. Conventionally, the B concentration distribution 12 has a constant concentration from X ₀ to X _{1 in} the thickness direction of the p layer, and the B concentration is increased to B _TCO at X ₁ , and the high concentration is maintained at X _4. Keep up. Therefore, the peak of the B concentration is between X ₁ and X ₄ and does not particularly lower the B concentration at X ₄ at the TCO interface.

FIG. 3 is a schematic diagram showing the relationship between the B concentration and the characteristics of the photoelectric conversion element 10 when the B concentration in the p layer is constant up to the TCO interface as in the prior art. The horizontal axis represents the B concentration, and the vertical axis represents V _OC , which is the circuit open voltage of the photoelectric conversion element 10, and the reciprocal (1 / ρ _C ) of the contact resistance between the p layer and the TCO. The characteristic line 13 shows the change of V _OC with respect to the B concentration, and the characteristic line 14 shows the change of (1 / ρ _C ) with respect to the B concentration. As shown in FIG. 3, if the B concentration is increased, (1 / ρ _C ) is improved, and the electrical connection performance between the p layer and the TCO is improved.

On the other hand, if the B concentration is increased, the amount of B mixed into the interface between the substrate 40 and the i layer 43 in the photoelectric conversion element 10 manufactured using the same manufacturing apparatus increases, and as a result, V _OC decreases. This is considered to be because when the photoelectric conversion element 10 is subsequently manufactured using the same manufacturing apparatus, B adhering to the manufacturing apparatus is mixed into the interface between the substrate 40 and the i layer 43. In particular, B adhering to the tray or mask holding the substrate 40 is mixed when the i layer 43 is formed, and the characteristics of the i layer 43 as an intrinsic amorphous semiconductor layer are deteriorated. Such a problem appears remarkably when the photoelectric conversion element 10 is manufactured by repeatedly using a tray or a mask. Thus, when the B concentration in the p layer 44 is constant up to the interface of the TCO 46, it is difficult to improve both the electrical connection performance related to the p layer 44 and the V _OC . Examples of the electrical performance related to the p layer 44 include the electrical conductivity of the p layer 44 and the electrical connection performance between the p layer 44 and the TCO 46.

As a method for solving the above problems, it is conceivable to remove boron adhering to the manufacturing apparatus, for example, to clean a tray or a mask. By performing the cleaning step, B can be prevented from entering the interface between the substrate 40 and the i layer 43, but productivity is reduced.

Therefore, in the prior art, the B concentration is set low, giving priority to securing V _OC . In the prior art of FIG. 2, the peak value of B concentration is 10 ²⁰ / cm ³ , which is more than about 10 ²² / cm ³ which is the optimum concentration as the p layer of the pn junction in the photoelectric conversion element 10 in the embodiment. Set fairly low. As a result, the B concentration at the interface between the substrate 40 and the i layer 43 can be reduced to ensure V _OC . On the other hand, since the B concentration of the p layer 44 is lowered, the fill factor (FF) is lowered due to a decrease in the electrical conductivity of the p layer 44 and the electrical connection performance between the p layer 44 and the TCO 46, and the photoelectric conversion element 10. Reliability decreases. In the prior art, it is not easy to manufacture the photoelectric conversion element 10 that satisfies these two requirements at the same time.

FIG. 4 is a diagram for explaining the operational effect when the B concentration distribution 11 of the embodiment is used. In FIG. 4, the horizontal axis is B _PEAK and the vertical axis is V _OC . The characteristic line 15 shows the relationship between B _PEAK and V _OC when the i layer is formed on the substrate in a clean ideal state by washing the tray or the like each time the photoelectric conversion element 10 is manufactured. The characteristic line 16 shows the relationship between B _PEAK and V _OC when the i layer is repeatedly formed on the substrate with B _PEAK = B _TCO in a state where the tray or the like is not particularly cleaned by the same manufacturing apparatus.

As shown in FIG. 4, in the characteristic curve 16 is also the characteristic lines 15, V _OC increases the Yuku by increasing the B _PEAK, a V _OC of substantially constant saturated it exceeds a certain B _PEAK . The range where the value is almost constant is the optimum concentration range as the p layer of the pn junction in the photoelectric conversion element 10. B _PEAK = 10 ²² / cm ³ in the B concentration distribution 11 of FIG. 2 is set in this range. B _PEAK can be appropriately set in the range of, for example, 10 ²¹ / cm ³ to 10 ²³ / cm ³ according to the specifications of the photoelectric conversion element 10.

Even if B _PEAK is set within the optimum concentration range as the p layer 44, the characteristic line 16 that does not particularly clean the tray or the like with the same manufacturing apparatus has a lower V _OC than the characteristic line 15 in the ideal state. Therefore, B _TCO is reduced more than B _PEAK . The characteristic line 17 at that time does not reach the characteristic line 15, but V _OC is considerably improved as compared with the characteristic line 16. The reason is considered as follows. When the photoelectric conversion element 10 is manufactured using a tray or mask that holds the substrate 40, the B concentration that adheres to the outermost surface of the tray or mask is B _TCO that is lower than B _PEAK . Therefore, even if B adhering to the tray or mask is mixed when forming the i layer 43, the amount of mixed B is reduced. Therefore, the influence of the V _OC decrease due to the B mixing is reduced, and the characteristic curve in the ideal state is obtained. Approach 17

That is, as (B _PEAK −B _TCO ) increases or as (B _PEAK / B _TCO ) increases, the characteristic line 17 approaches the characteristic line 15 in the ideal state from the characteristic line 16. From this, if B _TCO is set to an optimum B concentration from the viewpoint of electrical connection between the p layer and the TCO, and B _PEAK is sufficiently higher than the set B _TCO , the characteristic line can be obtained. 17 approaches the characteristic line 15 in an ideal state, and V _OC can be improved. As shown in FIG. 4, the V _OC is wide range of substantially constant value B _PEAK, can be appropriately increased B _PEAK in that range.

Thus, by utilizing the fact that the optimum setting range of B _TCO is different from the optimum setting range of B _PEAK , B _TCO is set according to the contact resistance between the p layer 44 and the TCO 46, (B _PEAK -B _TCO ) or (B _PEAK / B _TCO ) is set according to V _OC, and the B concentration distribution in the p layer 44 has a B concentration peak on the i layer 43 side of the interface with the TCO 46. To have a position. Thereby, while maintaining the function as the p layer 44, the influence of B mixing at the interface between the substrate 40 and the i layer 43 of the photoelectric conversion element 10 is suppressed, and the fill factor (FF) and V _OC are improved. Can do.

FIG. 5 is a diagram illustrating a procedure of a method for manufacturing the photoelectric conversion element 10. Here, a procedure for forming the i layer 43 and the p layer 44 on the back side of the substrate 40 will be described. 5A shows a carry-in process procedure, FIG. 5B shows an i-layer formation process procedure, FIG. 5C shows a p-layer formation process procedure, and FIG. 5D shows a carry-out process procedure.

As an apparatus to be used, an RF plasma CVD apparatus 20 having four chambers is shown. The four chambers are a carry-in chamber 21, an i-layer formation chamber 22, a p-layer formation chamber 23, and a carry-out chamber 24 in order from the right side to the left side in each drawing of FIG. These chambers are connected to each other or blocked by an opening / closing mechanism under the control of a control unit (not shown).

FIG. 5A is a diagram showing a state in which the tray 25 is disposed in the carry-in chamber 21 that is the rightmost chamber of the RF plasma CVD apparatus 20, and a plurality of substrates 40 are mounted on the tray 25. In FIG. 5, one tray 25 and two substrates 40 are shown, but the number of trays 25 and the number of substrates 40 may be other than this. When the substrate 40 is placed on the tray 25, the opening / closing mechanism between the carry-in chamber 21 and the i layer forming chamber 22 is opened, and the tray 25 on which the substrate 40 is placed moves to the i layer forming chamber 22. When the movement of the tray 25 is completed, the opening / closing mechanism between the carry-in chamber 21 and the i-layer forming chamber 22 is closed, and the i-layer forming chamber 22 becomes a sealed space.

FIG. 5B is a diagram showing a state in which the i layer 43 is formed on the substrate 40 in the i layer forming chamber 22. Here, the tray 25 is disposed between the parallel plate electrodes, silane (SiH ₄ ) and hydrogen are supplied as a diluent gas under the conditions for forming a predetermined substrate temperature and RF power density, and the RF high frequency is supplied to the parallel plate electrodes. The i layer 43 is formed on the substrate 40 by applying power to generate plasma and supplying it to the film formation surface of the heated substrate 40. At this time, the amorphous semiconductor thin film 28 also adheres to the tray 25.

When the i layer forming process is completed, the opening / closing mechanism between the i layer forming chamber 22 and the p layer forming chamber 23 is opened, and the tray 25 on which the substrate 40 on which the i layer 43 is formed is moved to the p layer forming chamber 23. To do. When the movement of the tray 25 is completed, the opening / closing mechanism between the i layer forming chamber 22 and the p layer forming chamber 23 is closed, and the p layer forming chamber 23 becomes a sealed space.

FIG. 5C is a diagram showing a state in which the p layer 44 is formed on the i layer 43 on the substrate 40 in the p layer forming chamber 23. Here, a tray 25 is disposed between parallel plate electrodes, and diborane (B ₂ H ₆ ) is added to silane (SiH ₄ ) and diluted with hydrogen under conditions for forming a predetermined substrate temperature and RF power density. The p-layer 44 is formed on the i-layer 43 on the substrate 40 by applying RF high-frequency power to the parallel plate electrodes to generate plasma and supplying the plasma to the heated film-forming surface of the substrate 40. Is called.

When this p layer is formed, the amount of diborane (B ₂ H ₆ ) is controlled so that the B concentration distribution 11 described with reference to FIG. 2 is obtained. That is, the p layer 44 is formed while decreasing the B concentration from B _PEAK to B _TCO with the optimum concentration predetermined as the p layer 44 for photoelectric conversion as the peak concentration B _PEAK . At this time, the amorphous semiconductor thin film 30 containing B also adheres to the tray 25.

When the p-layer forming process is completed, the opening / closing mechanism between the p-layer forming chamber 23 and the unloading chamber 24 is opened, and the tray 25 on which the substrate 40 on which the i-layer 43 and the p-layer 44 are formed is moved to the unloading chamber 24. To do. When the movement of the tray 25 is completed, the opening / closing mechanism between the p-layer forming chamber 23 and the carry-out chamber 24 is closed.

FIG. 5D is a diagram illustrating a state in which the stacked body 31 in which the i layer 43 and the p layer 44 are formed on the substrate 40 is removed from the tray 25 and carried out to the next process in the carry-out chamber 24. . The next process is a process for forming or inspecting the i layer 41 and the n layer 42 on the light receiving surface side. The tray 25 to which the amorphous semiconductor thin film 30 containing B is attached is carried again to the carry-in chamber 21, the next substrate 40 is mounted, and the above processing procedure is repeated.

In this way, B is attached to the tray 25, but when the photoelectric conversion element 10 is formed using the same tray 25 by forming the B concentration distribution 11 described in FIG. The influence of boron mixed at the interface between the substrate 40 and the i layer 43 can be suppressed.

5 shows a state in which the i layer 41 and the n layer 42 are not formed on the substrate 40, but the i layer 43 and the p layer 44 are first formed on the substrate 40 as shown in FIG. Alternatively, the i layer 43 and the p layer 44 may be formed after the i layer 41 and the n layer 42 are formed on the substrate 40.

Further, the present invention is not limited to the method of forming the photoelectric conversion element 10 by mounting the plurality of substrates 40 on the tray 25 and transporting them through the four chambers. For example, the i layer 43 and the p layer 44 may be formed in one chamber without using a tray. In this case, after forming the i layer 43 in one chamber, the p layer 44 having the B concentration distribution 11 described in FIG. 2 is formed. When the i layer 43 and the p layer 44 are formed in the same chamber, B adhering to the inner wall of the chamber may be mixed when the next i layer 43 is formed. By making the p layer 44 have the B concentration distribution described with reference to FIG. The fill factor (FF) and VOC can be improved by suppressing the influence of B mixing at the interface between the substrate 40 and the i layer 43 of the conversion element 10.

In the example of FIG. 1, the n-type substrate 40 is provided with the p layer 44 on the back surface side. In this case, on the light receiving surface side, an i layer 41 is formed on an n-type substrate 40, an n layer 42 is formed thereon, and a TCO 45 is formed thereon.

Here, when light is incident on the photoelectric conversion element 10, the substrate 40 absorbs the incident light, thereby generating electron and hole carrier pairs by photoelectric conversion. The generated electrons and holes are separated by the potential difference between the substrate 40 and the n layer 42 and the potential difference between the substrate 40 and the p layer 44, the electrons are collected by the TCO 45, and the holes are collected by the TCO 46. The

In the example of FIG. 1, since the substrate 40 is n-type, the potential difference between the n-type substrate 40 and the p-layer 44 can be sufficiently large due to the difference between the p-type and n-type conductivity types. On the other hand, the potential difference between the n-type substrate 40 and the n-layer 42 is not the same because it has the same conductivity type. In order to increase the potential difference between the n-type substrate 40 and the n-layer 42, the phosphorus (P) concentration of the n-layer 42 may be sufficiently higher than the phosphorus concentration of the n-type substrate 40. At this time, the contact property between the n layer 42 and the TCO 45 is also improved. However, if the phosphorus concentration is excessively increased over the entire n layer 42, electrons are easily lost in the n layer 42. Therefore, the light absorption loss in the n layer 42 increases, and the short circuit current I _SC of the photoelectric conversion element 10 decreases.

6 and 7 are diagrams illustrating a configuration in which I _SC can be increased by suppressing an increase in light absorption loss of the photoelectric conversion element 10 while maintaining contact between the n layer 42 and the TCO 45.

FIG. 6 corresponds to FIG. 1 and shows the configuration of the photoelectric conversion element. The photoelectric conversion element 50 includes a substrate 40. On the light receiving surface side of the substrate 40, an i layer 41, an n layer 42, and a TCO 45 are provided. An i layer 43, a p layer 44, and a TCO 46 are provided on the back side of the substrate 40. The n layer 42 includes a first n layer 42-1 and a second n layer 44-2.

FIG. 7 is a diagram corresponding to FIG. 2 and shows the configuration of the photoelectric conversion element 60 and the distribution of phosphorus (P) concentration in the n layer constituting the photoelectric conversion element 60.

FIG. 7A is a configuration diagram of the photoelectric conversion element 50. Since this is the same content as FIG. 2A, detailed description is omitted.

FIG. 7B is a phosphorus (P) concentration distribution diagram of the i layer 41 and the n layer 42. In the P concentration distribution diagram, the vertical axis indicates the P concentration, and the horizontal axis indicates the position in the thickness direction of the i layer 41 and the n layer 42 from the interface between the substrate 40 and the i layer 41 to the interface of the TCO 45. Here, Y ₀ is the position of the substrate interface that is the interface between the substrate 40 and the i layer 41, and Y ₃ is the position of the TCO interface. When forming the photoelectric conversion element 50, when the i layer 41 is formed on the substrate 40 and then the n layer 42 is formed on the i layer 41, Y ₀ is the starting position of the formation of the i layer 41. , Y ₁ is a position where the formation of the i layer 41 and the formation of the n layer 42 are started, and Y ₃ is a position where the formation of the n layer 41 is finished.

Of the phosphorus (P) concentration distribution 51, the n-type substrate 40 has a predetermined concentration that is not shown in FIG. 7B. As an example, it is 10 ¹⁵ / cm ³ to 10 ¹⁷ / cm ³ . The i layer 41 is formed in the range from the position of the substrate interface to the position Y ₁ of the i layer interface, which is the interface between the i layer 41 and the n layer 42, without adding a source gas of impurities such as phosphorus (P). To do. The phosphorus (P) concentration of the n layer 42 becomes the highest peak concentration P _PEAK at the position Y ₁ of the i layer interface along the thickness direction, and the peak concentration P _PEAK is maintained up to the position of Y ₂ . At the position of Y _2, the concentration is lowered to a concentration lower than the peak concentration P _PEAK , and the low concentration is maintained up to the position Y _{3 of the} TCO interface.

That is, the n layer 41 has a two-level concentration distribution. Of the n layer 42, Y ₁ to Y ₂ are the first n layer 42-1. The thickness of the first n layer 42-1 can be about ½ of the total thickness of the n layer. The peak concentration P _PEAK in this region should be as different as possible from the phosphorus (P) concentration of the substrate 40. The phosphorus (P) concentration of the first n layer 42-1 is preferably 1 × 10 ²⁰ to 1 × 10 ²² / cm ³ , for example, 5 × 10 ²¹ / cm ³ .

The phosphorus (P) concentration is set to the peak concentration P _{PEAK in} a position as close as possible to the substrate 40 side with the i layer 41 interposed therebetween. As a result, a potential difference based on the phosphorus (P) concentration difference between the substrate 40 and the n layer 42 is provided on the substrate 40 side, thereby preventing the disappearance of electrons and increasing the I _SC of the photoelectric conversion element 10.

Next, the phosphorus (P) concentration at Y ₂ is maintained as the concentration P _TCO lower than the peak concentration P _PEAK up to the position Y _{3 at the} TCO interface. Of the n layer 42, Y ₂ to Y ₃ are the second n layer 42-2. The thickness of the second n layer 42-2 can be about ½ of the total thickness of the n layer. The phosphorus (P) concentration P _{TCO in} this region is set to a concentration necessary for contact with the _TCO 45. The phosphorus (P) concentration of the second n layer 42-2 should be lower than the phosphorus (P) concentration of the first n layer 42-1 in the range of 1 × 10 ²⁰ to 1 × 10 ²² / cm ^3. For example, about 1 × 10 ²¹ / cm ³ .

As shown in FIG. 7B, the phosphorus (P) concentration in Y ₂ is reduced to a single step shape or a stepped step shape of several steps. Alternatively, the phosphorus (P) concentration may be decreased continuously. In some cases, the phosphorus (P) concentration may be increased again immediately before Y ₃ to further improve the contact with the TCO 45.

For comparison, FIG. 7B shows phosphorus (P)

concentration distributions

52 and 53 of the i layer 41 and the n layer 42 in the prior art. The phosphorus (P) concentration distribution 52 has a constant concentration over the entire thickness of the n layer 42. The magnitude of the constant concentration is set in a range in which the balance between the contact property between the n layer 42 and the TCO 45 and the disappearance of electrons in the n layer 42 is maintained. In this case, a phosphorus (P) concentration difference between the substrate 40 and the n layer 42 can be ensured, and contactability between the n layer 42 and the TCO 45 can be ensured, but neither characteristic is the best characteristic. Another phosphorus (P) concentration distribution 53 is to increase the phosphorus (P) concentration distribution in two steps from the position Y _{1 at} the i-layer interface to the position Y ₃ at the TCO interface in the n layer 42. . According to this structure, the contact property between the n layer 42 and the TCO 45 is improved, but the phosphorus (P) concentration at the position Y ₁ of the i layer interface is low.

On the other hand, the phosphorus (P) concentration distribution 51 of the embodiment shown in FIG. 7 has a phosphorus (P) concentration at the peak concentration P _PEAK at the position on the substrate 40 side with the i layer 41 in between, and the TCO 45 side from that position. P _{TCO in} which the phosphorus (P) concentration is lower than the peak concentration P _PEAK at the position of.

When the phosphorus (P) concentration distribution 51 of the embodiment shown in FIG. 7 is compared with the phosphorus (P) concentration distribution 52 of the prior art, the phosphorus (P) concentration at the TCO interface is higher and the position on the substrate 40 side is higher. The peak concentration P _PEAK is higher. Thereby, in contrast to the phosphorous (P) concentration distribution 52 of the prior art, the phosphorus (P) concentration difference between the n layer 42 and the substrate 40 while maintaining the contact property between the n layer 42 and the TCO 45. Can be made larger.

Further, the peak concentration P _{PEAK at} the position on the substrate 40 side in the n layer 42 is higher than the phosphorus (P) concentration distribution 52 of the prior art. The maximum value of the phosphorus (P) concentration in the phosphorus (P) concentration distribution 52 is higher than the phosphorus (P) concentration of the substrate 40, but the position where the maximum concentration is reached from the substrate 40 side in the n layer 42. The potential difference due to the concentration difference is small, and there is a possibility that the improvement of the electron collection rate is suppressed.

In the embodiment shown in FIG. 7, the substrate 40 is an n-type, but in the case of a p-type substrate, the same structure can be used in relation to the p layer. FIG. 8 is a diagram showing the structure of the photoelectric conversion element in that case. Here, a p-type substrate 60 shown as pc-Si, an i layer 43 formed on the substrate 60, and a p-type impurity of the same conductivity type as the substrate 60 formed on the i layer 43 is included. p layer 61 and TCO 46 formed on p layer 61 are included. The p layer 61 includes the first p layer 61-1 having a peak impurity concentration at the position on the substrate 60 side with the i layer interposed therebetween, and the impurity concentration at a position closer to the TCO 46 than the position from the peak concentration. And a second p layer 61-2 that also decreases. By doing so, even in the case of the p-type substrate 60, while maintaining the contact property between the p layer 61 and the TCO 46, the increase in the light absorption loss of the photoelectric conversion element 10 is suppressed and the I _SC is increased. it can.

9 to 11 are diagrams showing modifications of the photoelectric conversion element to which the structure described above is applied. FIG. 9 is a combination of the structures of FIG. 1 and FIG. FIG. 10 employs a p-type substrate 60 in the structure of FIG. 1, a p-layer 62 having a constant concentration is disposed on the light-receiving surface side, and an n-layer 63 having three levels of concentrations on the back surface side. . The n-layer 63 having three levels of concentration is obtained by replacing the impurity from p-type boron (B) to n-type phosphorus (P) in the structure of the three-level p layer 44 described with reference to FIGS. The first n-layer 63-1, the second n-layer 63-2, and the third n-layer 63-3 are used. FIG. 11 is a combination of the structure of FIG. 10 and the structure of FIG.

10, 50 photoelectric conversion element, 11, 12 B concentration distribution, 14, 15, 16, 17 characteristic line, 20 RF plasma CVD apparatus, 21 loading chamber, 22 i layer forming chamber, 23 p layer forming chamber, 24 unloading chamber, 25 trays, 28 amorphous semiconductor thin films, 30 amorphous semiconductor thin films containing boron, 31 laminates, 40 substrates, 41, 43 intrinsic amorphous semiconductor layers (i layers), 42, 42-1, 42 -2, 63, 63-1, 63-2, 63-3 n-type amorphous semiconductor layer (n layer), 44, 44-1, 44-2, 44-3, 61, 61-1, 61- 2,62 p-type amorphous semiconductor layer (p layer), 45, 46 transparent conductive film layer (TCO), 51, 52, 53 phosphorus (P) concentration distribution.

Claims

An intrinsic amorphous semiconductor layer formed on the light-receiving surface side of the crystalline semiconductor layer;
A conductive amorphous semiconductor layer formed on the intrinsic amorphous semiconductor layer and containing impurities of the same conductivity type as the crystalline semiconductor layer;
A transparent conductive film layer formed on the conductive amorphous semiconductor layer;
Including
The conductive amorphous semiconductor layer has a peak concentration of the impurity at a position closer to the crystalline semiconductor layer with the intrinsic amorphous semiconductor layer interposed therebetween, and the impurity at a position closer to the transparent conductive film layer than that position. A photoelectric conversion element in which the concentration is lower than the peak concentration.
An intrinsic amorphous semiconductor layer formed on the crystalline semiconductor layer;
A p-type amorphous semiconductor layer formed on the intrinsic amorphous semiconductor layer;
A transparent conductive film layer formed on the p-type amorphous semiconductor layer;
Including
The p-type amorphous semiconductor layer is a photoelectric conversion element having a position where the acceptor concentration peaks on the intrinsic amorphous semiconductor layer side than the position of the interface with the transparent conductive film layer.
The photoelectric conversion element according to claim 2,
The photoelectric conversion element, wherein the acceptor concentration decreases stepwise from the peak position toward the interface with the transparent conductive film layer.
In the photoelectric conversion element according to claim 2 or 3,
The p-type amorphous semiconductor layer is provided on the opposite side of the second p-type amorphous semiconductor layer and the side on which the intrinsic amorphous semiconductor layer is provided of the second p-type amorphous semiconductor layer. A third p-type amorphous semiconductor layer,
A photoelectric conversion element having a peak acceptor concentration in the second p-type amorphous semiconductor layer.
The photoelectric conversion element according to claim 4,
A first p-type amorphous semiconductor layer provided on a side of the second p-type amorphous semiconductor layer on which the intrinsic amorphous semiconductor layer is provided;
The photoelectric conversion element, wherein an acceptor concentration of the first p-type amorphous semiconductor layer is lower than an acceptor concentration of the third p-type amorphous semiconductor layer.
Place the crystalline semiconductor in the tray,
Forming an intrinsic amorphous semiconductor layer on the crystalline semiconductor;
Forming a p-type amorphous semiconductor layer on the intrinsic amorphous semiconductor layer;
Unloading the intrinsic amorphous semiconductor layer and the p-type amorphous semiconductor layer formed on the crystalline semiconductor,
A method for producing a photoelectric conversion element, wherein the next step is repeated by arranging the next crystalline semiconductor using the same tray,
The p-type amorphous semiconductor layer is formed by forming the acceptor concentration at a predetermined peak concentration and then decreasing the acceptor concentration from the peak concentration, thereby forming the p-type amorphous semiconductor layer. The manufacturing method of the photoelectric conversion element which complete | finishes.
In the photoelectric conversion element according to any one of claims 2 to 5,
The intrinsic amorphous semiconductor layer, the p-type semiconductor layer, and the transparent conductive film layer are photoelectric conversion elements provided on the back side.
In the photoelectric conversion element according to claim 1,
In the crystalline semiconductor layer, the conductivity type is n-type,
The conductive amorphous semiconductor layer is a photoelectric conversion element in which the conductivity type is n-type.
In the photoelectric conversion element according to claim 1 or 8,
The concentration of the impurity decreases in a stepped manner from the peak position toward the interface with the transparent conductive film layer.
In the photoelectric conversion element according to claim 1 or 8,
The conductive amorphous semiconductor layer is provided on the opposite side of the first conductive amorphous semiconductor layer and the side on which the intrinsic amorphous semiconductor layer is provided of the first conductive amorphous semiconductor layer. A second conductive amorphous semiconductor layer,
A photoelectric conversion element having a peak concentration of the impurity in the first conductive amorphous semiconductor layer.