WO2014050198A1 - Switching element and method for manufacturing same - Google Patents

Switching element and method for manufacturing same Download PDF

Info

Publication number
WO2014050198A1
WO2014050198A1 PCT/JP2013/063248 JP2013063248W WO2014050198A1 WO 2014050198 A1 WO2014050198 A1 WO 2014050198A1 JP 2013063248 W JP2013063248 W JP 2013063248W WO 2014050198 A1 WO2014050198 A1 WO 2014050198A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrode
metal
wiring
conductive layer
insulating film
Prior art date
Application number
PCT/JP2013/063248
Other languages
French (fr)
Japanese (ja)
Inventor
直樹 伴野
宗宏 多田
阪本 利司
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP2014538223A priority Critical patent/JPWO2014050198A1/en
Publication of WO2014050198A1 publication Critical patent/WO2014050198A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/253Multistable switching devices, e.g. memristors having three or more electrodes, e.g. transistor-like devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/24Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
    • H10N70/245Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies the species being metal cations, e.g. programmable metallization cells
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices

Definitions

  • the present invention relates to a switching element and a method for manufacturing the switching element.
  • the present invention relates to a variable resistance nonvolatile switching element, and more particularly to a metal bridge type switching element that can be used for the configuration of electronic devices such as programmable logic and memory, and a method of manufacturing the metal bridge type switching element.
  • the metal bridge type switching element is smaller in size and lower in on-resistance than the conventional semiconductor switch.
  • the metal bridge type switching element there are a “2-terminal switch” disclosed in Patent Document 1 and a “3-terminal switch” disclosed in Non-Patent Document 1.
  • the “two-terminal switch” has a structure in which an ion conductive layer is sandwiched between a “first electrode” that supplies metal ions and a “second electrode” that does not supply metal ions. ing. For example, as shown in FIG.
  • the interface between the “first electrode” and the ion conductive layer is the “first electrode”.
  • the metal becomes metal ions and dissolves in the ion conductive layer.
  • the metal ions in the ion conductive layer are deposited as metal in the ion conductive layer.
  • a metal bridge structure is formed by the metal deposited in the ion conductive layer, and finally, a metal bridge connecting the “first electrode” and the “second electrode” is formed.
  • the metal that forms the metal bridge becomes metal ions and dissolves in the ion conductive layer.
  • the metal ions in the ion conductive layer become metal in the ion conductive layer, and the surface of the “first electrode” It precipitates in.
  • the metal bridge connecting the “first electrode” and the “second electrode” disappears.
  • the two electrodes are switched by the formation and disappearance of metal bridges in the ion conductive layer. Since the “two-terminal switch” has a simple structure, the manufacturing process is simple, and the element size can be reduced to the nanometer order.
  • Non-patent document 2 discloses a technique for integrating a metal bridge type switching element into a semiconductor device using an electrochemical reaction.
  • Non-Patent Document 2 discloses a technique that combines the copper wiring on the semiconductor substrate and the “first electrode” of the metal bridge type switching element. If the structure disclosed in Non-Patent Document 2 is adopted, the process for newly forming the “first electrode” can be reduced.
  • the number of photomasks (PR) to be added to manufacture the metal bridge type switching element is the same as that of the ion conductive layer and the “second electrode”. It can be two sheets required for production.
  • Non-Patent Document 1 discloses a “three-terminal switch” provided with a “third electrode” that controls the formation and disappearance of a metal bridge in ON / OFF in addition to two terminals used for signal transmission. Yes.
  • the “3-terminal switch” disclosed in Non-Patent Document 1 is the formation of a metal bridge that connects the source and the “second electrode” with the source of the FET as the “first electrode” in the signal transmission path. By erasing, the switch is written and erased. At this time, the metal ions used for forming the metal bridge are supplied from the “third electrode” into the ion conductive layer, and the metal ions eluted with the disappearance of the metal bridge are the “third electrode”.
  • the metal deposited on the surface of the source and the “second electrode” connects the source and the “second electrode”, and by forming a metal bridge, two terminals used for signal transmission (the source and the “second electrode”)
  • the “2-terminal switch” between “)” is turned on.
  • the disappearance of the metal bridge causes the “terminal” between the two terminals (source and “second electrode”) used for signal transmission. “Two-terminal switch” is turned off.
  • Non-Patent Document 1 in the process of transition from the OFF state to the ON state, for example, when the source and the “second electrode” are grounded and the “third electrode” is applied with a positive voltage, At the interface between the “third electrode” and the ion conductive layer, the metal of the “third electrode” becomes metal ions and dissolves in the ion conductive layer.
  • metal ions in the ion conductive layer are formed on the surface of the source and “second electrode” using electrons supplied from the source and “second electrode”. To be deposited. The deposited metal forms a metal bridge between the source and the “second electrode”.
  • the metal constituting the metal bridge becomes a metal It becomes ions and dissolves in the ion conductive layer.
  • the metal ions in the ion conductive layer become a metal on the surface of the “third electrode”. To be deposited (recovered). As a result of dissolution of the metal constituting the metal bridge, cutting and extinction of the metal bridge proceed.
  • Patent Document 2 uses, as a “third terminal switch”, for example, a configuration schematically shown in FIG. 16, that is, a “third electrode” using an electrode made of copper capable of supplying metal ions.
  • a “third electrode” using an electrode made of copper capable of supplying metal ions
  • an electrode made of a refractory metal such as Pt, Ru, Ta, TaN, TiN, tungsten carbonitride (WCN) or a nitride thereof that does not supply metal ions is used.
  • WCN tungsten carbonitride
  • Patent Document 2 also discloses a form in which a “3-terminal switch” is integrated in a copper wiring.
  • Non-Patent Document 3 discloses a “3-terminal switch” that employs sidewall electrodes as “first electrode” and “second electrode”. At this time, the “third electrode” for supplying metal ions is formed so as to cover the ion conductive layer in contact with the side wall electrode. Accordingly, when a copper electrode, for example, a copper wiring or a copper plug, is used as the “third electrode” for supplying metal ions, the supply of copper ions from the copper wiring or the copper plug to the ion conductive layer is hindered. It is necessary to remove the covering of the copper wiring, the side wall surface of the copper plug, and the bottom surface by the barrier metal.
  • Non-Patent Document 3 a “three-terminal switch” in which a “third electrode” for supplying metal ions is formed so as to cover the ion conductive layer is devised for integration in a multilayer wiring. Is not suggested in Non-Patent Document 3.
  • 3-terminal switch has the following advantages compared to “2-terminal switch”.
  • a signal terminal (first electrode and second electrode) used for signal transmission, and a control terminal (third electrode) used for controlling the switching at the time of ON / OFF operation of the switch. ) Is separated.
  • metal is deposited on the surface of the first electrode and the second electrode, and on the contrary, the metal is dissolved, and ON / OFF Rewriting between states. Therefore, in the “three-terminal switch”, the current I 3 flowing through the “third electrode” and the current I 1 flowing through the “first electrode” and the current I flowing through the “second electrode” when the metal bridge is formed and eliminated.
  • the current I 1 flowing through the “first electrode” and the current I 2 flowing through the “second electrode” are deposited on the metal amount M 1 deposited on the “first electrode” and the “second electrode”, respectively. It is dependent on the amount of metal M 2.
  • the amount of current depends on the amount of metal deposited on the "second electrode”.
  • the present inventors have found that it is desirable to satisfy the following three conditions when integrating the “3-terminal switch” in the copper wiring.
  • the contact area S 1 between the ion conductive layer and the “first electrode”, the ion conduction By reducing the contact area S 2 between the layer and the “second electrode” as much as possible, the average current density I 1 / S 1 and the average current density I 2 / S 2 are increased, and the first electrode and the second electrode are improved in reproducibility. It is necessary to form a metal bridge between the electrodes.
  • the “first electrode” and “second electrode” constituting the “3-terminal switch” are formed to reduce the number of steps of the copper wiring process.
  • the “third electrode” it is desirable to adopt a configuration that substitutes Cu wiring and Cu plug as much as possible.
  • the structure of the conventional “3-terminal switch” does not satisfy all the above-mentioned three conditions when fabricated in a copper wiring.
  • the variation in switching voltage or the copper associated with the fabrication of the switching element The increase in the number of wiring processes has led to an increase in the manufacturing cost of the entire semiconductor device.
  • the present invention solves the above-described problems.
  • the object of the present invention is to use a conventional copper wiring process, and can be integrated in a multilayer wiring layer, can be stably rewritten, and can be produced at a low cost.
  • Type switching element and its manufacturing method Another object is to provide a semiconductor device in which the metal bridge type switching element is provided in a multilayer wiring layer.
  • the metal bridge type switching element of the present invention comprises: A first electrode that is a side wall portion of a metal film electrically connected to a Cu plug or Cu wiring constituting a multilayer wiring; A second electrode which is a side wall portion of a metal film electrically connected to a Cu plug different from the first electrode; An insulating film sandwiched between the first electrode and the second electrode; An ion conductive layer capable of moving a metal ionized by an electric field is in contact with side surfaces of the first electrode and the second electrode; It has at least one third electrode that is in contact with the ion conductive layer and supplies metal ions to the ion conductive layer, and the third electrode is composed of a Cu wiring that forms a multilayer wiring. Yes.
  • the first electrode and the second electrode constituting the signal electrode are side walls of the metal film and have a small area, so that the electric field tends to concentrate. Therefore, the place where the metal bridge is formed is limited, and a stable three-terminal switching operation can be realized. This electric field concentration can reduce variations in operating voltage and operating current during switching operation.
  • the three-terminal switching element of the present invention can be easily integrated into the Cu wiring.
  • the metal bridge-type switching element according to the present invention includes the configuration of the “two-terminal switch” in the following first embodiment and the “three-terminal switch” in the second embodiment to the fourth embodiment.
  • a “three-terminal switch” configuration can be employed.
  • the metal bridge type switching element is: A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode,
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
  • the second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
  • the metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film, The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a laminated structure, and are formed on side surfaces of the laminated structure.
  • the switching element is characterized in that the ion conductive layer is in contact therewith.
  • the metal bridge type switching element is: A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode,
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
  • the second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
  • the metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film, The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure.
  • the ion conductive layer is in contact;
  • the metal bridge type switching element is A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
  • the third electrode is composed of a third Cu wiring constituting the multilayer wiring layer, The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
  • the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively.
  • between the second electrode and the first electrode The bias difference
  • the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • the metal bridge type switching element is: A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode,
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
  • the second electrode is a second Cu wiring constituting the multilayer wiring layer,
  • the metal bridge type switching element is Comprising an insulating film sandwiched between the first metal film and the second Cu wiring;
  • the first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second Cu wiring form a laminated structure, and the ion conductive layer is in contact with the side surface of the laminated structure.
  • the metal bridge type switching element is A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
  • the third electrode is composed of a third Cu wiring constituting the multilayer wiring layer, The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
  • the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively.
  • between the second electrode and the first electrode The bias difference
  • the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • the metal bridge type switching element according to the first embodiment of the present invention the metal bridge type switching element according to the second embodiment, and the metal bridge type switching element according to the third embodiment, It is preferable that at least the side wall portion of the first metal film in contact with the ion conductive layer has a convex curvature.
  • the metal bridge type switching element is: A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode,
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a barrier metal that covers a bottom portion and a side wall surface of a first Cu plug electrically connected to a first Cu wiring constituting the multilayer wiring layer,
  • the second electrode is a second Cu wiring constituting the multilayer wiring layer,
  • the metal bridge type switching element is An insulating film sandwiched between a bottom surface of a barrier metal covering the bottom and side wall surfaces of the first Cu plug and a second Cu wiring;
  • the first electrode composed of a barrier metal sidewall covering the bottom and sidewall surfaces of the first Cu plug, the sidewall of the insulating film, and the second Cu wiring form a stacked structure, and the stacked structure
  • the ion conductive layer is in contact with a side surface;
  • the metal bridge type switching element is A third electrode
  • between the second electrode and the first electrode The bias difference
  • the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • an upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions.
  • the metal bridge type switching element according to the present invention in particular, the configuration of the “two-terminal switch” of the first embodiment and the “three-terminal switch” to the fourth embodiment of the second embodiment.
  • a semiconductor device adopting the “3-terminal switch” configuration can have the following configuration.
  • a semiconductor device that employs a metal bridged switching element according to the first embodiment of the present invention, A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode, In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
  • the second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
  • the metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film, The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure.
  • the ion conductive layer is in contact, An upper surface of the ion conductive layer is covered with an i
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • a semiconductor device that employs a metal-bridged switching element according to the second embodiment of the present invention, A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode,
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
  • the second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
  • the metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film, The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure.
  • the ion conductive layer is in contact, An upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions;
  • the metal bridge type switching element is A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
  • the third electrode is composed of a third Cu wiring constituting the multilayer wiring layer, The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring, In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3.
  • between the second electrode and the first electrode The bias difference
  • the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • a semiconductor device that employs a metal-bridged switching element according to the third embodiment of the present invention, A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a first metal film that is electrically connected to a first Cu plug or Cu wiring constituting the multilayer wiring layer,
  • the second electrode is a second Cu wiring constituting the multilayer wiring layer,
  • the metal bridge type switching element is Comprising an insulating film sandwiched between the first metal film and the second Cu wiring;
  • the first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second Cu wiring form a laminated structure, and the ion conductive layer is in contact with the side surface of the laminated structure.
  • the metal bridge type switching element is A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
  • the third electrode is composed of a third Cu wiring constituting the multilayer wiring layer, The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring, An upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions;
  • the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3.
  • between the second electrode and the first electrode The bias difference
  • the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • a semiconductor device that employs a metal-bridged switching element according to the fourth embodiment of the present invention, A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
  • the variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
  • the ion conductive layer is in contact with the first electrode and the second electrode,
  • a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed.
  • the switching element constitutes a metal bridge type switching element that is in an OFF state;
  • the first electrode is a side wall portion of a barrier metal that covers a bottom portion and a side wall surface of a first Cu plug electrically connected to a first Cu wiring constituting the multilayer wiring layer,
  • the second electrode is a second Cu wiring constituting the multilayer wiring layer,
  • the metal bridge type switching element is An insulating film sandwiched between a bottom surface of a barrier metal covering the bottom and side wall surfaces of the first Cu plug and a second Cu wiring;
  • the first electrode composed of a barrier metal sidewall covering the bottom and sidewall surfaces of the first Cu plug, the sidewall of the insulating film, and the second Cu wiring form a stacked structure, and the stacked structure
  • the ion conductive layer is in contact with a side surface;
  • the metal bridge type switching element is A third electrode
  • between the second electrode and the first electrode The bias difference
  • the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
  • the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode
  • the potential V 3 is biased to a different potential, the bias difference
  • a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
  • the metal bridge type nonvolatile switch element can be easily integrated in the multilayer wiring layer of the LSI.
  • the current required for the ON / OFF operation of the switch due to the formation / extinction of the metal bridge is a minute current.
  • the current required for the ON / OFF operation of the switch is a minute current, the size of the transistor mounted on the ON / OFF operation drive circuit of the metal bridge type switching element can be reduced, and the drive circuit can be reduced in area. .
  • the signal electrode (first electrode and second electrode) and the switching control electrode (first electrode 3) constituting the “three-terminal switch” are turned on / off.
  • the switching control electrode (first electrode 3) constituting the “three-terminal switch” are turned on / off.
  • a nonvolatile switching element excellent in ON / OFF operation reliability can be realized.
  • FIG. 1 is a diagram schematically illustrating an example of the configuration of the two-terminal switching element according to the first embodiment of the present invention.
  • FIG. 2 is a cross-sectional view schematically showing the configuration of the two-terminal switching element of the first embodiment according to the first embodiment of the present invention.
  • FIG. 3-1 is a cross-sectional view schematically showing an example of the manufacturing process of the two-terminal switching element of the first embodiment according to the first embodiment of the present invention.
  • FIG. FIG. 5 is a diagram showing a step 3;
  • FIG. 3-2 is a cross-sectional view schematically showing an example of the manufacturing process of the two-terminal switching element of the first embodiment according to the first embodiment of the present invention.
  • FIG. 4 is a diagram schematically illustrating an example of the configuration of the three-terminal switching element according to the second embodiment of the present invention.
  • FIG. 5 is sectional drawing which shows typically the structure of the 3 terminal switching element of 1st embodiment concerning 2nd embodiment of this invention.
  • FIG. 6A is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the second embodiment of the present invention.
  • FIG. FIG. 10 is a diagram showing a step 5;
  • FIG. 6-2 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the second embodiment of the present invention.
  • FIG. 7 is sectional drawing which shows typically the structure of the 3 terminal switching element of 2nd embodiment concerning 2nd embodiment of this invention.
  • FIG. 8-1 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the second embodiment according to the second embodiment of the present invention.
  • FIG. 5 is a diagram showing a step 3;
  • FIG. 8-2 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the second embodiment according to the second embodiment of the present invention.
  • FIG. FIG. 9 is a diagram schematically illustrating an example of the configuration of the three-terminal switching element according to the third embodiment of the present invention.
  • FIG. 10 is sectional drawing which shows typically the structure of the 3 terminal switching element of 1st embodiment concerning 3rd embodiment of this invention.
  • FIG. 11-1 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the third embodiment of the present invention.
  • FIG. 10 is a diagram showing a step 5;
  • FIG. 11-2 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the third embodiment of the present invention.
  • FIG. FIG. 12 is a diagram schematically illustrating an example of a configuration of a three-terminal switching element according to the fourth embodiment of the present invention.
  • FIG. 11-1 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the third embodiment of the present invention.
  • FIG. 10 is a diagram showing a step 5;
  • FIG. 11-2 is a cross-sectional view schematically showing
  • FIG. 13 is sectional drawing which shows typically the structure of the 3 terminal switching element of the 1st embodiment concerning 4th embodiment of this invention.
  • FIG. 14 is a cross-sectional view schematically showing an example of a manufacturing process of the three-terminal switching element according to the first embodiment, according to the fourth embodiment of the present invention.
  • FIG. 15 is a diagram for explaining a switching process in the metal bridge type switching element adopting the configuration of “two-terminal switch”, and the upper stage is a transition process (set process) from the “OFF” state to the “ON” state. The lower part is a diagram for explaining the transition process (reset process) from the “ON” state to the “OFF” state.
  • FIG. 16 shows the first electrode and the second electrode used for signal transmission and the third electrode used for control of the switching operation in the metal bridge type switching element adopting the configuration of the conventional “3-terminal switch”. It is a figure which shows an example of arrangement
  • the configuration of the “2-terminal switch” of the first embodiment and the “3-terminal switch” to the fourth embodiment of the second embodiment described below are explained.
  • the configuration of the “3-terminal switch” can be employed.
  • the features of the “two-terminal switch” of the first embodiment and the “three-terminal switch” of the second embodiment to the “three-terminal switch” of the fourth embodiment are as follows. explain.
  • the first embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “two-terminal switch” described below.
  • FIG. 1 is a cross-sectional view schematically showing an example of the configuration of the “two-terminal switch” of the first embodiment.
  • the “two-terminal switch” of the first embodiment includes a first metal film 0108 electrically connected to the plug 0106 and a first metal film 0107 electrically connected to the first wiring 0107.
  • a two-metal film 0109 and an interlayer insulating film 0103 sandwiched between the first metal film 0108 and the second metal film 0109 and electrically separating them are provided.
  • the three-layer structure including the first metal film 0108, the interlayer insulating film 0103, and the second metal film 0109 is patterned in the same planar shape, and on the side surface of the patterned three-layer structure, the first metal film 0108 The side wall surface, the side wall surface of the interlayer insulating film 0103, and the side wall surface of the second metal film 0109 are exposed.
  • the ion conductive layer 0104 is provided so as to contact only a part of the side surface of the patterned three-layer structure.
  • the portion in contact with the ion conductive layer 0104 functions as the first electrode 0101.
  • the portion in contact with the ion conductive layer 0104 is It functions as the second electrode 0102.
  • the ion conductive layer 0104 serves as a medium for conducting metal ions. Therefore, the “two-terminal switch” of the first embodiment is configured by using the first electrode 0101, the ion conductive layer 0104, and the second electrode 0102.
  • the second metal film 0109 is made of a metal that can supply metal ions to the ion conductive layer 0104. It is desirable to employ copper (Cu) as the metal capable of supplying the metal ions.
  • the interlayer insulating film 0103 is an insulating material that can be vapor-deposited and formed using an insulating material that does not exhibit ion conductivity, such as a SiC film, a SiCN film, a SiN film, and a stacked structure thereof. can do.
  • the conductive material constituting the first metal film 0108 includes tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN), Titanium nitride (TiN) is suitable, and a laminate of these may be employed. In particular, Ru is preferable.
  • the first metal film 0108 made of these conductive materials.
  • a top surface of the interlayer insulating film 0103 is formed by a sputtering method, a laser ablation method, or a plasma CVD method.
  • the “two-terminal switch” of the first embodiment transitions from the OFF state to the ON state, for example, when the first electrode 0101 is grounded and a positive voltage is applied to the second electrode 0102, the second electrode 0102 and the ion At the interface of the conductive layer 0104, metal ions (for example, copper ions) are supplied from the second electrode 0102 to the ion conductive layer 0104. On the other hand, at the interface between the first electrode 0101 and the ion conductive layer 0104, the first electrode 0101 is connected. Metal (for example, copper) precipitates on the side wall surface.
  • metal ions for example, copper ions
  • the formation of the metal bridge 0105 due to the metal deposition starts from the lower end of the side wall surface of the first electrode 0101 and proceeds along the side wall surface of the interlayer insulating film 0103 toward the upper end of the side wall surface of the second electrode 0102. proceed.
  • the metal bridge 0105 is formed so as to connect the lower end of the first electrode 0101 and the upper end of the second electrode 0102. .
  • the planar shape of the patterned three-layer structure is a circle, and accordingly, the planar shapes of the first metal film 0108 and the second metal film 0109 Is round. Therefore, the first electrode 101 made of the side wall surface of the first metal film 0108 and the second electrode 0102 made of the side wall surface of the second metal film 0109 also have the same curvature.
  • the ion conductive layer 0104 is formed by using a sputtering method, a laser ablation method, or a plasma CVD method in order to form the side surface of the three-layer structure having a curvature.
  • a material of the ion conductive layer 0104 it is necessary to select a material having a high conductivity of metal ions and capable of vapor phase etching processing in an LSI production line.
  • One of the candidate materials that can be used to fabricate the ion conductive layer 0104 is chalcogenide GeSbTe, which is used as a material for the phase change layer in the phase change element.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 0104 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of forming a film by sputtering using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 0104 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber in a separate line.
  • Switching operation A driving method during ON / OFF operation (switching) in the “two-terminal switch” of the first embodiment shown in FIG. 1 will be described.
  • metal deposition starts from the lower end of the surface (side wall surface) of the first electrode 0101, and the formation of the metal bridge 0105 according to the lines of electric force between the first electrode 0101 and the second electrode 0102. proceed.
  • the metal bridge 0105 formed from the first electrode 0101 side reaches the surface (side wall surface) of the second electrode 0102, the resistance value between the first electrode 0101 and the second electrode 0102 becomes low resistance, and the ON state Become.
  • the bias at the time of transition from the OFF state to the ON state may be such that the first electrode 0101 is grounded and a positive voltage (+ V ON > 0 V) is applied to the second electrode 0102.
  • Metal ions are reduced by electrons injected into the ion conductive layer 0104 from the surface (side wall surface) of the second electrode 0102.
  • the generated metal is re-deposited on the surface (side wall surface) of the second electrode 0102.
  • the bias at the time of transition from the ON state to the OFF state may be such that the first electrode 0101 is grounded and a negative voltage ( ⁇ V OFF ⁇ 0 V) is applied to the second electrode 0102.
  • the first electrode 0101 and the second electrode 0102 constituting the “two-terminal switch” of the first embodiment shown in FIG. 1 have curvature, the first electrode 0101 and the second electrode 0101 are switched during the ON / OFF operation (switching).
  • the electric field formed in the ion conductive layer by the switching voltage applied between the two electrodes 0102 is concentrated on this curvature portion, and a stable and small switching operation can be obtained.
  • the two-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device.
  • FIG. 2 shows the structure of the two-terminal switching element of the first embodiment formed inside a multilayer wiring layer provided in the semiconductor device.
  • the multilayer wiring layer provided in the semiconductor device shown in FIG. 2 includes a plug 0206 electrically connected to the first metal film 0208, a second wiring 0212 manufactured integrally with the plug 0206, and a second metal film.
  • a first wiring 0207 connected to 0209 is provided.
  • a barrier insulating film 0203 is sandwiched between the first metal film 0208 and the second metal film 0209, and the three-layer structure including the first metal film 0208, the barrier insulating film 0203, and the second metal film 0209 is a hard mask.
  • 0218 as an etching mask and performing etching, it is patterned in the same planar shape.
  • the side wall portion of the first metal film 0208, the side wall portion of the barrier insulating film 0203, and the side wall portion of the second metal film 0209 are exposed.
  • a part of the side surface of the patterned three-layer structure is in contact with the ion conductive layer 0204, and the side wall portion of the first metal film 0208 in contact with the ion conductive layer 0204 is used as the first electrode 0201, A side wall portion of the second metal film 0209 that is in contact with the ion conductive layer 0204 is used as the second electrode 0202.
  • the two-terminal switch 0220 includes a first electrode 0201, a second electrode 0202, and an ion conductive layer 0204 that is in contact with the side wall portion.
  • a barrier insulating film 0214 is provided between the ion conductive layer 0204 and the interlayer insulating film 0215, and diffusion of metal ions from the ion conductive layer 0204 to the interlayer insulating film 0215 is performed using the barrier insulating film 0214. It is preventing.
  • a barrier insulating film 0205 is provided between the ion conductive layer 0204 and the interlayer insulating film 0213, and metal ions from the ion conductive layer 0204 to the interlayer insulating film 0213 are formed using the barrier insulating film 0205. Prevents diffusion.
  • the barrier insulating film 0205 covers the upper surface of the interlayer insulating film 0213 and the upper surface of the first wiring 0207, and an opening is formed in the upper surface of the first wiring 0207.
  • the two metal film 0209 and the upper surface portion of the first wiring 0207 are electrically connected. Accordingly, the barrier insulating film 0205 prevents contact between the second metal film 0209 and the upper surface of the interlayer insulating film 0213, and prevents diffusion of the metal constituting the second metal film 0209 into the interlayer insulating film 0213. .
  • the hard mask 0218 used for the etching process of the three-layer structure plays a role of preventing contact between the upper surface of the first metal film 0208 and the ion conductive layer 0204.
  • the plug 0206 and the upper surface portion of the first metal film 0208 are electrically connected through an opening provided in the hard mask 0218.
  • the interlayer insulating film 0213, the barrier insulating film 0205, the ion conductive layer 0204, the barrier insulating film 0214, the interlayer insulating film 0215, and the interlayer insulating film 0216 are formed over the semiconductor substrate 0219.
  • the barrier insulating film 0217 are stacked in this order to form a stacked structure.
  • the first wiring 0207 is embedded in the wiring trench provided on the interlayer insulating film 0213 formed on the semiconductor substrate 0219 with the first barrier metal 0210 interposed therebetween.
  • the first barrier metal 0210 that covers the bottom surface and the side wall surface of the first wiring 0207 prevents diffusion of the metal constituting the first wiring 0207 into the interlayer insulating film 0213.
  • the second wiring 0212 is embedded in the wiring groove formed in the interlayer insulating film 0216, and the lower layer formed in the interlayer insulating film 0215, the barrier insulating film 0214, the ion conductive layer 0204, and the hard mask 0218.
  • a plug 0206 is embedded in the hole (via hole), the second wiring 0212 and the plug 0206 are integrated, and the second wiring 0220 and the side and bottom surfaces of the plug 0206 are covered with the second barrier metal 0211.
  • a two-terminal switch 0220 shown in FIG. 2 is a variable resistance nonvolatile switching element, and in particular, uses metal ion migration and an electrochemical reaction in an ion conductor to form and extinguish a metal bridge.
  • a metal bridge type switching element is configured.
  • a stacked structure of an etched second metal film 0209, a barrier insulating film 0205, a first metal film 0208, and a hard mask 0218 is formed on the opened barrier insulating film 0205.
  • An ion conductive layer 0204 is formed so as to cover the upper surface of the barrier insulating film 0205 and the upper surface and side surfaces of the stacked structure, and the barrier insulating film 0214 is formed on the ion conductive layer 0204.
  • the first metal film 0208 constituting the first electrode 0201 is electrically connected to the second wiring 0220, the plug 0206, and the second barrier metal 0211.
  • the second metal film 0209 constituting the second electrode 0202 is electrically connected to the first wiring 0207 and the first barrier metal 0210 through an opening opened in the barrier insulating film 0205.
  • the two-terminal switch 0220 controls the ON / OFF state by applying a switching voltage or passing a switching current between the second wiring 0212 and the first wiring 0207.
  • metal ions are supplied from the side wall surface of the second electrode 0220 into the ion conductive layer 0204, metal atoms are precipitated by electrons supplied from the side wall surface of the first electrode, and electric field diffusion of metal ions in the ion conductive layer 0204 is performed.
  • the metal bridge is generated and the transition operation from the OFF state to the ON state (ON operation) is controlled.
  • the first metal film 0208 has a two-layer structure, and the surface (upper surface) in contact with the second barrier metal 0211 covering the bottom and side surfaces of the plug 0206 is made of the same conductive material as the second barrier metal 0211. Use. When the same conductive material is used, the second barrier metal 0211 is formed so as to cover the upper surface of the first metal film 0208 exposed at the bottom of the pilot hole (via hole) and the side wall surface of the pilot hole (via hole). When forming, at the interface between the upper surface of the first metal film 0208 and the second barrier metal 0211, the same conductive material is integrated to reduce the contact resistance. With the integration, the adhesiveness is also improved, and the reliability of the two-terminal switch 0220 can be improved.
  • the semiconductor substrate 0219 is a substrate on which a semiconductor element is formed.
  • a silicon substrate for example, a silicon substrate, a single crystal substrate, an SOI (Silicon-on-Insulator) substrate, a TFT (Thin-Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
  • SOI Silicon-on-Insulator
  • TFT Thin-Film Transistor
  • the interlayer insulating film 0213 is an insulating film formed over the semiconductor substrate 0219.
  • a low dielectric constant film for example, a SiOCH film
  • the interlayer insulating film 0213 may be a stack of a plurality of insulating films.
  • a wiring groove for embedding the first wiring 0207 is formed, and the first wiring 0207 is embedded in the wiring groove via the first barrier metal 0210.
  • the first wiring 0207 is a wiring buried in the wiring trench formed in the interlayer insulating film 0213 through the first barrier metal 0210.
  • the first wiring 0207 is made of Cu and is a “copper wiring”.
  • the main component may be Cu and alloyed with Al.
  • the first wiring 0207 is in direct contact with the second metal film 0209 that forms the second electrode 0202.
  • the first barrier metal 0210 has a barrier property that covers the side wall surface and the bottom surface of the first wiring 0207 in order to prevent the metal (Cu) constituting the first wiring 0207 from diffusing into the interlayer insulating film 0213 and the lower layer. It is a conductive film having As the first barrier metal 0210, for example, when the first wiring 0210 is formed of a metal material mainly composed of Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (which has a barrier property against Cu) A high melting point metal such as TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
  • the barrier insulating film 0205 is formed on the surface of the first wiring 0207 and on the interlayer insulating film 0213. By covering with the barrier insulating film 0205, oxidation of the metal (for example, Cu) constituting the first wiring 0205 is prevented.
  • the barrier insulating film 0205 has a role of preventing diffusion of metal ions (Cu ions) existing in the ion conductive layer 0204 into the interlayer insulating film 0213.
  • the barrier insulating film 0205 As a result of providing the barrier insulating film 0205, the contact between the surface of the first wiring 0207 and the ion conductive layer 0204 is cut off, and when the switching voltage of the ON operation is applied to the two-terminal switch 0220, the first wiring The phenomenon that the metal (for example, Cu) constituting 0205 is ionized and supplied into the ion conductive layer 0204 does not occur.
  • the barrier insulating film 0205 for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • An opening is formed in the barrier insulating film 0205 over the first wiring 0207.
  • the second metal film 0209 is in electrical contact with the surface of the first wiring 0207.
  • the opening of the barrier insulating film 0205 is formed in the region of the first wiring 0207.
  • the wall surface of the opening of the barrier insulating film 0205 is a tapered surface having a wide opening cross-sectional area from the boundary surface with the surface of the first wiring 0207 toward the upper surface of the barrier insulating film 0205.
  • the taper angle ⁇ taper of the wall surface of the opening of the barrier insulating film 0210 is set to 85 ° or less ( ⁇ taper ⁇ 85 °) with respect to the upper surface of the first wiring 0207.
  • the second electrode 0202 and the first electrode 0201 are electrodes that transmit signals in the two-terminal switch 0220.
  • the first electrode 0201 is a portion in direct contact with the ion conductive layer 0204 in the side wall portion of the first metal film 0208.
  • the second electrode 0202 is a portion in direct contact with the ion conductive layer 0204 in the side wall portion of the second metal film 0209.
  • the second metal film 0209 is made of Cu or a conductive material containing Cu as a main component.
  • the first metal film 0208 is composed of two layers of different metals.
  • the lower layer of the first metal film 0208 that is in contact with the upper surface of the barrier insulating film 0203 is less likely to be ionized by an electric field generated at the interface in contact with the ion conductive layer 0204 when a switching voltage for OFF operation is applied to the two-terminal switch 0220.
  • a metal that is difficult to diffuse or conduct in the ion conductive layer 0204 is used.
  • Pt, Ru, or the like can be used for forming the lower layer of the first metal film 0208.
  • the upper layer of the first metal film 0208 that is in contact with the lower surface of the hard mask 0218 has a role of protecting the lower layer. That is, for example, in the step of forming the hard mask 0218 so as to cover the first metal film 0208 and the step of forming the via hole for forming the plug 0206, the etching step of forming an opening in the hard mask 0218.
  • the upper layer protects the lower layer, thereby suppressing damage to the lower layer during the process. As a result of suppressing damage to the lower layer of the first metal film 0208, the switching characteristics of the two-terminal switch 0220 can be maintained.
  • the upper layer of the first metal film 0208 for example, Ta, Ti, W, Al, or a nitride thereof can be used.
  • the upper layer of the first metal film 0207 is electrically connected to the plug 0206 and the second wiring 0212 formed integrally with the plug 0206 through the second barrier metal 0211 in the opening provided in the hard mask 0218. ing.
  • the barrier insulating film 0203 is provided between the first metal film 0208 and the second metal film 0209.
  • the barrier insulating film 0203 has a role of insulating the first metal film 0208 and the second metal film 0209 so as not to short-circuit each other.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used as the barrier insulating film 0203.
  • the ion conductive layer 0204 is a film that can supply metal ions (Cu ions) from the second electrode when an ON operation switching voltage is applied to the two-terminal switch 0220. Further, it is a film in which metal ions (Cu ions) can move by an electric field present in the ion conductive layer 0204.
  • a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used, and when the resistance change of the two-terminal switch 0220 is performed by deposition of metal ions.
  • a membrane capable of ion conduction is used.
  • Metal ions are supplied from the second electrode 0202 as Cu ions.
  • a pilot hole for embedding the plug 0214 is formed in the barrier insulating film 0214, and the plug 0206 is embedded in the pilot hole via the second barrier metal 0211.
  • One candidate material that can be used to fabricate the ion conducting layer 0204 is chalcogenide GeSbTe, which is used in the phase change element as a material for the phase change layer.
  • chalcogenide GeSbTe which is used in the phase change element as a material for the phase change layer.
  • As a means for forming the ion conductive layer 0204 made of GeSbTe on the side surface of the three-layer structure having a curvature there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 0204 is a SIOCH material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber in a separate line.
  • the hard mask 0218 is used as a hard mask (etching mask) when the first metal film 0208, the barrier insulating film 0203, and the second metal film 0209 are etched.
  • a hard mask for example, a SiN film, a SiO 2 film, or a laminate thereof can be used.
  • the barrier insulating film 0214 is an insulating film having a function of preventing diffusion of metal ions contained in the ion conductive layer 0204 into the interlayer insulating film 0215 without damaging the two-terminal switch 0220.
  • the barrier insulating film 0214 has a function of preventing the desorption of oxygen contained in the ion conductive layer 0204, and prevents damage to the ion conductive layer 0204 during the formation process of the interlayer insulating film 0215. It also has a function to do.
  • As the barrier insulating film 0214 for example, a SiN film, a SiCN film, or the like can be used.
  • the barrier insulating film 0214 is preferably made of the same material as the barrier insulating film 0205.
  • the interlayer insulating film 0215 is an insulating film formed over the barrier insulating film 0214.
  • a SiO 2 or SiOC film can be used for the interlayer insulating film 0215.
  • the interlayer insulating film 0215 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 0215 may be made of the same material as the interlayer insulating film 0213 and the interlayer insulating film 0216.
  • a pilot hole (via hole) for embedding the plug 0214 is formed, and the second barrier metal 0211 is formed in the pilot hole (via hole).
  • a plug 0206 is embedded via
  • the interlayer insulating film 0216 is an insulating film formed over the interlayer insulating film 0215.
  • the interlayer insulating film 0216 for example, a SiO 2 film, a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used.
  • the interlayer insulating film 0216 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 0216 may be formed of the same material as the interlayer insulating film 0215 and the interlayer insulating film 0213.
  • the interlayer insulating film 0216 and the interlayer insulating film 0215 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics.
  • a wiring groove for embedding the second wiring 0212 is formed, and the second wiring 0212 is embedded in the wiring groove via the second barrier metal 0211.
  • the second wiring 0212 is a wiring embedded in the wiring trench formed in the interlayer insulating film 0216 via the second barrier metal 0211.
  • the second wiring 0212 is integrated with the plug 0206.
  • the second wiring is inserted into the pilot hole (via hole) and the wiring groove via the second barrier metal 0211.
  • 0212 and the plug 0206 are integrated and embedded.
  • Cu can be used for forming the second wiring 0212 and the plug 0206.
  • the metal constituting the second wiring 0212 and the plug 0206 includes an interlayer insulating film 0216, an interlayer insulating film 0215, a barrier insulating film 0214, an ion conductive layer 0204, a hard mask 0218, and a lower layer (first In order to prevent diffusion into the metal film 0208), the conductive film has a barrier property and covers the side surfaces and the bottom surface of the second wiring 0212 and the plug 0206.
  • the second barrier metal 0212 includes a refractory metal such as Ta, TaN, TiN, and WCN, nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
  • the barrier insulating film 0217 is formed on the upper surface of the second wiring 0212 and the interlayer insulating film 0216, and prevents oxidation of a metal (for example, Cu) constituting the second wiring 0217, or the second wiring 0212 to the upper layer. It is an insulating film which has a role which prevents the spreading
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used as the barrier insulating film 0217.
  • Switching operation A driving method during the switching operation of the two-terminal switch of the first embodiment shown in FIG. 2 will be described.
  • a negative voltage ( ⁇ V ON ⁇ 0 V) is applied to the second wiring 0212.
  • a negative voltage ( ⁇ V ON ⁇ 0 V) is also applied to the first metal film 0208 electrically connected to the plug 0206 formed integrally with the second wiring 0212, and the first metal film 0208 is applied.
  • the metal constituting the second electrode 0202 is ionized by an electric field generated by applying a negative voltage ( ⁇ V ON ⁇ 0 V), and the metal is transferred to the ion conductive layer 0204.
  • Ions (Cu ions) are supplied.
  • the supplied metal ions (Cu ions) migrate to the first electrode 0201 side by an electric field in the ion conductive layer 0204.
  • the migrated metal ions receive electrons from the first electrode 0201 according to the lines of electric force between the first electrode 0201 and the second electrode 0202, and are deposited as metal by an electrochemical reaction.
  • Formation of the metal bridge 0221 from the lower layer portion of the first electrode 0201 to the upper end portion of the second electrode 0202 proceeds by the deposited metal.
  • the metal bridge 0221 that connects the lower layer portion of the first electrode 0201 and the upper end portion of the second electrode 0202 the resistance value between the first electrode 0201 and the second electrode 0202 becomes low resistance, and the ON state is obtained.
  • a positive voltage (+ V OFF > 0 V) is applied to the second wiring 0212.
  • a positive voltage (+ V OFF > 0 V) is also applied to the first metal film 0208 electrically connected to the plug 0206 formed integrally with the second wiring 0212, and the first metal film 0208
  • the metal constituting the metal bridge 0221 is ionized by the generated electric field at the interface between the ion conductive layer 0204 and the metal bridge 0221,
  • the dissolution reaction proceeds.
  • Metal ions (Cu ions) generated by a dissolution reaction on the surface of the metal bridge 0221 migrate to the second electrode 0202 side by an electric field present in the ion conductive layer 0204.
  • the metal ions that have reached the interface between the second electrode 0202 and the ion conductive layer 0204 receive electrons from the second electrode 0202 and are deposited as metal by an electrochemical reaction.
  • the resistance value between the first electrode 0201 and the second electrode 0202 Becomes a high resistance and transits to the OFF state.
  • the electric field concentrates on the curvature portion during switching between the ON state and the OFF state, and an operation with stable and small variation can be obtained.
  • the planar shape of the first metal film 0208 and the second metal film 0209 is “circular” with the plug 0206 as the central axis.
  • the position where the metal bridge 0221 is formed during the switching operation is the position shown in FIG. The position may be symmetrical with respect to the line.
  • FIG. 3A is a diagram illustrating steps 1 to 3 in the manufacturing process
  • FIG. 3B is a diagram illustrating steps 4 to 8 in the manufacturing process.
  • An interlayer insulating film 0313 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 0319 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed. Using a method (including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 0313, and then a first barrier metal 0310 (for example, TaN / Ta, film thickness) is formed in the wiring groove.
  • the first wiring 0307 (for example, Cu) is buried via 5 nm / 5 nm).
  • the interlayer insulating film 0313 can be formed by a plasma CVD method.
  • the first wiring 0307 is formed, for example, by forming a first barrier metal 0310 (for example, a TaN / Ta laminated film) by the PVD method.
  • a first barrier metal 0310 for example, a TaN / Ta laminated film
  • Cu is embedded in the wiring groove by the electrolytic plating method.
  • excess copper other than in the wiring trench can be removed by CMP.
  • a general method in this technical field can be used.
  • the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness on the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 0313 by polishing.
  • a barrier insulating film 0305 (eg, SiN, film thickness of 30 nm) is formed over the interlayer insulating film 0313 including the first wiring 0307.
  • the barrier insulating film 0305 can be formed by a plasma CVD method.
  • the thickness of the barrier insulating film 0305 is preferably about 10 nm to 50 nm.
  • a hard mask 0321 (eg, SiO 2 ) is formed over the barrier insulating film 0305.
  • the hard mask 0321 is preferably made of a material different from the barrier insulating film 0305 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film.
  • SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN, or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
  • An opening is patterned on the hard mask 0321 using a photoresist (not shown), and an opening pattern is formed on the hard mask 0321 by dry etching using the photoresist as a mask. Strip the resist. At this time, the dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0321 and may reach the inside of the barrier insulating film 0321.
  • the barrier insulating film 0305 exposed from the opening of the hard mask 0321 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0305 and the opening of the barrier insulating film 0305 is formed. Then, the first wiring 0307 is exposed, and then an organic stripping process is performed with an amine-based stripping solution or the like to remove copper oxide formed on the exposed surface of the first wiring 0307 and etching that occurs at the time of etch back Remove double products.
  • the barrier insulating film 0305 is etched back, the wall surface of the opening of the barrier insulating film 0305 can be tapered by using reactive dry etching.
  • a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 0321 is preferably completely removed during the etch-back, but may remain as it is when it is an insulating material.
  • the shape of the opening in the barrier insulating film 0305 can be a circle, and the diameter of the circle can be 30 nm to 500 nm.
  • the oxide on the surface of the first wiring 0307 is removed by RF (Radio Frequency) etching using a non-reactive gas.
  • RF Radio Frequency
  • helium or argon can be used as the non-reactive gas.
  • a second metal film 0309 for example, Cu 10 nm
  • a barrier insulating film 0303 for example, SiCN film, 10 nm in thickness
  • a first metal film 0308 for example, Ru 10 nm and Ta 10 nm are deposited in this order.
  • a hard mask 0318 eg, SiN film, film thickness 30 nm
  • a hard mask 0322 eg, SiO 2 film, film thickness 100 nm
  • the hard mask 0318 and the hard mask 0322 can be formed by a plasma CVD method.
  • the first metal film 0308 and the second metal film 0309 are formed by sputtering. Further, a photoresist (not shown) for patterning the hard mask 0322 is formed, and then the hard mask 0322 is dry-etched using the photoresist as a mask until the hard mask 0318 appears, and then oxygen plasma ashing is performed. The photoresist is removed using organic stripping.
  • the shape of the photoresist as viewed from above is a circle or an ellipse depending on the exposure pattern of the mask.
  • the exposure pattern may be rectangular or square, and the curvature may be given by side etching when the hard mask 0322 is etched.
  • Step 6 Next, using the hard mask 0322 as an etching mask, the hard mask 0318, the first metal film 0308, the barrier insulating film 0303, and the second metal film 0309 are successively dry-etched to form the first electrode 0301 and the second electrode 0302. To do. At this time, it is preferable that the hard mask 0322 is completely removed by etching during the series of etching processes. A part of the hard mask 0322 (a residual film having a uniform thickness) may remain as it is. In step 6, for example, when the upper layer of the first metal film 0308 is Ta, it can be processed by Cl 2 RIE.
  • RIE processing can be performed with a mixed gas of Cl 2 / O 2 .
  • etching can be performed without exposing the first metal film 0308 and the second metal film 0309 to oxygen plasma ashing for resist removal.
  • the oxidation plasma treatment can be irradiated without depending on the resist stripping time.
  • the etching recipe may be adjusted so that the hard mask 0318, the first metal film 0308, the barrier insulating film 0303, and the second metal film 0309 have curvature.
  • Step 7 an SIOCH-based ion containing silicon, oxygen, carbon, and hydrogen is used as the ion conductive layer 0304 so as to be in contact with the side surfaces of the barrier insulating film 0305, the first electrode 0301, the second electrode 0302, and the barrier insulating film 0303 over the hard mask 0318.
  • a conductive layer is formed with a thickness of about 20 nm to 80 nm by a CVD method.
  • the carrier gas helium the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is directly supplied to the reaction chamber by another line.
  • the temperature is preferably about 250 ° C to 350 ° C.
  • SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0314 over the ion conductive layer 0304.
  • the barrier insulating film 0314 can be formed by a plasma CVD method.
  • the ion conductive layer 0304 remains in a region other than the two-terminal switch element 0320, it functions as an insulating film and thus does not affect the operation of the two-terminal switch and the multilayer wiring.
  • 300 nm of SiO 2 is formed as an interlayer insulating film 0315 on the barrier insulating film 0314.
  • the interlayer insulating film 0315 is flattened by polishing by about 170 nm by a CMP method.
  • the interlayer insulating film 0315 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the two-terminal switch element 0320.
  • an interlayer insulating film 0316 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 0315, and then a pilot hole for the plug 0306 and a wiring groove for the second wiring 0312 are deposited. Is formed by dry etching, and a second wiring 0312 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0311 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • a second wiring 0312 for example, Cu
  • a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0311 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • the second wiring 0312 and the plug 0306 are formed by, for example, forming a second barrier metal 0311 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method.
  • a second barrier metal 0311 for example, a TaN / Ta laminated film
  • step 8 by making the upper layer of the second barrier metal 0311 and the first metal film 0308 the same material, the contact resistance between the plug 0306 and the first metal film 0308 is reduced, and the element performance is improved (in the ON state). The resistance of the two-terminal switch can be reduced).
  • the interlayer insulating film 0316 and the barrier insulating film 0317 can be formed by a plasma CVD method.
  • step 8 when forming the prepared hole of the plug 0306, it reaches the upper layer of the first metal film 0308, and the material of the upper layer of the first metal film 0308 functions as an etching stopper material.
  • a fluorocarbon gas is used for dry etching of the prepared hole for the plug 0306 and the wiring groove for the second wiring 0312.
  • the second embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “three-terminal switch” described below.
  • FIG. 4 is a cross-sectional view schematically showing an example of the configuration of the “3-terminal switch” of the second embodiment.
  • the “three-terminal switch” of the second embodiment includes a first metal film 0408 electrically connected to the plug 0406 and a first metal film 0408 electrically connected to the first wiring A0407.
  • a two-metal film 0409 and an interlayer insulating film 0403 sandwiched between and electrically separating the first metal film 0408 and the second metal film 0409 are provided.
  • the three-layer structure including the first metal film 0408, the interlayer insulating film 0403, and the second metal film 0409 is patterned in the same planar shape, and the side surface of the patterned three-layer structure has the first metal film 0408 The side wall surface, the side wall surface of the interlayer insulating film 0403, and the side wall surface of the second metal film 0409 are exposed.
  • a first wiring B0410 used as a third electrode is formed.
  • the ion conductive layer 0404 is provided so as to contact only the upper surface of the first wiring B0410 and a part of the side surface of the patterned three-layer structure. Of the side wall surface of the first metal film 0408, a portion in contact with the ion conductive layer 0404 functions as the first electrode 0401. Of the side wall surface of the second metal film 0409, a portion in contact with the ion conductive layer 0404 is It functions as the second electrode 0402.
  • the ion conductive layer 0404 serves as a medium for conducting metal ions. Therefore, the “three-terminal switch” of the second embodiment is configured by using the first wiring B 0410, the first electrode 0401, the ion conductive layer 0404, and the second electrode 0402 that are used as the third electrode. .
  • the conductive material constituting the second metal film 0409 includes tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN), Titanium nitride (TiN) is suitable, and a laminate of these may be employed.
  • Ru is preferable.
  • the interlayer insulating film 0403 is formed on the upper surface of the second metal film 0409.
  • the interlayer insulating film 0403 is an insulating material that can be vapor-deposited and formed using an insulating material that does not exhibit ion conductivity, such as a SiC film, a SiCN film, a SiN film, and a stacked structure thereof. can do.
  • the conductive material constituting the first metal film 0408 includes tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN), Titanium nitride (TiN) is suitable, and a laminate of these may be employed. In particular, Ru is preferable.
  • the first metal film 0408 made of these conductive materials.
  • a top surface of the interlayer insulating film 0403 is formed by a sputtering method, a laser ablation method, or a plasma CVD method.
  • the planar shape of the patterned three-layer structure is a circle, and therefore the planar shape of the first metal film 0408 and the second metal film 0409. Is round. Therefore, the first electrode 0401 made of the side wall surface of the first metal film 0408 and the second electrode 0402 made of the side wall surface of the second metal film 0409 also have the same curvature.
  • the ion conductive layer 0404 is formed using a sputtering method, a laser ablation method, or a plasma CVD method in order to be in contact with the surface of the first wiring B 0410 and the side surface of the three-layer structure having a curvature.
  • a material of the ion conductive layer 0404 it is necessary to select a material having a high conductivity of metal ions and capable of vapor phase etching processing in an LSI production line.
  • One of the candidate materials that can be used to fabricate the ion conductive layer 0404 is chalcogenide GeSbTe, which is used as a material for the phase change layer in the phase change element.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 0404 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of forming a film by sputtering using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 0404 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the first wiring B0410 used as the third electrode is made of a metal material capable of supplying metal ions to the ion conductive layer 0404.
  • the main metal is Cu, and an alloy with Al or the like may be used.
  • Switching operation A driving method during ON / OFF operation (switching) in the “3-terminal switch” of the second embodiment shown in FIG. 4 will be described.
  • the migrated metal ions receive electrons injected into the ion conductive layer 0404 from the second electrode 0402 and the first electrode 0401 and are reduced to metal.
  • metal deposition starts from the lower end of the surface of the second electrode 0402 and the surface (side wall surface) of the first electrode 0401.
  • Formation of the metal bridge 0405 proceeds in accordance with the lines of electric force between the first electrode 0401, the second electrode 0402, and the first wiring B0410 (third electrode).
  • a metal bridge 0405 formed from the lower surface of the surface of the second electrode 0402 and the surface (side wall surface) of the first electrode 0401 extends along the side wall surface of the interlayer insulating film 0403 on the surface (side wall surface) of the second electrode 0402.
  • the first wiring B0410 (third electrode) is grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) is applied to the first electrode 0401 and the second electrode 0402. But it ’s okay.
  • Metal ions are reduced by electrons injected into the ion conductive layer 0404 from the surface of the first wiring B0410 (third electrode).
  • the generated metal is re-deposited on the surface of the first wiring B0410 (third electrode).
  • the dissolution of the metal bridge 0405 proceeds, and a conduction path that connects the upper end of the surface (sidewall surface) of the second electrode 0402 and the lower end of the surface (sidewall surface) of the first electrode 0401 along the side wall surface of the interlayer insulating film 0403.
  • the resistance value between the first electrode 0401 and the second electrode 0402 becomes high resistance, and the OFF state is entered.
  • the bias at the time of transition from the ON state to the OFF state is also a mode in which the first wiring B0410 (third electrode) is grounded and a positive voltage (+ V OFF > 0 V) is applied to the first electrode 0401 and the second electrode 0402. good.
  • the side surfaces of the first electrode 0401 and the second electrode 0402 constituting the “three-terminal switch” of the second embodiment shown in FIG. 4 have curvature, so that the first electrode 0401 is turned on during the ON / OFF operation (switching).
  • the electric field formed in the ion conductive layer by the switching voltage applied between the second electrode 0402 and the first wiring B0410 (third electrode) is concentrated on this curvature portion, and switching operation is stable and has little variation. Is obtained.
  • the three-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device.
  • FIG. 5 shows the structure of the three-terminal switching element 0520 of the first embodiment, which is formed inside a multilayer wiring layer provided in the semiconductor device.
  • the multilayer wiring layer provided in the semiconductor device illustrated in FIG. 5 includes a plug 0506 electrically connected to the first metal film 0508, a second wiring 0512 and a second metal film 0509 that are integrally formed with the plug 0506.
  • the first wiring A 0507 connected and the first wiring B 0522 used as the third electrode are provided.
  • a barrier insulating film 0503 is sandwiched between the first metal film 0508 and the second metal film 0509.
  • the three-layer structure including the first metal film 0508, the barrier insulating film 0503, and the second metal film 0509 has a hard mask. By using 0518 as an etching mask and performing etching, it is patterned in the same planar shape. On the side surface of the patterned three-layer structure, the side wall portion of the first metal film 0508, the side wall portion of the barrier insulating film 0503, and the side wall portion of the second metal film 0509 are exposed.
  • a part of the side surface of the patterned three-layer structure is in contact with the ion conductive layer 0504, and the side wall portion of the first metal film 0508 in contact with the ion conductive layer 0504 is used as the first electrode 0501.
  • a side wall portion of the second metal film 0509 that is in contact with the ion conductive layer 0504 is used as the second electrode 0502.
  • a part of the surface of the first wiring B 0522 used as the third electrode is in contact with the ion conductive layer 0504 in the opening of the barrier insulating film 0505.
  • the three-terminal switch 0520 includes a first wiring B 0522, a first electrode 0501, a second electrode 0502, and an ion conductive layer 0504 that are used as a third electrode.
  • the multilayer wiring layer includes an interlayer insulating film 0513, a barrier insulating film 0505, a protective insulating film 0523, an ion conductive layer 0504, a barrier insulating film 0514, an interlayer insulating film 0515, an interlayer insulating film 0516, and a barrier insulating layer on the semiconductor substrate 0519.
  • An insulating stacked body in which the films 0517 are stacked in this order is included.
  • a second wiring 0512 is embedded in a wiring groove formed in the interlayer insulating film 0516, and pilot holes formed in the interlayer insulating film 0515, the barrier insulating film 0514, the ion conductive layer 0504, the protective insulating film 0523, and the hard mask 0518.
  • the plug 0506 is embedded in the second wiring 0512 and the plug 0506, and the second wiring 0520 and the side surface and bottom surface of the plug 0506 are covered with the second barrier metal 0511.
  • a barrier insulating film 0514 is provided between the ion conductive layer 0504 and the interlayer insulating film 0515, and diffusion of metal ions from the ion conductive layer 0504 to the interlayer insulating film 0515 is performed using the barrier insulating film 0514. It is preventing.
  • a protective insulating film 0523 and a barrier insulating film 0505 are provided between the ion conductive layer 0504 and the interlayer insulating film 0513. The protective insulating film 0523 and the barrier insulating film 0505 are used to start from the ion conductive layer 0504. Diffusion of metal ions into the interlayer insulating film 0513 is prevented.
  • the barrier insulating film 0505 covers the upper surface of the interlayer insulating film 0513, the upper surface of the first wiring A0507, and the upper surface of the first wiring B0522, and the upper surface portion of the first wiring A0507 and the upper surface portion of the first wiring B0522.
  • An opening is formed in the.
  • the second metal film 0509 and the upper surface portion of the first wiring A0507 are electrically connected through this opening.
  • the ion conductive layer 0504 is in contact with the surface of the first wiring B 0522 through the opening. Therefore, the barrier insulating film 0505 prevents contact between the second metal film 0509 and the upper surface of the interlayer insulating film 0513. As a result, diffusion of the metal constituting the second metal film 0509 into the interlayer insulating film 0513 is prevented.
  • the three-terminal switch 0520 includes a second metal film 0509, a barrier insulating film 0503, and a first metal film 0501 that form the processed second electrode 0502 on the opened barrier insulating film 0505.
  • 0508, a hard mask 0508, a protective insulating film 0523, and a first wiring B 0522 also serving as a third electrode under another opened barrier insulating film 0505.
  • the upper surface of the protective insulating film 0523, the hard mask 0518, and the first metal An ion conductive layer 0504 is formed so as to cover the side surfaces of the film 0508, the barrier insulating film 0503, the second metal film 0509, and the upper surface of the first wiring B 0522, and the barrier insulating film 0514 is formed thereon. Yes.
  • the first metal film 0508 constituting the first electrode 0501 is electrically connected through the plug 0506 and the second barrier metal 0511.
  • the second metal film 0509 constituting the second electrode 0502 is electrically connected to the first wiring A 0507 and the first barrier metal A 0510 through an opening opened in the barrier insulating film 0205.
  • the third electrode also serves as the first wiring B0522.
  • the first metal film 0508 constituting the first electrode 0501 has a two-layer structure, and the same material as the second barrier metal 0511 is used for the surface (upper layer) in contact with the plug 0506. By doing so, the second barrier metal 0511 of the plug 0506 and the upper layer of the first metal film 0508 constituting the first electrode 0501 are integrated to reduce contact resistance and to improve reliability by improving adhesion. The improvement of property can be realized.
  • the semiconductor substrate 0519 is a substrate on which a semiconductor element is formed.
  • a substrate such as a silicon substrate, a single crystal substrate, an SOI (Silicon-on-Insulator) substrate, a TFT (Thin-Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
  • the interlayer insulating film 0513 is an insulating film formed over the semiconductor substrate 0519.
  • a low dielectric constant film for example, a SiOCH film
  • the interlayer insulating film 0513 may be a stack of a plurality of insulating films.
  • a wiring groove for embedding the first wiring A0507 and the first wiring B0522 is formed, and the first wiring A0507 is inserted into the wiring groove via the first barrier metal A0510.
  • a first wiring layer B0522 is embedded via B0521.
  • the first wiring A 0507 and the first wiring B 0522 are wirings embedded in the wiring trench formed in the interlayer insulating film 0513 via the first barrier metal A 0510 and the first barrier metal B 0521.
  • the first wiring A 0507 is in direct contact with the second metal film 0509 that forms the second electrode 0502.
  • the first wiring B 0522 is in direct contact with the ion conductive layer 0504.
  • the first wiring A0507 and the first wiring B0522 are made of Cu, but may be alloyed with Al.
  • the first wiring B 0522 functions as a third electrode that supplies Cu ions into the three-terminal ion conductive layer 0504.
  • the first barrier metal A0510 and the first barrier metal B0521 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A0507 and the first wiring B0522 from diffusing into the interlayer insulating film 0513 and the lower layer. It is a conductive film having a barrier property.
  • first barrier metal A0510 and the first barrier metal B0521 for example, when the first wiring A0507 and the first wiring B0522 are made of a metal element whose main component is Cu, tantalum (Ta), tantalum nitride (TaN) Alternatively, a refractory metal such as titanium nitride (TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
  • TiN titanium nitride
  • WCN tungsten carbonitride
  • the barrier insulating film 0505 is formed over the interlayer insulating film 0513 including the first wiring A0507 and the first wiring B0522, and prevents the metal (for example, Cu) constituting the first wiring A0507 and the first wiring B0522 from being oxidized. It has a role of preventing diffusion of the metal constituting the first wiring A 0507 and the first wiring B 0522 into the ion conductive layer 0504.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • the barrier insulating film 0505 has an opening over the first wiring A0507 and the first wiring B0522.
  • the first wiring A0507 and the second metal film 0209 constituting the second electrode 0502 are in contact with each other, and the first wiring B0522 and the ion conductive layer 0504 are in contact with each other.
  • the opening of the barrier insulating film 0505 is formed in each region of the first wiring A0507 and the first wiring B0522.
  • the wall surface of the opening of the barrier insulating film 0505 is a tapered surface that becomes wider as the distance from the first wiring A 0507 and the first wiring B 0522 increases.
  • the taper angle ⁇ taper of the wall surface of the opening of the barrier insulating film 0510 is set to 85 ° or less ( ⁇ taper ⁇ 85 °) with respect to the upper surface of the first wiring 0207.
  • the second electrode 0502 and the first electrode 0501 are electrodes that transmit signals in the three-terminal switch 0520, and are in direct contact with the ion conductive layer 0504.
  • the second metal film 0509 constituting the second electrode 0502 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0504. For example, Pt, Ru, etc. can be used.
  • the second electrode 0502 is a side wall portion of the second metal film 0509.
  • the first metal film 0508 constituting the first electrode 0501 is composed of two layers of different metals.
  • the first electrode 0501 is a side wall portion of the first metal film 0508.
  • the lower layer in contact with the barrier insulating film 0503 and the ion conductive layer 0504 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0504.
  • a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0504.
  • Pt, Ru, etc. can be used.
  • the upper layer of the first metal film 0508 constituting the first electrode 0501 is in contact with the hard mask 0518 and the ion conductive layer 0504.
  • the upper layer of the first metal film 0508 has a role of protecting the lower layer. That is, when the upper layer protects the lower layer, damage to the lower layer during the process can be suppressed, and the switching characteristics of the three-terminal switch 0520 can be maintained.
  • this upper layer for example, Ta, Ti, W, Al or nitrides thereof can be used.
  • the upper layer of the first metal film 0507 is electrically connected to the plug 05
  • the barrier insulating film 0503 is provided between the first metal film 0508 constituting the first electrode 0501 and the second metal film 0509 constituting the second electrode 0502.
  • the barrier insulating film 0503 has a role of insulating the first metal film 0508 constituting the first electrode 0501 and the second metal film 0509 constituting the second electrode 0502 so that they are not short-circuited.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • the ion conductive layer 0504 is a film in which metal ions (Cu ions) can move in an electric field.
  • a material whose resistance is changed by the action of metal (diffusion, ion transmission, etc.) included in the ion conductive layer can be used.
  • a film is used in which metal ions supplied from the first wiring B 0522 that also serves as the third electrode can conduct ions.
  • Metal ions are supplied as Cu ions from the first wiring B 0522 that also serves as the third electrode.
  • a pilot hole for embedding the plug 0514 is formed in the barrier insulating film 0514, and the plug 0506 is embedded in the pilot hole via the second barrier metal 0511.
  • One of the candidate materials that can be used to fabricate the ion conductive layer 0504 is chalcogenide GeSbTe, which is used as a material for the phase change layer in the phase change element.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 0504 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 0504 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the hard mask 0518 is a film serving as a hard mask when the first metal film 0508 constituting the first electrode 0501, the barrier insulating film 0503, and the second metal film 0509 constituting the second electrode 0502 are etched.
  • a SiN film, a SiO 2 film, or a laminate thereof can be used.
  • the protective insulating film 0523 has the side surfaces of the first metal film 0508 forming the first electrode 0501, the barrier insulating film 0503, and the second metal film 0509 forming the second electrode 0502 on the first wiring B 0522 that also serves as the third electrode.
  • the barrier insulating film 0503 is a film used for protection from ashing treatment when opening. Since oxygen plasma is used for the ashing treatment, the first electrode 0501 and the second electrode 0509 which are side surfaces of the first metal film 0508 and the second metal film 0509 are oxidized.
  • the protective insulating film 0523 for example, a SiN film, a SiCN film, or a stacked layer thereof can be used.
  • the barrier insulating film 0514 is an insulating film having a function of preventing diffusion of metal ions (Cu ions) contained in the ion conductive layer 0504 into the interlayer insulating film 0515 without damaging the three-terminal switch 0520.
  • the barrier insulating film 0514 for example, a SiN film, a SiCN film, or the like can be used.
  • the barrier insulating film 0514 is preferably made of the same material as the barrier insulating film 0505.
  • a pilot hole for embedding the plug 0506 is formed in the barrier insulating film 0514, and the plug 0506 is embedded in the pilot hole via the second barrier metal 0511.
  • the interlayer insulating film 0515 is an insulating film formed over the barrier insulating film 0514.
  • a SiO 2 , SiOC film or the like can be used for the interlayer insulating film 0515.
  • the interlayer insulating film 0515 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 0515 may be made of the same material as the interlayer insulating film 0513 and the interlayer insulating film 0516.
  • a pilot hole for embedding the plug 0506 is formed in the interlayer insulating film 0515, and the plug 0506 is embedded in the pilot hole via the second barrier metal 0511.
  • the interlayer insulating film 0516 is an insulating film formed over the interlayer insulating film 0515.
  • the interlayer insulating film 0516 for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used.
  • the interlayer insulating film 0516 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 0516 may be formed of the same material as the interlayer insulating film 0515 and the interlayer insulating film 0513.
  • the interlayer insulating film 0516 and the interlayer insulating film 0515 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics.
  • a wiring groove for embedding the second wiring 0512 is formed, and the second wiring 0512 is embedded in the wiring groove via the second barrier metal 0511.
  • the second wiring 0512 is a wiring embedded in the wiring trench formed in the interlayer insulating film 0516 via the second barrier metal 0511.
  • the second wiring 0512 is integrated with the plug 0506.
  • the plug 0506 is embedded in the prepared holes formed in the interlayer insulating film 0515, the barrier insulating film 0514, and the hard mask 0518 via the second barrier metal 0511.
  • the plug 0506 is electrically connected to the first metal film 0508 constituting the first electrode 0501 through the second barrier metal 0511.
  • Cu can be used for the second wiring 0512 and the plug 0506.
  • the second barrier metal 0511 has the second wiring 0512 and the plug 0506 in order to prevent the metal constituting the second wiring 0512 (including the plug 0506) from diffusing into the interlayer insulating film 0516, the interlayer insulating film 0515, or the lower layer. It is the electroconductive film which has the barrier property which coat
  • the second barrier metal 0512 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
  • the barrier insulating film 0517 is formed on the interlayer insulating film 0516 including the second wiring 0512, prevents oxidation of the metal (for example, Cu) constituting the second wiring 0517, and configures the second wiring 0512 to the upper layer. It is an insulating film having a role of preventing metal diffusion.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • Switching operation A driving method during the switching operation of the three-terminal switch of the first embodiment shown in FIG. 5 will be described.
  • the second electrode 0502 is electrically connected to the second electrode 0502.
  • the second metal film 0509 is electrically connected to the first electrode 0501 through the first wiring 0507.
  • the first metal film 0508, the plug 0506, and the second wiring 0512 are grounded.
  • metal ions (Cu ions) are diffused from the first wiring B 0522 also serving as the third electrode into the ion conductive layer 0504, Migrate to the first electrode 0501 and the second electrode 0502 side.
  • the migrated metal ions receive electrons from the first electrode 0501 and the second electrode 0502, and a metal bridge 0524 is deposited by an electrochemical reaction. As a result, the resistance value between the first electrode 0501 and the second electrode 0502 becomes low resistance, and is turned on.
  • the first wiring B 0522 also serving as the third electrode may be grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) may be applied to the first electrode 0501 and the second electrode 0502.
  • the second electrode 0502 is electrically connected to the second electrode 0502.
  • the second metal film 0509 is electrically connected to the first electrode 0501 through the first wiring 0507.
  • the metal bridge 0524 becomes metal ions (Cu ions) and is dispersed in the ion conductive layer 0504.
  • the resistance value between the first electrode 0501 and the second electrode 0502 becomes high resistance, and transitions to the OFF state.
  • the first wiring B 0522 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 0501 and the second electrode 0502.
  • FIGS. 6A and 6B are cross-sectional views schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment.
  • FIG. 6A is a diagram illustrating steps 1 to 5 in the manufacturing process
  • FIG. 6B is a diagram illustrating steps 6 to 10 in the manufacturing process.
  • An interlayer insulating film 0613 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 0619 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed. Using a method (including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 0513, and then the first barrier metal A0610 and the first barrier metal B0621 (for example, The first wiring A0607 and the first wiring B0622 (for example, Cu) are embedded via TaN / Ta and a film thickness of 5 nm / 5 nm.
  • a method including photoresist formation, dry etching, and photoresist removal
  • the interlayer insulating film 0613 can be formed by a plasma CVD method.
  • the first wiring A0607 and the first wiring B0622 are formed, for example, by forming a first barrier metal A0610 and a first barrier metal B0621 (for example, a stacked film of TaN / Ta) by a PVD method, and after forming a Cu seed by a PVD method, It can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used.
  • the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness on the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 0613 by polishing.
  • a barrier insulating film 0605 (eg, SiN, film thickness of 30 nm) is formed over the surface of the first wiring A 0607 and the first wiring B 0622 and the interlayer insulating film 0613.
  • the barrier insulating film 0605 can be formed by a plasma CVD method.
  • the thickness of the barrier insulating film 0605 is preferably about 10 nm to 50 nm.
  • a hard mask 0625 (eg, SiO 2 ) is formed over the barrier insulating film 0605.
  • the hard mask 0625 is preferably made of a material different from the barrier insulating film 0605 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film.
  • the hard mask 0625 for example, SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
  • the barrier insulating film 0605 exposed from the opening of the hard mask 0625 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0605.
  • the first wiring A0607 is exposed in the opening of the barrier insulating film 0605, and then an organic stripping process is performed with an amine-based stripping solution or the like, thereby removing copper oxide formed on the exposed surface of the first wiring A0607. Etching byproducts generated during etch back are removed.
  • the wall surface of the opening of the barrier insulating film 0605 can be tapered by using reactive dry etching.
  • a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 0625 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material.
  • the shape of the opening in the barrier insulating film 0605 can be a circle, and the diameter of the circle can be 30 nm to 500 nm.
  • the oxide on the surface of the first wiring 0607 is removed by RF (Radio Frequency) etching using a non-reactive gas.
  • RF Radio Frequency
  • helium or argon can be used as the non-reactive gas.
  • a second metal film 0609 for example, Ru 10 nm
  • a barrier insulating film 0603 for example, SiCN film, film thickness 10 nm
  • a first metal film 0608 for example, Ru 10 nm and Ta 10 nm are deposited in this order.
  • a hard mask 0618 eg, SiN film, film thickness 30 nm
  • a hard mask 0626 eg, SiO 2 film, film thickness 100 nm
  • the first metal film 0608 and the second metal film 0609 are formed by sputtering. Further, a photoresist (not shown) for patterning the hard mask 0626 is formed. After that, using the photoresist as a mask, the hard mask 0626 is dry-etched until the hard mask 0618 appears, and then oxygen plasma ashing is performed. The photoresist is removed using organic stripping.
  • the planar shape of the hard mask 0626 (the shape viewed from above) is a circle or an ellipse. Alternatively, the exposure pattern of the photoresist mask itself is rectangular or square, and when the hard mask 0626 is etched, the corners are removed by side etching. As a result, the planar shape of the hard mask 0626 has a curvature. It may be allowed.
  • Step 6 Next, using the hard mask 0626 as a mask, the hard mask 0618, the first metal film 0608, the barrier insulating film 0603, and the second metal film 0609 are continuously dry-etched to form the first electrode 0601 and the second electrode 0602. .
  • the hard mask 0626 is preferably completely removed during the etch back, but may remain as it is.
  • step 6 for example, when the upper layer of the first metal film 0608 is Ta, it can be processed by Cl 2 RIE, and when the lower layer of the first metal film 0608 and the second metal film are Ru, Cl can be processed.
  • RIE processing can be performed with a mixed gas of 2 / O 2 .
  • the first metal film 0608 and the second metal film 0609 can be etched without being exposed to oxygen plasma ashing for resist removal.
  • the resist used for patterning the hard mask 0626 is oxidized with oxygen plasma after processing, the first metal film 0608 is covered with the hard mask 0626.
  • the etching recipe may be adjusted so that the planar shapes of the hard mask 0618, the first metal film 0608, the barrier insulating film 0603, and the second metal film 0609 have curvature.
  • Step 7 a protective insulating film 0623 (eg, SiCN film, 30 nm) and a hard mask 0627 (eg, SiO 2) are in contact with the hard mask 0618, the first electrode 0601, the barrier insulating film 0603, the second electrode 0602, and the barrier insulating film 0605. A film, 50 nm) is deposited.
  • the protective insulating film 0623 and the hard mask 0627 can be formed by a plasma CVD method. Further, a photoresist (not shown) for patterning the hard mask 0627 is formed, and then the hard mask 0627 is dry-etched, and then the photoresist is removed using oxygen plasma ashing and organic peeling.
  • the barrier insulating film 0605 exposed from the opening of the hard mask 0627 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0605 and the opening of the barrier insulating film 0605 is formed.
  • the first wiring B0622 is exposed, and then an organic stripping process is performed with an amine-based stripping solution or the like to remove copper oxide formed on the exposed surface of the first wiring B0622, and etching that has occurred at the time of etch back Remove double products.
  • the openings of the hard mask 0627 are the side surfaces of the first metal film 0608 and the second metal film 0609 where the first electrode 0601 and the second electrode 0602 are formed, the side surfaces of the barrier insulating film 0603, and the side surfaces of the hard mask 0618. Since the hard mask 0618 and the first metal film 0608 become hard masks at the time of etch back, the side surface of the opening portion of the barrier insulating film 0605 is self-aligned so that the first electrode 0601 is closer to the first wiring A 0607 side. And the second electrode 0602. In the etch back of the barrier insulating film 0605, the wall surface of the opening of the barrier insulating film 0605 can be tapered by using reactive dry etching.
  • a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 0627 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material.
  • the shape of the opening in the barrier insulating film 0605 has a curvature, and the maximum length of the opening in the planar direction is 30 nm to 500 nm.
  • the oxide on the surface of the first wiring 0607 is removed by RF (Radio Frequency) etching using a non-reactive gas.
  • RF Radio Frequency
  • helium or argon can be used as the non-reactive gas.
  • Step 9 silicon, oxygen, and carbon are used as the ion conductive layer 0604 so as to be in contact with the protective insulating film 0623, the hard mask 0618, the first electrode 0601, the barrier insulating film 0605, the second electrode 0602, the barrier insulating film 0603, and the first wiring B 0622. Then, an SIOCH-based ion conductive layer containing hydrogen is formed to a thickness of about 20 nm to 80 nm by CVD. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is directly supplied to the reaction chamber by another line.
  • the temperature is preferably about 250 ° C to 350 ° C.
  • SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0614 over the ion conductive layer 0604.
  • the barrier insulating film 0614 can be formed by a plasma CVD method.
  • the ion conductive layer 0604 remains in a region other than the three-terminal switch element 0620, it functions as an insulating film and does not affect the operation of the three-terminal switch and the multilayer wiring.
  • a SiO 2 film having a thickness of 300 nm is formed as an interlayer insulating film 0615 on the barrier insulating film 0614.
  • the interlayer insulating film 0615 is flattened by polishing about 170 nm by a CMP method.
  • the interlayer insulating film 0615 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the three-terminal switch element 0620.
  • an interlayer insulating film 0616 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 0615, and then a pilot hole for the plug 0606 and a wiring groove for the second wiring 0612 are formed. Is formed by dry etching, and a second wiring 0612 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0611 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • a second wiring 0612 for example, Cu
  • a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0611 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • the second wiring 0612 and the plug 0606 are formed by, for example, forming a second barrier metal 0611 (for example, a stacked film of TaN / Ta) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method.
  • a second barrier metal 0611 for example, a stacked film of TaN / Ta
  • step 10 by making the upper layer of the second barrier metal 0611 and the first metal film 0608 the same material, the contact resistance between the plug 0606 and the first metal film 0608 is reduced, and the element performance is improved (in the ON state). The resistance of the three-terminal switch can be reduced).
  • the interlayer insulating film 0616 and the barrier insulating film 0617 can be formed by a plasma CVD method.
  • step 10 when forming the prepared hole of the plug 0606, it reaches the upper layer of the first metal film 0608, and the material of the upper layer of the first metal film 0608 functions as an etching stopper material. For dry etching of the pilot hole for the plug 0606 and the wiring groove for the second wiring 0612, a fluorocarbon-based gas is used.
  • the three-terminal switching element of the second embodiment is formed inside a multilayer wiring layer provided in the semiconductor device.
  • FIG. 7 shows the structure of the three-terminal switching element 0720 according to the second embodiment, which is formed in the multilayer wiring layer provided in the semiconductor device.
  • a three-terminal switch 0720 is formed inside a multilayer wiring layer provided in the semiconductor device.
  • the multilayer wiring layer includes a plug 0706 electrically connected to the first metal film 0708 constituting the first electrode 0701 and a first wiring A0707 connected to the second metal film 0709 constituting the second electrode 0702.
  • the ion conductive layer 0704 is in contact with the first electrode 0701 and the second electrode 0702, and includes a barrier insulating film 0703 between the first metal film 0708 and the second metal film 0709, and the ion conductive layer 0704 and the interlayer insulating film. Between 0715, the barrier insulating film 0714 exists.
  • the plug 0706 is connected to the second wiring 0712.
  • the first wiring B 0722 also serves as the third electrode, and is in contact with the ion conductive layer 0704 through the opening of the barrier insulating film 0705.
  • the multilayer wiring layer is formed by stacking an interlayer insulating film 0713, a barrier insulating film 0705, an ion conductive layer 0704, a barrier insulating film 0714, an interlayer insulating film 0715, an interlayer insulating film 0716, and a barrier insulating film 0717 over the semiconductor substrate 0719.
  • An insulating laminate is formed by stacking an interlayer insulating film 0713, a barrier insulating film 0705, an ion conductive layer 0704, a barrier insulating film 0714, an interlayer insulating film 0715, an interlayer insulating film 0716, and a barrier insulating film 0717 over the semiconductor substrate 0719.
  • An insulating laminate An insulating laminate.
  • a second wiring 0712 is embedded in a wiring groove formed in the interlayer insulating film 0716, and a plug 0706 is embedded in pilot holes formed in the interlayer insulating film 0715, the barrier insulating film 0714, the ion conductive layer 0704, and the hard mask 0718.
  • the second wiring 0712 and the plug 0706 are integrated with each other, and the side surfaces and bottom surfaces of the second wiring 0720 and the plug 0706 are covered with the second barrier metal 0711.
  • first wiring B 0722 also serving as a third electrode under another opened barrier insulating film 0705, and the upper surface of the hard mask 0718, the first metal film 0708, the barrier insulating film 0703, the second metal film 0709, the barrier An ion conductive layer 0704 is formed so as to cover a side surface of the insulating film 0723 and an upper surface of the first wiring B 0722, and a barrier insulating film 0714 is formed thereon.
  • the first wiring B 0722 also serving as the third electrode is electrically separated from the first metal film 0708 also serving as the first electrode 0701 by the barrier insulating film 0723.
  • the first metal film 0708 constituting the first electrode 0701 is electrically connected to the plug 0706 via the second barrier metal 0711.
  • the second metal film 0709 constituting the second electrode 0702 is electrically connected to the first wiring A0707 and the first barrier metal A0710 through the opening opened in the barrier insulating film 0705.
  • the third electrode also serves as the first wiring B0722.
  • the first metal film 0708 constituting the first electrode 0701 has a two-layer structure, and the surface (upper layer) in contact with the plug 0706 is made of the same material as the second barrier metal 0711. In this way, the second barrier metal 0711 of the plug 0706 and the upper layer of the first metal film 0708 constituting the first electrode 0701 of the three-terminal switch 0720 are integrated, reducing the contact resistance, and the adhesiveness. Improvement of reliability can be realized by improving the above.
  • the semiconductor substrate 0719 is a substrate on which a semiconductor element is formed.
  • a substrate such as a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, or a liquid crystal manufacturing substrate can be used.
  • the interlayer insulating film 0713 is an insulating film formed over the semiconductor substrate 0719.
  • the interlayer insulating film 0713 for example, SiO 2 , a low dielectric constant film (for example, a SiOCH film) having a lower dielectric constant than that of a silicon oxide film can be used.
  • the interlayer insulating film 0713 may be a stack of a plurality of insulating films.
  • a wiring groove for embedding the first wiring A0707 and the first wiring B0722 is formed, and the first wiring A0707 is inserted into the wiring groove via the first barrier metal A0710.
  • the first wiring layer B0722 is embedded via B0721.
  • the first wiring A0707 and the first wiring B0722 are wirings embedded in the wiring trench formed in the interlayer insulating film 0713 via the first barrier metal A0710 and the first barrier metal B0721.
  • the first wiring A0707 is in direct contact with the second metal film 0709 forming the second electrode 0702.
  • the first wiring B 0722 is in direct contact with the ion conductive layer 0704.
  • the first wiring A0707 and the first wiring B0722 are made of Cu, but may be alloyed with Al.
  • the first wiring B 0722 functions as a third electrode for supplying Cu ions into the three-terminal ion conductive layer 0704.
  • the first barrier metal A0710 and the first barrier metal B0721 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A0707 and the first wiring B0722 from diffusing into the interlayer insulating film 0713 or the lower layer. It is a conductive film having a barrier property.
  • first barrier metal A0710 and the first barrier metal B0721 for example, when the first wiring A0707 and the first wiring B0722 are made of a metal material containing Cu as a main component, tantalum (Ta), tantalum nitride (TaN) Alternatively, a refractory metal such as titanium nitride (TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
  • TiN titanium nitride
  • WCN tungsten carbonitride
  • the barrier insulating film 0705 is formed on the surface of the first wiring A0707 and the first wiring B0722, the interlayer insulating film 0713, and prevents oxidation of the metal (for example, Cu) constituting the first wiring A0707 and the first wiring B0722. , Has a role of preventing diffusion of the metal constituting the first wiring A0707 and the first wiring B0722 into the ion conductive layer 0704.
  • a SiC film, a SiCN film, a SiN film, and a stacked structure thereof can be used.
  • the barrier insulating film 0705 has an opening over the first wiring A0707 and the first wiring B0722.
  • the first wiring A0707 and the second metal film 0709 constituting the second electrode 0702 are in contact with each other, and the first wiring B0722 and the ion conductive layer 0704 are in contact with each other.
  • the opening of the barrier insulating film 0705 is formed in each region of the first wiring A0707 and the first wiring B0722.
  • the wall surface of the opening of the barrier insulating film 0705 has a tapered surface that becomes wider as the distance from the first wiring A0707 and the first wiring B0722 increases.
  • the taper angle ⁇ taper of the wall surface of the opening of the barrier insulating film 0710 is set to 85 ° or less ( ⁇ taper ⁇ 85 °) with respect to the upper surface of the first wiring 0207.
  • the second electrode 0702 and the first electrode 0701 are electrodes that transmit signals in the three-terminal switch 0720, and are in direct contact with the ion conductive layer 0704.
  • the second metal film 0709 constituting the second electrode 0702 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0704. For example, Pt, Ru, etc. can be used.
  • the second electrode 0702 is a side wall portion of the second metal film 0709.
  • the first metal film 0708 constituting the first electrode 0701 is composed of two layers of different metals.
  • the first electrode 0701 is a side wall portion of the first metal film 0708.
  • the lower layer in contact with the barrier insulating film 0703 and the ion conductive layer 0704 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0704.
  • a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0704.
  • Pt, Ru, etc. can be used.
  • the upper layer of the first metal film 0708 constituting the first electrode 0701 is in contact with the hard mask 0718 and the ion conductive layer 0704.
  • the upper layer of the first metal film 0708 has a role of protecting the lower layer. That is, when the upper layer protects the lower layer, damage to the lower layer during the process can be suppressed, and the switching characteristics of the three-terminal switch 0720 can be maintained.
  • this upper layer for example, Ta, Ti, W, Al or nitrides thereof can be used.
  • the upper layer of the first metal film 0707 is electrically connected to the plug 0706 through the second barrier metal 0711.
  • the barrier insulating film 0723 is provided between the first wiring B 0722 that also serves as the third electrode and the second metal film 0709 that constitutes the second electrode 0702.
  • the barrier insulating film 0723 has a role of insulating the first wiring B 0722 serving also as the third electrode and the second metal film 0709 constituting the second electrode 0702 so as not to be short-circuited.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • the barrier insulating film 0703 is provided between the first metal film 0708 constituting the first electrode 0701 and the second metal film 0709 constituting the second electrode 0702.
  • the barrier insulating film 0703 has a role of insulating the first metal film 0708 constituting the first electrode 0701 and the second metal film 0709 constituting the second electrode 0702 so that they are not short-circuited.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • the ion conductive layer 0704 is a film in which metal ions (Cu ions) can move in an electric field.
  • a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used.
  • a film that can conduct ions of metal ions supplied from the first wiring B 0722 also serving as the third electrode is used.
  • Metal ions are supplied as Cu ions from the first wiring B 0722 that also serves as the third electrode.
  • a pilot hole for embedding the plug 0714 is formed in the barrier insulating film 0714, and the plug 0706 is embedded in the pilot hole via the second barrier metal 0711.
  • One of the material candidates that can be used to fabricate the ion conductive layer 0704 is chalcogenide GeSbTe, which is used in the phase change element as a material for the phase change layer.
  • chalcogenide GeSbTe which is used in the phase change element as a material for the phase change layer.
  • As a means for forming the ion conductive layer 0704 made of GeSbTe on the side surface of the three-layer structure having a curvature there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 0704 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the hard mask 0718 is a film serving as a hard mask when the first metal film 0708 constituting the first electrode 0701, the barrier insulating film 0703, and the second metal film 0709 constituting the second electrode 0702 are etched.
  • a SiN film, a SiO 2 film, or a laminate thereof can be used.
  • the barrier insulating film 0714 is an insulating film having a function of preventing detachment and diffusion of oxygen and metal contained in the ion conductive layer 0704 without damaging the three-terminal switch 0720.
  • As the barrier insulating film 0714 for example, a SiN film, a SiCN film, or the like can be used.
  • the barrier insulating film 0714 is preferably made of the same material as the barrier insulating film 0705.
  • a pilot hole for embedding the plug 0706 is formed in the barrier insulating film 0714, and the plug 0706 is embedded in the pilot hole via the second barrier metal 0711.
  • the interlayer insulating film 0715 is an insulating film formed over the barrier insulating film 0714.
  • the interlayer insulating film 0715 for example, a SiO 2 , SiOC film or the like can be used.
  • the interlayer insulating film 0715 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 0715 may be formed of the same material as the interlayer insulating films 0713 and 0716.
  • a pilot hole for embedding the plug 0706 is formed in the interlayer insulating film 0715, and the plug 0706 is embedded in the pilot hole via the second barrier metal 0711.
  • the interlayer insulating film 0716 is an insulating film formed over the interlayer insulating film 0715.
  • the interlayer insulating film 0716 for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used.
  • the interlayer insulating film 0716 may be formed of the same material as the interlayer insulating film 0715 and the interlayer insulating film 0713.
  • the interlayer insulating film 0716 and the interlayer insulating film 0715 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics.
  • the interlayer insulating film 0716 may be formed of the same material as the interlayer insulating films 0715 and 0713. In the interlayer insulating film 0716, a wiring groove for embedding the second wiring 0712 is formed, and the second wiring 0712 is embedded in the wiring groove via the second barrier metal 0711.
  • the second wiring 0712 is a wiring embedded in the wiring trench formed in the interlayer insulating film 0716 with the second barrier metal 0711 interposed therebetween.
  • the second wiring 0712 is integrated with the plug 0706.
  • the plug 0706 is embedded in a prepared hole formed in the interlayer insulating film 0715, the barrier insulating film 0714, and the hard mask 0718 via the second barrier metal 0711.
  • the plug 0706 is electrically connected to the first metal film 0708 constituting the first electrode 0701 through the second barrier metal 0711.
  • Cu can be used for the second wiring 0712 and the plug 0706.
  • the second barrier metal 0711 includes side surfaces of the second wiring 0712 and the plug 0706 in order to prevent the metal constituting the second wiring 0712 (including the plug 0706) from diffusing into the interlayer insulating films 0716 and 0715 and the lower layer. It is a conductive film having a barrier property covering the bottom surface.
  • the second barrier metal 0712 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
  • the barrier insulating film 0717 is formed on the interlayer insulating film 0716 including the second wiring 0712, prevents oxidation of the metal (for example, Cu) constituting the second wiring 0717, and configures the second wiring 0712 to the upper layer. It is an insulating film having a role of preventing metal diffusion.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • Switching operation A driving method during the switching operation of the three-terminal switch of the second embodiment shown in FIG. 7 will be described.
  • the second electrode 0702 is electrically connected to the second electrode 0702.
  • the second metal film 0709 is electrically connected to the first electrode 0701 via the first wiring 0707.
  • the first metal film 0708, the plug 0706, and the second wiring 0712 are grounded.
  • metal ions (Cu ions) diffuse from the first wiring B 0722 also serving as the third electrode into the ion conductive layer 0704, Migrate to the first electrode 0701 and second electrode 0702 side.
  • the migrated metal ions receive electrons from the first electrode 0701 and the second electrode 0702, and a metal bridge 0724 is deposited by an electrochemical reaction. As a result, the resistance value between the first electrode 0701 and the second electrode 0702 becomes low resistance and is turned on.
  • the first wiring B 0722 also serving as the third electrode may be grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) may be applied to the first electrode 0701 and the second electrode 0702.
  • the first wiring B 0722 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 0701 and the second electrode 0702.
  • the side surfaces of the first electrode 0701 and the second electrode 0702 have curvature, when a switching voltage is applied during switching between the ON state and the OFF state, the electric field concentrates on the curvature portion, and switching is stable and has little variation. Operation is obtained.
  • FIGS. 8A and 8B are cross-sectional views schematically showing an example of the manufacturing process of the three-terminal switching element of the second embodiment.
  • FIG. 8A is a diagram showing steps 1 to 6 in the manufacturing process
  • FIG. 8B is a diagram showing steps 7 to 10 in the manufacturing process.
  • An interlayer insulating film 0813 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 0819 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed.
  • a wiring trench is formed in the interlayer insulating film 0813 using a method (including photoresist formation, dry etching, and photoresist removal), and then a first barrier metal A0810 and a first barrier metal B0821 (for example, The first wiring A0807 and the first wiring B0922 (for example, Cu) are embedded through (TaN / Ta, film thickness 5 nm / 5 nm).
  • the interlayer insulating film 0813 can be formed by a plasma CVD method.
  • the first wiring A0807 and the first wiring B0822 are formed by forming a first barrier metal A0810 and a first barrier metal B (for example, a TaN / Ta laminated film) by a PVD method, and after forming a Cu seed by a PVD method, Cu can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method.
  • a method for forming such a series of copper wirings a general method in this technical field can be used.
  • the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness on the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 0813 by polishing.
  • a barrier insulating film 0805 (for example, SiN, film thickness of 30 nm) is formed on the upper surface of the first wiring A0807 and the first wiring B0822, and on the interlayer insulating film 0913.
  • the barrier insulating film 0805 can be formed by a plasma CVD method.
  • the thickness of the barrier insulating film 0805 is preferably about 10 nm to 50 nm.
  • a hard mask 0825 (eg, SiO 2 ) is formed over the barrier insulating film 0805.
  • the hard mask 0825 is preferably made of a material different from the barrier insulating film 0805 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film.
  • the hard mask 0825 for example, SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
  • An opening is patterned only on the first wiring B 0822 using a photoresist (not shown) on the hard mask 0825, and an opening pattern is formed on the hard mask 0825 by dry etching using the photoresist as a mask. Thereafter, the photoresist is removed by oxygen plasma ashing or the like. At this time, dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0805, and may reach the inside of the barrier insulating film 0805.
  • the barrier insulating film 0805 exposed from the opening of the hard mask 0825 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0805 and the opening of the barrier insulating film 0805 is formed.
  • the first wiring B0822 is exposed, and thereafter, an organic stripping process is performed with an amine-based stripping solution to remove copper oxide formed on the exposed surface of the first wiring B0822, and etching that occurs at the time of etch back Remove double products.
  • the wall surface of the opening of the barrier insulating film 0805 can be tapered by using reactive dry etching.
  • a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 0825 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material.
  • the shape of the opening in the barrier insulating film 0805 can be a circle, and the diameter of the circle can be 30 nm to 500 nm.
  • the oxide on the surface of the first wiring B0822 is removed by RF (Radio-Frequency; high frequency) etching using a non-reactive gas.
  • RF Radio-Frequency; high frequency
  • helium or argon can be used as the non-reactive gas.
  • a barrier insulating film 0823 having a thickness of about 10 nm is formed over the opened barrier insulating film 0823 and the first wiring B 0822.
  • a SiC film or a SiCN film can be used for the barrier insulating film 0823.
  • a hard mask 0826 (eg, SiO 2 ) is formed over the barrier insulating film 0823.
  • the hard mask 0826 is preferably made of a material different from the barrier insulating film 0823 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film.
  • SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
  • Step 6 An opening is patterned only on the first wiring A0807 using a photoresist (not shown) on the hard mask 0825, and an opening pattern is formed on the hard mask 0826 by dry etching using the photoresist as a mask. Thereafter, the photoresist is removed by oxygen plasma ashing or the like. At this time, the dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0823, and may reach the inside of the barrier insulating film 0823 and the barrier insulating film 0805.
  • the barrier insulating film 0823 and the barrier insulating film 0805 exposed from the opening of the hard mask 0826 are etched back (dry etching) to form openings in the barrier insulating film 0823 and the barrier insulating film 0805.
  • the first wiring A0807 is exposed from the openings of the barrier insulating film 0823 and the barrier insulating film 0805, and thereafter, organic stripping treatment is performed with an amine-based stripping solution or the like to form the exposed surface of the first wiring A0807.
  • the removed copper oxide is removed, and etching byproducts generated during the etch back are removed.
  • the wall surfaces of the openings of the barrier insulating film 0823 and the barrier insulating film 0805 can be tapered by using reactive dry etching.
  • reactive dry etching a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 0825 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material.
  • the shape of the opening in the barrier insulating film 0823 and the barrier insulating film 0805 can be circular, and the diameter of the circle can be 30 nm to 500 nm.
  • the oxide on the surface of the first wiring A0807 is removed by RF (Radio-Frequency) using non-reactive gas.
  • RF Radio-Frequency
  • non-reactive gas helium or argon can be used.
  • Step 7 A second metal film 0809 (for example, Ru3 nm and Ta5 nm are deposited in this order), a barrier insulating film 0803 (for example, a SiN film, a film thickness of 5 nm to 10 nm) on the opened barrier insulating film 0823 and the first wiring A0807; A first metal film 0808 (for example, Ta 3 nm, Ru 5 nm, and Ta 25 nm are deposited in this order) is sequentially deposited. Further, a hard mask 0818 (for example, SiN film, film thickness of 30 nm) and a hard mask 0827 (for example, SiO 2 film, film thickness of 100 nm) are stacked in this order.
  • a hard mask 0818 for example, SiN film, film thickness of 30 nm
  • a hard mask 0827 for example, SiO 2 film, film thickness of 100 nm
  • the hard masks 0818 and 0827 can be formed by a plasma CVD method.
  • the first metal film 0808 and the second metal film 0809 are formed by sputtering.
  • a photoresist (not shown) for patterning the hard mask 0827 is formed.
  • the hard mask 0826 is dry-etched until the hard mask 0818 appears, and then oxygen plasma ashing is performed.
  • the photoresist is removed using organic stripping.
  • the planar shape of the hard mask 1109 is a circle or an ellipse.
  • the exposure pattern of the photoresist mask itself is rectangular or square, and when the hard mask 0827 is etched, the corners are removed by side etching. As a result, the planar shape of the hard mask 0827 has a curvature. It may be allowed.
  • the hard mask 0827 As a mask, the hard mask 0818, the first metal film 0808, the barrier insulating film 0803, the second metal film 0809, and the barrier insulating film 0823 are continuously dry-etched to form the first electrode 0801 and the second electrode An electrode 0802 is formed and the first wiring A0807 is exposed. At this time, the hard mask 0827 is preferably completely removed during the etch-back, but may remain as it is.
  • the Ta films of the first metal film 0808 and the second metal film 0809 can be processed by Cl 2 RIE, and the Ru film can be processed by RIE with a mixed gas of Cl 2 / O 2 .
  • the first metal film 0808 and the second metal film 0809 can be etched without being exposed to oxygen plasma ashing for resist removal.
  • the resist used for patterning the hard mask 0827 is oxidized with oxygen plasma after processing
  • the first metal film 0808 is covered with the hard mask 0827.
  • the resist stripping process when the irradiation with the oxidation plasma is performed, the first metal film 0808 covered with the hard mask 0827 is not oxidized even if the irradiation time is increased.
  • etching is performed using a fluorocarbon-based gas (for example, CF 4 ).
  • a fluorocarbon-based gas for example, CF 4
  • the etching recipe may be adjusted so that the planar shapes of the hard mask 0818, the first metal film 0808, the barrier insulating film 0803, the second metal film 0809, and the barrier insulating film 0823 have a curvature.
  • Step 9 an ion conductive layer 0804 is formed in contact with the protective insulating film 0823, the hard mask 0818, the first electrode 0801, the barrier insulating film 0805, the second electrode 0802, the barrier insulating film 0803, the barrier insulating film 0823, and the first wiring B0822. Then, an SIOCH ion conductive material containing silicon, oxygen, carbon, and hydrogen is formed to a thickness of about 20 nm to 80 nm by a CVD method.
  • the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is directly supplied to the reaction chamber by another line.
  • the temperature is preferably about 250 ° C to 350 ° C.
  • SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0814 over the ion conductive layer 0804.
  • the barrier insulating film 0814 can be formed by a plasma CVD method.
  • a SiN film in which a mixed gas of SiH 4 / N 2 is formed by high-density plasma.
  • the ion conductive layer 0804 remains in a region other than the three-terminal switch element 0820, it functions as an insulating film and does not affect the operation of the three-terminal switch and the multilayer wiring.
  • Step 9 is to deposit 300 nm of SiO 2 as an interlayer insulating film 0815 on the barrier insulating film 0814.
  • the interlayer insulating film 0815 is flattened by polishing by about 170 nm by a CMP method.
  • the interlayer insulating film 0815 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the step of the three-terminal switch element 0820.
  • an interlayer insulating film 0816 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 0815, and then a pilot hole for the plug 0806 and a wiring groove for the second wiring 0812 are formed. Is formed by dry etching, and a second wiring 0812 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0811 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • a second wiring 0812 for example, Cu
  • a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0811 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • the second wiring 0812 and the plug 0806 are formed by, for example, forming a second barrier metal 0811 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method.
  • a second barrier metal 0811 for example, a TaN / Ta laminated film
  • the upper layer of the second barrier metal 0811 and the first metal film 0808 are made of the same material, so that the contact resistance between the plug 0806 and the first metal film 0808 is reduced and the device performance is improved (in the ON state). The resistance of the three-terminal switch can be reduced).
  • the interlayer insulating film 0816 and the barrier insulating film 0817 can be formed by a plasma CVD method.
  • step 10 when forming the prepared hole of the plug 0806, it reaches the upper layer of the first metal film 0808, and the material of the upper layer of the first metal film 0808 functions as an etching stopper material.
  • a fluorocarbon gas is used for dry etching of the prepared hole for the plug 0806 and the wiring groove for the second wiring 0812.
  • the third embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “three-terminal switch” described below.
  • FIG. 9 is a cross-sectional view schematically showing an example of the configuration of the “3-terminal switch” of the third embodiment.
  • the three-terminal switch includes a first metal film 0907 connected to the plug 0906, a first wiring A0902 that also serves as the second electrode, and a first electrode 0901 that is a side surface of the first metal film 0907.
  • the first wiring A 0902 also serving as the second electrode
  • the ion conductive layer 0904 in contact with the side surface of the interlayer insulating film 0903
  • the first wiring B 0908 also serving as the third electrode in contact with the ion conductive layer 0904.
  • the metal bridge 0905 formed at the time of transition to ON is formed so as to connect the first electrode 0901 and the first wiring layer B0908 that also serves as the second electrode.
  • the ion conductive layer 0904 serves as a medium for conducting metal ions.
  • the first metal film 0907 constituting the first electrode 0901 is made of tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN). Titanium nitride (TiN) is suitable, and these layers may be used. Ru is particularly preferable. These metals are formed by sputtering, laser ablation, or plasma CVD.
  • the planar shape of the first metal film 0907 constituting the first electrode 0901 has a curvature. Therefore, the first electrode 0901 also has a curvature.
  • the ion conductive layer 0904 is formed by sputtering, laser ablation, or plasma CVD. As a material for the ion conductive layer 0904, it is necessary to select a material having a high metal ion conductivity and which can be processed in an LSI production line.
  • One of the material candidates that can be used for the production of the ion conductive layer 0904 is chalcogenide GeSbTe, which is used as a material of the phase change layer in the phase change element.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 0904 made of GeSbTe on the side surface of the multilayer structure having a curvature, there is a method of forming a film by sputtering using a sintered target of GeSbTe. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 0904 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the first wiring A 0902 that also serves as the second electrode and the first wiring B 0908 that also serves as the third electrode are made of a metal that can supply metal ions to the ion conductive layer 0904.
  • the main metal is Cu, and an alloy with Al or the like may be used.
  • Switching operation A driving method during the switching operation of the three-terminal switch of the third embodiment shown in FIG. 9 will be described.
  • the first wiring B 0910 that also serves as the third electrode may be grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) may be applied to the first electrode 0901 and the first wiring A 0902.
  • the first wiring B0710 that also serves as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 0901 and the first wiring A0902.
  • the side surface shape of the first electrode 0901 has a curvature, when a switching voltage is applied at the time of switching between the ON state and the OFF state, an electric field concentrates on the curvature portion, and an operation with stable and small variation is obtained.
  • the three-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device.
  • FIG. 10 shows the structure of the three-terminal switching element 1020 of the second embodiment, which is formed inside a multilayer wiring layer provided in the semiconductor device.
  • a three-terminal switch 1020 is formed inside a multilayer wiring layer provided in the semiconductor device.
  • the multilayer wiring layer includes a plug 1006 electrically connected to the first metal film 1008 constituting the first electrode 1001, and a first wiring A1007 constituting the second electrode 1002, and the ion conductive layer 1004 is the first electrode.
  • a barrier insulating film 1005 is provided between the first metal film 1008 and the first wiring A 1007, and a barrier insulating film 1014 exists between the ion conductive layer 1004 and the interlayer insulating film 1015.
  • the plug 1006 is connected to the second wiring 1012.
  • the first wiring B1022 also serves as the third electrode, and is in contact with the ion conductive layer 1004 through the opening of the barrier insulating film 1005.
  • the multilayer wiring layer includes an interlayer insulating film 1013, a barrier insulating film 1005, a protective insulating film 1023, an ion conductive layer 1004, a barrier insulating film 1014, an interlayer insulating film 1015, an interlayer insulating film 1016, and a barrier insulating film on the semiconductor substrate 1019.
  • An insulating stacked body is formed in the order of the film 1017.
  • a second wiring 1012 is embedded in a wiring groove formed in the interlayer insulating film 1016, and pilot holes formed in the interlayer insulating film 1015, the barrier insulating film 1014, the ion conductive layer 1004, the protective insulating film 1003, and the hard mask 1018.
  • the plug 1006 is embedded in the second wiring 1012 and the plug 1006, and the side surfaces and the bottom surface of the second wiring 1012 and the plug 1006 are covered with the second barrier metal 1011.
  • a first metal film 1008, a hard mask 1008, and a protective insulating film 1003 constituting the first electrode 1001 are provided on the opened barrier insulating film 1005.
  • An ion conductive layer 1004 is formed so as to cover the mask 1018, the first metal film 1008, the side surfaces of the barrier insulating film 1005, the upper surface of the first wiring A 1007, and the upper surface of the first wiring B 1022.
  • An insulating film 1014 is formed.
  • the first metal film 1008 constituting the first electrode 1001 is electrically connected to the plug 1006 via the second barrier metal 1011.
  • the first wiring A configuring the second electrode 1002 is electrically connected to the first wiring A 1007 and the first barrier metal A 1010 through an opening opened in the barrier insulating film 1005.
  • the third electrode also serves as the first wiring B1022.
  • the first metal film 1008 constituting the first electrode 1001 has a two-layer structure, and the same material as the second barrier metal 1011 is used for the surface (upper layer) in contact with the plug 1006. By doing so, the second barrier metal 1011 of the plug 1006 and the upper layer of the first metal film 1008 constituting the first electrode 1001 of the three-terminal switch 1020 are integrated, the contact resistance is reduced, and the adhesiveness is reduced. Improvement of reliability can be realized by improving the above.
  • the semiconductor substrate 1019 is a substrate on which a semiconductor element is formed.
  • a silicon substrate for example, a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
  • SOI Silicon on Insulator
  • TFT Thin Film Transistor
  • the interlayer insulating film 1013 is an insulating film formed on the semiconductor substrate 1019.
  • the interlayer insulating film 1013 for example, SiO 2 , a low dielectric constant film (for example, SiOCH film) having a relative dielectric constant lower than that of a silicon oxide film can be used.
  • the interlayer insulating film 1013 may be a stack of a plurality of insulating films.
  • a wiring groove for embedding the first wiring A1007 and the first wiring B1022 is formed, and the first wiring A1007 is inserted into the wiring groove via the first barrier metal A1010.
  • the first wiring B1022 is embedded through B1021.
  • the first wiring A 1007 and the first wiring B 1022 are wirings embedded in the wiring trench formed in the interlayer insulating film 1013 via the first barrier metal A 1010 and the first barrier metal B 1021.
  • the first wiring A1007 also serves as the second electrode 1002.
  • the first wiring B1022 is in direct contact with the ion conductive layer 1004.
  • the first wiring A1007 and the first wiring B1022 are made of Cu, but may be alloyed with Al.
  • the first wiring B1022 functions as a third electrode that supplies Cu ions into the three-terminal ion conductive layer 1004.
  • the first barrier metal A1010 and the first barrier metal B1021 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A1007 and the first wiring B1022 from diffusing into the interlayer insulating film 1013 or the lower layer. It is a conductive film having a barrier property.
  • the first barrier metal A1010 and the first barrier metal B1021 for example, when the first wiring 1010 is made of a metal element mainly composed of Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN) ), A refractory metal such as tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof.
  • the barrier insulating film 1005 is formed on the interlayer insulating film 1013 including the first wiring A1007 and the first wiring B1022, and prevents oxidation of the metal (for example, Cu) constituting the first wiring A1007 and the first wiring B1022, It has a role of preventing diffusion of the metal constituting the first wiring A 1007 and the first wiring B 1022 into the ion conductive layer 1004.
  • the barrier insulating film 1005 for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
  • the barrier insulating film 1005 has an opening over the first wiring A1007 and the first wiring B1022.
  • the first wiring A1007 and the first wiring B1022 constituting the second electrode 1002 are exposed, and both are in contact with the ion conductive layer 1004.
  • the opening of the barrier insulating film 1005 is formed in a region including the first wiring A1007 and the first wiring B1022.
  • the wall surface of the opening of the barrier insulating film 1005 is a tapered surface that becomes wider as the distance from the first wiring A1007 and the first wiring B1022 increases.
  • the taper angle ⁇ taper of the wall surface of the opening of the barrier insulating film 1005 is set to 85 ° or less ( ⁇ taper ⁇ 85 °) with respect to the upper surfaces of the first wiring A 1007 and the first wiring B 1022.
  • the first electrode 1001 is an electrode that transmits a signal in the three-terminal switch 1020 and is in direct contact with the ion conductive layer 1004.
  • the first metal film 1008 constituting the first electrode 1001 is composed of two layers of different metals.
  • the first electrode 1001 is a side wall portion of the first metal film 1008.
  • the lower layer in contact with the barrier insulating film 1003 and the ion conductive layer 1004 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 1004. For example, Pt, Ru, etc. can be used.
  • the upper layer of the first metal film 1008 constituting the first electrode 1001 is in contact with the hard mask 1018 and the ion conductive layer 1004.
  • the upper layer of the first metal film 1008 has a role of protecting the lower layer. That is, when the upper layer protects the lower layer, damage to the lower layer during the process can be suppressed, and the switching characteristics of the three-terminal switch 1020 can be maintained.
  • this upper layer for example, Ta, Ti, W, Al or nitrides thereof can be used.
  • the upper layer of the first metal film 1007 is electrically connected to the plug 1006 through the second barrier metal 1011.
  • the ion conductive layer 1004 is a film in which metal ions (Cu ions) can move in an electric field.
  • a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used.
  • a film capable of conducting ions of metal ions supplied from the first wiring B1022 also serving as the third electrode is used.
  • the metal ions are supplied as Cu ions from the first wiring B1022 that also serves as the third electrode.
  • a pilot hole for embedding the plug 1006 is formed in the barrier insulating film 1014, and the plug 1006 is embedded in the pilot hole via the second barrier metal 1011.
  • One candidate material that can be used to fabricate the ion conductive layer 1004 is chalcogenide GeSbTe, which is used as a phase change layer material in phase change elements.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 1004 made of GeSbTe on the side surface of the laminated structure having a curvature, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 1004 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the hard mask 1018 is a film that serves as a hard mask when the first metal film 1008 constituting the first electrode 1001 is etched.
  • the hard mask 1018 for example, a SiN film, a SiO 2 film, or a laminate thereof can be used.
  • the protective insulating film 1023 opens the barrier insulating film 1003 on the first wiring B1022 also serving as the third electrode and the first wiring A1007 also serving as the second electrode on the side surface of the first metal film 1008 constituting the first electrode 1001. At this time, it is a film used for protection from oxidation by resist ashing. Since oxygen plasma is used for the ashing treatment, when exposed to oxygen plasma, the first electrode 1001 that is the side surface of the first metal film 1008 is oxidized.
  • the protective insulating film 1023 for example, a SiN film, a SiCN film, or a stacked layer thereof can be used.
  • the barrier insulating film 1014 is an insulating film having a function of preventing the detachment and diffusion of oxygen and metal contained in the ion conductive layer 1004 without damaging the three-terminal switch 1020.
  • As the barrier insulating film 1014 for example, a SiN film, a SiCN film, or the like can be used.
  • the barrier insulating film 1014 is preferably made of the same material as the barrier insulating film 1005.
  • a pilot hole for embedding the plug 1006 is formed in the barrier insulating film 1014, and the plug 1006 is embedded in the pilot hole via the second barrier metal 1011.
  • the interlayer insulating film 1015 is an insulating film formed on the barrier insulating film 1014.
  • As the interlayer insulating film 1015 for example, a SiO 2 or SiOC film can be used.
  • the interlayer insulating film 1015 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 1015 may be made of the same material as the interlayer insulating films 1013 and 1016.
  • a pilot hole for embedding the plug 1006 is formed in the interlayer insulating film 1015, and the plug 1006 is embedded in the pilot hole via the second barrier metal 1011.
  • the interlayer insulating film 1016 is an insulating film formed on the interlayer insulating film 1015.
  • the interlayer insulating film 1016 for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used.
  • the interlayer insulating film 1016 may be made of the same material as the interlayer insulating film 1015 and the interlayer insulating film 1013.
  • the interlayer insulating film 1016 and the interlayer insulating film 1015 can be manufactured using different insulating materials, and a significant difference can be provided in the etching characteristics.
  • the interlayer insulating film 1016 may be made of the same material as the interlayer insulating films 1015 and 1013. In the interlayer insulating film 1016, a wiring groove for embedding the second wiring 1012 is formed, and the second wiring 1012 is embedded in the wiring groove via the second barrier metal 1011.
  • the second wiring 1012 is a wiring buried in a wiring groove formed in the interlayer insulating film 1016 via the second barrier metal 1011.
  • the second wiring 1012 is integrated with the plug 1006.
  • the plug 1006 is embedded in the prepared holes formed in the interlayer insulating film 1015, the barrier insulating film 1014, and the hard mask 1018 via the second barrier metal 1011.
  • the plug 1006 is electrically connected to the first metal film 1008 constituting the first electrode 1001 through the second barrier metal 1011.
  • Cu can be used for the first wiring 1012 and the plug 1006.
  • the second barrier metal 1011 is formed on the side surfaces of the second wiring 1012 and the plug 1006 in order to prevent the metal constituting the second wiring 1012 (including the plug 1006) from diffusing into the interlayer insulating films 1016 and 1015 and the lower layer. It is a conductive film having a barrier property covering the bottom surface.
  • the second barrier metal 1012 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
  • the barrier insulating film 1017 is formed on the interlayer insulating film 1016 including the second wiring 1012, prevents oxidation of the metal (for example, Cu) constituting the second wiring 1017, and configures the second wiring 1012 to the upper layer. It is an insulating film having a role of preventing metal diffusion.
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used as the barrier insulating film 1017.
  • Switching operation A driving method during the switching operation of the three-terminal switch of the first embodiment shown in FIG. 10 will be described.
  • the first wiring B1022 that also serves as the third electrode may be grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) may be applied to the first electrode 1001 and the second electrode 1002.
  • the first electrode 1001 is electrically connected to the first electrode 1001 via the first wiring A1007 also serving as the second electrode 1002, the plug 1006, and the second wiring 1012, respectively. Ground.
  • a negative voltage ⁇ V OFF ⁇ 0V
  • the dissolution reaction of the metal bridge 1009 proceeds, and the metal bridge 1009 becomes metal ions (Cu ions), and the ion conductive layer Disperse in 1004.
  • the resistance value between the first electrode 1001 and the second electrode 1002 becomes high resistance and transitions to the OFF state.
  • the first wiring B1022 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0V) may be applied to the first electrode 1001 and the second electrode 1002.
  • the shape of the side surface of the first electrode 1001 has a curvature, when a switching voltage is applied at the time of switching between the ON state and the OFF state, an electric field concentrates on the curvature portion, and an operation with stable and small variation is obtained.
  • FIGS. 11A and 11B are cross-sectional views schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment.
  • FIG. 11A is a diagram showing steps 1 to 5 in the manufacturing process
  • FIG. 11B is a diagram showing steps 6 to 8 in the manufacturing process.
  • an interlayer insulating film 1113 (for example, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited, and then Using a lithography method (including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 1113, and then the first barrier metal A1110 and the first barrier metal B (for example, TaN / Ta, film thickness 5 nm / 5 nm) is embedded in the first wiring A1107 and the first wiring B1122 (for example, Cu).
  • a lithography method including photoresist formation, dry etching, and photoresist removal
  • the interlayer insulating film 1113 can be formed by a plasma CVD method.
  • the first wiring A1107 and the first wiring B1122 are formed, for example, by forming a first barrier metal A1110 and a first barrier metal B1122 (for example, a TaN / Ta laminated film) by a PVD method, and after forming a Cu seed by a PVD method, It can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used.
  • the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness of the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface and polishing it. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 1113 by polishing.
  • a barrier insulating film 1105 (eg, SiN, film thickness of 30 nm) is formed on the surface of the first wiring A 1107 and the first wiring B 1122 and on the interlayer insulating film 1113.
  • the barrier insulating film 1105 can be formed by a plasma CVD method.
  • the thickness of the barrier insulating film 1105 is preferably about 10 nm to 50 nm.
  • a first metal film 1108 (for example, Ru 10 nm and Ta 10 nm are deposited in this order) is deposited on the opened barrier insulating film 1105. Further, a hard mask 1118 (for example, SiN film, film thickness 30 nm) and a hard mask 1109 (for example, SiO 2 film, film thickness 100 nm) are stacked in this order. In Step 3, the hard mask 1118 and the hard mask 1109 can be formed by a plasma CVD method. In step 3, the first metal film 1108 is formed by sputtering.
  • the planar shape of the hard mask 1109 (the shape seen from the top surface) is a circle or an ellipse.
  • the exposure pattern itself of the photoresist mask is rectangular or square, and when the hard mask 1109 is etched, the corners are removed by side etching. As a result, the planar shape of the hard mask 1109 has a curvature. It may be allowed.
  • step 4 Next, using the hard mask 1109 as a mask, the hard mask 1118 and the first metal film 1108 are continuously dry-etched to form the first electrode 1101 and the second electrode 1102. At this time, the hard mask 1109 is preferably completely removed during the etch back, but may remain as it is.
  • the hard mask 1109 is preferably completely removed during the etch back, but may remain as it is.
  • the upper layer of the first metal film 1108 is Ta
  • it can be processed by Cl 2 RIE
  • the lower layer of the first metal film 1109 is Ru, Cl 2 / O.
  • RIE processing can be performed with a mixed gas of 2 .
  • etching can be performed without exposing the first metal film 1108 to oxygen plasma ashing for resist removal.
  • the resist used for patterning the hard mask 1109 is oxidized with oxygen plasma after processing
  • the first metal film 1108 is covered with the hard mask 1109.
  • the resist peeling step when the oxidation plasma is irradiated, the first metal film 1108 covered with the hard mask 1109 is not oxidized even if the irradiation time is long.
  • the etching recipe may be adjusted so that the planar shape of the hard mask 1118 and the first metal film 1108 has a curvature.
  • a protective insulating film 1103 for example, SiCN film, 30 nm
  • a hard mask 1123 for example, SiO 2 film, 50 nm
  • the protective insulating film 1103 and the hard mask 1123 can be formed by a plasma CVD method.
  • a photoresist for patterning the hard mask 1123 is formed, and then the hard mask 1123 is dry-etched using the photoresist as a mask, and then oxygen plasma ashing and organic peeling are used. Remove the photoresist.
  • Step 6 Using the hard mask 1123 as a mask, the barrier insulating film 1105 exposed from the opening of the hard mask 1123 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 1105.
  • the first wiring A1107 and the first wiring B1122 are exposed in the opening of the barrier insulating film 1105, and then an organic stripping process is performed with an amine-based stripping solution, so that the first wiring A1107 and the first wiring B1122 are exposed.
  • the copper oxide formed on the exposed surface is removed, and the etching byproduct generated during the etch back is removed.
  • the opening of the hard mask 1123 is closer to the first wiring A 1107 side than the first metal film 1108 on which the first electrode 1101 is formed and the side surfaces of the hard mask 1118.
  • the hard mask 1118 and the first metal film 1108 become hard masks at the time of etch back, so that the side surface of the opening of the barrier insulating film 1105 is aligned with the side surface of the first electrode 1101 by self-alignment.
  • the wall surface of the opening of the barrier insulating film 1105 can be tapered by using reactive dry etching.
  • reactive dry etching a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 1124 is preferably completely removed during the etch back, but may remain as it is in the case of an insulating material.
  • the shape of the opening in the barrier insulating film 1105 has a curvature, and the maximum length of the opening in the planar direction is 30 nm to 500 nm.
  • oxides on the surfaces of the first wiring A1107 and the first wiring B1122 are removed by RF (Radio Frequency) using a non-reactive gas.
  • RF Radio Frequency
  • a non-reactive gas helium or argon can be used.
  • the exposed upper surface of the first wiring A 1107 becomes the second electrode 1102.
  • CVD chemical vapor deposition
  • the supply amount of the raw material is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is directly supplied to the reaction chamber by another line.
  • the temperature is preferably about 250 ° C to 350 ° C.
  • SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0714 on the ion conductive layer 1104.
  • the barrier insulating film 1114 can be formed by a plasma CVD method.
  • the ion conductive layer 1104 remains in a region other than the three-terminal switch element 1120, it functions as an insulating film and does not affect the operation of the three-terminal switch and the multilayer wiring.
  • 300 nm of SiO 2 is deposited as an interlayer insulating film 1115 on the barrier insulating film 1114.
  • the interlayer insulating film 1115 is flattened by polishing about 170 nm by a CMP method.
  • the interlayer insulating film 1115 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the three-terminal switch element 1120.
  • an interlayer insulating film 1116 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 1115, and then a pilot hole for the plug 1106 and a wiring groove for the second wiring 1112 are deposited. Is formed by dry etching, and a second wiring 1112 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 1111 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • a second wiring 1112 for example, Cu
  • a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 1111 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • the second wiring 1112 and the plug 1106 are formed by, for example, forming a second barrier metal 1111 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method.
  • a second barrier metal 1111 for example, a TaN / Ta laminated film
  • the upper layer of the second barrier metal 1111 and the first metal film 1108 is made of the same material, so that the contact resistance between the plug 1106 and the first metal film 1108 is reduced and the device performance is improved (in the ON state). The resistance of the three-terminal switch can be reduced).
  • the interlayer insulating film 1116 and the barrier insulating film 1117 can be formed by a plasma CVD method.
  • the pilot hole for the plug 1106 when forming the pilot hole for the plug 1106, the pilot hole reaches the upper layer of the first metal film 1108, and the material of the upper layer of the first metal film 1108 functions as an etching stopper material.
  • a fluorocarbon-based gas is used for dry etching of the prepared hole for the plug 1106 and the wiring groove for the second wiring 1112.
  • the fourth embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “three-terminal switch” described below.
  • FIG. 10 is a cross-sectional view schematically showing an example of the configuration of the “3-terminal switch” of the fourth embodiment.
  • the “three-terminal switch” of the fourth embodiment includes a plug 1206 that also serves as the first electrode 1201, a first wiring A1202 that also serves as the second electrode, and a first wiring A1202 that also serves as the second electrode.
  • the ion conductive layer 1204 in contact with the side surface of the interlayer insulating film 1203 and the first wiring B 1207 also serving as the third electrode in contact with the ion conductive layer 1204 are formed.
  • the metal bridge 1205 formed at the time of transition to the ON state is formed so as to connect the first electrode 1201 and the first wiring layer B 1207 that also serves as the second electrode.
  • the ion conductive layer 1204 is supplied from the first wiring B 1207 (third electrode). It becomes a medium for conducting metal ions.
  • the side surface and the bottom surface of the plug 1206 are covered with the second barrier metal 1311, and the first electrode 1201 is a portion in contact with the ion conductive layer 1204 of the second barrier metal 1311.
  • Tantalum (Ta) and tantalum nitride (TaN) are suitable for the conductive material constituting the second barrier metal 1311, and a laminate of these may be used.
  • the second barrier metal 1311 made of a conductive material is formed using a sputtering method or a plasma CVD method.
  • the plane (cross section) shape of the pilot hole for the plug 1206 has a curvature. Therefore, the first electrode 0901, which is a portion in contact with the ion conductive layer 1204 of the second barrier metal 1311, also has a curvature.
  • the ion conductive layer 1204 is formed using a sputtering method, a laser ablation method, or a plasma CVD method.
  • a material for the ion conductive layer 1204 it is necessary to select a material having a high conductivity of metal ions (Cu ions) and capable of being etched in an LSI production line.
  • One candidate material that can be used to fabricate the ion conducting layer 1204 is chalcogenide GeSbTe, which is used as a phase change layer material in phase change elements.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 1204 made of GeSbTe, there is a method of forming a film by sputtering using a sintered target of GeSbTe. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 1204 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the first wiring A 1202 that also serves as the second electrode and the first wiring B 1207 that also serves as the third electrode are made of a metal that can supply metal ions to the ion conductive layer 1204.
  • the main metal is Cu, and an alloy with Al or the like may be used.
  • Switching operation A driving method during the switching operation of the three-terminal switch of the fourth embodiment shown in FIG. 12 will be described.
  • the first wiring B 1207 that also serves as the third electrode may be grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) may be applied to the first electrode 1201 and the first wiring A 1202.
  • the first wiring B 1207 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 1201 and the first wiring A 1202.
  • the plug 1206 also serving as the first electrode 1201 has a curvature, an electric field concentrates on the curvature portion during the switching operation between the ON state and the OFF state, and a switching operation with stable and small variation can be obtained.
  • the three-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device.
  • FIG. 13 shows the structure of the three-terminal switching element of the second embodiment formed inside a multilayer wiring layer provided in the semiconductor device.
  • a three-terminal switch 1318 is formed in a multilayer wiring layer provided in the semiconductor device.
  • the multilayer wiring layer includes a plug 1306 constituting the first electrode 1301 and a first wiring A1307 constituting the second electrode 1302, and the ion conductive layer 1304 comprises the first wiring constituting the first electrode 1301 and the second electrode 1302. It is in contact with A1307.
  • the plug 1306 is connected to the second wiring 1312.
  • the first wiring B 1303 also serves as the third electrode, and is in contact with the ion conductive layer 1304 at the opening of the barrier insulating film 1305.
  • the multilayer wiring layer is stacked on the semiconductor substrate 1319 in the order of the interlayer insulating film 1313, the barrier insulating film 1305, the ion conductive layer 1304, the barrier insulating film 1314, the interlayer insulating film 1315, the interlayer insulating film 1316, and the barrier insulating film 1317.
  • An insulating laminate is stacked on the semiconductor substrate 1319 in the order of the interlayer insulating film 1313, the barrier insulating film 1305, the ion conductive layer 1304, the barrier insulating film 1314, the interlayer insulating film 1315, the interlayer insulating film 1316, and the barrier insulating film 1317.
  • a second wiring 1312 is embedded in a wiring groove formed in the interlayer insulating film 1316, and a plug 1306 is embedded in a pilot hole formed in the interlayer insulating film 1315, the barrier insulating film 1314, and the ion conductive layer 1304.
  • the second wiring 1312 and the plug 1306 are integrated with each other, and the side surfaces and the bottom surface of the second wiring 1312 and the plug 1306 are covered with the second barrier metal 1311.
  • the plug 1306 constituting the first electrode 1301 is provided on the opened barrier insulating film 1305, the second barrier metal 1311 constituting the plug 1306, the side surface of the barrier insulating film 1305, the first An ion conductive layer 1304 is formed so as to cover the upper surface of the wiring A 1307 and the upper surface of the first wiring B 1303, and a barrier insulating film 1314 is formed thereon.
  • the plug 1306 constituting the first electrode 1301 is electrically connected through the second barrier metal 1311. Further, the first wiring A 1307 constituting the second electrode 1302 is electrically connected to the first wiring A 1307 and the first barrier metal A 1310 through the opening opened in the barrier insulating film 1305.
  • the third electrode also serves as the first wiring B1303.
  • the plug 1306 constituting the first electrode 1301 uses the second barrier metal 1311 material as it is.
  • the semiconductor substrate 1319 is a substrate on which a semiconductor element is formed.
  • a silicon substrate for example, a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
  • SOI Silicon on Insulator
  • TFT Thin Film Transistor
  • the interlayer insulating film 1313 is an insulating film formed on the semiconductor substrate 1319.
  • the interlayer insulating film 1313 for example, SiO 2 , a low dielectric constant film (for example, SiOCH film) having a lower relative dielectric constant than that of a silicon oxide film, or the like can be used.
  • the interlayer insulating film 1313 may be a stack of a plurality of insulating films.
  • a wiring groove for embedding the first wiring A1307 and the first wiring B1303 is formed, and the first wiring A1307 is inserted into the wiring groove via the first barrier metal A1310.
  • a first wiring B1303 is embedded via B1308.
  • the first wiring A 1307 and the first wiring B 1303 are wirings embedded in the wiring trench formed in the interlayer insulating film 1313 via the first barrier metal A 1310 and the first barrier metal B 1308.
  • the first wiring A 1307 also serves as the second electrode 1302.
  • the first wiring B1303 is in direct contact with the ion conductive layer 1304.
  • the first wiring A1307 and the first wiring B1303 are made of Cu, but may be alloyed with Al.
  • the first wiring B1303 functions as a third electrode that supplies Cu ions into the ion conductive layer 1304.
  • the first barrier metal A1310 and the first barrier metal B1308 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A1307 and the first wiring B1303 from diffusing into the interlayer insulating film 1313 or the lower layer. It is a conductive film having a barrier property.
  • the first barrier metal A1310 and the first barrier metal B1121 for example, when the first wiring is made of a metal element whose main component is Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN) Alternatively, a refractory metal such as tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
  • the barrier insulating film 1305 is formed on the interlayer insulating film 1313 including the first wiring A1307 and the first wiring B1303, and prevents oxidation of the metal (for example, Cu) constituting the first wiring A1307 and the first wiring B1303. It has a role of preventing diffusion of the metal constituting the first wiring A 1307 and the first wiring B 1303 into the ion conductive layer 104.
  • the barrier insulating film 1305 has an opening on the first wiring A 1307 and the first wiring B 1303.
  • the first wiring A 1307 and the first wiring B 1303 that constitute the second electrode 1302 are exposed, and both are in contact with the ion conductive layer 1304.
  • the opening of the barrier insulating film 1305 is formed in a region including the first wiring A 1307 and the first wiring B 1303.
  • the wall surface of the opening of the barrier insulating film 1305 is a tapered surface that becomes wider as the distance from the first wiring A1307 and the first wiring B1303 increases.
  • the tapered surface of the opening of the barrier insulating film 1305 is set to 85 ° or less with respect to the upper surfaces of the first wiring A 1307 and the first wiring B 1303.
  • the ion conductive layer 1304 is a film in which metal ions (Cu ions) can move in an electric field.
  • a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used.
  • a film capable of conducting ions of metal ions supplied from the first wiring B 1322 that also serves as the third electrode is used.
  • Metal ions are supplied as Cu ions from the first wiring B1322 that also serves as the third electrode.
  • a pilot hole for embedding the plug 1306 is formed in the barrier insulating film 1314, and the plug 1306 is embedded in the pilot hole via the second barrier metal 1311.
  • One candidate material that can be used to fabricate the ion conductive layer 1304 is chalcogenide GeSbTe, which is used as a phase change layer material in phase change elements.
  • chalcogenide GeSbTe As a means for forming the ion conductive layer 1304 made of GeSbTe, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
  • Another material candidate that can be used for manufacturing the ion conductive layer 1304 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is supplied directly to the reaction chamber through another line.
  • the barrier insulating film 1314 is an insulating film having a function of preventing diffusion of metal ions contained in the ion conductive layer 1304 into the interlayer insulating film 1315 without damaging the three-terminal switch 1318.
  • the ion conductive layer 1304 has a function of suppressing desorption of oxygen in the SIOCH material.
  • As the barrier insulating film 1314 for example, a SiN film, a SiCN film, or the like can be used.
  • the barrier insulating film 1314 is preferably made of the same material as the barrier insulating film 1305.
  • a pilot hole for embedding the plug 1306 is formed in the barrier insulating film 1314, and the plug 1306 is embedded in the pilot hole via the second barrier metal 1311.
  • the interlayer insulating film 1315 is an insulating film formed on the barrier insulating film 1314.
  • As the interlayer insulating film 1315 for example, a SiO 2 or SiOC film can be used.
  • the interlayer insulating film 1315 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 1315 may be formed of the same material as the interlayer insulating film 1313 and the interlayer insulating film 1316.
  • a pilot hole for embedding the plug 1306 is formed in the interlayer insulating film 1315, and the plug 1306 is embedded in the pilot hole via the second barrier metal 1311.
  • the interlayer insulating film 1316 is an insulating film formed on the interlayer insulating film 1315.
  • the interlayer insulating film 1316 for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used.
  • the interlayer insulating film 1316 may be a stack of a plurality of insulating films.
  • the interlayer insulating film 1316 may be made of the same material as the interlayer insulating film 1315 and the interlayer insulating film 1313.
  • the interlayer insulating film 1316 and the interlayer insulating film 1315 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics.
  • a wiring groove for embedding the second wiring 1312 is formed, and the second wiring 1312 is embedded in the wiring groove via the second barrier metal 1311.
  • the second wiring 1312 is a wiring embedded in a wiring groove formed in the interlayer insulating film 1316 via the second barrier metal 1311.
  • the second wiring 1312 is integrated with the plug 1306.
  • the plug 1306 is embedded in a prepared hole formed in the interlayer insulating film 1315 and the barrier insulating film 1314 via the second barrier metal 1311.
  • the first electrode 1301 is a side surface of the plug 1306 and is composed of the second barrier metal 1311.
  • the first electrode 1301 is an electrode that transmits a signal in the three-terminal switch 1318, and is in direct contact with the ion conductive layer 1304.
  • Cu can be used for the first wiring 1312 and the plug 1306, for example.
  • the second barrier metal 1311 includes the second wiring 1312 and the plug in order to prevent the metal constituting the second wiring 1312 (including the plug 1306) from diffusing into the interlayer insulating film 1316, the interlayer insulating film 1315, or the lower layer.
  • 1306 is a conductive film having a barrier property that covers the side and bottom surfaces of 1306.
  • the second barrier metal 1012 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
  • the barrier insulating film 1317 is formed on the surface of the second wiring 1312 and the interlayer insulating film 1316, and prevents the oxidation of the metal (for example, Cu) constituting the second wiring 1317, or configures the second wiring 1312 to the upper layer. It is an insulating film having a role of preventing diffusion of metal (Cu).
  • a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used as the barrier insulating film 1317.
  • Switching operation A driving method during the switching operation of the three-terminal switch of the first embodiment shown in FIG. 13 will be described.
  • the first wiring B 1303 that also serves as the third electrode may be grounded, and a negative voltage ( ⁇ V ON ⁇ 0 V) may be applied to the first electrode 1301 and the second electrode 1302.
  • the first wiring B 1303 that also serves as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 1301 and the second electrode 1302.
  • the side surface of the plug 1306 that also serves as the first electrode 1301 has a curvature, an electric field concentrates on the curvature portion during the switching operation between the ON state and the OFF state, and a switching operation that is stable and has little variation can be obtained.
  • FIG. 14 is a cross-sectional view schematically showing an example of a manufacturing process of the three-terminal switching element according to the first embodiment.
  • FIG. 14 is a diagram showing steps 1 to 6 in the manufacturing process.
  • An interlayer insulating film 1413 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 1419 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed.
  • a wiring trench is formed in the interlayer insulating film 1413 using a method (including photoresist formation, dry etching, and photoresist removal), and then a first barrier metal A 1410 and a first barrier metal B 1408 (for example, The first wiring A1407 and the first wiring B1403 (for example, Cu) are embedded via TaN / Ta and a film thickness of 5 nm / 5 nm.
  • the interlayer insulating film 1413 can be formed by a plasma CVD method.
  • the first wiring A1407 and the first wiring B1403 are formed by forming a first barrier metal A1410 and a first barrier metal B1408 (for example, a TaN / Ta laminated film) by a PVD method, and after forming a Cu seed by a PVD method, It can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method.
  • a method for forming such a series of copper wirings a general method in this technical field can be used.
  • the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness of the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface and polishing it. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 1413 by polishing.
  • a barrier insulating film 1405 (eg, SiN, film thickness of 30 nm) is formed over the surface of the first wiring A 1407 and the first wiring B 1403 and the interlayer insulating film 1413.
  • the barrier insulating film 1405 can be formed by a plasma CVD method.
  • the thickness of the barrier insulating film 1405 is preferably about 10 nm to 50 nm.
  • a hard mask 1420 (eg, SiO 2 film, 50 nm) is deposited so as to be in contact with the barrier insulating film 1405.
  • the hard mask 1420 can be formed by a plasma CVD method.
  • a photoresist (not shown) for patterning the hard mask 1420 is formed, and then the hard mask 1420 is dry-etched using the photoresist as an etching mask, and then oxygen plasma ashing and organic peeling are used. , Remove the photoresist.
  • the barrier insulating film 1405 exposed from the opening of the hard mask 1420 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 1405 and the opening of the barrier insulating film 1405 is formed.
  • the first wiring A1407 and the first wiring B1403 are exposed, and thereafter, an organic stripping process is performed with an amine-based stripping solution or the like, so that the copper oxide formed on the exposed surfaces of the first wiring A1407 and the first wiring B1403 is removed. In addition to the removal, the etching by-product generated during the etch back is removed.
  • the wall surface of the opening of the barrier insulating film 1405 can be tapered by using reactive dry etching.
  • reactive dry etching a gas containing fluorocarbon can be used as an etching gas.
  • the hard mask 1420 is preferably completely removed during the etch back, but may remain in place when it is an insulating material.
  • the shape of the opening of the barrier insulating film 1405 has a curvature, and the maximum length of the opening in the planar direction is 30 nm to 500 nm.
  • oxides on the surfaces of the first wiring A 1407 and the first wiring B 1403 are removed by RF (Radio Frequency) using a non-reactive gas.
  • RF Radio Frequency
  • helium or argon can be used as the non-reactive gas.
  • the exposed upper surface of the first wiring A 1407 becomes the second electrode 1402.
  • an SIOCH ion conductive material containing silicon, oxygen, carbon, and hydrogen is used as an ion conductive layer 1404 so as to be in contact with the barrier insulating film 1405, the first wiring A 1407, and the first wiring B 1403 by a CVD method with a thickness of about 20 nm to 80 nm.
  • the carrier gas helium Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application.
  • the supply amount of the raw material is 10 to 200 sccm
  • the supply of helium is 500 sccm via the raw material vaporizer
  • 500 sccm is directly supplied to the reaction chamber by another line.
  • the temperature is preferably about 250 ° C to 350 ° C.
  • SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 1414 over the ion conductive layer 1404.
  • the barrier insulating film 1414 can be formed by a plasma CVD method.
  • the ion conductive layer 1404 remains in a region other than the three-terminal switch element 1418, it functions as an insulating film and thus does not affect the operation of the three-terminal switch and the multilayer wiring.
  • 300 nm of SiO 2 is formed as an interlayer insulating film 1415 on the barrier insulating film 1414.
  • the interlayer insulating film 1415 is flattened by polishing about 170 nm by a CMP method.
  • the interlayer insulating film 1415 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the three-terminal switch element 1418.
  • Step 6 an interlayer insulating film 1416 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 1415, and then a pilot hole for the plug 1406 and a wiring groove for the second wiring 1412 are deposited. Is formed by dry etching, and a second wiring 1412 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 1411 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • a second wiring 1412 for example, Cu
  • a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 1411 (for example, TaN / Ta) using a copper dual damascene wiring process.
  • the second wiring 1412 and the plug 1406 are formed by, for example, forming a second barrier metal 1411 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method.
  • a second barrier metal 1411 for example, a TaN / Ta laminated film
  • step 6 the side surface in contact with the second barrier metal 1411 and the ion conductive layer 1404 is the first electrode 1401.
  • the interlayer insulating film 1416 and the barrier insulating film 1417 can be formed by a plasma CVD method.
  • step 6 the barrier insulating film 1405 is reached when the prepared hole of the plug 1406 is formed. Fluorocarbon-based gas is used for dry etching of the prepared hole for the plug 1406 and the wiring groove for the second wiring 1412. While the present invention has been described with reference to the embodiments (and examples), the present invention is not limited to the above embodiments (and examples). Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
  • the switching element according to the present invention can be used as a nonvolatile switching element provided in a multilayer wiring layer of a semiconductor device.
  • a first electrode which is a side wall portion of a metal film electrically connected to a Cu plug or Cu wiring constituting a multilayer wiring
  • a second electrode which is a side wall portion of a metal film electrically connected to a Cu wiring different from the first electrode
  • An insulating film sandwiched between the first electrode and the second electrode
  • a switching element wherein an ion conductive layer capable of moving a metal ionized by an electric field is in contact with side surfaces of the first electrode and the second electrode.
  • a first electrode which is a side wall portion of a metal film electrically connected to a Cu plug or Cu wiring constituting a multilayer wiring;
  • a second electrode that is a Cu wiring different from the first electrode;
  • An ion conductive layer capable of moving a metal ionized by an electric field is in contact with the side surface of the first electrode and the upper surface and side surface of the second electrode;
  • Switching comprising: having at least one third electrode in contact with the ion conductive layer and supplying metal ions to the ion conductive layer, the third electrode being constituted by a Cu wiring forming a multilayer wiring. element.
  • (Appendix 4) 4. The switching element according to any one of appendix 1 to appendix 3, wherein at least one of the first electrode and the second electrode has a convex curvature.
  • a semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate The multilayer wiring includes at least a Cu wiring and a Cu plug, A barrier insulating film is provided on the Cu wiring, The barrier insulating film is provided with one opening each reaching the two Cu wirings, A second electrode of the switching element is electrically connected to one of the Cu wirings; A first electrode is provided on the second electrode with an insulating film interposed therebetween, The first electrode is electrically connected to the Cu plug; An ion conductive layer capable of moving metal ions by an electric field is in contact with side surfaces of the first electrode and the second electrode and another Cu wiring, The Cu wiring of the multilayer wiring that is in contact with the ion conductive layer and insulated by the second electrode and the barrier insulating film also serves as the third electrode, A semiconductor device, wherein a barrier insulating film is provided on an upper surface of the ion conductive layer.
  • a semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate The multilayer wiring includes at least a Cu wiring and a Cu plug, A barrier insulating film is provided on the Cu wiring, The barrier insulating film is provided with one opening that reaches the two Cu wirings, One of the Cu wirings also serves as the second electrode, A first electrode is provided on the second electrode with a barrier insulating film interposed therebetween, The first electrode is electrically connected to the Cu plug; An ion conductive layer capable of moving metal ions by an electric field is in contact with the side surfaces of the first electrode and the second electrode and another Cu wiring, The Cu wiring of the multilayer wiring in contact with the ion conductive layer also serves as the third electrode, A semiconductor device, wherein a barrier insulating film is provided on an upper surface of the ion conductive layer.
  • a semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate The multilayer wiring includes at least a Cu wiring and a Cu plug, A barrier insulating film is provided on the Cu wiring, The barrier insulating film is provided with one opening that reaches the two Cu wirings, One of the Cu wirings also serves as the second electrode, One of the Cu plugs also serves as the first electrode, An ion conductive layer capable of moving metal ions by an electric field is in contact with the side surfaces of the first electrode and the second electrode and another Cu wiring, The Cu wiring of the multilayer wiring in contact with the ion conductive layer also serves as the third electrode, A semiconductor device, wherein a barrier insulating film is provided on an upper surface of the ion conductive layer.
  • a method of manufacturing a semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate The multilayer wiring includes at least a Cu wiring and a Cu plug, A barrier insulating film is provided on the Cu wiring, The barrier insulating film is provided with one opening each reaching the two Cu wirings, A second electrode of the switching element is electrically connected to one of the Cu wirings; A first electrode is provided on the second electrode with an insulating film interposed therebetween, The first electrode is electrically connected to the Cu plug; An ion conductive layer capable of moving metal ions by an electric field is in contact with side surfaces of the first electrode and the second electrode and another Cu wiring, The Cu wiring of the multilayer wiring in contact with the ion conductive layer also serves as the third electrode, A barrier insulating film is provided on the upper surface of the ion conductive layer, When opening the opening of the barrier insulating film in contact with the third electrode, A method of manufacturing a semiconductor device, wherein a laminated film composed of the second electrode, the

Landscapes

  • Semiconductor Memories (AREA)

Abstract

The present invention provides a "three-terminal switch" of novel structure, having two signal electrodes and a control electrode for controlling a switching action that forms or eliminates a metal bridge that couples the signal electrodes. When a metal-bridge-type switching element configured as a "three-terminal switch" is integrated in multi-layered copper wire, the advantage of enabling the current required in the switching action to be reduced to a far greater extent than a "two-terminal switch" is optimized, excellent control can be exercised in respect to the switching action, and the metal bridge for coupling the signal electrodes can be formed or eliminated. In the present invention, the side surface of a metal film and the side surface of a plug are used as the signal electrodes to constitute the "three-terminal switch," the side surfaces functioning as the electrodes are imparted with a curved shape, the contact surface area between the signal electrodes and an ion conductive layer is reduced, and the electric field is concentrated to a greater extent toward the curved sites. It is accordingly possible to realize an energy-efficient switch with exceptionally stable action.

Description

スイッチング素子およびスイッチング素子の製造方法Switching element and method for manufacturing switching element
 本発明は、スイッチング素子およびスイッチング素子の製造方法に関する。本発明は、抵抗変化型不揮発性スイッチング素子、特に、プログラマブルロジックおよびメモリ等の電子デバイスの構成に利用可能な、金属架橋型スイッチング素子と、該金属架橋型スイッチング素子の製造方法に関する。 The present invention relates to a switching element and a method for manufacturing the switching element. The present invention relates to a variable resistance nonvolatile switching element, and more particularly to a metal bridge type switching element that can be used for the configuration of electronic devices such as programmable logic and memory, and a method of manufacturing the metal bridge type switching element.
 プログラマブルロジックの機能を多様化し、電子機器などへの実装を推進して行くためには、ロジックセル間を相互に結線するスイッチング素子のサイズを小さくし、同時に、そのオン抵抗を小さくすることが必要となる。金属架橋型スイッチング素子は、従来の半導体スイッチよりもサイズが小さく、オン抵抗が小さいことが知られている。金属架橋型スイッチング素子には、特許文献1に開示される「2端子スイッチ」と、非特許文献1に開示される「3端子スイッチ」とがある。「2端子スイッチ」は、金属架橋の形成に使用される、金属イオンを供給する「第1電極」と、金属イオンを供給しない「第2電極」で、イオン伝導層を挟んだ構造を有している。例えば、図15に示すように、「第2電極」を接地して、「第1電極」に正電圧を印加すると、「第1電極」とイオン伝導層の界面では、「第1電極」の金属が金属イオンになってイオン伝導層に溶解する。一方、「第2電極」側では、「第2電極」から供給される電子を利用して、イオン伝導層中の金属イオンがイオン伝導層中に金属になって析出する。イオン伝導層中に析出した金属により、金属架橋構造が形成され、最終的に、「第1電極」と「第2電極」を接続する金属架橋が形成される。その後、形成された金属架橋は、「第2電極」を接地して、「第1電極」に負電圧を印加すると、金属架橋を構成する金属が金属イオンになってイオン伝導層に溶解する。一方、「第1電極」側では、「第1電極」から供給される電子を利用して、イオン伝導層中の金属イオンがイオン伝導層中に金属になって、「第1電極」の表面に析出する。最終的に、「第1電極」と「第2電極」を接続する金属架橋が消滅する。両電極間は、イオン伝導層中での金属架橋の形成・消滅によって、スイッチングする。「2端子スイッチ」は、構造が単純であるため、作製プロセスが簡便であり、素子サイズをナノメートルオーダーまで小さく加工可能である。 In order to diversify the functions of programmable logic and promote implementation in electronic devices, it is necessary to reduce the size of switching elements that connect logic cells to each other and at the same time reduce their on-resistance. It becomes. It is known that the metal bridge type switching element is smaller in size and lower in on-resistance than the conventional semiconductor switch. As the metal bridge type switching element, there are a “2-terminal switch” disclosed in Patent Document 1 and a “3-terminal switch” disclosed in Non-Patent Document 1. The “two-terminal switch” has a structure in which an ion conductive layer is sandwiched between a “first electrode” that supplies metal ions and a “second electrode” that does not supply metal ions. ing. For example, as shown in FIG. 15, when the “second electrode” is grounded and a positive voltage is applied to the “first electrode”, the interface between the “first electrode” and the ion conductive layer is the “first electrode”. The metal becomes metal ions and dissolves in the ion conductive layer. On the other hand, on the “second electrode” side, using the electrons supplied from the “second electrode”, the metal ions in the ion conductive layer are deposited as metal in the ion conductive layer. A metal bridge structure is formed by the metal deposited in the ion conductive layer, and finally, a metal bridge connecting the “first electrode” and the “second electrode” is formed. Thereafter, when the “second electrode” is grounded and a negative voltage is applied to the “first electrode”, the metal that forms the metal bridge becomes metal ions and dissolves in the ion conductive layer. On the other hand, on the “first electrode” side, using the electrons supplied from the “first electrode”, the metal ions in the ion conductive layer become metal in the ion conductive layer, and the surface of the “first electrode” It precipitates in. Eventually, the metal bridge connecting the “first electrode” and the “second electrode” disappears. The two electrodes are switched by the formation and disappearance of metal bridges in the ion conductive layer. Since the “two-terminal switch” has a simple structure, the manufacturing process is simple, and the element size can be reduced to the nanometer order.
 最先端の半導体装置の配線材料は主に銅で構成されており、銅配線内に、抵抗変化型不揮発性スイッチング素子を効率的に形成する手法が望まれている。電気化学反応を利用する、金属架橋型スイッチング素子の半導体装置への集積化する技術について、非特許文献2に開示されている。非特許文献2には、半導体基板上の銅配線と、金属架橋型スイッチング素子の「第1電極」を兼用する技術が開示されている。非特許文献2に開示される構造を採用すれば、「第1電極」を新たに形成するための工程が削減できる。そのため、「第1電極」を作製するためのマスクは不要となり、金属架橋型スイッチング素子を作製するために追加すべきフォトマスク(PR)数は、イオン伝導層の作製、「第2電極」の作製に要する2枚とできる。 The wiring material of state-of-the-art semiconductor devices is mainly composed of copper, and a technique for efficiently forming a resistance variable nonvolatile switching element in the copper wiring is desired. Non-patent document 2 discloses a technique for integrating a metal bridge type switching element into a semiconductor device using an electrochemical reaction. Non-Patent Document 2 discloses a technique that combines the copper wiring on the semiconductor substrate and the “first electrode” of the metal bridge type switching element. If the structure disclosed in Non-Patent Document 2 is adopted, the process for newly forming the “first electrode” can be reduced. Therefore, a mask for manufacturing the “first electrode” is not required, and the number of photomasks (PR) to be added to manufacture the metal bridge type switching element is the same as that of the ion conductive layer and the “second electrode”. It can be two sheets required for production.
 しかし、信号の伝達とスイッチングの制御を同じ端子で行う「2端子スイッチ」では、ON/OFF時、金属架橋の形成・消滅に要する数100μAオーダーの電流が、信号端子(「第1電極」と「第2電極」)を流れる。 However, in the “two-terminal switch” in which signal transmission and switching control are performed at the same terminal, a current on the order of several hundreds of μA required for the formation / extinction of the metal bridge at the time of ON / OFF is applied to the signal terminal (“first electrode”). “Second electrode”).
 非特許文献1は、信号の伝達に利用する2つの端子に加えて、ON/OFF時、金属架橋の形成・消滅をコントロールする「第3電極」を設けた「3端子スイッチ」を開示している。非特許文献1に開示する「3端子スイッチ」は、信号の伝達経路中、FETのソースを「第1電極」とし、ソースと「第2電極」との間を連結する、金属架橋の形成・消滅を行うことにより、スイッチの書き込みおよび消去を行う。その際、「第3電極」から、イオン伝導層中に、金属架橋の形成に使用する金属イオンの供給がなされ、また、金属架橋の消滅に伴って、溶出される金属イオンは、「第3電極」の表面で金属に還元され、回収される。一方、ソースと「第2電極」の表面に析出する金属によって、ソースと「第2電極」を連結する、金属架橋の形成により、信号の伝達に利用する2つの端子(ソースと「第2電極」)間の「2端子スイッチ」がON状態となる。逆に、ソースと「第2電極」の表面に析出している金属を溶出させる結果、金属架橋の消滅により、信号の伝達に利用する2つの端子(ソースと「第2電極」)間の「2端子スイッチ」がOFF状態となる。 Non-Patent Document 1 discloses a “three-terminal switch” provided with a “third electrode” that controls the formation and disappearance of a metal bridge in ON / OFF in addition to two terminals used for signal transmission. Yes. The “3-terminal switch” disclosed in Non-Patent Document 1 is the formation of a metal bridge that connects the source and the “second electrode” with the source of the FET as the “first electrode” in the signal transmission path. By erasing, the switch is written and erased. At this time, the metal ions used for forming the metal bridge are supplied from the “third electrode” into the ion conductive layer, and the metal ions eluted with the disappearance of the metal bridge are the “third electrode”. It is reduced to metal at the surface of the “electrode” and recovered. On the other hand, the metal deposited on the surface of the source and the “second electrode” connects the source and the “second electrode”, and by forming a metal bridge, two terminals used for signal transmission (the source and the “second electrode”) The “2-terminal switch” between “)” is turned on. On the contrary, as a result of elution of the metal deposited on the surface of the source and the “second electrode”, the disappearance of the metal bridge causes the “terminal” between the two terminals (source and “second electrode”) used for signal transmission. “Two-terminal switch” is turned off.
 該「3端子スイッチ」では、金属架橋の形成・消滅の際、「第3電極」を流れる電流I3は、ソースを流れる電流I1と「第2電極」を流れる電流I2に分割される(I3=I1+I2)。従って、信号の伝達とスイッチングの制御を同じ端子で行う「2端子スイッチ」と比較すると、ON/OFF時、金属架橋の形成・消滅をコントロールする「第3電極」を設けた「3端子スイッチ」では、信号の伝達に利用する2つの端子(ソースと「第2電極」)を流れる電流を大幅に低減できる。 In the “three-terminal switch”, the current I 3 flowing through the “third electrode” is divided into the current I 1 flowing through the source and the current I 2 flowing through the “second electrode” when the metal bridge is formed or eliminated. (I 3 = I 1 + I 2 ). Therefore, compared with a “two-terminal switch” that controls signal transmission and switching at the same terminal, a “three-terminal switch” is provided with a “third electrode” that controls the formation and disappearance of metal bridges when ON / OFF. Then, the current flowing through the two terminals (source and “second electrode”) used for signal transmission can be greatly reduced.
 非特許文献1に開示する「3端子スイッチ」では、OFF状態からON状態に遷移する過程では、例えば、ソースと「第2電極」を接地し、「第3電極」を正電圧を印加すると、「第3電極」とイオン伝導層の界面では、「第3電極」の金属が金属イオンになってイオン伝導層に溶解する。一方、ソースと「第2電極」の表面では、ソースと「第2電極」から供給される電子を利用して、イオン伝導層中の金属イオンがソースと「第2電極」の表面上に金属になって析出する。析出する金属によって、ソースと「第2電極」の間に金属架橋の形成がなされる。 In the “3-terminal switch” disclosed in Non-Patent Document 1, in the process of transition from the OFF state to the ON state, for example, when the source and the “second electrode” are grounded and the “third electrode” is applied with a positive voltage, At the interface between the “third electrode” and the ion conductive layer, the metal of the “third electrode” becomes metal ions and dissolves in the ion conductive layer. On the other hand, on the surface of the source and “second electrode”, metal ions in the ion conductive layer are formed on the surface of the source and “second electrode” using electrons supplied from the source and “second electrode”. To be deposited. The deposited metal forms a metal bridge between the source and the “second electrode”.
 逆に、ON状態からOFF状態に遷移する過程では、例えば、ソースと「第2電極」を接地し、「第3電極」に負電圧を印加すると、金属架橋を構成している金属が、金属イオンになってイオン伝導層に溶解する。一方、「第3電極」とイオン伝導層の界面では、「第3電極」から供給される電子を利用して、イオン伝導層中の金属イオンが「第3電極」の表面上に金属になって析出する(回収される)。金属架橋を構成している金属の溶解の結果、金属架橋の切断、消滅が進行する。 Conversely, in the process of transition from the ON state to the OFF state, for example, when the source and the “second electrode” are grounded and a negative voltage is applied to the “third electrode”, the metal constituting the metal bridge becomes a metal It becomes ions and dissolves in the ion conductive layer. On the other hand, at the interface between the “third electrode” and the ion conductive layer, using the electrons supplied from the “third electrode”, the metal ions in the ion conductive layer become a metal on the surface of the “third electrode”. To be deposited (recovered). As a result of dissolution of the metal constituting the metal bridge, cutting and extinction of the metal bridge proceed.
 特許文献2は、「3端子スイッチ」を、例えば、図16に模式的に示す構成、すなわち、「第3電極」として、金属イオンを供給可能な、銅からなる電極を利用し、「第1電極」と「第2電極」として、金属イオンを供給しない、例えば、Pt、Ru、Ta、TaN、TiN、炭窒化タングステン(WCN)のような高融点金属やその窒化物からなる電極を利用して構成する事例を開示している。また、特許文献2中には、「3端子スイッチ」を銅配線中に集積する形態も開示されている。 Patent Document 2 uses, as a “third terminal switch”, for example, a configuration schematically shown in FIG. 16, that is, a “third electrode” using an electrode made of copper capable of supplying metal ions, As the “electrode” and the “second electrode”, an electrode made of a refractory metal such as Pt, Ru, Ta, TaN, TiN, tungsten carbonitride (WCN) or a nitride thereof that does not supply metal ions is used. The case that is configured is disclosed. Patent Document 2 also discloses a form in which a “3-terminal switch” is integrated in a copper wiring.
 非特許文献3には、「第1電極」と「第2電極」として、側壁電極を採用する「3端子スイッチ」が開示されている。その際、金属イオンを供給する「第3電極」は、側壁電極に接するイオン伝導層を覆うように形成されている。従って、金属イオンを供給する「第3電極」として、銅からなる電極、例えば、銅配線や銅プラグを利用する場合、該銅配線や銅プラグから、イオン伝導層への銅イオンの供給を妨げるバリアメタルによる、銅配線、銅プラグの側壁面、底面の被覆を排する必要がある。バリアメタルによる、銅配線、銅プラグの側壁面、底面の被覆を排すると、銅配線、銅プラグの側壁面、底面から、例えば、SiO2で形成される層間絶縁膜中への銅の拡散が進行する。長期間動作する間に、この層間絶縁膜中への銅の拡散に起因して、隣接する銅配線間が、「Cuデンドライト」によって短絡する故障が発生する。 Non-Patent Document 3 discloses a “3-terminal switch” that employs sidewall electrodes as “first electrode” and “second electrode”. At this time, the “third electrode” for supplying metal ions is formed so as to cover the ion conductive layer in contact with the side wall electrode. Accordingly, when a copper electrode, for example, a copper wiring or a copper plug, is used as the “third electrode” for supplying metal ions, the supply of copper ions from the copper wiring or the copper plug to the ion conductive layer is hindered. It is necessary to remove the covering of the copper wiring, the side wall surface of the copper plug, and the bottom surface by the barrier metal. Excluding the copper wiring and the side wall surface and bottom surface of the copper plug due to the barrier metal, copper diffusion from the side surface and bottom surface of the copper wiring and copper plug into, for example, an interlayer insulating film formed of SiO 2 proceed. During operation for a long period of time, due to the diffusion of copper into the interlayer insulating film, a failure occurs in which adjacent copper wirings are short-circuited by “Cu dendrite”.
 非特許文献3に開示される構成、特に、金属イオンを供給する「第3電極」をイオン伝導層を覆うように形成する形態の「3端子スイッチ」を、多層配線中への集積化に対する工夫は、非特許文献3には示唆されていない。 The device disclosed in Non-Patent Document 3, in particular, a “three-terminal switch” in which a “third electrode” for supplying metal ions is formed so as to cover the ion conductive layer is devised for integration in a multilayer wiring. Is not suggested in Non-Patent Document 3.
国際公開第2000/48196号International Publication No. 2000/48196 特開2011-211165号公報JP 2011-2111165 A
 「3端子スイッチ」は、「2端子スイッチ」と比較し、下記の利点を有している。 “3-terminal switch” has the following advantages compared to “2-terminal switch”.
 まず、「3端子スイッチ」では、信号の伝達に使用する、信号端子(第1電極と第2電極)と、スイッチのON/OFF動作時、そのスイッチングの制御に使用する制御端子(第3電極)を分離している。第1電極と第2電極に対して、第3電極にスイッチング電圧を印加することで、第1電極と第2電極の表面において、金属の析出、逆に、金属の溶解を行い、ON/OFF状態間の書き換えを行っている。従って、「3端子スイッチ」では、金属架橋の形成・消滅の際、「第3電極」を流れる電流I3は、「第1電極」を流れる電流I1と「第2電極」を流れる電流I2に分割される(I3=I1+I2)。「第1電極」を流れる電流I1と「第2電極」を流れる電流I2は、それぞれ、「第1電極」上に析出される金属量M1と「第2電極」上に析出される金属量M2に依存している。 First, in the “3-terminal switch”, a signal terminal (first electrode and second electrode) used for signal transmission, and a control terminal (third electrode) used for controlling the switching at the time of ON / OFF operation of the switch. ) Is separated. By applying a switching voltage to the third electrode with respect to the first electrode and the second electrode, metal is deposited on the surface of the first electrode and the second electrode, and on the contrary, the metal is dissolved, and ON / OFF Rewriting between states. Therefore, in the “three-terminal switch”, the current I 3 flowing through the “third electrode” and the current I 1 flowing through the “first electrode” and the current I flowing through the “second electrode” when the metal bridge is formed and eliminated. Divided into two (I 3 = I 1 + I 2 ). The current I 1 flowing through the “first electrode” and the current I 2 flowing through the “second electrode” are deposited on the metal amount M 1 deposited on the “first electrode” and the “second electrode”, respectively. It is dependent on the amount of metal M 2.
 一方、「2端子スイッチ」では、金属架橋の形成・消滅の際、「第1電極」を流れる電流I1'と「第2電極」を流れる電流I2'は等しく(I1'=I2')、その電流量は、「第2電極」上に析出される金属量に依存している。 On the other hand, in the “two-terminal switch”, the current I 1 ′ flowing through the “first electrode” and the current I 2 ′ flowing through the “second electrode” are equal (I 1 ′ = I 2) when the metal bridge is formed or eliminated. ' ) The amount of current depends on the amount of metal deposited on the "second electrode".
 従って、「3端子スイッチ」では、金属架橋の形成(消滅)時に「第1電極」を流れる電流I1と「第2電極」を流れる電流I2は、「2端子スイッチ」において、金属架橋の形成(消滅)時に「第1電極」を流れる電流I1'と「第2電極」を流れる電流I2'と比較して、大幅に低減することが可能である。 Therefore, in the “three-terminal switch”, the current I 1 flowing through the “first electrode” and the current I 2 flowing through the “second electrode” when the metal bridge is formed (disappears) Compared with the current I 1 ′ flowing through the “first electrode” and the current I 2 ′ flowing through the “second electrode” at the time of formation (extinction), it can be significantly reduced.
 「3端子スイッチ」を銅配線中へ集積する際、下記の3つの条件を満たすことが望ましいことを、本発明者らは見出した。 The present inventors have found that it is desirable to satisfy the following three conditions when integrating the “3-terminal switch” in the copper wiring.
 第1に、「3端子スイッチ」を銅配線中へ集積し、スイッチのON/OFF動作を良好に制御するためには、イオン伝導層と「第1電極」の接触面積S1と、イオン伝導層と「第2電極」の接触面積S2をできるだけ小さくすることで、平均電流密度I1/S1と平均電流密度I2/S2を高くし、再現性良く、第1電極と第2電極の間に金属架橋を形成する必要がある。 First, in order to integrate the “3-terminal switch” in the copper wiring and to control the ON / OFF operation of the switch well, the contact area S 1 between the ion conductive layer and the “first electrode”, the ion conduction By reducing the contact area S 2 between the layer and the “second electrode” as much as possible, the average current density I 1 / S 1 and the average current density I 2 / S 2 are increased, and the first electrode and the second electrode are improved in reproducibility. It is necessary to form a metal bridge between the electrodes.
 第2に、「3端子スイッチ」を銅配線中へ集積する場合には、銅配線プロセスの工程数削減のため、「3端子スイッチ」を構成する、「第1電極」、「第2電極」、「第3電極」に関して、可能なかぎり、Cu配線およびCuプラグで代用する構成を採用することが望まれる。第3に、代用できない電極については、金属膜をエッチング加工して、電極を作製する際、エッチング加工の回数が少なく、かつ、エッチング加工が容易な構造を採用することが望ましい。 Second, in the case where the “3-terminal switch” is integrated in the copper wiring, the “first electrode” and “second electrode” constituting the “3-terminal switch” are formed to reduce the number of steps of the copper wiring process. As for the “third electrode”, it is desirable to adopt a configuration that substitutes Cu wiring and Cu plug as much as possible. Third, for an electrode that cannot be substituted, it is desirable to employ a structure in which the number of etching processes is small and the etching process is easy when an electrode is manufactured by etching a metal film.
 従来の「3端子スイッチ」の構造は、銅配線中に作製する際、上述する3つの条件を全て満足するものでなく、その結果、スイッチング電圧のバラツキ、あるいは、スイッチング素子の作製に伴う、銅配線プロセスの工程数の増加は、半導体装置全体の製造コストの増大を招いていた。 The structure of the conventional “3-terminal switch” does not satisfy all the above-mentioned three conditions when fabricated in a copper wiring. As a result, the variation in switching voltage or the copper associated with the fabrication of the switching element The increase in the number of wiring processes has led to an increase in the manufacturing cost of the entire semiconductor device.
 換言すると、「3端子スイッチ」を銅配線中へ集積を進める際、上述の3つの条件を満たす構成を採用する「3端子スイッチ」の提案が望まれる。 In other words, when a “3-terminal switch” is integrated into a copper wiring, a proposal of a “3-terminal switch” that employs a configuration that satisfies the above three conditions is desired.
 本発明は、上述する課題を解決するものである。本発明の目的は、既存の銅配線プロセスを利用して、多層配線層中に集積することが可能であり、安定に書き換え可能で、低コストで作製することができる、新規な構造の金属架橋型スイッチング素子、その作製方法。ならびに、多層配線層中に該金属架橋型スイッチング素子を設けている半導体装置を提供することにある。 The present invention solves the above-described problems. The object of the present invention is to use a conventional copper wiring process, and can be integrated in a multilayer wiring layer, can be stably rewritten, and can be produced at a low cost. Type switching element and its manufacturing method. Another object is to provide a semiconductor device in which the metal bridge type switching element is provided in a multilayer wiring layer.
 上記目的を達成するための本発明の金属架橋型スイッチング素子は、
多層配線を構成するCuプラグもしくはCu配線と電気的に接続した金属膜の側壁部である第1の電極と、
前記第1電極とは異なるCuプラグに電気的に接続した金属膜の側壁部である第2の電極と、
前記第1の電極と前記第2の電極の間に挟まれた絶縁膜と、
電界によってイオン化した金属が移動可能なイオン伝導層が、前記第1電極と前記第2電極の側面に接しており、
前記イオン伝導層に接し、金属イオンを前記イオン伝導層に供給する少なくとも一つの第3の電極を有し、該第3の電極が多層配線を形成するCu配線で構成されていることを特徴としている。
(作用)
 まず、従来の3端子スイッチと同じく、信号電極とスイッチング制御電極が分離されているため、スイッチング時に流れる電流は金属析出に必要な、nAオーダーのイオン電流のみであり、μAオーダー以上の電流が流れない。
In order to achieve the above object, the metal bridge type switching element of the present invention comprises:
A first electrode that is a side wall portion of a metal film electrically connected to a Cu plug or Cu wiring constituting a multilayer wiring;
A second electrode which is a side wall portion of a metal film electrically connected to a Cu plug different from the first electrode;
An insulating film sandwiched between the first electrode and the second electrode;
An ion conductive layer capable of moving a metal ionized by an electric field is in contact with side surfaces of the first electrode and the second electrode;
It has at least one third electrode that is in contact with the ion conductive layer and supplies metal ions to the ion conductive layer, and the third electrode is composed of a Cu wiring that forms a multilayer wiring. Yes.
(Function)
First, since the signal electrode and the switching control electrode are separated as in the conventional three-terminal switch, the current that flows during switching is only the ion current of nA order necessary for metal deposition, and the current of μA order or more flows. Absent.
 また、信号電極を構成する第1の電極と第2の電極は、金属膜の側壁であり、小面積であるため、電界が集中し易い。そのため、金属架橋の形成箇所は限定され、安定な3端子スイッチング動作が実現できる。この電界集中により、スイッチング動作時の動作電圧および動作電流のバラツキを低減できる。 Also, the first electrode and the second electrode constituting the signal electrode are side walls of the metal film and have a small area, so that the electric field tends to concentrate. Therefore, the place where the metal bridge is formed is limited, and a stable three-terminal switching operation can be realized. This electric field concentration can reduce variations in operating voltage and operating current during switching operation.
 さらに、本発明の3端子スイッチング素子は、第1電極と第2電極がCuプラグまたはCu配線に接続されているため、Cu配線中への集積化が容易である。 Furthermore, since the first electrode and the second electrode are connected to the Cu plug or the Cu wiring, the three-terminal switching element of the present invention can be easily integrated into the Cu wiring.
 加えて、本発明にかかる金属架橋型スイッチング素子は、下記の第一の実施形態の「2端子スイッチ」の構成、ならびに、第二の実施形態の「3端子スイッチ」~第四の実施形態の「3端子スイッチ」の構成を採用することができる。 In addition, the metal bridge-type switching element according to the present invention includes the configuration of the “two-terminal switch” in the following first embodiment and the “three-terminal switch” in the second embodiment to the fourth embodiment. A “three-terminal switch” configuration can be employed.
 本発明の第一の実施形態にかかる金属架橋型スイッチング素子は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
 該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線と電気的に接続されている、第2の金属膜の側壁部であり、
 前記金属架橋型スイッチング素子は、前記第1の金属膜と前記第2の金属膜との間に挟まれた絶縁膜を具え、
 前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2の金属膜の側壁部からなる第2電極は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接している
ことを特徴とするスイッチング素子である。
The metal bridge type switching element according to the first embodiment of the present invention is:
A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
The second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
The metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film,
The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a laminated structure, and are formed on side surfaces of the laminated structure. The switching element is characterized in that the ion conductive layer is in contact therewith.
 本発明の第二の実施形態にかかる金属架橋型スイッチング素子は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
 該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線と電気的に接続されている、第2の金属膜の側壁部であり、
 前記金属架橋型スイッチング素子は、前記第1の金属膜と前記第2の金属膜との間に挟まれた絶縁膜を具え、
 前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2の金属膜の側壁部からなる第2電極は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
 前記金属架橋型スイッチング素子は、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極を具えており、
 前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
 前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
 前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
ことを特徴とするスイッチング素子である。
The metal bridge type switching element according to the second embodiment of the present invention is:
A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
The second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
The metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film,
The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure. The ion conductive layer is in contact;
The metal bridge type switching element is
A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively. And a bias difference | V 3 −V 1 | between the third electrode and the first electrode with respect to a bias difference | V 2 −V 1 | between the second electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. By setting V 1 |, the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 本発明の第三の実施形態にかかる金属架橋型スイッチング素子は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
 該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
 前記金属架橋型スイッチング素子は、
 前記第1の金属膜と第2のCu配線との間に挟まれた絶縁膜を具え、
 前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
 前記金属架橋型スイッチング素子は、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
 前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
 前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
 前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
ことを特徴とするスイッチング素子である。
The metal bridge type switching element according to the third embodiment of the present invention is:
A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
The second electrode is a second Cu wiring constituting the multilayer wiring layer,
The metal bridge type switching element is
Comprising an insulating film sandwiched between the first metal film and the second Cu wiring;
The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second Cu wiring form a laminated structure, and the ion conductive layer is in contact with the side surface of the laminated structure. There;
The metal bridge type switching element is
A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively. And a bias difference | V 3 −V 1 | between the third electrode and the first electrode with respect to a bias difference | V 2 −V 1 | between the second electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. By setting V 1 |, the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 なお、本発明の第一の実施形態にかかる金属架橋型スイッチング素子、第二の実施形態にかかる金属架橋型スイッチング素子、第三の実施形態にかかる金属架橋型スイッチング素子では、
 少なくとも、前記イオン伝導層に接している、前記第1の金属膜の側壁部は、凸型の曲率を有していることが好ましい。
In the metal bridge type switching element according to the first embodiment of the present invention, the metal bridge type switching element according to the second embodiment, and the metal bridge type switching element according to the third embodiment,
It is preferable that at least the side wall portion of the first metal film in contact with the ion conductive layer has a convex curvature.
 本発明の第四の実施形態にかかる金属架橋型スイッチング素子は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
 該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCu配線と電気的に接続されている第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
 前記金属架橋型スイッチング素子は、
 前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの底面と第2のCu配線との間に挟まれた絶縁膜を具え、
 前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
 前記金属架橋型スイッチング素子は、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
 前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
 前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
 前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
ことを特徴とするスイッチング素子である。
The metal bridge type switching element according to the fourth embodiment of the present invention is:
A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a barrier metal that covers a bottom portion and a side wall surface of a first Cu plug electrically connected to a first Cu wiring constituting the multilayer wiring layer,
The second electrode is a second Cu wiring constituting the multilayer wiring layer,
The metal bridge type switching element is
An insulating film sandwiched between a bottom surface of a barrier metal covering the bottom and side wall surfaces of the first Cu plug and a second Cu wiring;
The first electrode composed of a barrier metal sidewall covering the bottom and sidewall surfaces of the first Cu plug, the sidewall of the insulating film, and the second Cu wiring form a stacked structure, and the stacked structure The ion conductive layer is in contact with a side surface;
The metal bridge type switching element is
A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively. And a bias difference | V 3 −V 1 | between the third electrode and the first electrode with respect to a bias difference | V 2 −V 1 | between the second electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. By setting V 1 |, the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 本発明にかかる金属架橋型スイッチング素子においては、
 前記イオン伝導層の上面が、前記金属イオンを遮断するイオンバリア層で覆われていることが望ましい。
In the metal bridge type switching element according to the present invention,
It is preferable that an upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions.
 また、本発明にかかる金属架橋型スイッチング素子、特に、上記の第一の実施形態の「2端子スイッチ」の構成、ならびに、第二の実施形態の「3端子スイッチ」~第四の実施形態の「3端子スイッチ」の構成を採用する半導体装置は、下記の構成とすることができる。 Further, the metal bridge type switching element according to the present invention, in particular, the configuration of the “two-terminal switch” of the first embodiment and the “three-terminal switch” to the fourth embodiment of the second embodiment. A semiconductor device adopting the “3-terminal switch” configuration can have the following configuration.
 本発明の第一の実施形態にかかる金属架橋型スイッチング素子を採用する半導体装置は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
 前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線と電気的に接続されている、第2の金属膜の側壁部であり、
 前記金属架橋型スイッチング素子は、前記第1の金属膜と前記第2の金属膜との間に挟まれた絶縁膜を具え、
 前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2の金属膜の側壁部からなる第2電極は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており、
 前記イオン伝導層の上面は、前記金属イオンを遮断するイオンバリア層で覆われている
ことを特徴とする半導体装置である。
A semiconductor device that employs a metal bridged switching element according to the first embodiment of the present invention,
A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
The second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
The metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film,
The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure. , The ion conductive layer is in contact,
An upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 本発明の第二の実施形態にかかる金属架橋型スイッチング素子を採用する半導体装置は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
 前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線と電気的に接続されている、第2の金属膜の側壁部であり、
 前記金属架橋型スイッチング素子は、前記第1の金属膜と前記第2の金属膜との間に挟まれた絶縁膜を具え、
 前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2の金属膜の側壁部からなる第2電極は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており、
 前記イオン伝導層の上面は、前記金属イオンを遮断するイオンバリア層で覆われており;
 前記金属架橋型スイッチング素子は、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極を具えており、
 前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
 前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
 前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
ことを特徴とする半導体装置である。
A semiconductor device that employs a metal-bridged switching element according to the second embodiment of the present invention,
A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
The second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
The metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film,
The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure. , The ion conductive layer is in contact,
An upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions;
The metal bridge type switching element is
A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3. And a bias difference | V 3 −V 1 | between the third electrode and the first electrode with respect to a bias difference | V 2 −V 1 | between the second electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. By setting V 1 |, the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 本発明の第三の実施形態にかかる金属架橋型スイッチング素子を採用する半導体装置は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
 前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCuプラグもしくはCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
 前記金属架橋型スイッチング素子は、
 前記第1の金属膜と第2のCu配線との間に挟まれた絶縁膜を具え、
 前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
 前記金属架橋型スイッチング素子は、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
 前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
 前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
 前記イオン伝導層の上面は、前記金属イオンを遮断するイオンバリア層で覆われており;
 前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
ことを特徴とする半導体装置である。
A semiconductor device that employs a metal-bridged switching element according to the third embodiment of the present invention,
A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a first metal film that is electrically connected to a first Cu plug or Cu wiring constituting the multilayer wiring layer,
The second electrode is a second Cu wiring constituting the multilayer wiring layer,
The metal bridge type switching element is
Comprising an insulating film sandwiched between the first metal film and the second Cu wiring;
The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second Cu wiring form a laminated structure, and the ion conductive layer is in contact with the side surface of the laminated structure. There;
The metal bridge type switching element is
A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
An upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions;
In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3. And a bias difference | V 3 −V 1 | between the third electrode and the first electrode with respect to a bias difference | V 2 −V 1 | between the second electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. By setting V 1 |, the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 本発明の第四の実施形態にかかる金属架橋型スイッチング素子を採用する半導体装置は、
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
 前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
 前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
 前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
 前記第1電極は、前記多層配線層を構成する第1のCu配線と電気的に接続されている第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部であり、
 前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
 前記金属架橋型スイッチング素子は、
 前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの底面と第2のCu配線との間に挟まれた絶縁膜を具え、
 前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
 前記金属架橋型スイッチング素子は、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
 前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
 前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
 前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
ことを特徴とする半導体装置である。
A semiconductor device that employs a metal-bridged switching element according to the fourth embodiment of the present invention,
A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
The ion conductive layer is in contact with the first electrode and the second electrode,
In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
The first electrode is a side wall portion of a barrier metal that covers a bottom portion and a side wall surface of a first Cu plug electrically connected to a first Cu wiring constituting the multilayer wiring layer,
The second electrode is a second Cu wiring constituting the multilayer wiring layer,
The metal bridge type switching element is
An insulating film sandwiched between a bottom surface of a barrier metal covering the bottom and side wall surfaces of the first Cu plug and a second Cu wiring;
The first electrode composed of a barrier metal sidewall covering the bottom and sidewall surfaces of the first Cu plug, the sidewall of the insulating film, and the second Cu wiring form a stacked structure, and the stacked structure The ion conductive layer is in contact with a side surface;
The metal bridge type switching element is
A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3. And a bias difference | V 3 −V 1 | between the third electrode and the first electrode with respect to a bias difference | V 2 −V 1 | between the second electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. By setting V 1 |, the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode.
 例えば、前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極の電位V1と第2電極の電位V2を等電位にバイアスし、前記第3電極の電位V3を異なる電位にバイアスし、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を設けることにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される。 For example, in the switching operation between the ON state and the OFF state in the metal bridge type switching element, the potential V 1 of the first electrode and the potential V 2 of the second electrode are biased to the same potential, and the third electrode The potential V 3 is biased to a different potential, the bias difference | V 3 −V 1 | between the third electrode and the first electrode, and the bias difference | V 3 − between the third electrode and the second electrode. By providing V 2 |, a switching voltage is applied between the first electrode, the second electrode, and the third electrode.
 本発明に係る金属架橋型スイッチング素子の構造を採用することによって、LSIの多層配線層中へ該金属架橋型不揮発性スイッチ素子を容易に集積化できる。同時に、本発明に係る金属架橋型スイッチング素子は、金属架橋の形成・消滅による、スイッチのON/OFF動作に要する電流は、微小電流である。その結果、消費電力を大幅に抑えた、金属架橋型不揮発性スイッチング素子を使用して構成される、プログラマブルロジックが容易に実現できる。さらに、スイッチのON/OFF動作に要する電流は、微小電流であるため、該金属架橋型スイッチング素子のON/OFF動作用駆動回路に搭載するトランジスタのサイズを小さくでき、駆動回路を省面積化できる。 By adopting the structure of the metal bridge type switching element according to the present invention, the metal bridge type nonvolatile switch element can be easily integrated in the multilayer wiring layer of the LSI. At the same time, in the metal bridge type switching element according to the present invention, the current required for the ON / OFF operation of the switch due to the formation / extinction of the metal bridge is a minute current. As a result, it is possible to easily realize a programmable logic configured using a metal bridged nonvolatile switching element that significantly reduces power consumption. Further, since the current required for the ON / OFF operation of the switch is a minute current, the size of the transistor mounted on the ON / OFF operation drive circuit of the metal bridge type switching element can be reduced, and the drive circuit can be reduced in area. .
 また、本発明に係る金属架橋型スイッチング素子においては、「3端子スイッチ」を構成する、信号電極(第1電極と第2電極)とスイッチング制御電極(第1電極3)が、ON/OFF動作の過程で、金属架橋で接続される事態が発生しないため、ON/OFF動作の信頼性に優れた不揮発性スイッチング素子が実現できる。
In the metal bridge type switching device according to the present invention, the signal electrode (first electrode and second electrode) and the switching control electrode (first electrode 3) constituting the “three-terminal switch” are turned on / off. In this process, since a situation where the metal bridge is connected does not occur, a nonvolatile switching element excellent in ON / OFF operation reliability can be realized.
図1は、本発明の第一の実施形態にかかる2端子スイッチング素子の構成の一例を模式的に示す図である。FIG. 1 is a diagram schematically illustrating an example of the configuration of the two-terminal switching element according to the first embodiment of the present invention. 図2は、本発明の第一の実施形態にかかる、第一の実施態様の2端子スイッチング素子の構成を模式的に示す断面図である。FIG. 2 is a cross-sectional view schematically showing the configuration of the two-terminal switching element of the first embodiment according to the first embodiment of the present invention. 図3-1は、本発明の第一の実施形態にかかる、第一の実施態様の2端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程1~工程3を示す図である。FIG. 3-1 is a cross-sectional view schematically showing an example of the manufacturing process of the two-terminal switching element of the first embodiment according to the first embodiment of the present invention. In the manufacturing process, FIG. FIG. 5 is a diagram showing a step 3; 図3-2は、本発明の第一の実施形態にかかる、第一の実施態様の2端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程4~工程8を示す図である。FIG. 3-2 is a cross-sectional view schematically showing an example of the manufacturing process of the two-terminal switching element of the first embodiment according to the first embodiment of the present invention. FIG. 図4は、本発明の第二の実施形態にかかる3端子スイッチング素子の構成の一例を模式的に示す図である。FIG. 4 is a diagram schematically illustrating an example of the configuration of the three-terminal switching element according to the second embodiment of the present invention. 図5は、本発明の第二の実施形態にかかる、第一の実施態様の3端子スイッチング素子の構成を模式的に示す断面図である。FIG. 5: is sectional drawing which shows typically the structure of the 3 terminal switching element of 1st embodiment concerning 2nd embodiment of this invention. 図6-1は、本発明の第二の実施形態にかかる、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程1~工程5を示す図である。FIG. 6A is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the second embodiment of the present invention. In the manufacturing process, FIG. FIG. 10 is a diagram showing a step 5; 図6-2は、本発明の第二の実施形態にかかる、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程6~工程10を示す図である。FIG. 6-2 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the second embodiment of the present invention. In the manufacturing process, FIG. FIG. 図7は、本発明の第二の実施形態にかかる、第二の実施態様の3端子スイッチング素子の構成を模式的に示す断面図である。FIG. 7: is sectional drawing which shows typically the structure of the 3 terminal switching element of 2nd embodiment concerning 2nd embodiment of this invention. 図8-1は、本発明の第二の実施形態にかかる、第二の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程1~工程3を示す図である。FIG. 8-1 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the second embodiment according to the second embodiment of the present invention. In the manufacturing process, FIG. FIG. 5 is a diagram showing a step 3; 図8-2は、本発明の第二の実施形態にかかる、第二の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程4~工程8を示す図である。FIG. 8-2 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the second embodiment according to the second embodiment of the present invention. FIG. 図9は、本発明の第三の実施形態にかかる3端子スイッチング素子の構成の一例を模式的に示す図である。FIG. 9 is a diagram schematically illustrating an example of the configuration of the three-terminal switching element according to the third embodiment of the present invention. 図10は、本発明の第三の実施形態にかかる、第一の実施態様の3端子スイッチング素子の構成を模式的に示す断面図である。FIG. 10: is sectional drawing which shows typically the structure of the 3 terminal switching element of 1st embodiment concerning 3rd embodiment of this invention. 図11-1は、本発明の第三の実施形態にかかる、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程1~工程5を示す図である。FIG. 11-1 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the third embodiment of the present invention. FIG. 10 is a diagram showing a step 5; 図11-2は、本発明の第三の実施形態にかかる、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程中、工程6~工程8を示す図である。FIG. 11-2 is a cross-sectional view schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment according to the third embodiment of the present invention. FIG. 図12は、本発明の第四の実施形態にかかる3端子スイッチング素子の構成の一例を模式的に示す図である。FIG. 12 is a diagram schematically illustrating an example of a configuration of a three-terminal switching element according to the fourth embodiment of the present invention. 図13は、本発明の第四の実施形態にかかる、第一の実施態様の3端子スイッチング素子の構成を模式的に示す断面図である。FIG. 13: is sectional drawing which shows typically the structure of the 3 terminal switching element of the 1st embodiment concerning 4th embodiment of this invention. 図14は、本発明の第四の実施形態にかかる、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図であり、該製造工程を構成する工程1~工程6を示す図である。FIG. 14 is a cross-sectional view schematically showing an example of a manufacturing process of the three-terminal switching element according to the first embodiment, according to the fourth embodiment of the present invention. FIG. 図15は、「2端子スイッチ」の構成を採用する、金属架橋型スイッチング素子におけるスイッチング過程を説明する図であり、上段は、「OFF」状態から「ON」状態への遷移過程(セット過程)を、下段は、「ON」状態から「OFF」状態への遷移過程(リセット過程)を、それぞれ説明する図である。FIG. 15 is a diagram for explaining a switching process in the metal bridge type switching element adopting the configuration of “two-terminal switch”, and the upper stage is a transition process (set process) from the “OFF” state to the “ON” state. The lower part is a diagram for explaining the transition process (reset process) from the “ON” state to the “OFF” state. 図16は、従来の「3端子スイッチ」の構成を採用する、金属架橋型スイッチング素子における、信号伝達に利用する、第1電極と第2電極と、スイッチング動作のコントーロールに利用する第3電極の配置の一例を模式的に示す図である。FIG. 16 shows the first electrode and the second electrode used for signal transmission and the third electrode used for control of the switching operation in the metal bridge type switching element adopting the configuration of the conventional “3-terminal switch”. It is a figure which shows an example of arrangement | positioning typically.
 なお、図1~図14中に付される符号は、それぞれ、下記を意味する。 Note that the reference numerals in FIGS. 1 to 14 mean the following.
 0104、0204、0304、0404、0504、0604、0704、0804、0904、1004、1104、1204、1304、1404  イオン伝導層
 0101、0201、0301、0401、0501、0601、0701、0901、1001、1101、1201、1301、1401  第1電極
 0102、0202、0302、0402、0502、0602、0702、1002、1102、1302、1402  第2電極
 0105、0405、0905、1009  金属架橋
 0107、0207、0307  第1配線
 0212、0312、0512、0612、0712、0802、0812、1012、1112、1312、1412  第2配線
 0108、0208、0308、0408、0508、0608、0708、0808、0907、1008、1108  第1金属膜
 0109、0209、0309、0409、0509、0609、0709、0809  第2金属膜
 0203、0205、0214、0217、0305、0303、0314、0317、0503、0505、0514、0517、0603、0605、0614、0617、0703、0705、0714、0717、0723、0805、0803、0814、0817、0823、1005、1014、1015、1016、1017、1105、1114、1117、1305、1314、1317、1405、1414、1417  バリア絶縁膜
 0106、0206、0306、0406、0506、0606、0706、0806、0906、1006、1106、1206、1306、1406  プラグ
 0210、0310  第1バリアメタル
 0211、0311、0511、0611、0711、0811、1011、1111、1311、1411  第2バリアメタル
 0103、0213、0215、0216、0315、0316、0403、0513、0515、0516、0613、0615、0616、0713、0715、0716、0813、0815、0816、0903、1013、1113、1115、1116、1203、1313、1315、1316、1413、1415、1416  層間絶縁膜
 0218、0321、0322、0318、0518、0618、0625、0626、0627、0718、0818、0825、0826、0827、1018、1109、1118、0923、1420  ハードマスク
 0219、0319、0519、0619、0719、0819、1019、1119、1319、1419  半導体基板
 0220、0320  2端子スイッチ
 0520、0620、0720、0820、1020、1120、1318、1418  3端子スイッチ
 0221、0524、0724、1205、1309  金属架橋
 0407、0507、0607、0707、0807、0902、1007、1107、1202、1307、1407  第1配線A
 0410、0522、0622、0722、0822、0908、0922、1207、1303、1403  第1配線B
 0510、0610、0710、0810、1010、1110、1310、1410  第1バリアメタルA
 0521、0621、0721、0821、1021、0921、1308、1408  第1バリアメタルB
 0523、0623、1003、1103  保護絶縁膜
0104, 0204, 0304, 0404, 0504, 0604, 0704, 0804, 0904, 1004, 1104, 1204, 1304, 1404 Ion conductive layers 0101, 0201, 0301, 0401, 0501, 0601, 0701, 0901, 1001, 1101, 1201, 1301, 1401 First electrode 0102, 0202, 0302, 0402, 0502, 0602, 0702, 1002, 1102, 1302, 1402 Second electrode 0105, 0405, 0905, 1009 Metal bridge 0107, 0207, 0307 First wiring 0212 , 0312, 0512, 0612, 0712, 0802, 0812, 1012, 1112, 1312, 1412 Second wiring 0108, 0208, 0308, 0408, 0508, 06 8, 0708, 0808, 0907, 1008, 1108 1st metal film 0109, 0209, 0309, 0409, 0509, 0609, 0709, 0809 2nd metal film 0203, 0205, 0214, 0217, 0305, 0303, 0314, 0317, 0503, 0505, 0514, 0517, 0603, 0605, 0614, 0617, 0703, 0705, 0714, 0717, 0723, 0805, 0803, 0814, 0817, 0823, 1005, 1014, 1015, 1016, 1017, 1105, 1114, 1117, 1305, 1314, 1317, 1405, 1414, 1417 Barrier insulating film 0106, 0206, 0306, 0406, 0506, 0606, 0706, 0806, 0906, 1006 1106, 1206, 1306, 1406 Plugs 0210, 0310 First barrier metal 0211, 0311, 0511, 0611, 0711, 0811, 1011, 1111, 1311, 1411 Second barrier metal 0103, 0213, 0215, 0216, 0315, 0316, 0403, 0513, 0515, 0516, 0613, 0615, 0616, 0713, 0715, 0716, 0813, 0815, 0816, 0903, 1013, 1113, 1115, 1116, 1203, 1313, 1315, 1316, 1413, 1415, 1416 Insulating film 0218, 0321, 0322, 0318, 0518, 0618, 0625, 0626, 0627, 0718, 0818, 0825, 0826, 0827, 1018 1109, 1118, 0923, 1420 Hard mask 0219, 0319, 0519, 0619, 0719, 0819, 1019, 1119, 1319, 1419 Semiconductor substrate 0220, 0320 2 terminal switch 0520, 0620, 0720, 0820, 1020, 1120, 1318 , 1418 Three-terminal switch 0221, 0524, 0724, 1205, 1309 Metal bridge 0407, 0507, 0607, 0707, 0807, 0902, 1007, 1107, 1202, 1307, 1407 First wiring A
0410, 0522, 0622, 0722, 0822, 0908, 0922, 1207, 1303, 1403 1st wiring B
0510, 0610, 0710, 0810, 1010, 1110, 1310, 1410 First barrier metal A
0521, 0621, 0721, 0821, 1021, 0921, 1308, 1408 First barrier metal B
0523, 0623, 1003, 1103 Protective insulating film
 以下に、本発明をより詳しく説明する。 Hereinafter, the present invention will be described in more detail.
 本発明に係る金属架橋型スイッチング素子では、例えば、以下に説明する、第一の実施形態の「2端子スイッチ」の構成、ならびに、第二の実施形態の「3端子スイッチ」~第四の実施形態の「3端子スイッチ」の構成を採用することができる。第一の実施形態の「2端子スイッチ」の構成、ならびに、第二の実施形態の「3端子スイッチ」~第四の実施形態の「3端子スイッチ」の構成に関して、それぞれ、その特徴を以下に説明する。 In the metal bridge type switching element according to the present invention, for example, the configuration of the “2-terminal switch” of the first embodiment and the “3-terminal switch” to the fourth embodiment of the second embodiment described below are explained. The configuration of the “3-terminal switch” can be employed. The features of the “two-terminal switch” of the first embodiment and the “three-terminal switch” of the second embodiment to the “three-terminal switch” of the fourth embodiment are as follows. explain.
 (第一の実施形態)
 本発明に係る金属架橋型スイッチング素子における、第一の実施形態は、下に説明する「2端子スイッチ」の構成を採用する、金属架橋型スイッチング素子である。
(First embodiment)
The first embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “two-terminal switch” described below.
 本発明の第一の実施形態にかかる金属架橋型スイッチング素子で採用される、「2端子スイッチ」の構成を説明する。図1は、第一の実施形態の「2端子スイッチ」の構成の一例を模式的に示す断面図である。 The configuration of the “two-terminal switch” employed in the metal bridge type switching element according to the first embodiment of the present invention will be described. FIG. 1 is a cross-sectional view schematically showing an example of the configuration of the “two-terminal switch” of the first embodiment.
 図1に示すように、第一の実施形態の「2端子スイッチ」は、プラグ0106に電気的に接続している第1金属膜0108と、第1配線0107に電気的に接続している第2金属膜0109と、第1金属膜0108と第2金属膜0109により挟まれ、両者を電気的に分離している、層間絶縁膜0103を具えている。 As shown in FIG. 1, the “two-terminal switch” of the first embodiment includes a first metal film 0108 electrically connected to the plug 0106 and a first metal film 0107 electrically connected to the first wiring 0107. A two-metal film 0109 and an interlayer insulating film 0103 sandwiched between the first metal film 0108 and the second metal film 0109 and electrically separating them are provided.
 第1金属膜0108、層間絶縁膜0103、第2金属膜0109からなる三層構造は、同じ平面形状にパターニングされており、該パターニングされた三層構造の側面には、第1金属膜0108の側壁面、層間絶縁膜0103の側壁面、第2金属膜0109の側壁面が露呈している。 The three-layer structure including the first metal film 0108, the interlayer insulating film 0103, and the second metal film 0109 is patterned in the same planar shape, and on the side surface of the patterned three-layer structure, the first metal film 0108 The side wall surface, the side wall surface of the interlayer insulating film 0103, and the side wall surface of the second metal film 0109 are exposed.
 イオン伝導層0104は、該パターニングされた三層構造の側面の一部とのみ接触するように設けられている。第1金属膜0108の側壁面のうち、イオン伝導層0104と接触する部分が、第1電極0101として機能し、第2金属膜0109の側壁面のうち、イオン伝導層0104と接触する部分が、第2電極0102として機能する。また、イオン伝導層0104は、金属イオンが伝導するための媒体となる。従って、第1電極0101、イオン伝導層0104、第2電極0102を用いて、第一の実施形態の「2端子スイッチ」が構成されている。 The ion conductive layer 0104 is provided so as to contact only a part of the side surface of the patterned three-layer structure. Of the side wall surface of the first metal film 0108, the portion in contact with the ion conductive layer 0104 functions as the first electrode 0101. Of the side wall surface of the second metal film 0109, the portion in contact with the ion conductive layer 0104 is It functions as the second electrode 0102. The ion conductive layer 0104 serves as a medium for conducting metal ions. Therefore, the “two-terminal switch” of the first embodiment is configured by using the first electrode 0101, the ion conductive layer 0104, and the second electrode 0102.
 第2金属膜0109は、イオン伝導層0104に金属イオンを供給可能な金属で構成されている。前記金属イオンを供給可能な金属として、銅(Cu)を採用することが望ましい。 The second metal film 0109 is made of a metal that can supply metal ions to the ion conductive layer 0104. It is desirable to employ copper (Cu) as the metal capable of supplying the metal ions.
 第2金属膜0109の上面には、層間絶縁膜0103が形成されている。層間絶縁膜0103は、気相堆積が可能な絶縁材料であり、かつ、イオン伝導性を示さない絶縁材料、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いて、形成することができる。 On the upper surface of the second metal film 0109, an interlayer insulating film 0103 is formed. The interlayer insulating film 0103 is an insulating material that can be vapor-deposited and formed using an insulating material that does not exhibit ion conductivity, such as a SiC film, a SiCN film, a SiN film, and a stacked structure thereof. can do.
 第1金属膜0108を構成する導電性材料には、タンタル(Ta)、チタン(Ti)、タングステン(W)、ルテニウム(Ru)、プラチナ(Pt)、ニッケル(Ni)、窒化タンタル(TaN)、窒化チタン(TiN)が適しており、これらの積層を採用しても良い。特に、Ruが好ましい。これらの導電性材料で構成される第1金属膜0108は。スパッタ法、レーザーアブレーション法、プラズマCVD法を用いて、層間絶縁膜0103の上面に形成する。 The conductive material constituting the first metal film 0108 includes tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN), Titanium nitride (TiN) is suitable, and a laminate of these may be employed. In particular, Ru is preferable. The first metal film 0108 made of these conductive materials. A top surface of the interlayer insulating film 0103 is formed by a sputtering method, a laser ablation method, or a plasma CVD method.
 第一の実施形態の「2端子スイッチ」が、OFF状態からON状態に遷移する際、例えば、第1電極0101を接地し、第2電極0102に正電圧を印加すると、第2電極0102とイオン伝導層0104の界面では、第2電極0102からイオン伝導層0104へと金属イオン(例えば、銅イオン)が供給され、一方、第1電極0101とイオン伝導層0104の界面では、第1電極0101の側壁面に金属(例えば、銅)が析出する。該金属析出に起因する、金属架橋0105の形成は、第1電極0101の側壁面の下端から開始し、層間絶縁膜0103の側壁面に沿って、第2電極0102の側壁面の上端に向かって進行する。 When the “two-terminal switch” of the first embodiment transitions from the OFF state to the ON state, for example, when the first electrode 0101 is grounded and a positive voltage is applied to the second electrode 0102, the second electrode 0102 and the ion At the interface of the conductive layer 0104, metal ions (for example, copper ions) are supplied from the second electrode 0102 to the ion conductive layer 0104. On the other hand, at the interface between the first electrode 0101 and the ion conductive layer 0104, the first electrode 0101 is connected. Metal (for example, copper) precipitates on the side wall surface. The formation of the metal bridge 0105 due to the metal deposition starts from the lower end of the side wall surface of the first electrode 0101 and proceeds along the side wall surface of the interlayer insulating film 0103 toward the upper end of the side wall surface of the second electrode 0102. proceed.
 第一の実施形態の「2端子スイッチ」において、OFF状態からON状態への遷移が完了すると、金属架橋0105が、第1電極0101の下端と第2電極0102の上端を繋ぐように形成される。 In the “two-terminal switch” of the first embodiment, when the transition from the OFF state to the ON state is completed, the metal bridge 0105 is formed so as to connect the lower end of the first electrode 0101 and the upper end of the second electrode 0102. .
 図1に示す第一の実施形態の「2端子スイッチ」の構成では、パターニングされた三層構造の平面形状は、円形であり、従って、第1金属膜0108および第2金属膜0109の平面形状は円形である。そのため、第1金属膜0108の側壁面からなる第1電極101及び第2金属膜0109の側壁面からなる第2電極0102も、同じ曲率を有する。 In the configuration of the “two-terminal switch” of the first embodiment shown in FIG. 1, the planar shape of the patterned three-layer structure is a circle, and accordingly, the planar shapes of the first metal film 0108 and the second metal film 0109 Is round. Therefore, the first electrode 101 made of the side wall surface of the first metal film 0108 and the second electrode 0102 made of the side wall surface of the second metal film 0109 also have the same curvature.
 イオン伝導層0104は、曲率を有する三層構造の側面に形成するため、スパッタ法、レーザーアブレーション法、プラズマCVD法を用いて形成する。イオン伝導層0104の材料としては、金属イオンの伝導度の大きく、かつ、LSI生産ラインにおいて、気相エッチング加工可能な材料を選択する必要がある。 The ion conductive layer 0104 is formed by using a sputtering method, a laser ablation method, or a plasma CVD method in order to form the side surface of the three-layer structure having a curvature. As a material of the ion conductive layer 0104, it is necessary to select a material having a high conductivity of metal ions and capable of vapor phase etching processing in an LSI production line.
 イオン伝導層0104の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する三層構造の側面に、GeSbTeからなるイオン伝導層0104を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One of the candidate materials that can be used to fabricate the ion conductive layer 0104 is chalcogenide GeSbTe, which is used as a material for the phase change layer in the phase change element. As a means for forming the ion conductive layer 0104 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of forming a film by sputtering using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層0104の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 0104 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber in a separate line.
 (スイッチング動作)
 図1に示す第一の実施形態の「2端子スイッチ」における、ON/OFF動作(スイッチング)時の駆動方法を説明する。
(Switching operation)
A driving method during ON / OFF operation (switching) in the “two-terminal switch” of the first embodiment shown in FIG. 1 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 OFF状態からON状態への遷移時には、例えば、第2電極0102を接地して、第1電極0101に負電圧(-VON<0V)を印加する。第2電極0102とイオン伝導層0104の界面では、印加される負電圧に起因する電界によって、金属がイオン化(酸化)され、生成する金属イオンがイオン伝導層0104中に供給される。供給される金属イオンは、イオン伝導層0104中の電界によって、第1電極0101側にマイグレーションする。マイグレーションした金属イオンは、第1電極0101からイオン伝導層0104中に注入される電子を受け取り、金属へと還元される。この電気化学反応によって、第1電極0101の表面(側壁面)の下端から、金属の析出が開始し、第1電極0101と第2電極0102の間の電気力線に従って、金属架橋0105の形成が進行する。第1電極0101側から形成される金属架橋0105が、第2電極0102の表面(側壁面)に達すると、第1電極0101と第2電極0102の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
At the time of transition from the OFF state to the ON state, for example, the second electrode 0102 is grounded and a negative voltage (−V ON <0 V) is applied to the first electrode 0101. At the interface between the second electrode 0102 and the ion conductive layer 0104, the metal is ionized (oxidized) by an electric field caused by the applied negative voltage, and the generated metal ions are supplied into the ion conductive layer 0104. The supplied metal ions migrate to the first electrode 0101 side by an electric field in the ion conductive layer 0104. The migrated metal ions receive electrons injected from the first electrode 0101 into the ion conductive layer 0104 and are reduced to metal. By this electrochemical reaction, metal deposition starts from the lower end of the surface (side wall surface) of the first electrode 0101, and the formation of the metal bridge 0105 according to the lines of electric force between the first electrode 0101 and the second electrode 0102. proceed. When the metal bridge 0105 formed from the first electrode 0101 side reaches the surface (side wall surface) of the second electrode 0102, the resistance value between the first electrode 0101 and the second electrode 0102 becomes low resistance, and the ON state Become.
 OFF状態からON状態への遷移時のバイアスは、第1電極0101を接地して、第2電極0102に正電圧(+VON>0V)を印加する形態でも良い。 The bias at the time of transition from the OFF state to the ON state may be such that the first electrode 0101 is grounded and a positive voltage (+ V ON > 0 V) is applied to the second electrode 0102.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、ON状態からOFF状態への遷移時には、例えば、第2電極0102を接地して、第1電極0101に正電圧(+VOFF>0V)を印加する。まず、第2電極0102側において、金属架橋0105を構成する金属のイオン化(酸化)と、イオン伝導層0104中への金属イオンの溶出が進行する(溶解反応)。イオン伝導層0104中に溶出した金属イオンは、イオン伝導層0104中に形成されている電界によって、第2電極0102の表面(側壁面)に向かってマイグレーションする。第2電極0102の表面(側壁面)から、イオン伝導層0104中へ注入される電子によって、金属イオンは還元される。生成する金属は、第2電極0102の表面(側壁面)に再析出する。金属架橋0105の溶解が進行し、第2電極0102の表面(側壁面)と金属架橋0105との電気的接続が途絶えると、第1電極0101と第2電極0102の間の抵抗値が高抵抗となり、OFF状態となる。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, at the time of transition from the ON state to the OFF state, for example, the second electrode 0102 is grounded and a positive voltage (+ V OFF > 0 V) is applied to the first electrode 0101. First, on the second electrode 0102 side, ionization (oxidation) of the metal constituting the metal bridge 0105 and elution of metal ions into the ion conductive layer 0104 proceed (dissolution reaction). The metal ions eluted in the ion conductive layer 0104 migrate toward the surface (side wall surface) of the second electrode 0102 by an electric field formed in the ion conductive layer 0104. Metal ions are reduced by electrons injected into the ion conductive layer 0104 from the surface (side wall surface) of the second electrode 0102. The generated metal is re-deposited on the surface (side wall surface) of the second electrode 0102. When the dissolution of the metal bridge 0105 proceeds and the electrical connection between the surface (side wall surface) of the second electrode 0102 and the metal bridge 0105 is interrupted, the resistance value between the first electrode 0101 and the second electrode 0102 becomes high resistance. It will be in an OFF state.
 ON状態からOFF状態への遷移時のバイアスは、第1電極0101を接地して、第2電極0102に負電圧(-VOFF<0V)を印加する形態でも良い。 The bias at the time of transition from the ON state to the OFF state may be such that the first electrode 0101 is grounded and a negative voltage (−V OFF <0 V) is applied to the second electrode 0102.
 図1に示す第一の実施形態の「2端子スイッチ」を構成する、第1電極0101と第2電極0102が曲率を有することで、ON/OFF動作(スイッチング)時、第1電極0101と第2電極0102の間に印加されるスイッチング電圧によりイオン伝導層中に形成される電界は、この曲率部分に集中し、安定かつバラツキが小さいスイッチング動作が得られる。 Since the first electrode 0101 and the second electrode 0102 constituting the “two-terminal switch” of the first embodiment shown in FIG. 1 have curvature, the first electrode 0101 and the second electrode 0101 are switched during the ON / OFF operation (switching). The electric field formed in the ion conductive layer by the switching voltage applied between the two electrodes 0102 is concentrated on this curvature portion, and a stable and small switching operation can be obtained.
 (第一の実施態様)
 本発明の第一の実施形態にかかる、第一の実施態様の2端子スイッチング素子について説明する。
(First embodiment)
The two-terminal switching element of the first embodiment according to the first embodiment of the present invention will be described.
 該第一の実施態様の2端子スイッチング素子は、半導体装置に設ける多層配線層内部に形成されている。図2に、半導体装置に設ける多層配線層内部に形成されている、該第一の実施態様の2端子スイッチング素子の構造を示す。 The two-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device. FIG. 2 shows the structure of the two-terminal switching element of the first embodiment formed inside a multilayer wiring layer provided in the semiconductor device.
 図2に示す半導体装置に設ける多層配線層は、第1金属膜0208と電気的に接続されているプラグ0206、該プラグ0206と一体に作製されている第2配線0212、ならびに、第2金属膜0209に接続された第1配線0207を備えている。第1金属膜0208と第2金属膜0209との間にバリア絶縁膜0203が挟まれており、第1金属膜0208、バリア絶縁膜0203、第2金属膜0209からなる三層構造は、ハードマスク0218をエッチングマスクとして利用し、エッチング加工を施すことで、同一の平面形状にパターニングされている。パターニングされた三層構造の側面には、第1金属膜0208の側壁部、バリア絶縁膜0203の側壁部、第2金属膜0209の側壁部が露呈している。 The multilayer wiring layer provided in the semiconductor device shown in FIG. 2 includes a plug 0206 electrically connected to the first metal film 0208, a second wiring 0212 manufactured integrally with the plug 0206, and a second metal film. A first wiring 0207 connected to 0209 is provided. A barrier insulating film 0203 is sandwiched between the first metal film 0208 and the second metal film 0209, and the three-layer structure including the first metal film 0208, the barrier insulating film 0203, and the second metal film 0209 is a hard mask. By using 0218 as an etching mask and performing etching, it is patterned in the same planar shape. On the side surface of the patterned three-layer structure, the side wall portion of the first metal film 0208, the side wall portion of the barrier insulating film 0203, and the side wall portion of the second metal film 0209 are exposed.
 パターニングされた三層構造の側面の一部は、イオン伝導層0204に接触しており、イオン伝導層0204と接触している第1金属膜0208の側壁部が、第1電極0201として使用され、イオン伝導層0204と接触している第2金属膜0209の側壁部が、第2電極0202として使用されている。 A part of the side surface of the patterned three-layer structure is in contact with the ion conductive layer 0204, and the side wall portion of the first metal film 0208 in contact with the ion conductive layer 0204 is used as the first electrode 0201, A side wall portion of the second metal film 0209 that is in contact with the ion conductive layer 0204 is used as the second electrode 0202.
 2端子スイッチ0220は、第1電極0201、第2電極0202と、その側壁部と接触しているイオン伝導層0204により構成される。 The two-terminal switch 0220 includes a first electrode 0201, a second electrode 0202, and an ion conductive layer 0204 that is in contact with the side wall portion.
 イオン伝導層0204と層間絶縁膜0215の間には、バリア絶縁膜0214が設けられており、該バリア絶縁膜0214を利用して、イオン伝導層0204から層間絶縁膜0215への金属イオンの拡散を防止している。また、イオン伝導層0204と層間絶縁膜0213の間には、バリア絶縁膜0205が設けられており、該バリア絶縁膜0205を利用して、イオン伝導層0204から層間絶縁膜0213への金属イオンの拡散を防止している。 A barrier insulating film 0214 is provided between the ion conductive layer 0204 and the interlayer insulating film 0215, and diffusion of metal ions from the ion conductive layer 0204 to the interlayer insulating film 0215 is performed using the barrier insulating film 0214. It is preventing. In addition, a barrier insulating film 0205 is provided between the ion conductive layer 0204 and the interlayer insulating film 0213, and metal ions from the ion conductive layer 0204 to the interlayer insulating film 0213 are formed using the barrier insulating film 0205. Prevents diffusion.
 また、バリア絶縁膜0205は、層間絶縁膜0213の上面と、第1配線0207の上面を被覆しており、第1配線0207の上面部に開口部が形成され、この開口部を介して、第2金属膜0209と第1配線0207の上面部との電気的接続がなされている。従って、バリア絶縁膜0205は、第2金属膜0209と層間絶縁膜0213の上面との接触を防止し、第2金属膜0209を構成する金属の層間絶縁膜0213中への拡散を防止している。 The barrier insulating film 0205 covers the upper surface of the interlayer insulating film 0213 and the upper surface of the first wiring 0207, and an opening is formed in the upper surface of the first wiring 0207. The two metal film 0209 and the upper surface portion of the first wiring 0207 are electrically connected. Accordingly, the barrier insulating film 0205 prevents contact between the second metal film 0209 and the upper surface of the interlayer insulating film 0213, and prevents diffusion of the metal constituting the second metal film 0209 into the interlayer insulating film 0213. .
 三層構造のエッチング加工に利用されたハードマスク0218は、第1金属膜0208の上面とイオン伝導層0204の接触を防止する役割を果たしている。ハードマスク0218に設ける開口を介して、プラグ0206と第1金属膜0208の上面部との電気的接続がなされている。 The hard mask 0218 used for the etching process of the three-layer structure plays a role of preventing contact between the upper surface of the first metal film 0208 and the ion conductive layer 0204. The plug 0206 and the upper surface portion of the first metal film 0208 are electrically connected through an opening provided in the hard mask 0218.
 2端子スイッチ0220の作製に利用される領域の外側では、半導体基板0219上に、層間絶縁膜0213、バリア絶縁膜0205、イオン伝導層0204、バリア絶縁膜0214、層間絶縁膜0215、層間絶縁膜0216、及びバリア絶縁膜0217が、この順に積層された、積層構造が形成されている。 Outside the region used for manufacturing the two-terminal switch 0220, the interlayer insulating film 0213, the barrier insulating film 0205, the ion conductive layer 0204, the barrier insulating film 0214, the interlayer insulating film 0215, and the interlayer insulating film 0216 are formed over the semiconductor substrate 0219. , And the barrier insulating film 0217 are stacked in this order to form a stacked structure.
 半導体基板0219上に形成されている、層間絶縁膜0213に設ける配線溝中に、第1バリアメタル0210を介して、第1配線0207は埋め込まれている。第1配線0207の底面と側壁面を被覆している、第1バリアメタル0210は、第1配線0207を構成する金属の層間絶縁膜0213中への拡散を防止している。 The first wiring 0207 is embedded in the wiring trench provided on the interlayer insulating film 0213 formed on the semiconductor substrate 0219 with the first barrier metal 0210 interposed therebetween. The first barrier metal 0210 that covers the bottom surface and the side wall surface of the first wiring 0207 prevents diffusion of the metal constituting the first wiring 0207 into the interlayer insulating film 0213.
 多層配線層中、層間絶縁膜0216に形成された配線溝に第2配線0212が埋め込まれており、層間絶縁膜0215、バリア絶縁膜0214、イオン伝導層0204、及びハードマスク0218に形成された下穴(ビアホール)にプラグ0206が埋め込まれており、第2配線0212とプラグ0206は一体となっており、第2配線0220およびプラグ0206の側面及び底面が第2バリアメタル0211によって覆われている。 In the multilayer wiring layer, the second wiring 0212 is embedded in the wiring groove formed in the interlayer insulating film 0216, and the lower layer formed in the interlayer insulating film 0215, the barrier insulating film 0214, the ion conductive layer 0204, and the hard mask 0218. A plug 0206 is embedded in the hole (via hole), the second wiring 0212 and the plug 0206 are integrated, and the second wiring 0220 and the side and bottom surfaces of the plug 0206 are covered with the second barrier metal 0211.
 図2に示す、2端子スイッチ0220は、抵抗変化型不揮発性スイッチング素子であり、特には、イオン伝導体中における金属イオン移動と電気化学反応とを利用し、金属架橋の形成・消滅を行う、金属架橋型スイッチング素子を構成している。2端子スイッチ0220は、開口されたバリア絶縁膜0205上に、エッチング加工された第2金属膜0209、バリア絶縁膜0205、第1金属膜0208、ハードマスク0218の積層構造が形成されている。バリア絶縁膜0205の上面、ならびに、前記積層構造の上面と側面を覆うように、イオン伝導層0204が形成されており、イオン伝導層0204の上にバリア絶縁膜0214が形成されている。 A two-terminal switch 0220 shown in FIG. 2 is a variable resistance nonvolatile switching element, and in particular, uses metal ion migration and an electrochemical reaction in an ion conductor to form and extinguish a metal bridge. A metal bridge type switching element is configured. In the two-terminal switch 0220, a stacked structure of an etched second metal film 0209, a barrier insulating film 0205, a first metal film 0208, and a hard mask 0218 is formed on the opened barrier insulating film 0205. An ion conductive layer 0204 is formed so as to cover the upper surface of the barrier insulating film 0205 and the upper surface and side surfaces of the stacked structure, and the barrier insulating film 0214 is formed on the ion conductive layer 0204.
 2端子スイッチ0220では、第1電極0201を構成する第1金属膜0208が、第2配線0220とプラグ0206と、第2バリアメタル0211を介して電気的に接続されている。また、第2電極0202を構成する第2金属膜0209は、バリア絶縁膜0205に開口された開口部を介して、第1配線0207及び第1バリアメタル0210と電気的に接続されている。 In the two-terminal switch 0220, the first metal film 0208 constituting the first electrode 0201 is electrically connected to the second wiring 0220, the plug 0206, and the second barrier metal 0211. In addition, the second metal film 0209 constituting the second electrode 0202 is electrically connected to the first wiring 0207 and the first barrier metal 0210 through an opening opened in the barrier insulating film 0205.
 2端子スイッチ0220では、第2配線0212と第1配線0207の間に、スイッチング電圧の印加、あるいはスイッチング電流を流すことで、ON/OFF状態の制御を行っている。例えば、第2電極0220の側壁面からイオン伝導層0204中へ金属イオンの供給、第1電極の側壁面から供給される電子による金属原子の析出、イオン伝導層0204中の金属イオンの電界拡散による、金属架橋に生成を行い、OFF状態からON状態への遷移動作(ON動作)の制御を行う。第1金属膜0208は、2層構造となっており、プラグ0206の底面と側面を被覆する第2バリアメタル0211と接する面(上層の表面)は、第2バリアメタル0211と同じ導電性材料を用いる。同じ導電性材料を使用する場合、下穴(ビアホール)の底部に露呈している第1金属膜0208の上層表面と、下穴(ビアホール)の側壁面を覆うように、第2バリアメタル0211を形成する際、第1金属膜0208の上層表面と第2バリアメタル0211との界面では、同じ導電性材料間で一体化し、接触抵抗の低減化が図られる。一体化に伴い、密着性も向上し、2端子スイッチ0220の信頼性の向上を実現することができる。 The two-terminal switch 0220 controls the ON / OFF state by applying a switching voltage or passing a switching current between the second wiring 0212 and the first wiring 0207. For example, metal ions are supplied from the side wall surface of the second electrode 0220 into the ion conductive layer 0204, metal atoms are precipitated by electrons supplied from the side wall surface of the first electrode, and electric field diffusion of metal ions in the ion conductive layer 0204 is performed. The metal bridge is generated and the transition operation from the OFF state to the ON state (ON operation) is controlled. The first metal film 0208 has a two-layer structure, and the surface (upper surface) in contact with the second barrier metal 0211 covering the bottom and side surfaces of the plug 0206 is made of the same conductive material as the second barrier metal 0211. Use. When the same conductive material is used, the second barrier metal 0211 is formed so as to cover the upper surface of the first metal film 0208 exposed at the bottom of the pilot hole (via hole) and the side wall surface of the pilot hole (via hole). When forming, at the interface between the upper surface of the first metal film 0208 and the second barrier metal 0211, the same conductive material is integrated to reduce the contact resistance. With the integration, the adhesiveness is also improved, and the reliability of the two-terminal switch 0220 can be improved.
 半導体基板0219は、半導体素子が形成された基板である。半導体基板0219には、例えば、シリコン基板、単結晶基板、SOI(Silicon on Insulator)基板、TFT(Thin Film Transistor)基板、液晶製造用基板等の基板を用いることができる。 The semiconductor substrate 0219 is a substrate on which a semiconductor element is formed. As the semiconductor substrate 0219, for example, a silicon substrate, a single crystal substrate, an SOI (Silicon-on-Insulator) substrate, a TFT (Thin-Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
 層間絶縁膜0213は、半導体基板0219上に形成された絶縁膜である。層間絶縁膜0213には、例えば、SiO2、シリコン酸化膜よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)等を用いることができる。層間絶縁膜0213は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0213には、第1配線0207を埋め込むための配線溝が形成されており、当該配線溝に第1バリアメタル0210を介して第1配線0207が埋め込まれている。 The interlayer insulating film 0213 is an insulating film formed over the semiconductor substrate 0219. For the interlayer insulating film 0213, for example, SiO 2 , a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of a silicon oxide film can be used. The interlayer insulating film 0213 may be a stack of a plurality of insulating films. In the interlayer insulating film 0213, a wiring groove for embedding the first wiring 0207 is formed, and the first wiring 0207 is embedded in the wiring groove via the first barrier metal 0210.
 第1配線0207は、層間絶縁膜0213に形成された配線溝に第1バリアメタル0210を介して埋め込まれた配線である。第一の実施態様においては、第1配線0207は、Cuで構成され、「銅配線」とされている。主成分をCuとし、Alと合金化されていてもよい。第1配線0207は、第2電極0202を形成する第2金属膜0209と直接接している。 The first wiring 0207 is a wiring buried in the wiring trench formed in the interlayer insulating film 0213 through the first barrier metal 0210. In the first embodiment, the first wiring 0207 is made of Cu and is a “copper wiring”. The main component may be Cu and alloyed with Al. The first wiring 0207 is in direct contact with the second metal film 0209 that forms the second electrode 0202.
 第1バリアメタル0210は、第1配線0207を構成する金属(Cu)が層間絶縁膜0213や下層へ拡散することを防止するために、第1配線0207の側壁面および底面を被覆する、バリア性を有する導電性膜である。第1バリアメタル0210には、例えば、第1配線0210を、Cuを主成分とする金属材料で形成する際、Cuに対するバリア性を有する、タンタル(Ta)、窒化タンタル(TaN)、窒化チタン(TiN)、炭窒化タングステン(WCN)のような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The first barrier metal 0210 has a barrier property that covers the side wall surface and the bottom surface of the first wiring 0207 in order to prevent the metal (Cu) constituting the first wiring 0207 from diffusing into the interlayer insulating film 0213 and the lower layer. It is a conductive film having As the first barrier metal 0210, for example, when the first wiring 0210 is formed of a metal material mainly composed of Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (which has a barrier property against Cu) A high melting point metal such as TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
 バリア絶縁膜0205は、第1配線0207の表面、ならびに、層間絶縁膜0213上に形成されている。バリア絶縁膜0205により被覆することで、第1配線0205を構成する金属(例えば、Cu)の酸化を防止する。また、バリア絶縁膜0205は、イオン伝導層0204中に存在する金属イオン(Cuイオン)の層間絶縁膜0213中への拡散を防ぐ役割を有する。加えて、バリア絶縁膜0205を設ける結果、第1配線0207の表面と、イオン伝導層0204との接触は遮断されており、2端子スイッチ0220にON操作のスイッチング電圧を印加する際、第1配線0205を構成する金属(例えば、Cu)がイオン化し、イオン伝導層0204中に供給される現象は生じない。バリア絶縁膜0205には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0205 is formed on the surface of the first wiring 0207 and on the interlayer insulating film 0213. By covering with the barrier insulating film 0205, oxidation of the metal (for example, Cu) constituting the first wiring 0205 is prevented. The barrier insulating film 0205 has a role of preventing diffusion of metal ions (Cu ions) existing in the ion conductive layer 0204 into the interlayer insulating film 0213. In addition, as a result of providing the barrier insulating film 0205, the contact between the surface of the first wiring 0207 and the ion conductive layer 0204 is cut off, and when the switching voltage of the ON operation is applied to the two-terminal switch 0220, the first wiring The phenomenon that the metal (for example, Cu) constituting 0205 is ionized and supplied into the ion conductive layer 0204 does not occur. As the barrier insulating film 0205, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 バリア絶縁膜0205には、第1配線0207上に開口部が形成されている。該バリア絶縁膜0205の開口部において、第1配線0207の表面に、第2金属膜0209が電気的に接している。バリア絶縁膜0205の開口部は、第1配線0207の領域内に形成されている。バリア絶縁膜0205の開口部の壁面は、第1配線0207の表面との境界面から、バリア絶縁膜0205の上面に向かい、開口断面積が広くなったテーパ面となっている。バリア絶縁膜0210の開口部壁面のテーパ角θtaperは、第1配線0207の上面に対し、85°以下(θtaper≦85°)に設定されている。 An opening is formed in the barrier insulating film 0205 over the first wiring 0207. In the opening of the barrier insulating film 0205, the second metal film 0209 is in electrical contact with the surface of the first wiring 0207. The opening of the barrier insulating film 0205 is formed in the region of the first wiring 0207. The wall surface of the opening of the barrier insulating film 0205 is a tapered surface having a wide opening cross-sectional area from the boundary surface with the surface of the first wiring 0207 toward the upper surface of the barrier insulating film 0205. The taper angle θ taper of the wall surface of the opening of the barrier insulating film 0210 is set to 85 ° or less (θ taper ≦ 85 °) with respect to the upper surface of the first wiring 0207.
 第2電極0202および第1電極0201は、2端子スイッチ0220において、信号を伝達する電極である。第1電極0201は、第1金属膜0208の側壁部のうち、イオン伝導層0204と直接接している部位である。第2電極0202は、第2金属膜0209の側壁部のうち、イオン伝導層0204と直接接している部位である。 The second electrode 0202 and the first electrode 0201 are electrodes that transmit signals in the two-terminal switch 0220. The first electrode 0201 is a portion in direct contact with the ion conductive layer 0204 in the side wall portion of the first metal film 0208. The second electrode 0202 is a portion in direct contact with the ion conductive layer 0204 in the side wall portion of the second metal film 0209.
 第2金属膜0209は、CuもしくはCuを主成分とした導電性材料で構成されている。第1金属膜0208は、異なる金属の2層で構成される。バリア絶縁膜0203の上面に接する、第1金属膜0208の下層は、2端子スイッチ0220にOFF操作のスイッチング電圧を印加する際、イオン伝導層0204と接する界面に生成される電界によりイオン化しにくく、イオン伝導層0204中に拡散もしくは伝導しにくい金属が用いられる。第1金属膜0208の下層の形成には、例えば、Pt、Ru等を用いることができる。また、ハードマスク0218の下面に接する、第1金属膜0208の上層は、下層を保護する役割を有する。すなわち、例えば、ハードマスク0218を、第1金属膜0208を被覆するように形成する工程、ならびに、プラグ0206を作製するビア穴を作製する工程時、ハードマスク0218に開口を形成するエッチング工程において、上層が下層を保護することで、プロセス中の下層へのダメージを抑制する。第1金属膜0208の下層へのダメージが抑制される結果、2端子スイッチ0220のスイッチング特性を維持することができる。第1金属膜0208の上層の形成には、例えば、Ta、Ti、W、Alあるいはそれらの窒化物等を用いることができる。第1金属膜0207の上層は、ハードマスク0218に設ける開口部において、第2バリアメタル0211を介してプラグ0206、さらに、プラグ0206と一体に形成されている第2配線0212と電気的に接続されている。 The second metal film 0209 is made of Cu or a conductive material containing Cu as a main component. The first metal film 0208 is composed of two layers of different metals. The lower layer of the first metal film 0208 that is in contact with the upper surface of the barrier insulating film 0203 is less likely to be ionized by an electric field generated at the interface in contact with the ion conductive layer 0204 when a switching voltage for OFF operation is applied to the two-terminal switch 0220. A metal that is difficult to diffuse or conduct in the ion conductive layer 0204 is used. For forming the lower layer of the first metal film 0208, for example, Pt, Ru, or the like can be used. The upper layer of the first metal film 0208 that is in contact with the lower surface of the hard mask 0218 has a role of protecting the lower layer. That is, for example, in the step of forming the hard mask 0218 so as to cover the first metal film 0208 and the step of forming the via hole for forming the plug 0206, the etching step of forming an opening in the hard mask 0218. The upper layer protects the lower layer, thereby suppressing damage to the lower layer during the process. As a result of suppressing damage to the lower layer of the first metal film 0208, the switching characteristics of the two-terminal switch 0220 can be maintained. For forming the upper layer of the first metal film 0208, for example, Ta, Ti, W, Al, or a nitride thereof can be used. The upper layer of the first metal film 0207 is electrically connected to the plug 0206 and the second wiring 0212 formed integrally with the plug 0206 through the second barrier metal 0211 in the opening provided in the hard mask 0218. ing.
 結果的に、バリア絶縁膜0203は、第1金属膜0208と第2金属膜0209に挟まれて、設けられている。バリア絶縁膜0203は、第1金属膜0208と第2金属膜0209が短絡しないように、両者を絶縁する役割を有する。バリア絶縁膜0203には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 As a result, the barrier insulating film 0203 is provided between the first metal film 0208 and the second metal film 0209. The barrier insulating film 0203 has a role of insulating the first metal film 0208 and the second metal film 0209 so as not to short-circuit each other. As the barrier insulating film 0203, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 イオン伝導層0204は、2端子スイッチ0220にON操作のスイッチング電圧を印加する際、第2電極から金属イオン(Cuイオン)の供給が可能な膜である。また、イオン伝導層0204中に存在する電界で、金属イオン(Cuイオン)が移動可能な膜である。イオン伝導層0204は、イオン伝導層が含む金属の作用(拡散、イオン伝動など)により抵抗が変化する材料を用いることができ、2端子スイッチ0220の抵抗変化を金属イオンの析出によって行う場合には、イオン伝導可能な膜が用いられる。金属イオンはCuイオンとして、第2電極0202より供給される。バリア絶縁膜0214には、プラグ0214を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0211を介してプラグ0206が埋め込まれている。 The ion conductive layer 0204 is a film that can supply metal ions (Cu ions) from the second electrode when an ON operation switching voltage is applied to the two-terminal switch 0220. Further, it is a film in which metal ions (Cu ions) can move by an electric field present in the ion conductive layer 0204. For the ion conductive layer 0204, a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used, and when the resistance change of the two-terminal switch 0220 is performed by deposition of metal ions. A membrane capable of ion conduction is used. Metal ions are supplied from the second electrode 0202 as Cu ions. A pilot hole for embedding the plug 0214 is formed in the barrier insulating film 0214, and the plug 0206 is embedded in the pilot hole via the second barrier metal 0211.
 イオン伝導層0204の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する三層構造の側面に、GeSbTeからなるイオン伝導層0204を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One candidate material that can be used to fabricate the ion conducting layer 0204 is chalcogenide GeSbTe, which is used in the phase change element as a material for the phase change layer. As a means for forming the ion conductive layer 0204 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層0204の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 0204 is a SIOCH material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber in a separate line.
 ハードマスク0218は、第1金属膜0208、バリア絶縁膜0203、第2金属膜0209をエッチング加工する際、ハードマスク(エッチングマスク)として利用される。ハードマスク0218には、例えば、SiN膜やSiO2膜、もしくはこれらの積層を用いることができる。 The hard mask 0218 is used as a hard mask (etching mask) when the first metal film 0208, the barrier insulating film 0203, and the second metal film 0209 are etched. For the hard mask 0218, for example, a SiN film, a SiO 2 film, or a laminate thereof can be used.
 バリア絶縁膜0214は、2端子スイッチ0220にダメージを与えることなく、さらに、イオン伝導層0204中に含まれる金属イオンの層間絶縁膜0215への拡散を防ぐ機能を有する絶縁膜である。加えて、バリア絶縁膜0214は、イオン伝導層0204中に含まれる酸素の脱離を防止する機能、ならびに、層間絶縁膜0215の形成工程時に、イオン伝導層0204にダメージが導入されることを防止する機能も有している。バリア絶縁膜0214には、例えば、SiN膜、SiCN膜等を用いることができる。バリア絶縁膜0214は、バリア絶縁膜0205と同一材料であることが好ましい。 The barrier insulating film 0214 is an insulating film having a function of preventing diffusion of metal ions contained in the ion conductive layer 0204 into the interlayer insulating film 0215 without damaging the two-terminal switch 0220. In addition, the barrier insulating film 0214 has a function of preventing the desorption of oxygen contained in the ion conductive layer 0204, and prevents damage to the ion conductive layer 0204 during the formation process of the interlayer insulating film 0215. It also has a function to do. As the barrier insulating film 0214, for example, a SiN film, a SiCN film, or the like can be used. The barrier insulating film 0214 is preferably made of the same material as the barrier insulating film 0205.
 層間絶縁膜0215は、バリア絶縁膜0214上に形成された絶縁膜である。層間絶縁膜0215には、例えば、SiO2、SiOC膜などを用いることができる。層間絶縁膜0215は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0215は、層間絶縁膜0213、層間絶縁膜0216と同一材料としてもよい。 The interlayer insulating film 0215 is an insulating film formed over the barrier insulating film 0214. For the interlayer insulating film 0215, for example, a SiO 2 or SiOC film can be used. The interlayer insulating film 0215 may be a stack of a plurality of insulating films. The interlayer insulating film 0215 may be made of the same material as the interlayer insulating film 0213 and the interlayer insulating film 0216.
 層間絶縁膜0215、バリア絶縁膜0214、イオン伝導層0204、ハードマスク0218には、プラグ0214を埋め込むための下穴(ビアホール)が形成されており、当該下穴(ビアホール)に第2バリアメタル0211を介してプラグ0206が埋め込まれている。 In the interlayer insulating film 0215, the barrier insulating film 0214, the ion conductive layer 0204, and the hard mask 0218, a pilot hole (via hole) for embedding the plug 0214 is formed, and the second barrier metal 0211 is formed in the pilot hole (via hole). A plug 0206 is embedded via
 層間絶縁膜0216は、層間絶縁膜0215上に形成された絶縁膜である。層間絶縁膜0216には、例えば、SiO2膜、SiOC膜、SiO2よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)などを用いることができる。層間絶縁膜0216は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0216は、層間絶縁膜0215、層間絶縁膜0213と同一材料としてもよい。また、層間絶縁膜0216と層間絶縁膜0215を異なる絶縁材料を用いて作製し、そのエッチング特性に有意な差異を設けることもできる。層間絶縁膜0216には、第2配線0212埋め込むための配線溝が形成されており、当該配線溝中に第2バリアメタル0211を介して第2配線0212が埋め込まれている。 The interlayer insulating film 0216 is an insulating film formed over the interlayer insulating film 0215. As the interlayer insulating film 0216, for example, a SiO 2 film, a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used. The interlayer insulating film 0216 may be a stack of a plurality of insulating films. The interlayer insulating film 0216 may be formed of the same material as the interlayer insulating film 0215 and the interlayer insulating film 0213. Alternatively, the interlayer insulating film 0216 and the interlayer insulating film 0215 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics. In the interlayer insulating film 0216, a wiring groove for embedding the second wiring 0212 is formed, and the second wiring 0212 is embedded in the wiring groove via the second barrier metal 0211.
 第2配線0212は、層間絶縁膜0216に形成された配線溝に第2バリアメタル0211を介して埋め込まれた配線である。第2配線0212は、プラグ0206と一体になっている。 The second wiring 0212 is a wiring embedded in the wiring trench formed in the interlayer insulating film 0216 via the second barrier metal 0211. The second wiring 0212 is integrated with the plug 0206.
 プラグ0214を埋め込むための下穴(ビアホール)と第2配線0212を埋め込むための配線溝を形成した後、下穴(ビアホール)と配線溝中に、第2バリアメタル0211を介して、第2配線0212とプラグ0206を一体化して埋め込む。第2配線0212及びプラグ0206の形成には、例えば、Cuを用いることができる。 After forming a pilot hole (via hole) for embedding the plug 0214 and a wiring groove for embedding the second wiring 0212, the second wiring is inserted into the pilot hole (via hole) and the wiring groove via the second barrier metal 0211. 0212 and the plug 0206 are integrated and embedded. For example, Cu can be used for forming the second wiring 0212 and the plug 0206.
 第2バリアメタル0211は、第2配線0212ならびにプラグ0206を構成する金属が、層間絶縁膜0216、層間絶縁膜0215、バリア絶縁膜0214、イオン伝導層0204、ハードマスク0218、ならびに、下層(第1金属膜0208)へと拡散することを防止するために、第2配線0212及びプラグ0206の側面および底面を被覆する、バリア性を有する導電性膜である。第2バリアメタル0212には、例えば、第2配線0212及びプラグ0206がCuを主成分とする金属材料からなる場合には、Ta、TaN、TiN、WCNのような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 In the second barrier metal 0211, the metal constituting the second wiring 0212 and the plug 0206 includes an interlayer insulating film 0216, an interlayer insulating film 0215, a barrier insulating film 0214, an ion conductive layer 0204, a hard mask 0218, and a lower layer (first In order to prevent diffusion into the metal film 0208), the conductive film has a barrier property and covers the side surfaces and the bottom surface of the second wiring 0212 and the plug 0206. For example, when the second wiring 0212 and the plug 0206 are made of a metal material containing Cu as a main component, the second barrier metal 0212 includes a refractory metal such as Ta, TaN, TiN, and WCN, nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
 バリア絶縁膜0217は、第2配線0212の上面、ならびに、層間絶縁膜0216上に形成され、第2配線0217を構成する金属(例えば、Cu)の酸化を防いだり、上層への第2配線0212を構成する金属(例えば、Cu)の拡散を防ぐ役割を有する絶縁膜である。バリア絶縁膜0217には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0217 is formed on the upper surface of the second wiring 0212 and the interlayer insulating film 0216, and prevents oxidation of a metal (for example, Cu) constituting the second wiring 0217, or the second wiring 0212 to the upper layer. It is an insulating film which has a role which prevents the spreading | diffusion of the metal (for example, Cu) which comprises. As the barrier insulating film 0217, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 (スイッチング動作)
 図2に示す、第一の実施態様の2端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the two-terminal switch of the first embodiment shown in FIG. 2 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 第1配線0207を接地する。その結果、第1配線0207の表面に電気的に接続されている第2金属膜0209も接地され、該第2金属膜0209の側壁面で構成される第2電極0202も接地される。従って、第2電極0202の電位V2は、V2=0Vである。
(A) ON operation (transition process from OFF state to ON state)
The first wiring 0207 is grounded. As a result, the second metal film 0209 electrically connected to the surface of the first wiring 0207 is also grounded, and the second electrode 0202 constituted by the side wall surface of the second metal film 0209 is also grounded. Therefore, the potential V 2 of the second electrode 0202 is V 2 = 0V.
 一方、第2配線0212に負電圧(-VON<0V)を印加する。その結果、第2配線0212と一体に形成されているプラグ0206に電気的に接続されている第1金属膜0208にも負電圧(-VON<0V)が印加され、該第1金属膜0208の側壁面で構成される第1電極0201も負電圧(-VON<0V)が印加された状態となる。従って、第1電極0201の電位V1は、V1=-VONである。 On the other hand, a negative voltage (−V ON <0 V) is applied to the second wiring 0212. As a result, a negative voltage (−V ON <0 V) is also applied to the first metal film 0208 electrically connected to the plug 0206 formed integrally with the second wiring 0212, and the first metal film 0208 is applied. The first electrode 0201 constituted by the side wall surface of the negative electrode is also in a state where a negative voltage (−V ON <0 V) is applied. Therefore, the potential V 1 of the first electrode 0201 is V 1 = −V ON .
 第2電極0202とイオン伝導層0204との界面では、負電圧(-VON<0V)の印加により生成される電界によって、第2電極0202を構成する金属がイオン化し、イオン伝導層0204へ金属イオン(Cuイオン)が供給される。供給される金属イオン(Cuイオン)は、イオン伝導層0204中の電界によって、第1電極0201側にマイグレーションする。第1電極0201と第2電極0202間に電気力線に従って、マイグレーションした金属イオンは、第1電極0201より電子を受け取り、電気化学反応によって、金属として析出する。析出する金属によって、第1電極0201の下層部から、第2電極0202の上端部への金属架橋0221の形成が進行する。第1電極0201の下層部と第2電極0202の上端部を連結する金属架橋0221の形成によって、第1電極0201と第2電極0202の間の抵抗値が低抵抗となり、ON状態となる。 At the interface between the second electrode 0202 and the ion conductive layer 0204, the metal constituting the second electrode 0202 is ionized by an electric field generated by applying a negative voltage (−V ON <0 V), and the metal is transferred to the ion conductive layer 0204. Ions (Cu ions) are supplied. The supplied metal ions (Cu ions) migrate to the first electrode 0201 side by an electric field in the ion conductive layer 0204. The migrated metal ions receive electrons from the first electrode 0201 according to the lines of electric force between the first electrode 0201 and the second electrode 0202, and are deposited as metal by an electrochemical reaction. Formation of the metal bridge 0221 from the lower layer portion of the first electrode 0201 to the upper end portion of the second electrode 0202 proceeds by the deposited metal. By forming the metal bridge 0221 that connects the lower layer portion of the first electrode 0201 and the upper end portion of the second electrode 0202, the resistance value between the first electrode 0201 and the second electrode 0202 becomes low resistance, and the ON state is obtained.
 前述のON状態への遷移は、第1電極0201を接地して(V1=0V)、第2電極0202に正電圧を印加しても良い(V2=+VON>0V)。 In the transition to the ON state described above, the first electrode 0201 may be grounded (V 1 = 0V) and a positive voltage may be applied to the second electrode 0202 (V 2 = + V ON > 0V).
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 第1配線0207を接地する。その結果、第1配線0207の表面に電気的に接続されている第2金属膜0209も接地され、該第2金属膜0209の側壁面で構成される第2電極0202も接地される。従って、第2電極0202の電位V2は、V2=0Vである。
(B) OFF operation (transition process from ON state to OFF state)
The first wiring 0207 is grounded. As a result, the second metal film 0209 electrically connected to the surface of the first wiring 0207 is also grounded, and the second electrode 0202 constituted by the side wall surface of the second metal film 0209 is also grounded. Therefore, the potential V 2 of the second electrode 0202 is V 2 = 0V.
 一方、第2配線0212に正電圧(+VOFF>0V)を印加する。その結果、第2配線0212と一体に形成されているプラグ0206に電気的に接続されている第1金属膜0208にも正電圧(+VOFF>0V)が印加され、該第1金属膜0208の側壁面で構成される第1電極0201も正電圧(+VOFF>0V)が印加された状態となる。従って、第1電極0201の電位V1は、V1=+VOFFである。 On the other hand, a positive voltage (+ V OFF > 0 V) is applied to the second wiring 0212. As a result, a positive voltage (+ V OFF > 0 V) is also applied to the first metal film 0208 electrically connected to the plug 0206 formed integrally with the second wiring 0212, and the first metal film 0208 The first electrode 0201 constituted by the side wall surface is also in a state where a positive voltage (+ V OFF > 0 V) is applied. Therefore, the potential V 1 of the first electrode 0201 is V 1 = + V OFF .
 第1電極0201に正電圧(+VOFF>0V)が印加された状態となると、イオン伝導層0204と金属架橋0221の界面では、生成される電界により、金属架橋0221を構成する金属がイオン化し、溶解反応が進行する。金属架橋0221の表面での溶解反応により生成する金属イオン(Cuイオン)は、イオン伝導層0204中に存在する電界によって、第2電極0202側にマイグレーションする。第2電極0202とイオン伝導層0204と界面に達した金属イオンは、第2電極0202より電子を受け取り、電気化学反応によって、金属として析出する。 When a positive voltage (+ V OFF > 0 V) is applied to the first electrode 0201, the metal constituting the metal bridge 0221 is ionized by the generated electric field at the interface between the ion conductive layer 0204 and the metal bridge 0221, The dissolution reaction proceeds. Metal ions (Cu ions) generated by a dissolution reaction on the surface of the metal bridge 0221 migrate to the second electrode 0202 side by an electric field present in the ion conductive layer 0204. The metal ions that have reached the interface between the second electrode 0202 and the ion conductive layer 0204 receive electrons from the second electrode 0202 and are deposited as metal by an electrochemical reaction.
 溶解反応が進行し、金属架橋0221による第1電極0201の下層部と第2電極0202の上端部を連結する導通経路が遮断されると、第1電極0201と第2電極0202の間の抵抗値が高抵抗となり、OFF状態に遷移する。 When the dissolution reaction proceeds and the conduction path connecting the lower layer portion of the first electrode 0201 and the upper end portion of the second electrode 0202 by the metal bridge 0221 is interrupted, the resistance value between the first electrode 0201 and the second electrode 0202 Becomes a high resistance and transits to the OFF state.
 前述のON状態への遷移は、第1電極0201を接地して(V1=0V)、第2電極0202に負電圧を印加しても良い(V2=-VOFF<0V)。 In the above transition to the ON state, the first electrode 0201 may be grounded (V 1 = 0V), and a negative voltage may be applied to the second electrode 0202 (V 2 = −V OFF <0V).
 第1電極0201と第2電極0202が曲率を有することで、ON状態とOFF状態間のスイッチング時に曲率部分に電界が集中し、安定かつバラツキが小さい動作が得られる。 Since the first electrode 0201 and the second electrode 0202 have curvature, the electric field concentrates on the curvature portion during switching between the ON state and the OFF state, and an operation with stable and small variation can be obtained.
 図2に示す2端子スイッチ0220においては、第1金属膜0208と第2金属膜0209の平面形状は、プラグ0206を中心軸とする「円形」となっている。その際、プラグ0206を中心軸とする軸対称性を有する、2端子スイッチ0220においては、スイッチング動作時、金属架橋0221の形成を行う位置は、図2に示している位置と、プラグ0206に対して線対称な位置でも良い。 In the two-terminal switch 0220 shown in FIG. 2, the planar shape of the first metal film 0208 and the second metal film 0209 is “circular” with the plug 0206 as the central axis. At that time, in the two-terminal switch 0220 having axial symmetry with the plug 0206 as the central axis, the position where the metal bridge 0221 is formed during the switching operation is the position shown in FIG. The position may be symmetrical with respect to the line.
 (製造プロセス)
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置において、図2に示す、第一の実施態様の2端子スイッチング素子を、前記抵抗変化型不揮発性スイッチング素子として作製する際の製造プロセスを説明する。図3-1と図3-2が、第一の実施態様の2端子スイッチング素子の製造工程の一例を模式的に示す断面図である。図3-1は、該製造工程中、工程1~工程3を示す図であり、図3-2は、該製造工程中、工程4~工程8を示す図である。
(Manufacturing process)
In a semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate, the two-terminal switching element of the first embodiment shown in FIG. A manufacturing process for manufacturing a nonvolatile switching element will be described. 3A and 3B are cross-sectional views schematically showing an example of the manufacturing process of the two-terminal switching element of the first embodiment. FIG. 3A is a diagram illustrating steps 1 to 3 in the manufacturing process, and FIG. 3B is a diagram illustrating steps 4 to 8 in the manufacturing process.
 (工程1)
 半導体基板0319(例えば、半導体素子が形成された基板)上に層間絶縁膜0313(例えば、膜厚300nmのSiO2、膜厚150nmのSiOCH、膜厚100nmのSiO2)を堆積し、その後、リソグラフィ法(フォトレジスト形成、ドライエッチング、フォトレジスト除去を含む)を用いて、層間絶縁膜0313に配線溝を形成し、その後、当該配線溝に第1バリアメタル0310(例えば、TaN/Ta、膜厚5nm/5nm)を介して第1配線0307(例えば、Cu)を埋め込む。層間絶縁膜0313は、プラズマCVD法によって形成することができる。第1配線0307は、例えば、PVD法によって第1バリアメタル0310(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によってCuを配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。ここで、CMP(Chemical Mechanical Polishing)法とは、多層配線形成プロセス中に生じるウエハ表面の凹凸を、研磨液をウエハ表面に流しながら回転させた研磨パッドに接触させて研磨することによって平坦化する方法である。配線溝に埋め込まれた余剰の銅を研磨することによって埋め込み配線(ダマシン配線)を形成したり、層間絶縁膜0313を研磨することで平坦化を行う。
(Process 1)
An interlayer insulating film 0313 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 0319 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed. Using a method (including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 0313, and then a first barrier metal 0310 (for example, TaN / Ta, film thickness) is formed in the wiring groove. The first wiring 0307 (for example, Cu) is buried via 5 nm / 5 nm). The interlayer insulating film 0313 can be formed by a plasma CVD method. The first wiring 0307 is formed, for example, by forming a first barrier metal 0310 (for example, a TaN / Ta laminated film) by the PVD method. After forming the Cu seed by the PVD method, Cu is embedded in the wiring groove by the electrolytic plating method. Then, after heat treatment at a temperature of 200 ° C. or higher, excess copper other than in the wiring trench can be removed by CMP. As a method for forming such a series of copper wirings, a general method in this technical field can be used. Here, the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness on the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 0313 by polishing.
 (工程2)
 第1配線0307を含む層間絶縁膜0313上にバリア絶縁膜0305(例えば、SiN、膜厚30nm)を形成する。ここで、バリア絶縁膜0305は、プラズマCVD法によって形成することができる。バリア絶縁膜0305の膜厚は、10nm~50nm程度であることが好ましい。バリア絶縁膜0305上にハードマスク0321(例えば、SiO2)を形成する。このとき、ハードマスク0321は、ドライエッチング加工におけるエッチング選択比を大きく保つ観点から、バリア絶縁膜0305とは異なる材料であることが好ましく、絶縁膜であっても導電膜であってもよい。ハードマスク0321には、例えば、SiO2、SiN、SiCN、TiN、Ti、Ta、TaN等を用いることができ、SiCN/SiO2の積層体を用いることができる。
(Process 2)
A barrier insulating film 0305 (eg, SiN, film thickness of 30 nm) is formed over the interlayer insulating film 0313 including the first wiring 0307. Here, the barrier insulating film 0305 can be formed by a plasma CVD method. The thickness of the barrier insulating film 0305 is preferably about 10 nm to 50 nm. A hard mask 0321 (eg, SiO 2 ) is formed over the barrier insulating film 0305. At this time, the hard mask 0321 is preferably made of a material different from the barrier insulating film 0305 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film. For the hard mask 0321, for example, SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN, or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
 (工程3)
 ハードマスク0321上にフォトレジスト(図示せず)を用いて開口部をパターニングし、フォトレジストをマスクとしてドライエッチングすることによりハードマスク0321に開口部パターンを形成し、その後、酸素プラズマアッシング等によってフォトレジストを剥離する。このとき、ドライエッチングは必ずしもバリア絶縁膜0321の上面で停止している必要はなく、バリア絶縁膜0321の内部にまで到達していてもよい。
(Process 3)
An opening is patterned on the hard mask 0321 using a photoresist (not shown), and an opening pattern is formed on the hard mask 0321 by dry etching using the photoresist as a mask. Strip the resist. At this time, the dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0321 and may reach the inside of the barrier insulating film 0321.
 (工程4)
 ハードマスク0321をマスクとして、ハードマスク0321の開口部から露出するバリア絶縁膜0305をエッチバック(ドライエッチング)することにより、バリア絶縁膜0305に開口部を形成して、バリア絶縁膜0305の開口部から第1配線0307を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線0307の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。バリア絶縁膜0305をエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜0305の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク0321は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜0305の開口部の形状は円形とし、円の直径は30nmから500nmとすることができる。非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線0307の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。
(Process 4)
Using the hard mask 0321 as a mask, the barrier insulating film 0305 exposed from the opening of the hard mask 0321 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0305 and the opening of the barrier insulating film 0305 is formed. Then, the first wiring 0307 is exposed, and then an organic stripping process is performed with an amine-based stripping solution or the like to remove copper oxide formed on the exposed surface of the first wiring 0307 and etching that occurs at the time of etch back Remove double products. When the barrier insulating film 0305 is etched back, the wall surface of the opening of the barrier insulating film 0305 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 0321 is preferably completely removed during the etch-back, but may remain as it is when it is an insulating material. The shape of the opening in the barrier insulating film 0305 can be a circle, and the diameter of the circle can be 30 nm to 500 nm. The oxide on the surface of the first wiring 0307 is removed by RF (Radio Frequency) etching using a non-reactive gas. As the non-reactive gas, helium or argon can be used.
 (工程5)
 開口したバリア絶縁膜0305の上に第2金属膜0309(例えば、Cu10nm)、バリア絶縁膜0303(例えばSiCN膜、膜厚10nm)、第1金属膜0308(例えば、Ru10nmとTa10nmをこの順番で堆積する)を順に堆積する。さらに、ハードマスク0318(例えば、SiN膜、膜厚30nm)、およびハードマスク0322(例えば、SiO2膜、膜厚100nm)をこの順に積層する。工程5において、ハードマスク0318、ハードマスク0322は、プラズマCVD法によって形成することができる。また、工程5において、第1金属膜0308及び第2金属膜0309はスパッタ法によって形成する。さらに、ハードマスク0322をパターニングするためのフォトレジスト(図示せず)を形成し、その後、当該フォトレジストをマスクとして、ハードマスク0318が表れるまでハードマスク0322をドライエッチングし、その後、酸素プラズマアッシングと有機剥離を用いてフォトレジストを除去する。フォトレジストはマスクの露光パターンにより、上面から見た形状が円もしくは楕円になっている。
(Process 5)
On the opened barrier insulating film 0305, a second metal film 0309 (for example, Cu 10 nm), a barrier insulating film 0303 (for example, SiCN film, 10 nm in thickness), and a first metal film 0308 (for example, Ru 10 nm and Ta 10 nm are deposited in this order). Are deposited in order. Further, a hard mask 0318 (eg, SiN film, film thickness 30 nm) and a hard mask 0322 (eg, SiO 2 film, film thickness 100 nm) are stacked in this order. In Step 5, the hard mask 0318 and the hard mask 0322 can be formed by a plasma CVD method. In step 5, the first metal film 0308 and the second metal film 0309 are formed by sputtering. Further, a photoresist (not shown) for patterning the hard mask 0322 is formed, and then the hard mask 0322 is dry-etched using the photoresist as a mask until the hard mask 0318 appears, and then oxygen plasma ashing is performed. The photoresist is removed using organic stripping. The shape of the photoresist as viewed from above is a circle or an ellipse depending on the exposure pattern of the mask.
 もしくは、露光パターンを長方形もしくは正方形とし、ハードマスク0322のエッチング加工時に、サイド・エッチングによって、曲率を持たせてもよい。 Alternatively, the exposure pattern may be rectangular or square, and the curvature may be given by side etching when the hard mask 0322 is etched.
 (工程6)
 次に、ハードマスク0322をエッチングマスクとして、ハードマスク0318、第1金属膜0308、バリア絶縁膜0303、第2金属膜0309を連続的にドライエッチングし、第1電極0301および第2電極0302を形成する。このとき、ハードマスク0322は、前記一連のエッチング加工中に完全にエッチング除去されることが好ましい。なお、ハードマスク0322の一部(厚さの均一な残余膜)が、そのまま残存してもよい。工程6において、例えば、第1金属膜0308の上層がTaの場合にはCl2系のRIEで加工することができ、第1金属膜0308の下層がRuの場合、および第2金属膜0309がCuの場合にはCl2/O2の混合ガスでRIE加工することができる。このようなハードマスクRIE法を用いることで、第1金属膜0308および第2金属膜0309をレジスト除去のための酸素プラズマアッシングに曝すことなく、エッチング加工をすることができる。
(Step 6)
Next, using the hard mask 0322 as an etching mask, the hard mask 0318, the first metal film 0308, the barrier insulating film 0303, and the second metal film 0309 are successively dry-etched to form the first electrode 0301 and the second electrode 0302. To do. At this time, it is preferable that the hard mask 0322 is completely removed by etching during the series of etching processes. A part of the hard mask 0322 (a residual film having a uniform thickness) may remain as it is. In step 6, for example, when the upper layer of the first metal film 0308 is Ta, it can be processed by Cl 2 RIE. When the lower layer of the first metal film 0308 is Ru, and when the second metal film 0309 is In the case of Cu, RIE processing can be performed with a mixed gas of Cl 2 / O 2 . By using such a hard mask RIE method, etching can be performed without exposing the first metal film 0308 and the second metal film 0309 to oxygen plasma ashing for resist removal.
 また、エッチング加工後に酸素プラズマによって、レジスト酸化処理する場合には、レジストの剥離時間に依存することなく酸化プラズマ処理を照射することができるようになる。工程6では、ハードマスク0318、第1金属膜0308、バリア絶縁膜0303、第2金属膜0309に曲率を有するようにエッチングレシピを調整してもよい。 Further, when the resist oxidation treatment is performed by oxygen plasma after the etching process, the oxidation plasma treatment can be irradiated without depending on the resist stripping time. In step 6, the etching recipe may be adjusted so that the hard mask 0318, the first metal film 0308, the barrier insulating film 0303, and the second metal film 0309 have curvature.
 (工程7)
 次に、ハードマスク0318上、バリア絶縁膜0305、第1電極0301、第2電極0302、バリア絶縁膜0303の側面に接するようにイオン伝導層0304としてシリコン、酸素、炭素、水素を含むSIOCH系イオン伝導層をCVD法で20nmから80nm程度形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。温度は250℃~350℃程度が好ましい。次に、イオン伝導層0304上にバリア絶縁膜0314としてSiNもしくはSiCNを30nmの膜厚で形成する。工程8において、バリア絶縁膜0314は、プラズマCVD法によって形成することができる。例えば、SiH4/N2の混合ガスを高密度プラズマによって形成したSiN膜などを用いることが好ましい。2端子スイッチ素子0320以外の領域にもイオン伝導層0304が残るが、絶縁膜として機能するため、2端子スイッチの動作および多層配線に影響はない。工程7では、バリア絶縁膜0314の上に層間絶縁膜0315としてSiO2を300nm成膜する。さらに、2端子スイッチ0320によって生じた段差を解消するため、層間絶縁膜0315を170nm程度CMP法にて研磨することで平坦にする。層間絶縁膜0315は2端子スイッチ素子0320の段差を確実に埋めるために、高密度プラズマを使用してSiO2を成膜することが望ましい。
(Step 7)
Next, an SIOCH-based ion containing silicon, oxygen, carbon, and hydrogen is used as the ion conductive layer 0304 so as to be in contact with the side surfaces of the barrier insulating film 0305, the first electrode 0301, the second electrode 0302, and the barrier insulating film 0303 over the hard mask 0318. A conductive layer is formed with a thickness of about 20 nm to 80 nm by a CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is directly supplied to the reaction chamber by another line. The temperature is preferably about 250 ° C to 350 ° C. Next, SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0314 over the ion conductive layer 0304. In step 8, the barrier insulating film 0314 can be formed by a plasma CVD method. For example, it is preferable to use a SiN film in which a mixed gas of SiH 4 / N 2 is formed by high-density plasma. Although the ion conductive layer 0304 remains in a region other than the two-terminal switch element 0320, it functions as an insulating film and thus does not affect the operation of the two-terminal switch and the multilayer wiring. In step 7, 300 nm of SiO 2 is formed as an interlayer insulating film 0315 on the barrier insulating film 0314. Further, in order to eliminate the level difference caused by the two-terminal switch 0320, the interlayer insulating film 0315 is flattened by polishing by about 170 nm by a CMP method. The interlayer insulating film 0315 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the two-terminal switch element 0320.
 (工程8)
 次に、層間絶縁膜0315の上に層間絶縁膜0316(例えば、比誘電率の低いSiOC、SiO2の積層)を堆積し、その後、プラグ0306用の下穴および第2配線0312用の配線溝をドライエッチングによって形成し、銅デュアルダマシン配線プロセスを用いて、当該配線溝及び当該下穴内に第2バリアメタル0311(例えば、TaN/Ta)を介して第2配線0312(例えば、Cu)及びプラグ0306(例えば、Cu)を同時に形成し、その後、第2配線0312を含む層間絶縁膜0316上にバリア絶縁膜0317(例えば、SiCN膜)を堆積する。工程8において、第2配線0312およびプラグ0306の形成は、例えば、PVD法によって第2バリアメタル0311(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によって銅を配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。工程8では、第2バリアメタル0311と第1金属膜0308の上層を同一材料とすることでプラグ0306と第1金属膜0308の間の接触抵抗を低減し、素子性能を向上(ON状態時の2端子スイッチの抵抗を低減)させることができるようになる。また、工程8において、層間絶縁膜0316及びバリア絶縁膜0317はプラズマCVD法で形成することができる。工程8ではプラグ0306の下穴を形成する際、第1金属膜0308の上層に到達しており、第1金属膜0308の上層の材料がエッチングストッパ材料として機能する。プラグ0306用の下穴および第2配線0312用の配線溝のドライエッチングには、フルオロカーボン系のガスを用いる。
(Process 8)
Next, an interlayer insulating film 0316 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 0315, and then a pilot hole for the plug 0306 and a wiring groove for the second wiring 0312 are deposited. Is formed by dry etching, and a second wiring 0312 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0311 (for example, TaN / Ta) using a copper dual damascene wiring process. 0306 (for example, Cu) is formed at the same time, and then a barrier insulating film 0317 (for example, a SiCN film) is deposited over the interlayer insulating film 0316 including the second wiring 0312. In step 8, the second wiring 0312 and the plug 0306 are formed by, for example, forming a second barrier metal 0311 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. In step 8, by making the upper layer of the second barrier metal 0311 and the first metal film 0308 the same material, the contact resistance between the plug 0306 and the first metal film 0308 is reduced, and the element performance is improved (in the ON state). The resistance of the two-terminal switch can be reduced). In Step 8, the interlayer insulating film 0316 and the barrier insulating film 0317 can be formed by a plasma CVD method. In step 8, when forming the prepared hole of the plug 0306, it reaches the upper layer of the first metal film 0308, and the material of the upper layer of the first metal film 0308 functions as an etching stopper material. A fluorocarbon gas is used for dry etching of the prepared hole for the plug 0306 and the wiring groove for the second wiring 0312.
 (第二の実施形態)
 本発明に係る金属架橋型スイッチング素子における、第二の実施形態は、下に説明する「3端子スイッチ」の構成を採用する、金属架橋型スイッチング素子である。
(Second embodiment)
The second embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “three-terminal switch” described below.
 本発明の第二の実施形態にかかる金属架橋型スイッチング素子で採用される、「3端子スイッチ」の構成を説明する。図4は、第二の実施形態の「3端子スイッチ」の構成の一例を模式的に示す断面図である。 The configuration of the “three-terminal switch” employed in the metal bridge type switching element according to the second embodiment of the present invention will be described. FIG. 4 is a cross-sectional view schematically showing an example of the configuration of the “3-terminal switch” of the second embodiment.
 図4に示すように、第二の実施形態の「3端子スイッチ」は、プラグ0406に電気的に接続している第1金属膜0408と、第1配線A0407に電気的に接続している第2金属膜0409と、第1金属膜0408と第2金属膜0409により挟まれ、両者を電気的に分離している、層間絶縁膜0403を具えている。 As shown in FIG. 4, the “three-terminal switch” of the second embodiment includes a first metal film 0408 electrically connected to the plug 0406 and a first metal film 0408 electrically connected to the first wiring A0407. A two-metal film 0409 and an interlayer insulating film 0403 sandwiched between and electrically separating the first metal film 0408 and the second metal film 0409 are provided.
 第1金属膜0408、層間絶縁膜0403、第2金属膜0409からなる三層構造は、同じ平面形状にパターニングされており、該パターニングされた三層構造の側面には、第1金属膜0408の側壁面、層間絶縁膜0403の側壁面、第2金属膜0409の側壁面が露呈している。 The three-layer structure including the first metal film 0408, the interlayer insulating film 0403, and the second metal film 0409 is patterned in the same planar shape, and the side surface of the patterned three-layer structure has the first metal film 0408 The side wall surface, the side wall surface of the interlayer insulating film 0403, and the side wall surface of the second metal film 0409 are exposed.
 また、第1配線A0407に加えて、第3電極として利用される、第1配線B0410が形成されている。 In addition to the first wiring A0407, a first wiring B0410 used as a third electrode is formed.
 イオン伝導層0404は、該第1配線B0410の上面と、前記パターニングされた三層構造の側面の一部とのみ接触するように設けられている。第1金属膜0408の側壁面のうち、イオン伝導層0404と接触する部分が、第1電極0401として機能し、第2金属膜0409の側壁面のうち、イオン伝導層0404と接触する部分が、第2電極0402として機能する。また、イオン伝導層0404は、金属イオンが伝導するための媒体となる。従って、第3電極として利用される、第1配線B0410と、第1電極0401、イオン伝導層0404、第2電極0402を用いて、第二の実施形態の「3端子スイッチ」が構成されている。 The ion conductive layer 0404 is provided so as to contact only the upper surface of the first wiring B0410 and a part of the side surface of the patterned three-layer structure. Of the side wall surface of the first metal film 0408, a portion in contact with the ion conductive layer 0404 functions as the first electrode 0401. Of the side wall surface of the second metal film 0409, a portion in contact with the ion conductive layer 0404 is It functions as the second electrode 0402. The ion conductive layer 0404 serves as a medium for conducting metal ions. Therefore, the “three-terminal switch” of the second embodiment is configured by using the first wiring B 0410, the first electrode 0401, the ion conductive layer 0404, and the second electrode 0402 that are used as the third electrode. .
 第2金属膜0409を構成する導電性材料には、タンタル(Ta)、チタン(Ti)、タングステン(W)、ルテニウム(Ru)、プラチナ(Pt)、ニッケル(Ni)、窒化タンタル(TaN)、窒化チタン(TiN)が適しており、これらの積層を採用しても良い。特に、Ruが好ましい。 The conductive material constituting the second metal film 0409 includes tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN), Titanium nitride (TiN) is suitable, and a laminate of these may be employed. In particular, Ru is preferable.
 第2金属膜0409の上面には、層間絶縁膜0403が形成されている。層間絶縁膜0403は、気相堆積が可能な絶縁材料であり、かつ、イオン伝導性を示さない絶縁材料、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いて、形成することができる。 An interlayer insulating film 0403 is formed on the upper surface of the second metal film 0409. The interlayer insulating film 0403 is an insulating material that can be vapor-deposited and formed using an insulating material that does not exhibit ion conductivity, such as a SiC film, a SiCN film, a SiN film, and a stacked structure thereof. can do.
 第1金属膜0408を構成する導電性材料には、タンタル(Ta)、チタン(Ti)、タングステン(W)、ルテニウム(Ru)、プラチナ(Pt)、ニッケル(Ni)、窒化タンタル(TaN)、窒化チタン(TiN)が適しており、これらの積層を採用しても良い。特に、Ruが好ましい。これらの導電性材料で構成される第1金属膜0408は。スパッタ法、レーザーアブレーション法、プラズマCVD法を用いて、層間絶縁膜0403の上面に形成する。 The conductive material constituting the first metal film 0408 includes tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN), Titanium nitride (TiN) is suitable, and a laminate of these may be employed. In particular, Ru is preferable. The first metal film 0408 made of these conductive materials. A top surface of the interlayer insulating film 0403 is formed by a sputtering method, a laser ablation method, or a plasma CVD method.
 図4に示す第二の実施形態の「3端子スイッチ」の構成では、パターニングされた三層構造の平面形状は、円形であり、従って、第1金属膜0408および第2金属膜0409の平面形状は円形である。そのため、第1金属膜0408の側壁面からなる第1電極0401及び第2金属膜0409の側壁面からなる第2電極0402も、同じ曲率を有する。 In the configuration of the “three-terminal switch” of the second embodiment shown in FIG. 4, the planar shape of the patterned three-layer structure is a circle, and therefore the planar shape of the first metal film 0408 and the second metal film 0409. Is round. Therefore, the first electrode 0401 made of the side wall surface of the first metal film 0408 and the second electrode 0402 made of the side wall surface of the second metal film 0409 also have the same curvature.
 イオン伝導層0404は、第1配線B0410の表面と、曲率を有する三層構造の側面に接するように形成するため、スパッタ法、レーザーアブレーション法、プラズマCVD法を用いて形成する。イオン伝導層0404の材料としては、金属イオンの伝導度の大きく、かつ、LSI生産ラインにおいて、気相エッチング加工可能な材料を選択する必要がある。 The ion conductive layer 0404 is formed using a sputtering method, a laser ablation method, or a plasma CVD method in order to be in contact with the surface of the first wiring B 0410 and the side surface of the three-layer structure having a curvature. As a material of the ion conductive layer 0404, it is necessary to select a material having a high conductivity of metal ions and capable of vapor phase etching processing in an LSI production line.
 イオン伝導層0404の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する三層構造の側面に、GeSbTeからなるイオン伝導層0404を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One of the candidate materials that can be used to fabricate the ion conductive layer 0404 is chalcogenide GeSbTe, which is used as a material for the phase change layer in the phase change element. As a means for forming the ion conductive layer 0404 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of forming a film by sputtering using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層0404の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 0404 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 第3電極として利用される、第1配線B0410は、イオン伝導層0404に金属イオンを供給可能な金属材料で構成される。例えば、主金属はCuで、Alなどとの合金でも良い。 The first wiring B0410 used as the third electrode is made of a metal material capable of supplying metal ions to the ion conductive layer 0404. For example, the main metal is Cu, and an alloy with Al or the like may be used.
 (スイッチング動作)
 図4に示す第二の実施形態の「3端子スイッチ」における、ON/OFF動作(スイッチング)時の駆動方法を説明する。
(Switching operation)
A driving method during ON / OFF operation (switching) in the “3-terminal switch” of the second embodiment shown in FIG. 4 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 OFF状態からON状態への遷移時には、例えば、第1電極0401、第2電極0402を接地して、第3電極として利用される、第1配線B0410に正電圧(+VON>0V)を印加する。第1配線B0410とイオン伝導層0404の界面では、印加される正電圧に起因する電界によって、金属がイオン化(酸化)され、生成する金属イオンがイオン伝導層0404中に供給される。供給される金属イオンは、イオン伝導層0404中の電界によって、第2電極0402、第1電極0401側にマイグレーションする。マイグレーションした金属イオンは、第2電極0402、第1電極0401からイオン伝導層0404中に注入される電子を受け取り、金属へと還元される。この電気化学反応によって、第2電極0402の表面、第1電極0401の表面(側壁面)の下端から、金属の析出が開始する。第1電極0401、第2電極0402と、第1配線B0410(第3電極)の間の電気力線に従って、金属架橋0405の形成が進行する。第2電極0402の表面、第1電極0401の表面(側壁面)の下端から形成される金属架橋0405が、層間絶縁膜0403の側壁面に沿って、第2電極0402の表面(側壁面)の上端と第1電極0401の表面(側壁面)の下端を連結する導通経路を形成すると、第1電極0401と第2電極0402の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
At the time of transition from the OFF state to the ON state, for example, the first electrode 0401 and the second electrode 0402 are grounded, and a positive voltage (+ V ON > 0 V) is applied to the first wiring B 0410 used as the third electrode. . At the interface between the first wiring B0410 and the ion conductive layer 0404, the metal is ionized (oxidized) by the electric field caused by the applied positive voltage, and the generated metal ions are supplied into the ion conductive layer 0404. The supplied metal ions migrate to the second electrode 0402 and the first electrode 0401 side by an electric field in the ion conductive layer 0404. The migrated metal ions receive electrons injected into the ion conductive layer 0404 from the second electrode 0402 and the first electrode 0401 and are reduced to metal. By this electrochemical reaction, metal deposition starts from the lower end of the surface of the second electrode 0402 and the surface (side wall surface) of the first electrode 0401. Formation of the metal bridge 0405 proceeds in accordance with the lines of electric force between the first electrode 0401, the second electrode 0402, and the first wiring B0410 (third electrode). A metal bridge 0405 formed from the lower surface of the surface of the second electrode 0402 and the surface (side wall surface) of the first electrode 0401 extends along the side wall surface of the interlayer insulating film 0403 on the surface (side wall surface) of the second electrode 0402. When a conduction path that connects the upper end and the lower end of the surface (side wall surface) of the first electrode 0401 is formed, the resistance value between the first electrode 0401 and the second electrode 0402 becomes low, and the ON state is established.
 OFF状態からON状態への遷移時のバイアスは、第1配線B0410(第3電極)を接地して、第1電極0401、第2電極0402に負電圧(-VON<0V)を印加する形態でも良い。 As a bias at the time of transition from the OFF state to the ON state, the first wiring B0410 (third electrode) is grounded, and a negative voltage (−V ON <0 V) is applied to the first electrode 0401 and the second electrode 0402. But it ’s okay.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、ON状態からOFF状態への遷移時には、例えば、例えば、第1電極0401、第2電極0402を接地して、第3電極として利用される、第1配線B0410に負電圧(-VOFF<0V)を印加する。まず、第1電極0401、第2電極0402側において、金属架橋0405を構成する金属のイオン化(酸化)と、イオン伝導層0404中への金属イオンの溶出が進行する(溶解反応)。イオン伝導層0404中に溶出した金属イオンは、イオン伝導層0404中に形成されている電界によって、第1配線B0410(第3電極)の表面に向かってマイグレーションする。第1配線B0410(第3電極)の表面から、イオン伝導層0404中へ注入される電子によって、金属イオンは還元される。生成する金属は、第1配線B0410(第3電極)の表面に再析出する。金属架橋0405の溶解が進行し、層間絶縁膜0403の側壁面に沿って、第2電極0402の表面(側壁面)の上端と第1電極0401の表面(側壁面)の下端を連結する導通経路が途絶えると、第1電極0401と第2電極0402の間の抵抗値が高抵抗となり、OFF状態となる。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, at the time of transition from the ON state to the OFF state, for example, the first electrode B401 and the second electrode 0402 are grounded, and a negative voltage (−V OFF < 0V) is applied. First, on the first electrode 0401 and second electrode 0402 side, ionization (oxidation) of the metal constituting the metal bridge 0405 and elution of metal ions into the ion conductive layer 0404 proceed (dissolution reaction). The metal ions eluted in the ion conductive layer 0404 migrate toward the surface of the first wiring B0410 (third electrode) by the electric field formed in the ion conductive layer 0404. Metal ions are reduced by electrons injected into the ion conductive layer 0404 from the surface of the first wiring B0410 (third electrode). The generated metal is re-deposited on the surface of the first wiring B0410 (third electrode). The dissolution of the metal bridge 0405 proceeds, and a conduction path that connects the upper end of the surface (sidewall surface) of the second electrode 0402 and the lower end of the surface (sidewall surface) of the first electrode 0401 along the side wall surface of the interlayer insulating film 0403. When the current stops, the resistance value between the first electrode 0401 and the second electrode 0402 becomes high resistance, and the OFF state is entered.
 ON状態からOFF状態への遷移時のバイアスは、第1配線B0410(第3電極)を接地して、第1電極0401、第2電極0402に正電圧(+VOFF>0V)を印加する形態でも良い。 The bias at the time of transition from the ON state to the OFF state is also a mode in which the first wiring B0410 (third electrode) is grounded and a positive voltage (+ V OFF > 0 V) is applied to the first electrode 0401 and the second electrode 0402. good.
 図4に示す第二の実施形態の「3端子スイッチ」を構成する、第1電極0401と第2電極0402の側面が曲率を有することで、ON/OFF動作(スイッチング)時、第1電極0401、第2電極0402と、第1配線B0410(第3電極)の間に印加されるスイッチング電圧によりイオン伝導層中に形成される電界は、この曲率部分に集中し、安定かつバラツキが小さいスイッチング動作が得られる。 The side surfaces of the first electrode 0401 and the second electrode 0402 constituting the “three-terminal switch” of the second embodiment shown in FIG. 4 have curvature, so that the first electrode 0401 is turned on during the ON / OFF operation (switching). The electric field formed in the ion conductive layer by the switching voltage applied between the second electrode 0402 and the first wiring B0410 (third electrode) is concentrated on this curvature portion, and switching operation is stable and has little variation. Is obtained.
 (第一の実施態様)
 本発明の第二の実施形態にかかる、第一の実施態様の3端子スイッチング素子について説明する。
(First embodiment)
A three-terminal switching element according to the first embodiment according to the second embodiment of the present invention will be described.
 該第一の実施態様の3端子スイッチング素子は、半導体装置に設ける多層配線層内部に形成されている。図5に、半導体装置に設ける多層配線層内部に形成されている、該第一の実施態様の3端子スイッチング素子0520の構造を示す。 The three-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device. FIG. 5 shows the structure of the three-terminal switching element 0520 of the first embodiment, which is formed inside a multilayer wiring layer provided in the semiconductor device.
 図5に示す半導体装置に設ける多層配線層は、第1金属膜0508と電気的に接続されているプラグ0506、該プラグ0506と一体に作製されている第2配線0512、第2金属膜0509に接続された第1配線A0507、ならびに、第3電極として利用される、第1配線B0522を備えている。第1金属膜0508と第2金属膜0509との間にバリア絶縁膜0503が挟まれており、第1金属膜0508、バリア絶縁膜0503、第2金属膜0509からなる三層構造は、ハードマスク0518をエッチングマスクとして利用し、エッチング加工を施すことで、同一の平面形状にパターニングされている。パターニングされた三層構造の側面には、第1金属膜0508の側壁部、バリア絶縁膜0503の側壁部、第2金属膜0509の側壁部が露呈している。 The multilayer wiring layer provided in the semiconductor device illustrated in FIG. 5 includes a plug 0506 electrically connected to the first metal film 0508, a second wiring 0512 and a second metal film 0509 that are integrally formed with the plug 0506. The first wiring A 0507 connected and the first wiring B 0522 used as the third electrode are provided. A barrier insulating film 0503 is sandwiched between the first metal film 0508 and the second metal film 0509. The three-layer structure including the first metal film 0508, the barrier insulating film 0503, and the second metal film 0509 has a hard mask. By using 0518 as an etching mask and performing etching, it is patterned in the same planar shape. On the side surface of the patterned three-layer structure, the side wall portion of the first metal film 0508, the side wall portion of the barrier insulating film 0503, and the side wall portion of the second metal film 0509 are exposed.
 パターニングされた三層構造の側面の一部は、イオン伝導層0504に接触しており、イオン伝導層0504と接触している第1金属膜0508の側壁部が、第1電極0501として使用され、イオン伝導層0504と接触している第2金属膜0509の側壁部が、第2電極0502として使用されている。第3電極として利用される、第1配線B0522の表面の一部は、バリア絶縁膜0505の開口部において、イオン伝導層0504に接触している。 A part of the side surface of the patterned three-layer structure is in contact with the ion conductive layer 0504, and the side wall portion of the first metal film 0508 in contact with the ion conductive layer 0504 is used as the first electrode 0501. A side wall portion of the second metal film 0509 that is in contact with the ion conductive layer 0504 is used as the second electrode 0502. A part of the surface of the first wiring B 0522 used as the third electrode is in contact with the ion conductive layer 0504 in the opening of the barrier insulating film 0505.
 3端子スイッチ0520は、第3電極として利用される、第1配線B0522、第1電極0501、第2電極0502と、イオン伝導層0504により構成される。 The three-terminal switch 0520 includes a first wiring B 0522, a first electrode 0501, a second electrode 0502, and an ion conductive layer 0504 that are used as a third electrode.
 多層配線層は、半導体基板0519上にて、層間絶縁膜0513、バリア絶縁膜0505、保護絶縁膜0523、イオン伝導層0504、バリア絶縁膜0514、層間絶縁膜0515、層間絶縁膜0516、及びバリア絶縁膜0517の順に積層した絶縁積層体を有する。 The multilayer wiring layer includes an interlayer insulating film 0513, a barrier insulating film 0505, a protective insulating film 0523, an ion conductive layer 0504, a barrier insulating film 0514, an interlayer insulating film 0515, an interlayer insulating film 0516, and a barrier insulating layer on the semiconductor substrate 0519. An insulating stacked body in which the films 0517 are stacked in this order is included.
 層間絶縁膜0516に形成された配線溝に第2配線0512が埋め込まれており、層間絶縁膜0515、バリア絶縁膜0514、イオン伝導層0504、保護絶縁膜0523及びハードマスク0518に形成された下穴にプラグ0506が埋め込まれており、第2配線0512とプラグ0506がそれぞれ一体となっており、第2配線0520およびプラグ0506の側面及び底面が第2バリアメタル0511によって覆われている。 A second wiring 0512 is embedded in a wiring groove formed in the interlayer insulating film 0516, and pilot holes formed in the interlayer insulating film 0515, the barrier insulating film 0514, the ion conductive layer 0504, the protective insulating film 0523, and the hard mask 0518. The plug 0506 is embedded in the second wiring 0512 and the plug 0506, and the second wiring 0520 and the side surface and bottom surface of the plug 0506 are covered with the second barrier metal 0511.
 イオン伝導層0504と層間絶縁膜0515の間には、バリア絶縁膜0514が設けられており、該バリア絶縁膜0514を利用して、イオン伝導層0504から層間絶縁膜0515への金属イオンの拡散を防止している。また、イオン伝導層0504と層間絶縁膜0513の間には、保護絶縁膜0523、バリア絶縁膜0505が設けられており、保護絶縁膜0523、バリア絶縁膜0505を利用して、イオン伝導層0504から層間絶縁膜0513への金属イオンの拡散を防止している。 A barrier insulating film 0514 is provided between the ion conductive layer 0504 and the interlayer insulating film 0515, and diffusion of metal ions from the ion conductive layer 0504 to the interlayer insulating film 0515 is performed using the barrier insulating film 0514. It is preventing. In addition, a protective insulating film 0523 and a barrier insulating film 0505 are provided between the ion conductive layer 0504 and the interlayer insulating film 0513. The protective insulating film 0523 and the barrier insulating film 0505 are used to start from the ion conductive layer 0504. Diffusion of metal ions into the interlayer insulating film 0513 is prevented.
 また、バリア絶縁膜0505は、層間絶縁膜0513の上面と、第1配線A0507の上面、第1配線B0522の上面を被覆しており、第1配線A0507の上面部と第1配線B0522の上面部に開口部が形成されている。この開口部を介して、第2金属膜0509と第1配線A0507の上面部との電気的接続がなされている。また、開口部を介して、第1配線B0522の表面に、イオン伝導層0504が接触している。従って、バリア絶縁膜0505は、第2金属膜0509と層間絶縁膜0513の上面との接触を防止している。その結果、第2金属膜0509を構成する金属の層間絶縁膜0513中への拡散を防止している。 The barrier insulating film 0505 covers the upper surface of the interlayer insulating film 0513, the upper surface of the first wiring A0507, and the upper surface of the first wiring B0522, and the upper surface portion of the first wiring A0507 and the upper surface portion of the first wiring B0522. An opening is formed in the. The second metal film 0509 and the upper surface portion of the first wiring A0507 are electrically connected through this opening. Further, the ion conductive layer 0504 is in contact with the surface of the first wiring B 0522 through the opening. Therefore, the barrier insulating film 0505 prevents contact between the second metal film 0509 and the upper surface of the interlayer insulating film 0513. As a result, diffusion of the metal constituting the second metal film 0509 into the interlayer insulating film 0513 is prevented.
 3端子スイッチ0520は、開口されたバリア絶縁膜0505上に、加工された第2電極0502を構成する第2金属膜0509、バリア絶縁膜0503、第1電極0501を構成している第1金属膜0508、ハードマスク0508、保護絶縁膜0523、別の開口されたバリア絶縁膜0505の下に第3電極を兼ねた第1配線B0522があり、保護絶縁膜0523の上面とハードマスク0518、第1金属膜0508、バリア絶縁膜0503、第2金属膜0509の側面、及び、第1配線B0522の上面を覆うように、イオン伝導層0504が形成されており、その上にバリア絶縁膜0514が形成されている。 The three-terminal switch 0520 includes a second metal film 0509, a barrier insulating film 0503, and a first metal film 0501 that form the processed second electrode 0502 on the opened barrier insulating film 0505. 0508, a hard mask 0508, a protective insulating film 0523, and a first wiring B 0522 also serving as a third electrode under another opened barrier insulating film 0505. The upper surface of the protective insulating film 0523, the hard mask 0518, and the first metal An ion conductive layer 0504 is formed so as to cover the side surfaces of the film 0508, the barrier insulating film 0503, the second metal film 0509, and the upper surface of the first wiring B 0522, and the barrier insulating film 0514 is formed thereon. Yes.
 3端子スイッチ0520は、第1電極0501を構成する第1金属膜0508がプラグ0506と第2バリアメタル0511を介して電気的に接続されている。また、第2電極0502を構成する第2金属膜0509は、バリア絶縁膜0205に開口された開口部を介して第1配線A0507及び第1バリアメタルA0510と電気的に接続されている。また、第3電極は第1配線B0522が兼ねている。 In the three-terminal switch 0520, the first metal film 0508 constituting the first electrode 0501 is electrically connected through the plug 0506 and the second barrier metal 0511. In addition, the second metal film 0509 constituting the second electrode 0502 is electrically connected to the first wiring A 0507 and the first barrier metal A 0510 through an opening opened in the barrier insulating film 0205. The third electrode also serves as the first wiring B0522.
 第1電極0501を構成する第1金属膜0508は2層構造となっており、プラグ0506に接する面(上層)には、第2バリアメタル0511と同じ材料を用いる。このようにすることで、プラグ0506の第2バリアメタル0511と、第1電極0501を構成する第1金属膜0508の上層とが一体化し、接触抵抗を低減し、かつ、密着性の向上による信頼性の向上を実現することができる。 The first metal film 0508 constituting the first electrode 0501 has a two-layer structure, and the same material as the second barrier metal 0511 is used for the surface (upper layer) in contact with the plug 0506. By doing so, the second barrier metal 0511 of the plug 0506 and the upper layer of the first metal film 0508 constituting the first electrode 0501 are integrated to reduce contact resistance and to improve reliability by improving adhesion. The improvement of property can be realized.
 半導体基板0519は、半導体素子が形成された基板である。半導体基板0519には、例えば、シリコン基板、単結晶基板、SOI(Silicon on Insulator)基板、TFT(Thin Film Transistor)基板、液晶製造用基板等の基板を用いることができる。 The semiconductor substrate 0519 is a substrate on which a semiconductor element is formed. As the semiconductor substrate 0519, for example, a substrate such as a silicon substrate, a single crystal substrate, an SOI (Silicon-on-Insulator) substrate, a TFT (Thin-Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
 層間絶縁膜0513は、半導体基板0519上に形成された絶縁膜である。層間絶縁膜0513には、例えば、SiO2、シリコン酸化膜よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)等を用いることができる。層間絶縁膜0513は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0513には、第1配線A0507及び第1配線B0522を埋め込むための配線溝が形成されており、当該配線溝に第1バリアメタルA0510を介して第1配線A0507が、第1バリアメタルB0521を介して第1配線層B0522が埋め込まれている。 The interlayer insulating film 0513 is an insulating film formed over the semiconductor substrate 0519. As the interlayer insulating film 0513, for example, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 or a silicon oxide film can be used. The interlayer insulating film 0513 may be a stack of a plurality of insulating films. In the interlayer insulating film 0513, a wiring groove for embedding the first wiring A0507 and the first wiring B0522 is formed, and the first wiring A0507 is inserted into the wiring groove via the first barrier metal A0510. A first wiring layer B0522 is embedded via B0521.
 第1配線A0507及び第1配線B0522は、層間絶縁膜0513に形成された配線溝に第1バリアメタルA0510及び第1バリアメタルB0521を介して埋め込まれた配線である。第1配線A0507は、第2電極0502を形成する第2金属膜0509と直接接している。第1配線B0522はイオン伝導層0504と直接接している。第1配線A0507及び第1配線B0522はCuで構成されているが、Alと合金化されていてもよい。第1配線B0522は3端子イオン伝導層0504中にCuイオンを供給する第3電極として機能する。 The first wiring A 0507 and the first wiring B 0522 are wirings embedded in the wiring trench formed in the interlayer insulating film 0513 via the first barrier metal A 0510 and the first barrier metal B 0521. The first wiring A 0507 is in direct contact with the second metal film 0509 that forms the second electrode 0502. The first wiring B 0522 is in direct contact with the ion conductive layer 0504. The first wiring A0507 and the first wiring B0522 are made of Cu, but may be alloyed with Al. The first wiring B 0522 functions as a third electrode that supplies Cu ions into the three-terminal ion conductive layer 0504.
 第1バリアメタルA0510及び第1バリアメタルB0521は、第1配線A0507及び第1配線B0522を構成する金属が層間絶縁膜0513や下層へ拡散することを防止するために、配線の側面および底面を被覆する、バリア性を有する導電性膜である。第1バリアメタルA0510及び第1バリアメタルB0521には、例えば、第1配線A0507及び第1配線B0522がCuを主成分とする金属元素からなる場合には、タンタル(Ta)、窒化タンタル(TaN)、窒化チタン(TiN)、炭窒化タングステン(WCN)のような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The first barrier metal A0510 and the first barrier metal B0521 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A0507 and the first wiring B0522 from diffusing into the interlayer insulating film 0513 and the lower layer. It is a conductive film having a barrier property. As the first barrier metal A0510 and the first barrier metal B0521, for example, when the first wiring A0507 and the first wiring B0522 are made of a metal element whose main component is Cu, tantalum (Ta), tantalum nitride (TaN) Alternatively, a refractory metal such as titanium nitride (TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
 バリア絶縁膜0505は、第1配線A0507及び第1配線B0522を含む層間絶縁膜0513上に形成され、第1配線A0507及び第1配線B0522を構成する金属(例えば、Cu)の酸化を防いだり、イオン伝導層0504中への第1配線A0507及び第1配線B0522を構成する金属の拡散を防ぐ役割を有する。バリア絶縁膜0505には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0505 is formed over the interlayer insulating film 0513 including the first wiring A0507 and the first wiring B0522, and prevents the metal (for example, Cu) constituting the first wiring A0507 and the first wiring B0522 from being oxidized. It has a role of preventing diffusion of the metal constituting the first wiring A 0507 and the first wiring B 0522 into the ion conductive layer 0504. For the barrier insulating film 0505, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 バリア絶縁膜0505は、第1配線A0507及び第1配線B0522上にて開口部を有する。バリア絶縁膜0505の開口部においては、第1配線A0507と第2電極0502を構成する第2金属膜0209が接し、第1配線B0522とイオン伝導層0504が接している。バリア絶縁膜0505の開口部は、第1配線A0507及び第1配線B0522、それぞれの領域内に形成されている。バリア絶縁膜0505の開口部の壁面は、第1配線A0507及び第1配線B0522から離れるにしたがい広くなったテーパ面となっている。バリア絶縁膜0510の開口部壁面のテーパ角θtaperは、第1配線0207の上面に対し、85°以下(θtaper≦85°)に設定されている。 The barrier insulating film 0505 has an opening over the first wiring A0507 and the first wiring B0522. In the opening of the barrier insulating film 0505, the first wiring A0507 and the second metal film 0209 constituting the second electrode 0502 are in contact with each other, and the first wiring B0522 and the ion conductive layer 0504 are in contact with each other. The opening of the barrier insulating film 0505 is formed in each region of the first wiring A0507 and the first wiring B0522. The wall surface of the opening of the barrier insulating film 0505 is a tapered surface that becomes wider as the distance from the first wiring A 0507 and the first wiring B 0522 increases. The taper angle θ taper of the wall surface of the opening of the barrier insulating film 0510 is set to 85 ° or less (θ taper ≦ 85 °) with respect to the upper surface of the first wiring 0207.
 第2電極0502および第1電極0501は、3端子スイッチ0520において信号を伝達する電極であり、イオン伝導層0504と直接接している。第2電極0502を構成する第2金属膜0509はイオン化しにくく、イオン伝導層0504に拡散もしくは伝導しにくい金属が用いられる。例えば、Pt、Ru等を用いることができる。第2電極0502は第2金属膜0509の側壁部である。第1電極0501を構成する第1金属膜0508は、異なる金属の2層で構成される。第1電極0501は第1金属膜0508の側壁部である。バリア絶縁膜0503およびイオン伝導層0504に接する下層はイオン化しにくく、イオン伝導層0504に拡散もしくは伝導しにくい金属が用いられる。例えば、Pt、Ru等を用いることができる。また、第1電極0501を構成する第1金属膜0508の上層は、ハードマスク0518およびイオン伝導層0504に接する。第1金属膜0508の上層は、下層を保護する役割を有する。すなわち、上層が下層を保護することで、プロセス中の下層へのダメージを抑制し、3端子スイッチ0520のスイッチング特性を維持することができる。この上層には、例えば、Ta、Ti、W、Alあるいはそれらの窒化物等を用いることができる。第1金属膜0507の上層は、第2バリアメタル0511を介してプラグ0506と電気的に接続されている。 The second electrode 0502 and the first electrode 0501 are electrodes that transmit signals in the three-terminal switch 0520, and are in direct contact with the ion conductive layer 0504. The second metal film 0509 constituting the second electrode 0502 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0504. For example, Pt, Ru, etc. can be used. The second electrode 0502 is a side wall portion of the second metal film 0509. The first metal film 0508 constituting the first electrode 0501 is composed of two layers of different metals. The first electrode 0501 is a side wall portion of the first metal film 0508. The lower layer in contact with the barrier insulating film 0503 and the ion conductive layer 0504 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0504. For example, Pt, Ru, etc. can be used. Further, the upper layer of the first metal film 0508 constituting the first electrode 0501 is in contact with the hard mask 0518 and the ion conductive layer 0504. The upper layer of the first metal film 0508 has a role of protecting the lower layer. That is, when the upper layer protects the lower layer, damage to the lower layer during the process can be suppressed, and the switching characteristics of the three-terminal switch 0520 can be maintained. For this upper layer, for example, Ta, Ti, W, Al or nitrides thereof can be used. The upper layer of the first metal film 0507 is electrically connected to the plug 0506 through the second barrier metal 0511.
 バリア絶縁膜0503は、第1電極0501を構成する第1金属膜0508と第2電極0502を構成する第2金属膜0509に挟まれて設けられている。バリア絶縁膜0503は第1電極0501を構成する第1金属膜0508と第2電極0502を構成する第2金属膜0509が短絡しないように、両者を絶縁する役割を有する。バリア絶縁膜0503には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0503 is provided between the first metal film 0508 constituting the first electrode 0501 and the second metal film 0509 constituting the second electrode 0502. The barrier insulating film 0503 has a role of insulating the first metal film 0508 constituting the first electrode 0501 and the second metal film 0509 constituting the second electrode 0502 so that they are not short-circuited. For the barrier insulating film 0503, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 イオン伝導層0504は、金属イオン(Cuイオン)が電界で移動可能な膜である。イオン伝導層0504は、イオン伝導層が含む金属の作用(拡散、イオン伝動など)により抵抗が変化する材料を用いることができる。3端子スイッチ0520の抵抗変化を、金属架橋の形成・消滅によって行う場合には、第3電極を兼ねる第1配線B0522より供給される金属イオンが、イオン伝導可能な膜が用いられる。金属イオンは、Cuイオンとして、第3電極を兼ねる第1配線B0522より供給される。バリア絶縁膜0514には、プラグ0514を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0511を介してプラグ0506が埋め込まれている。 The ion conductive layer 0504 is a film in which metal ions (Cu ions) can move in an electric field. For the ion conductive layer 0504, a material whose resistance is changed by the action of metal (diffusion, ion transmission, etc.) included in the ion conductive layer can be used. When the resistance change of the three-terminal switch 0520 is performed by forming / disappearing a metal bridge, a film is used in which metal ions supplied from the first wiring B 0522 that also serves as the third electrode can conduct ions. Metal ions are supplied as Cu ions from the first wiring B 0522 that also serves as the third electrode. A pilot hole for embedding the plug 0514 is formed in the barrier insulating film 0514, and the plug 0506 is embedded in the pilot hole via the second barrier metal 0511.
 イオン伝導層0504の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する三層構造の側面に、GeSbTeからなるイオン伝導層0504を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One of the candidate materials that can be used to fabricate the ion conductive layer 0504 is chalcogenide GeSbTe, which is used as a material for the phase change layer in the phase change element. As a means for forming the ion conductive layer 0504 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層0504の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 0504 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 ハードマスク0518は、第1電極0501を構成する第1金属膜0508、バリア絶縁膜0503、第2電極0502を構成する第2金属膜0509をエッチングする際のハードマスクとなる膜である。ハードマスク0518には、例えば、SiN膜やSiO2膜、もしくはこれらの積層を用いることができる。 The hard mask 0518 is a film serving as a hard mask when the first metal film 0508 constituting the first electrode 0501, the barrier insulating film 0503, and the second metal film 0509 constituting the second electrode 0502 are etched. For the hard mask 0518, for example, a SiN film, a SiO 2 film, or a laminate thereof can be used.
 保護絶縁膜0523は、第1電極0501を構成する第1金属膜0508、バリア絶縁膜0503、第2電極0502を構成する第2金属膜0509の側面を、第3電極を兼ねる第1配線B0522上のバリア絶縁膜0503を開口する際のアッシング処理から保護するために用いられる膜である。アッシング処理には酸素プラズマを使用するため、第1金属膜0508及び第2金属膜0509の側面である第1電極0501と第2電極0509が酸化されてしまう。保護絶縁膜0523には、例えば、SiN膜やSiCN膜、もしくはこれらの積層を用いることができる。 The protective insulating film 0523 has the side surfaces of the first metal film 0508 forming the first electrode 0501, the barrier insulating film 0503, and the second metal film 0509 forming the second electrode 0502 on the first wiring B 0522 that also serves as the third electrode. The barrier insulating film 0503 is a film used for protection from ashing treatment when opening. Since oxygen plasma is used for the ashing treatment, the first electrode 0501 and the second electrode 0509 which are side surfaces of the first metal film 0508 and the second metal film 0509 are oxidized. As the protective insulating film 0523, for example, a SiN film, a SiCN film, or a stacked layer thereof can be used.
 バリア絶縁膜0514は、3端子スイッチ0520にダメージを与えることなく、さらにイオン伝導層0504に含まれる金属イオン(Cuイオン)の層間絶縁膜0515への拡散を防ぐ機能を有する絶縁膜である。バリア絶縁膜0514には、例えば、SiN膜、SiCN膜等を用いることができる。バリア絶縁膜0514は、バリア絶縁膜0505と同一材料であることが好ましい。バリア絶縁膜0514には、プラグ0506を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0511を介してプラグ0506が埋め込まれている。 The barrier insulating film 0514 is an insulating film having a function of preventing diffusion of metal ions (Cu ions) contained in the ion conductive layer 0504 into the interlayer insulating film 0515 without damaging the three-terminal switch 0520. As the barrier insulating film 0514, for example, a SiN film, a SiCN film, or the like can be used. The barrier insulating film 0514 is preferably made of the same material as the barrier insulating film 0505. A pilot hole for embedding the plug 0506 is formed in the barrier insulating film 0514, and the plug 0506 is embedded in the pilot hole via the second barrier metal 0511.
 層間絶縁膜0515は、バリア絶縁膜0514上に形成された絶縁膜である。層間絶縁膜0515には、例えば、SiO2、SiOC膜などを用いることができる。層間絶縁膜0515は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0515は、層間絶縁膜0513、層間絶縁膜0516と同一材料としてもよい。層間絶縁膜0515には、プラグ0506を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0511を介してプラグ0506が埋め込まれている。 The interlayer insulating film 0515 is an insulating film formed over the barrier insulating film 0514. For the interlayer insulating film 0515, for example, a SiO 2 , SiOC film or the like can be used. The interlayer insulating film 0515 may be a stack of a plurality of insulating films. The interlayer insulating film 0515 may be made of the same material as the interlayer insulating film 0513 and the interlayer insulating film 0516. A pilot hole for embedding the plug 0506 is formed in the interlayer insulating film 0515, and the plug 0506 is embedded in the pilot hole via the second barrier metal 0511.
 層間絶縁膜0516は、層間絶縁膜0515上に形成された絶縁膜である。層間絶縁膜0516には、例えば、SiO2、SiOC膜、SiO2よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)などを用いることができる。層間絶縁膜0516は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0516は、層間絶縁膜0515、層間絶縁膜0513と同一材料としてもよい。また、層間絶縁膜0516と層間絶縁膜0515を異なる絶縁材料を用いて作製し、そのエッチング特性に有意な差異を設けることもできる。層間絶縁膜0516には、第2配線0512埋め込むための配線溝が形成されており、当該配線溝に第2バリアメタル0511を介して第2配線0512が埋め込まれている。 The interlayer insulating film 0516 is an insulating film formed over the interlayer insulating film 0515. As the interlayer insulating film 0516, for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used. The interlayer insulating film 0516 may be a stack of a plurality of insulating films. The interlayer insulating film 0516 may be formed of the same material as the interlayer insulating film 0515 and the interlayer insulating film 0513. Alternatively, the interlayer insulating film 0516 and the interlayer insulating film 0515 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics. In the interlayer insulating film 0516, a wiring groove for embedding the second wiring 0512 is formed, and the second wiring 0512 is embedded in the wiring groove via the second barrier metal 0511.
 第2配線0512は、層間絶縁膜0516に形成された配線溝に第2バリアメタル0511を介して埋め込まれた配線である。第2配線0512は、プラグ0506と一体になっている。プラグ0506は、層間絶縁膜0515、バリア絶縁膜0514、及びハードマスク0518に形成された下穴に第2バリアメタル0511を介して埋め込まれている。プラグ0506は、第2バリアメタル0511を介して第1電極0501を構成する第1金属膜0508と電気的に接続されている。第2配線0512及びプラグ0506には、例えば、Cuを用いることができる。 The second wiring 0512 is a wiring embedded in the wiring trench formed in the interlayer insulating film 0516 via the second barrier metal 0511. The second wiring 0512 is integrated with the plug 0506. The plug 0506 is embedded in the prepared holes formed in the interlayer insulating film 0515, the barrier insulating film 0514, and the hard mask 0518 via the second barrier metal 0511. The plug 0506 is electrically connected to the first metal film 0508 constituting the first electrode 0501 through the second barrier metal 0511. For example, Cu can be used for the second wiring 0512 and the plug 0506.
 第2バリアメタル0511は、第2配線0512(プラグ0506を含む)を構成する金属が層間絶縁膜0516や層間絶縁膜0515や下層へ拡散することを防止するために、第2配線0512及びプラグ0506の側面および底面を被覆する、バリア性を有する導電性膜である。第2バリアメタル0512には、例えば、第2配線0512及びプラグ0506がCuを主成分とする金属元素からなる場合には、Ta、TaN、TiN、WCNのような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The second barrier metal 0511 has the second wiring 0512 and the plug 0506 in order to prevent the metal constituting the second wiring 0512 (including the plug 0506) from diffusing into the interlayer insulating film 0516, the interlayer insulating film 0515, or the lower layer. It is the electroconductive film which has the barrier property which coat | covers the side surface and bottom face of this. For example, when the second wiring 0512 and the plug 0506 are made of a metal element whose main component is Cu, the second barrier metal 0512 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
 バリア絶縁膜0517は、第2配線0512を含む層間絶縁膜0516上に形成され、第2配線0517を構成する金属(例えば、Cu)の酸化を防いだり、上層への第2配線0512を構成する金属の拡散を防ぐ役割を有する絶縁膜である。バリア絶縁膜0517には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0517 is formed on the interlayer insulating film 0516 including the second wiring 0512, prevents oxidation of the metal (for example, Cu) constituting the second wiring 0517, and configures the second wiring 0512 to the upper layer. It is an insulating film having a role of preventing metal diffusion. For the barrier insulating film 0517, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 (スイッチング動作)
 図5に示す、第一の実施態様の3端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the three-terminal switch of the first embodiment shown in FIG. 5 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 まず第2電極0502を第2電極0502と電気的に接続されている第2金属膜0509を第1配線0507を介して、第1電極0501を、第1電極0501と電気的に接続されている第1金属膜0508、プラグ0506、第2配線0512を介して、それぞれ接地する。さらに、第3電極を兼ねる第1配線B0522に正電圧(+VON>0V)を印加すると第3電極を兼ねる第1配線B0522から金属イオン(Cuイオン)がイオン伝導層0504中へ拡散し、第1電極0501及び第2電極0502側にマイグレーションする。マイグレーションした金属イオンは、第1電極0501及び第2電極0502より電子を受け取り、電気化学反応によって金属架橋0524が析出する。これによって第1電極0501と第2電極0502の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
First, the second electrode 0502 is electrically connected to the second electrode 0502. The second metal film 0509 is electrically connected to the first electrode 0501 through the first wiring 0507. The first metal film 0508, the plug 0506, and the second wiring 0512 are grounded. Further, when a positive voltage (+ V ON > 0 V) is applied to the first wiring B 0522 also serving as the third electrode, metal ions (Cu ions) are diffused from the first wiring B 0522 also serving as the third electrode into the ion conductive layer 0504, Migrate to the first electrode 0501 and the second electrode 0502 side. The migrated metal ions receive electrons from the first electrode 0501 and the second electrode 0502, and a metal bridge 0524 is deposited by an electrochemical reaction. As a result, the resistance value between the first electrode 0501 and the second electrode 0502 becomes low resistance, and is turned on.
 ON状態への遷移は、第3電極を兼ねる第1配線B0522を接地して、第1電極0501及び第2電極0502に負電圧(-VON<0V)を印加しても良い。 In the transition to the ON state, the first wiring B 0522 also serving as the third electrode may be grounded, and a negative voltage (−V ON <0 V) may be applied to the first electrode 0501 and the second electrode 0502.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、第2電極0502を第2電極0502と電気的に接続されている第2金属膜0509を第1配線0507を介して、第1電極0501を第1電極0501と電気的に接続されている第1金属膜0508、プラグ0506、第2配線0512を介して、それぞれ接地し、第3電極を兼ねる第1配線B0522に負電圧(=VOFF<0V)を印加すると、金属架橋0521の溶解反応が進行し、金属架橋0524は金属イオン(Cuイオン)となって、イオン伝導層0504中に分散する。これによって、第1電極0501と第2電極0502の間の抵抗値が高抵抗となり、OFF状態に遷移する。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, the second electrode 0502 is electrically connected to the second electrode 0502. The second metal film 0509 is electrically connected to the first electrode 0501 through the first wiring 0507. When a negative voltage (= V OFF <0 V) is applied to the first wiring B 0522 that is grounded via the first metal film 0508, the plug 0506, and the second wiring 0512 and also serves as the third electrode, the dissolution reaction of the metal bridge 0521 The metal bridge 0524 becomes metal ions (Cu ions) and is dispersed in the ion conductive layer 0504. As a result, the resistance value between the first electrode 0501 and the second electrode 0502 becomes high resistance, and transitions to the OFF state.
 OFF状態への遷移は、第3電極を兼ねる第1配線B0522を接地して、第1電極0501及び第2電極0502に正電圧(+VOFF>0V)を印加しても良い。 In the transition to the OFF state, the first wiring B 0522 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 0501 and the second electrode 0502.
 第1電極0501と第2電極0502の側面形状が曲率を有することで、ON状態とOFF状態へのスイッチング時、スイッチング電圧を印加する際、該曲率部分に電界が集中し、安定かつバラツキが小さいスイッチング動作が得られる。 Since the side surfaces of the first electrode 0501 and the second electrode 0502 have curvature, an electric field concentrates on the curvature portion when switching voltage is applied when switching between the ON state and the OFF state, and the variation is stable and small in variation. Switching operation is obtained.
 (製造プロセス)
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置において、図5に示す、第一の実施態様の3端子スイッチング素子を、前記抵抗変化型不揮発性スイッチング素子として作製する際の製造プロセスを説明する。図6-1と図6-2が、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図である。図6-1は、該製造工程中、工程1~工程5を示す図であり、図6-2は、該製造工程中、工程6~工程10を示す図である。
(Manufacturing process)
In a semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate, the three-terminal switching element of the first embodiment shown in FIG. A manufacturing process for manufacturing a nonvolatile switching element will be described. FIGS. 6A and 6B are cross-sectional views schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment. FIG. 6A is a diagram illustrating steps 1 to 5 in the manufacturing process, and FIG. 6B is a diagram illustrating steps 6 to 10 in the manufacturing process.
 (工程1)
 半導体基板0619(例えば、半導体素子が形成された基板)上に層間絶縁膜0613(例えば、膜厚300nmのSiO2、膜厚150nmのSiOCH、膜厚100nmのSiO2)を堆積し、その後、リソグラフィ法(フォトレジスト形成、ドライエッチング、フォトレジスト除去を含む)を用いて、層間絶縁膜0513に配線溝を形成し、その後、当該配線溝に第1バリアメタルA0610及び第1バリアメタルB0621(例えば、TaN/Ta、膜厚5nm/5nm)を介して第1配線A0607及び第1配線B0622(例えば、Cu)を埋め込む。層間絶縁膜0613は、プラズマCVD法によって形成することができる。第1配線A0607及び第1配線B0622は、例えば、PVD法によって第1バリアメタルA0610及び第1バリアメタルB0621(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によってCuを配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。ここで、CMP(Chemical Mechanical Polishing)法とは、多層配線形成プロセス中に生じるウエハ表面の凹凸を、研磨液をウエハ表面に流しながら回転させた研磨パッドに接触させて研磨することによって平坦化する方法である。配線溝に埋め込まれた余剰の銅を研磨することによって埋め込み配線(ダマシン配線)を形成したり、層間絶縁膜0613を研磨することで平坦化を行う。
(Process 1)
An interlayer insulating film 0613 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 0619 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed. Using a method (including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 0513, and then the first barrier metal A0610 and the first barrier metal B0621 (for example, The first wiring A0607 and the first wiring B0622 (for example, Cu) are embedded via TaN / Ta and a film thickness of 5 nm / 5 nm. The interlayer insulating film 0613 can be formed by a plasma CVD method. The first wiring A0607 and the first wiring B0622 are formed, for example, by forming a first barrier metal A0610 and a first barrier metal B0621 (for example, a stacked film of TaN / Ta) by a PVD method, and after forming a Cu seed by a PVD method, It can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. Here, the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness on the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 0613 by polishing.
 (工程2)
 第1配線A0607及び第1配線B0622の表面、層間絶縁膜0613上にバリア絶縁膜0605(例えば、SiN、膜厚30nm)を形成する。ここで、バリア絶縁膜0605は、プラズマCVD法によって形成することができる。バリア絶縁膜0605の膜厚は、10nm~50nm程度であることが好ましい。バリア絶縁膜0605上にハードマスク0625(例えば、SiO2)を形成する。このとき、ハードマスク0625は、ドライエッチング加工におけるエッチング選択比を大きく保つ観点から、バリア絶縁膜0605とは異なる材料であることが好ましく、絶縁膜であっても導電膜であってもよい。ハードマスク0625には、例えば、SiO2、SiN、SiCN、TiN、Ti、Ta、TaN等を用いることができ、SiCN/SiO2の積層体を用いることができる。
(Process 2)
A barrier insulating film 0605 (eg, SiN, film thickness of 30 nm) is formed over the surface of the first wiring A 0607 and the first wiring B 0622 and the interlayer insulating film 0613. Here, the barrier insulating film 0605 can be formed by a plasma CVD method. The thickness of the barrier insulating film 0605 is preferably about 10 nm to 50 nm. A hard mask 0625 (eg, SiO 2 ) is formed over the barrier insulating film 0605. At this time, the hard mask 0625 is preferably made of a material different from the barrier insulating film 0605 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film. For the hard mask 0625, for example, SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
 (工程3)
 ハードマスク0625上にフォトレジスト(図示せず)を用いて、第1配線A0607の上のみに開口部をパターニングし、フォトレジストをマスクとしてドライエッチングすることによりハードマスク0625に開口部パターンを形成し、その後、酸素プラズマアッシング等によってフォトレジストを剥離する。このとき、ドライエッチングは必ずしもバリア絶縁膜0605の上面で停止している必要はなく、バリア絶縁膜0605の内部にまで到達していてもよい。
(Process 3)
Using a photoresist (not shown) on the hard mask 0625, an opening is patterned only on the first wiring A0607, and an opening pattern is formed on the hard mask 0625 by dry etching using the photoresist as a mask. Thereafter, the photoresist is removed by oxygen plasma ashing or the like. At this time, dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0605, and may reach the inside of the barrier insulating film 0605.
 (工程4)
 ハードマスク0625をエッチングマスクとして、ハードマスク0625の開口部から露出するバリア絶縁膜0605をエッチバック(ドライエッチング)することにより、バリア絶縁膜0605に開口部を形成する。バリア絶縁膜0605の開口部に第1配線A0607を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線A0607の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。バリア絶縁膜0605のエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜0605の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク0625は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜0605の開口部の形状は円形とし、円の直径は30nmから500nmとすることができる。非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線0607の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。
(Process 4)
Using the hard mask 0625 as an etching mask, the barrier insulating film 0605 exposed from the opening of the hard mask 0625 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0605. The first wiring A0607 is exposed in the opening of the barrier insulating film 0605, and then an organic stripping process is performed with an amine-based stripping solution or the like, thereby removing copper oxide formed on the exposed surface of the first wiring A0607. Etching byproducts generated during etch back are removed. In the etch back of the barrier insulating film 0605, the wall surface of the opening of the barrier insulating film 0605 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 0625 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material. The shape of the opening in the barrier insulating film 0605 can be a circle, and the diameter of the circle can be 30 nm to 500 nm. The oxide on the surface of the first wiring 0607 is removed by RF (Radio Frequency) etching using a non-reactive gas. As the non-reactive gas, helium or argon can be used.
 (工程5)
 開口したバリア絶縁膜0605の上に第2金属膜0609(例えば、Ru10nm)、バリア絶縁膜0603(例えばSiCN膜、膜厚10nm)、第1金属膜0608(例えば、Ru10nmとTa10nmをこの順番で堆積する)を順に堆積する。さらに、ハードマスク0618(例えば、SiN膜、膜厚30nm)、およびハードマスク0626(例えば、SiO2膜、膜厚100nm)をこの順に積層する。工程5において、ハードマスク0618、ハードマスク0626は、プラズマCVD法によって形成することができる。また、工程5において、第1金属膜0608及び第2金属膜0609はスパッタ法によって形成する。さらに、ハードマスク0626をパターニングするためのフォトレジスト(図示せず)を形成し、その後、当該フォトレジストをマスクとして、ハードマスク0618が表れるまでハードマスク0626をドライエッチングし、その後、酸素プラズマアッシングと有機剥離を用いてフォトレジストを除去する。フォトレジスト・マスクの露光パターンにより、ハードマスク0626の平面形状(上面から見た形状)が円もしくは楕円になっている。もしくは、フォトレジスト・マスクの露光パターン自体は、長方形もしくは正方形とし、ハードマスク0626のエッチング加工時、サイド・エッチングによって、角部の除去を進め、結果として、ハードマスク0626の平面形状に曲率を持たせてもよい。
(Process 5)
On the opened barrier insulating film 0605, a second metal film 0609 (for example, Ru 10 nm), a barrier insulating film 0603 (for example, SiCN film, film thickness 10 nm), and a first metal film 0608 (for example, Ru 10 nm and Ta 10 nm are deposited in this order). Are deposited in order. Further, a hard mask 0618 (eg, SiN film, film thickness 30 nm) and a hard mask 0626 (eg, SiO 2 film, film thickness 100 nm) are stacked in this order. In Step 5, the hard mask 0618 and the hard mask 0626 can be formed by a plasma CVD method. In step 5, the first metal film 0608 and the second metal film 0609 are formed by sputtering. Further, a photoresist (not shown) for patterning the hard mask 0626 is formed. After that, using the photoresist as a mask, the hard mask 0626 is dry-etched until the hard mask 0618 appears, and then oxygen plasma ashing is performed. The photoresist is removed using organic stripping. Depending on the exposure pattern of the photoresist mask, the planar shape of the hard mask 0626 (the shape viewed from above) is a circle or an ellipse. Alternatively, the exposure pattern of the photoresist mask itself is rectangular or square, and when the hard mask 0626 is etched, the corners are removed by side etching. As a result, the planar shape of the hard mask 0626 has a curvature. It may be allowed.
 (工程6)
 次に、ハードマスク0626をマスクとして、ハードマスク0618、第1金属膜0608、バリア絶縁膜0603、第2金属膜0609を連続的にドライエッチングし、第1電極0601および第2電極0602を形成する。このとき、ハードマスク0626は、エッチバック中に完全に除去されることが好ましいが、そのまま残存してもよい。工程6において、例えば、第1金属膜0608の上層がTaの場合にはCl2系のRIEで加工することができ、第1金属膜0608の下層および第2金属膜がRuの場合にはCl2/O2の混合ガスでRIE加工することができる。このようなハードマスクRIE法を用いることで、第1金属膜0608および第2金属膜0609を、レジスト除去のための酸素プラズマアッシングに曝すことなく、エッチング加工をすることができる。また、加工後に、ハードマスク0626のパターニングに用いたレジストを、酸素プラズマによって酸化処理する場合には、第1金属膜0608はハードマスク0626により被覆されている。レジストの剥離工程において、酸化プラズマを照射する際、その照射時間が長くなっても、ハードマスク0626により被覆されている第1金属膜0608の酸化は生じない。工程6では、ハードマスク0618、第1金属膜0608、バリア絶縁膜0603、第2金属膜0609の平面形状が曲率を有するように、エッチングレシピを調整してもよい。
(Step 6)
Next, using the hard mask 0626 as a mask, the hard mask 0618, the first metal film 0608, the barrier insulating film 0603, and the second metal film 0609 are continuously dry-etched to form the first electrode 0601 and the second electrode 0602. . At this time, the hard mask 0626 is preferably completely removed during the etch back, but may remain as it is. In step 6, for example, when the upper layer of the first metal film 0608 is Ta, it can be processed by Cl 2 RIE, and when the lower layer of the first metal film 0608 and the second metal film are Ru, Cl can be processed. RIE processing can be performed with a mixed gas of 2 / O 2 . By using such a hard mask RIE method, the first metal film 0608 and the second metal film 0609 can be etched without being exposed to oxygen plasma ashing for resist removal. When the resist used for patterning the hard mask 0626 is oxidized with oxygen plasma after processing, the first metal film 0608 is covered with the hard mask 0626. In the resist stripping step, when the irradiation with oxidation plasma is performed, the first metal film 0608 covered with the hard mask 0626 is not oxidized even if the irradiation time is increased. In step 6, the etching recipe may be adjusted so that the planar shapes of the hard mask 0618, the first metal film 0608, the barrier insulating film 0603, and the second metal film 0609 have curvature.
 (工程7)
 次に、ハードマスク0618、第1電極0601、バリア絶縁膜0603、第2電極0602、バリア絶縁膜0605に接するように保護絶縁膜0623(例えば、SiCN膜、30nm)、ハードマスク0627(例えば、SiO2膜、50nm)を堆積する。工程7において、保護絶縁膜0623及びハードマスク0627は、プラズマCVD法によって形成することができる。さらに、ハードマスク0627をパターニングするためのフォトレジスト(図示せず)を形成し、その後、ハードマスク0627をドライエッチングし、その後、酸素プラズマアッシングと有機剥離を用いてフォトレジストを除去する。
(Step 7)
Next, a protective insulating film 0623 (eg, SiCN film, 30 nm) and a hard mask 0627 (eg, SiO 2) are in contact with the hard mask 0618, the first electrode 0601, the barrier insulating film 0603, the second electrode 0602, and the barrier insulating film 0605. A film, 50 nm) is deposited. In Step 7, the protective insulating film 0623 and the hard mask 0627 can be formed by a plasma CVD method. Further, a photoresist (not shown) for patterning the hard mask 0627 is formed, and then the hard mask 0627 is dry-etched, and then the photoresist is removed using oxygen plasma ashing and organic peeling.
 (工程8)
 ハードマスク0627をマスクとして、ハードマスク0627の開口部から露出するバリア絶縁膜0605をエッチバック(ドライエッチング)することにより、バリア絶縁膜0605に開口部を形成して、バリア絶縁膜0605の開口部から第1配線B0622を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線B0622の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。この時、ハードマスク0627の開口部は第1電極0601及び第2電極0602が形成されている第1金属膜0608及び第2金属膜0609の側面、バリア絶縁膜0603の側面、ハードマスク0618の側面より第1配線A0607側となっており、エッチバックの際にハードマスク0618及び第1金属膜0608がハードマスクとなることで、バリア絶縁膜0605の開口部の側面はセルフアラインで第1電極0601及び第2電極0602に揃う。バリア絶縁膜0605のエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜0605の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク0627は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜0605の開口部の形状は曲率を有しており、開口部の平面方向の最大の長さは30nmから500nmとする。さらに、非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線0607の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。
(Process 8)
Using the hard mask 0627 as a mask, the barrier insulating film 0605 exposed from the opening of the hard mask 0627 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0605 and the opening of the barrier insulating film 0605 is formed. Then, the first wiring B0622 is exposed, and then an organic stripping process is performed with an amine-based stripping solution or the like to remove copper oxide formed on the exposed surface of the first wiring B0622, and etching that has occurred at the time of etch back Remove double products. At this time, the openings of the hard mask 0627 are the side surfaces of the first metal film 0608 and the second metal film 0609 where the first electrode 0601 and the second electrode 0602 are formed, the side surfaces of the barrier insulating film 0603, and the side surfaces of the hard mask 0618. Since the hard mask 0618 and the first metal film 0608 become hard masks at the time of etch back, the side surface of the opening portion of the barrier insulating film 0605 is self-aligned so that the first electrode 0601 is closer to the first wiring A 0607 side. And the second electrode 0602. In the etch back of the barrier insulating film 0605, the wall surface of the opening of the barrier insulating film 0605 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 0627 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material. The shape of the opening in the barrier insulating film 0605 has a curvature, and the maximum length of the opening in the planar direction is 30 nm to 500 nm. Further, the oxide on the surface of the first wiring 0607 is removed by RF (Radio Frequency) etching using a non-reactive gas. As the non-reactive gas, helium or argon can be used.
 (工程9)
 次に、保護絶縁膜0623、ハードマスク0618、第1電極0601、バリア絶縁膜0605、第2電極0602、バリア絶縁膜0603、第1配線B0622に接するようにイオン伝導層0604としてシリコン、酸素、炭素、水素を含むSIOCH系イオン伝導層をCVD法で20nmから80nm程度形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。温度は250℃~350℃程度が好ましい。次に、イオン伝導層0604上にバリア絶縁膜0614としてSiNもしくはSiCNを30nmの膜厚で形成する。工程9において、バリア絶縁膜0614は、プラズマCVD法によって形成することができる。例えば、SiH4/N2の混合ガスを高密度プラズマによって形成したSiN膜などを用いることが好ましい。3端子スイッチ素子0620以外の領域にもイオン伝導層0604が残るが、絶縁膜として機能するため、3端子スイッチの動作および多層配線に影響はない。工程9では、バリア絶縁膜0614の上に層間絶縁膜0615としてSiO2を300nm成膜する。さらに、3端子スイッチ0620によって生じた段差を解消するため、層間絶縁膜0615を170nm程度CMP法にて研磨することで平坦にする。層間絶縁膜0615は3端子スイッチ素子0620の段差を確実に埋めるために、高密度プラズマを使用してSiO2を成膜することが望ましい。
(Step 9)
Next, silicon, oxygen, and carbon are used as the ion conductive layer 0604 so as to be in contact with the protective insulating film 0623, the hard mask 0618, the first electrode 0601, the barrier insulating film 0605, the second electrode 0602, the barrier insulating film 0603, and the first wiring B 0622. Then, an SIOCH-based ion conductive layer containing hydrogen is formed to a thickness of about 20 nm to 80 nm by CVD. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is directly supplied to the reaction chamber by another line. The temperature is preferably about 250 ° C to 350 ° C. Next, SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0614 over the ion conductive layer 0604. In step 9, the barrier insulating film 0614 can be formed by a plasma CVD method. For example, it is preferable to use a SiN film in which a mixed gas of SiH 4 / N 2 is formed by high-density plasma. Although the ion conductive layer 0604 remains in a region other than the three-terminal switch element 0620, it functions as an insulating film and does not affect the operation of the three-terminal switch and the multilayer wiring. In step 9, a SiO 2 film having a thickness of 300 nm is formed as an interlayer insulating film 0615 on the barrier insulating film 0614. Further, in order to eliminate the level difference caused by the three-terminal switch 0620, the interlayer insulating film 0615 is flattened by polishing about 170 nm by a CMP method. The interlayer insulating film 0615 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the three-terminal switch element 0620.
 (工程10)
 次に、層間絶縁膜0615の上に層間絶縁膜0616(例えば、比誘電率の低いSiOC、SiO2の積層)を堆積し、その後、プラグ0606用の下穴および第2配線0612用の配線溝をドライエッチングによって形成し、銅デュアルダマシン配線プロセスを用いて、当該配線溝及び当該下穴内に第2バリアメタル0611(例えば、TaN/Ta)を介して第2配線0612(例えば、Cu)及びプラグ0606(例えば、Cu)を同時に形成し、その後、第2配線0612を含む層間絶縁膜0616上にバリア絶縁膜0617(例えば、SiCN膜)を堆積する。工程10において、第2配線0612およびプラグ0606の形成は、例えば、PVD法によって第2バリアメタル0611(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によって銅を配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。工程10では、第2バリアメタル0611と第1金属膜0608の上層を同一材料とすることでプラグ0606と第1金属膜0608の間の接触抵抗を低減し、素子性能を向上(ON状態時の3端子スイッチの抵抗を低減)させることができるようになる。また、工程10において、層間絶縁膜0616及びバリア絶縁膜0617はプラズマCVD法で形成することができる。工程10ではプラグ0606の下穴を形成する際、第1金属膜0608の上層に到達しており、第1金属膜0608の上層の材料がエッチングストッパ材料として機能する。プラグ0606用の下穴および第2配線0612用の配線溝のドライエッチングには、フルオロカーボン系のガスを用いる。
(Process 10)
Next, an interlayer insulating film 0616 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 0615, and then a pilot hole for the plug 0606 and a wiring groove for the second wiring 0612 are formed. Is formed by dry etching, and a second wiring 0612 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0611 (for example, TaN / Ta) using a copper dual damascene wiring process. 0606 (for example, Cu) is formed at the same time, and then a barrier insulating film 0617 (for example, a SiCN film) is deposited on the interlayer insulating film 0616 including the second wiring 0612. In step 10, the second wiring 0612 and the plug 0606 are formed by, for example, forming a second barrier metal 0611 (for example, a stacked film of TaN / Ta) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. In step 10, by making the upper layer of the second barrier metal 0611 and the first metal film 0608 the same material, the contact resistance between the plug 0606 and the first metal film 0608 is reduced, and the element performance is improved (in the ON state). The resistance of the three-terminal switch can be reduced). In Step 10, the interlayer insulating film 0616 and the barrier insulating film 0617 can be formed by a plasma CVD method. In step 10, when forming the prepared hole of the plug 0606, it reaches the upper layer of the first metal film 0608, and the material of the upper layer of the first metal film 0608 functions as an etching stopper material. For dry etching of the pilot hole for the plug 0606 and the wiring groove for the second wiring 0612, a fluorocarbon-based gas is used.
 (第二の実施態様)
 本発明の第二の実施形態にかかる、第二の実施態様の3端子スイッチング素子について説明する。
(Second embodiment)
A three-terminal switching element according to a second embodiment according to the second embodiment of the present invention will be described.
 該第二の実施態様の3端子スイッチング素子は、半導体装置に設ける多層配線層内部に形成されている。図7に、半導体装置に設ける多層配線層内部に形成されている、該第二の実施態様の3端子スイッチング素子0720の構造を示す。 The three-terminal switching element of the second embodiment is formed inside a multilayer wiring layer provided in the semiconductor device. FIG. 7 shows the structure of the three-terminal switching element 0720 according to the second embodiment, which is formed in the multilayer wiring layer provided in the semiconductor device.
 半導体装置に設ける多層配線層の内部に、3端子スイッチ0720が形成されている。多層配線層は、第1電極0701を構成する第1金属膜0708と電気的に接続されたプラグ0706、および第2電極0702を構成する第2金属膜0709に接続された第1配線A0707を備え、イオン伝導層0704は第1電極0701および第2電極0702に接しており、第1金属膜0708と第2金属膜0709との間にバリア絶縁膜0703を備え、イオン伝導層0704と層間絶縁膜0715の間はバリア絶縁膜0714が存在する。また、プラグ0706は第2配線0712に接続している。さらに、第1配線B0722は第3電極を兼ね、バリア絶縁膜0705の開口部でイオン伝導層0704と接している。 A three-terminal switch 0720 is formed inside a multilayer wiring layer provided in the semiconductor device. The multilayer wiring layer includes a plug 0706 electrically connected to the first metal film 0708 constituting the first electrode 0701 and a first wiring A0707 connected to the second metal film 0709 constituting the second electrode 0702. The ion conductive layer 0704 is in contact with the first electrode 0701 and the second electrode 0702, and includes a barrier insulating film 0703 between the first metal film 0708 and the second metal film 0709, and the ion conductive layer 0704 and the interlayer insulating film. Between 0715, the barrier insulating film 0714 exists. The plug 0706 is connected to the second wiring 0712. Further, the first wiring B 0722 also serves as the third electrode, and is in contact with the ion conductive layer 0704 through the opening of the barrier insulating film 0705.
 多層配線層は、半導体基板0719上にて、層間絶縁膜0713、バリア絶縁膜0705、イオン伝導層0704、バリア絶縁膜0714、層間絶縁膜0715、層間絶縁膜0716、及びバリア絶縁膜0717の順に積層した絶縁積層体を有する。 The multilayer wiring layer is formed by stacking an interlayer insulating film 0713, a barrier insulating film 0705, an ion conductive layer 0704, a barrier insulating film 0714, an interlayer insulating film 0715, an interlayer insulating film 0716, and a barrier insulating film 0717 over the semiconductor substrate 0719. An insulating laminate.
 層間絶縁膜0716に形成された配線溝に第2配線0712が埋め込まれており、層間絶縁膜0715、バリア絶縁膜0714、イオン伝導層0704及びハードマスク0718に形成された下穴にプラグ0706が埋め込まれており、第2配線0712とプラグ0706がそれぞれ一体となっており、第2配線0720およびプラグ0706の側面及び底面が第2バリアメタル0711によって覆われている。 A second wiring 0712 is embedded in a wiring groove formed in the interlayer insulating film 0716, and a plug 0706 is embedded in pilot holes formed in the interlayer insulating film 0715, the barrier insulating film 0714, the ion conductive layer 0704, and the hard mask 0718. The second wiring 0712 and the plug 0706 are integrated with each other, and the side surfaces and bottom surfaces of the second wiring 0720 and the plug 0706 are covered with the second barrier metal 0711.
 開口されたバリア絶縁膜0705上に、加工された第2電極0702を構成する第2金属膜0709、バリア絶縁膜0703、第1電極0701を構成している第1金属膜0708、ハードマスク0718、別の開口されたバリア絶縁膜0705の下に第3電極を兼ねた第1配線B0722があり、ハードマスク0718の上面と、第1金属膜0708、バリア絶縁膜0703、第2金属膜0709、バリア絶縁膜0723の側面、及び、第1配線B0722の上面を覆うように、イオン伝導層0704が形成されており、その上にバリア絶縁膜0714が形成されている。第3電極を兼ねた第1配線B0722はバリア絶縁膜0723によって第1電極0701を兼ねる第1金属膜0708と電気的に分離されている。 On the opened barrier insulating film 0705, the processed second electrode 0702, the second metal film 0709, the barrier insulating film 0703, the first electrode 0701, the first metal film 0708, the hard mask 0718, There is a first wiring B 0722 also serving as a third electrode under another opened barrier insulating film 0705, and the upper surface of the hard mask 0718, the first metal film 0708, the barrier insulating film 0703, the second metal film 0709, the barrier An ion conductive layer 0704 is formed so as to cover a side surface of the insulating film 0723 and an upper surface of the first wiring B 0722, and a barrier insulating film 0714 is formed thereon. The first wiring B 0722 also serving as the third electrode is electrically separated from the first metal film 0708 also serving as the first electrode 0701 by the barrier insulating film 0723.
 第1電極0701を構成する第1金属膜0708がプラグ0706と第2バリアメタル0711を介して電気的に接続されている。また、第2電極0702を構成する第2金属膜0709は、バリア絶縁膜0705に開口された開口部を介して第1配線A0707及び第1バリアメタルA0710と電気的に接続されている。また、第3電極は第1配線B0722が兼ねている。 The first metal film 0708 constituting the first electrode 0701 is electrically connected to the plug 0706 via the second barrier metal 0711. In addition, the second metal film 0709 constituting the second electrode 0702 is electrically connected to the first wiring A0707 and the first barrier metal A0710 through the opening opened in the barrier insulating film 0705. The third electrode also serves as the first wiring B0722.
 第1電極0701を構成する第1金属膜0708は2層構造となっており、プラグ0706に接する面(上層)は第2バリアメタル0711と同じ材料を用いる。このようにすることで、プラグ0706の第2バリアメタル0711と3端子スイッチ0720の第1電極0701を構成する第1金属膜0708の上層とが一体化し、接触抵抗を低減し、かつ、密着性の向上による信頼性の向上を実現することができる。 The first metal film 0708 constituting the first electrode 0701 has a two-layer structure, and the surface (upper layer) in contact with the plug 0706 is made of the same material as the second barrier metal 0711. In this way, the second barrier metal 0711 of the plug 0706 and the upper layer of the first metal film 0708 constituting the first electrode 0701 of the three-terminal switch 0720 are integrated, reducing the contact resistance, and the adhesiveness. Improvement of reliability can be realized by improving the above.
 半導体基板0719は、半導体素子が形成された基板である。半導体基板0719には、例えば、シリコン基板、単結晶基板、SOI(Silicon on Insulator)基板、TFT(Thin Film Transistor)基板、液晶製造用基板等の基板を用いることができる。 The semiconductor substrate 0719 is a substrate on which a semiconductor element is formed. As the semiconductor substrate 0719, for example, a substrate such as a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, or a liquid crystal manufacturing substrate can be used.
 層間絶縁膜0713は、半導体基板0719上に形成された絶縁膜である。層間絶縁膜0713には、例えば、SiO2、シリコン酸化膜よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)等を用いることができる。層間絶縁膜0713は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0713には、第1配線A0707及び第1配線B0722を埋め込むための配線溝が形成されており、当該配線溝に第1バリアメタルA0710を介して第1配線A0707が、第1バリアメタルB0721を介して第1配線層B0722が埋め込まれている。 The interlayer insulating film 0713 is an insulating film formed over the semiconductor substrate 0719. As the interlayer insulating film 0713, for example, SiO 2 , a low dielectric constant film (for example, a SiOCH film) having a lower dielectric constant than that of a silicon oxide film can be used. The interlayer insulating film 0713 may be a stack of a plurality of insulating films. In the interlayer insulating film 0713, a wiring groove for embedding the first wiring A0707 and the first wiring B0722 is formed, and the first wiring A0707 is inserted into the wiring groove via the first barrier metal A0710. The first wiring layer B0722 is embedded via B0721.
 第1配線A0707及び第1配線B0722は、層間絶縁膜0713に形成された配線溝に第1バリアメタルA0710及び第1バリアメタルB0721を介して埋め込まれた配線である。第1配線A0707は、第2電極0702を形成する第2金属膜0709と直接接している。第1配線B0722はイオン伝導層0704と直接接している。第1配線A0707及び第1配線B0722はCuで構成されているが、Alと合金化されていてもよい。第1配線B0722は3端子イオン伝導層0704中にCuイオンを供給する第3電極として機能する。 The first wiring A0707 and the first wiring B0722 are wirings embedded in the wiring trench formed in the interlayer insulating film 0713 via the first barrier metal A0710 and the first barrier metal B0721. The first wiring A0707 is in direct contact with the second metal film 0709 forming the second electrode 0702. The first wiring B 0722 is in direct contact with the ion conductive layer 0704. The first wiring A0707 and the first wiring B0722 are made of Cu, but may be alloyed with Al. The first wiring B 0722 functions as a third electrode for supplying Cu ions into the three-terminal ion conductive layer 0704.
 第1バリアメタルA0710及び第1バリアメタルB0721は、第1配線A0707及び第1配線B0722を構成する金属が層間絶縁膜0713や下層へ拡散することを防止するために、配線の側面および底面を被覆する、バリア性を有する導電性膜である。第1バリアメタルA0710及び第1バリアメタルB0721には、例えば、第1配線A0707及び第1配線B0722がCuを主成分とする金属材料からなる場合には、タンタル(Ta)、窒化タンタル(TaN)、窒化チタン(TiN)、炭窒化タングステン(WCN)のような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The first barrier metal A0710 and the first barrier metal B0721 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A0707 and the first wiring B0722 from diffusing into the interlayer insulating film 0713 or the lower layer. It is a conductive film having a barrier property. For the first barrier metal A0710 and the first barrier metal B0721, for example, when the first wiring A0707 and the first wiring B0722 are made of a metal material containing Cu as a main component, tantalum (Ta), tantalum nitride (TaN) Alternatively, a refractory metal such as titanium nitride (TiN) or tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
 バリア絶縁膜0705は、第1配線A0707及び第1配線B0722の表面、層間絶縁膜0713上に形成され、第1配線A0707及び第1配線B0722を構成する金属(例えば、Cu)の酸化を防いだり、イオン伝導層0704中への第1配線A0707及び第1配線B0722を構成する金属の拡散を防ぐ役割を有する。バリア絶縁膜0705には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0705 is formed on the surface of the first wiring A0707 and the first wiring B0722, the interlayer insulating film 0713, and prevents oxidation of the metal (for example, Cu) constituting the first wiring A0707 and the first wiring B0722. , Has a role of preventing diffusion of the metal constituting the first wiring A0707 and the first wiring B0722 into the ion conductive layer 0704. For the barrier insulating film 0705, for example, a SiC film, a SiCN film, a SiN film, and a stacked structure thereof can be used.
 バリア絶縁膜0705は、第1配線A0707及び第1配線B0722上にて開口部を有する。バリア絶縁膜0705の開口部においては、第1配線A0707と第2電極0702を構成する第2金属膜0709が接し、第1配線B0722とイオン伝導層0704が接している。バリア絶縁膜0705の開口部は、第1配線A0707及び第1配線B0722、それぞれの領域内に形成されている。バリア絶縁膜0705の開口部の壁面は、第1配線A0707及び第1配線B0722から離れるにしたがい広くなったテーパ面となっている。バリア絶縁膜0710の開口部壁面のテーパ角θtaperは、第1配線0207の上面に対し、85°以下(θtaper≦85°)に設定されている。 The barrier insulating film 0705 has an opening over the first wiring A0707 and the first wiring B0722. In the opening of the barrier insulating film 0705, the first wiring A0707 and the second metal film 0709 constituting the second electrode 0702 are in contact with each other, and the first wiring B0722 and the ion conductive layer 0704 are in contact with each other. The opening of the barrier insulating film 0705 is formed in each region of the first wiring A0707 and the first wiring B0722. The wall surface of the opening of the barrier insulating film 0705 has a tapered surface that becomes wider as the distance from the first wiring A0707 and the first wiring B0722 increases. The taper angle θ taper of the wall surface of the opening of the barrier insulating film 0710 is set to 85 ° or less (θ taper ≦ 85 °) with respect to the upper surface of the first wiring 0207.
 第2電極0702および第1電極0701は、3端子スイッチ0720において信号を伝達する電極であり、イオン伝導層0704と直接接している。第2電極0702を構成する第2金属膜0709はイオン化しにくく、イオン伝導層0704に拡散もしくは伝導しにくい金属が用いられる。例えば、Pt、Ru等を用いることができる。第2電極0702は第2金属膜0709の側壁部である。第1電極0701を構成する第1金属膜0708は、異なる金属の2層で構成される。第1電極0701は第1金属膜0708の側壁部である。バリア絶縁膜0703およびイオン伝導層0704に接する下層はイオン化しにくく、イオン伝導層0704に拡散もしくは伝導しにくい金属が用いられる。例えば、Pt、Ru等を用いることができる。また、第1電極0701を構成する第1金属膜0708の上層は、ハードマスク0718およびイオン伝導層0704に接する。第1金属膜0708の上層は、下層を保護する役割を有する。すなわち、上層が下層を保護することで、プロセス中の下層へのダメージを抑制し、3端子スイッチ0720のスイッチング特性を維持することができる。この上層には、例えば、Ta、Ti、W、Alあるいはそれらの窒化物等を用いることができる。第1金属膜0707の上層は、第2バリアメタル0711を介してプラグ0706と電気的に接続されている。 The second electrode 0702 and the first electrode 0701 are electrodes that transmit signals in the three-terminal switch 0720, and are in direct contact with the ion conductive layer 0704. The second metal film 0709 constituting the second electrode 0702 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0704. For example, Pt, Ru, etc. can be used. The second electrode 0702 is a side wall portion of the second metal film 0709. The first metal film 0708 constituting the first electrode 0701 is composed of two layers of different metals. The first electrode 0701 is a side wall portion of the first metal film 0708. The lower layer in contact with the barrier insulating film 0703 and the ion conductive layer 0704 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 0704. For example, Pt, Ru, etc. can be used. Further, the upper layer of the first metal film 0708 constituting the first electrode 0701 is in contact with the hard mask 0718 and the ion conductive layer 0704. The upper layer of the first metal film 0708 has a role of protecting the lower layer. That is, when the upper layer protects the lower layer, damage to the lower layer during the process can be suppressed, and the switching characteristics of the three-terminal switch 0720 can be maintained. For this upper layer, for example, Ta, Ti, W, Al or nitrides thereof can be used. The upper layer of the first metal film 0707 is electrically connected to the plug 0706 through the second barrier metal 0711.
 バリア絶縁膜0723は、第3電極を兼ねる第1配線B0722と第2電極0702を構成する第2金属膜0709に挟まれて設けられている。バリア絶縁膜0723は第3電極を兼ねる第1配線B0722と第2電極0702を構成する第2金属膜0709が短絡しないように、両者を絶縁する役割を有する。バリア絶縁膜0723には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0723 is provided between the first wiring B 0722 that also serves as the third electrode and the second metal film 0709 that constitutes the second electrode 0702. The barrier insulating film 0723 has a role of insulating the first wiring B 0722 serving also as the third electrode and the second metal film 0709 constituting the second electrode 0702 so as not to be short-circuited. For the barrier insulating film 0723, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 バリア絶縁膜0703は、第1電極0701を構成する第1金属膜0708と第2電極0702を構成する第2金属膜0709に挟まれて設けられている。バリア絶縁膜0703は第1電極0701を構成する第1金属膜0708と第2電極0702を構成する第2金属膜0709が短絡しないように、両者を絶縁する役割を有する。バリア絶縁膜0703には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0703 is provided between the first metal film 0708 constituting the first electrode 0701 and the second metal film 0709 constituting the second electrode 0702. The barrier insulating film 0703 has a role of insulating the first metal film 0708 constituting the first electrode 0701 and the second metal film 0709 constituting the second electrode 0702 so that they are not short-circuited. For the barrier insulating film 0703, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 イオン伝導層0704は、金属イオン(Cuイオン)が電界で移動可能な膜である。イオン伝導層0704は、イオン伝導層が含む金属の作用(拡散、イオン伝動など)により抵抗が変化する材料を用いることができる。3端子スイッチ0720の抵抗変化を、金属架橋の形成・消滅によって行う場合には、第3電極を兼ねる第1配線B0722より供給される金属イオンが、イオン伝導可能な膜が用いられる。金属イオンは、Cuイオンとして、第3電極を兼ねる第1配線B0722より供給される。バリア絶縁膜0714には、プラグ0714を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0711を介してプラグ0706が埋め込まれている。 The ion conductive layer 0704 is a film in which metal ions (Cu ions) can move in an electric field. For the ion conductive layer 0704, a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used. When the resistance change of the three-terminal switch 0720 is performed by forming / disappearing a metal bridge, a film that can conduct ions of metal ions supplied from the first wiring B 0722 also serving as the third electrode is used. Metal ions are supplied as Cu ions from the first wiring B 0722 that also serves as the third electrode. A pilot hole for embedding the plug 0714 is formed in the barrier insulating film 0714, and the plug 0706 is embedded in the pilot hole via the second barrier metal 0711.
 イオン伝導層0704の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する三層構造の側面に、GeSbTeからなるイオン伝導層0704を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One of the material candidates that can be used to fabricate the ion conductive layer 0704 is chalcogenide GeSbTe, which is used in the phase change element as a material for the phase change layer. As a means for forming the ion conductive layer 0704 made of GeSbTe on the side surface of the three-layer structure having a curvature, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層0704の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 0704 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 ハードマスク0718は、第1電極0701を構成する第1金属膜0708、バリア絶縁膜0703、第2電極0702を構成する第2金属膜0709をエッチングする際のハードマスクとなる膜である。ハードマスク0718には、例えば、SiN膜やSiO2膜、もしくはこれらの積層を用いることができる。 The hard mask 0718 is a film serving as a hard mask when the first metal film 0708 constituting the first electrode 0701, the barrier insulating film 0703, and the second metal film 0709 constituting the second electrode 0702 are etched. For the hard mask 0718, for example, a SiN film, a SiO 2 film, or a laminate thereof can be used.
 バリア絶縁膜0714は、3端子スイッチ0720にダメージを与えることなく、さらにイオン伝導層0704に含まれる酸素および金属の脱離、拡散を防ぐ機能を有する絶縁膜である。バリア絶縁膜0714には、例えば、SiN膜、SiCN膜等を用いることができる。バリア絶縁膜0714は、バリア絶縁膜0705と同一材料であることが好ましい。バリア絶縁膜0714には、プラグ0706を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0711を介してプラグ0706が埋め込まれている。 The barrier insulating film 0714 is an insulating film having a function of preventing detachment and diffusion of oxygen and metal contained in the ion conductive layer 0704 without damaging the three-terminal switch 0720. As the barrier insulating film 0714, for example, a SiN film, a SiCN film, or the like can be used. The barrier insulating film 0714 is preferably made of the same material as the barrier insulating film 0705. A pilot hole for embedding the plug 0706 is formed in the barrier insulating film 0714, and the plug 0706 is embedded in the pilot hole via the second barrier metal 0711.
 層間絶縁膜0715は、バリア絶縁膜0714上に形成された絶縁膜である。層間絶縁膜0715には、例えば、SiO2、SiOC膜などを用いることができる。層間絶縁膜0715は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜0715は、層間絶縁膜0713、0716と同一材料としてもよい。層間絶縁膜0715には、プラグ0706を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル0711を介してプラグ0706が埋め込まれている。 The interlayer insulating film 0715 is an insulating film formed over the barrier insulating film 0714. For the interlayer insulating film 0715, for example, a SiO 2 , SiOC film or the like can be used. The interlayer insulating film 0715 may be a stack of a plurality of insulating films. The interlayer insulating film 0715 may be formed of the same material as the interlayer insulating films 0713 and 0716. A pilot hole for embedding the plug 0706 is formed in the interlayer insulating film 0715, and the plug 0706 is embedded in the pilot hole via the second barrier metal 0711.
 層間絶縁膜0716は、層間絶縁膜0715上に形成された絶縁膜である。層間絶縁膜0716には、例えば、SiO2、SiOC膜、SiO2よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)などを用いることができる。層間絶縁膜0716は、層間絶縁膜0715、層間絶縁膜0713と同一材料としてもよい。また、層間絶縁膜0716と層間絶縁膜0715を異なる絶縁材料を用いて作製し、そのエッチング特性に有意な差異を設けることもできる。層間絶縁膜0716は、層間絶縁膜0715、0713と同一材料としてもよい。層間絶縁膜0716には、第2配線0712埋め込むための配線溝が形成されており、当該配線溝に第2バリアメタル0711を介して第2配線0712が埋め込まれている。 The interlayer insulating film 0716 is an insulating film formed over the interlayer insulating film 0715. As the interlayer insulating film 0716, for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used. The interlayer insulating film 0716 may be formed of the same material as the interlayer insulating film 0715 and the interlayer insulating film 0713. Alternatively, the interlayer insulating film 0716 and the interlayer insulating film 0715 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics. The interlayer insulating film 0716 may be formed of the same material as the interlayer insulating films 0715 and 0713. In the interlayer insulating film 0716, a wiring groove for embedding the second wiring 0712 is formed, and the second wiring 0712 is embedded in the wiring groove via the second barrier metal 0711.
 第2配線0712は、層間絶縁膜0716に形成された配線溝に第2バリアメタル0711を介して埋め込まれた配線である。第2配線0712は、プラグ0706と一体になっている。プラグ0706は、層間絶縁膜0715、バリア絶縁膜0714、及びハードマスク0718に形成された下穴に第2バリアメタル0711を介して埋め込まれている。プラグ0706は、第2バリアメタル0711を介して第1電極0701を構成する第1金属膜0708と電気的に接続されている。第2配線0712及びプラグ0706には、例えば、Cuを用いることができる。 The second wiring 0712 is a wiring embedded in the wiring trench formed in the interlayer insulating film 0716 with the second barrier metal 0711 interposed therebetween. The second wiring 0712 is integrated with the plug 0706. The plug 0706 is embedded in a prepared hole formed in the interlayer insulating film 0715, the barrier insulating film 0714, and the hard mask 0718 via the second barrier metal 0711. The plug 0706 is electrically connected to the first metal film 0708 constituting the first electrode 0701 through the second barrier metal 0711. For example, Cu can be used for the second wiring 0712 and the plug 0706.
 第2バリアメタル0711は、第2配線0712(プラグ0706を含む)を構成する金属が層間絶縁膜0716や0715や下層へ拡散することを防止するために、第2配線0712及びプラグ0706の側面および底面を被覆する、バリア性を有する導電性膜である。第2バリアメタル0712には、例えば、第2配線0712及びプラグ0706がCuを主成分とする金属元素からなる場合には、Ta、TaN、TiN、WCNのような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The second barrier metal 0711 includes side surfaces of the second wiring 0712 and the plug 0706 in order to prevent the metal constituting the second wiring 0712 (including the plug 0706) from diffusing into the interlayer insulating films 0716 and 0715 and the lower layer. It is a conductive film having a barrier property covering the bottom surface. For example, when the second wiring 0712 and the plug 0706 are made of a metal element whose main component is Cu, the second barrier metal 0712 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
 バリア絶縁膜0717は、第2配線0712を含む層間絶縁膜0716上に形成され、第2配線0717を構成する金属(例えば、Cu)の酸化を防いだり、上層への第2配線0712を構成する金属の拡散を防ぐ役割を有する絶縁膜である。バリア絶縁膜0717には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 0717 is formed on the interlayer insulating film 0716 including the second wiring 0712, prevents oxidation of the metal (for example, Cu) constituting the second wiring 0717, and configures the second wiring 0712 to the upper layer. It is an insulating film having a role of preventing metal diffusion. For the barrier insulating film 0717, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 (スイッチング動作)
 図7に示す、第二の実施態様の3端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the three-terminal switch of the second embodiment shown in FIG. 7 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 まず、第2電極0702を第2電極0702と電気的に接続されている第2金属膜0709を第1配線0707を介して、第1電極0701を第1電極0701と電気的に接続されている第1金属膜0708、プラグ0706、第2配線0712を介して、それぞれ接地する。さらに、第3電極を兼ねる第1配線B0722に正電圧(+VON>0V)を印加すると、第3電極を兼ねる第1配線B0722から金属イオン(Cuイオン)がイオン伝導層0704中へ拡散し、第1電極0701及び第2電極0702側にマイグレーションする。マイグレーションした金属イオンは、第1電極0701及び第2電極0702より電子を受け取り、電気化学反応によって金属架橋0724が析出する。これによって第1電極0701と第2電極0702の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
First, the second electrode 0702 is electrically connected to the second electrode 0702. The second metal film 0709 is electrically connected to the first electrode 0701 via the first wiring 0707. The first metal film 0708, the plug 0706, and the second wiring 0712 are grounded. Further, when a positive voltage (+ V ON > 0 V) is applied to the first wiring B 0722 also serving as the third electrode, metal ions (Cu ions) diffuse from the first wiring B 0722 also serving as the third electrode into the ion conductive layer 0704, Migrate to the first electrode 0701 and second electrode 0702 side. The migrated metal ions receive electrons from the first electrode 0701 and the second electrode 0702, and a metal bridge 0724 is deposited by an electrochemical reaction. As a result, the resistance value between the first electrode 0701 and the second electrode 0702 becomes low resistance and is turned on.
 ON状態への遷移は、第3電極を兼ねる第1配線B0722を接地して、第1電極0701及び第2電極0702に負電圧(-VON<0V)を印加しても良い。 In the transition to the ON state, the first wiring B 0722 also serving as the third electrode may be grounded, and a negative voltage (−V ON <0 V) may be applied to the first electrode 0701 and the second electrode 0702.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 第2電極0702を第2電極0702と電気的に接続されている第2金属膜0709を第1配線0707を介して、第1電極0701を第1電極0701と電気的に接続されている第1金属膜0708、プラグ0706、第2配線0712を介して、それぞれ接地する。第3電極を兼ねる第1配線B0722に負電圧(-VOFF<0V)を印加すると、金属架橋0721の溶解反応が進行し、金属架橋0724は金属イオン(Cuイオン)となって、イオン伝導層0704中に分散する。これによって、第1電極0701と第2電極0702の間の抵抗値が高抵抗となり、OFF状態に遷移する。
(B) OFF operation (transition process from ON state to OFF state)
A second metal film 0709 in which the second electrode 0702 is electrically connected to the second electrode 0702 is connected to the first electrode 0701 through the first wiring 0707, and the first electrode 0701 is electrically connected to the first electrode 0701. The metal film 0708, the plug 0706, and the second wiring 0712 are grounded. When a negative voltage (−V OFF <0 V) is applied to the first wiring B 0722 also serving as the third electrode, the dissolution reaction of the metal bridge 0721 proceeds, and the metal bridge 0724 becomes metal ions (Cu ions), and the ion conductive layer Disperse in 0704. As a result, the resistance value between the first electrode 0701 and the second electrode 0702 becomes high resistance and transitions to the OFF state.
 OFF状態への遷移は、第3電極を兼ねる第1配線B0722を接地して、第1電極0701及び第2電極0702に正電圧(+VOFF>0V)を印加しても良い。 In the transition to the OFF state, the first wiring B 0722 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 0701 and the second electrode 0702.
 第1電極0701と第2電極0702の側面形状が曲率を有することで、ON状態とOFF状態へのスイッチング時、スイッチング電圧を印加すると、該曲率部分に電界が集中し、安定かつバラツキが小さいスイッチング動作が得られる。 Since the side surfaces of the first electrode 0701 and the second electrode 0702 have curvature, when a switching voltage is applied during switching between the ON state and the OFF state, the electric field concentrates on the curvature portion, and switching is stable and has little variation. Operation is obtained.
 (製造プロセス)
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置において、図7に示す、第二の実施態様の3端子スイッチング素子を、前記抵抗変化型不揮発性スイッチング素子として作製する際の製造プロセスを説明する。図8-1と図8-2が、第二の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図である。図8-1は、該製造工程中、工程1~工程6を示す図であり、図8-2は、該製造工程中、工程7~工程10を示す図である。
(Manufacturing process)
In a semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate, the three-terminal switching element of the second embodiment shown in FIG. A manufacturing process for manufacturing a nonvolatile switching element will be described. FIGS. 8A and 8B are cross-sectional views schematically showing an example of the manufacturing process of the three-terminal switching element of the second embodiment. FIG. 8A is a diagram showing steps 1 to 6 in the manufacturing process, and FIG. 8B is a diagram showing steps 7 to 10 in the manufacturing process.
 (工程1)
 半導体基板0819(例えば、半導体素子が形成された基板)上に層間絶縁膜0813(例えば、膜厚300nmのSiO2、膜厚150nmのSiOCH、膜厚100nmのSiO2)を堆積し、その後、リソグラフィ法(フォトレジスト形成、ドライエッチング、フォトレジスト除去を含む)を用いて、層間絶縁膜0813に配線溝を形成し、その後、当該配線溝に第1バリアメタルA0810及び第1バリアメタルB0821(例えば、TaN/Ta、膜厚5nm/5nm)を介して第1配線A0807及び第1配線B0922(例えば、Cu)を埋め込む。層間絶縁膜0813は、プラズマCVD法によって形成することができる。第1配線A0807及び第1配線B0822は、例えば、PVD法によって第1バリアメタルA0810及び第1バリアメタルB(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によってCuを配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。ここで、CMP(Chemical Mechanical Polishing)法とは、多層配線形成プロセス中に生じるウエハ表面の凹凸を、研磨液をウエハ表面に流しながら回転させた研磨パッドに接触させて研磨することによって平坦化する方法である。配線溝に埋め込まれた余剰の銅を研磨することによって埋め込み配線(ダマシン配線)を形成したり、層間絶縁膜0813を研磨することで平坦化を行う。
(Process 1)
An interlayer insulating film 0813 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 0819 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed. A wiring trench is formed in the interlayer insulating film 0813 using a method (including photoresist formation, dry etching, and photoresist removal), and then a first barrier metal A0810 and a first barrier metal B0821 (for example, The first wiring A0807 and the first wiring B0922 (for example, Cu) are embedded through (TaN / Ta, film thickness 5 nm / 5 nm). The interlayer insulating film 0813 can be formed by a plasma CVD method. For example, the first wiring A0807 and the first wiring B0822 are formed by forming a first barrier metal A0810 and a first barrier metal B (for example, a TaN / Ta laminated film) by a PVD method, and after forming a Cu seed by a PVD method, Cu can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. Here, the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness on the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 0813 by polishing.
 (工程2)
 第1配線A0807及び第1配線B0822の上面、層間絶縁膜0913上にバリア絶縁膜0805(例えば、SiN、膜厚30nm)を形成する。ここで、バリア絶縁膜0805は、プラズマCVD法によって形成することができる。バリア絶縁膜0805の膜厚は、10nm~50nm程度であることが好ましい。バリア絶縁膜0805上にハードマスク0825(例えば、SiO2)を形成する。このとき、ハードマスク0825は、ドライエッチング加工におけるエッチング選択比を大きく保つ観点から、バリア絶縁膜0805とは異なる材料であることが好ましく、絶縁膜であっても導電膜であってもよい。ハードマスク0825には、例えば、SiO2、SiN、SiCN、TiN、Ti、Ta、TaN等を用いることができ、SiCN/SiO2の積層体を用いることができる。
(Process 2)
A barrier insulating film 0805 (for example, SiN, film thickness of 30 nm) is formed on the upper surface of the first wiring A0807 and the first wiring B0822, and on the interlayer insulating film 0913. Here, the barrier insulating film 0805 can be formed by a plasma CVD method. The thickness of the barrier insulating film 0805 is preferably about 10 nm to 50 nm. A hard mask 0825 (eg, SiO 2 ) is formed over the barrier insulating film 0805. At this time, the hard mask 0825 is preferably made of a material different from the barrier insulating film 0805 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film. For the hard mask 0825, for example, SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
 (工程3)
 ハードマスク0825上にフォトレジスト(図示せず)を用いて第1配線B0822の上のみに開口部をパターニングし、フォトレジストをマスクとしてドライエッチングすることによりハードマスク0825に開口部パターンを形成し、その後、酸素プラズマアッシング等によってフォトレジストを剥離する。このとき、ドライエッチングは必ずしもバリア絶縁膜0805の上面で停止している必要はなく、バリア絶縁膜0805の内部にまで到達していてもよい。
(Process 3)
An opening is patterned only on the first wiring B 0822 using a photoresist (not shown) on the hard mask 0825, and an opening pattern is formed on the hard mask 0825 by dry etching using the photoresist as a mask. Thereafter, the photoresist is removed by oxygen plasma ashing or the like. At this time, dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0805, and may reach the inside of the barrier insulating film 0805.
 ハードマスク0825をマスクとして、ハードマスク0825の開口部から露出するバリア絶縁膜0805をエッチバック(ドライエッチング)することにより、バリア絶縁膜0805に開口部を形成して、バリア絶縁膜0805の開口部から第1配線B0822を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線B0822の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。バリア絶縁膜0805のエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜0805の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク0825は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜0805の開口部の形状は円形とし、円の直径は30nmから500nmとすることができる。非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線B0822の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。 Using the hard mask 0825 as a mask, the barrier insulating film 0805 exposed from the opening of the hard mask 0825 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 0805 and the opening of the barrier insulating film 0805 is formed. Then, the first wiring B0822 is exposed, and thereafter, an organic stripping process is performed with an amine-based stripping solution to remove copper oxide formed on the exposed surface of the first wiring B0822, and etching that occurs at the time of etch back Remove double products. In the etch back of the barrier insulating film 0805, the wall surface of the opening of the barrier insulating film 0805 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 0825 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material. The shape of the opening in the barrier insulating film 0805 can be a circle, and the diameter of the circle can be 30 nm to 500 nm. The oxide on the surface of the first wiring B0822 is removed by RF (Radio-Frequency; high frequency) etching using a non-reactive gas. As the non-reactive gas, helium or argon can be used.
 (工程4)
 開口したバリア絶縁膜0823および第1配線B0822上に10nm程度のバリア絶縁膜0823を成膜する。バリア絶縁膜0823にはSiC膜もしくはSiCN膜を用いることができる。
(Process 4)
A barrier insulating film 0823 having a thickness of about 10 nm is formed over the opened barrier insulating film 0823 and the first wiring B 0822. For the barrier insulating film 0823, a SiC film or a SiCN film can be used.
 (工程5)
 バリア絶縁膜0823上にハードマスク0826(例えば、SiO2)を形成する。このとき、ハードマスク0826は、ドライエッチング加工におけるエッチング選択比を大きく保つ観点から、バリア絶縁膜0823とは異なる材料であることが好ましく、絶縁膜であっても導電膜であってもよい。ハードマスク0826には、例えば、SiO2、SiN、SiCN、TiN、Ti、Ta、TaN等を用いることができ、SiCN/SiO2の積層体を用いることができる。
(Process 5)
A hard mask 0826 (eg, SiO 2 ) is formed over the barrier insulating film 0823. At this time, the hard mask 0826 is preferably made of a material different from the barrier insulating film 0823 from the viewpoint of maintaining a high etching selectivity in the dry etching process, and may be an insulating film or a conductive film. For the hard mask 0826, for example, SiO 2 , SiN, SiCN, TiN, Ti, Ta, TaN or the like can be used, and a laminated body of SiCN / SiO 2 can be used.
 (工程6)
 ハードマスク0825上にフォトレジスト(図示せず)を用いて第1配線A0807の上のみに開口部をパターニングし、フォトレジストをマスクとしてドライエッチングすることによりハードマスク0826に開口部パターンを形成し、その後、酸素プラズマアッシング等によってフォトレジストを剥離する。このとき、ドライエッチングは必ずしもバリア絶縁膜0823の上面で停止している必要はなく、バリア絶縁膜0823およびバリア絶縁膜0805の内部にまで到達していてもよい。
(Step 6)
An opening is patterned only on the first wiring A0807 using a photoresist (not shown) on the hard mask 0825, and an opening pattern is formed on the hard mask 0826 by dry etching using the photoresist as a mask. Thereafter, the photoresist is removed by oxygen plasma ashing or the like. At this time, the dry etching is not necessarily stopped on the upper surface of the barrier insulating film 0823, and may reach the inside of the barrier insulating film 0823 and the barrier insulating film 0805.
 ハードマスク0826をマスクとして、ハードマスク0826の開口部から露出するバリア絶縁膜0823およびバリア絶縁膜0805をエッチバック(ドライエッチング)することにより、バリア絶縁膜0823およびバリア絶縁膜0805に開口部を形成して、バリア絶縁膜0823およびバリア絶縁膜0805の開口部から第1配線A0807を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線A0807の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。バリア絶縁膜0823およびバリア絶縁膜0805のエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜0823およびバリア絶縁膜0805の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク0825は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜0823およびバリア絶縁膜0805の開口部の形状は円形とし、円の直径は30nmから500nmとすることができる。非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線A0807の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。 Using the hard mask 0826 as a mask, the barrier insulating film 0823 and the barrier insulating film 0805 exposed from the opening of the hard mask 0826 are etched back (dry etching) to form openings in the barrier insulating film 0823 and the barrier insulating film 0805. Then, the first wiring A0807 is exposed from the openings of the barrier insulating film 0823 and the barrier insulating film 0805, and thereafter, organic stripping treatment is performed with an amine-based stripping solution or the like to form the exposed surface of the first wiring A0807. The removed copper oxide is removed, and etching byproducts generated during the etch back are removed. In the etch-back of the barrier insulating film 0823 and the barrier insulating film 0805, the wall surfaces of the openings of the barrier insulating film 0823 and the barrier insulating film 0805 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 0825 is preferably completely removed during the etch back, but may remain as it is when it is an insulating material. The shape of the opening in the barrier insulating film 0823 and the barrier insulating film 0805 can be circular, and the diameter of the circle can be 30 nm to 500 nm. The oxide on the surface of the first wiring A0807 is removed by RF (Radio-Frequency) using non-reactive gas. As the non-reactive gas, helium or argon can be used.
 (工程7)
 開口されたバリア絶縁膜0823および第1配線A0807の上に第2金属膜0809(例えば、Ru3nmとTa5nmをこの順番で堆積する),バリア絶縁膜0803(例えばSiN膜、膜厚5nm~10nm)、第1金属膜0808(例えば、Ta3nm、Ru5nmとTa25nmをこの順番で堆積する)を順に堆積する。さらに、ハードマスク0818(例えば、SiN膜、膜厚30nm)、およびハードマスク0827(例えば、SiO2膜、膜厚100nm)をこの順に積層する。工程7において、ハードマスク0818、0827は、プラズマCVD法によって形成することができる。また、工程7において、第1金属膜0808及び第2金属膜0809はスパッタ法によって形成する。さらに、ハードマスク0827をパターニングするためのフォトレジスト(図示せず)を形成し、その後、当該フォトレジストをマスクとして、ハードマスク0818が表れるまでハードマスク0826をドライエッチングし、その後、酸素プラズマアッシングと有機剥離を用いてフォトレジストを除去する。フォトレジスト・マスクの露光パターンにより、ハードマスク1109の平面形状(上面から見た形状)が円もしくは楕円になっている。もしくは、フォトレジスト・マスクの露光パターン自体は、長方形もしくは正方形とし、ハードマスク0827のエッチング加工時、サイド・エッチングによって、角部の除去を進め、結果として、ハードマスク0827の平面形状に曲率を持たせてもよい。
(Step 7)
A second metal film 0809 (for example, Ru3 nm and Ta5 nm are deposited in this order), a barrier insulating film 0803 (for example, a SiN film, a film thickness of 5 nm to 10 nm) on the opened barrier insulating film 0823 and the first wiring A0807; A first metal film 0808 (for example, Ta 3 nm, Ru 5 nm, and Ta 25 nm are deposited in this order) is sequentially deposited. Further, a hard mask 0818 (for example, SiN film, film thickness of 30 nm) and a hard mask 0827 (for example, SiO 2 film, film thickness of 100 nm) are stacked in this order. In Step 7, the hard masks 0818 and 0827 can be formed by a plasma CVD method. In step 7, the first metal film 0808 and the second metal film 0809 are formed by sputtering. Further, a photoresist (not shown) for patterning the hard mask 0827 is formed. After that, using the photoresist as a mask, the hard mask 0826 is dry-etched until the hard mask 0818 appears, and then oxygen plasma ashing is performed. The photoresist is removed using organic stripping. Depending on the exposure pattern of the photoresist mask, the planar shape of the hard mask 1109 (the shape seen from the top surface) is a circle or an ellipse. Alternatively, the exposure pattern of the photoresist mask itself is rectangular or square, and when the hard mask 0827 is etched, the corners are removed by side etching. As a result, the planar shape of the hard mask 0827 has a curvature. It may be allowed.
 (工程8)
 次に、ハードマスク0827をマスクとして、ハードマスク0818、第1金属膜0808、バリア絶縁膜0803、第2金属膜0809、バリア絶縁膜0823を連続的にドライエッチングし、第1電極0801および第2電極0802を形成し、第1配線A0807を露出させる。このとき、ハードマスク0827は、エッチバック中に完全に除去されることが好ましいが、そのまま残存してもよい。工程8において、第1金属膜0808および第2金属膜0809のTa膜はCl2系のRIEで加工することができ、Ru膜はCl2/O2の混合ガスでRIE加工することができる。このようなハードマスクRIE法を用いることで、第1金属膜0808および第2金属膜0809を、レジスト除去のための酸素プラズマアッシングに曝すことなく、エッチング加工をすることができる。また、加工後に、ハードマスク0827のパターニングに用いたレジストを、酸素プラズマによって酸化処理する場合には、第1金属膜0808はハードマスク0827により被覆されている。レジストの剥離工程において、酸化プラズマを照射する際、その照射時間が長くなっても、ハードマスク0827により被覆されている第1金属膜0808の酸化は生じない。
(Process 8)
Next, using the hard mask 0827 as a mask, the hard mask 0818, the first metal film 0808, the barrier insulating film 0803, the second metal film 0809, and the barrier insulating film 0823 are continuously dry-etched to form the first electrode 0801 and the second electrode An electrode 0802 is formed and the first wiring A0807 is exposed. At this time, the hard mask 0827 is preferably completely removed during the etch-back, but may remain as it is. In step 8, the Ta films of the first metal film 0808 and the second metal film 0809 can be processed by Cl 2 RIE, and the Ru film can be processed by RIE with a mixed gas of Cl 2 / O 2 . By using such a hard mask RIE method, the first metal film 0808 and the second metal film 0809 can be etched without being exposed to oxygen plasma ashing for resist removal. In addition, when the resist used for patterning the hard mask 0827 is oxidized with oxygen plasma after processing, the first metal film 0808 is covered with the hard mask 0827. In the resist stripping process, when the irradiation with the oxidation plasma is performed, the first metal film 0808 covered with the hard mask 0827 is not oxidized even if the irradiation time is increased.
 また、バリア絶縁膜0823を加工する際は、フルオロカーボン系のガス(例えば、CF4)を用いてエッチングする。工程7では、ハードマスク0818、第1金属膜0808、バリア絶縁膜0803、第2金属膜0809、バリア絶縁膜0823の平面形状が、曲率を有するようにエッチングレシピを調整してもよい。 Further, when the barrier insulating film 0823 is processed, etching is performed using a fluorocarbon-based gas (for example, CF 4 ). In Step 7, the etching recipe may be adjusted so that the planar shapes of the hard mask 0818, the first metal film 0808, the barrier insulating film 0803, the second metal film 0809, and the barrier insulating film 0823 have a curvature.
 (工程9)
 次に、保護絶縁膜0823、ハードマスク0818、第1電極0801、バリア絶縁膜0805、第2電極0802、バリア絶縁膜0803、バリア絶縁膜0823、第1配線B0822に接するようにイオン伝導層0804として、シリコン、酸素、炭素、水素を含むSIOCH系イオン伝導性材料をCVD法で20nmから80nm程度形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。温度は250℃~350℃程度が好ましい。次に、イオン伝導層0804上にバリア絶縁膜0814としてSiNもしくはSiCNを30nmの膜厚で形成する。工程9において、バリア絶縁膜0814は、プラズマCVD法によって形成することができる。例えば、SiH4/N2の混合ガスを高密度プラズマによって形成したSiN膜などを用いることが好ましい。3端子スイッチ素子0820以外の領域にもイオン伝導層0804が残るが、絶縁膜として機能するため、3端子スイッチの動作および多層配線に影響はない。工程9では、バリア絶縁膜0814の上に層間絶縁膜0815としてSiO2を300nm成膜する。さらに、3端子スイッチ0820によって生じた段差を解消するため、層間絶縁膜0815を170nm程度CMP法にて研磨することで平坦にする。層間絶縁膜0815は3端子スイッチ素子0820の段差を確実に埋めるために、高密度プラズマを使用してSiO2を成膜することが望ましい。
(Step 9)
Next, an ion conductive layer 0804 is formed in contact with the protective insulating film 0823, the hard mask 0818, the first electrode 0801, the barrier insulating film 0805, the second electrode 0802, the barrier insulating film 0803, the barrier insulating film 0823, and the first wiring B0822. Then, an SIOCH ion conductive material containing silicon, oxygen, carbon, and hydrogen is formed to a thickness of about 20 nm to 80 nm by a CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is directly supplied to the reaction chamber by another line. The temperature is preferably about 250 ° C to 350 ° C. Next, SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0814 over the ion conductive layer 0804. In Step 9, the barrier insulating film 0814 can be formed by a plasma CVD method. For example, it is preferable to use a SiN film in which a mixed gas of SiH 4 / N 2 is formed by high-density plasma. Although the ion conductive layer 0804 remains in a region other than the three-terminal switch element 0820, it functions as an insulating film and does not affect the operation of the three-terminal switch and the multilayer wiring. Step 9 is to deposit 300 nm of SiO 2 as an interlayer insulating film 0815 on the barrier insulating film 0814. Further, in order to eliminate the level difference caused by the three-terminal switch 0820, the interlayer insulating film 0815 is flattened by polishing by about 170 nm by a CMP method. The interlayer insulating film 0815 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the step of the three-terminal switch element 0820.
 (工程10)
 次に、層間絶縁膜0815の上に層間絶縁膜0816(例えば、比誘電率の低いSiOC、SiO2の積層)を堆積し、その後、プラグ0806用の下穴および第2配線0812用の配線溝をドライエッチングによって形成し、銅デュアルダマシン配線プロセスを用いて、当該配線溝及び当該下穴内に第2バリアメタル0811(例えば、TaN/Ta)を介して第2配線0812(例えば、Cu)及びプラグ0806(例えば、Cu)を同時に形成し、その後、第2配線0812を含む層間絶縁膜0816上にバリア絶縁膜0817(例えば、SiCN膜)を堆積する。工程10において、第2配線0812およびプラグ0806の形成は、例えば、PVD法によって第2バリアメタル0811(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によって銅を配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。工程10では、第2バリアメタル0811と第1金属膜0808の上層を同一材料とすることで、プラグ0806と第1金属膜0808の間の接触抵抗を低減し、素子性能を向上(ON状態時の3端子スイッチの抵抗を低減)させることができるようになる。また、工程10において、層間絶縁膜0816及びバリア絶縁膜0817はプラズマCVD法で形成することができる。工程10ではプラグ0806の下穴を形成する際、第1金属膜0808の上層に到達しており、第1金属膜0808の上層の材料がエッチングストッパ材料として機能する。プラグ0806用の下穴および第2配線0812用の配線溝のドライエッチングには、フルオロカーボン系のガスを用いる。
(Process 10)
Next, an interlayer insulating film 0816 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 0815, and then a pilot hole for the plug 0806 and a wiring groove for the second wiring 0812 are formed. Is formed by dry etching, and a second wiring 0812 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 0811 (for example, TaN / Ta) using a copper dual damascene wiring process. 0806 (for example, Cu) is formed at the same time, and then a barrier insulating film 0817 (for example, a SiCN film) is deposited over the interlayer insulating film 0816 including the second wiring 0812. In step 10, the second wiring 0812 and the plug 0806 are formed by, for example, forming a second barrier metal 0811 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. In step 10, the upper layer of the second barrier metal 0811 and the first metal film 0808 are made of the same material, so that the contact resistance between the plug 0806 and the first metal film 0808 is reduced and the device performance is improved (in the ON state). The resistance of the three-terminal switch can be reduced). In Step 10, the interlayer insulating film 0816 and the barrier insulating film 0817 can be formed by a plasma CVD method. In step 10, when forming the prepared hole of the plug 0806, it reaches the upper layer of the first metal film 0808, and the material of the upper layer of the first metal film 0808 functions as an etching stopper material. A fluorocarbon gas is used for dry etching of the prepared hole for the plug 0806 and the wiring groove for the second wiring 0812.
 (第三の実施形態)
 本発明に係る金属架橋型スイッチング素子における、第三の実施形態は、下に説明する「3端子スイッチ」の構成を採用する、金属架橋型スイッチング素子である。
(Third embodiment)
The third embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “three-terminal switch” described below.
 本発明の第三の実施形態にかかる金属架橋型スイッチング素子で採用される、「3端子スイッチ」の構成を説明する。図9は、第三の実施形態の「3端子スイッチ」の構成の一例を模式的に示す断面図である。 The configuration of the “3-terminal switch” employed in the metal bridge type switching element according to the third embodiment of the present invention will be described. FIG. 9 is a cross-sectional view schematically showing an example of the configuration of the “3-terminal switch” of the third embodiment.
 図9に示すように、3端子スイッチは、プラグ0906に接続している第1金属膜0907と、第2電極を兼ねる第1配線A0902と、第1金属膜0907の側面である第1電極0901と、第2電極を兼ねる第1配線A0902、層間絶縁膜0903の側面に接したイオン伝導層0904と、イオン伝導層0904に接した第3電極を兼ねた第1配線B0908で形成されている。ONに遷移する際に形成する金属架橋0905は第1電極0901と第2電極を兼ねる第1配線層B0908を繋ぐように形成される。また、イオン伝導層0904は金属のイオンが伝導するための媒体となる。 As shown in FIG. 9, the three-terminal switch includes a first metal film 0907 connected to the plug 0906, a first wiring A0902 that also serves as the second electrode, and a first electrode 0901 that is a side surface of the first metal film 0907. And the first wiring A 0902 also serving as the second electrode, the ion conductive layer 0904 in contact with the side surface of the interlayer insulating film 0903, and the first wiring B 0908 also serving as the third electrode in contact with the ion conductive layer 0904. The metal bridge 0905 formed at the time of transition to ON is formed so as to connect the first electrode 0901 and the first wiring layer B0908 that also serves as the second electrode. The ion conductive layer 0904 serves as a medium for conducting metal ions.
 第1電極0901を構成する第1金属膜0907は、はタンタル(Ta)、チタン(Ti)、タングステン(W)、ルテニウム(Ru)、プラチナ(Pt)、ニッケル(Ni)、窒化タンタル(TaN)、窒化チタン(TiN)が適しており、これらの積層でも良い。特にRuが好ましい。これらの金属はスパッタ法、レーザーアブレーション法、プラズマCVD法を用いて形成する。 The first metal film 0907 constituting the first electrode 0901 is made of tantalum (Ta), titanium (Ti), tungsten (W), ruthenium (Ru), platinum (Pt), nickel (Ni), tantalum nitride (TaN). Titanium nitride (TiN) is suitable, and these layers may be used. Ru is particularly preferable. These metals are formed by sputtering, laser ablation, or plasma CVD.
 第1電極0901を構成する第1金属膜0907の平面形状は曲率を有している。そのため、第1電極0901も曲率を有する。 The planar shape of the first metal film 0907 constituting the first electrode 0901 has a curvature. Therefore, the first electrode 0901 also has a curvature.
 イオン伝導層0904はスパッタ法、レーザーアブレーション法、プラズマCVD法を用いて形成する。イオン伝導層0904の材料としては、金属のイオンの伝導度の大きく、かつ、LSI生産ラインにおいて加工可能な材料を選択する必要がある。 The ion conductive layer 0904 is formed by sputtering, laser ablation, or plasma CVD. As a material for the ion conductive layer 0904, it is necessary to select a material having a high metal ion conductivity and which can be processed in an LSI production line.
 イオン伝導層0904の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する積層構造の側面に、GeSbTeからなるイオン伝導層0904を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One of the material candidates that can be used for the production of the ion conductive layer 0904 is chalcogenide GeSbTe, which is used as a material of the phase change layer in the phase change element. As a means for forming the ion conductive layer 0904 made of GeSbTe on the side surface of the multilayer structure having a curvature, there is a method of forming a film by sputtering using a sintered target of GeSbTe. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層0904の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 0904 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 第2電極を兼ねる第1配線A0902及び第3電極を兼ねる第1配線B0908は、イオン伝導層0904に金属イオンを供給可能な金属で構成される。例えば、主金属はCuで、Alなどとの合金でも良い。 The first wiring A 0902 that also serves as the second electrode and the first wiring B 0908 that also serves as the third electrode are made of a metal that can supply metal ions to the ion conductive layer 0904. For example, the main metal is Cu, and an alloy with Al or the like may be used.
 (スイッチング動作)
 図9に示す、第三の実施態様の3端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the three-terminal switch of the third embodiment shown in FIG. 9 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 まず、第1電極0901及び第2電極を兼ねる第1配線A0902を接地して、第3電極を兼ねる第1配線B0908に正電圧(+VON>0V)を印加すると第1配線B0908から金属イオンがイオン伝導層0904中へ拡散し、第1電極0901及び第1配線A0902側にマイグレーションする。マイグレーションした金属イオンは第1電極0901及び第1配線A0902より電子を受け取り、第1電極0901と第1配線A0902間に電気力線に従って電気化学反応によって金属架橋0905が析出する。これによって第1電極0901と第1配線A0902の間の抵抗値が低抵抗となり、オン状態となる。
(A) ON operation (transition process from OFF state to ON state)
First, when the first wiring A0902 that also serves as the first electrode 0901 and the second electrode is grounded and a positive voltage (+ V ON > 0V) is applied to the first wiring B0908 that also serves as the third electrode, metal ions are generated from the first wiring B0908. It diffuses into the ion conductive layer 0904 and migrates to the first electrode 0901 and the first wiring A0902 side. The migrated metal ions receive electrons from the first electrode 0901 and the first wiring A0902, and a metal bridge 0905 is deposited between the first electrode 0901 and the first wiring A0902 by an electrochemical reaction according to the lines of electric force. As a result, the resistance value between the first electrode 0901 and the first wiring A0902 becomes low, and the device is turned on.
 ON状態への遷移は、第3電極を兼ねる第1配線B0910を接地して、第1電極0901及び第1配線A0902に負電圧(-VON<0V)を印加しても良い。 In the transition to the ON state, the first wiring B 0910 that also serves as the third electrode may be grounded, and a negative voltage (−V ON <0 V) may be applied to the first electrode 0901 and the first wiring A 0902.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、第1電極0901及び第2電極を兼ねる第1配線A0902を接地して、第3電極を兼ねる第1配線B0908に負電圧(-VOFF<0V)を印加すると、金属架橋0905の溶解反応が進行し、金属架橋0905は金属イオンとなって、イオン伝導層0904中に分散する。これによって、第1電極0901と第1配線A0902の間の抵抗値が高抵抗となり、OFF状態に遷移する。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, when the first wiring A0902 also serving as the first electrode 0901 and the second electrode is grounded and a negative voltage (−V OFF <0V) is applied to the first wiring B0908 also serving as the third electrode, the dissolution reaction of the metal bridge 0905 The metal bridge 0905 becomes metal ions and is dispersed in the ion conductive layer 0904. As a result, the resistance value between the first electrode 0901 and the first wiring A0902 becomes high resistance, and transitions to the OFF state.
 OFF状態への遷移は、第3電極を兼ねる第1配線B0710を接地して、第1電極0901及び第1配線A0902に正電圧(+VOFF>0V)を印加しても良い。 In the transition to the OFF state, the first wiring B0710 that also serves as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 0901 and the first wiring A0902.
 第1電極0901の側面形状が曲率を有することで、ON状態とOFF状態へのスイッチング時、スイッチング電圧を印加すると、該曲率部分に電界が集中し、安定かつバラツキが小さい動作が得られる。 Since the side surface shape of the first electrode 0901 has a curvature, when a switching voltage is applied at the time of switching between the ON state and the OFF state, an electric field concentrates on the curvature portion, and an operation with stable and small variation is obtained.
 (第一の実施態様)
 本発明の第三の実施形態にかかる、第一の実施態様の3端子スイッチング素子について説明する。
(First embodiment)
A three-terminal switching element according to the first embodiment according to the third embodiment of the present invention will be described.
 該第一の実施態様の3端子スイッチング素子は、半導体装置に設ける多層配線層内部に形成されている。図10に、半導体装置に設ける多層配線層内部に形成されている、該第二の実施態様の3端子スイッチング素子1020の構造を示す。 The three-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device. FIG. 10 shows the structure of the three-terminal switching element 1020 of the second embodiment, which is formed inside a multilayer wiring layer provided in the semiconductor device.
 半導体装置に設ける多層配線層の内部に、3端子スイッチ1020が形成されている。多層配線層は、第1電極1001を構成する第1金属膜1008と電気的に接続されたプラグ1006、および第2電極1002を構成する第1配線A1007を備え、イオン伝導層1004は第1電極1001および第2電極1002に接しており、第1金属膜1008と第1配線A1007との間にバリア絶縁膜1005を備え、イオン伝導層1004と層間絶縁膜1015の間はバリア絶縁膜1014が存在する。また、プラグ1006は第2配線1012に接続している。さらに、第1配線B1022は第3電極を兼ね、バリア絶縁膜1005の開口部でイオン伝導層1004と接している。 A three-terminal switch 1020 is formed inside a multilayer wiring layer provided in the semiconductor device. The multilayer wiring layer includes a plug 1006 electrically connected to the first metal film 1008 constituting the first electrode 1001, and a first wiring A1007 constituting the second electrode 1002, and the ion conductive layer 1004 is the first electrode. 1001 and the second electrode 1002, a barrier insulating film 1005 is provided between the first metal film 1008 and the first wiring A 1007, and a barrier insulating film 1014 exists between the ion conductive layer 1004 and the interlayer insulating film 1015. To do. The plug 1006 is connected to the second wiring 1012. Further, the first wiring B1022 also serves as the third electrode, and is in contact with the ion conductive layer 1004 through the opening of the barrier insulating film 1005.
 多層配線層は、半導体基板1019上にて、層間絶縁膜1013、バリア絶縁膜1005、保護絶縁膜1023、イオン伝導層1004、バリア絶縁膜1014、層間絶縁膜1015、層間絶縁膜1016、及びバリア絶縁膜1017の順に積層した絶縁積層体を有する。 The multilayer wiring layer includes an interlayer insulating film 1013, a barrier insulating film 1005, a protective insulating film 1023, an ion conductive layer 1004, a barrier insulating film 1014, an interlayer insulating film 1015, an interlayer insulating film 1016, and a barrier insulating film on the semiconductor substrate 1019. An insulating stacked body is formed in the order of the film 1017.
 層間絶縁膜1016に形成された配線溝に第2配線1012が埋め込まれており、層間絶縁膜1015、バリア絶縁膜1014、イオン伝導層1004、保護絶縁膜1003及びハードマスク1018に形成された下穴にプラグ1006が埋め込まれており、第2配線1012とプラグ1006がそれぞれ一体となっており、第2配線1012およびプラグ1006の側面及び底面は、第2バリアメタル1011によって覆われている。 A second wiring 1012 is embedded in a wiring groove formed in the interlayer insulating film 1016, and pilot holes formed in the interlayer insulating film 1015, the barrier insulating film 1014, the ion conductive layer 1004, the protective insulating film 1003, and the hard mask 1018. The plug 1006 is embedded in the second wiring 1012 and the plug 1006, and the side surfaces and the bottom surface of the second wiring 1012 and the plug 1006 are covered with the second barrier metal 1011.
 3端子スイッチ1020では、開口されたバリア絶縁膜1005上に、第1電極1001を構成している第1金属膜1008、ハードマスク1008、保護絶縁膜1003があり、保護絶縁膜1003の上面とハードマスク1018、第1金属膜1008、バリア絶縁膜1005の側面、第1配線A1007の上面、及び、第1配線B1022の上面を覆うように、イオン伝導層1004が形成されており、その上にバリア絶縁膜1014が形成されている。 In the three-terminal switch 1020, a first metal film 1008, a hard mask 1008, and a protective insulating film 1003 constituting the first electrode 1001 are provided on the opened barrier insulating film 1005. An ion conductive layer 1004 is formed so as to cover the mask 1018, the first metal film 1008, the side surfaces of the barrier insulating film 1005, the upper surface of the first wiring A 1007, and the upper surface of the first wiring B 1022. An insulating film 1014 is formed.
 第1電極1001を構成する第1金属膜1008がプラグ1006と第2バリアメタル1011を介して電気的に接続されている。また、第2電極1002を構成する第1配線Aは、バリア絶縁膜1005に開口された開口部を介して第1配線A1007及び第1バリアメタルA1010と電気的に接続されている。また、第3電極は第1配線B1022が兼ねている。 The first metal film 1008 constituting the first electrode 1001 is electrically connected to the plug 1006 via the second barrier metal 1011. In addition, the first wiring A configuring the second electrode 1002 is electrically connected to the first wiring A 1007 and the first barrier metal A 1010 through an opening opened in the barrier insulating film 1005. The third electrode also serves as the first wiring B1022.
 第1電極1001を構成する第1金属膜1008は2層構造となっており、プラグ1006に接する面(上層)は、第2バリアメタル1011と同じ材料を用いる。このようにすることで、プラグ1006の第2バリアメタル1011と3端子スイッチ1020の第1電極1001を構成する第1金属膜1008の上層とが一体化し、接触抵抗を低減し、かつ、密着性の向上による信頼性の向上を実現することができる。 The first metal film 1008 constituting the first electrode 1001 has a two-layer structure, and the same material as the second barrier metal 1011 is used for the surface (upper layer) in contact with the plug 1006. By doing so, the second barrier metal 1011 of the plug 1006 and the upper layer of the first metal film 1008 constituting the first electrode 1001 of the three-terminal switch 1020 are integrated, the contact resistance is reduced, and the adhesiveness is reduced. Improvement of reliability can be realized by improving the above.
 半導体基板1019は、半導体素子が形成された基板である。半導体基板1019には、例えば、シリコン基板、単結晶基板、SOI(Silicon on Insulator)基板、TFT(Thin Film Transistor)基板、液晶製造用基板等の基板を用いることができる。 The semiconductor substrate 1019 is a substrate on which a semiconductor element is formed. As the semiconductor substrate 1019, for example, a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
 層間絶縁膜1013は、半導体基板1019上に形成された絶縁膜である。層間絶縁膜1013には、例えば、SiO2、シリコン酸化膜よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)等を用いることができる。層間絶縁膜1013は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜1013には、第1配線A1007及び第1配線B1022を埋め込むための配線溝が形成されており、当該配線溝に第1バリアメタルA1010を介して第1配線A1007が、第1バリアメタルB1021を介して第1配線B1022が埋め込まれている。 The interlayer insulating film 1013 is an insulating film formed on the semiconductor substrate 1019. As the interlayer insulating film 1013, for example, SiO 2 , a low dielectric constant film (for example, SiOCH film) having a relative dielectric constant lower than that of a silicon oxide film can be used. The interlayer insulating film 1013 may be a stack of a plurality of insulating films. In the interlayer insulating film 1013, a wiring groove for embedding the first wiring A1007 and the first wiring B1022 is formed, and the first wiring A1007 is inserted into the wiring groove via the first barrier metal A1010. The first wiring B1022 is embedded through B1021.
 第1配線A1007及び第1配線B1022は、層間絶縁膜1013に形成された配線溝に第1バリアメタルA1010及び第1バリアメタルB1021を介して埋め込まれた配線である。第1配線A1007は、第2電極1002を兼ねている。第1配線B1022はイオン伝導層1004と直接接している。第1配線A1007及び第1配線B1022はCuで構成されているが、Alと合金化されていてもよい。第1配線B1022は3端子イオン伝導層1004中にCuイオンを供給する第3電極として機能する。 The first wiring A 1007 and the first wiring B 1022 are wirings embedded in the wiring trench formed in the interlayer insulating film 1013 via the first barrier metal A 1010 and the first barrier metal B 1021. The first wiring A1007 also serves as the second electrode 1002. The first wiring B1022 is in direct contact with the ion conductive layer 1004. The first wiring A1007 and the first wiring B1022 are made of Cu, but may be alloyed with Al. The first wiring B1022 functions as a third electrode that supplies Cu ions into the three-terminal ion conductive layer 1004.
 第1バリアメタルA1010及び第1バリアメタルB1021は、第1配線A1007及び第1配線B1022を構成する金属が層間絶縁膜1013や下層へ拡散することを防止するために、配線の側面および底面を被覆する、バリア性を有する導電性膜である。第1バリアメタルA1010及び第1バリアメタルB1021には、例えば、第1配線1010がCuを主成分とする金属元素からなる場合には、タンタル(Ta)、窒化タンタル(TaN)、窒化チタン(TiN)、炭窒化タングステン(WCN)のような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The first barrier metal A1010 and the first barrier metal B1021 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A1007 and the first wiring B1022 from diffusing into the interlayer insulating film 1013 or the lower layer. It is a conductive film having a barrier property. In the first barrier metal A1010 and the first barrier metal B1021, for example, when the first wiring 1010 is made of a metal element mainly composed of Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN) ), A refractory metal such as tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof.
 バリア絶縁膜1005は、第1配線A1007及び第1配線B1022を含む層間絶縁膜1013上に形成され、第1配線A1007及び第1配線B1022を構成する金属(例えば、Cu)の酸化を防いだり、イオン伝導層1004中への第1配線A1007及び第1配線B1022を構成する金属の拡散を防ぐ役割を有する。バリア絶縁膜1005には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 1005 is formed on the interlayer insulating film 1013 including the first wiring A1007 and the first wiring B1022, and prevents oxidation of the metal (for example, Cu) constituting the first wiring A1007 and the first wiring B1022, It has a role of preventing diffusion of the metal constituting the first wiring A 1007 and the first wiring B 1022 into the ion conductive layer 1004. As the barrier insulating film 1005, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 バリア絶縁膜1005は、第1配線A1007及び第1配線B1022上にて開口部を有する。バリア絶縁膜1005の開口部においては、第2電極1002を構成する第1配線A1007と第1配線B1022が露出しており、両者はイオン伝導層1004に接している。バリア絶縁膜1005の開口部は、第1配線A1007及び第1配線B1022を含む領域内に形成されている。バリア絶縁膜1005の開口部の壁面は、第1配線A1007及び第1配線B1022から離れるにしたがい広くなったテーパ面となっている。バリア絶縁膜1005の開口部壁面のテーパ角θtaperは、第1配線A1007及び第1配線B1022の上面に対し、85°以下(θtaper≦85°)に設定されている。 The barrier insulating film 1005 has an opening over the first wiring A1007 and the first wiring B1022. In the opening of the barrier insulating film 1005, the first wiring A1007 and the first wiring B1022 constituting the second electrode 1002 are exposed, and both are in contact with the ion conductive layer 1004. The opening of the barrier insulating film 1005 is formed in a region including the first wiring A1007 and the first wiring B1022. The wall surface of the opening of the barrier insulating film 1005 is a tapered surface that becomes wider as the distance from the first wiring A1007 and the first wiring B1022 increases. The taper angle θ taper of the wall surface of the opening of the barrier insulating film 1005 is set to 85 ° or less (θ taper ≦ 85 °) with respect to the upper surfaces of the first wiring A 1007 and the first wiring B 1022.
 第1電極1001は、3端子スイッチ1020において信号を伝達する電極であり、イオン伝導層1004と直接接している。第1電極1001を構成する第1金属膜1008は、異なる金属の2層で構成される。第1電極1001は第1金属膜1008の側壁部である。バリア絶縁膜1003およびイオン伝導層1004に接する下層はイオン化しにくく、イオン伝導層1004に拡散もしくは伝導しにくい金属が用いられる。例えば、Pt、Ru等を用いることができる。また、第1電極1001を構成する第1金属膜1008の上層は、ハードマスク1018およびイオン伝導層1004に接する。第1金属膜1008の上層は、下層を保護する役割を有する。すなわち、上層が下層を保護することで、プロセス中の下層へのダメージを抑制し、3端子スイッチ1020のスイッチング特性を維持することができる。この上層には、例えば、Ta、Ti、W、Alあるいはそれらの窒化物等を用いることができる。第1金属膜1007の上層は、第2バリアメタル1011を介してプラグ1006と電気的に接続されている。 The first electrode 1001 is an electrode that transmits a signal in the three-terminal switch 1020 and is in direct contact with the ion conductive layer 1004. The first metal film 1008 constituting the first electrode 1001 is composed of two layers of different metals. The first electrode 1001 is a side wall portion of the first metal film 1008. The lower layer in contact with the barrier insulating film 1003 and the ion conductive layer 1004 is not easily ionized, and a metal that is difficult to diffuse or conduct is used for the ion conductive layer 1004. For example, Pt, Ru, etc. can be used. The upper layer of the first metal film 1008 constituting the first electrode 1001 is in contact with the hard mask 1018 and the ion conductive layer 1004. The upper layer of the first metal film 1008 has a role of protecting the lower layer. That is, when the upper layer protects the lower layer, damage to the lower layer during the process can be suppressed, and the switching characteristics of the three-terminal switch 1020 can be maintained. For this upper layer, for example, Ta, Ti, W, Al or nitrides thereof can be used. The upper layer of the first metal film 1007 is electrically connected to the plug 1006 through the second barrier metal 1011.
 イオン伝導層1004は、金属イオン(Cuイオン)が電界で移動可能な膜である。イオン伝導層1004は、イオン伝導層が含む金属の作用(拡散、イオン伝動など)により抵抗が変化する材料を用いることができる。3端子スイッチ1020の抵抗変化を、金属架橋の形成・消滅によって行う場合には、第3電極を兼ねる第1配線B1022より供給される金属イオンが、イオン伝導可能な膜が用いられる。金属イオンは、Cuイオンとして、第3電極を兼ねる第1配線B1022より供給される。バリア絶縁膜1014には、プラグ1006を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル1011を介してプラグ1006が埋め込まれている。 The ion conductive layer 1004 is a film in which metal ions (Cu ions) can move in an electric field. For the ion conductive layer 1004, a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used. When the resistance change of the three-terminal switch 1020 is performed by formation / disappearance of a metal bridge, a film capable of conducting ions of metal ions supplied from the first wiring B1022 also serving as the third electrode is used. The metal ions are supplied as Cu ions from the first wiring B1022 that also serves as the third electrode. A pilot hole for embedding the plug 1006 is formed in the barrier insulating film 1014, and the plug 1006 is embedded in the pilot hole via the second barrier metal 1011.
 イオン伝導層1004の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。曲率を有する積層構造の側面に、GeSbTeからなるイオン伝導層1004を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One candidate material that can be used to fabricate the ion conductive layer 1004 is chalcogenide GeSbTe, which is used as a phase change layer material in phase change elements. As a means for forming the ion conductive layer 1004 made of GeSbTe on the side surface of the laminated structure having a curvature, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層1004の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 1004 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 ハードマスク1018は、第1電極1001を構成する第1金属膜1008、をエッチングする際のハードマスクとなる膜である。ハードマスク1018には、例えば、SiN膜やSiO2膜、もしくはこれらの積層を用いることができる。
保護絶縁膜1023は、第1電極1001を構成する第1金属膜1008の側面を、第3電極を兼ねる第1配線B1022及び第2電極を兼ねる第1配線A1007上のバリア絶縁膜1003を開口する際、レジストのアッシング処理による酸化から保護するために用いられる膜である。アッシング処理には酸素プラズマを使用するため、酸素プラズマに曝されると、第1金属膜1008の側面である第1電極1001が酸化されてしまう。保護絶縁膜1023には、例えば、SiN膜やSiCN膜、もしくはこれらの積層を用いることができる。
The hard mask 1018 is a film that serves as a hard mask when the first metal film 1008 constituting the first electrode 1001 is etched. For the hard mask 1018, for example, a SiN film, a SiO 2 film, or a laminate thereof can be used.
The protective insulating film 1023 opens the barrier insulating film 1003 on the first wiring B1022 also serving as the third electrode and the first wiring A1007 also serving as the second electrode on the side surface of the first metal film 1008 constituting the first electrode 1001. At this time, it is a film used for protection from oxidation by resist ashing. Since oxygen plasma is used for the ashing treatment, when exposed to oxygen plasma, the first electrode 1001 that is the side surface of the first metal film 1008 is oxidized. As the protective insulating film 1023, for example, a SiN film, a SiCN film, or a stacked layer thereof can be used.
 バリア絶縁膜1014は、3端子スイッチ1020にダメージを与えることなく、さらにイオン伝導層1004に含まれる酸素および金属の脱離、拡散を防ぐ機能を有する絶縁膜である。バリア絶縁膜1014には、例えば、SiN膜、SiCN膜等を用いることができる。バリア絶縁膜1014は、バリア絶縁膜1005と同一材料であることが好ましい。バリア絶縁膜1014には、プラグ1006を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル1011を介してプラグ1006が埋め込まれている。 The barrier insulating film 1014 is an insulating film having a function of preventing the detachment and diffusion of oxygen and metal contained in the ion conductive layer 1004 without damaging the three-terminal switch 1020. As the barrier insulating film 1014, for example, a SiN film, a SiCN film, or the like can be used. The barrier insulating film 1014 is preferably made of the same material as the barrier insulating film 1005. A pilot hole for embedding the plug 1006 is formed in the barrier insulating film 1014, and the plug 1006 is embedded in the pilot hole via the second barrier metal 1011.
 層間絶縁膜1015は、バリア絶縁膜1014上に形成された絶縁膜である。層間絶縁膜1015には、例えば、SiO2、SiOC膜などを用いることができる。層間絶縁膜1015は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜1015は、層間絶縁膜1013、1016と同一材料としてもよい。層間絶縁膜1015には、プラグ1006を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル1011を介してプラグ1006が埋め込まれている。 The interlayer insulating film 1015 is an insulating film formed on the barrier insulating film 1014. As the interlayer insulating film 1015, for example, a SiO 2 or SiOC film can be used. The interlayer insulating film 1015 may be a stack of a plurality of insulating films. The interlayer insulating film 1015 may be made of the same material as the interlayer insulating films 1013 and 1016. A pilot hole for embedding the plug 1006 is formed in the interlayer insulating film 1015, and the plug 1006 is embedded in the pilot hole via the second barrier metal 1011.
 層間絶縁膜1016は、層間絶縁膜1015上に形成された絶縁膜である。層間絶縁膜1016には、例えば、SiO2、SiOC膜、SiO2よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)などを用いることができる。層間絶縁膜1016は、層間絶縁膜1015、層間絶縁膜1013と同一材料としてもよい。また、層間絶縁膜1016と層間絶縁膜1015を異なる絶縁材料を用いて作製し、そのエッチング特性に有意な差異を設けることもできる。層間絶縁膜1016は、層間絶縁膜1015、1013と同一材料としてもよい。層間絶縁膜1016には、第2配線1012埋め込むための配線溝が形成されており、当該配線溝に第2バリアメタル1011を介して第2配線1012が埋め込まれている。 The interlayer insulating film 1016 is an insulating film formed on the interlayer insulating film 1015. As the interlayer insulating film 1016, for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used. The interlayer insulating film 1016 may be made of the same material as the interlayer insulating film 1015 and the interlayer insulating film 1013. In addition, the interlayer insulating film 1016 and the interlayer insulating film 1015 can be manufactured using different insulating materials, and a significant difference can be provided in the etching characteristics. The interlayer insulating film 1016 may be made of the same material as the interlayer insulating films 1015 and 1013. In the interlayer insulating film 1016, a wiring groove for embedding the second wiring 1012 is formed, and the second wiring 1012 is embedded in the wiring groove via the second barrier metal 1011.
 第2配線1012は、層間絶縁膜1016に形成された配線溝に第2バリアメタル1011を介して埋め込まれた配線である。第2配線1012は、プラグ1006と一体になっている。プラグ1006は、層間絶縁膜1015、バリア絶縁膜1014、及びハードマスク1018に形成された下穴に第2バリアメタル1011を介して埋め込まれている。プラグ1006は、第2バリアメタル1011を介して第1電極1001を構成する第1金属膜1008と電気的に接続されている。第1配線1012及びプラグ1006には、例えば、Cuを用いることができる。 The second wiring 1012 is a wiring buried in a wiring groove formed in the interlayer insulating film 1016 via the second barrier metal 1011. The second wiring 1012 is integrated with the plug 1006. The plug 1006 is embedded in the prepared holes formed in the interlayer insulating film 1015, the barrier insulating film 1014, and the hard mask 1018 via the second barrier metal 1011. The plug 1006 is electrically connected to the first metal film 1008 constituting the first electrode 1001 through the second barrier metal 1011. For example, Cu can be used for the first wiring 1012 and the plug 1006.
 第2バリアメタル1011は、第2配線1012(プラグ1006を含む)を構成する金属が層間絶縁膜1016や1015や下層へ拡散することを防止するために、第2配線1012及びプラグ1006の側面および底面を被覆する、バリア性を有する導電性膜である。第2バリアメタル1012には、例えば、第2配線1012及びプラグ1006がCuを主成分とする金属元素からなる場合には、Ta、TaN、TiN、WCNのような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The second barrier metal 1011 is formed on the side surfaces of the second wiring 1012 and the plug 1006 in order to prevent the metal constituting the second wiring 1012 (including the plug 1006) from diffusing into the interlayer insulating films 1016 and 1015 and the lower layer. It is a conductive film having a barrier property covering the bottom surface. For example, when the second wiring 1012 and the plug 1006 are made of a metal element containing Cu as a main component, the second barrier metal 1012 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
 バリア絶縁膜1017は、第2配線1012を含む層間絶縁膜1016上に形成され、第2配線1017を構成する金属(例えば、Cu)の酸化を防いだり、上層への第2配線1012を構成する金属の拡散を防ぐ役割を有する絶縁膜である。バリア絶縁膜1017には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 1017 is formed on the interlayer insulating film 1016 including the second wiring 1012, prevents oxidation of the metal (for example, Cu) constituting the second wiring 1017, and configures the second wiring 1012 to the upper layer. It is an insulating film having a role of preventing metal diffusion. As the barrier insulating film 1017, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 (スイッチング動作)
 図10に示す、第一の実施態様の3端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the three-terminal switch of the first embodiment shown in FIG. 10 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 まず第2電極1002を兼ねる第1配線A1007と、第1電極1001と電気的に接続されている第1金属膜1008、プラグ1006、第2配線1012を介して、それぞれ接地する。さらに、第3電極を兼ねる第1配線B1022に正電圧(+VON>0V)を印加すると第3電極を兼ねる第1配線B1022から金属イオン(Cuイオン)がイオン伝導層1004中へ拡散し、第1電極1001及び第2電極1002側にマイグレーションする。マイグレーションした金属イオンは、第1電極1001及び第2電極1002より電子を受け取り、電気化学反応によって金属架橋1009が析出する。これによって第1電極1001と第2電極1002の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
First, the first wiring A 1007 that also serves as the second electrode 1002, and the first metal film 1008 that is electrically connected to the first electrode 1001, the plug 1006, and the second wiring 1012 are grounded. Further, when a positive voltage (+ V ON > 0V) is applied to the first wiring B1022 also serving as the third electrode, metal ions (Cu ions) diffuse from the first wiring B1022 also serving as the third electrode into the ion conductive layer 1004, Migrate to the first electrode 1001 and second electrode 1002 side. The migrated metal ions receive electrons from the first electrode 1001 and the second electrode 1002, and a metal bridge 1009 is deposited by an electrochemical reaction. As a result, the resistance value between the first electrode 1001 and the second electrode 1002 becomes low resistance, and is turned on.
 ON状態への遷移は、第3電極を兼ねる第1配線B1022を接地して、第1電極1001及び第2電極1002に負電圧(-VON<0V)を印加しても良い。 In the transition to the ON state, the first wiring B1022 that also serves as the third electrode may be grounded, and a negative voltage (−V ON <0 V) may be applied to the first electrode 1001 and the second electrode 1002.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、第2電極1002兼ねる第1配線A1007を介して、第1電極1001を第1電極1001と電気的に接続されている第1金属膜1008、プラグ1006、第2配線1012を介して、それぞれ接地する。第3電極を兼ねる第1配線B1022に負電圧(-VOFF<0V)を印加すると、金属架橋1009の溶解反応が進行し、金属架橋1009は金属イオン(Cuイオン)となって、イオン伝導層1004中に分散する。これによって、第1電極1001と第2電極1002の間の抵抗値が高抵抗となり、OFF状態に遷移する。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, the first electrode 1001 is electrically connected to the first electrode 1001 via the first wiring A1007 also serving as the second electrode 1002, the plug 1006, and the second wiring 1012, respectively. Ground. When a negative voltage (−V OFF <0V) is applied to the first wiring B1022 that also serves as the third electrode, the dissolution reaction of the metal bridge 1009 proceeds, and the metal bridge 1009 becomes metal ions (Cu ions), and the ion conductive layer Disperse in 1004. As a result, the resistance value between the first electrode 1001 and the second electrode 1002 becomes high resistance and transitions to the OFF state.
 OFF状態への遷移は、第3電極を兼ねる第1配線B1022を接地して、第1電極1001及び第2電極1002に正電圧(+VOFF>0V)を印加しても良い。 In the transition to the OFF state, the first wiring B1022 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0V) may be applied to the first electrode 1001 and the second electrode 1002.
 第1電極1001の側面の形状が曲率を有することで、ON状態とOFF状態へのスイッチング時、スイッチング電圧を印加すると、該曲率部分に電界が集中し、安定かつバラツキが小さい動作が得られる。 Since the shape of the side surface of the first electrode 1001 has a curvature, when a switching voltage is applied at the time of switching between the ON state and the OFF state, an electric field concentrates on the curvature portion, and an operation with stable and small variation is obtained.
 (製造プロセス)
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置において、図10に示す、第一の実施態様の3端子スイッチング素子を、前記抵抗変化型不揮発性スイッチング素子として作製する際の製造プロセスを説明する。図11-1と図11-2が、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図である。図11-1は、該製造工程中、工程1~工程5を示す図であり、図11-2は、該製造工程中、工程6~工程8を示す図である。
(Manufacturing process)
In a semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate, the three-terminal switching element of the first embodiment shown in FIG. A manufacturing process for manufacturing a nonvolatile switching element will be described. FIGS. 11A and 11B are cross-sectional views schematically showing an example of the manufacturing process of the three-terminal switching element of the first embodiment. FIG. 11A is a diagram showing steps 1 to 5 in the manufacturing process, and FIG. 11B is a diagram showing steps 6 to 8 in the manufacturing process.
 (工程1)
 半導体基板1119(例えば、半導体素子が形成された基板)上に、層間絶縁膜1113(例えば、膜厚300nmのSiO2、膜厚150nmのSiOCH、膜厚100nmのSiO2)を堆積し、その後、リソグラフィ法(フォトレジスト形成、ドライエッチング、フォトレジスト除去を含む)を用いて、層間絶縁膜1113に配線溝を形成し、その後、当該配線溝に第1バリアメタルA1110及び第1バリアメタルB(例えば、TaN/Ta、膜厚5nm/5nm)を介して第1配線A1107及び第1配線B1122(例えば、Cu)を埋め込む。層間絶縁膜1113は、プラズマCVD法によって形成することができる。第1配線A1107及び第1配線B1122は、例えば、PVD法によって第1バリアメタルA1110及び第1バリアメタルB1122(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によってCuを配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。ここで、CMP(Chemical Mechanical Polishing)法とは、多層配線形成プロセス中に生じるウエハ表面の凹凸を、研磨液をウエハ表面に流しながら回転させた研磨パッドに接触させて研磨することによって平坦化する方法である。配線溝に埋め込まれた余剰の銅を研磨することによって埋め込み配線(ダマシン配線)を形成したり、層間絶縁膜1113を研磨することで平坦化を行う。
(Process 1)
On the semiconductor substrate 1119 (for example, a substrate on which a semiconductor element is formed), an interlayer insulating film 1113 (for example, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited, and then Using a lithography method (including photoresist formation, dry etching, and photoresist removal), a wiring groove is formed in the interlayer insulating film 1113, and then the first barrier metal A1110 and the first barrier metal B (for example, , TaN / Ta, film thickness 5 nm / 5 nm) is embedded in the first wiring A1107 and the first wiring B1122 (for example, Cu). The interlayer insulating film 1113 can be formed by a plasma CVD method. The first wiring A1107 and the first wiring B1122 are formed, for example, by forming a first barrier metal A1110 and a first barrier metal B1122 (for example, a TaN / Ta laminated film) by a PVD method, and after forming a Cu seed by a PVD method, It can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. Here, the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness of the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface and polishing it. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 1113 by polishing.
 (工程2)
 第1配線A1107及び第1配線B1122の表面、層間絶縁膜1113上にバリア絶縁膜1105(例えば、SiN、膜厚30nm)を形成する。ここで、バリア絶縁膜1105は、プラズマCVD法によって形成することができる。バリア絶縁膜1105の膜厚は、10nm~50nm程度であることが好ましい。
(Process 2)
A barrier insulating film 1105 (eg, SiN, film thickness of 30 nm) is formed on the surface of the first wiring A 1107 and the first wiring B 1122 and on the interlayer insulating film 1113. Here, the barrier insulating film 1105 can be formed by a plasma CVD method. The thickness of the barrier insulating film 1105 is preferably about 10 nm to 50 nm.
 (工程3)
 開口したバリア絶縁膜1105の上に第1金属膜1108(例えば、Ru10nmとTa10nmをこの順番で堆積する)を堆積する。さらに、ハードマスク1118(例えば、SiN膜、膜厚30nm)、およびハードマスク1109(例えば、SiO2膜、膜厚100nm)をこの順に積層する。工程3において、ハードマスク1118、ハードマスク1109は、プラズマCVD法によって形成することができる。また、工程3において、第1金属膜1108はスパッタ法によって形成する。さらに、ハードマスク1109をパターニングするためのフォトレジスト(図示せず)を形成し、その後、当該フォトレジストをエッチングマスクとして、ハードマスク1118が表れるまで、ハードマスク1109をドライエッチングする。その後、酸素プラズマアッシングと有機剥離を用いて、フォトレジストを除去する。フォトレジスト・マスクの露光パターンにより、ハードマスク1109の平面形状(上面から見た形状)が円もしくは楕円になっている。もしくは、フォトレジスト・マスクの露光パターン自体は、長方形もしくは正方形とし、ハードマスク1109のエッチング加工時、サイド・エッチングによって、角部の除去を進め、結果として、ハードマスク1109の平面形状に曲率を持たせてもよい。
(Process 3)
A first metal film 1108 (for example, Ru 10 nm and Ta 10 nm are deposited in this order) is deposited on the opened barrier insulating film 1105. Further, a hard mask 1118 (for example, SiN film, film thickness 30 nm) and a hard mask 1109 (for example, SiO 2 film, film thickness 100 nm) are stacked in this order. In Step 3, the hard mask 1118 and the hard mask 1109 can be formed by a plasma CVD method. In step 3, the first metal film 1108 is formed by sputtering. Further, a photoresist (not shown) for patterning the hard mask 1109 is formed, and then the hard mask 1109 is dry-etched using the photoresist as an etching mask until the hard mask 1118 appears. Thereafter, the photoresist is removed using oxygen plasma ashing and organic peeling. Depending on the exposure pattern of the photoresist mask, the planar shape of the hard mask 1109 (the shape seen from the top surface) is a circle or an ellipse. Alternatively, the exposure pattern itself of the photoresist mask is rectangular or square, and when the hard mask 1109 is etched, the corners are removed by side etching. As a result, the planar shape of the hard mask 1109 has a curvature. It may be allowed.
 (工程4)
 次に、ハードマスク1109をマスクとして、ハードマスク1118、第1金属膜1108を連続的にドライエッチングし、第1電極1101および第2電極1102を形成する。このとき、ハードマスク1109は、エッチバック中に完全に除去されることが好ましいが、そのまま残存してもよい。工程4において、例えば、第1金属膜1108の上層がTaの場合には、Cl2系のRIEで加工することができ、第1金属膜1109の下層がRuの場合には、Cl2/O2の混合ガスでRIE加工することができる。このようなハードマスクRIE法を用いることで、レジスト除去のための酸素プラズマアッシングに、第1金属膜1108を曝すことなく、エッチング加工をすることができる。また、加工後に、ハードマスク1109のパターニングに用いたレジストを、酸素プラズマによって酸化処理する場合には、第1金属膜1108はハードマスク1109により被覆されている。レジストの剥離工程において、酸化プラズマを照射する際、その照射時間が長くなっても、ハードマスク1109により被覆されている第1金属膜1108の酸化は生じない。
(Process 4)
Next, using the hard mask 1109 as a mask, the hard mask 1118 and the first metal film 1108 are continuously dry-etched to form the first electrode 1101 and the second electrode 1102. At this time, the hard mask 1109 is preferably completely removed during the etch back, but may remain as it is. In step 4, for example, when the upper layer of the first metal film 1108 is Ta, it can be processed by Cl 2 RIE, and when the lower layer of the first metal film 1109 is Ru, Cl 2 / O. RIE processing can be performed with a mixed gas of 2 . By using such a hard mask RIE method, etching can be performed without exposing the first metal film 1108 to oxygen plasma ashing for resist removal. In addition, when the resist used for patterning the hard mask 1109 is oxidized with oxygen plasma after processing, the first metal film 1108 is covered with the hard mask 1109. In the resist peeling step, when the oxidation plasma is irradiated, the first metal film 1108 covered with the hard mask 1109 is not oxidized even if the irradiation time is long.
 工程4では、ハードマスク1118、第1金属膜1108の平面形状が曲率を有するように、エッチングレシピを調整してもよい。 In step 4, the etching recipe may be adjusted so that the planar shape of the hard mask 1118 and the first metal film 1108 has a curvature.
 (工程5)
 次に、ハードマスク1118、第1電極1101、バリア絶縁膜1105の側壁面に接するように、保護絶縁膜1103(例えば、SiCN膜、30nm)、ハードマスク1123(例えば、SiO2膜、50nm)を堆積する。工程5において、保護絶縁膜1103及びハードマスク1123は、プラズマCVD法によって形成することができる。さらに、ハードマスク1123をパターニングするためのフォトレジスト(図示せず)を形成し、その後、当該フォトレジストをマスクとして、ハードマスク1123をドライエッチングし、その後、酸素プラズマアッシングと有機剥離を用いて、フォトレジストを除去する。
(Process 5)
Next, a protective insulating film 1103 (for example, SiCN film, 30 nm) and a hard mask 1123 (for example, SiO 2 film, 50 nm) are deposited so as to be in contact with the sidewalls of the hard mask 1118, the first electrode 1101, and the barrier insulating film 1105. To do. In step 5, the protective insulating film 1103 and the hard mask 1123 can be formed by a plasma CVD method. Further, a photoresist (not shown) for patterning the hard mask 1123 is formed, and then the hard mask 1123 is dry-etched using the photoresist as a mask, and then oxygen plasma ashing and organic peeling are used. Remove the photoresist.
 (工程6)
 ハードマスク1123をマスクとして、ハードマスク1123の開口部から露出するバリア絶縁膜1105をエッチバック(ドライエッチング)することにより、バリア絶縁膜1105に開口部を形成する。このバリア絶縁膜1105の開口部に、第1配線A1107及び第1配線B1122を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線A1107及び第1配線B1122の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。この時、ハードマスク1123の開口部は、第1電極1101が形成されている第1金属膜1108及びハードマスク1118の側面より、第1配線A1107側となっている。その結果、エッチバックの際にハードマスク1118及び第1金属膜1108がハードマスクとなることで、バリア絶縁膜1105の開口部の側面は、セルフアラインで第1電極1101の側面に揃う。バリア絶縁膜1105のエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜1105の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク1124は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜1105の開口部の形状は曲率を有しており、開口部の平面方向の最大の長さは30nmから500nmとする。さらに、非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線A1107及び第1配線B1122の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。第1配線A1107の露出した上面は、第2電極1102となる。
(Step 6)
Using the hard mask 1123 as a mask, the barrier insulating film 1105 exposed from the opening of the hard mask 1123 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 1105. The first wiring A1107 and the first wiring B1122 are exposed in the opening of the barrier insulating film 1105, and then an organic stripping process is performed with an amine-based stripping solution, so that the first wiring A1107 and the first wiring B1122 are exposed. The copper oxide formed on the exposed surface is removed, and the etching byproduct generated during the etch back is removed. At this time, the opening of the hard mask 1123 is closer to the first wiring A 1107 side than the first metal film 1108 on which the first electrode 1101 is formed and the side surfaces of the hard mask 1118. As a result, the hard mask 1118 and the first metal film 1108 become hard masks at the time of etch back, so that the side surface of the opening of the barrier insulating film 1105 is aligned with the side surface of the first electrode 1101 by self-alignment. In the etch back of the barrier insulating film 1105, the wall surface of the opening of the barrier insulating film 1105 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 1124 is preferably completely removed during the etch back, but may remain as it is in the case of an insulating material. The shape of the opening in the barrier insulating film 1105 has a curvature, and the maximum length of the opening in the planar direction is 30 nm to 500 nm. Further, oxides on the surfaces of the first wiring A1107 and the first wiring B1122 are removed by RF (Radio Frequency) using a non-reactive gas. As the non-reactive gas, helium or argon can be used. The exposed upper surface of the first wiring A 1107 becomes the second electrode 1102.
 (工程7)
 次に、保護絶縁膜1103、ハードマスク1118、第1電極1101、バリア絶縁膜1105、第1配線B1122に接するようにイオン伝導層1104としてシリコン、酸素、炭素、水素を含むSIOCH系イオン伝導性材料をCVD法で20nmから80nm程度形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。温度は250℃~350℃程度が好ましい。次に、イオン伝導層1104上にバリア絶縁膜0714としてSiNもしくはSiCNを30nmの膜厚で形成する。工程7において、バリア絶縁膜1114は、プラズマCVD法によって形成することができる。例えば、SiH4/N2の混合ガスの高密度プラズマによって形成したSiN膜などを用いることが好ましい。3端子スイッチ素子1120以外の領域にもイオン伝導層1104が残るが、絶縁膜として機能するため、3端子スイッチの動作および多層配線に影響はない。工程7では、バリア絶縁膜1114の上に層間絶縁膜1115としてSiO2を300nm成膜する。さらに、3端子スイッチ1120によって生じた段差を解消するため、層間絶縁膜1115を170nm程度CMP法にて研磨することで平坦にする。層間絶縁膜1115は3端子スイッチ素子1120の段差を確実に埋めるために、高密度プラズマを使用してSiO2を成膜することが望ましい。
(Step 7)
Next, a SIOCH ion conductive material containing silicon, oxygen, carbon, and hydrogen as the ion conductive layer 1104 so as to be in contact with the protective insulating film 1103, the hard mask 1118, the first electrode 1101, the barrier insulating film 1105, and the first wiring B 1122. Are formed by CVD to a thickness of about 20 nm to 80 nm. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is directly supplied to the reaction chamber by another line. The temperature is preferably about 250 ° C to 350 ° C. Next, SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 0714 on the ion conductive layer 1104. In step 7, the barrier insulating film 1114 can be formed by a plasma CVD method. For example, it is preferable to use a SiN film formed by high-density plasma of a mixed gas of SiH 4 / N 2 . Although the ion conductive layer 1104 remains in a region other than the three-terminal switch element 1120, it functions as an insulating film and does not affect the operation of the three-terminal switch and the multilayer wiring. In step 7, 300 nm of SiO 2 is deposited as an interlayer insulating film 1115 on the barrier insulating film 1114. Further, in order to eliminate the level difference caused by the three-terminal switch 1120, the interlayer insulating film 1115 is flattened by polishing about 170 nm by a CMP method. The interlayer insulating film 1115 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the three-terminal switch element 1120.
 (工程8)
 次に、層間絶縁膜1115の上に層間絶縁膜1116(例えば、比誘電率の低いSiOC、SiO2の積層)を堆積し、その後、プラグ1106用の下穴および第2配線1112用の配線溝をドライエッチングによって形成し、銅デュアルダマシン配線プロセスを用いて、当該配線溝及び当該下穴内に第2バリアメタル1111(例えば、TaN/Ta)を介して第2配線1112(例えば、Cu)及びプラグ1106(例えば、Cu)を同時に形成し、その後、第2配線1112を含む層間絶縁膜1116上にバリア絶縁膜1117(例えば、SiCN膜)を堆積する。工程8において、第2配線1112およびプラグ1106の形成は、例えば、PVD法によって第2バリアメタル1111(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によって銅を配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。工程8では、第2バリアメタル1111と第1金属膜1108の上層を同一材料とすることで、プラグ1106と第1金属膜1108の間の接触抵抗を低減し、素子性能を向上(ON状態時の3端子スイッチの抵抗を低減)させることができるようになる。また、工程8において、層間絶縁膜1116及びバリア絶縁膜1117はプラズマCVD法で形成することができる。工程8では、プラグ1106用の下穴を形成する際、下穴は第1金属膜1108の上層に到達しており、第1金属膜1108の上層の材料がエッチングストッパ材料として機能する。プラグ1106用の下穴および第2配線1112用の配線溝のドライエッチングには、フルオロカーボン系のガスを用いる。
(Process 8)
Next, an interlayer insulating film 1116 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 1115, and then a pilot hole for the plug 1106 and a wiring groove for the second wiring 1112 are deposited. Is formed by dry etching, and a second wiring 1112 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 1111 (for example, TaN / Ta) using a copper dual damascene wiring process. 1106 (for example, Cu) is formed at the same time, and then a barrier insulating film 1117 (for example, a SiCN film) is deposited on the interlayer insulating film 1116 including the second wiring 1112. In step 8, the second wiring 1112 and the plug 1106 are formed by, for example, forming a second barrier metal 1111 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. In step 8, the upper layer of the second barrier metal 1111 and the first metal film 1108 is made of the same material, so that the contact resistance between the plug 1106 and the first metal film 1108 is reduced and the device performance is improved (in the ON state). The resistance of the three-terminal switch can be reduced). In Step 8, the interlayer insulating film 1116 and the barrier insulating film 1117 can be formed by a plasma CVD method. In step 8, when forming the pilot hole for the plug 1106, the pilot hole reaches the upper layer of the first metal film 1108, and the material of the upper layer of the first metal film 1108 functions as an etching stopper material. A fluorocarbon-based gas is used for dry etching of the prepared hole for the plug 1106 and the wiring groove for the second wiring 1112.
 (第四の実施形態)
 本発明に係る金属架橋型スイッチング素子における、第四の実施形態は、下に説明する「3端子スイッチ」の構成を採用する、金属架橋型スイッチング素子である。
(Fourth embodiment)
The fourth embodiment of the metal bridge type switching element according to the present invention is a metal bridge type switching element adopting the configuration of a “three-terminal switch” described below.
 本発明の第四の実施形態にかかる金属架橋型スイッチング素子で採用される、「3端子スイッチ」の構成を説明する。図10は、第四の実施形態の「3端子スイッチ」の構成の一例を模式的に示す断面図である。 The configuration of the “3-terminal switch” employed in the metal bridge type switching element according to the fourth embodiment of the present invention will be described. FIG. 10 is a cross-sectional view schematically showing an example of the configuration of the “3-terminal switch” of the fourth embodiment.
 図10に示すように、第四の実施形態の「3端子スイッチ」は、第1電極1201を兼ねるプラグ1206と、第2電極を兼ねる第1配線A1202と、第2電極を兼ねる第1配線A1202、層間絶縁膜1203の側面に接したイオン伝導層1204と、イオン伝導層1204に接した第3電極を兼ねた第1配線B1207で形成されている。ON状態に遷移する際に形成する金属架橋1205は、第1電極1201と第2電極を兼ねる第1配線層B1207を繋ぐように形成される。また、イオン伝導層1204は、第1配線B1207(第3電極)から供給される。金属イオンが伝導するための媒体となる。 As shown in FIG. 10, the “three-terminal switch” of the fourth embodiment includes a plug 1206 that also serves as the first electrode 1201, a first wiring A1202 that also serves as the second electrode, and a first wiring A1202 that also serves as the second electrode. The ion conductive layer 1204 in contact with the side surface of the interlayer insulating film 1203 and the first wiring B 1207 also serving as the third electrode in contact with the ion conductive layer 1204 are formed. The metal bridge 1205 formed at the time of transition to the ON state is formed so as to connect the first electrode 1201 and the first wiring layer B 1207 that also serves as the second electrode. The ion conductive layer 1204 is supplied from the first wiring B 1207 (third electrode). It becomes a medium for conducting metal ions.
 プラグ1206の側面と底面は第2バリアメタル1311で被覆されており、第1電極1201は、該第2バリアメタル1311のイオン伝導層1204に接触する部位である。第2バリアメタル1311を構成する導電性材料には、タンタル(Ta)、窒化タンタル(TaN)が適しており、これらの積層でも良い。導電性材料からなる第2バリアメタル1311は、スパッタ法、プラズマCVD法を用いて形成する。 The side surface and the bottom surface of the plug 1206 are covered with the second barrier metal 1311, and the first electrode 1201 is a portion in contact with the ion conductive layer 1204 of the second barrier metal 1311. Tantalum (Ta) and tantalum nitride (TaN) are suitable for the conductive material constituting the second barrier metal 1311, and a laminate of these may be used. The second barrier metal 1311 made of a conductive material is formed using a sputtering method or a plasma CVD method.
 プラグ1206用の下穴の平面(横断面)形状は曲率を有している。そのため、第2バリアメタル1311のイオン伝導層1204に接触する部位ではる、第1電極0901も曲率を有する。 The plane (cross section) shape of the pilot hole for the plug 1206 has a curvature. Therefore, the first electrode 0901, which is a portion in contact with the ion conductive layer 1204 of the second barrier metal 1311, also has a curvature.
 イオン伝導層1204はスパッタ法、レーザーアブレーション法、プラズマCVD法を用いて形成する。イオン伝導層1204の材料としては、金属イオン(Cuイオン)の伝導度の大きく、かつ、LSI生産ラインにおいて、エッチング加工可能な材料を選択する必要がある。 The ion conductive layer 1204 is formed using a sputtering method, a laser ablation method, or a plasma CVD method. As a material for the ion conductive layer 1204, it is necessary to select a material having a high conductivity of metal ions (Cu ions) and capable of being etched in an LSI production line.
 イオン伝導層1204の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。GeSbTeからなるイオン伝導層1204を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One candidate material that can be used to fabricate the ion conducting layer 1204 is chalcogenide GeSbTe, which is used as a phase change layer material in phase change elements. As a means for forming the ion conductive layer 1204 made of GeSbTe, there is a method of forming a film by sputtering using a sintered target of GeSbTe. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層1204の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 1204 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 第2電極を兼ねる第1配線A1202及び第3電極を兼ねる第1配線B1207は、イオン伝導層1204に金属イオンを供給可能な金属で構成される。例えば、主金属はCuで、Alなどとの合金でも良い。 The first wiring A 1202 that also serves as the second electrode and the first wiring B 1207 that also serves as the third electrode are made of a metal that can supply metal ions to the ion conductive layer 1204. For example, the main metal is Cu, and an alloy with Al or the like may be used.
 (スイッチング動作)
 図12に示す、第四の実施態様の3端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the three-terminal switch of the fourth embodiment shown in FIG. 12 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 まず、第1電極1201及び第2電極を兼ねる第1配線A1202を接地して、第3電極を兼ねる第1配線1207に正電圧(+VON>0V)を印加すると第1配線B1207から金属イオンがイオン伝導層0904中へ拡散し、第1電極1201及び第1配線A1202側にマイグレーションする。マイグレーションした金属イオンは第1電極1201及び第1配線A1202より電子を受け取り、第1電極1201と第1配線A1202間に、電気力線に従って電気化学反応によって金属架橋1205が析出する。これによって第1電極1201と第1配線A0902の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
First, when the first wiring A1202 that also serves as the first electrode 1201 and the second electrode is grounded and a positive voltage (+ V ON > 0 V) is applied to the first wiring 1207 that also serves as the third electrode, metal ions are generated from the first wiring B1207. It diffuses into the ion conductive layer 0904 and migrates to the first electrode 1201 and the first wiring A 1202 side. The migrated metal ions receive electrons from the first electrode 1201 and the first wiring A 1202, and a metal bridge 1205 is deposited between the first electrode 1201 and the first wiring A 1202 by an electrochemical reaction according to the lines of electric force. As a result, the resistance value between the first electrode 1201 and the first wiring A0902 becomes low resistance and is turned on.
 ON状態への遷移は、第3電極を兼ねる第1配線B1207を接地して、第1電極1201及び第1配線A1202に負電圧(-VON<0V)を印加しても良い。 In the transition to the ON state, the first wiring B 1207 that also serves as the third electrode may be grounded, and a negative voltage (−V ON <0 V) may be applied to the first electrode 1201 and the first wiring A 1202.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、第1電極1201及び第2電極を兼ねる第1配線A1202を接地して、第3電極を兼ねる第1配線B1207に負電圧(-VOFF<0V)を印加すると、金属架橋0905の溶解反応が進行し、金属架橋0905は金属イオンとなって、イオン伝導層1204中に分散する。これによって、第1電極1201と第1配線A1202の間の抵抗値が高抵抗となり、オフ状態に遷移する。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, when the first wiring A 1202 that also serves as the first electrode 1201 and the second electrode is grounded and a negative voltage (−V OFF <0 V) is applied to the first wiring B 1207 that also serves as the third electrode, the dissolution reaction of the metal bridge 0905 occurs. The metal bridge 0905 becomes metal ions and is dispersed in the ion conductive layer 1204. As a result, the resistance value between the first electrode 1201 and the first wiring A 1202 becomes high resistance, and transitions to an off state.
 OFF状態への遷移は、第3電極を兼ねる第1配線B1207を接地して、第1電極1201及び第1配線A1202に正電圧(+VOFF>0V)を印加しても良い。 In the transition to the OFF state, the first wiring B 1207 also serving as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 1201 and the first wiring A 1202.
 第1電極1201を兼ねるプラグ1206が曲率を有することで、ON状態とOFF状態のスイッチング動作時に曲率部分に電界が集中し、安定かつバラツキが小さいスイッチング動作が得られる。 Since the plug 1206 also serving as the first electrode 1201 has a curvature, an electric field concentrates on the curvature portion during the switching operation between the ON state and the OFF state, and a switching operation with stable and small variation can be obtained.
 (第一の実施態様)
 本発明の第四の実施形態にかかる、第一の実施態様の3端子スイッチング素子について説明する。
(First embodiment)
A three-terminal switching element according to the first embodiment of the fourth embodiment of the present invention will be described.
 該第一の実施態様の3端子スイッチング素子は、半導体装置に設ける多層配線層内部に形成されている。図13に、半導体装置に設ける多層配線層内部に形成されている、該第二の実施態様の3端子スイッチング素子の構造を示す。 The three-terminal switching element of the first embodiment is formed inside a multilayer wiring layer provided in the semiconductor device. FIG. 13 shows the structure of the three-terminal switching element of the second embodiment formed inside a multilayer wiring layer provided in the semiconductor device.
 半導体装置に設ける多層配線層の内部に、3端子スイッチ1318が形成されている。多層配線層は、第1電極1301を構成するプラグ1306、および第2電極1302を構成する第1配線A1307を備え、イオン伝導層1304は第1電極1301及び第2電極1302を構成する第1配線A1307に接している。また、プラグ1306は第2配線1312に接続している。さらに、第1配線B1303は第3電極を兼ね、バリア絶縁膜1305の開口部でイオン伝導層1304と接している。 A three-terminal switch 1318 is formed in a multilayer wiring layer provided in the semiconductor device. The multilayer wiring layer includes a plug 1306 constituting the first electrode 1301 and a first wiring A1307 constituting the second electrode 1302, and the ion conductive layer 1304 comprises the first wiring constituting the first electrode 1301 and the second electrode 1302. It is in contact with A1307. The plug 1306 is connected to the second wiring 1312. Further, the first wiring B 1303 also serves as the third electrode, and is in contact with the ion conductive layer 1304 at the opening of the barrier insulating film 1305.
 多層配線層は、半導体基板1319上にて、層間絶縁膜1313、バリア絶縁膜1305、イオン伝導層1304、バリア絶縁膜1314、層間絶縁膜1315、層間絶縁膜1316、及びバリア絶縁膜1317の順に積層した絶縁積層体を有する。 The multilayer wiring layer is stacked on the semiconductor substrate 1319 in the order of the interlayer insulating film 1313, the barrier insulating film 1305, the ion conductive layer 1304, the barrier insulating film 1314, the interlayer insulating film 1315, the interlayer insulating film 1316, and the barrier insulating film 1317. An insulating laminate.
 層間絶縁膜1316に形成された配線溝に第2配線1312が埋め込まれており、層間絶縁膜1315、バリア絶縁膜1314、イオン伝導層1304に形成された下穴にプラグ1306が埋め込まれており、第2配線1312とプラグ1306がそれぞれ一体となっており、第2配線1312およびプラグ1306の側面及び底面が第2バリアメタル1311によって覆われている。 A second wiring 1312 is embedded in a wiring groove formed in the interlayer insulating film 1316, and a plug 1306 is embedded in a pilot hole formed in the interlayer insulating film 1315, the barrier insulating film 1314, and the ion conductive layer 1304. The second wiring 1312 and the plug 1306 are integrated with each other, and the side surfaces and the bottom surface of the second wiring 1312 and the plug 1306 are covered with the second barrier metal 1311.
 3端子スイッチ1318では、開口されたバリア絶縁膜1305上に、第1電極1301を構成しているプラグ1306があり、プラグ1306を構成する第2バリアメタル1311、バリア絶縁膜1305の側面、第1配線A1307の上面、及び、第1配線B1303の上面を覆うように、イオン伝導層1304が形成されており、その上にバリア絶縁膜1314が形成されている。 In the three-terminal switch 1318, the plug 1306 constituting the first electrode 1301 is provided on the opened barrier insulating film 1305, the second barrier metal 1311 constituting the plug 1306, the side surface of the barrier insulating film 1305, the first An ion conductive layer 1304 is formed so as to cover the upper surface of the wiring A 1307 and the upper surface of the first wiring B 1303, and a barrier insulating film 1314 is formed thereon.
 第1電極1301を構成するプラグ1306が第2バリアメタル1311を介して電気的に接続されている。また、第2電極1302を構成する第1配線A1307は、バリア絶縁膜1305に開口された開口部を介して第1配線A1307及び第1バリアメタルA1310と電気的に接続されている。また、第3電極は第1配線B1303が兼ねている。 The plug 1306 constituting the first electrode 1301 is electrically connected through the second barrier metal 1311. Further, the first wiring A 1307 constituting the second electrode 1302 is electrically connected to the first wiring A 1307 and the first barrier metal A 1310 through the opening opened in the barrier insulating film 1305. The third electrode also serves as the first wiring B1303.
 第1電極1301を構成するプラグ1306は、第2バリアメタル1311材料をそのまま用いる。 The plug 1306 constituting the first electrode 1301 uses the second barrier metal 1311 material as it is.
 半導体基板1319は、半導体素子が形成された基板である。半導体基板1319には、例えば、シリコン基板、単結晶基板、SOI(Silicon on Insulator)基板、TFT(Thin Film Transistor)基板、液晶製造用基板等の基板を用いることができる。 The semiconductor substrate 1319 is a substrate on which a semiconductor element is formed. As the semiconductor substrate 1319, for example, a silicon substrate, a single crystal substrate, an SOI (Silicon on Insulator) substrate, a TFT (Thin Film Transistor) substrate, a liquid crystal manufacturing substrate, or the like can be used.
 層間絶縁膜1313は、半導体基板1319上に形成された絶縁膜である。層間絶縁膜1313には、例えば、SiO2、シリコン酸化膜よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)等を用いることができる。層間絶縁膜1313は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜1313には、第1配線A1307及び第1配線B1303を埋め込むための配線溝が形成されており、当該配線溝に第1バリアメタルA1310を介して第1配線A1307が、第1バリアメタルB1308を介して第1配線B1303が埋め込まれている。 The interlayer insulating film 1313 is an insulating film formed on the semiconductor substrate 1319. As the interlayer insulating film 1313, for example, SiO 2 , a low dielectric constant film (for example, SiOCH film) having a lower relative dielectric constant than that of a silicon oxide film, or the like can be used. The interlayer insulating film 1313 may be a stack of a plurality of insulating films. In the interlayer insulating film 1313, a wiring groove for embedding the first wiring A1307 and the first wiring B1303 is formed, and the first wiring A1307 is inserted into the wiring groove via the first barrier metal A1310. A first wiring B1303 is embedded via B1308.
 第1配線A1307及び第1配線B1303は、層間絶縁膜1313に形成された配線溝に第1バリアメタルA1310及び第1バリアメタルB1308を介して埋め込まれた配線である。第1配線A1307は、第2電極1302を兼ねている。第1配線B1303はイオン伝導層1304と直接接している。第1配線A1307及び第1配線B1303はCuで構成されているが、Alと合金化されていてもよい。第1配線B1303は、イオン伝導層1304中にCuイオンを供給する第3電極として機能する。 The first wiring A 1307 and the first wiring B 1303 are wirings embedded in the wiring trench formed in the interlayer insulating film 1313 via the first barrier metal A 1310 and the first barrier metal B 1308. The first wiring A 1307 also serves as the second electrode 1302. The first wiring B1303 is in direct contact with the ion conductive layer 1304. The first wiring A1307 and the first wiring B1303 are made of Cu, but may be alloyed with Al. The first wiring B1303 functions as a third electrode that supplies Cu ions into the ion conductive layer 1304.
 第1バリアメタルA1310及び第1バリアメタルB1308は、第1配線A1307及び第1配線B1303を構成する金属が層間絶縁膜1313や下層へ拡散することを防止するために、配線の側面および底面を被覆する、バリア性を有する導電性膜である。第1バリアメタルA1310及び第1バリアメタルB1121には、例えば、第1配線がCuを主成分とする金属元素からなる場合には、タンタル(Ta)、窒化タンタル(TaN)、窒化チタン(TiN)、炭窒化タングステン(WCN)のような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The first barrier metal A1310 and the first barrier metal B1308 cover the side and bottom surfaces of the wiring in order to prevent the metal constituting the first wiring A1307 and the first wiring B1303 from diffusing into the interlayer insulating film 1313 or the lower layer. It is a conductive film having a barrier property. For the first barrier metal A1310 and the first barrier metal B1121, for example, when the first wiring is made of a metal element whose main component is Cu, tantalum (Ta), tantalum nitride (TaN), titanium nitride (TiN) Alternatively, a refractory metal such as tungsten carbonitride (WCN), a nitride thereof, or a laminated film thereof can be used.
 バリア絶縁膜1305は、第1配線A1307及び第1配線B1303を含む層間絶縁膜1313上に形成され、第1配線A1307及び第1配線B1303を構成する金属(例えば、Cu)の酸化を防いだり、イオン伝導層104中への第1配線A1307及び第1配線B1303を構成する金属の拡散を防ぐ役割を有する。バリア絶縁膜1305には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 1305 is formed on the interlayer insulating film 1313 including the first wiring A1307 and the first wiring B1303, and prevents oxidation of the metal (for example, Cu) constituting the first wiring A1307 and the first wiring B1303. It has a role of preventing diffusion of the metal constituting the first wiring A 1307 and the first wiring B 1303 into the ion conductive layer 104. As the barrier insulating film 1305, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 バリア絶縁膜1305は、第1配線A1307及び第1配線B1303上にて開口部を有する。バリア絶縁膜1305の開口部においては、第2電極1302を構成する第1配線A1307と第1配線B1303が露出しており、両者はイオン伝導層1304に接している。バリア絶縁膜1305の開口部は、第1配線A1307及び第1配線B1303を含む領域内に形成されている。バリア絶縁膜1305の開口部の壁面は、第1配線A1307及び第1配線B1303から離れるにしたがい広くなったテーパ面となっている。バリア絶縁膜1305の開口部のテーパ面は、第1配線A1307及び第1配線B1303の上面に対し85°以下に設定されている。 The barrier insulating film 1305 has an opening on the first wiring A 1307 and the first wiring B 1303. In the opening of the barrier insulating film 1305, the first wiring A 1307 and the first wiring B 1303 that constitute the second electrode 1302 are exposed, and both are in contact with the ion conductive layer 1304. The opening of the barrier insulating film 1305 is formed in a region including the first wiring A 1307 and the first wiring B 1303. The wall surface of the opening of the barrier insulating film 1305 is a tapered surface that becomes wider as the distance from the first wiring A1307 and the first wiring B1303 increases. The tapered surface of the opening of the barrier insulating film 1305 is set to 85 ° or less with respect to the upper surfaces of the first wiring A 1307 and the first wiring B 1303.
 イオン伝導層1304は、金属イオン(Cuイオン)が電界で移動可能な膜である。イオン伝導層1304は、イオン伝導層が含む金属の作用(拡散、イオン伝動など)により抵抗が変化する材料を用いることができろ。3端子スイッチ1318の抵抗変化を、金属架橋の形成・消滅によって行う場合には、第3電極を兼ねる第1配線B1322より供給される金属イオンが、イオン伝導可能な膜が用いられる。金属イオンは、Cuイオンとして、第3電極を兼ねる第1配線B1322より供給される。バリア絶縁膜1314には、プラグ1306を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル1311を介してプラグ1306が埋め込まれている。 The ion conductive layer 1304 is a film in which metal ions (Cu ions) can move in an electric field. For the ion conductive layer 1304, a material whose resistance is changed by the action (diffusion, ion transmission, etc.) of the metal included in the ion conductive layer can be used. In the case where the resistance change of the three-terminal switch 1318 is performed by formation / disappearance of a metal bridge, a film capable of conducting ions of metal ions supplied from the first wiring B 1322 that also serves as the third electrode is used. Metal ions are supplied as Cu ions from the first wiring B1322 that also serves as the third electrode. A pilot hole for embedding the plug 1306 is formed in the barrier insulating film 1314, and the plug 1306 is embedded in the pilot hole via the second barrier metal 1311.
 イオン伝導層1304の作製に利用可能な材料候補の一つは、カルコゲナイドのGeSbTeで、相変化素子において、相変化層の材料として使用される。GeSbTeからなるイオン伝導層1304を形成する手段として、GeSbTeの焼結ターゲットを用いてスパッタ成膜する方法がある。具体的には、Ge2Sb2Te5ターゲットを用いて、Ge2Sb2Te5からなる膜の成膜を行う。 One candidate material that can be used to fabricate the ion conductive layer 1304 is chalcogenide GeSbTe, which is used as a phase change layer material in phase change elements. As a means for forming the ion conductive layer 1304 made of GeSbTe, there is a method of performing sputtering film formation using a GeSbTe sintered target. Specifically, using a Ge 2 Sb 2 Te 5 target, a film is formed of a film made of Ge 2 Sb 2 Te 5.
 イオン伝導層1304の作製に利用可能な材料候補の他の一つは、シリコン、酸素、炭素、水素を含むSIOCH系材料であり、プラズマCVD法によって形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料(環状有機シロキサン)蒸気の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。 Another material candidate that can be used for manufacturing the ion conductive layer 1304 is a SIOCH-based material containing silicon, oxygen, carbon, and hydrogen, which is formed by a plasma CVD method. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material (cyclic organosiloxane) vapor is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is supplied directly to the reaction chamber through another line.
 バリア絶縁膜1314は、3端子スイッチ1318にダメージを与えることなく、さらにイオン伝導層1304中に含まれる金属イオンの層間絶縁膜1315中への拡散を防ぐ機能を有する絶縁膜である。また、イオン伝導層1304を構成するSIOCH系材料中の酸素の脱離を抑制する機能も有する。バリア絶縁膜1314には、例えば、SiN膜、SiCN膜等を用いることができる。バリア絶縁膜1314は、バリア絶縁膜1305と同一材料であることが好ましい。バリア絶縁膜1314には、プラグ1306を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル1311を介してプラグ1306が埋め込まれている。 The barrier insulating film 1314 is an insulating film having a function of preventing diffusion of metal ions contained in the ion conductive layer 1304 into the interlayer insulating film 1315 without damaging the three-terminal switch 1318. In addition, the ion conductive layer 1304 has a function of suppressing desorption of oxygen in the SIOCH material. As the barrier insulating film 1314, for example, a SiN film, a SiCN film, or the like can be used. The barrier insulating film 1314 is preferably made of the same material as the barrier insulating film 1305. A pilot hole for embedding the plug 1306 is formed in the barrier insulating film 1314, and the plug 1306 is embedded in the pilot hole via the second barrier metal 1311.
 層間絶縁膜1315は、バリア絶縁膜1314上に形成された絶縁膜である。層間絶縁膜1315には、例えば、SiO2、SiOC膜などを用いることができる。層間絶縁膜1315は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜1315は、層間絶縁膜1313、層間絶縁膜1316と同一材料としてもよい。層間絶縁膜1315には、プラグ1306を埋め込むための下穴が形成されており、当該下穴に第2バリアメタル1311を介してプラグ1306が埋め込まれている。 The interlayer insulating film 1315 is an insulating film formed on the barrier insulating film 1314. As the interlayer insulating film 1315, for example, a SiO 2 or SiOC film can be used. The interlayer insulating film 1315 may be a stack of a plurality of insulating films. The interlayer insulating film 1315 may be formed of the same material as the interlayer insulating film 1313 and the interlayer insulating film 1316. A pilot hole for embedding the plug 1306 is formed in the interlayer insulating film 1315, and the plug 1306 is embedded in the pilot hole via the second barrier metal 1311.
 層間絶縁膜1316は、層間絶縁膜1315上に形成された絶縁膜である。層間絶縁膜1316には、例えば、SiO2、SiOC膜、SiO2よりも比誘電率の低い低誘電率膜(例えば、SiOCH膜)などを用いることができる。層間絶縁膜1316は、複数の絶縁膜を積層したものであってもよい。層間絶縁膜1316は、層間絶縁膜1315、層間絶縁膜1313と同一材料としてもよい。また、層間絶縁膜1316と層間絶縁膜1315を異なる絶縁材料を用いて作製し、そのエッチング特性に有意な差異を設けることもできる。層間絶縁膜1316には、第2配線1312埋め込むための配線溝が形成されており、当該配線溝に第2バリアメタル1311を介して第2配線1312が埋め込まれている。 The interlayer insulating film 1316 is an insulating film formed on the interlayer insulating film 1315. As the interlayer insulating film 1316, for example, a SiO 2 , a SiOC film, a low dielectric constant film (for example, a SiOCH film) having a relative dielectric constant lower than that of SiO 2 can be used. The interlayer insulating film 1316 may be a stack of a plurality of insulating films. The interlayer insulating film 1316 may be made of the same material as the interlayer insulating film 1315 and the interlayer insulating film 1313. Alternatively, the interlayer insulating film 1316 and the interlayer insulating film 1315 can be formed using different insulating materials, and a significant difference can be provided in the etching characteristics. In the interlayer insulating film 1316, a wiring groove for embedding the second wiring 1312 is formed, and the second wiring 1312 is embedded in the wiring groove via the second barrier metal 1311.
 第2配線1312は、層間絶縁膜1316に形成された配線溝に第2バリアメタル1311を介して埋め込まれた配線である。第2配線1312は、プラグ1306と一体になっている。プラグ1306は、層間絶縁膜1315、及びバリア絶縁膜1314に形成された下穴に第2バリアメタル1311を介して埋め込まれている。 The second wiring 1312 is a wiring embedded in a wiring groove formed in the interlayer insulating film 1316 via the second barrier metal 1311. The second wiring 1312 is integrated with the plug 1306. The plug 1306 is embedded in a prepared hole formed in the interlayer insulating film 1315 and the barrier insulating film 1314 via the second barrier metal 1311.
 第1電極1301は、プラグ1306の側面であり、第2バリアメタル1311で構成される。第1電極1301は3端子スイッチ1318において信号を伝達する電極であり、イオン伝導層1304と直接接している。第1配線1312及びプラグ1306には、例えば、Cuを用いることができる。 The first electrode 1301 is a side surface of the plug 1306 and is composed of the second barrier metal 1311. The first electrode 1301 is an electrode that transmits a signal in the three-terminal switch 1318, and is in direct contact with the ion conductive layer 1304. For the first wiring 1312 and the plug 1306, for example, Cu can be used.
 第2バリアメタル1311は、第2配線1312(プラグ1306を含む)を構成する金属が、層間絶縁膜1316や層間絶縁膜1315や下層へ拡散することを防止するために、第2配線1312及びプラグ1306の側面および底面を被覆する、バリア性を有する導電性膜である。第2バリアメタル1012には、例えば、第2配線1312及びプラグ1306がCuを主成分とする金属元素からなる場合には、Ta、TaN、TiN、WCNのような高融点金属やその窒化物等、またはそれらの積層膜を用いることができる。 The second barrier metal 1311 includes the second wiring 1312 and the plug in order to prevent the metal constituting the second wiring 1312 (including the plug 1306) from diffusing into the interlayer insulating film 1316, the interlayer insulating film 1315, or the lower layer. 1306 is a conductive film having a barrier property that covers the side and bottom surfaces of 1306. For example, when the second wiring 1312 and the plug 1306 are made of a metal element whose main component is Cu, the second barrier metal 1012 includes a refractory metal such as Ta, TaN, TiN, and WCN, a nitride thereof, and the like. Alternatively, or a stacked film thereof can be used.
 バリア絶縁膜1317は、第2配線1312の表面、層間絶縁膜1316上に形成され、第2配線1317を構成する金属(例えば、Cu)の酸化を防いだり、上層への第2配線1312を構成する金属(Cu)の拡散を防ぐ役割を有する絶縁膜である。バリア絶縁膜1317には、例えば、SiC膜、SiCN膜、SiN膜、及びそれらの積層構造等を用いることができる。 The barrier insulating film 1317 is formed on the surface of the second wiring 1312 and the interlayer insulating film 1316, and prevents the oxidation of the metal (for example, Cu) constituting the second wiring 1317, or configures the second wiring 1312 to the upper layer. It is an insulating film having a role of preventing diffusion of metal (Cu). As the barrier insulating film 1317, for example, a SiC film, a SiCN film, a SiN film, a stacked structure thereof, or the like can be used.
 (スイッチング動作)
 図13に示す、第一の実施態様の3端子スイッチのスイッチング動作時の駆動方法を説明する。
(Switching operation)
A driving method during the switching operation of the three-terminal switch of the first embodiment shown in FIG. 13 will be described.
 (a)ON動作(OFF状態からON状態への遷移過程)
 まず、第2電極1302を兼ねる第1配線A1307と、第1電極1301を兼ねるプラグ1306、第2配線1312を介して、それぞれ接地する。さらに、第3電極を兼ねる第1配線B1303に正電圧(+VON>0V)を印加する。第3電極を兼ねる第1配線B1303から金属イオン(Cuイオン)がイオン伝導層1304中へ拡散し、第1電極1301及び第2電極1302側にマイグレーションする。マイグレーションした金属イオンは、第1電極1301及び第2電極1302より電子を受け取り、金属となり析出する。析出する金属で構成される、金属架橋1309によって、第1電極1301と第2電極1302の間が連結される。金属架橋1309の形成によって、第1電極1301と第2電極1302の間の抵抗値が低抵抗となり、ON状態となる。
(A) ON operation (transition process from OFF state to ON state)
First, the first wiring A 1307 that also serves as the second electrode 1302, the plug 1306 that also serves as the first electrode 1301, and the second wiring 1312 are grounded. Further, a positive voltage (+ V ON > 0 V) is applied to the first wiring B 1303 that also serves as the third electrode. Metal ions (Cu ions) diffuse into the ion conductive layer 1304 from the first wiring B 1303 that also serves as the third electrode, and migrate to the first electrode 1301 and the second electrode 1302 side. The migrated metal ions receive electrons from the first electrode 1301 and the second electrode 1302, and are deposited as metal. The first electrode 1301 and the second electrode 1302 are connected by a metal bridge 1309 made of deposited metal. By the formation of the metal bridge 1309, the resistance value between the first electrode 1301 and the second electrode 1302 becomes low resistance, and is turned on.
 前述のON状態への遷移は、第3電極を兼ねる第1配線B1303を接地して、第1電極1301及び第2電極1302に負電圧(-VON<0V)を印加しても良い。 In the above transition to the ON state, the first wiring B 1303 that also serves as the third electrode may be grounded, and a negative voltage (−V ON <0 V) may be applied to the first electrode 1301 and the second electrode 1302.
 (b)OFF動作(ON状態からOFF状態への遷移過程)
 一方、第2電極1302兼ねる第1配線A1307を介して、第1電極1301を兼ねるプラグ1306、第2配線1312を介して、それぞれ接地し、第3電極を兼ねる第1配線B1303に負電圧(-VOFF<0V)を印加する。第2電極1302、第1電極1301との間を連結している金属架橋1309を構成している金属の溶解反応が進行する。イオン伝導層1304と金属架橋1309の界面に生成する電界によって、金属はイオン化し、生成する金属イオン(Cuイオン)はイオン伝導層1304中に存在する電界により、第1配線B1303に向かって分散する。金属架橋1309の溶解によって、第2電極1302、第1電極1301との間の導通経路が遮断される結果、第1電極1301と第2電極1302の間の抵抗値が高抵抗となり、OFF状態に遷移する。
(B) OFF operation (transition process from ON state to OFF state)
On the other hand, the first wiring A1307 also serving as the second electrode 1302, the plug 1306 also serving as the first electrode 1301, and the second wiring 1312 are grounded, and a negative voltage (− V OFF <0V) is applied. The dissolution reaction of the metal constituting the metal bridge 1309 connecting the second electrode 1302 and the first electrode 1301 proceeds. The metal is ionized by the electric field generated at the interface between the ion conductive layer 1304 and the metal bridge 1309, and the generated metal ions (Cu ions) are dispersed toward the first wiring B 1303 by the electric field present in the ion conductive layer 1304. . As a result of the dissolution of the metal bridge 1309, the conduction path between the second electrode 1302 and the first electrode 1301 is cut off, so that the resistance value between the first electrode 1301 and the second electrode 1302 becomes high resistance, and the OFF state is established. Transition.
 前述のOFF状態への遷移は、第3電極を兼ねる第1配線B1303を接地して、第1電極1301及び第2電極1302に正電圧(+VOFF>0V)を印加しても良い。 In the transition to the above-described OFF state, the first wiring B 1303 that also serves as the third electrode may be grounded, and a positive voltage (+ V OFF > 0 V) may be applied to the first electrode 1301 and the second electrode 1302.
 第1電極1301を兼ねるプラグ1306の側面が曲率を有することで、ON状態とOFF状態のスイッチング動作時に曲率部分に電界が集中し、安定かつバラツキが小さいスイッチング動作が得られる。 Since the side surface of the plug 1306 that also serves as the first electrode 1301 has a curvature, an electric field concentrates on the curvature portion during the switching operation between the ON state and the OFF state, and a switching operation that is stable and has little variation can be obtained.
 (製造プロセス)
 半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置において、図13に示す、第一の実施態様の3端子スイッチング素子を、前記抵抗変化型不揮発性スイッチング素子として作製する際の製造プロセスを説明する。図14は、第一の実施態様の3端子スイッチング素子の製造工程の一例を模式的に示す断面図である。図14は、該製造工程中、工程1~工程6を示す図である。
(Manufacturing process)
In a semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate, the three-terminal switching element of the first embodiment shown in FIG. A manufacturing process for manufacturing a nonvolatile switching element will be described. FIG. 14 is a cross-sectional view schematically showing an example of a manufacturing process of the three-terminal switching element according to the first embodiment. FIG. 14 is a diagram showing steps 1 to 6 in the manufacturing process.
 (工程1)
 半導体基板1419(例えば、半導体素子が形成された基板)上に層間絶縁膜1413(例えば、膜厚300nmのSiO2、膜厚150nmのSiOCH、膜厚100nmのSiO2)を堆積し、その後、リソグラフィ法(フォトレジスト形成、ドライエッチング、フォトレジスト除去を含む)を用いて、層間絶縁膜1413に配線溝を形成し、その後、当該配線溝に第1バリアメタルA1410及び第1バリアメタルB1408(例えば、TaN/Ta、膜厚5nm/5nm)を介して第1配線A1407及び第1配線B1403(例えば、Cu)を埋め込む。層間絶縁膜1413は、プラズマCVD法によって形成することができる。第1配線A1407及び第1配線B1403は、例えば、PVD法によって第1バリアメタルA1410及び第1バリアメタルB1408(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によってCuを配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。ここで、CMP(Chemical Mechanical Polishing)法とは、多層配線形成プロセス中に生じるウエハ表面の凹凸を、研磨液をウエハ表面に流しながら回転させた研磨パッドに接触させて研磨することによって平坦化する方法である。配線溝に埋め込まれた余剰の銅を研磨することによって埋め込み配線(ダマシン配線)を形成したり、層間絶縁膜1413を研磨することで平坦化を行う。
(Process 1)
An interlayer insulating film 1413 (eg, 300 nm thick SiO 2 , 150 nm thick SiOCH, 100 nm thick SiO 2 ) is deposited on a semiconductor substrate 1419 (eg, a substrate on which a semiconductor element is formed), and then lithography is performed. A wiring trench is formed in the interlayer insulating film 1413 using a method (including photoresist formation, dry etching, and photoresist removal), and then a first barrier metal A 1410 and a first barrier metal B 1408 (for example, The first wiring A1407 and the first wiring B1403 (for example, Cu) are embedded via TaN / Ta and a film thickness of 5 nm / 5 nm. The interlayer insulating film 1413 can be formed by a plasma CVD method. For example, the first wiring A1407 and the first wiring B1403 are formed by forming a first barrier metal A1410 and a first barrier metal B1408 (for example, a TaN / Ta laminated film) by a PVD method, and after forming a Cu seed by a PVD method, It can be formed by embedding Cu in the wiring trench by an electrolytic plating method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring trench by a CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. Here, the CMP (Chemical Mechanical Polishing) method is to planarize the unevenness of the wafer surface that occurs during the multilayer wiring formation process by bringing the polishing liquid into contact with a rotating polishing pad while flowing the polishing liquid over the wafer surface and polishing it. Is the method. By polishing excess copper embedded in the wiring trench, a buried wiring (damascene wiring) is formed, or by planarizing the interlayer insulating film 1413 by polishing.
 (工程2)
 第1配線A1407及び第1配線B1403の表面、層間絶縁膜1413上にバリア絶縁膜1405(例えば、SiN、膜厚30nm)を形成する。ここで、バリア絶縁膜1405は、プラズマCVD法によって形成することができる。バリア絶縁膜1405の膜厚は、10nm~50nm程度であることが好ましい。
(Process 2)
A barrier insulating film 1405 (eg, SiN, film thickness of 30 nm) is formed over the surface of the first wiring A 1407 and the first wiring B 1403 and the interlayer insulating film 1413. Here, the barrier insulating film 1405 can be formed by a plasma CVD method. The thickness of the barrier insulating film 1405 is preferably about 10 nm to 50 nm.
 (工程3)
 次に、バリア絶縁膜1405に接するようにハードマスク1420(例えば、SiO2膜、50nm)を堆積する。工程3において、ハードマスク1420は、プラズマCVD法によって形成することができる。さらに、ハードマスク1420をパターニングするためのフォトレジスト(図示せず)を形成し、その後、当該フォトレジストをエッチングマスクとして、ハードマスク1420をドライエッチングし、その後、酸素プラズマアッシングと有機剥離を用いて、フォトレジストを除去する。
(Process 3)
Next, a hard mask 1420 (eg, SiO 2 film, 50 nm) is deposited so as to be in contact with the barrier insulating film 1405. In step 3, the hard mask 1420 can be formed by a plasma CVD method. Further, a photoresist (not shown) for patterning the hard mask 1420 is formed, and then the hard mask 1420 is dry-etched using the photoresist as an etching mask, and then oxygen plasma ashing and organic peeling are used. , Remove the photoresist.
 (工程4)
 ハードマスク1420をマスクとして、ハードマスク1420の開口部から露出するバリア絶縁膜1405をエッチバック(ドライエッチング)することにより、バリア絶縁膜1405に開口部を形成して、バリア絶縁膜1405の開口部から第1配線A1407及び第1配線B1403を露出させ、その後、アミン系の剥離液などで有機剥離処理を行うことで、第1配線A1407及び第1配線B1403の露出面に形成された酸化銅を除去するとともに、エッチバック時に発生したエッチング複生成物などを除去する。バリア絶縁膜1405のエッチバックでは、反応性ドライエッチングを用いることで、バリア絶縁膜1405の開口部の壁面をテーパ面とすることができる。反応性ドライエッチングでは、エッチングガスとしてフルオロカーボンを含むガスを用いることができる。ハードマスク1420は、エッチバック中に完全に除去されることが好ましいが、絶縁材料である場にはそのまま残存してもよい。また、バリア絶縁膜1405の開口部の形状は曲率を有しており、開口部の平面方向の最大の長さは30nmから500nmとする。さらに、非反応性ガスを用いたRF(Radio Frequency;高周波)エッチングによって、第1配線A1407及び第1配線B1403の表面の酸化物を除去する。非反応性ガスとしては、ヘリウムやアルゴンを用いることができる。第1配線A1407の露出した上面は、第2電極1402となる。
(Process 4)
Using the hard mask 1420 as a mask, the barrier insulating film 1405 exposed from the opening of the hard mask 1420 is etched back (dry etching), whereby an opening is formed in the barrier insulating film 1405 and the opening of the barrier insulating film 1405 is formed. Then, the first wiring A1407 and the first wiring B1403 are exposed, and thereafter, an organic stripping process is performed with an amine-based stripping solution or the like, so that the copper oxide formed on the exposed surfaces of the first wiring A1407 and the first wiring B1403 is removed. In addition to the removal, the etching by-product generated during the etch back is removed. In the etch back of the barrier insulating film 1405, the wall surface of the opening of the barrier insulating film 1405 can be tapered by using reactive dry etching. In reactive dry etching, a gas containing fluorocarbon can be used as an etching gas. The hard mask 1420 is preferably completely removed during the etch back, but may remain in place when it is an insulating material. The shape of the opening of the barrier insulating film 1405 has a curvature, and the maximum length of the opening in the planar direction is 30 nm to 500 nm. Further, oxides on the surfaces of the first wiring A 1407 and the first wiring B 1403 are removed by RF (Radio Frequency) using a non-reactive gas. As the non-reactive gas, helium or argon can be used. The exposed upper surface of the first wiring A 1407 becomes the second electrode 1402.
 (工程5)
 次に、バリア絶縁膜1405、第1配線A1407及び第1配線B1403に接するようにイオン伝導層1404として、シリコン、酸素、炭素、水素を含むSIOCH系イオン伝導性材料をCVD法で20nmから80nm程度形成する。キャリアガスのヘリウムを用いて、気化させた環状有機シロキサン蒸気を含む原料混合ガスと、ヘリウムを反応室内に流入し、両者の供給が安定化し、反応室の圧力が一定になったところでRF電力の印加を開始する。原料の供給量は10~200sccm、ヘリウムの供給は原料気化器経由で500sccm、別ラインで反応室に直接500sccm供給する。温度は250℃~350℃程度が好ましい。次に、イオン伝導層1404上にバリア絶縁膜1414として、SiNもしくはSiCNを30nmの膜厚で形成する。工程7において、バリア絶縁膜1414は、プラズマCVD法によって形成することができる。例えば、SiH4/N2の混合ガスの高密度プラズマによって形成したSiN膜などを用いることが好ましい。3端子スイッチ素子1418以外の領域にもイオン伝導層1404が残るが、絶縁膜として機能するため、3端子スイッチの動作および多層配線に影響はない。工程5では、バリア絶縁膜1414の上に層間絶縁膜1415として、SiO2を300nm成膜する。さらに、3端子スイッチ1418によって生じた段差を解消するため、層間絶縁膜1415を170nm程度CMP法にて研磨することで平坦にする。層間絶縁膜1415は3端子スイッチ素子1418の段差を確実に埋めるために、高密度プラズマを使用してSiO2を成膜することが望ましい。
(Process 5)
Next, an SIOCH ion conductive material containing silicon, oxygen, carbon, and hydrogen is used as an ion conductive layer 1404 so as to be in contact with the barrier insulating film 1405, the first wiring A 1407, and the first wiring B 1403 by a CVD method with a thickness of about 20 nm to 80 nm. Form. Using the carrier gas helium, the raw material mixed gas containing vaporized cyclic organosiloxane vapor and helium flow into the reaction chamber, the supply of both is stabilized, and when the pressure in the reaction chamber becomes constant, the RF power Start application. The supply amount of the raw material is 10 to 200 sccm, the supply of helium is 500 sccm via the raw material vaporizer, and 500 sccm is directly supplied to the reaction chamber by another line. The temperature is preferably about 250 ° C to 350 ° C. Next, SiN or SiCN is formed to a thickness of 30 nm as the barrier insulating film 1414 over the ion conductive layer 1404. In step 7, the barrier insulating film 1414 can be formed by a plasma CVD method. For example, it is preferable to use a SiN film formed by high-density plasma of a mixed gas of SiH 4 / N 2 . Although the ion conductive layer 1404 remains in a region other than the three-terminal switch element 1418, it functions as an insulating film and thus does not affect the operation of the three-terminal switch and the multilayer wiring. In step 5, 300 nm of SiO 2 is formed as an interlayer insulating film 1415 on the barrier insulating film 1414. Further, in order to eliminate the level difference caused by the three-terminal switch 1418, the interlayer insulating film 1415 is flattened by polishing about 170 nm by a CMP method. The interlayer insulating film 1415 is desirably formed of SiO 2 using high-density plasma in order to reliably fill the steps of the three-terminal switch element 1418.
 (工程6)
 次に、層間絶縁膜1415の上に層間絶縁膜1416(例えば、比誘電率の低いSiOC、SiO2の積層)を堆積し、その後、プラグ1406用の下穴および第2配線1412用の配線溝をドライエッチングによって形成し、銅デュアルダマシン配線プロセスを用いて、当該配線溝及び当該下穴内に第2バリアメタル1411(例えば、TaN/Ta)を介して第2配線1412(例えば、Cu)及びプラグ1106(例えば、Cu)を同時に形成し、その後、第2配線1412を含む層間絶縁膜1416上にバリア絶縁膜1417(例えば、SiCN膜)を堆積する。工程6において、第2配線1412およびプラグ1406の形成は、例えば、PVD法によって第2バリアメタル1411(例えば、TaN/Taの積層膜)を形成し、PVD法によるCuシードの形成後、電解めっき法によって銅を配線溝内に埋設し、200℃以上の温度で熱処理処理後、CMP法によって配線溝内以外の余剰の銅を除去することで形成することができる。このような一連の銅配線の形成方法は、当該技術分野における一般的な手法を用いることができる。工程6では、第2バリアメタル1411とイオン伝導層1404と接する側面が第1電極1401となっている。また、工程6において、層間絶縁膜1416及びバリア絶縁膜1417はプラズマCVD法で形成することができる。工程6ではプラグ1406の下穴を形成する際、バリア絶縁膜1405に到達している。プラグ1406用の下穴および第2配線1412用の配線溝のドライエッチングには、フルオロカーボン系のガスを用いる。

 以上、実施形態(及び実施例)を参照して本願発明を説明したが、本願発明は上記実施形態(及び実施例)に限定されものではない。本願発明の構成や詳細には、本願発明のスコープ内で当業者が理解し得る様々な変更をすることができる。
(Step 6)
Next, an interlayer insulating film 1416 (for example, a laminate of SiOC and SiO 2 having a low relative dielectric constant) is deposited on the interlayer insulating film 1415, and then a pilot hole for the plug 1406 and a wiring groove for the second wiring 1412 are deposited. Is formed by dry etching, and a second wiring 1412 (for example, Cu) and a plug are inserted into the wiring groove and the prepared hole through a second barrier metal 1411 (for example, TaN / Ta) using a copper dual damascene wiring process. 1106 (for example, Cu) is formed at the same time, and then a barrier insulating film 1417 (for example, a SiCN film) is deposited on the interlayer insulating film 1416 including the second wiring 1412. In step 6, the second wiring 1412 and the plug 1406 are formed by, for example, forming a second barrier metal 1411 (for example, a TaN / Ta laminated film) by the PVD method, forming a Cu seed by the PVD method, and then performing electrolytic plating. It can be formed by embedding copper in the wiring groove by the method, after heat treatment at a temperature of 200 ° C. or higher, and then removing excess copper other than in the wiring groove by the CMP method. As a method for forming such a series of copper wirings, a general method in this technical field can be used. In step 6, the side surface in contact with the second barrier metal 1411 and the ion conductive layer 1404 is the first electrode 1401. In Step 6, the interlayer insulating film 1416 and the barrier insulating film 1417 can be formed by a plasma CVD method. In step 6, the barrier insulating film 1405 is reached when the prepared hole of the plug 1406 is formed. Fluorocarbon-based gas is used for dry etching of the prepared hole for the plug 1406 and the wiring groove for the second wiring 1412.

While the present invention has been described with reference to the embodiments (and examples), the present invention is not limited to the above embodiments (and examples). Various changes that can be understood by those skilled in the art can be made to the configuration and details of the present invention within the scope of the present invention.
 この出願は、2012年 9月28日に出願された日本出願特願2012-217319を基礎とする優先権を主張し、その開示の全てをここに取り込む。
This application claims priority based on Japanese Patent Application No. 2012-217319 filed on September 28, 2012, the entire disclosure of which is incorporated herein.
 本発明に係るスイッチング素子は、半導体装置の多層配線層中に設ける不揮発性スイッチング素子として利用できる。 The switching element according to the present invention can be used as a nonvolatile switching element provided in a multilayer wiring layer of a semiconductor device.
 上記の実施形態の一部または全部は、以下の付記のようにも記載されうるが、以下には限られない。 Some or all of the above embodiments may be described as in the following supplementary notes, but are not limited to the following.
 (付記1)
 多層配線を構成するCuプラグもしくはCu配線と電気的に接続した金属膜の側壁部である第1電極と、
 前記第1電極とは異なるCu配線に電気的に接続した金属膜の側壁部である第2電極と、
 前記第1の電極と前記第2の電極の間に挟まれた絶縁膜とを具え、
 電界によってイオン化した金属が移動可能なイオン伝導層が、前記第1電極と前記第2電極の側面に接している
ことを特徴とするスイッチング素子。
(Appendix 1)
A first electrode which is a side wall portion of a metal film electrically connected to a Cu plug or Cu wiring constituting a multilayer wiring;
A second electrode which is a side wall portion of a metal film electrically connected to a Cu wiring different from the first electrode;
An insulating film sandwiched between the first electrode and the second electrode;
A switching element, wherein an ion conductive layer capable of moving a metal ionized by an electric field is in contact with side surfaces of the first electrode and the second electrode.
 (付記2)
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層に供給する少なくとも一つの第3電極を有し、該第3電極が多層配線を形成するCu配線で構成されている
ことを特徴とする付記1に記載のスイッチング素子。
(Appendix 2)
The at least one third electrode that is in contact with the ion conductive layer and supplies metal ions to the ion conductive layer, and the third electrode is constituted by a Cu wiring that forms a multilayer wiring. 2. The switching element according to 1.
 (付記3)
 多層配線を構成するCuプラグもしくはCu配線と電気的に接続した金属膜の側壁部である第1電極と、
 前記第1電極とは異なるCu配線である第2電極と、
 前記第1電極と前記第2電極の間に挟まれた絶縁膜とを具え、
 電界によってイオン化した金属が移動可能なイオン伝導層が、前記第1電極の側面と前記第2電極の上面および側面に接しており、
 前記イオン伝導層に接し、金属イオンを前記イオン伝導層に供給する少なくとも一つの第3電極を有し、該第3電極が多層配線を形成するCu配線で構成されている
ことを特徴とするスイッチング素子。
(Appendix 3)
A first electrode which is a side wall portion of a metal film electrically connected to a Cu plug or Cu wiring constituting a multilayer wiring;
A second electrode that is a Cu wiring different from the first electrode;
Comprising an insulating film sandwiched between the first electrode and the second electrode;
An ion conductive layer capable of moving a metal ionized by an electric field is in contact with the side surface of the first electrode and the upper surface and side surface of the second electrode;
Switching comprising: having at least one third electrode in contact with the ion conductive layer and supplying metal ions to the ion conductive layer, the third electrode being constituted by a Cu wiring forming a multilayer wiring. element.
 (付記4)
 前記第1電極、もしくは前記第2電極の少なくともどちらかが、凸型の曲率を有している
ことを特徴とする付記1~付記3のいずれかに記載のスイッチング素子。
(Appendix 4)
4. The switching element according to any one of appendix 1 to appendix 3, wherein at least one of the first electrode and the second electrode has a convex curvature.
 (付記5)
 前記イオン伝導層の上面が、前記金属イオンを遮断するイオンバリア層で覆われている
ことを特徴とする付記1~付記4のいずれかに記載のスイッチング素子。
(Appendix 5)
The switching element according to any one of appendix 1 to appendix 4, wherein an upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions.
 (付記6)
 半導体基板上の多層配線層の内部にスイッチング素子を有する半導体装置であって、
 前記多層配線は、少なくとも、Cu配線とCuプラグを備え、
 前記Cu配線上にはバリア絶縁膜が設けられ、
 前記バリア絶縁膜には2つの前記Cu配線に達する開口部がそれぞれ1箇所ずつ設けられており、
 前記Cu配線の1つに前記スイッチング素子の第2電極が電気的に接続し、
 前記第2電極の上に絶縁膜を挟んで第1電極が設けられ、
 該第1電極は前記Cuプラグと電気的に接続し、
 前記第1電極と前記第2電極の側面ともう1つのCu配線上に電界によって金属イオンが移動可能なイオン伝導層が接し、
 該イオン伝導層に接し、かつ、前記第2電極とバリア絶縁膜によって絶縁された多層配線のCu配線が第3電極を兼ね、
 前記イオン伝導層の上面はバリア絶縁膜が設けられている
ことを特徴とする半導体装置。
(Appendix 6)
A semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate,
The multilayer wiring includes at least a Cu wiring and a Cu plug,
A barrier insulating film is provided on the Cu wiring,
The barrier insulating film is provided with one opening each reaching the two Cu wirings,
A second electrode of the switching element is electrically connected to one of the Cu wirings;
A first electrode is provided on the second electrode with an insulating film interposed therebetween,
The first electrode is electrically connected to the Cu plug;
An ion conductive layer capable of moving metal ions by an electric field is in contact with side surfaces of the first electrode and the second electrode and another Cu wiring,
The Cu wiring of the multilayer wiring that is in contact with the ion conductive layer and insulated by the second electrode and the barrier insulating film also serves as the third electrode,
A semiconductor device, wherein a barrier insulating film is provided on an upper surface of the ion conductive layer.
 (付記7)
 半導体基板上の多層配線層の内部にスイッチング素子を有する半導体装置であって、
 前記多層配線は、少なくとも、Cu配線とCuプラグを備え、
 前記Cu配線上にはバリア絶縁膜が設けられ、
 前記バリア絶縁膜には2つの前記Cu配線に達する開口部が1箇所設けられており、
 前記Cu配線の1つが第2電極を兼ね、
 前記第2電極の上にバリア絶縁膜を挟んで第1電極が設けられ、
 該第1電極は前記Cuプラグと電気的に接続し、
 前記第1電極と前記第2電極の側面ともう1つの前記Cu配線上に、電界によって金属イオンが移動可能なイオン伝導層が接し、
 該イオン伝導層に接した前記多層配線のCu配線が第3電極を兼ね、
 前記イオン伝導層の上面はバリア絶縁膜が設けられている
ことを特徴とする半導体装置。
(Appendix 7)
A semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate,
The multilayer wiring includes at least a Cu wiring and a Cu plug,
A barrier insulating film is provided on the Cu wiring,
The barrier insulating film is provided with one opening that reaches the two Cu wirings,
One of the Cu wirings also serves as the second electrode,
A first electrode is provided on the second electrode with a barrier insulating film interposed therebetween,
The first electrode is electrically connected to the Cu plug;
An ion conductive layer capable of moving metal ions by an electric field is in contact with the side surfaces of the first electrode and the second electrode and another Cu wiring,
The Cu wiring of the multilayer wiring in contact with the ion conductive layer also serves as the third electrode,
A semiconductor device, wherein a barrier insulating film is provided on an upper surface of the ion conductive layer.
 (付記8)
 半導体基板上の多層配線層の内部にスイッチング素子を有する半導体装置であって、
 前記多層配線は、少なくとも、Cu配線とCuプラグを備え、
 前記Cu配線上にはバリア絶縁膜が設けられ、
 前記バリア絶縁膜には2つの前記Cu配線に達する開口部が1箇所設けられており、
 前記Cu配線の1つが第2電極を兼ね、
 前記Cuプラグの1つが第1電極を兼ね、
 前記第1電極と前記第2電極の側面ともう1つの前記Cu配線上に、電界によって金属イオンが移動可能なイオン伝導層が接し、
 該イオン伝導層に接した前記多層配線のCu配線が第3電極を兼ね、
 前記イオン伝導層の上面はバリア絶縁膜が設けられている
ことを特徴とする半導体装置。
(Appendix 8)
A semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate,
The multilayer wiring includes at least a Cu wiring and a Cu plug,
A barrier insulating film is provided on the Cu wiring,
The barrier insulating film is provided with one opening that reaches the two Cu wirings,
One of the Cu wirings also serves as the second electrode,
One of the Cu plugs also serves as the first electrode,
An ion conductive layer capable of moving metal ions by an electric field is in contact with the side surfaces of the first electrode and the second electrode and another Cu wiring,
The Cu wiring of the multilayer wiring in contact with the ion conductive layer also serves as the third electrode,
A semiconductor device, wherein a barrier insulating film is provided on an upper surface of the ion conductive layer.
 (付記9)
 半導体基板上の多層配線層の内部にスイッチング素子を有する半導体装置の製造方法であって、
 前記多層配線は、少なくとも、Cu配線とCuプラグを備え、
 前記Cu配線上にはバリア絶縁膜が設けられ、
 前記バリア絶縁膜には2つの前記Cu配線に達する開口部がそれぞれ1箇所ずつ設けられており、
 前記Cu配線の1つに前記スイッチング素子の第2電極が電気的に接続し、
 前記第2電極の上に絶縁膜を挟んで第1電極が設けられ、
 該第1電極は前記Cuプラグと電気的に接続し、
 前記第1電極と前記第2電極の側面ともう1つのCu配線上に電界によって金属イオンが移動可能なイオン伝導層が接し、
 該イオン伝導層に接した前記多層配線のCu配線が第3電極を兼ね、
 前記イオン伝導層の上面はバリア絶縁膜が設けられており、
 前記第3電極に接する前記バリア絶縁膜の開口部を開口する際、
 前記第2電極、前記絶縁膜および前記第1電極で構成された積層膜をマスクの一部として使用する
ことを特徴とする半導体装置の製造方法。
(Appendix 9)
A method of manufacturing a semiconductor device having a switching element inside a multilayer wiring layer on a semiconductor substrate,
The multilayer wiring includes at least a Cu wiring and a Cu plug,
A barrier insulating film is provided on the Cu wiring,
The barrier insulating film is provided with one opening each reaching the two Cu wirings,
A second electrode of the switching element is electrically connected to one of the Cu wirings;
A first electrode is provided on the second electrode with an insulating film interposed therebetween,
The first electrode is electrically connected to the Cu plug;
An ion conductive layer capable of moving metal ions by an electric field is in contact with side surfaces of the first electrode and the second electrode and another Cu wiring,
The Cu wiring of the multilayer wiring in contact with the ion conductive layer also serves as the third electrode,
A barrier insulating film is provided on the upper surface of the ion conductive layer,
When opening the opening of the barrier insulating film in contact with the third electrode,
A method of manufacturing a semiconductor device, wherein a laminated film composed of the second electrode, the insulating film, and the first electrode is used as a part of a mask.

Claims (10)

  1.  半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
     該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
     前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
     前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
     前記第2電極は、前記多層配線層を構成する第2のCu配線と電気的に接続されている、第2の金属膜の側壁部であり、
     前記金属架橋型スイッチング素子は、前記第1の金属膜と前記第2の金属膜との間に挟まれた絶縁膜を具え、
     前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2の金属膜の側壁部からなる第2電極は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接している
    ことを特徴とするスイッチング素子。
    A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
    The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
    The ion conductive layer is in contact with the first electrode and the second electrode,
    In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
    In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
    The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
    The second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
    The metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film,
    The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a laminated structure, and are formed on side surfaces of the laminated structure. The switching element, wherein the ion conductive layer is in contact.
  2.  前記金属架橋型スイッチング素子は、
     前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極を具えており、
     前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
     前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
     前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
    ことを特徴とする請求項1に記載のスイッチング素子。
    The metal bridge type switching element is
    A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
    The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
    The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
    In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3. The bias difference | V 2 −V 1 | between the second electrode and the first electrode is different from the bias difference | V 3 −V 1 | between the third electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. The switching element according to claim 1, wherein the switching element is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode by setting V 1 |. .
  3.  半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
     該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
     前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
     前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
     前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
     前記金属架橋型スイッチング素子は、
     前記第1の金属膜と第2のCu配線との間に挟まれた絶縁膜を具え、
     前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
     前記金属架橋型スイッチング素子は、
     前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
     前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
     前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
     前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
    ことを特徴とするスイッチング素子。
    A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
    The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
    The ion conductive layer is in contact with the first electrode and the second electrode,
    In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
    In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
    The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
    The second electrode is a second Cu wiring constituting the multilayer wiring layer,
    The metal bridge type switching element is
    Comprising an insulating film sandwiched between the first metal film and the second Cu wiring;
    The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second Cu wiring form a laminated structure, and the ion conductive layer is in contact with the side surface of the laminated structure. There;
    The metal bridge type switching element is
    A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
    The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
    The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
    In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively. The bias difference | V 2 −V 1 | between the second electrode and the first electrode is different from the bias difference | V 3 −V 1 | between the third electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. A switching element, which is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode by setting V 1 |.
  4.  少なくとも、前記イオン伝導層に接している、前記第1の金属膜の側壁部は、凸型の曲率を有している
    ことを特徴とする請求項1~3のいずれか一項に記載のスイッチング素子。
    The switching according to any one of claims 1 to 3, wherein at least a side wall portion of the first metal film that is in contact with the ion conductive layer has a convex curvature. element.
  5.  半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子であって、
     該抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
     前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
     前記第1電極は、前記多層配線層を構成する第1のCu配線と電気的に接続されている第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部であり、
     前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
     前記金属架橋型スイッチング素子は、
     前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの底面と第2のCu配線との間に挟まれた絶縁膜を具え、
     前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
     前記金属架橋型スイッチング素子は、
     前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
     前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
     前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
     前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
    ことを特徴とするスイッチング素子。
    A variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
    The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
    The ion conductive layer is in contact with the first electrode and the second electrode,
    In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
    In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
    The first electrode is a side wall portion of a barrier metal that covers a bottom portion and a side wall surface of a first Cu plug electrically connected to a first Cu wiring constituting the multilayer wiring layer,
    The second electrode is a second Cu wiring constituting the multilayer wiring layer,
    The metal bridge type switching element is
    An insulating film sandwiched between a bottom surface of a barrier metal covering the bottom and side wall surfaces of the first Cu plug and a second Cu wiring;
    The first electrode composed of a barrier metal sidewall covering the bottom and sidewall surfaces of the first Cu plug, the sidewall of the insulating film, and the second Cu wiring form a stacked structure, and the stacked structure The ion conductive layer is in contact with a side surface;
    The metal bridge type switching element is
    A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
    The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
    The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
    In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3. The bias difference | V 2 −V 1 | between the second electrode and the first electrode is different from the bias difference | V 3 −V 1 | between the third electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. A switching element, which is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode by setting V 1 |.
  6.  前記イオン伝導層の上面が、前記金属イオンを遮断するイオンバリア層で覆われている
    ことを特徴とする請求項1~5のいずれか一項に記載のスイッチング素子。
    The switching element according to any one of claims 1 to 5, wherein an upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions.
  7.  半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
     前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
     前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
     前記第1電極は、前記多層配線層を構成する第1のCuプラグならびに第1のCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
     前記第2電極は、前記多層配線層を構成する第2のCu配線と電気的に接続されている、第2の金属膜の側壁部であり、
     前記金属架橋型スイッチング素子は、前記第1の金属膜と前記第2の金属膜との間に挟まれた絶縁膜を具え、
     前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2の金属膜の側壁部からなる第2電極は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており、
     前記イオン伝導層の上面は、前記金属イオンを遮断するイオンバリア層で覆われている
    ことを特徴とする半導体装置。
    A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
    The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
    The ion conductive layer is in contact with the first electrode and the second electrode,
    In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
    In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
    The first electrode is a side wall portion of a first metal film electrically connected to a first Cu plug and a first Cu wiring constituting the multilayer wiring layer;
    The second electrode is a side wall portion of a second metal film electrically connected to a second Cu wiring constituting the multilayer wiring layer;
    The metal bridge type switching element includes an insulating film sandwiched between the first metal film and the second metal film,
    The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second electrode composed of the side wall portion of the second metal film form a stacked structure, and are formed on the side surfaces of the stacked structure. , The ion conductive layer is in contact,
    The semiconductor device according to claim 1, wherein an upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions.
  8.  前記金属架橋型スイッチング素子は、
     前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極を具えており、
     前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
     前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
     前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
    ことを特徴とする請求項7に記載の半導体装置。
    The metal bridge type switching element is
    A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
    The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
    The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
    In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3. The bias difference | V 2 −V 1 | between the second electrode and the first electrode is different from the bias difference | V 3 −V 1 | between the third electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. The semiconductor device according to claim 7, wherein the semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode by setting V 1 |. .
  9.  半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
     前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
     前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
     前記第1電極は、前記多層配線層を構成する第1のCuプラグもしくはCu配線と電気的に接続されている、第1の金属膜の側壁部であり、
     前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
     前記金属架橋型スイッチング素子は、
     前記第1の金属膜と第2のCu配線との間に挟まれた絶縁膜を具え、
     前記第1の金属膜の側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
     前記金属架橋型スイッチング素子は、
     前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
     前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
     前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
     前記イオン伝導層の上面は、前記金属イオンを遮断するイオンバリア層で覆われており;
     前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
    ことを特徴とする半導体装置。
    A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
    The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
    The ion conductive layer is in contact with the first electrode and the second electrode,
    In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
    In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
    The first electrode is a side wall portion of a first metal film that is electrically connected to a first Cu plug or Cu wiring constituting the multilayer wiring layer,
    The second electrode is a second Cu wiring constituting the multilayer wiring layer,
    The metal bridge type switching element is
    Comprising an insulating film sandwiched between the first metal film and the second Cu wiring;
    The first electrode composed of the side wall portion of the first metal film, the side wall portion of the insulating film, and the second Cu wiring form a laminated structure, and the ion conductive layer is in contact with the side surface of the laminated structure. There;
    The metal bridge type switching element is
    A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
    The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
    The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
    An upper surface of the ion conductive layer is covered with an ion barrier layer that blocks the metal ions;
    In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively. The bias difference | V 2 −V 1 | between the second electrode and the first electrode is different from the bias difference | V 3 −V 1 | between the third electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. The semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode by setting V 1 |.
  10.  半導体基板上に形成される多層配線層内に設けられる抵抗変化型不揮発性スイッチング素子を具えてなる半導体装置であって、
     前記抵抗変化型不揮発性スイッチング素子は、少なくとも、第1電極、第2電極と、電界によって金属イオンが移動可能なイオン伝導層を具え、
     前記イオン伝導層は、前記第1電極と前記第2電極に接しており、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記第1電極と第2電極の間に信号の伝達経路となる、金属架橋の形成がなされることにより、該スイッチング素子はON状態となり、
     前記第1電極と前記第2電極に接する、該イオン伝導層中において、前記金属架橋の溶解がなされ、前記第1電極と第2電極の間に信号の伝達経路が切断されることにより、該スイッチング素子はOFF状態となる、金属架橋型スイッチング素子を構成しており;
     前記第1電極は、前記多層配線層を構成する第1のCu配線と電気的に接続されている第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部であり、
     前記第2電極は、前記多層配線層を構成する第2のCu配線であり、
     前記金属架橋型スイッチング素子は、
     前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの底面と第2のCu配線との間に挟まれた絶縁膜を具え、
     前記第1のCuプラグの底部と側壁面を被覆するバリアメタルの側壁部からなる第1電極、前記絶縁膜の側壁部、前記第2のCu配線は、積層構造を形成し、該積層構造の側面に、前記イオン伝導層が接しており;
     前記金属架橋型スイッチング素子は、
     前記イオン伝導層に接し、金属イオンを前記イオン伝導層中に供給する、第3電極をさらに具えており、
     前記第3電極は、前記多層配線層を構成する第3のCu配線で構成されており、
     前記第3のCu配線に前記イオン伝導層が接し、金属イオンの供給がなされる部位は、前記第3のCu配線の上面に選択されており、
     前記金属架橋型スイッチング素子における、ON状態とOFF状態の間のスイッチング動作は、前記第1電極を電位V1に、第2電極を電位V2に、前記第3電極を電位V3にそれぞれバイアスし、前記第2電極と前記第1電極の間にバイアス差|V2-V1|に対して、前記第3電極と前記第1電極の間にバイアス差|V3-V1|、前記第3電極と前記第2電極の間にバイアス差|V3-V2|を、|V3-V2|>|V2-V1|、|V3-V1|>|V2-V1|と設定することにより、前記第1電極、第2電極と、前記第3電極の間に、スイッチング電圧を印加することにより実施される
    ことを特徴とする半導体装置。
    A semiconductor device comprising a variable resistance nonvolatile switching element provided in a multilayer wiring layer formed on a semiconductor substrate,
    The variable resistance nonvolatile switching element includes at least a first electrode, a second electrode, and an ion conductive layer capable of moving metal ions by an electric field,
    The ion conductive layer is in contact with the first electrode and the second electrode,
    In the ion conductive layer that is in contact with the first electrode and the second electrode, a metal bridge is formed between the first electrode and the second electrode to form a signal transmission path, whereby the switching element is formed. Is turned on,
    In the ion conductive layer in contact with the first electrode and the second electrode, the metal bridge is dissolved, and a signal transmission path is cut between the first electrode and the second electrode. The switching element constitutes a metal bridge type switching element that is in an OFF state;
    The first electrode is a side wall portion of a barrier metal that covers a bottom portion and a side wall surface of a first Cu plug electrically connected to a first Cu wiring constituting the multilayer wiring layer,
    The second electrode is a second Cu wiring constituting the multilayer wiring layer,
    The metal bridge type switching element is
    An insulating film sandwiched between a bottom surface of a barrier metal covering the bottom and side wall surfaces of the first Cu plug and a second Cu wiring;
    The first electrode composed of a barrier metal sidewall covering the bottom and sidewall surfaces of the first Cu plug, the sidewall of the insulating film, and the second Cu wiring form a stacked structure, and the stacked structure The ion conductive layer is in contact with a side surface;
    The metal bridge type switching element is
    A third electrode in contact with the ion conductive layer and supplying metal ions into the ion conductive layer;
    The third electrode is composed of a third Cu wiring constituting the multilayer wiring layer,
    The portion where the ion conductive layer is in contact with the third Cu wiring and the supply of metal ions is selected on the upper surface of the third Cu wiring,
    In the metal bridge type switching element, the switching operation between the ON state and the OFF state is performed by biasing the first electrode to the potential V 1 , the second electrode to the potential V 2 , and the third electrode to the potential V 3 , respectively. The bias difference | V 2 −V 1 | between the second electrode and the first electrode is different from the bias difference | V 3 −V 1 | between the third electrode and the first electrode, The bias difference | V 3 −V 2 | between the third electrode and the second electrode is changed to | V 3 −V 2 |> | V 2 −V 1 |, | V 3 −V 1 |> | V 2 −. The semiconductor device is implemented by applying a switching voltage between the first electrode, the second electrode, and the third electrode by setting V 1 |.
PCT/JP2013/063248 2012-09-28 2013-05-13 Switching element and method for manufacturing same WO2014050198A1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014538223A JPWO2014050198A1 (en) 2012-09-28 2013-05-13 Switching element and method for manufacturing switching element

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012-217319 2012-09-28
JP2012217319 2012-09-28

Publications (1)

Publication Number Publication Date
WO2014050198A1 true WO2014050198A1 (en) 2014-04-03

Family

ID=50387617

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2013/063248 WO2014050198A1 (en) 2012-09-28 2013-05-13 Switching element and method for manufacturing same

Country Status (2)

Country Link
JP (1) JPWO2014050198A1 (en)
WO (1) WO2014050198A1 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004266167A (en) * 2003-03-03 2004-09-24 Sharp Corp Nonvolatile memory element, nonvolatile memory circuit, nonvolatile memory card, and recorder/reproducer
JP2006339667A (en) * 2003-07-18 2006-12-14 Nec Corp Switching element, rewritable logic integrated circuit and memory element
JP2011517855A (en) * 2008-04-11 2011-06-16 サンディスク スリーディー,エルエルシー Side wall structured switchable resistor cell
JP2011211165A (en) * 2010-03-12 2011-10-20 Nec Corp Semiconductor device, and method for manufacturing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004266167A (en) * 2003-03-03 2004-09-24 Sharp Corp Nonvolatile memory element, nonvolatile memory circuit, nonvolatile memory card, and recorder/reproducer
JP2006339667A (en) * 2003-07-18 2006-12-14 Nec Corp Switching element, rewritable logic integrated circuit and memory element
JP2011517855A (en) * 2008-04-11 2011-06-16 サンディスク スリーディー,エルエルシー Side wall structured switchable resistor cell
JP2011211165A (en) * 2010-03-12 2011-10-20 Nec Corp Semiconductor device, and method for manufacturing the same

Also Published As

Publication number Publication date
JPWO2014050198A1 (en) 2016-08-22

Similar Documents

Publication Publication Date Title
JP6428860B2 (en) Switching element and method for manufacturing switching element
US9893276B2 (en) Switching element, switching element manufacturing method, semiconductor device, and semiconductor device manufacturing method
US10312288B2 (en) Switching element, semiconductor device, and semiconductor device manufacturing method
JP6665776B2 (en) Switching element and method of manufacturing switching element
WO2010079827A1 (en) Semiconductor device and manufacturing method therefor
US9059402B2 (en) Resistance-variable element and method for manufacturing the same
JP5895932B2 (en) Resistance change element, semiconductor device including the same, and manufacturing method thereof
WO2016203751A1 (en) Rectifying element, switching element, and method for manufacturing rectifying element
WO2013103122A1 (en) Switching element and manufacturing method thereof
JP5999768B2 (en) Semiconductor device and manufacturing method thereof
JP2011211165A (en) Semiconductor device, and method for manufacturing the same
JP5493703B2 (en) Switching element and semiconductor device using the switching element
US10923534B2 (en) Rectifying element and switching element having the rectifying element
JP5807789B2 (en) Switching element, semiconductor device and manufacturing method thereof
US10693467B2 (en) Switch circuit, semiconductor device using same, and switching method
WO2014050198A1 (en) Switching element and method for manufacturing same
US20210050517A1 (en) Semiconductor device
WO2016157820A1 (en) Switching element, semiconductor device, and method for manufacturing switching element
JP7498963B2 (en) Switching element and method for manufacturing same
JP2014216386A (en) Resistance change element and formation method therefor
JP2019047003A (en) Resistance change element, semiconductor device and manufacturing method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13842449

Country of ref document: EP

Kind code of ref document: A1

ENP Entry into the national phase

Ref document number: 2014538223

Country of ref document: JP

Kind code of ref document: A

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13842449

Country of ref document: EP

Kind code of ref document: A1