WO2014048014A1 - High-efficiency and high-voltage led chip - Google Patents

High-efficiency and high-voltage led chip Download PDF

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WO2014048014A1
WO2014048014A1 PCT/CN2012/084507 CN2012084507W WO2014048014A1 WO 2014048014 A1 WO2014048014 A1 WO 2014048014A1 CN 2012084507 W CN2012084507 W CN 2012084507W WO 2014048014 A1 WO2014048014 A1 WO 2014048014A1
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light
voltage led
type gan
led chip
units
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赵鸿悦
华斌
孙智江
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海迪科(苏州)光电科技有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

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Abstract

A high-efficiency and high-voltage LED chip, comprising a substrate, and an N-type GaN limiting layer, an epitaxial light-emitting layer and a P-type GaN limiting layer formed on the substrate in sequence, wherein a plurality of independent pattern units distributed in an array are etched and isolated on the N-type GaN limiting layer, the epitaxial light-emitting layer and the P-type GaN limiting layer; the pattern unit thereof located in the middle is triangular; the pattern units located at both sides are trapezoidal so as to form a quadrangle overall; and each pattern unit is connected through a conducting material to form a series connection and/or a parallel connection. Compared with the prior art, each unit pattern in an LED in the present invention is a triangle which is more beneficial for the light emission of a sidewall, so as to significantly improve the light emitting efficiency of a chip; and the light-emitting area of different units is uniform, thereby avoiding the problems of different light-emitting efficiencies, and different generated heat, etc. which are caused by different current densities between a plurality of units. The present device has the characteristics of a high light-emitting rate, uniform light and heat emitted in a chip and high stability, has better reliability and is more suitable for the field of application of high-voltage LEDs.

Description

高效高压LED芯片  High efficiency high voltage LED chip
技术领域  Technical field
本发明属于光电子发光器件制造领域,特别描述了一种高效高压LED芯片。The invention belongs to the field of manufacturing optoelectronic light-emitting devices, and particularly describes a high-efficiency high-voltage LED chip.
背景技术Background technique
随着以GaN(氮化镓)材料P型掺杂的突破为起点的第三代半导体材料的兴起,伴随着以Ⅲ族氮化物为基础的高亮度发光二级管(Light Emitting Diode,LED)的技术突破,用于新一代绿色环保固体照明光源的氮化物LED正在成为新的研究热点。目前,LED应用的不断升级以及市场对于LED的需求,使得LED正朝着大功率和高亮度的方向发展。其中研究热点之一是高压直流LED技术,它是采用多颗芯片组成一个总发光二极管形式,即多颗LED串联形成一个LED。目前高压LED技术属于新兴技术范畴,其技术存在一些问题:LED芯片的出光效率有待提升,多颗芯片的发光面积差别大,电流密度差别较大。LED芯片出光效率低的主要原因之一是外延材料的折射率远大于空气折射率,而传统的高压直流LED芯片的图形往往采用矩形单元的布局(附图1),矩形芯片的侧面光取出角度很小,从而使有源区产生的光由于全内反射不能从LED中有效的发射出去,导致LED的外量子效率很低。以GaN基LED为例,GaN的折射率为2.5,临界角为23.6°,即只有入射角小于23.6°的光子才能逃逸出LED,其余光子发生全反射最终为LED吸收。对于AlGaInP系LED,GaP的折射率为3.4,临界角仅为17°。With the rise of third-generation semiconductor materials starting from the breakthrough of P-type doping of GaN (gallium nitride) materials, along with III-nitride-based high-brightness light-emitting diodes (Light) Emitting Diode, LED) technology breakthrough, nitride LED for a new generation of green solid-state lighting sources is becoming a new research hotspot. At present, the continuous upgrading of LED applications and the market demand for LEDs make LEDs develop in the direction of high power and high brightness. One of the research hotspots is high-voltage DC LED technology, which uses a plurality of chips to form a total light-emitting diode form, that is, multiple LEDs are connected in series to form one LED. At present, high-voltage LED technology belongs to the emerging technology category, and its technology has some problems: the light-emitting efficiency of LED chips needs to be improved, the difference in light-emitting area of multiple chips is large, and the current density is greatly different. One of the main reasons for the low light-emitting efficiency of LED chips is that the refractive index of epitaxial materials is much larger than that of air. The pattern of conventional high-voltage DC LED chips often adopts the layout of rectangular cells (Fig. 1). It is so small that the light generated by the active region cannot be efficiently emitted from the LED due to total internal reflection, resulting in a low external quantum efficiency of the LED. Taking GaN-based LEDs as an example, GaN has a refractive index of 2.5 and a critical angle of 23.6°, that is, only photons with an incident angle of less than 23.6° can escape from the LED, and the remaining photons are totally reflected and finally absorbed by the LED. For AlGaInP-based LEDs, GaP has a refractive index of 3.4 and a critical angle of only 17°.
发明内容Summary of the invention
本实用新型旨在提供一种增强芯片侧面的光取出效率,提升LED整体的出光效率的高效高压LED芯片。The utility model aims to provide a high-efficiency high-voltage LED chip which enhances the light extraction efficiency on the side of the chip and improves the light extraction efficiency of the LED as a whole.
为实现上述目的,本实用新型的技术方案提供了一种高效高压LED芯片,包括衬底、依次形成在所述的衬底上的N型GaN限制层、外延发光层和P型GaN限制层,所述的N型GaN限制层、外延发光层和P型GaN限制层上蚀刻隔离出多个独立的呈阵列分布的图形单元,其每个所述的图形单元呈三角形并且整体上构成四边形结构,每个图形单元由导电材料连结形成串联和/或并联。 To achieve the above object, the technical solution of the present invention provides a high-efficiency high-voltage LED chip including a substrate, an N-type GaN confinement layer, an epitaxial light-emitting layer, and a P-type GaN confinement layer sequentially formed on the substrate. The N-type GaN confinement layer, the epitaxial light-emitting layer and the P-type GaN confinement layer are etched to isolate a plurality of independent pattern units arranged in an array, each of the graphic units being triangular and integrally forming a quadrilateral structure. Each of the graphic units is joined by a conductive material to form a series and/or a parallel.
优选地,位于所述的阵列中部的图形单元呈三角形,而位于所述的阵列两侧的图形单元呈近似的直角三角形以整体上构成四边形结构。Preferably, the graphic elements located in the middle of the array are triangular, and the graphic elements located on both sides of the array are approximately right-angled triangles to form a quadrilateral structure as a whole.
优选地,各个所述的图形单元的发光面积相等。Preferably, the illumination areas of the respective said graphic units are equal.
优选地,各个所述的图形单元的电流密度相一致。 Preferably, the current densities of the respective graphic elements are identical.
优选地,各个所述的图形单元的之间呈平行排列或者对角排列。Preferably, each of the graphic units is arranged in parallel or diagonally.
优选地,所述的P型GaN限制层表面覆盖有绝缘材料。Preferably, the surface of the P-type GaN confinement layer is covered with an insulating material.
优选地,各个所述的图形单元的P型电极下方设置有电流阻挡层。Preferably, a current blocking layer is disposed under the P-type electrode of each of the graphic units.
优选地,每个所述的图形单元串联和/或并联后高电压LED或高直流电流LED,或者每个所述的图形单元按桥式电路连接后形成交流高压LED。Preferably, each of the graphic units is connected in series and/or in parallel with a high voltage LED or a high DC current LED, or each of the graphic units is connected by a bridge circuit to form an alternating current high voltage LED.
优选地,所述外延发光层包括蓝光、绿光或红光发光层。Preferably, the epitaxial luminescent layer comprises a blue, green or red luminescent layer.
与现有技术相比,本发明的LED中各单元图形为更利于侧壁出光的三角形,显著提升了芯片的出光效率;不同单元的发光面积均匀,避免了多颗单元间电流密度不同导致的发光效率不同、产生热量不同等问题。本器件具有出光率高、芯片内部发光发热均匀,稳定性高的特点,具有更好的可靠性,更加适合于高压LED的运用领域。Compared with the prior art, each unit pattern of the LED of the present invention is a triangle which is more advantageous for the sidewall light to be emitted, which significantly improves the light extraction efficiency of the chip; the illumination area of different units is uniform, and the current density difference between the plurality of units is avoided. Problems such as different luminous efficiencies and different heat generation. The device has the characteristics of high light extraction rate, uniform illumination and heat generation inside the chip, high stability, better reliability, and is more suitable for the application field of high voltage LED.
附图说明DRAWINGS
图1是现有高压LED矩形单元的示意图;1 is a schematic view of a conventional high voltage LED rectangular unit;
图2是根据本实用新型的高效高压LED的三角形单元的示意图;2 is a schematic view of a triangular unit of a high efficiency high voltage LED in accordance with the present invention;
图3是根据本实用新型的方案一中各单元分别为平行排列的顶视图;Figure 3 is a top plan view of the units arranged in parallel according to the first embodiment of the present invention;
图4是根据本实用新型的方案二中各单元分别为对角排列的顶视图。Figure 4 is a top plan view of each of the units in the second embodiment of the present invention in a diagonal arrangement.
具体实施方式detailed description
下面结合附图对本实用新型的较佳实施例进行详细阐述,以使本实用新型的优点和特征能更易于被本领域技术人员理解,从而对本实用新型的保护范围做出更为清楚明确的界定。The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so that the scope of protection of the present invention is more clearly and clearly defined. .
参见附图2与附图3所示,实施例一中的高效高压LED芯片,包括衬底、依次形成在衬底上的N型GaN限制层、外延发光层和P型GaN限制层,外延发光层包括蓝光、绿光或红光发光层,N型GaN限制层、外延发光层和P型GaN限制层上蚀刻隔离出多个独立的呈阵列分布的图形单元,其位于中部的图形单元呈三角形,而位于两侧的图形单元呈直角三角形以整体上构成四边形,各个图形单元的之间呈平行排列,或者对角排列(如附图4所示)或其他各种可能的排列方式,每个图形单元由导电材料连结形成串联和/或并联。其制备工艺包括如下步骤:Referring to FIG. 2 and FIG. 3, the high-efficiency high-voltage LED chip of the first embodiment includes a substrate, an N-type GaN confinement layer sequentially formed on the substrate, an epitaxial light-emitting layer, and a P-type GaN confinement layer, and epitaxial emission. The layer comprises a blue light, a green light or a red light emitting layer, and the N-type GaN limiting layer, the epitaxial light emitting layer and the P-type GaN limiting layer are etched to isolate a plurality of independent graphic units arranged in an array, wherein the graphic unit in the middle is triangular And the graphic units on both sides are right-angled triangles to form a quadrilateral as a whole, and the graphic units are arranged in parallel, or diagonally arranged (as shown in FIG. 4) or various other possible arrangements, each The graphic elements are joined by a conductive material to form a series and/or parallel connection. The preparation process comprises the following steps:
a) 提供一衬底,所述衬底上依次形成有N型GaN限制层、外延发光层和P型GaN限制层;a) providing a substrate on which an N-type GaN confinement layer, an epitaxial light-emitting layer, and a P-type GaN confinement layer are sequentially formed;
b) 通过光刻结合蚀刻工艺将衬底上的N型GaN限制层、外延发光层和P型GaN限制层隔离出至少两个以上的独立图形单元,其大部分的图形单元呈三角形,而两侧图形单元呈梯形,所有的图形单元呈阵列分布并整体上构成四边形;b) The N-type GaN confinement layer, the epitaxial light-emitting layer and the P-type GaN confinement layer on the substrate are separated by at least two independent graphic units by a photolithography combined etching process, and most of the graphic elements are triangular, and the two sides are patterned The unit is trapezoidal, and all the graphic units are arranged in an array and form a quadrangle as a whole;
c) 将每个图形单元由金属线连结形成串联和/或并联,由此形成互联的多个LED。c) Joining each of the graphic units by metal wires in series and/or in parallel, thereby forming a plurality of interconnected LEDs.
优选地,各个图形单元的发光面积相等,各个图形单元的电流密度相一致;进一步的,所有芯片单元串联则形成高压直流LED;也可以是将一行单元串联,而将各行并联,形成高直流电流LED;也可以将单元按桥式电路连接,形成交流高压LED;其电路排布式在此不再详细描述。Preferably, the illumination areas of the respective graphics units are equal, and the current densities of the respective graphics units are consistent; further, all the chip units are connected in series to form a high voltage direct current LED; or a row of cells may be connected in series, and the rows are connected in parallel to form a high DC current. LED; the unit can also be connected by bridge circuit to form an AC high voltage LED; the circuit arrangement is not described in detail here.
作为本发明进一步的改进,制备绝缘材料覆盖于芯片表面以保护芯片和增加芯片光提取效率。 制备绝缘材料填充于刻蚀至衬底的深沟并作为掩膜,使GaN侧面得到保护防止漏电,利用光刻的方法制备图形并作为掩膜,并将深沟以外的部分利用化学或物理的方法去除掉使GaN暴露出便于下一步骤的加工。制备绝缘材料覆盖于芯片表面,利用光刻的方法制备图形并作为掩膜,将除打线盘以外的部分保护起来,减少由外来物导致的漏电情况并利用透射原理增加芯片光提取效率。出于改善电流分布以提高器件发光效率的目的,本发明还于各单元的P型电极下方设置了电流阻挡层。As a further improvement of the present invention, an insulating material is prepared to cover the surface of the chip to protect the chip and increase the light extraction efficiency of the chip. The insulating material is prepared to be filled in a deep trench etched to the substrate and used as a mask to protect the side of the GaN from leakage, to form a pattern by photolithography and as a mask, and to utilize chemical or physical portions other than the deep trench. The method removes the processing that exposes the GaN for the next step. The insulating material is prepared to cover the surface of the chip, and the pattern is prepared by photolithography and used as a mask to protect parts other than the wire reel, reduce leakage caused by foreign objects, and increase the light extraction efficiency of the chip by using the transmission principle. For the purpose of improving the current distribution to improve the luminous efficiency of the device, the present invention also provides a current blocking layer under the P-type electrode of each unit.
与现有技术相比,本发明的LED中各单元图形为更利于侧壁出光的三角形,显著提升了芯片的出光效率;不同单元的发光面积均匀,避免了多颗单元间电流密度不同导致的发光效率不同、产生热量不同等问题。本器件具有出光率高、芯片内部发光发热均匀,稳定性高的特点,具有更好的可靠性,更加适合于高压LED的运用领域。Compared with the prior art, each unit pattern of the LED of the present invention is a triangle which is more advantageous for the sidewall light to be emitted, which significantly improves the light extraction efficiency of the chip; the illumination area of different units is uniform, and the current density difference between the plurality of units is avoided. Problems such as different luminous efficiencies and different heat generation. The device has the characteristics of high light extraction rate, uniform illumination and heat generation inside the chip, high stability, better reliability, and is more suitable for the application field of high voltage LED.
以上实施方式只为说明本实用新型的技术构思及特点,其目的在于让熟悉此项技术的人了解本实用新型的内容并加以实施,并不能以此限制本实用新型的保护范围,凡根据本实用新型精神实质所做的等效变化或修饰,都应涵盖在本实用新型的保护范围内。 The above embodiments are merely illustrative of the technical concept and the features of the present invention. The purpose of the present invention is to understand the contents of the present invention and to implement the present invention. Equivalent changes or modifications made to the spirit of the utility model are intended to be covered by the scope of the present invention.

Claims (9)

1. 一种高效高压LED芯片,包括 衬底、依次形成在所述的衬底上的 N 型 GaN 限制层、外延发光层和 P 型 GaN 限制层, 其特征在于: 所述的 N 型 GaN 限制层、外延发光层和 P 型 GaN 限制层上蚀刻隔离出多个独立的呈阵列分布的图形单元,其每个所述的图形单元呈三角形并且整体上构成四边形结构,每个图形单元由导电材料连结形成串联和 / 或并联。 A high-efficiency high-voltage LED chip comprising a substrate, an N-type GaN confinement layer sequentially formed on the substrate, an epitaxial light-emitting layer, and a P-type GaN a confinement layer characterized by: the N-type GaN confinement layer, the epitaxial light-emitting layer, and the P-type GaN The limiting layer is etched to isolate a plurality of independent graphic units distributed in an array, each of the graphic units being triangular and integrally forming a quadrilateral structure, each of the graphic units being connected by a conductive material to form a series and / Or in parallel.
2. 根据权利1所述的高效高压LED芯片,其特征在于: 位于所述的阵列中部的图形单元呈三角形,而位于所述的阵列两侧的图形单元呈近似的直角三角形以整体上构成四边形结构。2. The high efficiency high voltage LED chip of claim 1 wherein: The graphic elements located in the middle of the array are triangular, and the graphic elements located on both sides of the array have an approximately right-angled triangle to form a quadrilateral structure as a whole.
3. 根据权利1所述的高效高压LED芯片,其特征在于: 各个所述的图形单元的发光面积相等。3. The high-efficiency high-voltage LED chip according to claim 1, wherein: each of said graphic units has an equal light-emitting area.
4. 根据权利2所述的高效高压LED芯片,其特征在于: 各个所述的图形单元的电流密度相一致。4. The high-efficiency high-voltage LED chip according to claim 2, wherein the current density of each of the graphic units is identical.
5. 根据权利1所述的高效高压LED芯片,其特征在于:各个所述的 图形单元的之间呈平行排列或者对角排列。5. The high efficiency high voltage LED chip of claim 1 wherein each of said The graphic elements are arranged in parallel or diagonally.
6. 根据权利1所述的高效高压LED芯片,其特征在于: 所述的 P 型 GaN 限制层表面覆盖有绝缘材料。6. The high efficiency high voltage LED chip according to claim 1, wherein: said P-type GaN The surface of the confinement layer is covered with an insulating material.
7. 根据权利1所述的高效高压LED芯片,其特征在于: 各个所述的图形单元的 P 型电极下方设置有电流阻挡层。7. The high-efficiency high-voltage LED chip according to claim 1, wherein: P of each of said graphic units A current blocking layer is disposed under the type electrode.
8. 根据权利1所述的高效高压LED芯片,其特征在于: 每个所述的图形单元串联和 / 或并联后形成高电压 LED 或高直流电流 LED ,或者每个所述的图形单元按桥式电路连接后形成交流高压 LED 。8. The high efficiency high voltage LED chip according to claim 1, wherein: each of said graphic units is connected in series and/or in parallel to form a high voltage LED Or a high DC current LED, or each of the graphics units connected in a bridge circuit to form an AC high voltage LED.
9. 根据权利1所述的高效高压LED芯片,其特征在于: 所述外延发光层包括蓝光、绿光或红光发光层。9. The high efficiency high voltage LED chip of claim 1 wherein: The epitaxial luminescent layer comprises a blue, green or red luminescent layer.
PCT/CN2012/084507 2012-09-29 2012-11-13 High-efficiency and high-voltage led chip WO2014048014A1 (en)

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CN104183677B (en) * 2013-05-21 2018-03-06 上海蓝光科技有限公司 A kind of light emitting diode and its manufacture method
CN105023982B (en) * 2014-04-23 2018-11-09 中国科学院苏州纳米技术与纳米仿生研究所 LED chip and LED light emitting device

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CN101345274A (en) * 2007-07-11 2009-01-14 中国科学院半导体研究所 Method for improving luminous efficiency of GaN based LED by using graphic underlay
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CN1767222A (en) * 2004-10-28 2006-05-03 国联光电科技股份有限公司 Light emitting diode and process for producing the same
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