WO2014015617A1 - Substrat de réseau et dispositif d'affichage - Google Patents

Substrat de réseau et dispositif d'affichage Download PDF

Info

Publication number
WO2014015617A1
WO2014015617A1 PCT/CN2012/086228 CN2012086228W WO2014015617A1 WO 2014015617 A1 WO2014015617 A1 WO 2014015617A1 CN 2012086228 W CN2012086228 W CN 2012086228W WO 2014015617 A1 WO2014015617 A1 WO 2014015617A1
Authority
WO
WIPO (PCT)
Prior art keywords
array
array substrate
electrode
gate
groove
Prior art date
Application number
PCT/CN2012/086228
Other languages
English (en)
Chinese (zh)
Inventor
孙双
Original Assignee
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京东方科技集团股份有限公司 filed Critical 京东方科技集团股份有限公司
Publication of WO2014015617A1 publication Critical patent/WO2014015617A1/fr

Links

Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136222Colour filters incorporated in the active matrix substrate

Definitions

  • Embodiments of the present invention relate to an array substrate and a display device. Background technique
  • TFT-LCDs Thin film transistor liquid crystal displays
  • a liquid crystal display device of the prior art generally includes an array substrate, a color filter substrate, and a liquid crystal filled between the two substrates.
  • the array substrate may include gate lines, data lines, thin film transistors, and pixel electrodes.
  • the color filter substrate may include a black matrix, a colored resin layer, and a transparent conductive layer. The electric field is applied to the liquid crystal molecules through the pixel electrode and the transparent conductive layer, thereby achieving deflection of the liquid crystal molecules.
  • the prior art prepares a liquid crystal display device by forming an array substrate on one sheet of glass and forming a color film substrate on another sheet of glass, and finally placing the two substrates on the cassette and injecting a liquid crystal therebetween.
  • the array substrate and the color film substrate are not flat, and there are step regions, so that there are many bad phenomena after the box is on the other hand; on the other hand, the process is improved to reduce the step region, to a certain extent.
  • the thickness of the substrate is increased, which hinders the development of the liquid crystal display in the direction of thinning. Summary of the invention
  • the display device can eliminate the step region caused by the surface unevenness of the array substrate and the color filter substrate and does not increase the thickness of the liquid crystal display device.
  • Embodiments of the present invention provide an array substrate including a color film and an array formed on a substrate, the array being located above the color film.
  • the color film may include a color resin layer formed on the base substrate, and a transparent layer formed over the color resin layer, the array may include a gate line, a thin film transistor, and a pixel electrode, and the groove may be disposed in the transparent layer At the surface, the gate of the thin film transistor can be located in the recess.
  • the color film may further include a black matrix between the colored resin layers, and the grooves may be located above and opposite to the black matrix.
  • the depth, width and length of the groove can be respectively related to the thickness, width and width of the gate The lengths are equal.
  • the shape of the groove may be the same as the overall shape of the gate line and the gate, and the depth of the groove may be equal to the thickness of the gate line and the gate.
  • the array may further comprise a common electrode, and the common electrode may be located below the pixel electrode.
  • the common electrode may be located in another recess formed in the transparent layer and in the same horizontal plane as the gate.
  • the array may further comprise a common electrode, and the common electrode may be located above the pixel electrode.
  • the electrode located above the common electrode and the pixel electrode is a slit electrode.
  • the colored resin layer may include a red resin, a green resin, and a blue resin.
  • the transparent layer may utilize an acrylic material.
  • the present invention also provides a display device comprising the array substrate as described above.
  • the array substrate provided by the above technical solution, by arranging the array on the color film and forming a groove in the transparent layer of the color film to set the gate and/or the gate line of the array in the groove, not only the array substrate but also the gate line can be disposed in the groove.
  • the overall thickness of the liquid crystal display device is reduced to make it thinner and lighter; the flatness of the liquid crystal display device can also be increased, so that some display defects of the liquid crystal display device can be reduced.
  • FIG. 1 is a schematic structural view of a liquid crystal display device according to a first embodiment of the present invention
  • FIG. 2 is a schematic structural view of a lower substrate according to a first embodiment of the present invention.
  • FIG. 3 is a schematic view of a lower substrate after forming a black matrix pattern according to a first embodiment of the present invention
  • FIG. 4 is a schematic view of the lower substrate after forming a colored resin pattern according to the first embodiment of the present invention
  • FIG. 5 is a schematic view of a lower substrate after forming a transparent layer according to a first embodiment of the present invention
  • FIG. 6 is a schematic view of a lower substrate after forming a gate pattern according to a first embodiment of the present invention
  • the lower substrate of an embodiment is formed with an active layer, a source, a drain, and a TFT. a schematic view of a channel region;
  • FIG. 8 is a schematic view of a lower substrate after forming a passivation layer pattern according to a first embodiment of the present invention
  • FIG. 9 is a schematic view of a lower substrate after forming a pixel electrode pattern according to a first embodiment of the present invention
  • Fig. 10 is a view showing the configuration of a liquid crystal display device according to a second embodiment of the present invention. detailed description
  • FIG. 1 is a schematic structural view of a liquid crystal display device according to a first embodiment
  • FIG. 2 is a schematic structural view of a lower substrate of FIG. 1.
  • the liquid crystal display device of this embodiment may include an upper substrate 16, a lower substrate 1, and a liquid crystal 18 filled between the two substrates.
  • the lower substrate 1 may include a lower substrate (not shown), a color film formed on the lower substrate, and an array above the color film.
  • the upper substrate 16 may include an upper substrate (not shown) and a common electrode 17 formed on the lower surface of the upper substrate.
  • the color film may include a black matrix 2 and a color resin layer formed on the upper surface of the lower substrate, and a transparent layer 6 formed on the black matrix 2 and the color resin layer, and the transparent layer 6 may be Made of acrylic material.
  • the array may include a gate line (not shown) formed over the transparent layer 6, a data line (not shown), a thin film transistor (TFT) 7 and a pixel electrode 15.
  • TFT 7 may include a gate 8, a gate insulating layer 9, a semiconductor layer 10, a doped semiconductor layer 11, a source 12, a drain 13, and a passivation layer 14. .
  • a groove is provided at the surface of the transparent layer 6, so that the gate 8 is located in the groove. And the depth and width of the groove may correspond to the thickness and width of the gate 8, respectively Equal, making the surface of the lower substrate flat.
  • the transparent layer 6 described in this embodiment may not be provided with a groove, and the gate electrode 8 is directly formed on the transparent layer 6.
  • the person skilled in the art can freely select and set according to actual needs.
  • the color resin layer may include a red resin 3, a green resin 4, and a blue resin 5, and the black matrix 2 is located between two adjacent resins of the red resin 3, the green resin 4, and the blue resin 5.
  • the groove may be disposed above and opposite the black matrix 2.
  • the color resin layer may further include other color resins depending on design requirements, and embodiments of the present invention are not limited to the above colors.
  • the gate line may also be located in the recess, the shape of the recess may be the same as the overall shape of the gate line and the gate, and the depth of the recess may be equal to the thickness of the gate line and/or the gate.
  • the embodiment further provides a method for manufacturing the array substrate of the above liquid crystal display device, which specifically includes the following steps:
  • a lower substrate is provided, and a patterned black matrix 2 is formed on the lower substrate.
  • a black matrix material is deposited on the lower substrate, and the black matrix material may be made of a metal material or a resin material having better light shielding properties or other materials having better light shielding properties; and then arranged in an array by patterning the black matrix material.
  • Black matrix 2 If the black matrix material is made of a metal material, the black matrix pattern can be formed by a glue coating, exposure, development, etching, and lift-off process; if the black matrix material is made of a resin material, black is formed by exposure, development, and baking treatment. Matrix graphics.
  • a color resin pattern is deposited on the substrate shown in Fig. 3, and a color resin is distributed between the black matrixes 2.
  • a color resin material is deposited on the base substrate after forming the black matrix pattern, a color resin pattern is formed by exposure, development, and baking treatment, and a color resin pattern is distributed between the black matrixes 2.
  • the color resin may include a red resin 3, a green resin 4, and a blue tree, or may further include a resin of another color such as a white resin or a yellow resin.
  • resin patterns of various colors can be arranged in any order.
  • the color resin including the red resin 3, the green resin 4, and the blue resin 5 will be described as an example.
  • a transparent layer 6 is deposited on the substrate shown in Figure 4. Specifically, a transparent layer 6 is deposited on a base substrate on which a colored resin pattern is formed to form a flat surface, and grooves are formed in the transparent layer 6 by exposure, development, and baking treatment. The depth and width of the grooves can be equal to the thickness and width of the gate, respectively. The depth and width of the formed groove can be controlled by adjusting the exposure amount. Transparent layer Then, an array was prepared on a color film.
  • a gate metal layer is deposited on the substrate of the transparent layer pattern by magnetron sputtering, and the gate metal layer may be made of molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or For metals such as copper, a combination of films of the above materials may also be used.
  • a pattern including a gate electrode 8 and a gate line (not shown) is formed by a normal mask process in which the gate electrode 8 is located in the recess of the transparent layer 6, and forms a planarized surface together with the transparent layer 6.
  • a gate insulating layer 9, a semiconductor layer 10, a doped semiconductor layer 11, and a source/drain electrode layer are sequentially deposited on a substrate on which a gate pattern is completed.
  • the material of the gate insulating layer 9 may be silicon nitride, silicon oxide or silicon oxynitride.
  • the source and drain electrode layers may be made of molybdenum, aluminum, aluminum-nickel alloy, molybdenum-tungsten alloy, chromium, or copper. A combination of the above several materials is used.
  • a pattern including an active layer, a source 12, a drain 13, a data line (not shown), and a TFT channel (not shown) may be formed by a gray scale mask process.
  • the steps of forming the active layer, the source 12, the drain 13 and the TFT channel region by the gray scale mask process may be specifically as follows:
  • the source/drain metal layer is deposited by magnetron sputtering, and after the photoresist is applied, the photoresist is exposed by a gray scale mask.
  • the photoresist is formed into a completely removed region, a partially removed region, and a completely reserved region, wherein the photoresist completely reserved region corresponds to a region where the data line, the source 12 and the drain 13 are located, and the photoresist portion reserved region corresponds to the TFT
  • the region where the channel region is located, the photoresist completely removed region corresponds to the region other than the above-mentioned pattern;
  • the thickness of the photoresist in the completely remaining area of the photoresist is not changed, the photoresist in the remaining portion of the photoresist is thinned, and the photoresist in the completely removed region of the photoresist is completely removed;
  • etching away the source/drain metal layer in the completely removed region of the photoresist by a wet etching process and etching the doped semiconductor layer 11 and the semiconductor layer 10 in the completely removed region of the photoresist by a dry etching process to perform the photoresist
  • the ashing process completely removes the photoresist in the remaining portion of the photoresist, exposes the source and drain metal layers, and performs a second etching by an etching process to completely etch away the source and drain metal layers of the remaining portion of the photoresist.
  • a substrate base in which an active layer, a source 12, a drain 13 and a TFT channel region are formed The passivation layer 14 is deposited on the upper surface by a plasma enhanced chemical vapor deposition method, and via holes are formed in the passivation layer by a common mask process, wherein the material of the passivation layer 14 can be oxidized by silicon nitride, silicon oxide or nitrogen. silicon.
  • a transparent conductive layer is deposited on the base substrate on which the passivation layer 14 is formed.
  • the transparent conductive layer may be made of indium tin oxide (ITO), indium oxide (IZO) or aluminum oxide (AZO). And other materials; the transparent conductive layer is patterned by a common mask process to form the pixel electrode 15, and the pixel electrode 15 may be directly connected to the drain 13 through a via hole in the passivation layer.
  • the specific preparation process of the upper substrate may include providing an upper substrate, depositing a transparent conductive layer on the upper substrate, and patterning the transparent conductive layer to form the common electrode 17.
  • the liquid crystal display device can be formed by relatively arranging the upper substrate and the lower substrate fabricated as described above, and injecting liquid crystal between the upper substrate and the lower substrate.
  • Fig. 10 is a view showing the configuration of a liquid crystal display device according to a second embodiment, in which a partial enlarged view of the TFT 7 can be referred to Fig. 9.
  • the structure of the liquid crystal display device according to the present embodiment is similar to that of the liquid crystal display device of the first embodiment, and the difference is that the array substrate in the first embodiment is set to the TN mode, and the array substrate in this embodiment. Set to ADS mode.
  • the common electrode 17 and the pixel electrode 15 may be disposed on the lower substrate 1, the pixel electrode 15 may be located above the common electrode 17, the pixel electrode 15 may be in the shape of a slit, and the common electrode 17 may be connected to the gate.
  • the common electrode 17 is located in another recess formed in the transparent layer 6 and at the same level as the gate 8, in which case the common electrode 17 may be slit-like or planar.
  • the common electrode 17 and the pixel electrode 15 may still be disposed on the lower substrate 1, but the common electrode 17 is disposed above the pixel electrode 15, at which time the common electrode 17 is disposed in a slit shape, and the common electrode 17 and the pixel electrode 15 are respectively Located above and below the passivation layer 14, the pixel electrode 15 may be slit or planar.
  • the structure and formation method of the color film and other components of the array on the lower substrate 1 in this embodiment are the same as those of the first embodiment, and are not described herein again.
  • the embodiment of the present invention can reduce the liquid crystal display device by disposing the array on the color film and forming a groove in the transparent layer of the color film to set the gate in the groove.
  • the overall thickness is made thinner and lighter; on the other hand, the flatness of the liquid crystal display device can be increased, so that some display defects of the liquid crystal display can be reduced.

Abstract

La présente invention concerne un substrat de réseau et un dispositif d'affichage. Le substrat de réseau (1) comporte un film couleur et un réseau qui sont formés sur un substrat sous-jacent, et le réseau est situé sur le film couleur. Grâce à la disposition du réseau sur le film couleur, à la formation d'une rainure sur la surface d'une couche transparente (6) du film coloré, et à la disposition d'une électrode de grille (8) et/ou d'une ligne de grille du réseau dans la rainure, d'une part l'épaisseur globale du dispositif d'affichage à cristaux liquides peut être réduite pour permettre au dispositif d'affichage à cristaux liquides d'être plus mince et plus léger; et d'autre part, la planéité du dispositif d'affichage à cristaux liquides peut être accrue, permettant ainsi de réduire le phénomène d'affichage médiocre du dispositif d'affichage à cristaux liquides.
PCT/CN2012/086228 2012-07-25 2012-12-07 Substrat de réseau et dispositif d'affichage WO2014015617A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201210260959XA CN102819138A (zh) 2012-07-25 2012-07-25 阵列基板及显示装置
CN201210260959.X 2012-07-25

Publications (1)

Publication Number Publication Date
WO2014015617A1 true WO2014015617A1 (fr) 2014-01-30

Family

ID=47303330

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2012/086228 WO2014015617A1 (fr) 2012-07-25 2012-12-07 Substrat de réseau et dispositif d'affichage

Country Status (2)

Country Link
CN (1) CN102819138A (fr)
WO (1) WO2014015617A1 (fr)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103489922B (zh) * 2013-09-30 2017-01-18 京东方科技集团股份有限公司 薄膜晶体管及制备方法、阵列基板及制备方法和显示装置
CN104393002A (zh) * 2014-10-29 2015-03-04 合肥京东方光电科技有限公司 一种显示基板及其制作方法、显示装置
US10175515B2 (en) * 2016-03-17 2019-01-08 Japan Display Inc. Image display device
CN107515488B (zh) * 2017-08-01 2020-06-23 惠科股份有限公司 一种显示面板
CN108333830B (zh) * 2018-02-08 2021-03-26 Tcl华星光电技术有限公司 彩膜基板及其制造方法、遮光层及其制造方法
CN108388041B (zh) * 2018-02-08 2021-06-01 Tcl华星光电技术有限公司 彩膜基板及其制造方法、遮光材料及遮光层的制造方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030020851A1 (en) * 2001-07-30 2003-01-30 Woong-Kwon Kim Liquid crystal display panel and manufacturing method thereof
KR20040050237A (ko) * 2002-12-09 2004-06-16 엘지.필립스 엘시디 주식회사 액정표시장치용 어레이기판과 그 제조방법
CN101149546A (zh) * 2006-09-22 2008-03-26 北京京东方光电科技有限公司 一种薄膜晶体管在彩膜之上的液晶显示器件及其制造方法
CN101436601A (zh) * 2008-12-18 2009-05-20 上海广电光电子有限公司 薄膜晶体管阵列基板
CN202025170U (zh) * 2011-04-22 2011-11-02 京东方科技集团股份有限公司 一种显示屏及显示装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100325072B1 (ko) * 1998-10-28 2002-08-24 주식회사 현대 디스플레이 테크놀로지 고개구율및고투과율액정표시장치의제조방법
KR100629174B1 (ko) * 1999-12-31 2006-09-28 엘지.필립스 엘시디 주식회사 박막트랜지스터 기판 및 그의 제조방법
KR20080003078A (ko) * 2006-06-30 2008-01-07 엘지.필립스 엘시디 주식회사 액정표시장치 및 그 제조방법
CN102033370B (zh) * 2009-09-25 2014-05-28 北京京东方光电科技有限公司 液晶显示基板及其制造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030020851A1 (en) * 2001-07-30 2003-01-30 Woong-Kwon Kim Liquid crystal display panel and manufacturing method thereof
KR20040050237A (ko) * 2002-12-09 2004-06-16 엘지.필립스 엘시디 주식회사 액정표시장치용 어레이기판과 그 제조방법
CN101149546A (zh) * 2006-09-22 2008-03-26 北京京东方光电科技有限公司 一种薄膜晶体管在彩膜之上的液晶显示器件及其制造方法
CN101436601A (zh) * 2008-12-18 2009-05-20 上海广电光电子有限公司 薄膜晶体管阵列基板
CN202025170U (zh) * 2011-04-22 2011-11-02 京东方科技集团股份有限公司 一种显示屏及显示装置

Also Published As

Publication number Publication date
CN102819138A (zh) 2012-12-12

Similar Documents

Publication Publication Date Title
US8692258B2 (en) Array substrate of TFT-LCD including a black matrix and method for manufacturing the same
US9716110B2 (en) Array substrate, method for manufacturing the same, and display device
US9274368B2 (en) COA substrate, method for fabricating the same and display device
KR101322885B1 (ko) 어레이 기판과 액정 디스플레이
JP4594292B2 (ja) フォトマスク及びこれを利用した液晶表示装置用アレイ基板の製造方法
WO2016123931A1 (fr) Transistor à couche mince et son procédé de fabrication, substrat d'affichage et dispositif d'affichage
WO2018120691A1 (fr) Substrat de matrice et son procédé de fqabrication, et dispositif d'affichage
US8441592B2 (en) TFT-LCD array substrate and manufacturing method thereof
JP2012150435A (ja) 薄膜トランジスタ液晶ディスプレーのアレイ基板およびその製造方法
US20140273362A1 (en) Method for manufacturing thin film transistor and array substrate
WO2016029601A1 (fr) Substrat de réseau, procédé de fabrication associé et dispositif d'affichage
JP2010114459A (ja) 低分子有機半導体物質を利用する液晶表示装置及びその製造方法
WO2017012306A1 (fr) Procédé de fabrication de substrat de matrice, substrat de matrice et dispositif d'affichage
WO2014015617A1 (fr) Substrat de réseau et dispositif d'affichage
KR20190077570A (ko) 어레이 기판, 그 제조 방법 및 표시 장치
WO2016150286A1 (fr) Substrat de matrice et son procédé de préparation, et dispositif d'affichage
US20180059456A1 (en) Pixel structure and manufacturing method thereof, array substrate and display apparatus
WO2013135073A1 (fr) Substrat de réseau d'afficheur à cristaux liquides transflectif, procédé de fabrication associé et dispositif d'affichage
WO2014131238A1 (fr) Substrat de réseau et son procédé de fabrication, panneau d'affichage et son procédé de fabrication
TW200905262A (en) Color filter substrate and manufacturing thereof and liquid crystal display panel
JP2016533530A (ja) Tft−lcdアレイ基板の製造方法、液晶パネル、液晶表示装置。
WO2013181915A1 (fr) Substrat à réseau tft, procédé de fabrication de celui-ci, et dispositif d'affichage
WO2018214740A1 (fr) Substrat d'affichage, son procédé de fabrication, et dispositif d'affichage
US9057923B2 (en) Wire, method of manufacture, and related apparatus
TW569075B (en) Active matrix substrate and manufacturing method thereof

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12881558

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 11.06.2015)

122 Ep: pct application non-entry in european phase

Ref document number: 12881558

Country of ref document: EP

Kind code of ref document: A1