WO2013182098A1 - Procédé et dispositif pour le partage de ressources de terminal multi-cœur - Google Patents

Procédé et dispositif pour le partage de ressources de terminal multi-cœur Download PDF

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Publication number
WO2013182098A1
WO2013182098A1 PCT/CN2013/078108 CN2013078108W WO2013182098A1 WO 2013182098 A1 WO2013182098 A1 WO 2013182098A1 CN 2013078108 W CN2013078108 W CN 2013078108W WO 2013182098 A1 WO2013182098 A1 WO 2013182098A1
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WIPO (PCT)
Prior art keywords
core
shared
current
register
frequency
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PCT/CN2013/078108
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English (en)
Chinese (zh)
Inventor
张映俊
丁克忠
吴敏锋
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中兴通讯股份有限公司
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Publication date
Priority claimed from CN201210413307.5A external-priority patent/CN103778014B/zh
Application filed by 中兴通讯股份有限公司 filed Critical 中兴通讯股份有限公司
Publication of WO2013182098A1 publication Critical patent/WO2013182098A1/fr

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
    • G06F9/526—Mutual exclusion algorithms

Definitions

  • the present invention relates to the field of mobile communication technologies, and in particular, to a method and apparatus for sharing resources by a multi-core terminal.
  • Embodiments of the present invention provide a method and an apparatus for sharing resources by a multi-core terminal, which are intended to implement protection and coordinated use of public resources.
  • the method for sharing resources by the multi-core terminal includes:
  • the shared resource parameter is set according to the information stored in the shared mutex register for resource sharing.
  • the shared resource includes at least one of the following: a multi-core frequency modulation, a radio frequency (RF) common resource, an I2C bus, and a universal asynchronous transceiver transmitter (UART) serial port.
  • RF radio frequency
  • I2C I2C bus
  • UART universal asynchronous transceiver transmitter
  • the multi-core terminal includes a first core and a second core.
  • the step of setting the shared resource parameter according to the information stored in the shared mutual exclusion register includes: Setting a status bit of the shared mutex register to a non-idle state;
  • the step of setting the current core voltage and the current frequency of the first core according to the comparison result comprises:
  • the pre-adjusted core frequency is greater than a current frequency of the first core, reading a current core voltage from the shared mutually exclusive register, and comparing with a pre-adjusted core voltage;
  • the pre-adjusted core frequency is less than a current frequency of the first core, setting a current frequency of the first core; reading a current core voltage from the shared mutex register, and comparing with a pre-adjusted core voltage; Reading the core voltage allowed by the second core from the shared mutual exclusion register when the pre-adjusted core voltage is greater than the current core voltage; taking the pre-adjusted core voltage and the nuclear voltage allowed by the second core The larger one is set to the current core voltage.
  • the multi-core terminal includes a first core and a second core.
  • the step of setting the shared resource parameter according to the information stored in the shared mutex register includes:
  • the step of setting the shared resource parameter according to the information stored in the shared mutex register includes:
  • the above method further includes:
  • a device for sharing resources by a multi-core terminal comprising:
  • a status bit reading module configured to: read a status bit of the shared mutex register when one of the cores of the multi-core terminal needs to operate the shared resource;
  • the resource sharing module is configured to: when the status bit of the shared mutex register is idle, set the shared resource parameter according to the information stored in the shared mutex register for resource sharing.
  • the shared resource includes at least one of the following: a multi-core frequency modulation, a radio frequency (RF) common resource, an I2C bus, and a universal asynchronous transceiver transmitter (UART) serial port.
  • RF radio frequency
  • I2C I2C bus
  • UART universal asynchronous transceiver transmitter
  • the multi-core terminal includes a first core and a second core, and when the first core needs to perform frequency modulation and voltage regulation, the resource sharing module includes:
  • a setting unit configured to set a status bit of the shared mutex register to a non-idle state
  • a reading unit configured to read a current frequency of the first core from the shared mutex register, and Pre-adjust the nuclear frequencies for comparison
  • a setting unit configured to set a current core voltage and a current frequency of the first core according to the comparison result
  • An update unit configured to set the current core voltage, a current frequency of the first core, and The minimum core voltage allowed by the first core is written into the shared mutex register, respectively.
  • the setting unit is further configured to: when the pre-adjusted core frequency is greater than a current frequency of the first core, read a current core voltage from the shared mutual exclusion register, and compare with a preset nuclear voltage; Reading the core voltage allowed by the second core from the shared mutual exclusion register when the pre-adjusted core voltage is greater than the current core voltage; taking the pre-adjusted core voltage and the nuclear voltage allowed by the second core The larger one is set to the current core voltage; the current frequency of the first core is set; when the pre-adjusted kernel frequency is less than the current frequency of the first core, the current frequency of the first core is set; The shared mutex register reads the current core voltage and compares with the pre-adjusted core voltage; when the pre-adjusted core voltage is greater than the current core voltage, reads from the shared mutex register that the second core allows The core voltage; the larger of the pre-adjusted core voltage and the core voltage allowed by the second core is set
  • the multi-core terminal includes a first core and a second core, and when the first core needs to adjust a system bus frequency, the resource sharing module includes:
  • a setting unit configured to set a status bit of the shared mutex register to a non-idle state
  • a reading unit configured to: read a current bus frequency of the system from the shared mutex register, the second The minimum system bus frequency allowed by the core
  • a setting unit configured to: compare a preset core frequency, a current bus frequency of the system, and a minimum system bus frequency allowed by the second core; wherein the largest one is set to the current bus frequency of the system; and the update unit is set to: The current bus frequency of the system and the lowest system bus frequency allowed by the second core are respectively written into the shared mutex register.
  • the multi-core terminal includes a first core and a second core.
  • the resource sharing module includes: a reading unit, configured to: Reading a RF common resource status from the shared mutex register when a core wants to enter a sleep state or when waking up;
  • the setting unit is configured to: when any one of the multi-core terminals wants to enter a sleep state and the RF common resource state is an active state, setting the RF common resource state to a power-saving state; or Retrieving the RF common resource state to an active state when any of the multi-core terminals is awake and the common resource state is a power-saving state;
  • the update unit is configured to: write a current state of the RF common resource to the mutual Rejected in the shared register.
  • the setting unit is further configured to: when the resource sharing is completed, return the status bit of the shared mutex register to an idle state.
  • a method and device for sharing resources by a multi-core terminal when there are multiple shared resources, the shared mutual exclusion register is used to protect and coordinate the use of shared resources, thereby coordinating each Checking the allocation of shared resources improves the utilization of public resources and improves the overall performance of the terminal system.
  • FIG. 1 is a schematic flowchart of a method for sharing resources of a multi-core terminal according to an embodiment of the present invention
  • FIG. 2 is a schematic structural diagram of an apparatus for sharing resources of a multi-core terminal according to the present invention
  • the solution of the embodiment of the present invention is mainly: For a multi-core terminal, when there are multiple shared resources, the shared mutual exclusion register is used to protect and coordinate the use of the shared resource.
  • the multi-core terminal in the embodiment of the present invention refers to a terminal that includes two or more CPU cores (hereinafter referred to as a core).
  • a core The following embodiments are described by taking the terminal of the current dual-core shared architecture as an example.
  • an embodiment of the present invention provides a method for sharing resources by a multi-core terminal, including: Step S101: When one of the cores of the multi-core terminal needs to share resources, read a status bit of the shared mutual exclusion register;
  • shared resources refer to resources that can be accessed and operated by each core, including bus, memory, and peripherals, including but not limited to multi-core FM, RF common resources, I2C bus, and UART serial port.
  • a core in a multi-core terminal requires operating system bus frequency or common resources such as nuclear voltage, RF resources, and public I2C bus, it will affect the performance of other cores, so when any of the core dynamics When operating public resources, it is necessary to adjust the parameters and requirements of the other party. In addition, it is necessary to avoid conflicts caused by the simultaneous operation of resources by both parties.
  • This embodiment utilizes a shared mutex register to protect and coordinate the use of shared resources to ensure that each core can use shared resources normally.
  • the shared mutex register can be a 32-bit register, the lowest bit indicates the status bit, and the other 31 bits can be used by multiple cores.
  • the status bit of the shared mutex register is read to set the corresponding parameter according to the status bit of the shared mutex register.
  • Step S102 When the status bit of the shared mutex register is idle, set the corresponding parameter according to the information stored in the shared mutex register for resource sharing.
  • the status bit of the shared mutex register Determining whether the status bit of the shared mutex register is idle, when the status bit of the shared mutex register is not idle, indicating that the peer has control over the shared resource, and the current core cannot use the resource; when the shared mutex register is When the status bit is idle, the corresponding parameters can be adjusted according to the information stored in the shared mutex register to implement resource sharing.
  • setting parameters you need to set the status bit of the shared mutex register to non-idle state. After the resources are shared, you need to return the status bit of the shared mutex register to the idle state.
  • Example 1 Application scenario for multi-core dynamic frequency modulation and voltage regulation:
  • the shared mutex register is a 32-bit register, the lowest bit indicates the status bit, and the other 31 bits can be used by the dual core.
  • the lowest bit of the shared mutex register is read first.
  • the lowest bit of the shared mutex register read is idle, the corresponding frequency and core voltage settings can be performed. Otherwise, , need to wait for the lowest bit of the shared mutex register to be idle.
  • the two cores in the multi-core terminal are respectively set as the first core and the second core, and the implementation process of dynamically adjusting the clock and voltage of the multi-core shared architecture is as follows:
  • the lowest bit [0] of the shared mutex register is read first, and when bit [0] is 0, the sharing is indicated.
  • the mutex register is idle and can be used at present; when bit[0] is read as 1, the shared mutex register cannot be used;
  • the up-sequence process is followed; otherwise, the entire up-conversion process is exited;
  • the bit [5-4] in the shared mutex register is read, the current core voltage is obtained, and the pre-adjusted core voltage is compared with the current core voltage. If the pre-adjusted core voltage is greater than the current core voltage, Take the boost process, otherwise exit the boost process.
  • the pre-adjusted core frequency is less than the current frequency of the first core, first setting a current frequency of the first core; then reading the current core voltage from the shared mutex register, and pre-adjusting The core voltage is compared; when the pre-adjusted core voltage is greater than the current core voltage, the core voltage allowed by the second core is read from a bit [7-6] of the shared mutually exclusive register; The larger of the nucleation voltage and the nuclear voltage allowed by the second core is set to the current core voltage.
  • the current core voltage, the current frequency of the first core, and the minimum core voltage allowed by the first core are respectively written into corresponding bit bits [5-4] and bit[3 in the shared mutual exclusion register. -l], bit[9-8].
  • the lowest bit [0] of the shared mutex register is read first, and when it is read as 0, the shared mutex register is indicated. Idle, currently available; otherwise the shared mutex register cannot be used.
  • Example 2 Application scenario corresponding to the use of RF common resources by multiple cores:
  • a top-level shared mutex register needs to be designed to implement multi-core shared resources by using the shared mutex register.
  • the shared mutex register is a 32-bit register, the lowest bit indicates the status bit, and the other 31 bits can be used for the dual core.
  • the lowest bit of the shared mutex register is read first.
  • the lowest bit of the shared mutex register read is idle, the corresponding RF resource operation and setting can be performed.
  • the lowest bit of the shared mutex register is not idle, it needs to wait for the bit to be idle.
  • the implementation process of multi-core shared RF public resource usage is as follows: 1) When any core goes to sleep to operate the common resource to enter the power-saving state, the RF mutex shared register status bit must be read first, and must wait until bit[0] is 0. At this time, read the RF mutex shared register.
  • the other party's core RF common resource status bit[l] if it is 0, the corresponding RF common resource is set to the power saving state, and then the current state is set to the corresponding bit of the RF mutual exclusion shared register, and finally the RF mutual exclusion sharing is configured.
  • Register status bit bit[0] is 0, releasing control right;
  • Example 3 Application scenario corresponding to the use of common 12 C bus resources by multiple cores:
  • this register is a 32-bit register, the lowest bit indicates the status bit, and the other 31 bits can be used for the dual core.
  • the lowest bit of the shared mutex register is read first. When the read is idle, the common I2C bus can be used. When the read is non-idle, it needs to wait for the The bit is idle. When the operation is completed, the lowest bit of the shared mutex register needs to be set to 0, and the control right is released, and the other party can use it.
  • the I2C bus mutual exclusion shared register status bit, bit[0], must be set to 1 to release control so that other cores can use the common resource.
  • the embodiment can solve the allocation and use of the multi-core shared architecture/shared resources, and can not only effectively solve the use of the public resource UART serial port, the RF resource, etc., but also can solve the multi-core DVFS frequency modulation and voltage adjustment implementation scheme, thereby improving the scheme.
  • the overall performance of the terminal has a significant effect. For example, solving the multi-core shared architecture for dynamic frequency modulation and voltage regulation can significantly improve the standby of the system. Power consumption in scenarios such as calls and Internet access, extending the user's time spent on the battery.
  • the implementation of the dual-core or more-core shared architecture/shared resource is implemented by using the shared mutual exclusion register, and the implementation may be extended based on the foregoing solution of the embodiment, and details are not described herein again.
  • an embodiment of the present invention provides a device for sharing resources by a multi-core terminal, including: a status bit reading module 201 and a resource sharing module 202, where:
  • the status bit reading module 201 is configured to read a status bit of the shared mutex register when one of the cores of the multi-core terminal needs to share resources;
  • the resource sharing module 202 is configured to: when the status bit of the shared mutex register is idle, set corresponding parameters according to the information stored in the shared mutex register for resource sharing.
  • shared resources refer to resources that can be accessed and operated by each core, including bus, memory, and peripherals, including but not limited to multi-core FM, RF common resources, I2C bus, and UART serial port.
  • a core of a multi-core terminal requires operating system bus frequency or common resources such as nuclear voltage, RF resources, and public I2C bus, it will affect the performance of other cores. Therefore, when any core dynamically operates a common resource, it needs to combine the other parameters. And the requirements are adjusted. In addition, it is necessary to avoid conflicts caused by the simultaneous operation of resources by both parties.
  • This embodiment utilizes a shared mutex register to protect and coordinate the use of shared resources to ensure that each core can use shared resources normally.
  • the shared mutex register is a 32-bit register. The lowest bit indicates the status bit. The other 31 bits can be used by the dual core.
  • the status bit reading module 201 reads the status bit of the shared mutex register, so that the resource sharing module 202 sets the corresponding parameter according to the status bit of the shared mutex register.
  • the resource sharing module 202 first determines whether the status bit of the shared mutex register is idle. When the status bit of the shared mutex register is not idle, it indicates that the peer has control over the shared resource, and the current core cannot use the resource; When the status bit of the shared mutex register is idle, The information stored in the shared mutex register adjusts the corresponding parameters to achieve resource sharing. When setting parameters, you need to set the status bit of the shared mutex register to non-idle state. After the resources are shared, you need to return the status bit of the shared mutex register to the idle state.
  • the resource sharing module 202 includes: a setting unit 2021, a reading unit 2022, a setting unit 2023, and an updating unit 2024, where:
  • the setting unit 2021 is configured to set the state position of the shared mutual exclusion register to a non-idle state.
  • the reading unit 2022 is configured to read the current frequency of the first core from the shared mutex register and compare it with the pre-adjusted core frequency;
  • the setting unit 2023 is configured to set a current core voltage and a current frequency of the first core according to the comparison result
  • the updating unit 2024 is configured to separately write the current core voltage, the current frequency of the first core, and the minimum core voltage allowed by the first core into corresponding bits in the shared mutex register.
  • the setting unit 2023 is further configured to: when the pre-adjusted core frequency is greater than a current frequency of the first core, read a current core voltage from the shared mutex register, and compare with a pre-adjusted core voltage.
  • the shared mutual exclusion register reads the current core voltage and compares with the preset core voltage; when the preset core voltage is greater than the current core voltage, reading the second core permission from the shared mutual exclusion register The core voltage; the larger of the pre-adjusted core voltage and the core voltage allowed by the second core is set to the current core voltage.
  • the reading unit 2022 is further configured to read the current bus frequency of the system and the lowest system allowed by the second core from the shared mutual exclusion register. Bus frequency
  • the setting unit 2023 is further configured to compare the preset core frequency, the current bus frequency of the system, and the lowest system bus frequency allowed by the second core; wherein the largest one is set to the current bus frequency of the system; the update unit 2024 is further configured to The current bus frequency of the system and the lowest system bus frequency allowed by the second core are respectively written into corresponding bits in the shared mutex register.
  • the reading unit 2022 is further configured to read from the shared mutual exclusion register when any of the multi-core terminals wants to enter a sleep state or when awake The RF common resource state;
  • the setting unit 2023 is further configured to: when any one of the multi-core terminals wants to enter a sleep state and the corresponding RF common resource state is an active state, the corresponding RF common resource The state is set to a power-saving state; or, when any one of the multi-core terminals is awake and the corresponding RF common resource state is a power-saving state, the corresponding RF common resource state is restored to a working state. ;
  • the update unit 2024 is further configured to write the current state of the RF common resource into the corresponding bit of the mutually exclusive shared register.
  • the setting unit 2021 is further configured to return the status bit of the shared mutex register to an idle state after the resource sharing is completed.
  • the method and device for sharing resources by a multi-core terminal when there are multiple shared resources, the shared mutual exclusion register is used to protect and coordinate the use of the shared resource, and one of the cores in the multi-core terminal needs to be used.
  • the status bit of the shared mutex register is read; when the status bit of the shared mutex register is idle, the corresponding parameter is set according to the information stored in the shared mutex register for resource sharing, thereby coordinating the check resources of the shared resources. Distribution increases the utilization of public resources and improves the overall performance of the terminal system.
  • Embodiments of the present invention coordinate the allocation of shared resources by each core, improve the utilization rate of public resources, and improve the overall performance of the terminal system.

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
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  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

Des modes de réalisation de la présente invention portent sur un procédé et un dispositif pour le partage de ressources de terminal multi-cœur. Le procédé consiste à : lorsqu'un cœur dans le terminal multi-cœur a besoin de partager des ressources, lire un bit d'état d'un registre de mutex partagé ; quand le bit d'état du registre de mutex partagé est inactif, régler un paramètre correspondant en fonction d'informations stockées par le registre de mutex partagé de façon à effectuer un partage de ressources. selon les modes de réalisation de la présente invention, quand le terminal multi-cœur a actuellement de multiples ressources partagées, le registre de mutex partagé est utilisé pour protéger et coordonner une utilisation des ressources partagées, en coordonnant ainsi l'attribution des ressources partagées effectuée par les cœurs, ce qui améliore un taux d'utilisation de ressources publiques et améliore par ailleurs la performance globale d'un système terminal.
PCT/CN2013/078108 2012-10-25 2013-06-27 Procédé et dispositif pour le partage de ressources de terminal multi-cœur WO2013182098A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201210413307.5A CN103778014B (zh) 2012-10-25 多核终端共享资源的方法及装置
CN201210413307.5 2012-10-25

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060004988A1 (en) * 2004-06-30 2006-01-05 Jordan Paul J Single bit control of threads in a multithreaded multicore processor
CN1758229A (zh) * 2005-10-28 2006-04-12 中国人民解放军国防科学技术大学 异构多核微处理器局部空间共享存储方法
US7665002B1 (en) * 2005-12-14 2010-02-16 Advanced Micro Devices, Inc. Multi-core integrated circuit with shared debug port
CN102521207A (zh) * 2010-12-22 2012-06-27 威盛电子股份有限公司 多内核微处理器的共享电源的分布式管理

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060004988A1 (en) * 2004-06-30 2006-01-05 Jordan Paul J Single bit control of threads in a multithreaded multicore processor
CN1758229A (zh) * 2005-10-28 2006-04-12 中国人民解放军国防科学技术大学 异构多核微处理器局部空间共享存储方法
US7665002B1 (en) * 2005-12-14 2010-02-16 Advanced Micro Devices, Inc. Multi-core integrated circuit with shared debug port
CN102521207A (zh) * 2010-12-22 2012-06-27 威盛电子股份有限公司 多内核微处理器的共享电源的分布式管理

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