WO2013179898A1

WO2013179898A1 - Solar battery module, method for producing same, and device for managing production of solar battery module

Info

Publication number: WO2013179898A1
Application number: PCT/JP2013/063599
Authority: WO
Inventors: 知弘池田; 細野　彰彦; 本並　薫; 伸吾友久
Original assignee: 三菱電機株式会社
Priority date: 2012-05-29
Filing date: 2013-05-15
Publication date: 2013-12-05
Also published as: JPWO2013179898A1

Abstract

Disclosed is a solar battery module in which sub-cells (140-1 to 140-3) are formed by separating, by first separation grooves (146), a layered film including a first electrode layer (111), a photoelectric conversion cell (120), and a second electrode layer (130), said sub-cells (140-1 to 140-3) being connected in series in a second direction that intersects with a first direction. The solar battery module comprises a mini-cell group including a plurality of mini-cells (170) formed within the sub-cells (140-1 to 140-3) by forming a plurality of second separation grooves (145) extending in the second direction and spanning at least two of said sub-cells (140-1 to 140-3). Each first separation groove (146) electrically connects, in series, the sub-cells (140-1 to 140-3) that are adjacent to one another in the first direction. Each second separation groove (145) electrically insulates the layered film between regions that are adjacent to one another across the second separation groove (145).

Description

SOLAR CELL MODULE, ITS MANUFACTURING METHOD, AND SOLAR CELL MODULE MANUFACTURING MANAGEMENT DEVICE

The present invention relates to a solar cell module, a manufacturing method thereof, and a solar cell module manufacturing management device.

Solar power generation is expected as an alternative energy to thermal power generation using fossil fuel, and the production amount of solar power generation system is increasing year by year. However, a bulk type solar cell using a silicon substrate as a raw material has a shortage of silicon wafers, and there is concern about an increase in manufacturing cost due to a rise in the price of the silicon substrate. Therefore, a thin film silicon solar cell that forms a silicon film on a glass substrate has attracted attention. Usually, in such a thin film silicon solar cell or a chalcopyrite thin film compound solar cell such as CIS, a silicon film or a semiconductor film, which is necessary for photoelectric conversion, a transparent conductive film or a metal electrode film used for carrier extraction, Furthermore, various functional films used for antireflection coatings are semiconductor processes such as chemical vapor deposition (hereinafter referred to as CVD) and physical vapor deposition (hereinafter referred to as PVD). It is often produced using Therefore, if the process conditions are not set appropriately, the product characteristics such as the efficiency as a solar cell and the uniformity within the substrate surface are significantly adversely affected. Therefore, some process management method is required.

For example, in the manufacture of semiconductor devices such as LSI (Large Scale Integrated Circuit), which is not a solar cell, but also performs film formation and etching using a semiconductor process, there is a known technique for correcting product characteristic variations due to process variations. (For example, see Patent Document 1). Here, a test circuit group called a test element group (hereinafter referred to as TEG) is measured in-line, and based on the result, a method such as feedback / feedforward control is used to apply to the process or the next process. Condition correction is performed.

JP 2001-332723 A

However, in the manufacture of conventional solar cells, process management using a test circuit group such as TEG has not been proposed, and process management is generally performed based on a final inspection result by a solar simulator after the completion of all processes. there were. One of the reasons is that the photoelectric conversion characteristic of the solar cell is proportional to the power generation possible area. In other words, since the amount of power generation increases or decreases in proportion to the light receiving area, a TEG that is normally an invalid region that does not contribute to power generation has not been incorporated into the product. In addition, since the TEG is not incorporated in the conventional solar cell in this way, the process management standard is also based on the solar simulator electrical characteristic evaluation results (conversion efficiency, short-circuit current, open-circuit voltage, curvature factor, etc.) There was a lack of information in terms of feedback to the conditions.

The present invention has been made in view of the above, and an object thereof is to obtain a solar cell module manufacturing method and a solar cell module manufacturing management device that perform process management using a solar cell module having a test circuit group such as a TEG. To do. Another object of the present invention is to obtain a solar cell module having a test circuit group in which an ineffective region that does not contribute to power generation is not increased as compared with a normal solar cell.

In order to achieve the above object, a solar cell module according to the present invention is a subcell in which a laminated film having a first electrode layer, a photoelectric conversion cell, and a second electrode layer is separated by a first separation groove extending in a first direction. Is a solar cell module disposed on a substrate so as to be connected in series in a second direction intersecting the first direction, the second direction across two or more subcells adjacent to the second direction By forming a plurality of second separation grooves extending in the subcell, a group of minicells composed of a plurality of minicells formed in the subcell is provided, and the first separation groove is adjacent to the subcell in the first direction. A first removal section for electrically connecting the first electrode layers to each other so as to separate the subcells adjacent to each other in the second direction; and the first electrode Layer and next door A second removal unit for removing a part of the photoelectric conversion cell so as to electrically connect the second electrode layer of the subcell, and the second removal unit so as to electrically insulate between the adjacent subcells. An electrode layer and a third removal portion for removing a part of the photoelectric conversion cell, and the second separation groove is electrically connected between the stacked films in the adjacent regions with the second separation groove interposed therebetween. A fourth removing unit for removing a part of the first electrode layer; a fifth removing unit for removing a part of the photoelectric conversion cell; the second electrode layer; and the photoelectric conversion cell. At least one of a sixth removal portion that removes a part of the second electrode layer, a seventh removal portion that removes a part of the second electrode layer, the photoelectric conversion cell, and the first electrode layer. It is characterized by.

According to the present invention, since the minicell group is provided in the thin film solar cell module, data for performing independent condition correction in each process, which is impossible by the process management by the batch measurement with the conventional solar simulator, is acquired. It has the effect of being able to. In addition, it is easy to determine a correction amount across a plurality of processes, and it is possible to more easily manage the manufacturing process of the solar cell.

FIG. 1 is a cross-sectional view schematically showing the configuration of a thin film solar cell. FIG. 2 is a diagram illustrating an example of a configuration of an integrated thin film solar cell module in a dark state. FIG. 3 is a diagram showing types of films removed by a film removal process performed in the manufacturing process of the thin film solar cell module. FIG. 4 is a diagram schematically illustrating an example of a method for measuring the diode characteristics of the subcell according to the embodiment. FIG. 5 is an equivalent circuit diagram in a state where the diode characteristics of the subcell are measured using the guard pins. FIG. 6 is a diagram schematically illustrating another example of a method for measuring a diode characteristic of a subcell using a guard pin. FIG. 7 is a plan view schematically showing an example of a TEG pattern in the thin film solar cell module. FIG. 8 is a diagram schematically showing the structure of the subcell in the thin film solar cell module. FIG. 9 is a diagram showing an example of minicell patterning. FIG. 10 is an equivalent circuit diagram of the thin film solar cell module shown in FIG. FIG. 11 is a diagram schematically illustrating an example of a TEG pattern. FIG. 12 is a diagram schematically illustrating an example of a TEG pattern. FIG. 13 is a diagram schematically illustrating an example of a TEG pattern. FIG. 14 is a diagram schematically illustrating an example of a TEG pattern. FIG. 15 is a diagram schematically illustrating an example of a TEG pattern. FIG. 16 is a diagram schematically illustrating an example of a TEG pattern. FIG. 17 is a diagram schematically illustrating an example of a TEG pattern. FIG. 18 is a diagram schematically illustrating an example of a TEG layout. FIG. 19 is a diagram schematically illustrating an example of a TEG layout. FIG. 20 is a cross-sectional view schematically showing an example of a TEG layout. FIG. 21 is a block diagram schematically showing an example of the configuration of the solar cell module manufacturing management apparatus according to this embodiment. FIG. 22 is a flowchart showing an example of the procedure of the method for manufacturing the solar cell module according to this embodiment. FIG. 23 is a flowchart showing an example of the procedure of the method for manufacturing the solar cell module according to this embodiment. FIG. 24-1 is a diagram schematically showing an example of a procedure of a manufacturing method of the solar cell module according to this embodiment (part 1). FIG. 24-2 is a diagram schematically showing an example of a procedure of the manufacturing method of the solar cell module according to this embodiment (No. 2). FIG. 24-3 is a diagram schematically showing an example of a procedure of the manufacturing method of the solar cell module according to this embodiment (No. 3). FIG. 24-4 is a diagram schematically showing an example of a procedure of the manufacturing method of the solar cell module according to this embodiment (No. 4). FIG. 24-5 is a diagram schematically showing an example of a procedure of the manufacturing method of the solar cell module according to this embodiment (No. 5). FIG. 24-6 is a diagram schematically showing an example of a procedure of the manufacturing method of the solar cell module according to this embodiment (No. 6). FIG. 25 is a diagram illustrating an example of the state of the characteristic parameter before and after correcting the CVD process condition from the TEG measurement result.

Hereinafter, a solar cell module, a manufacturing method thereof, and a solar cell module manufacturing management device according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the embodiments. In addition, the cross-sectional views of the solar cell used in the following embodiments are schematic, and the relationship between the thickness and width of the layers, the ratio of the thickness of each layer, and the like may differ from the actual ones.

FIG. 1 is a cross-sectional view schematically showing the configuration of a thin film solar cell. The thin film solar cell includes a photoelectric conversion cell 120 in which a surface electrode layer 111, a p-type semiconductor film 121, an i-type semiconductor film 122 and an n-type semiconductor film 123 are stacked on a glass substrate 101, and a transparent back surface. The back electrode layer 130 in which the conductive film 131 and the back electrode film 132 are stacked has a structure in which the conductive film 131 and the back electrode film 132 are stacked in order. The surface electrode layer 111 is made of, for example, a transparent conductive film having a concavo-convex shape on the upper surface (the surface opposite to the surface in contact with the glass substrate 101). The photoelectric conversion cell 120 is configured by a semiconductor film capable of performing photoelectric conversion, such as an amorphous silicon film, a microcrystalline silicon film, or a chalcopyrite thin film such as a CIS system. In this embodiment, the side of the thin-film solar cell on which sunlight is incident (the side on which the glass substrate 101 is disposed) is referred to as the front surface (light receiving surface), and the side facing it is referred to as the back surface.

As shown in FIG. 1, a thin film solar cell is manufactured by depositing various functional films such as a transparent conductive film and a semiconductor film on a glass substrate 101 having a large area. For this reason, it is difficult to adjust the output voltage and output current of a module by connecting cells in series and / or in parallel as in a crystalline silicon solar cell module. Therefore, in a thin film solar cell module, processing is performed when forming a transparent conductive film, a semiconductor film, or the like on a substrate so that cells are connected in series.

FIG. 2 is a diagram showing an example of the configuration of an integrated thin film solar cell module in a dark state, (a) is a plan view seen from the back side of the integrated thin film solar cell module, (b) is a cross-sectional view taken along the line AA in (a), and (c) is a diagram showing an equivalent circuit. In FIG. 2, the X axis and the Y axis perpendicular to each other in the substrate surface are taken, and the direction perpendicular to the substrate surface is taken as the Z axis.

The integrated thin film solar cell module 100 has a structure in which a plurality of rectangular subcells 140 extending in the X direction are arranged on the glass substrate 101 at predetermined intervals in the Y direction. Specifically, on the glass substrate 101 on which the rectangular surface electrode layer 111 extending in the X direction and arranged at a predetermined interval in the Y direction is formed, a photoelectric having substantially the same size as the surface electrode layer 111 is formed. A stacked body composed of the conversion cell 120 and the back electrode layer 130 has a structure arranged at a predetermined interval in the Y direction so as to straddle the two surface electrode layers 111 adjacent in the Y direction. Then, the front electrode layer 111 and the back electrode layer 130 are connected in the photoelectric conversion cell 120. Here, the groove that separates the surface electrode layer 111 in the Y direction is referred to as a first scribe line 141, and the groove provided in the photoelectric conversion cell 120 that connects the surface electrode layer 111 and the back electrode layer 130 is the second scribe line. The groove for separating the stacked body in the Y direction is called a third scribe line 143. By forming the first scribe line 141, the second scribe line 142, and the third scribe line 143 in this order in the Y direction, the surface electrode layer 111, the photoelectric conversion cell 120, and the back electrode layer 130 in the adjacent regions are electrically connected to each other. The back electrode layer 130 and the front electrode layer 111 are electrically insulated from each other. Thereby, the subcells of adjacent regions are connected in series. Hereinafter, a region formed by the set of the first to third scribe lines 141 to 143 is referred to as a first separation groove 146. For example, the subcell 140 is formed in a region partitioned between two adjacent first separation grooves 146. The surface electrode layer 111 of the subcell 140 is connected to the back electrode layer 130 of one adjacent subcell 140, and the back electrode layer 130 is connected to the surface electrode layer 111 of the other adjacent subcell 140, on the glass substrate 101. A plurality of subcells 140 are connected in series.

As described above, normally, in the manufacturing process of the thin film solar cell module 100, the film removal process corresponding to the first to third scribe lines 141 to 143 is performed three times to separate the subcell 140 within the surface of the glass substrate 101. / Connect and adjust module voltage and current. Such a process in the thin film solar cell module 100 is called integration. Three film removal processes, that is, processes for forming the first scribe line 141, the second scribe line 142, and the third scribe line 143 will be referred to as P1, P2, and P3 scribe processes, respectively.

FIG. 3 is a diagram showing types of films removed by a film removal process performed in the manufacturing process of the thin film solar cell module, and (a) is a diagram schematically showing a cross-sectional structure of the thin film solar cell module. (B) is a figure which shows the film | membrane removed by each scribe process. In the P1 scribe process, the surface electrode layer 111 is removed, and the removed groove portion becomes the first scribe line 141. In the P2 scribe process, the semiconductor film (photoelectric conversion cell 120) or the backside transparent conductive film 131 added thereto is removed, and the removed groove portion becomes the second scribe line 142. Whether or not the back transparent conductive film 131 is included as a film to be removed by the P2 scribe process depends on the structure, but is generally included in many cases. In the P3 scribe process, the semiconductor film (photoelectric conversion cell 120), the back surface transparent conductive film 131, and the back surface electrode film 132 are removed, and the removed groove portion becomes the third scribe line 143. In addition, all the films on the glass substrate 101 (surface electrode layer 111, semiconductor film (photoelectric conversion cell 120), back transparent conductive film 131, back electrode film 132) are removed and used for insulation. There is also a process called a P4 scribe process, which forms a fourth scribe line 144. However, in general, it is often used to insulate from the frame at the outer peripheral portion, and is often not used in the process for integration.

The integrated thin-film solar cell module 100 is generally configured by connecting a plurality of, for example, about 100 elongated subcells 140 in series. The equivalent circuit at that time is as shown in FIG. 2C, where the resistance (Rs_TCO_F) 154 of the surface electrode layer 111, the resistance (Rs_BK) 151 of the back electrode film 132, and the contact between the back electrode film 132 / the front electrode layer 111 It is expressed as a series-parallel circuit of a resistor (Rs_CON) 155, a shunt diode (D) 153, and a shunt resistor (Rsh_D) 152.

In this embodiment, a test circuit group (hereinafter referred to as TEG) pattern, which is a minicell group that also operates as a power generation region, is provided in the thin-film solar cell module 100. Here, a TEG pattern layout and a probing method are described. explain. The TEG is provided for the purpose of acquiring the electrical characteristics of each element of the equivalent circuit shown in FIG.

First, a method for measuring the diode characteristics of one subcell 140 will be described. FIG. 4 is a diagram schematically illustrating an example of a method for measuring the diode characteristics of the subcell according to the embodiment. Since the subcell 140 is represented by an equivalent circuit as shown in FIG. 2C, as shown in FIG. 4A, the probe pins 201a and 201b are formed on the back electrode layer 130 of the subcell 140 adjacent in the Y-axis direction. The diode characteristics can be measured by lowering 201b and measuring with a measuring device 200 such as an IV meter. In this case, since the other diode is electrically floated and may adversely affect the measurement, a voltage is applied to the guard pins 203a and 203b and the guard pins 203a and 203b as shown in FIG. 4B. It is desirable to prepare the guard pin driver 202 and lower the guard pins 203a and 203b on the back electrode layer 130 of the two subcells 140a adjacent to the subcell 140 where the probe pins 201a and 201b are lowered as necessary. At this time, a voltage is applied from the guard pin driver 202 to the guard pins 203a and 203b so that the guard pin 203a has the same voltage as the probe pin 201a and the guard pin 203b has the same voltage as the probe pin 201b.

FIG. 5 is an equivalent circuit diagram in a state where the diode characteristics of the subcell are measured using the guard pin. As shown in FIG. 5, the voltage of the guard pin 203a is made equal to the voltage of the probe pin 201a, and the voltage of the guard pin 203b is made equal to the voltage of the probe pin 201b so that no current flows in the adjacent subcell 140. Therefore, it is possible to accurately measure the current-voltage characteristics of the diode in units of subcells 140. For probing and guarding, any of two-terminal and four-terminal methods may be used.

FIG. 6 is a diagram schematically showing another example of a method for measuring a diode characteristic of a subcell using a guard pin. In the example of FIG. 4, all the probe pins 201a and 201b and the guard pins 203a and 203b are measured on the back electrode layer 130 of the subcell 140, but as shown in FIG. 6, the probe pins 201a and the guard pins 203b are measured. (Or the probe pin 201b and the guard pin 203a) may be brought into direct contact with the surface electrode layer 111 exposed at the bottom of the third scribe line 143 provided in the thin film solar cell module 100. That is, the probe pin 201a is lowered onto the surface electrode layer 111 exposed at the bottom of the third scribe line 143 of the subcell 140 to be measured, the probe pin 201b is lowered onto the back electrode layer 130 of the subcell 140 to be measured, and the guard pin 203a may be lowered onto the back electrode layer 130 of the adjacent subcell 140-1, and the guard pin 203b may be lowered onto the surface electrode layer 111 exposed at the bottom of the third scribe line 143 of the adjacent subcell 140-2. Whether to use FIG. 4B or FIG. 6 can be determined according to the measurement object.

Next, patterning for separating the TEG from the subcell 140 and performing individual evaluation will be described. FIG. 7 is a plan view schematically showing an example of a TEG pattern in a thin film solar cell module, (a) is an overall plan view, and (b) is an enlarged plan view in the vicinity of a TEG pattern formation position in (a). It is. In this embodiment, as shown in FIG. 7, a part of the subcell 140 is separated as a minicell 170, which is a TEG pattern formation region, and patterning is performed. The patterning of the minicell 170 shown in FIG. 7 is an example, and other various TEG patterns can be manufactured by applying the patterning for manufacturing the minicell 170 as described later.

FIG. 8 is a diagram schematically showing the structure of the subcell in the thin film solar cell module, where (a) is a developed view of the upper surface and the side surface of the subcell, and (b) is when one subcell is taken out. It is the distribution equivalent circuit diagram seen from above. When the subcell 140 is viewed as a distributed constant circuit, as shown in FIG. 8B, a shunt diode 153 and a shunt resistor 152 in a minute region are connected in parallel via the front electrode layer 111 and the back electrode layer 130. Can be expressed as Utilizing this fact, the diode characteristics averaged in a specific region are measured by pattern cutting / probing parallel to the direction (Y direction) in which the subcells 140 are connected in series as shown in FIG. Can do.

9A and 9B are diagrams showing an example of patterning of a minicell, where FIG. 9A is a plan view, FIG. 9B is a sectional view taken along line BB in FIG. 9A, and FIG. It is C sectional drawing. FIG. 10 is an equivalent circuit diagram of the thin film solar cell module shown in FIG.

As shown in FIG. 9, the rectangular subcells 140-1 to 140-3 extending in the X direction are separated in the Y direction by the first separation groove 146, but the minicells 170a and 170b are formed. Requires three or more subcells 140-1 to 140-3 to be arranged in series. The second separation grooves 145 are formed continuously in the two subcells 140-1 and 140-2 adjacent in the Y direction, so that the minicells 170a and 170b are separated from the subcells 140-1 and 140-2, respectively. The The second separation groove 145 that separates the minicells 170a and 170b is a first separation groove 146 extending in the X direction that separates the subcells 140-1 to 140-3, that is, the first to third scribe lines 141 to 143. Cross against the pair. In general, as shown in FIG. 9, the subcells 140-1 to 140-3 are separated by first separation grooves 146 extending in the parallel X direction at substantially constant intervals.

Minicells

170a and 170b are formed by providing a second separation groove 145 extending in the vertical Y direction. The second separation groove 145 can be constituted by, for example, a fourth scribe line that removes the back electrode layer 130, the photoelectric conversion cell 120, and the front electrode layer 111. The second separation groove 145 is also configured by a first / third / first scribe line that is a combination of the first scribe line 145a, the third scribe line 145b, and the first scribe line 145a extending in the Y direction. be able to.

FIG. 9 described above shows a case where the second separation groove 145 is configured by the first / third / first scribe lines. A pair of first scribe lines 145a are formed on the surface electrode layers 111 at both ends in the X-axis direction of the minicell formation region so as to cross two subcells 140-1 and 140-2 adjacent in the Y direction. The pair of first scribe lines 145a is formed in the same process as the process of forming the first scribe lines 141 of the subcell 140. Then, in the region sandwiched between the pair of first scribe lines 145a, one third scribe line 145b is crossed between the photoelectric conversion cell 120 and the back surface so as to cross the two subcells 140-1 and 140-2 adjacent in the Y direction. It forms in the laminated body of the electrode layer 130. FIG. The one third scribe line 145b is formed in the same process as the process of forming the third scribe line 143 of the subcell 140. As a result, a second separation groove 145 composed of the first / third / first scribe lines is formed.

In the case of the first / third / first scribe line, a leakage current flows through the semiconductor layer (particularly the p layer) on the first scribe line 141 to the adjacent subcell 140. Compared to this, there is an advantage that film damage is reduced. Such a leakage current originally flows even when the subcells 140 are connected in series at the time of integration, and is not so great as to have a significant adverse effect on the cell characteristics. It is desirable to use it separately from the scribe line.

Further, as shown in FIGS. 9 and 10, the second separation groove 145 that separates the minicell 170 is not formed in the adjacent subcell 140, and the electrode of the minicell 170 is connected to the subcell 140 in series. Therefore, the minicell 170 and the subcell 140 portion excluding the minicell 170 are connected in parallel. As a result, during power generation, the power generated by the minicell 170 can also be used effectively. As described above, the TEG pattern formed by the minicell 170 according to this embodiment can be used for evaluating the characteristics of the thin-film solar battery module 100, and can also be used as a power generation layer thereafter.

In addition, since the scribe line itself drawn in the subcell 140 for pattern formation finally becomes an invalid region, it is desirable to suppress the area to the minimum. Since the subcells 140 are connected in series, the ratio of the area occupied by the scribe line itself to the area of one subcell 140 is preferably at least 5% or less from the viewpoint of current matching.

Next, a TEG pattern provided in the thin film solar cell module 100, a TEG layout that is an arrangement of the TEG pattern in the thin film solar cell module 100, and a TEG inspection method using the TEG pattern provided in the thin film solar cell module 100 And will be described in order. The patterning process for the first to third scribe lines 141 to 143 includes various methods such as laser scribe, blast, mechanical scribe, photolithography, mask lithography using ink jet / screen printing, etc. An explanation will be given by taking the case of using a process as an example.

<TEG pattern>
1. Different Size Cell FIG. 11 is a diagram schematically showing an example of a TEG pattern. As shown in FIG. 11, one TEG pattern is formed by a plurality (four in this case) of minicells 170a to 170d having different sizes (areas). The purpose of this pattern is to acquire scribe damage and bulk pn junction characteristics. Laser scribing itself is a rough technique that removes the film by ablation. By creating burrs around the removal region, film damage due to local heating, formation of a leak path due to exposure of the pn junction end face after film removal, etc. The vicinity of the scribe line has a leaky characteristic as compared with the cell bulk.

Therefore, for the current flowing in this pattern, it is assumed that the current component Is due to the cell bulk pn junction is proportional to the cell area, and the leaky current component IL around the scribe line is proportional to the scribe line length. In addition, n minicells 170 (n is a natural number of 2 or more) having different sizes (area / periphery ratio) are manufactured, and a current value Ii that is a measurement value for a combination of the area Si of the minicell 170 and the scribe line length Li. Are measured (i = 1 to n). Then, in accordance with the above assumptions, simultaneous equations of the following equations (1-1) to (1-n) are created, and characteristic values that are secondarily derived from measured values that minimize the error of the simultaneous equations. Find a certain Is and IL.

I1 = S1 · Is + L1 · IL (1-1)
I2 = S2 · Is + L2 · IL (1-2)
......
In = Sn · Is + Ln · IL (1-n)

Thus, the measurement result (measured value) can be divided into scribe damage and bulk pn junction characteristics. Then, a diode characteristic evaluation is performed for each of the obtained Is and IL to determine whether or not it has a standard characteristic value, and which characteristic has a strong influence on the measurement result (measured value). And quantify the degree of its impact. More specifically, the measurement result (measurement value) deviates from the standard value because of the scribe process or the pn junction characteristics, that is, the film formation (CVD) process of the photoelectric conversion cell 120. Can be carved out.

2. Nakako (third scribe line)
FIG. 12 is a diagram schematically illustrating an example of a TEG pattern. This pattern aims to acquire scribe damage. As shown in FIG. 12, n minicells 170a and 170b having the same area are prepared, and n1 to nn third scribe lines 171 are intentionally provided in the

minicells

170a and 170b. Apply. The direction of the third scribe line 171 to be formed is not particularly limited. In this example, the third scribe line 171 extends in the Y direction, for example, and is formed so as not to be connected to the first separation groove 146 extending in the X direction that partitions the subcell 140.

As described above, the vicinity of the third scribe line 171 provided in the

minicells

170a and 170b by the scribe process has a leaky characteristic. Therefore, assuming that the current component of the cell bulk is ID and the leak current component due to damage is Ileak, the current flowing in this pattern is obtained by the following equations (2-1) to (2-n). Then, ID and Ileak that minimize the error of the simultaneous equations (2-1) to (2-n) are obtained.

I1 = ID-n1 · Ileak (2-1)
I2 = ID-n2 · Ileak (2-2)
......
In = ID-nn · Ileak (2-n)

Thus, the measurement result (measured value) can be divided into scribe damage and bulk pn junction characteristics. Then, diode characteristics evaluation is performed for each of the obtained ID and Ileak to determine whether or not it has a standard characteristic value, and which characteristic has a strong influence on the measurement result (measurement value)? And quantify the degree of its impact. In the example shown in the figure, a linear pattern is formed, but a pattern may be formed by arranging linear, rectangular, or circular patterns on a straight line.

3. Skew Line FIG. 13 is a diagram schematically showing an example of a TEG pattern. The purpose of this pattern is to obtain the surface electrode layer resistance Rs_TCO_F and the contact resistance Rs_CON at the second scribe line 142. A second separation groove 145 (first / third / first scribe line) that intersects at an angle that is not perpendicular to the X direction is inserted into the subcell 140 to produce n parallelogram-shaped minicells 170a to 170c. The lengths in the hypotenuse direction between the n minicells 170a to 170c are LI1 to LIn. Here, since the minicells 170a to 170c can be regarded as distributed constant circuits, Rs_TCO_F and Rs_CON are calculated using the correction coefficient α so as to minimize the error of the simultaneous equations of the following equations (3-1) to (3-n). .

Rs1 = Rs_CON + α · LI1 · Rs_TCO_F (3-1)
Rs2 = Rs_CON + α · LI2 · Rs_TCO_F (3-2)
......
Rsn = Rs_CON + α · LIn · Rs_TCO_F (3-n)

Thereby, the measurement result (measured value) can be divided into the surface electrode layer resistance and the contact resistance. Then, a characteristic evaluation is performed for each of the obtained Rs_TCO_F and Rs_CON to determine whether or not it has a standard characteristic value, and which characteristic has a strong influence on the measurement result (measured value). Judge and quantify the degree of the impact.

4). FIG. 14 is a diagram schematically illustrating an example of a TEG pattern. The purpose of this pattern is to obtain the surface electrode layer resistance Rs_TCO_F and the contact resistance Rs_CON at the second scribe line 142. The second separation grooves 145 (first / third / first scribe lines) are inserted into the minicells 170a and 170b, and n mini-cells 170a and 170b having a meander shape (a zigzag shape) are produced. The number of folds between the n minicells 170a and 170b is n1 to nn. Here, since the minicells 170a and 170b can be regarded as distributed constant circuits, Rs_TCO_F and Rs_CON are obtained using the correction coefficient α so as to minimize the error of the simultaneous equations of the following equations (4-1) to (4-n).

Rs1 = Rs_CON + α · n1 · Rs_TCO_F (4-1)
Rs2 = Rs_CON + α · n2 · Rs_TCO_F (4-2)
......
Rsn = Rs_CON + α · nn · Rs_TCO_F (4-n)

5. Nakako (second scribe line)
FIG. 15 is a diagram schematically showing an example of a TEG pattern, where (a) is a plan view and (b) is a DD cross-sectional view of (a). The purpose of this pattern is to obtain the contact resistance Rs_CON of the front electrode layer 111 / back electrode layer 130. Here, n minicells 170a and 170b having the same area are prepared, and n1 to nn second scribe lines 172 are intentionally provided in each minicell 170a and 170b. The scribe direction is not particularly limited in the above-described core 2 (third scribe line 171), but the second scribe line 172 applied with this TEG pattern is perpendicular to the direction (Y direction) in which the subcells 140 are connected in series. In other words, it is parallel to the long side direction (X direction) of the elongated subcell 140. Since the series resistance decreases in accordance with the number of second scribe lines 172 formed in the

minicells

170a and 170b, the error of the simultaneous equations of the following equations (5-1) to (5-n) is minimized. Rs and Rs_CON are obtained.

Rs1 = Rs + Rs_CON / n1 (5-1)
Rs2 = Rs + Rs_CON / n2 (5-2)
......
Rsn = Rs + Rs_CON / nn (5-n)

This allows the measurement result (measured value) to be divided into series resistance and contact resistance. Then, the characteristics of each of the obtained Rs and Rs_CON are evaluated to determine whether or not they have standard characteristic values, and which characteristic is strongly influenced by the measurement result (measured value). Judge and quantify the degree of the impact.

6). Surface TCO / a-Si contact (TLM)
FIG. 16 is a diagram schematically showing an example of a TEG pattern, where (a) is a plan view, (b) is a cross-sectional view taken along line FF in (a), and (c) is another example. FIG. This pattern is intended to be divided into a resistance Rs_TCO_F of the surface electrode layer 111 and a contact resistance Rs_CON_TCO-Cell between the surface electrode layer 111 and the photoelectric conversion cell 120. In this pattern,

second separation grooves

145A and 145B are formed across three adjacent subcells 140-1 to 140-3.

The

first separation grooves

146A and 146B and the

second separation grooves

145A and 145B that separate the minicells 170f to 170i have different depths depending on the location. The first separation groove 146A is constituted by a third scribe line 146a, while the first separation groove 146B is constituted by a third scribe line 146a and a fourth scribe line 146b. Further, the second separation groove 145A is constituted by a fourth scribe line 145c, and the second separation groove 145B is constituted by a third scribe line 145b and a fourth scribe line 145c.

In the example of FIG. 16, the second separation groove 145B is disposed between each of the three second separation grooves 145A. In this way, two sets of minicells adjacent on the left and right sides across the second separation groove 145B are set as one set, and n sets (n is set so that only the width of the left region is different without changing the width of the right region). 2 or more natural numbers). Here, one set of

minicells

170f and 170g sandwiching the second separation groove 145B, and one set of minicells 170h and 170i sandwiching the second separation groove 145B. In each set, the dimensions in the X direction of the minicells 170g and 170i arranged on the right side are equal, and the dimensions in the X direction of the minicells 170f and 170h arranged on the left side are different.

At the time of measurement, series resistances Rs1 to Rsn are measured using the region on the right side of the minicell separated by the second separation groove 145B (third scribe line 145b) in the drawing. At this time, if the width in the X direction of the left region is L1 to Ln, Rs_TCO_F increases in proportion to L, so that the errors in the simultaneous equations of the following equations (6-1) to (6-n) are minimized. Rs_TCO_F and RS_CON_TCO-Cell are calculated.

Rs1 = Rs_TCO_F · L1 + RS_CON_TCO−Cell (6-1)
Rs2 = Rs_TCO_F · L2 + RS_CON_TCO−Cell (6-2)
......
Rsn = Rs_TCO_F · Ln + RS_CON_TCO-Cell (6-n)

Thereby, the measurement result (measured value) can be divided into the surface electrode layer resistance and the contact resistance. Then, each of the obtained Rs_TCO_F and Rs_CON_TCO-Cell is evaluated for characteristics to determine whether or not it has a standard characteristic value, and the measurement result (measured value) is strongly influenced by which characteristic. And quantify the degree of the impact.

Alternatively, as shown in FIG. 16 (c), a hole 147 is formed by a plurality of third scribe lines in the photoelectric conversion cell 120 of the left minicell 170h of one set, and a measurement terminal is directly connected from the hole 147. It may be dropped on the surface electrode layer 111.

7). FIG. 17 is a diagram schematically showing an example of a TEG pattern, (a) is a plan view, and (b) is a diagram schematically showing a potential distribution in a minicell under measurement. (C) is a plan view schematically showing the state of measurement of the minicell. The purpose of this pattern is to acquire the temperature characteristics of the photoelectric conversion cell 120. In this pattern, two second separation grooves 145A are formed across three adjacent subcells 140-1 to 140-3, and are separated by the two second separation grooves 145A of the subcells 140-1 and 140-3. One second separation groove 145C is formed in the center of the region. These

second separation grooves

145A and 145C are constituted by a fourth scribe line 145c.

Also, the depths of the

first separation grooves

146A and 146B separating the subcells 140-1 to 140-3 differ depending on the location. The first separation groove 146A is constituted by a third scribe line 146a, while the first separation groove 146B is constituted by a third scribe line 146a and a fourth scribe line 146b.

As shown in FIG. 17B, during measurement, the minicell 170j in the figure is used, and the temperature is raised by Joule heat by flowing a temperature-raising bias current through the front electrode layer 111 and the back electrode layer 130. As shown in FIG. 17C, the measurement terminal 201A (IV source meter 200A) of the back bias current / photoelectric conversion cell 120 is dropped at the right end and the left end of the minicell 170j. Further, the measurement terminal 201B (IV source meter 200B) of the surface bias current / photoelectric conversion cell 120 is dropped at the right end and the left end of the subcell below the minicell 170j. At this time, by using the potential difference between the

measurement terminals

201A and 201B of the

IV source meters

200A and 200B as the measurement bias voltage, the temperature-dependent current-voltage characteristics of the photoelectric conversion cell 120 can be obtained from the current value difference between the

IV source meters

200A and 200B. Can be acquired. The temperature itself may be separately measured using a thermocouple, a radiation thermometer, a thermography, or the like.

Also, by setting the measurement bias voltage to 0, the temperature characteristics of the resistance values of the front electrode layer 111 and the back electrode layer 130 can be acquired.

Thus, the measurement result (measured value) can be divided into the temperature characteristics of the front and back electrode layers and the temperature characteristics of the photoelectric conversion cell. Then, perform a characteristic evaluation for each temperature characteristic, determine whether or not it has a standard characteristic value, determine which characteristic the measurement result (measurement value) is strongly influenced by, Quantify the degree of impact.

<TEG layout>
Below, the layout of the TEG pattern arrange | positioned at the thin film solar cell module 100 is demonstrated. The TEG pattern arranged in these layouts is any one of the TEG patterns 1 to 7 described above.

1. FIG. 18 is a diagram schematically illustrating an example of a TEG layout. The purpose of this layout is to obtain in-plane uniformity of TEG inspection results. Therefore, the arrangement is such that the minicells (TEG patterns) are uniformly distributed in the substrate surface. In the figure, as an example, minicells 170a to 170e (TEG patterns) are provided in a total of five regions including the center and four corners of the thin film solar cell module 100. In addition, a total of 25 TEG patterns of 5 × 5 in the X direction and the Y direction may be provided. The arrangement of the TEG pattern can be determined according to the distribution characteristics of a target process (for example, a conductive film formation process, a semiconductor film formation process, a scribe process, etc.). For example, a CVD method in which film formation is often performed in one chamber often has an elliptical distribution from the center to the outer periphery, whereas a PVD method in which film formation is often performed in-line is only one-dimensional in a direction perpendicular to the moving direction. The TEG pattern is arranged according to such distribution characteristics.

2. Edge FIG. 19 is a diagram schematically illustrating an example of a TEG layout. The purpose of this layout is to acquire damage caused by the fourth scribe line applied before the tab line is pasted. Therefore, the minicell 170 (TEG pattern) is provided along the outer periphery of the glass substrate (thin film solar cell module 100). The TEG pattern may be provided entirely along the outer periphery of the glass substrate, or the TEG pattern may be provided at predetermined intervals along the outer periphery of the glass substrate.

3. FIG. 20 is a cross-sectional view schematically showing an example of a TEG layout. The purpose of this layout is to manage the quality of the texture according to the shift amount of the TEG measurement result when texture glass is used for the glass substrate 101. A TEG pattern is arranged in each of the

regions

101a and 101b of the surface roughness 102 of the glass substrate 101 having a plurality of surface roughnesses 102 by a texturing process.

<TEG inspection method>
The TEG pattern arranged in the TEG layout described above on the thin film solar cell module 100 is inspected, but the inspection method of each TEG pattern is different depending on the information to be acquired. Hereinafter, the TEG inspection method will be described.

1. IV-Dark
Evaluate current-voltage characteristics in dark state or under light bias. The shunt resistor Rsh_D is obtained from the reverse current-voltage characteristics, and the shunt diode D characteristics (recombination current component, diffusion current component) and series resistance (Rs_TCO_F, Rs_BK, Rs_CON) are obtained from the forward current-voltage characteristics. be able to.

2. IV-Photo
Photocurrent-voltage characteristics are evaluated in a bright state or under an optical bias. Various information can be obtained by changing not only the normal solar cell characteristics (conversion efficiency, short-circuit current, open-circuit voltage, curvature factor, etc.) but also the intensity and spectrum of irradiation light.

3. ZV-Dark
Impedance-voltage characteristics are evaluated in the dark state or under light bias. Information such as the built-in potential of the diode, the doping concentration, the defect concentration, the equivalent film thickness of the pin stack, and the shunt component in the film thickness direction can be acquired.

Note that the TEG pattern, TEG layout, and TEG inspection method described above may be interdependent, but can be used in combination independently.

Next, a solar cell module manufacturing management apparatus using the thin-film solar cell module 100 having a TEG and a solar cell module manufacturing method will be described. FIG. 21 is a block diagram schematically showing an example of the configuration of the solar cell module manufacturing management apparatus according to this embodiment. The solar cell module production management apparatus 10 includes a surface electrode layer film forming apparatus 21, a semiconductor film film forming apparatus 22, a back surface transparent conductive film forming apparatus 23, a back electrode film forming apparatus 24, and a scribe that manufacture the thin film solar cell module 100. It is connected to the line forming device 25, and it is necessary to discard the thin-film solar cell module 100 manufactured using information obtained from the measurement result of the TEG pattern, and to correct the process conditions in each of the connected devices. Device.

The solar cell module manufacturing management device 10 includes a TEG measurement unit 11, an electrical property measurement unit 12, a property value calculation condition storage unit 13, a property value calculation unit 14, a reference value storage unit 15, and a discard determination unit 16. A process management information storage unit 17 and a process condition correction unit 18.

The TEG measurement unit 11 uses the TEG of the manufactured thin-film solar cell module 100 to perform measurement for obtaining primary characteristic information by a predetermined TEG inspection method. The TEG measurement unit 11 has a different configuration depending on the acquired primary characteristic information, and is configured by a device that executes the methods indicated by the TEG inspection methods 1 to 3 described above. The measurement value of the primary characteristic information is obtained by the measurement according to the TEG inspection method by the TEG measurement unit 11. The primary characteristic information is characteristic information related to the minicell in which the TEG pattern is formed, and there is information directly related to the process conditions described later, but is usually information indirectly related to a plurality of process conditions. Examples of such primary characteristic information include a current value flowing through the minicell, a series resistance value of the minicell, and the like.

The electrical property measuring unit 12 measures electrical properties of a thin-film solar cell configured by attaching a plurality of thin-film solar cell modules 100 with tabs. For example, conversion efficiency, short-circuit current, open-circuit voltage, curvature factor, and the like are measured as primary characteristic information by a solar simulator.

The characteristic value calculation condition storage unit 13 acquires secondary characteristic information that is secondary characteristic information from measurement values that are primary characteristic information obtained by the TEG measurement unit 11 and the electrical characteristic measurement unit 12. Or the characteristic value calculation conditions used when acquiring the third characteristic information, which is the third characteristic information, from the second characteristic information.

For example, in the case of one different size cell of the above TEG pattern, the error of the simultaneous equations expressed by the equations (1-1) to (1-n) is minimized from the measured current value flowing through the minicell. A current component Is caused by a pn junction of a large cell bulk and a leaky current component IL around the scribe line are obtained. Here, the expressions (1-1) to (1-n) are the characteristic value calculation conditions necessary for acquiring the secondary characteristic information, and Is and IL are the secondary characteristic information. The same applies to other TEG patterns.

In addition, the recombination leakage component J02 can be obtained by performing the junction characteristic evaluation by the two-diode model shown in the following formula (7) on the current component Is caused by the cell bulk pn junction obtained above.
Is = J01 (exp (q (V−Is · Rs) / kT) −1)
+ J02 (exp (q (V−Is · Rs) / 2kT) −1) (7)

Where V is the applied voltage, Rs is the total series resistance, J01 and J02 are diode saturation currents, q is the elementary charge, k is the Boltzmann constant, and T is room temperature. Although not described, it is known that the applied voltage V and the total series resistance Rs can be calculated using Is.

In this case, equation (7) is a characteristic value calculation condition necessary for acquiring the third characteristic information, and J02 is the third characteristic information.

The characteristic value calculation unit 14 performs a process of calculating secondary characteristic information from the measurement value obtained by the TEG measurement unit 11 using the characteristic value calculation condition in the characteristic value calculation condition storage unit 13. In addition, a process for calculating the third characteristic information from the first characteristic information and the calculated second characteristic information using the characteristic value calculation condition in the characteristic value calculation condition storage unit 13 is performed.

The reference value storage unit 15 stores values (or ranges) of characteristic information necessary for the thin film solar cell module 100 and the thin film solar cell as products. The reference value is held corresponding to the secondary characteristic information and the primary characteristic information which is a measurement result measured by the electrical characteristic measurement unit 12.

The discard determination unit 16 compares the secondary characteristic information obtained from the characteristic value calculation unit 14 or the measurement value obtained by the electrical characteristic measurement unit 12 with a reference value stored in the reference value storage unit 15, It is determined whether the produced thin film solar cell module 100 or the thin film solar cell is to be discarded. Specifically, if the secondary characteristic information or measurement value does not satisfy the reference value, the target is discarded. If the secondary characteristic information or measurement value satisfies the reference value, the target is discarded. Must not. Since one thin-film solar cell module 100 is provided with a plurality of TEGs, the average value of the secondary characteristic information in the plurality of TEGs is used to determine whether or not to be discarded. If there is any TEG that does not satisfy the reference value, it can be determined to be discarded.

The process management information storage unit 17 stores process management information in which characteristic information (secondary characteristic information or tertiary characteristic information) is associated with a process condition for setting the characteristic information to a desired value. For example, when the characteristic information is recombination leakage current, the process condition is the film formation condition of the photoelectric conversion cell 120 (semiconductor film) formed by the CVD method, for example, the gas flow rate, the pressure, the substrate temperature, and the RF power film thickness direction. Conditional profiling and other conditions. As the process management information, for example, process conditions for obtaining a desired recombination leakage current value are determined and stored for each recombination leakage current value. The process conditions for each recombination leakage current are obtained in advance by experiments.

The process condition correction unit 18 acquires a process condition corresponding to the characteristic information obtained by the characteristic value calculation unit 14 from the process management information storage unit 17, and sets a correction condition for correcting the current process condition based on the process condition. Then, the correction condition is reflected on the apparatus for manufacturing the thin-film solar cell module 100.

22 to 23 are flowcharts showing an example of the procedure of the method for manufacturing the solar cell module according to this embodiment. FIGS. 24-1 to 24-6 are diagrams schematically showing an example of the procedure of the manufacturing method of the solar cell module according to this embodiment, and (a) in each drawing is a top view, b) is a sectional view taken along line EE of FIG.

First, a cleaning process is performed on the glass substrate 101 to remove contamination attached to the surface of the glass substrate 101 (step S11). Next, a surface electrode layer 111 is formed on the glass substrate 101 by a film forming method such as a sputtering method (step S12, FIG. 24-1), and a first extending in the X direction by a P1 scribe process using a laser scribe method. Scribe lines 141 are formed at predetermined intervals in the Y direction (step S13, FIG. 24-2). Further, at this time, a pair of first scribe lines 145a constituting the second separation grooves are also formed in a direction intersecting the X direction at a position to be an end portion of the minicell.

Thereafter, a semiconductor film (photoelectric conversion cell 120) is formed on the surface electrode layer 111 separated by the

first scribe lines

141 and 145a by a film forming method such as a CVD method (step S14). As the semiconductor film, for example, a laminated film of a p-type amorphous silicon film, an i-type amorphous silicon film, and an n-type amorphous silicon film can be exemplified. Subsequently, the back transparent conductive film 131 is formed on the semiconductor film by a film forming method such as sputtering (step S15, FIG. 24-3).

Next, a second scribe line 142 extending in the X direction is formed at a predetermined interval in the Y direction at a position different from the first scribe line 141 by a P2 scribe process using a laser scribe method (step S16, FIG. 24). -4). As described above, the second scribe line 142 forms the groove by processing the back transparent conductive film 131 and the semiconductor film at the same time. At this time, the second scribe line 142 may also be formed in the region where the minicell is formed. The presence or absence of this formation depends on what kind of minicell is produced.

Thereafter, a back electrode film 132 is formed on the back transparent conductive film 131 on which the second scribe line 142 is formed by a method such as sputtering (step S17, FIG. 24-5). At this time, the back electrode film 132 is also formed in the second scribe line 142 (groove), and the front electrode layer 111 and the back electrode film 132 are connected. Next, third scribe lines 143 extending in the X direction at different positions from the first and

second scribe lines

141 and 142 are formed at predetermined intervals in the Y direction by a P3 scribe process using a laser scribe method ( Step S18, FIG. 24-6). As described above, the third scribe line 143 forms a groove by simultaneously processing the back electrode film 132, the back transparent conductive film 131, and the photoelectric conversion cell 120 (semiconductor film). At this time, the second separation is performed in the same direction as the extension direction of the pair of first scribe lines 145a so as to be positioned between the pair of first scribe lines 145a intersecting the X direction that defines the minicell produced in step S13. A third scribe line 145b constituting the groove is formed. As described above, the thin-film solar battery module 100 having the TEG pattern in which the subcells 140 are connected in series and partially constituted by the minicells 170 is formed.

Then, TEG measurement is performed by the TEG measurement part 11 using TEG in the thin film solar cell module 100 (step S19). Using the measurement value that is the primary characteristic information obtained by the TEG measurement, the characteristic value calculation unit 14 performs a characteristic value calculation process (step S20). The characteristic value calculation process is to obtain characteristic information related to each process so that the influence of each process in steps S12 to S18 can be specified.

FIG. 23A is a flowchart showing an example of a specific processing procedure of the characteristic value calculation processing. First, the characteristic value calculation unit 14 calculates secondary characteristic information using the characteristic value calculation condition and the measured value in the characteristic value calculation condition storage unit 13 (step S31). For example, the information (secondary characteristic information) to be calculated is calculated using the formulas (1-1) to (6-n) of <TEG pattern> described above.

Next, the characteristic value calculation unit 14 calculates the third characteristic information using the characteristic value calculation condition, the measured value, and the second characteristic information in the characteristic value calculation condition storage unit 13 (step S32). For example, information to be calculated (third characteristic information) is calculated using the above-described equation (7). Thus, the characteristic value calculation process ends. Although the calculation up to the third characteristic information is performed here, the purpose is to obtain the electric characteristics of the desired element among the elements as shown in FIG. 5, so that the electric characteristics of the desired element can be obtained. For example, the process may be completed until the calculation of the secondary characteristic information, or the calculation process after the fourth characteristic information may be performed.

Then, returning to FIG. 22, the discard determination unit 16 determines whether or not to discard the thin film solar cell module 100 to be measured (step S21). Specifically, the discard determination unit 16 determines whether the measured value or the calculated characteristic information (secondary characteristic information or third characteristic information) satisfies a reference value that is a standard value as a product. . Here, when the reference value is satisfied, the product is used without being discarded, and when the reference value is not satisfied, the product is discarded. The discard determination can be performed using, for example, photoelectric conversion efficiency, short-circuit current, open-circuit voltage, curvature factor, and the like.

When it is determined to be discarded (Yes in step S21), the manufactured thin-film solar cell module 100 is discarded (step S27).

On the other hand, when it is not determined to be discarded (in the case of No in step S21), for example, the electrical characteristics (characteristic information) of each element as shown in FIG. It is determined whether or not the electrical characteristics are within an appropriate range, and when the electrical characteristics are not within the appropriate range, a process condition correction process for correcting the process conditions in the subsequent manufacture of the thin film solar cell module is performed (step S22).

FIG. 23B is a flowchart illustrating an example of a specific processing procedure of the process condition correction processing. The process condition correction unit 18 includes certain elements (for example, the resistance of the front electrode layer 111, the resistance of the back electrode layer 130, the contact resistance between the back electrode layer 130 / the front electrode layers 111, and the shunt, which constitute the TEG shown in FIG. The electrical characteristics of the diode, shunt resistor, etc. are acquired (step S51). The electrical characteristics are acquired from the characteristic information calculated in the characteristic value calculation process in step S20.

Next, the process condition correction unit 18 determines whether the electrical characteristics of the acquired element are within an appropriate range (step S52). Specifically, a reference value corresponding to the electrical characteristic of the acquired element is acquired from the reference value storage unit 15, and the two are compared to determine whether the electrical characteristic of the acquired element is an appropriate value. If the acquired electrical characteristics of the element are not within the appropriate range (No in step S52), the process condition correction unit 18 sets the process condition in which the electrical characteristics of the element have a desired value as the process management information. Obtained from the process management information in the storage unit 17 (step S53). Then, the process condition correction unit 18 corrects the process condition of the process related to the element (any one of the process steps S12 to S18) with the acquired process condition (step S54), and the process condition correction process ends. Then, the process returns to FIG.

On the other hand, when the electrical characteristics of the acquired element are within a desired range (Yes in step S52), the process condition correction unit 18 corrects the processing condition (process condition) of the process related to the element. If not performed (step S55), the process condition correction process ends, and the process returns to FIG.

In this process condition correction process, a plurality of correlated characteristic conditions (electrical characteristics) are separated from the measured values, and among the separated characteristic conditions, a characteristic condition deviating from a desired value (proper value) is extracted. Of the manufacturing processes of the thin-film solar cell module 100, processes that are not performed under appropriate conditions can be extracted. And the performance of the thin film solar cell module manufactured after that can be prevented from further deteriorating by changing the process condition of the manufacturing process. That is, by extracting parameters (characteristic information) indicating the suitability of processing in each processing step, it is possible to determine the suitability of the processing conditions in each processing step, and to correct the processing conditions based on the parameters. Can do.

Then, returning to FIG. 22, tab wires are attached to the thin film solar cell modules 100 that are not to be discarded (step S23), and the plurality of thin film solar cell modules 100 are connected in series or in parallel. Subsequently, the plurality of thin film solar cell modules 100 connected by tab wires are sealed (step S24), and a thin film solar cell is manufactured. Next, the electrical property measuring unit 12 measures electrical properties of the manufactured thin film solar cell (step S25).

Thereafter, the discard determination unit 16 determines whether or not to discard the manufactured thin-film solar cell (step S26). Specifically, the discard determination unit 16 compares the measured value, which is the primary characteristic information obtained by the electrical characteristic evaluation, with the reference value indicating the standard as the product in the reference value storage unit 15, It is determined whether or not desired electrical characteristics are obtained for the thin film solar cell. When the desired electrical characteristics are obtained (No in step S26), the thin film solar cell is sorted as a product. If the desired electrical characteristics are not obtained (Yes in step S26), the thin film solar cell is discarded (step S27). Thus, the manufacturing process of the thin film solar cell is completed.

Conventionally, in the P1 scribe process in step S13, the P2 scribe process in step S16, and the P3 scribe process in step S18, the subcell 140 is divided so as to operate as an integrated solar cell module. At this time, in each of the scribe processes S13, S16, and S18, various films are removed in an appropriate pattern so that the subcells 140 are connected in series. In this embodiment, a TEG pattern is newly added in the scribe processes S13, S16, and S18 so that the subcell 140 and the minicell 170 can be simultaneously formed. No additional process is necessary. However, the addition of the process does not limit the effect of the present invention, and it is also possible to newly add steps such as lead electrode formation and insulating film formation according to the required TEG pattern. .

In the above description, the case where various parameters are extracted in the process of evaluating the electrical characteristics of the TEG pattern and the condition correction amount is determined with reference to the process management information has been described. However, the parameters can be appropriately extracted by in-line inspection. May be.

Here, a specific example of process management processing will be described. Using a cell incorporating a different size cell pattern corresponding to TEG pattern 1, IV-Dark measurement of TEG inspection method 1 is performed, and cell bulk current component Is is extracted from the total current. Junction characteristics evaluation is performed on the extracted cell bulk current component Is using a two-diode model according to equation (7). Here, the recombination leak component, power generation efficiency, and curvature factor are calculated.

FIG. 25 is a diagram showing an example of the state of the characteristic parameters before and after correcting the CVD process conditions from the TEG measurement results. In this figure, the values of the recombination leak component, the power generation efficiency, and the curvature factor are normalized with the corrected value as 100%. Further, the film formation temperature and the power profile indicate process conditions changed from the TEG measurement results.

As shown in FIG. 25, before the condition correction, both the power generation efficiency and the curvature factor are degraded as compared with the corrected value (appropriate value). Further, since the recombination leak component is considerably different from that after correction (appropriate value), the deterioration of the power generation efficiency and the curvature factor is the recombination leak component, that is, the formation of the semiconductor film (photoelectric conversion cell 120) in step S14. It can be estimated that the membrane treatment is the cause.

Assuming that microcrystalline silicon is used as the semiconductor film, the conditions for feedback correction from the TEG evaluation result include gas flow rate, pressure, substrate temperature, RF power, and condition profiling in the film thickness direction. This time, the pressure is 1200 Pa, the H ₂ flow rate is 15 SLM, the SiH ₄ flow rate is 0.3 SLM, the electrode / stage interval is 13.2 mm, the film forming temperature is 180 ° C., and the RF power profile in the film thickness direction. It is assumed that the semiconductor film is formed with the initial 6 kW and the latter 6 kW.

Among these, the film formation temperature is changed from 180 ° C. to 160 ° C., and the process condition is corrected so that the profile in the film thickness direction of the RF power is changed from the initial 6 kW to the late 6 kW to the initial 6 kW. In this way, it was confirmed that the recombination leak component returns from 163% by changing the process conditions. Along with this change, it can be confirmed that the power generation efficiency and the curvature factor also return from 90.6% and 97.5%, respectively. From the above, it can be confirmed that the use of the TEG evaluation results for process management is also useful in the production of thin film solar cells.

According to this embodiment, since the thin film solar cell module 100 is provided with the TEG, the process condition feedback control is performed so that the thin film solar cell module 100 can obtain desired characteristics from the measurement result using the TEG. It has the effect that it can be executed. In addition, since the TEG pattern is arranged in the substrate surface so as to be connected in series with the adjacent subcells, the TEG region itself also operates as a subcell (power generation region) in the module, and suppresses a decrease in characteristics due to the introduction of TEG. Has the effect of being able to.

Further, by using the TEG, the measurement result can be separated into the characteristics of the elements constituting the thin film solar cell module 100, the manufacturing process of the thin film solar cell module 100 related to the characteristics of the elements is obtained, and the thin film Even in the manufacture of the solar cell module 100, the process management can be executed. In addition, a plurality of TEGs can be provided on the substrate surface, and the correlation between the measurement results makes it easier to determine the amount of correction across multiple processes, which is difficult with a single layout, allowing more complex process management. it can.

10 solar cell module manufacturing management device, 11 TEG measurement unit, 12 electrical property measurement unit, 13 property value calculation condition storage unit, 14 property value calculation unit, 15 reference value storage unit, 16 disposal determination unit, 17 process management information storage unit , 18 process condition correction unit, 21 surface electrode layer deposition apparatus, 22 semiconductor film deposition apparatus, 23 back transparent conductive film deposition apparatus, 24 back electrode film deposition apparatus, 25 scribe line formation apparatus, 100 thin film solar cell module , 101 glass substrate, 111 surface electrode layer, 120 photoelectric conversion cell, 121 p-type semiconductor film, 122 i-type semiconductor film, 123 n-type semiconductor film, 130 back electrode layer, 131 back transparent conductive film, 132 back electrode film, 140 , 140-1 to 140-3, 140a subcell, 141, 145a Scribe line, 142, 172, second scribe line, 143, 145b, 146a, 171, third scribe line, 145, 145A to 145C, second separation groove, 145c, fourth scribe line, 146, 146A, 146B, first separation groove, 170 , 170a to 170j, minicell, 200 measuring device, 201a, 201b probe pin, 202 guard pin driver, 203a, 203b guard pin.

Claims

Subcells in which a laminated film having a first electrode layer, a photoelectric conversion cell, and a second electrode layer are separated by a first separation groove extending in the first direction are connected in series in a second direction intersecting the first direction. A solar cell module disposed on a substrate as in
A minicell group including a plurality of minicells formed in the subcell by forming a plurality of second separation grooves extending in the second direction across two or more subcells adjacent in the second direction. ,
The first separation groove electrically connects the subcells adjacent in the first direction in series, and the first electrode layer is configured to separate the subcells adjacent in the second direction. A second removal part for removing a part of the photoelectric conversion cell so as to electrically connect a first removal part for removing a part of the first electrode layer and the second electrode layer of the subcell adjacent to the first electrode layer. And a third removal unit for removing a part of the photoelectric conversion cell and the second electrode layer so as to electrically insulate between the adjacent subcells,
The second separation groove electrically insulates between the stacked films in the adjacent regions across the second separation groove, and includes a fourth removal unit that removes a part of the first electrode layer. A fifth removal unit for removing a part of the photoelectric conversion cell, a sixth removal unit for removing a part of the second electrode layer and the photoelectric conversion cell, the second electrode layer, and the photoelectric conversion cell, A solar cell module comprising: at least one of a seventh removal section that removes a part of the first electrode layer.
The solar cell module according to claim 1, wherein a plurality of the minicell groups are arranged in the substrate surface.
The solar cell module according to claim 1 or 2, wherein the minicell group includes a plurality of the minicells each having a different area / circumference ratio.
The solar cell module according to any one of claims 1 to 3, further comprising at least one type of removing portion among the fourth removing portion to the seventh removing portion inside the region of the minicell. .
The solar cell module according to any one of claims 1 to 4, wherein the second separation groove is formed to extend in the second direction.
The second separation grooves located at both ends of the first direction separating the minicell group from other regions extend in a direction perpendicular to the first direction;
5. The method according to claim 1, wherein the second separation groove formed in the minicell group extends in a direction intersecting at an angle that is not perpendicular to the first direction. The solar cell module described.
The minicell group has a plurality of the minicells in which a meander shape is formed by the second separation groove inside the region,
The solar cell module according to any one of claims 1 to 4, wherein the minicells have different meander-shaped folding numbers.
The substrate has a plurality of regions of different surface roughness;
The solar cell module according to any one of claims 1 to 7, further comprising a plurality of the minicells having the same shape in each of the regions having different surface roughnesses.
The solar cell module according to any one of claims 1 to 8, wherein the first removal unit to the fourth removal unit have a shape in which straight lines, rectangles, or circles are arranged on a straight line.
A first electrode layer forming step of forming a first electrode layer on the substrate;
A first removal step of removing a part of the first electrode layer to form a first removal portion;
A photoelectric conversion cell forming step of forming a photoelectric conversion cell on the substrate on which the removed first electrode layer is formed;
A second removal step of removing a part of the photoelectric conversion cell to form a second removal portion;
A second electrode layer forming step of forming a second electrode layer on the substrate on which the first electrode layer and the photoelectric conversion cell are formed;
A third removal step of forming a third removal portion by removing a part of the photoelectric conversion cell and the second electrode layer;
A fourth removal step of removing a part of the first electrode layer, the photoelectric conversion cell, and the second electrode layer to form a fourth removal portion;
A method for producing a solar cell module comprising:
Using the first removal step, the second removal step, and the third removal step, a first removal portion, a second removal portion, and a third removal portion that are formed along the first direction. Forming a plurality of 1 separation grooves and forming a plurality of subcells adjacent to each other in a second direction intersecting the first direction;
Using at least one of the first removal step, the second removal step, the third removal step, and the fourth removal step, the first removal unit and the second removal along the second direction Forming a plurality of minicells by forming at least two or more adjacent subcells by forming a second separation groove composed of any one of the first removal portion, the third removal portion, and the fourth removal portion. A minicell group forming process,
A measurement step of electrically measuring the minicell;
A characteristic for calculating characteristic information corresponding to the first electrode layer forming process, the photoelectric conversion cell forming process, the second electrode layer forming process, and the first to fourth removing processes from the measurement result in the measuring process. Information calculation process;
A condition correction step for correcting the conditions of the film formation step or the first to fourth removal steps from the calculated characteristic information;
The manufacturing method of the solar cell module characterized by including.
In the measuring step, electrically measure a plurality of the minicell groups arranged in the substrate surface,
The method for manufacturing a solar cell module according to claim 10, wherein in the characteristic information calculation step, characteristic information is calculated based on correlations between measurement results of the minicell groups at a plurality of locations.
A first electrode layer forming device that forms a first electrode layer on a substrate, a photoelectric conversion cell forming device that forms a photoelectric conversion cell on the substrate, and a second electrode layer that forms a second electrode layer on the substrate Connected to the forming apparatus, the scribe line forming apparatus for removing a part of the first electrode layer, the photoelectric conversion cell and the second electrode layer, and the series of apparatuses. In the solar cell module manufacturing management device to manage,
Minicell measuring means for measuring using minicells formed in the solar cell module;
From the measurement result by the minicell measurement means, characteristic value calculation means for calculating characteristic information of a plurality of elements constituting the solar cell module corresponding to the processing content in each device,
Process management information storage means for storing process management information for managing processing conditions corresponding to processing of the element for each value of the characteristic information of the element so that the characteristic information of the element falls within a desired range;
It is determined whether or not the calculated characteristic information exists within a desired range, and when the calculated characteristic information does not exist within the desired range, a processing condition for making the calculated characteristic information within the desired range is acquired from the process management information And process condition correction means for setting the acquired processing condition in a corresponding device;
A solar cell module production management device comprising: