TW201511306A - Passivated emitter rear contact solar cell and method of manufacturing the same - Google Patents

Abstract

A passivated emitter rear contact solar cell including a p-type silicon wafer, a N-type doping layer, a front dielectric layer, a front contact electrode, a back dielectric layer, a first back contact electrode and a second back contact electrode is provided. A back side of the p-type silicon wafer has a bus-bar region and the other region excluding the bus-bar region. The back dielectric layer has a first opening pattern located at the bus-bar region and a second opening pattern located at the other region excluding the bus-bar region, wherein the first opening pattern and the second opening pattern expose the p-type silicon wafer. The first opening pattern of the back dielectric layer is different from the second opening pattern of the back dielectric layer.

Description

Passivated emitter back electrode twinned solar cell and method of manufacturing same

This invention relates to a solar cell, and more particularly to a passivated emitter back electrode twinned solar cell.

A solar cell is an energy-converting photovoltaic device. The basic structure of a typical solar cell can be divided into four main parts: a substrate, a P-N diode, an anti-reflection layer, and a metal electrode. Simply put, the working principle of a solar cell is that the P-N diode converts solar energy into an electron hole pair, and then conducts electric energy through the positive and negative electrodes.

In the prior art, a passivated emitter rear contact solar cell (PERC) with high efficiency is proposed, which mainly forms a dielectric layer on the back surface of the substrate, and is partially on the dielectric layer. The opening is removed, and the aluminum paste and the silver paste are printed on the back dielectric layer, and finally the aluminum electrode and the silver electrode are formed as a back electrode by a high temperature co-firing process. However, in the process of passivating the emitter back electrode twinned solar cell, the back side of the substrate is subjected to a single-side polishing process. The back surface of the substrate is made smooth so that the dielectric layer adheres to the back surface of the substrate to exert an effect of prolonging the carrier survival time. However, when a plurality of twinned solar cells are connected to each other to form a twinned solar cell module by using a bonding electrode and a backside silver electrode, the backside silver electrode and the substrate and the backside silver electrode are present due to the backside polishing process. The problem of insufficient adhesion between the dielectric layers causes the solar cell module to suffer from a problem of reduced reliability and low yield.

The invention provides a passivated emitter back electrode twin solar cell, thereby enhancing the adhesion between the backside silver electrode and the electrode and the back silver electrode and the substrate in the subsequent module process of the passivated emitter back electrode twin solar cell. To avoid the passivation of the emitter back electrode, the tantalum solar cell is connected in series to passivate the emitter back electrode, and the solar cell module is detached from the back silver electrode, thereby increasing the reliability and yield of the solar cell module.

The present invention provides a passivated emitter back electrode twinned solar cell comprising a P-type germanium wafer, an N-type doped layer, a front dielectric layer, a front side electrode, a back dielectric layer, a first back side electrode, and a second back side electrode. The P-type germanium wafer has a light-receiving surface and a back surface, and has a main gate line region on the back surface and other regions than the main gate line region. The N-type doped layer, the front dielectric layer, and the front surface electrode are on the light receiving surface of the P-type germanium wafer. The back dielectric layer is on the back surface of the P-type germanium wafer, and the back dielectric layer has a first opening pattern at the main gate line region and a second opening pattern at other regions, wherein the first opening pattern and the second opening pattern are exposed A P-type germanium wafer is produced. The first back electrode is on the back dielectric layer and is filled in the first opening pattern. The second back electrode is on the back dielectric layer and is filled in the second opening pattern. It is worth noting that the first opening pattern of the back dielectric layer is different from the second opening pattern.

The present invention further provides a method of fabricating a passivated emitter back electrode twinned solar cell comprising the following steps. First, a P-type germanium wafer having a light-receiving surface and a back surface is provided, wherein the P-type germanium wafer has a main gate line region on the back surface and other regions than the main gate line region. Next, an N-type doped layer is formed on the light-receiving surface of the P-type germanium wafer, and a front dielectric layer is formed on the N-type doped layer. Then, a back dielectric layer is formed on the back surface of the P-type germanium wafer such that the first dielectric pattern is formed in the main gate line region of the back dielectric layer, and the second opening pattern is formed in other regions of the back dielectric layer. It is to be noted that the first opening pattern is different from the second opening pattern, and the first opening pattern and the second opening pattern expose the P-type germanium wafer. Thereafter, a front surface electrode is formed on the front dielectric layer, and a first back surface electrode is formed on the back dielectric layer, so that the first back surface electrode is filled in the first opening pattern, and the second back surface electrode is formed on the back surface dielectric layer. So that the second back electrode is filled in the second opening pattern. Finally, the fabrication of the passivated emitter back electrode twinned solar cell is completed via a high temperature co-firing process.

In an embodiment of the invention, the first opening pattern includes a plurality of first sub-patterns that are independent of each other, and the second opening pattern includes a plurality of second sub-patterns that are independent of each other.

In an embodiment of the invention, the first width of the first sub-pattern is different from the second width of the second sub-pattern.

In an embodiment of the invention, the first sub-pattern and the second sub-pattern are respectively strip-shaped patterns.

In an embodiment of the invention, the first spacing between any two adjacent first sub-patterns is different from the second spacing between any two adjacent second sub-patterns. For example, the first spacing is, for example, less than the second spacing.

In an embodiment of the present invention, the first sub-pattern has a distribution pattern of a dotted line in the main gate line region, and the second sub-pattern is, for example, a distribution pattern of solid lines in the other regions. And the proportion of the first sub-pattern in the main gate line region is, for example, smaller than the proportion of the second sub-pattern in other regions.

In an embodiment of the invention, for example, the shape of the first sub-pattern is different from the second sub-pattern.

In an embodiment of the invention, the first sub-pattern and the second sub-pattern may be lines, dots, line segments, or a combination thereof, respectively.

In an embodiment of the invention, the passivated emitter back electrode twin solar cell may further include an electrode connected to the first back electrode.

In an embodiment of the invention, the p-type germanium wafer comprises a boron doped or gallium doped germanium wafer.

In an embodiment of the invention, the ratio of the total area of the first opening pattern and the second opening pattern in the back surface dielectric layer to the area of the back surface is between 0.5% and 15%.

In an embodiment of the invention, the back dielectric layer pattern is, for example, a single layer of Al _x O _y , SiO ₂ , Si _x N _y , Si _x N _y H _z , Si _x O _y N _z or SiC combination. Or multilayer structure.

In an embodiment of the invention, the front dielectric layer is, for example, a single layer or a multilayer structure of SiO ₂ , Si _x N _y , Si _x N _y H _z , Si _x O _y N _z or SiC combination.

In an embodiment of the invention, the region of the N-type doped layer corresponding to the front electrode may be a high concentration doped group V element (eg, phosphorus (P), arsenic (As)), and its surface resistance is, for example, It is less than or equal to 70 ohm/sq.

In an embodiment of the invention, the N-type doped layer corresponding to the region other than the front electrode may be a low concentration doped group V element (eg, phosphorus (P), arsenic (As)), and the surface thereof The resistance is, for example, greater than 70 ohm/sq.

In an embodiment of the invention, the N-type doping layer may be a high concentration doped Group V element (for example, phosphorus (P), arsenic (As)) corresponding to a portion of the region other than the front surface electrode.

The present invention further provides a passivated emitter back electrode twin solar cell comprising a P-type germanium wafer, an N-type doped layer, a front dielectric layer, a front electrode, a back dielectric layer, a first back electrode, and a second back electrode . The P-type germanium wafer has a light-receiving surface and a back surface, and has a main gate line region on the back surface and other regions than the main gate line region. The N-type doped layer, the front dielectric layer, and the front surface electrode are on the light receiving surface of the P-type germanium wafer. The back dielectric layer is on the back side of the P-type germanium wafer, and the pattern of the back dielectric layer in the main gate line region is different from the pattern of the back dielectric layer in other regions. The first back electrode is on the back dielectric layer. The second back electrode is on the back dielectric layer and is filled in the pattern of the other regions in the back dielectric layer.

In an embodiment of the invention, the back dielectric layer has a full coverage of the P-type germanium in the main gate line region, and the back dielectric layer has an opening pattern in other regions.

The invention provides a solar cell module comprising a plurality of passivated emitter back electrode twin solar cells and an electrode as described above, wherein the electrode is electrically connected between two adjacent passivated emitter back electrode twin solar cells.

In an embodiment of the invention, the front surface electrode, the first back surface electrode, and the second back surface electrode are formed by a high temperature co-firing process.

In an embodiment of the invention, the highest temperature of the high temperature co-firing process is greater than 600 °C.

Based on the above, by designing the pattern of the back dielectric layer in the main gate line region and the pattern in other regions to be different, the passivation emitter back electrode twin solar cell can be effectively enhanced in the subsequent module process. Adhesion between the electrode and the electrode and the silver electrode on the back surface to avoid passivation of the emitter back electrode, the twin crystal solar cell is connected in series to passivate the emitter back electrode, the silicon solar cell module is detached from the back silver electrode, and the solar energy is increased. Battery module reliability and yield.

The above described features and advantages of the invention will be apparent from the following description.

10‧‧‧Solar battery module

100‧‧‧ solar cells

110‧‧‧P type silicon wafer

120‧‧‧N-doped layer

130‧‧‧Positive dielectric layer

140‧‧‧Front electrode composition

140a‧‧‧front electrode

150, 250, 350, 450‧‧‧ back dielectric layer

152, 252, 352‧‧‧ first opening pattern

154, 254, 354, 454‧‧‧ second opening pattern

152a, 252a, 352a‧‧‧ first sub-pattern

154a, 254a, 354a, 454a‧‧‧ second sub-pattern

160‧‧‧First back electrode composition

160a‧‧‧First back electrode

170‧‧‧Second back electrode composition

170a‧‧‧second back electrode

180‧‧‧ welding rod

P1‧‧‧ first spacing

P2‧‧‧Second spacing

R1‧‧‧ main grid area

R2‧‧‧Other areas

S1‧‧‧Stained surface

S2‧‧‧Back

W1‧‧‧ first width

W2‧‧‧ second width

1 is a passivated emitter back electrode 矽 in accordance with a first embodiment of the present invention A schematic view of a crystalline solar cell.

Fig. 2 is a schematic view taken along line AA' of Fig. 1.

3 is a rear elevational view of a passivated emitter back electrode twinned solar cell in accordance with a first embodiment of the present invention.

Fig. 4A is an enlarged view of a portion B in Fig. 3.

4B through 4D are enlarged views of a portion B in accordance with various embodiments of the present invention.

5A through 5C are schematic views of a method of fabricating a passivated emitter back electrode twin solar cell in accordance with a first embodiment of the present invention.

Figure 6 is a schematic view of a solar cell module in accordance with a first embodiment of the present invention.

1 is a perspective view of a passivated emitter back electrode twin solar cell (hereinafter simply referred to as "solar cell") in accordance with a first embodiment of the present invention. Fig. 2 is a schematic view taken along line AA' of Fig. 1.

1 and 2, the solar cell 100 of the present embodiment includes a P-type germanium wafer 110, an N-type doped layer 120, a front dielectric layer 130, a front surface electrode 140a, a back surface dielectric layer 150, and a first back surface electrode 160a. And a second back surface electrode 170a. In detail, the P-type germanium wafer 110 has light-receiving surfaces S1 and S2 opposite to each other, and sequentially includes an N-type doping layer 120, a front dielectric layer 130, and a front surface electrode from the light-receiving surface S1 of the P-type germanium wafer 110. 140a. On the back surface S2 of the P-type germanium wafer 110, a back surface dielectric layer 150 has a first back surface electrode 160a and a second back surface electrode 170a, and the back surface dielectric layer 150 has a first opening pattern 152 and a second opening pattern 154.

As shown in FIG. 1, in the present embodiment, the light-receiving surface S1 of the P-type germanium wafer 110 has a structure such as a rough surface, a pyramid texturing or an inverted-pyramid texturing to reduce sunlight. Or the reflectivity of light entering the solar cell 100, thereby increasing the utilization of sunlight.

In the present embodiment, the N-type doping layer 120 is located on the light receiving surface S1 of the P-type germanium wafer 110, and the front dielectric layer 130 is located on the N-type doping layer 120. The front electrode 140a is located on the front dielectric layer 130.

As shown in FIG. 1 and FIG. 2, the back dielectric layer 150 is located on the back surface S2 of the P-type germanium wafer 110, and the back dielectric layer 150 of the present embodiment is exemplified by a single layer structure. In other embodiments, the back surface is shown. The dielectric layer 150 may also have a multi-layer structure. In the solar cell 100, when the sunlight illuminates the P-type germanium wafer 110, the inside of the P-type germanium wafer 110 simultaneously generates electron hole pairs (carriers), and electrons and electricity. The holes generate current through the positive and negative electrodes, respectively. In the passivated emitter back electrode twin solar cell of the present invention, the generated carriers can be recombined due to the protection of the back dielectric layer, thereby prolonging the survival rate of the carriers. In particular, the back dielectric layer 150 has a different pattern in different regions.

3 is a rear elevational view of a passivated emitter back electrode twinned solar cell in accordance with a first embodiment of the present invention. Referring to FIG. 3, the back surface S2 of the P-type germanium wafer 110 may be divided into a main gate line region R1 and a region R2 other than the main gate line region R1, wherein the main gate line region R1 is a predetermined formation in the solar cell 100. The area of the bus-bar. In the present embodiment, the back surface S2 of the P-type germanium wafer 110 is divided into three mutually parallel main gate line regions R1. In other embodiments, Adjust to two or more depending on the situation. In addition, the other positions of the main gate line region R1 on the back surface S2 of the P-type germanium wafer 110 can also be adjusted according to product requirements. In the present invention, the pattern of the back surface dielectric layer 150 in the main gate line region R1 is different from the pattern of the back surface dielectric layer 150 in the region R2 other than the main gate line region R1, whereby the solar cell 100 can be connected in series. When the solar cell module is formed, the adhesion between the silver electrode on the back surface of the solar cell and the electrode, the adhesion between the silver electrode on the back side of the solar cell and the P-type silicon wafer 110 are effectively increased, thereby improving the reliability of the solar cell module. Degree and yield. The back dielectric layer 150 will be described in detail below.

In addition, referring to FIG. 1 and FIG. 2, the first back surface electrode 160a and the second back surface electrode 170a are located on the back surface dielectric layer 150, and the second back surface electrode 170a is electrically connected to the first back surface electrode 160a. Specifically, in the present embodiment, the carriers from the second back surface electrode 170a are collected to the first back surface electrode 160a, and the first back surface electrode 160a conducts the current generated by the collected carriers outward. In other words, the first back surface electrode 160a of the present embodiment functions as a bus-bar electrode, and the second back surface electrode 170a functions as a finger electrode.

Further, in the present embodiment, when a plurality of solar cells 100 are connected in series, the solar cell 100 may further include an electrode 180 such that the electrode 180 is connected to the first back electrode 160a as a bus electrode to further collect the solar energy. The current of the first back surface electrode 160a of the bus electrode of the battery 100 is conducted outward.

It is worth noting that the solar cell of the present invention purposely divides the back side into a main gate line region and other regions than the main gate line region, so that the pattern of the back dielectric layer in the main gate line region and the pattern in other regions Different The electrical layer has different pattern distribution techniques in different regions, so that the electrode connected to the back silver electrode in the subsequent process can increase the back silver electrode by different morphology distribution formed by different patterns on the back surface between different regions. Adhesion to P-type germanium wafers and to electrodes. In detail, the embodiment in which the back dielectric layer has different patterns in different regions can change the width, the number, the distribution density, the graphics, etc. of the pattern, and the following will be explained in detail by way of example:

[First Embodiment]

4A is a partial enlarged view of the first embodiment of the back side view of the solar cell of FIG. 3 in a portion B of the embodiment. Referring to FIG. 1 , FIG. 2 and FIG. 4A together, in the embodiment, the pattern of the back dielectric layer 150 in the main gate line region R1 is different from that of the back dielectric layer 150 except the main gate line region R1. The pattern of the pattern of the other region R2 is, for example, changing the width of the pattern.

Referring to FIG. 1 , FIG. 2 and FIG. 4A , in detail, the back dielectric layer 150 is located on the back surface S2 of the P-type germanium wafer 110 , and the back dielectric layer 150 has a first opening in the main gate line region R1 . The pattern 152 and the second opening pattern 154 located in the other region R2, the first opening pattern 152 and the second opening pattern 154 exposing the P-type wafer 110. In addition, the first back surface electrode 160a is located on the back dielectric layer 150 and is filled in the first opening pattern 152. The second back surface electrode 170a is located on the back dielectric layer 150 and is filled in the second opening pattern 154.

Referring to FIG. 4A, in the present embodiment, the width of the first opening pattern 152 located in the main gate line region R1 is different from the second opening pattern 154 located in the other region R2. In detail, in the area partially enlarged on the back side, as shown in FIG. 4A, the first The opening pattern 152 includes two first sub-patterns 152a independent of each other, and the second opening pattern 154 includes four second sub-patterns 154a independent of each other, wherein the first sub-patterns 152a and the second sub-patterns 154a substantially correspond to each other parallel. It should be noted that, in this embodiment, the first sub-pattern 152a and the second sub-pattern 154a are strip patterns. In other embodiments, the patterns of the first sub-pattern 152a and the second sub-pattern 154a may also be The lines, points, line segments or a combination thereof are not limited thereto.

In addition, as shown in FIG. 4A, the first width W1 of the first sub-pattern 152a is different from the second width W2 of the second sub-pattern 154a, specifically, for example, the first width W1 of the first sub-pattern 152a is greater than the second sub- The second width W2 of the pattern 154a, of course, in other embodiments, the first width W1 of the first sub-pattern 152a may be smaller than the second width W2 of the second sub-pattern 154a, and the adhesion effect may also be achieved. The following examples.

Further, in the first embodiment, the back surface dielectric is realized by adjusting the first width W1 of the first sub-pattern 152a to be different from the second width W2 of the second sub-pattern 154a. The first opening pattern 152 of the layer 150 located in the main gate line region R1 is different from the second opening pattern 154 located in the other region R2. In this way, the passivation emitter back electrode can be effectively enhanced by disposing the first opening pattern 152 of the back dielectric layer 150 in the main gate line region R1 and the second opening pattern 154 located in the other region R2. The adhesion between the first back electrode 160a and the electrode 180 and the first back electrode 160a and the P-type germanium wafer 110 in the subsequent module process prevents the solar cell 100 from being serially connected into the solar cell module 10 When it comes off from the first back electrode 160a, Under the premise of maintaining the efficiency of the solar cell, the reliability and yield of the solar cell module are further increased.

It is worth mentioning that the ratio of the total area of the first opening pattern 152 and the second opening pattern 154 of the back dielectric layer 150 to the area of the back surface S2 is preferably between 0.5% and 15%, thereby enabling solar energy. The battery works best.

Of course, in addition to the first embodiment described above, other means for realizing the pattern in which the back dielectric layer is located in the main gate line region is different from the pattern in which the other regions are located. Of course, the designer can also use the modified width of the first embodiment and some or all of the following embodiments according to the actual needs of the product to further enhance the between the back silver electrode and the electrode and between the back silver electrode and the germanium wafer. Adhesion. Alternatively, the designer can use only one of the following embodiments to enhance the adhesion and improve the reliability and yield of the solar cell module.

[Second embodiment]

Figure 4B is a partial enlarged view of the second embodiment of the back side view of the solar cell of Figure 3 in a portion B of Figure 3;

The back dielectric layer 250 of this embodiment is similar to the back dielectric layer 150 of the first embodiment, except that the back dielectric layer 250 of the present embodiment is formed by changing the distribution density of the first opening pattern 252 ( That is, the number) is a technical means for realizing that the pattern of the back dielectric layer in the main gate line region is different from the pattern of the other region.

Specifically, in the present embodiment, in the same range as the main gate line region R1 of the first embodiment, the number of the first opening patterns 252 is increased without changing the width. Instead of the first embodiment, the width of the first opening pattern 252 is increased. In detail, the first opening pattern 252 of the present embodiment includes four first sub-patterns 252a independent of each other, and the second opening pattern 254 includes four second sub-patterns 254a independent of each other, wherein the first sub-patterns 252a The second sub-patterns 254a are respectively in a stripe pattern and are substantially parallel to each other.

In addition, in the present invention, the number of the first sub-pattern 252a and the second sub-pattern 254a may be adjusted as needed, and the present invention is not limited thereto, as long as the first sub-pattern 252a and the second sub-pattern 254a may be The distribution density is different, that is, the effect of enhancing the adhesion between the first back electrode and the electrode and the first back electrode and the P-type germanium wafer in the subsequent passivation process of the passivated emitter back electrode twin solar cell.

More specifically, as shown in FIG. 4B, the first pitch P1 between any two adjacent first sub-patterns 252a in this embodiment is, for example, smaller than the second pitch P2 between any two adjacent second sub-patterns 254a. In other embodiments, the first pitch P1 may be greater than the second pitch P2, and the effect of increasing the adhesion may be achieved.

In other words, in the second embodiment of the present invention, the first pitch P1 between any two adjacent first sub-patterns 252a is different from the second pitch P2 between any two adjacent second sub-patterns 254a. Thereby, the technical means of the first opening pattern 252 of the back surface dielectric layer 250 located in the main gate line region R1 is different from the second opening pattern 254 located in the other region R2. In this way, the adhesion between the first back electrode and the electrode and the first back electrode and the P-type germanium wafer in the subsequent module process of the passivated emitter back electrode twin solar cell can be effectively enhanced to prevent the solar cell from being connected in series. When the solar cell module is detached from the first back electrode, the solar cell is effective. Under the premise of maintaining a certain rate, and further increase the reliability and yield of solar cell modules.

It should be noted that although in the back surface dielectric layer 250 of the embodiment, the number of the first opening patterns is changed by using the same, the designer can also use the changes of the foregoing embodiments according to the product requirements. The effect of enhancing the adhesion by the width of the first opening pattern and the effect of improving the reliability and yield of the solar cell module are not limited thereto.

[Third embodiment]

Fig. 4C is a partial enlarged view of the third embodiment of the upper side view of the solar cell of Fig. 3 in the portion B.

The back dielectric layer 350 of this embodiment is similar to the back dielectric layer 150 of the first embodiment, except that the back dielectric layer 350 of the present embodiment is implemented by changing the pattern of the first opening pattern 352. The pattern in which the back dielectric layer is located in the main gate line region is different from the pattern in which the pattern is located in other regions.

Specifically, in the same range as the main gate line region R1 of the first embodiment, the first opening pattern is added instead of the first embodiment in such a manner that the shape of the first opening pattern 352 is changed without changing the width and the number. 152 width practice. In detail, the first opening pattern 352 of the present embodiment includes a plurality of first sub-patterns 352a in the shape of a line, and the second opening pattern 354 includes four second sub-patterns 354a that are strip-shaped independently of each other. In a giant view, the first sub-pattern 352a in the form of a line segment of the present embodiment exhibits a distribution pattern of strip patterns such as two broken lines in the main gate line region R1, and the second The sub-pattern 354a presents a distribution pattern of four strip patterns such as solid lines in the other regions R2.

It is worth mentioning that the proportion of the first sub-pattern 352a in the main gate line region R1 in this embodiment is smaller than the proportion of the second sub-pattern 354a in the other region R2, thereby making the back surface of the back surface S2 The increase in the total area of the dielectric layer 150, that is, the effect of prolonging the survival time of the carrier, increases the efficiency of the solar cell.

In other words, in the third embodiment of the present invention, by adjusting the shape of the first sub-pattern 352a and the shape of the second sub-pattern 354a, the first opening of the back dielectric layer 350 in the main gate line region R1 is realized. The pattern 352 is different from the second opening pattern 354 located in the other region R2, thereby maintaining the adhesion between the first back electrode and the electrode and the first back electrode and the P-type wafer, that is, maintaining the solar cell module. Under the premise of reliability and yield, the efficiency of solar cells is further increased.

It should be noted that although the back surface dielectric layer 350 of the present embodiment is described by separately changing the pattern of the first opening pattern, the designer can also use the changes of the foregoing embodiments according to the product requirements. The width, the number of distributions, the spacing, and the like of the first opening pattern exert an effect of enhancing the adhesion and improving the reliability and yield of the solar cell module, and the invention is not limited thereto.

[Fourth embodiment]

Figure 4D is a partial enlarged view of the fourth embodiment of the back side view of the solar cell of Figure 3 in a portion B of Figure 3;

The back surface dielectric layer 450 of this embodiment is comprehensive in the main gate line region R1. Cover the P-type germanium wafer. Specifically, the back dielectric layer 450 does not have an opening in the main gate line region R1. On the other hand, the second dielectric pattern 450 of the back surface dielectric layer 450 in the other region R2 is, for example, the second opening pattern 454a of the foregoing embodiment. Specifically, the second opening pattern 454 includes a plurality of second sub-patterns 454a that are circular. These second sub-patterns 454a exhibit a plurality of distribution patterns in which the straight lines each composed of a plurality of points are arranged side by side in the other region R2.

In other words, in the third embodiment of the present invention, the back surface dielectric layer 450 in the main gate line region R1 does not have an opening, and the second sub-pattern 454a of the second opening pattern 454 located in the other region R2 is rounded. Therefore, as in the above embodiment, the total area of the back surface dielectric layer can be increased, that is, the effect of prolonging the carrier survival time is increased, thereby increasing the efficiency of the solar cell.

It is to be noted that, in the back surface dielectric layer 450 of the present embodiment, the back dielectric layer 450 in the main gate line region R1 is not provided with an opening and is changed by changing the pattern of the second opening pattern. However, the designer can also improve the efficiency of the solar cell by changing the width, the number of distributions, the spacing, the pattern, and the like of the second opening pattern according to the product requirements, and the invention is not limited thereto.

Hereinafter, a method of manufacturing the twinned solar cell of the present invention will be further described by taking the first embodiment as an example.

5A through 5C are schematic views of a method of fabricating a twinned solar cell in accordance with a first embodiment of the present invention.

Please refer to FIG. 5A. First, a P-type germanium wafer 110 having a light receiving surface S1 and a back surface S2 is provided. The P-type germanium wafer 110 has a main gate line region R1 on the back surface S2 And a region R2 other than the main gate line region R1 (as shown in FIG. 3). Further, the P-type germanium wafer 110 is, for example, a boron-doped or gallium-doped germanium wafer. Next, N-type doping (for example, a group V element such as phosphorus doping or arsenic doping) is performed on the light-receiving surface S1 of the P-type germanium wafer 110 by, for example, thermal diffusion or ion implantation. An N-type doping layer 120 is formed on the light receiving surface S1.

Then, a positive electrode is formed on the N-doped layer 120 of the light receiving surface S1 by, for example, Chemical Vapor Deposition (CVD) or Plasma Enhanced Chemical Vapor Deposition (PECVD). The electrical layer 130, wherein the front dielectric layer 130 is, for example, a single layer or a multilayer structure of a combination of SiO ₂ , Si _x N _y , Si _x N _y H _z , Si _x O _y N _z or SiC.

Next, the back surface dielectric layer 150 is formed on the back surface S2 of the P-type germanium wafer 110 by chemical vapor deposition or plasma enhanced chemical vapor deposition, wherein the back dielectric layer 150 is, for example, Al _x O _y , SiO ₂ , A single layer or multilayer structure of a combination of Si _x N _y , Si _x N _y H _z , Si _x O _y N _z or SiC.

Next, referring to FIG. 5B, the back dielectric layer 150 is then patterned to form a first opening pattern 152 in the main gate line region R1 of the back dielectric layer 150, and the other in the back dielectric layer 150. The region R2 forms a second opening pattern 154, wherein the first opening pattern 152 and the second opening pattern 154 expose the P-type germanium wafer 110. It should be noted that the method of patterning the back dielectric layer 150 includes an etching paste, a laser-etching method, a photolithography process, and the like.

Then, referring to FIG. 5C, a front electrode is formed on the front dielectric layer 130. The composition 140 is, for example, a screen printed front electrode composition 140, wherein the front electrode composition 140 is, for example, a silver paste.

Next, the first back electrode composition 160 and the second back electrode composition 170 are respectively screen printed in the first opening pattern 152 and in the second opening pattern 154. The first back electrode composition 160 is, for example, a silver paste, and the second back electrode composition 170 is, for example, an aluminum paste.

Next, the above structure in which the front electrode composition 140, the first back electrode composition 160, and the second back electrode composition 170 are formed is subjected to a high-temperature co-firing process to form the front surface electrode 140a, the first back surface electrode 160a, and the first surface, respectively. Two back electrodes 170a. It is worth noting that the maximum temperature of the high temperature co-firing process is greater than 600 °C.

Next, the electrode 180 is welded to the first back surface electrode 160a, whereby the electrode 180 is in contact with the first back surface electrode 160a and the second back surface electrode 170a. The structure of the solar cell 100 shown in FIG. 1 and FIG. 2 is comprised.

It is to be noted that the region of the N-type doping layer 120 corresponding to the front surface electrode 140a may be a high concentration of phosphorus doping, and its surface resistance is less than or equal to 70 ohm/sq. Further, the region of the N-type doping layer 120 corresponding to the surface other than the front surface electrode 140a may be low-concentration phosphorus doping, and its surface resistance is more than 70 ohm/sq. Further, a part of the region other than the front electrode 140a of the N-type doping layer 120 may also be doped with a high concentration of phosphorus.

Figure 6 is a schematic view of a solar cell module in accordance with a first embodiment of the present invention. The solar cell module 10 can include a plurality of solar cells 100 and an electrode 180, wherein the electrode 180 is electrically connected between two adjacent solar cells 100. Specifically In other words, both ends of the electrode 180 are connected to the electrodes of the solar cell 100 and the electrodes of the other solar cell 100, respectively. As such, the electrode 180 can collect current from the electrode and conduct current to the other solar cell 100.

<Solar cell evaluation>

In the following examples, the passivated emitter back electrode twin solar cells were evaluated, and the results are shown in Tables 1 and 2.

-Example 1

Conductive paste A is composed of silver powder (50~60wt.%), ester alcohol (40~50wt.%), resin (1~10wt.%) and glass powder A (1~10wt.%). The results are shown in the table. 1 is shown.

-Example 2

Conductive paste B is composed of silver powder (50~60wt.%), ester alcohol (40~50wt.%), resin (1~10wt.%) and glass frit B (1~10wt.%). The results are shown in the table. 2 is shown.

[Evaluation method] -effectiveness-

Cell efficiency evaluations were performed on passivated emitter back electrode twin solar cells of different embodiments using a solar cell efficiency measuring machine. The solar cell efficiency measuring machine is a QuickSun-120CA solar cell efficiency measuring machine manufactured by Endeas.

- Pull test -

A ribbon (tinned copper strip with a tin-plated composition ratio of Sn/Pb/Ag=62%/36%/2%) is preheated at 60 ° C, and then welded at a temperature of about 360 ° C. The gun welds the electrode to the back electrode (as shown in Figure 1). Next, a tensile test was performed with respect to the opposite direction (180 degrees) of the substrate, and the tensile force required to separate the electrode from the surface electrode was measured, wherein the pulling force was 20 mm/sec, and the higher the pulling force, the higher the adhesion.

[Evaluation results]

Table 1 and Table 2 respectively show that the conductive paste A and the conductive paste B are used as the first back surface electrode, and based on the first embodiment described above, the etching area of the back surface dielectric layer in the main gate line region is measured (ie, the first The ratio of the opening pattern area and the second opening pattern area (%) to the efficiency of the solar cell and the tensile force.

Referring to Table 1 and Table 2, when the etching area ratio (%) of the back dielectric layer in the main gate line region is greater than 1%, the area of the first opening pattern in the main gate line region of the back dielectric layer is greater than Less than or equal to the area of the second opening pattern in other regions, the normalized pulling force is greater than 1 (the denominator of the normalized pulling force is the minimum requirement for the general solar cell pulling force). This shows that by designing the first opening pattern of the back dielectric layer in the main gate line region and the second opening pattern in other regions to be different, the solar cell module reliability and yield can be met. Moreover, when the ratio (%) of the etching area of the back surface dielectric layer in the main gate line region (ie, the area of the first opening pattern) is increased, the efficiency of the solar cell is slightly lowered, but still maintains a certain level, and the pulling force is large. The ground lift increases the adhesion area between the first back electrode and the back dielectric layer and between the first back electrode and the P-type germanium wafer to improve the reliability and yield of the solar cell module. Therefore, it can be based on the demand for tension Differently, the ratio of the first opening pattern of the main gate line region is adjusted without seriously affecting the battery efficiency.

In addition, the tensile force using the conductive paste B is higher than that of the conductive paste A, indicating that there is good adhesion between the conductive paste B and the back dielectric layer and between the conductive paste B and the P-type germanium wafer.

In summary, in one embodiment of the present invention, the passivation emitter back electrode can be effectively enhanced by designing the first opening pattern of the back dielectric layer in the main gate line region and the second opening pattern in other regions to be different. The adhesion between the back silver electrode and the electrode and the back silver electrode and the substrate in the subsequent module process, avoiding passivation of the emitter back electrode, the twinned solar cell is connected in series to passivate the emitter back electrode, the twin solar cell module When it is set, it will fall off from the back silver electrode, and the reliability and yield of the solar cell module can be effectively increased under the premise that the efficiency of the solar cell can be maintained at a certain level. Moreover, in another embodiment of the present invention, the efficiency of the solar cell can also be achieved by making the back dielectric layer in the main gate line region have no opening and the other regions have the second opening pattern. Upgrade.

Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art without departing from the invention. In the spirit and scope, the scope of protection of the present invention is subject to the definition of the appended patent application.

100‧‧‧ solar cells

110‧‧‧P type silicon wafer

120‧‧‧N-doped layer

130‧‧‧Positive dielectric layer

140a‧‧‧front electrode

150‧‧‧Back dielectric layer

152‧‧‧first opening pattern

154‧‧‧Second opening pattern

152a‧‧‧The first sub-pattern

154a‧‧‧Second sub-pattern

160a‧‧‧First back electrode

170a‧‧‧second back electrode

180‧‧‧ welding rod

S1‧‧‧Stained surface

S2‧‧‧Back

Claims (31)

A passivated emitter back electrode twin solar cell comprising: a P-type germanium wafer having a light receiving surface and a back surface, the P-type germanium wafer having a main gate line region on the back surface and a region other than the gate line region; an N-type doped layer on the light receiving surface of the P-type germanium wafer; a front dielectric layer on the N-type doped layer; and a front electrode located at On the front dielectric layer; a back dielectric layer on the back surface of the P-type germanium wafer, the back dielectric layer having a first opening pattern in the main gate line region and located at the a second opening pattern of the other region, wherein the first opening pattern and the second opening pattern expose the P-type germanium wafer, and the first opening pattern of the back dielectric layer is different from a second opening pattern; a first back electrode on the back dielectric layer and filled in the first opening pattern; and a second back electrode on the back dielectric layer and filled in Into the second opening pattern. The passivated emitter back electrode twin solar cell of claim 1, wherein the first opening pattern comprises a plurality of first sub-patterns independent of each other, and the second opening pattern comprises a plurality of independent patterns Second sub-pattern. The passivated emitter back electrode twin solar cell of claim 2, wherein the first sub-pattern has a first width different from the second sub-pattern The second width. The passivated emitter back electrode twin solar cell of claim 3, wherein the first sub-pattern and the second sub-pattern are strip patterns, respectively. The passivated emitter back electrode twin solar cell of claim 2, wherein a first pitch between any two adjacent first sub-patterns is different from any two adjacent second sub-patterns The second spacing between. The passivated emitter back electrode twin solar cell of claim 5, wherein the first pitch is less than the second pitch. The passivated emitter back electrode twinned solar cell of claim 2, wherein the first sub-pattern exhibits a dotted distribution pattern in the main gate line region, and the second sub-pattern is in other regions. A distribution pattern of solid lines is present, and a proportion of the first sub-pattern in the main gate line region is smaller than a ratio of the second sub-pattern in other regions. The passivated emitter back electrode twin solar cell of claim 2, wherein the shape of the first sub-pattern is different from the second sub-pattern. The passivated emitter back electrode twin solar cell of claim 2, wherein the first sub-pattern and the second sub-pattern are respectively a line, a point, a line segment or a combination thereof. The passivated emitter back electrode twin solar cell of claim 1, further comprising an electrode, wherein the electrode is connected to the first back electrode. Passivated emitter back electrode twins as described in claim 1 A solar cell, wherein the p-type germanium wafer comprises a boron doped or gallium doped germanium wafer. The passivated emitter back electrode twinned solar cell of claim 1, wherein a total area of the first opening pattern and the second opening pattern in the back dielectric layer is opposite to the back surface The ratio of the area is between 0.5% and 15%. The passivated emitter back electrode twin solar cell of claim 1, wherein the back dielectric layer is Al _x O _y , SiO ₂ , Si _x N _y , Si _x N _y H _z , Si _x Single or multi-layer structure of O _y N _z or SiC combination. The passivated emitter back electrode twinned solar cell of claim 1, wherein the front dielectric layer is SiO ₂ , Si _x N _y or Si _x N _y H _z , Si _x O _y N _z or Single or multi-layer structure of SiC combination. The passivated emitter back electrode twinned solar cell of claim 1, wherein the region of the N-type doped layer corresponding to the front electrode is doped with a high concentration of phosphorus, and the surface resistance thereof is less than or Equal to 70 ohm/sq. The passivated emitter back electrode twinned solar cell according to claim 1, wherein the N-type doped layer corresponds to a region other than the front electrode and is doped with a low concentration of phosphorus, and the surface resistance thereof is More than 70 ohm/sq. The passivated emitter back electrode twinned solar cell of claim 1, wherein the N-doped layer is doped with a high concentration of phosphorus corresponding to a portion of the region other than the front electrode. A passivated emitter back electrode twin solar cell comprising: a P-type germanium wafer having a light receiving surface and a back surface, the P-type germanium wafer Having a main gate line region and other regions besides the main gate line region on the back surface; an N-type doped layer on the light receiving surface of the P-type germanium wafer; a front dielectric layer On the N-type doped layer; a front electrode on the front dielectric layer; a back dielectric layer on the back surface of the P-type germanium wafer, the back dielectric layer a pattern in the main gate line region is different from a pattern of the back dielectric layer in the other region; a first back electrode on the back dielectric layer; and a second back electrode in the The back dielectric layer is filled in the pattern of the back dielectric layer in the other regions. The passivated emitter back electrode twinned solar cell of claim 18, wherein the back dielectric layer covers the P-type germanium wafer in a region of the main gate line, and the backside dielectric The electrical layer has an open pattern in the other regions. A solar cell module comprising: a plurality of passivated emitter back electrode twin solar cells according to any one of claim 1 or claim 19; and an electrode electrically connected to two adjacent places The passivated emitter back electrode is between the twinned solar cells. A method for manufacturing a passivated emitter back electrode twinned solar cell, comprising: Providing a P-type germanium wafer having a light-receiving surface and a back surface, the P-type germanium wafer having a main gate line region and other regions than the main gate line region on the back surface; Forming an N-type doped layer on the light-receiving surface of the 矽-type wafer; forming a front dielectric layer on the N-type doped layer; forming a front electrode on the front dielectric layer; Forming a back dielectric layer on the back surface of the NMOS wafer, wherein a first opening pattern is formed on the back gate dielectric layer in the main gate line region, and the back dielectric layer is located on the back surface dielectric layer The other regions form a second opening pattern, wherein the first opening pattern and the second opening pattern expose the P-type germanium wafer, and the first opening pattern of the back dielectric layer is different from the a second opening pattern; a first back surface electrode is formed on the back dielectric layer to fill the first back surface electrode; and a first dielectric layer is formed on the back surface dielectric layer Two back electrodes such that the second back electrode fills the second opening Inside the pattern. The method of manufacturing the passivated emitter back electrode twinned solar cell of claim 21, wherein the first opening pattern comprises a plurality of first sub-patterns independent of each other, and the second opening pattern comprises each other A plurality of second sub-patterns that are independent. The method of manufacturing a passivated emitter back electrode twinned solar cell according to claim 22, wherein the first sub-pattern has a first width different from that of The second width of the second sub-pattern is described. The method for manufacturing a passivated emitter back electrode twinned solar cell according to claim 23, wherein the first sub-pattern and the second sub-pattern are strip patterns, respectively. The method for manufacturing a passivated emitter back electrode twinned solar cell according to claim 22, wherein a first pitch between any two adjacent first sub-patterns is different from any two adjacent ones The second spacing between the sub-patterns. The method of manufacturing a passivated emitter back electrode twinned solar cell according to claim 25, wherein the first pitch is smaller than the second pitch. The method of manufacturing a passivated emitter back electrode twinned solar cell according to claim 22, wherein the first sub-pattern exhibits a dotted distribution pattern in the main gate line region, and the second sub-pattern A distribution pattern of solid lines is presented in other regions, and a proportion of the first sub-pattern in the main gate line region is smaller than a ratio of the second sub-pattern in other regions. The method of manufacturing a passivated emitter back electrode twinned solar cell according to claim 22, wherein the shape of the first sub-pattern is different from the second sub-pattern. The method for manufacturing a passivated emitter back electrode twinned solar cell according to claim 22, wherein the first sub-pattern and the second sub-pattern are respectively a line, a point, a line segment or a combination thereof. The method of manufacturing a passivated emitter back electrode twinned solar cell according to claim 21, wherein the first opening pattern in the back dielectric layer is A ratio of a total area of the second opening pattern to an area of the back surface is between 0.5% and 15%. The method for manufacturing a passivated emitter back electrode twinned solar cell according to claim 21, further comprising forming an electrode on the first back electrode.