WO2013128894A1 - Semiconductor light-emitting element - Google Patents

Semiconductor light-emitting element Download PDF

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Publication number
WO2013128894A1
WO2013128894A1 PCT/JP2013/001113 JP2013001113W WO2013128894A1 WO 2013128894 A1 WO2013128894 A1 WO 2013128894A1 JP 2013001113 W JP2013001113 W JP 2013001113W WO 2013128894 A1 WO2013128894 A1 WO 2013128894A1
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layer
semiconductor light
emitting device
type
light emitting
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PCT/JP2013/001113
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French (fr)
Japanese (ja)
Inventor
只友　一行
成仁 岡田
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国立大学法人山口大学
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Priority to JP2014502031A priority Critical patent/JP6019541B2/en
Publication of WO2013128894A1 publication Critical patent/WO2013128894A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the present invention relates to a semiconductor light emitting device.
  • a structure in which an n-type GaN layer is provided on a sapphire substrate and a multiple quantum well layer formed by alternately stacking GaN and InGaN thereon is known.
  • an n-type GaN layer is provided on a sapphire substrate via a buffer layer, and non-doped In a Ga 1-a N (0.01 ⁇ a ⁇ 0.05) is formed thereon.
  • a strain relaxation layer having a thickness of 180 nm formed in step (b) is provided, and a multiple quantum well layer formed by alternately stacking GaN and InGaN is provided on the strain relaxation layer, and the heat of the sapphire substrate and the multiple quantum well layer is provided.
  • a semiconductor light emitting device is disclosed in which stress due to strain generated by a difference in expansion coefficient is relaxed by a strain relaxation layer.
  • the present invention comprises a GaN layer whose main surface is a nonpolar or semipolar surface, In x Ga 1-x N (0 ⁇ x ⁇ 0.1) is formed by epitaxial growth directly on the GaN layer, and includes an n-type dopant-containing InGaN layer having a thickness of 0.2 ⁇ m or more, A multiple quantum well layer formed by epitaxial growth directly on the InGaN layer and including a well layer formed of InGaN; With The InGaN layer is a semiconductor light emitting device in which strain due to lattice mismatch with the GaN layer is completely or partially relaxed.
  • (A)-(e) is explanatory drawing of the manufacturing method of the semiconductor light-emitting device based on Embodiment. It is a graph which shows the relationship between the content rate x of In of an InGaN layer, and the magnification of PL emitted light intensity on the basis of a reference. It is a graph which shows the relationship between the thickness of an n-type InGaN layer, and the full width at half maximum of light emission intensity distribution.
  • FIG. 1 shows a semiconductor light emitting device 10 according to an embodiment.
  • the semiconductor light emitting device 10 according to the present embodiment is suitably used, for example, as a semiconductor laser or a light emitting diode.
  • the semiconductor light emitting device 10 includes a u-GaN layer 12, an n-type GaN layer 13, an n-type InGaN layer 14, a multiple quantum well layer 15, a p-type AlGaN layer 16, and a p-type GaN on a substrate 11.
  • the layer 17 is sequentially stacked, and the n-type electrode 18 and the p-type electrode 19 are respectively provided on the n-type InGaN layer 14 exposed by etching and the p-type GaN layer 17.
  • the substrate 11 for example, a sapphire substrate (single crystal substrate having a corundum structure of Al 2 O 3 ) is typically exemplified, and other examples include a ZnO substrate and a SiC substrate.
  • the substrate 11 may be a processed substrate in which fine irregularities are formed on the substrate surface by etching or the like, and silicon oxynitride (SiO x N y ) or aluminum nitride (AlN) or the like is partially formed on the substrate surface. It may be a processed substrate provided with fine irregularities.
  • the substrate 11 is formed in a rectangular plate shape in the state of the light emitting element, and is 200 to 1000 ⁇ m in length and width, and 50 to 300 ⁇ m in thickness.
  • the principal surfaces of the substrate 11 are a plane ⁇ 11-20 ⁇ plane>, c plane ⁇ 0001 ⁇ plane>, m plane ⁇ 1-100 ⁇ plane>, n plane ⁇ 1-123 ⁇ plane> and r. Any of the planes ⁇ 1-102 ⁇ plane>, or a crystal plane with another plane orientation may be used.
  • the crystal growth surface of the substrate 11 may be a main surface, or may be an uneven side surface of a processed substrate.
  • Crystal growth planes of the substrate 11 are a plane ⁇ 11-20 ⁇ plane>, c plane ⁇ 0001 ⁇ plane>, m plane ⁇ 1-100 ⁇ plane>, n plane ⁇ 1-123 ⁇ plane> and It may be any of the r-plane ⁇ 1-102 ⁇ plane>, or may be a crystal plane with another plane orientation.
  • the u-GaN layer 12 is formed by epitaxially growing GaN from the crystal growth surface of the substrate 11 without containing a dopant.
  • the thickness of the u-GaN layer 12 is, for example, 2 to 20 ⁇ m.
  • the main surface of the u-GaN layer 12 is a nonpolar plane or a semipolar plane, and may be a ⁇ 11-22 ⁇ plane, or a crystal plane with another plane orientation such as a ⁇ 10-11 ⁇ plane. There may be.
  • the n-type GaN layer 13 may or may not be present.
  • the n-type GaN layer 13 is formed by epitaxially growing GaN in the same plane direction as the u-GaN layer 12 including an n-type dopant immediately above the u-GaN layer 12. Nonpolar or semipolar surface. Examples of the n-type dopant include Si and Ge.
  • the concentration of the n-type dopant is, for example, 1.0 ⁇ 10 17 to 1.0 ⁇ 10 20 / cm 3 .
  • the thickness of the n-type GaN layer 13 is, for example, 2 to 10 ⁇ m.
  • the n-type InGaN layer 14 is formed immediately above the n-type GaN layer 13 when it is present, or directly above the GaN layer 12 when it is not present, and the In x Ga 1-x N contains an n-type dopant. Therefore, the main surface is a nonpolar surface or a semipolar surface.
  • In x Ga 1-x N forming the n-type InGaN layer 14 has an In content ratio of 0 ⁇ x ⁇ 0.1, preferably 0 ⁇ x ⁇ 0.05, more preferably 0.01. ⁇ X ⁇ 0.05.
  • the n-type dopant include Si and Ge as in the case of the n-type GaN layer 13.
  • the concentration of the n-type dopant is, for example, 1.0 ⁇ 10 17 to 1.0 ⁇ 10 20 / cm 3 .
  • the n-type InGaN layer 14 may be composed of a single layer, or may be composed of a plurality of layers having different n-type dopant types and concentrations.
  • the thickness of the n-type InGaN layer 14 is 0.2 ⁇ m or more, preferably 0.2 to 10 ⁇ m, more preferably 0.5 to 5 ⁇ m.
  • the multiple quantum well layer 15 is formed by epitaxially growing a semiconductor in the same plane orientation as the n-type InGaN layer 14 immediately above the n-type InGaN layer 14, and thus the main surface is a nonpolar or semipolar surface. And it has the alternately laminated structure of the barrier layer 15a and the well layer 15b.
  • the number of barrier layers 15a and well layers 15b is, for example, 3 to 15.
  • the multiple quantum well layer 15 constitutes a light emitting layer, and its light emission wavelength is a wavelength in the visible region, specifically, 360 to 640 nm in the light emitting region of InGaN.
  • the multiple quantum well layer 15 is preferably configured to emit purple, blue, or green light, and more preferably configured to emit purple light.
  • the purple emission wavelength range is 380 to 450 nm
  • the blue emission wavelength range is 450 to 495 nm
  • the green emission wavelength range is 495 to 570 nm.
  • the well layer 15b is made of In y Ga 1-y N, and y is preferably larger than x.
  • the thickness of the well layer 15b is, for example, 1 to 20 nm.
  • Examples of the semiconductor forming the barrier layer 15a include GaN having a band gap larger than that of the well layer 15b.
  • the thickness of the barrier layer 15a is, for example, 5 to 20 nm.
  • the p-type AlGaN layer 16 is formed immediately above the multiple quantum well layer 15 by epitaxially growing Al z Ga 1-z N containing a p-type dopant in the same plane orientation as the multiple quantum well layer 15. Therefore, the main surface is a nonpolar surface or a semipolar surface.
  • Al z Ga 1-z N forming the p-type AlGaN layer 16 has an Al content ratio of, for example, 0.05 ⁇ z ⁇ 0.3.
  • the p-type dopant include Mg and C. In the case of a p-type dopant, since the acceptor level is deep and the dopant concentration and the free hole concentration differ greatly, the free hole concentration measured by the Hall effect is used as the content evaluation index.
  • the p-type AlGaN layer 16 may be composed of a single layer, or may be composed of a plurality of layers having different types and concentrations of p-type dopants.
  • the thickness of the p-type AlGaN layer 16 is, for example, 10 to 30 nm.
  • the p-type GaN layer 17 is formed directly on the p-type AlGaN layer 16 by epitaxially growing GaN in the same plane orientation as that of the p-type AlGaN layer 16 including the p-type dopant.
  • Nonpolar or semipolar surface examples of the p-type dopant include Mg and C as in the case of the p-type AlGaN layer 16.
  • the free hole concentration measured by the Hall effect measurement is, for example, 2.0 ⁇ 10 17 to 10 ⁇ 10 17 / cm 3 .
  • the p-type GaN layer 17 may be composed of a single layer, or may be composed of a plurality of layers having different types and concentrations of the p-type dopant.
  • the thickness of the p-type GaN layer 17 is, for example, 50 to 200 nm.
  • the p-type layer is not limited to the p-type AlGaN layer 16 and the p-type GaN layer 17, and may be a special structure such as an InGaN / GaN superlattice structure.
  • Examples of the constituent electrode material of the n-type electrode 18 include a laminated structure such as Cr / Au, Ti / Al, Ti / Al / Mo / Au, and Hf / Au, or an alloy.
  • the thickness of the n-type electrode 18 is, for example, Ti / Al (10 nm / 500 nm).
  • Examples of the p-type electrode 19 include a laminated structure such as Pd / Pt / Au, Ni / Au, and Pd / Mo / Au, an alloy, or an oxide-based transparent conductive material such as ITO (indium tin oxide). It is done.
  • the thickness of the p-type electrode 19 is, for example, 10 to 200 nm in the case of ITO.
  • a pad electrode for wire bonding is necessary on the p-type electrode 19, and in many cases, it is made of the same material system as that of the n-type electrode 18.
  • a semiconductor light emitting device using a group III nitride semiconductor whose main surface is a nonpolar surface is expected to have high luminous efficiency because of its physical properties, but actually, InGaN contained in a multiple quantum well layer.
  • the well layer formed in (1) has a structural defect such that defects are likely to enter, and the advantages of the physical properties are not fully utilized.
  • an InGaN layer is interposed between the n-type GaN layer 13 and the multiple quantum well layer 15, and therefore, dislocations in the light emitting layer are eliminated. Occurrence is suppressed.
  • In x Ga 1-x N (0 ⁇ x ⁇ 0.1) is provided between the n-type GaN layer 13 whose main surface containing the n-type dopant is a nonpolar plane or a semipolar plane and the multiple quantum well layer 15.
  • n-type InGaN layer 14 Is formed by epitaxial growth, and an n-type InGaN layer 14 having a thickness of 0.2 ⁇ m or more containing an n-type dopant of the same type as that of the n-type GaN layer 13 is interposed, and the n-type InGaN layer 14 is n
  • the strain due to lattice mismatch with the n-type GaN layer 13 is completely or partially relaxed, so that the defects do not become threading dislocations. Therefore, the defect density of the n-type InGaN layer 14 is equal to that of the underlying n-type GaN layer 13. Thus, high luminous efficiency can be obtained.
  • the full width at half maximum of the emission intensity distribution with respect to the emission wavelength of the multiple quantum well layer 15 is preferably 40 nm or less, and more preferably 35 nm or less. Even if the n-type GaN layer 13 is not provided and the n-type InGaN layer 14 is interposed between the u-GaN layer 12 and the multiple quantum well layer 15, the same effect can be obtained.
  • the u-GaN layer 12, the n-type GaN layer 13 (Si-doped), the n-type InGaN layer 14 (Si-doped), and the light emitting layer on the wafer 11 ′ Each semiconductor layer of the quantum well layer 15 (barrier layer 15a: GaN, well layer 15b: InGaN), p-type AlGaN layer 16 (Mg-doped), and p-type GaN layer 17 (Mg-doped) is sequentially formed, and then etched. The n-type GaN layer 13 is exposed, and an n-type electrode 18 and a p-type electrode 19 are formed on the n-type InGaN layer 14 and the p-type GaN layer 17, respectively.
  • a wafer 11 ′ is prepared.
  • the wafer 11 ′ has a thickness of 0.3 to 3.0 mm and a diameter of 50 to 300 mm, depending on its diameter. In the case of the wafer 11 ′ having a diameter of 50 mm, 5000 to 12000 semiconductor light emitting elements 10 can be formed on one wafer.
  • MOVPE metalorganic vapor phase epitaxy
  • VPE halogen vapor phase epitaxy
  • MBE molecular beam epitaxy
  • HVPE hydride vapor phase epitaxy
  • the MOVPE apparatus used for forming each semiconductor layer is composed of a wafer transfer system, a wafer heating system, a gas supply system, and a gas exhaust system that are electronically controlled.
  • the wafer heating system is composed of a thermocouple, a resistance heater, and a carbon or SiC susceptor provided thereon.
  • the MOVPE apparatus is configured to grow a semiconductor layer with a reactive gas on a wafer 11 'set on a susceptor of a quartz tray to be conveyed.
  • the wafer 11 ′ was heated to 1050 to 1150 ° C. and the pressure in the reaction vessel was set to 10 to 100 kPa, and was set in the reaction vessel.
  • H 2 is circulated as a carrier gas in the flow channel, and this state is maintained for several minutes to thermally clean the wafer 11 ′.
  • the temperature of the wafer 11 ′ is set to 1050 to 1150 ° C.
  • the pressure in the reaction vessel is set to 10 to 100 kPa
  • the carrier gas H 2 is flowed into the reaction vessel at a flow rate of about 10 L / min (hereinafter, the gas flow rate is a reference).
  • the V group element supply source (NH 3 ) and the Group III element supply source (TMG) are supplied as reaction gases.
  • the flow rate is 0.1 to 5 L / min and 50 to 150 ⁇ mol / min.
  • the temperature of the wafer 11 ′ is set to 400 to 500 ° C., and GaN is crystal-grown.
  • the pressure in the reaction vessel is set to 10 to 100 kPa, and a carrier gas H 2 is circulated in the reaction vessel at a flow rate of 5 to 15 L / min, and as a reaction gas, a group V element supply source (NH 3 ), Group III element supply source 1 (TMG) and n-type dopant supply source (SiH 4 ) are supplied at flow rates of 0.1 to 5 L / min, 50 to 150 ⁇ mol / min, and 1 to 5 ⁇ 10 ⁇ 3 ⁇ mol, respectively. / Min.
  • NH 3 group V element supply source
  • TMG Group III element supply source 1
  • SiH 4 n-type dopant supply source
  • n-type GaN is epitaxially grown immediately above the u-GaN layer 12 to form an n-type GaN layer 13.
  • the temperature of the wafer 11 ′ is set to about 600 to 850 ° C.
  • the pressure in the reaction vessel is set to 10 to 100 kPa
  • a carrier gas N 2 is circulated in the reaction vessel, and a group V element is supplied as a reaction gas therein.
  • a source (NH 3 ), a group III element source 1 (TMG), a group III element source 2 (TMI), and an n-type dopant source (SiH 4 ) are supplied.
  • n-type InGaN is epitaxially grown immediately above the n-type GaN layer 13 to form an n-type InGaN layer 14.
  • the temperature of the wafer 11 ′ is set to about 600 to 850 ° C.
  • the pressure in the reaction vessel is set to 10 to 100 kPa
  • a carrier gas N 2 is circulated in the reaction vessel, and as a reaction gas, a group V element supply source is provided.
  • NH 3 group V element supply source
  • TMG group III element supply source
  • a Group V element supply source (NH 3 ), a Group III element supply source 1 (TMG), and a Group III element supply source 2 (TMI) are flowed.
  • NH 3 Group V element supply source
  • TMG Group III element supply source 1
  • TMI Group III element supply source 2
  • InGaN is epitaxially grown immediately above the GaN barrier layer 15a to form the well layer 15b.
  • the emission wavelength of the multiple quantum well layer 15 depends on the well width of the well layer 15b (the thickness of the well layer 15b) and the InN mixed crystal ratio, and the higher the InN mixed crystal ratio, the longer the emission wavelength.
  • the InN mixed crystal ratio is determined by the TMI molar flow rate / (TMG molar flow rate + TMI molar flow rate), the V / III ratio, and the growth temperature.
  • the temperature of the wafer 11 ′ is set to 800 to 1100 ° C.
  • the pressure in the reaction vessel is set to 10 to 100 kPa
  • the carrier gas H 2 is circulated in the reaction vessel and supplied as a reaction gas to supply a group V element.
  • a source (NH 3 ), a group III element supply source 1 (TMG), a group III element supply source 3 (TMA), and a p-type dopant supply source (Cp 2 Mg) are flowed.
  • p-type AlGaN is epitaxially grown immediately above the multiple quantum well layer 15 to form a p-type AlGaN layer 16.
  • a group V element supply source (NH 3 ), a group III element supply source 1 (TMG), and a p-type dopant supply source (Cp 2 Mg) are flowed as reaction gases.
  • p-type GaN is epitaxially grown immediately above the p-type AlGaN layer 16 to form a p-type GaN layer 17.
  • n-type GaN layer 13 is exposed by partially reactive ion etching of the wafer 11 ′ on which the semiconductor layer is formed, and the n-type InGaN layer 14 is exposed by a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition).
  • An n-type electrode 18 is formed on the substrate.
  • a p-type electrode 19 is formed on the p-type GaN layer 17.
  • a transparent conductive film such as ITO may be interposed between the p-type GaN layer 17 and the p-type electrode 19.
  • the wafer 11 ′ is cleaved and divided into individual semiconductor light emitting elements 10.
  • Test evaluation 1 A semiconductor light emitting device having the same configuration as that of the above embodiment was manufactured.
  • a processed substrate of a sapphire substrate whose main surface with fine irregularities formed on the surface was an r-plane was used. Then, on the sapphire substrate, a u-GaN layer whose principal surface is a ⁇ 11-22 ⁇ plane is grown through a low-temperature buffer layer, and a semiconductor is epitaxially grown on the u-GaN layer to form an n-type GaN layer, n A type InGaN layer, a multiple quantum well layer, a p-type AlGaN layer, and a p-type GaN layer were sequentially stacked. Therefore, the main surface of each layer is the ⁇ 11-22 ⁇ plane.
  • the semiconductor light emitting device As the semiconductor light emitting device, a plurality of types in which the light emission wavelength of the multiple quantum well layer was 420 nm (purple) and the In content ratio x in the n-type InGaN layer was varied were produced. Similarly, for each of the light emission wavelength of 450 nm (blue) and the light emission wavelength of 520 nm (green), a plurality of types in which the In content ratio x in the n-type InGaN layer was varied were produced. A semiconductor light emitting device without a reference n-type InGaN layer was also produced.
  • FIG. 3 shows the relationship between the In content ratio x of the InGaN layer and the magnification of PL emission intensity based on the reference.
  • the PL emission intensity magnification is larger than 1, and thus high luminous efficiency can be obtained.
  • remarkably high luminous efficiency can be obtained in the range of 0.01 ⁇ x ⁇ 0.05 and those that emit purple light.
  • the In content ratio x in the n-type InGaN layer is in the range of 0 ⁇ x ⁇ 0.15
  • the n-type InGaN layer is n
  • Test evaluation 2 In the same manner as in Test Evaluation 1, a semiconductor light-emitting element of the same kind that emits blue-green light with a variable thickness of the n-type InGaN layer was produced.
  • the In content ratio x was set to 0.02.
  • a semiconductor light emitting device without a reference n-type InGaN layer was also produced. For each semiconductor light emitting device, the full width at half maximum of the emission intensity distribution with respect to the emission wavelength of the multiple quantum well layer at the time of current injection of 20 mA was obtained.
  • FIG. 4 shows the relationship between the thickness of the n-type InGaN layer and the full width at half maximum of the emission intensity distribution.
  • the full width at half maximum of the light emission intensity distribution is a little over 40 nm (white circle in FIG. 4), but when the thickness of the n-type InGaN layer is 0.2 ⁇ m or more, light emission It can be seen that the full width at half maximum of the intensity distribution is 40 nm or less, and at 0.3 ⁇ m or more, the full width at half maximum of the emission intensity distribution is 35 nm or less, and about 1.0 nm at 1.0 ⁇ m. That is, this indicates that the high light emission efficiency of the semiconductor light emitting device can be obtained when the thickness of the n-type InGaN layer is 0.2 ⁇ m or more.
  • the present invention is useful for semiconductor light emitting devices.

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Abstract

A semiconductor light-emitting element (10) is provided with a GaN layer (13), an InGaN layer (14) directly above the GaN layer (13), and a multiple quantum well layer (15) directly above the InGaN layer (14). Distortion of the InGaN layer (14) due to lattice mismatch with the GaN layer (13) is partially or completely relaxed.

Description

半導体発光素子Semiconductor light emitting device
　本発明は半導体発光素子に関する。 The present invention relates to a semiconductor light emitting device.
　半導体発光素子として、サファイア基板上にｎ型ＧａＮ層が設けられ、さらにその上にＧａＮとＩｎＧａＮとが交互に積層されて構成された多重量子井戸層が設けられた構造は公知である。 As a semiconductor light emitting device, a structure in which an n-type GaN layer is provided on a sapphire substrate and a multiple quantum well layer formed by alternately stacking GaN and InGaN thereon is known.
　また、特許文献１には、サファイア基板上にバッファ層を介してｎ型ＧａＮ層が設けられ、そして、その上にノンドープのＩｎａＧａ１－ａＮ（０．０１≦ａ≦０．０５）で形成された厚さ１８０ｎｍの歪み緩和層が設けられ、さらにその上にＧａＮとＩｎＧａＮとが交互に積層されて構成された多重量子井戸層が設けられ、サファイア基板と多重量子井戸層との熱膨張係数の差異により発生する歪みによる応力を歪み緩和層により緩和した半導体発光素子が開示されている。 In Patent Document 1, an n-type GaN layer is provided on a sapphire substrate via a buffer layer, and non-doped In a Ga 1-a N (0.01 ≦ a ≦ 0.05) is formed thereon. A strain relaxation layer having a thickness of 180 nm formed in step (b) is provided, and a multiple quantum well layer formed by alternately stacking GaN and InGaN is provided on the strain relaxation layer, and the heat of the sapphire substrate and the multiple quantum well layer is provided. A semiconductor light emitting device is disclosed in which stress due to strain generated by a difference in expansion coefficient is relaxed by a strain relaxation layer.
特開平１１－２３３８２４号公報Japanese Patent Laid-Open No. 11-233824
　本発明は、主面が非極性面又は半極性面のＧａＮ層と、
　上記ＧａＮ層の直上にＩｎｘＧａ１－ｘＮ（０＜ｘ＜０．１）がエピタキシャル成長して形成され、ｎ型ドーパントを含有した厚さ０．２μｍ以上のＩｎＧａＮ層と、
　上記ＩｎＧａＮ層の直上にエピタキシャル成長して形成され、ＩｎＧａＮで形成された井戸層を含む多重量子井戸層と、
を備え、
　上記ＩｎＧａＮ層は、上記ＧａＮ層との間の格子不整合による歪みが完全に又は部分的に緩和している半導体発光素子である。 The present invention comprises a GaN layer whose main surface is a nonpolar or semipolar surface,
In x Ga 1-x N (0 <x <0.1) is formed by epitaxial growth directly on the GaN layer, and includes an n-type dopant-containing InGaN layer having a thickness of 0.2 μm or more,
A multiple quantum well layer formed by epitaxial growth directly on the InGaN layer and including a well layer formed of InGaN;
With
The InGaN layer is a semiconductor light emitting device in which strain due to lattice mismatch with the GaN layer is completely or partially relaxed.
実施形態に係る半導体発光素子の断面図である。It is sectional drawing of the semiconductor light-emitting device concerning embodiment. （ａ）～（ｅ）は実施形態に係る半導体発光素子の製造方法の説明図である。(A)-(e) is explanatory drawing of the manufacturing method of the semiconductor light-emitting device based on Embodiment. ＩｎＧａＮ層のＩｎの含有割合ｘとリファレンスを基準としたＰＬ発光強度の倍率との関係を示すグラフである。It is a graph which shows the relationship between the content rate x of In of an InGaN layer, and the magnification of PL emitted light intensity on the basis of a reference. ｎ型ＩｎＧａＮ層の厚さと発光強度分布の半値全幅との関係を示すグラフである。It is a graph which shows the relationship between the thickness of an n-type InGaN layer, and the full width at half maximum of light emission intensity distribution.
　以下、実施形態について図面に基づいて詳細に説明する。 Hereinafter, embodiments will be described in detail based on the drawings.
　（半導体発光素子）
　図１は実施形態に係る半導体発光素子１０を示す。本実施形態に係る半導体発光素子１０は、例えば半導体レーザや発光ダイオードとして好適に用いられるものである。 (Semiconductor light emitting device)
FIG. 1 shows a semiconductor light emitting device 10 according to an embodiment. The semiconductor light emitting device 10 according to the present embodiment is suitably used, for example, as a semiconductor laser or a light emitting diode.
　本実施形態に係る半導体発光素子１０は、基板１１上に、ｕ-ＧａＮ層１２、ｎ型ＧａＮ層１３、ｎ型ＩｎＧａＮ層１４、多重量子井戸層１５、ｐ型ＡｌＧａＮ層１６、及びｐ型ＧａＮ層１７が順に積層され、そして、エッチングにより露出したｎ型ＩｎＧａＮ層１４上にｎ型電極１８及びｐ型ＧａＮ層１７上にｐ型電極１９がそれぞれ設けられた構成を有する。 The semiconductor light emitting device 10 according to this embodiment includes a u-GaN layer 12, an n-type GaN layer 13, an n-type InGaN layer 14, a multiple quantum well layer 15, a p-type AlGaN layer 16, and a p-type GaN on a substrate 11. The layer 17 is sequentially stacked, and the n-type electrode 18 and the p-type electrode 19 are respectively provided on the n-type InGaN layer 14 exposed by etching and the p-type GaN layer 17.
　ここで、基板１１としては、例えば、典型的にはサファイア基板（Ａｌ２Ｏ３のコランダム構造の単結晶基板）が挙げられ、その他、ＺｎＯ基板、ＳｉＣ基板等が挙げられる。また、基板１１は、基板表面にエッチング等により微細凹凸を形成した加工基板であってもよく、また、基板表面に酸化窒化ケイ素（ＳｉＯｘＮｙ）或いは窒化アルミニウム（ＡｌＮ）等を部分的に設けて微細凹凸を形成した加工基板であってもよい。基板１１は、例えば、発光素子の状態では矩形板状に形成されており、縦及び横のそれぞれが２００～１０００μｍ、並びに厚さが５０～３００μｍである。 Here, as the substrate 11, for example, a sapphire substrate (single crystal substrate having a corundum structure of Al 2 O 3 ) is typically exemplified, and other examples include a ZnO substrate and a SiC substrate. The substrate 11 may be a processed substrate in which fine irregularities are formed on the substrate surface by etching or the like, and silicon oxynitride (SiO x N y ) or aluminum nitride (AlN) or the like is partially formed on the substrate surface. It may be a processed substrate provided with fine irregularities. For example, the substrate 11 is formed in a rectangular plate shape in the state of the light emitting element, and is 200 to 1000 μm in length and width, and 50 to 300 μm in thickness.
　基板１１の主面は、ａ面＜｛１１－２０｝面＞、ｃ面＜｛０００１｝面＞、ｍ面＜｛１－１００｝面＞、ｎ面＜｛１－１２３｝面＞及びｒ面＜｛１－１０２｝面＞のいずれであってもよく、また、他の面方位の結晶面であってもよい。 The principal surfaces of the substrate 11 are a plane <{11-20} plane>, c plane <{0001} plane>, m plane <{1-100} plane>, n plane <{1-123} plane> and r. Any of the planes <{1-102} plane>, or a crystal plane with another plane orientation may be used.
　基板１１の結晶成長面は、主面であってもよく、また、加工基板の凹凸の側面であってもよい。基板１１の結晶成長面は、ａ面＜｛１１－２０｝面＞、ｃ面＜｛０００１｝面＞、ｍ面＜｛１－１００｝面＞、ｎ面＜｛１－１２３｝面＞及びｒ面＜｛１－１０２｝面＞のいずれであってもよく、また、他の面方位の結晶面であってもよい。 The crystal growth surface of the substrate 11 may be a main surface, or may be an uneven side surface of a processed substrate. Crystal growth planes of the substrate 11 are a plane <{11-20} plane>, c plane <{0001} plane>, m plane <{1-100} plane>, n plane <{1-123} plane> and It may be any of the r-plane <{1-102} plane>, or may be a crystal plane with another plane orientation.
　ｕ-ＧａＮ層１２は、基板１１の結晶成長面からＧａＮがドーパントを含まずにエピタキシャル結晶成長して形成されている。ｕ-ＧａＮ層１２の厚さは例えば２～２０μｍである。 The u-GaN layer 12 is formed by epitaxially growing GaN from the crystal growth surface of the substrate 11 without containing a dopant. The thickness of the u-GaN layer 12 is, for example, 2 to 20 μm.
　ｕ-ＧａＮ層１２の主面は、非極性面又は半極性面であり、｛１１－２２｝面であってもよく、また、｛１０－１１｝面等の他の面方位の結晶面であってもよい。 The main surface of the u-GaN layer 12 is a nonpolar plane or a semipolar plane, and may be a {11-22} plane, or a crystal plane with another plane orientation such as a {10-11} plane. There may be.
　ｎ型ＧａＮ層１３はあっても無くてもよい。ｎ型ＧａＮ層１３は、ｕ-ＧａＮ層１２の直上に、ＧａＮがｎ型のドーパントを含んでｕ-ＧａＮ層１２と同一面方位にエピタキシャル結晶成長して形成されており、従って、主面が非極性面又は半極性面である。ｎ型ドーパントとしては、例えば、Ｓｉ、Ｇｅ等が挙げられる。ｎ型ドーパントの濃度は例えば１．０×１０１７～１．０×１０２０／ｃｍ３である。ｎ型ＧａＮ層１３の厚さは例えば２～１０μｍである。 The n-type GaN layer 13 may or may not be present. The n-type GaN layer 13 is formed by epitaxially growing GaN in the same plane direction as the u-GaN layer 12 including an n-type dopant immediately above the u-GaN layer 12. Nonpolar or semipolar surface. Examples of the n-type dopant include Si and Ge. The concentration of the n-type dopant is, for example, 1.0 × 10 17 to 1.0 × 10 20 / cm 3 . The thickness of the n-type GaN layer 13 is, for example, 2 to 10 μm.
　ｎ型ＩｎＧａＮ層１４は、ｎ型ＧａＮ層１３がある場合はその直上に、無い場合はＧａＮ層１２の直上に、ＩｎｘＧａ１－ｘＮがｎ型のドーパントを含んでｎ型ＧａＮ層１３と同一面方位にエピタキシャル結晶成長して形成されており、従って、主面が非極性面又は半極性面である。 The n-type InGaN layer 14 is formed immediately above the n-type GaN layer 13 when it is present, or directly above the GaN layer 12 when it is not present, and the In x Ga 1-x N contains an n-type dopant. Therefore, the main surface is a nonpolar surface or a semipolar surface.
　ｎ型ＩｎＧａＮ層１４を形成するＩｎｘＧａ１－ｘＮは、Ｉｎの含有割合が０＜ｘ＜０．１であり、好ましくは０＜ｘ＜０．０５であり、より好ましくは０．０１＜ｘ＜０．０５である。ｎ型ドーパントとしては、ｎ型ＧａＮ層１３の場合と同様、例えば、Ｓｉ、Ｇｅ等が挙げられる。ｎ型ドーパントの濃度は例えば１．０×１０１７～１．０×１０２０／ｃｍ３である。ｎ型ＩｎＧａＮ層１４は、単一層で構成されていてもよく、また、ｎ型ドーパントの種類や濃度の異なる複数の層で構成されていてもよい。 In x Ga 1-x N forming the n-type InGaN layer 14 has an In content ratio of 0 <x <0.1, preferably 0 <x <0.05, more preferably 0.01. <X <0.05. Examples of the n-type dopant include Si and Ge as in the case of the n-type GaN layer 13. The concentration of the n-type dopant is, for example, 1.0 × 10 17 to 1.0 × 10 20 / cm 3 . The n-type InGaN layer 14 may be composed of a single layer, or may be composed of a plurality of layers having different n-type dopant types and concentrations.
　ｎ型ＩｎＧａＮ層１４の厚さは０．２μｍ以上であるが、好ましくは０．２～１０μｍであり、より好ましくは０．５～５μｍである。 The thickness of the n-type InGaN layer 14 is 0.2 μm or more, preferably 0.2 to 10 μm, more preferably 0.5 to 5 μm.
　そして、以上の構成のｎ型ＩｎＧａＮ層１４は、ｎ型ＧａＮ層１３との間の格子不整合による歪みが完全に又は部分的に緩和している。ここで、本出願において、「完全緩和」とは、ＩｎＧａＮ層が下地のＧａＮ層に対して１００％緩和していることを意味し、「部分緩和」とは、緩和率＞０であると定義する。 In the n-type InGaN layer 14 having the above configuration, strain due to lattice mismatch with the n-type GaN layer 13 is completely or partially relaxed. Here, in this application, “complete relaxation” means that the InGaN layer is 100% relaxed with respect to the underlying GaN layer, and “partial relaxation” is defined as a relaxation rate> 0. To do.
　多重量子井戸層１５は、ｎ型ＩｎＧａＮ層１４の直上に、ｎ型ＩｎＧａＮ層１４と同一面方位に半導体がエピタキシャル結晶成長して形成され、従って、主面が非極性面又は半極性面であり、そして、障壁層１５ａと井戸層１５ｂの交互積層構造を有する。障壁層１５ａ及び井戸層１５ｂの層数は例えば３～１５層である。多重量子井戸層１５は発光層を構成し、その発光波長は、可視領域の波長であって、具体的にはＩｎＧａＮの発光領域の３６０～６４０ｎｍである。多重量子井戸層１５は、紫色、青色、又は緑色に発光するように構成されていることが好ましく、紫色に発光するように構成されていることがより好ましい。ここで、紫色の発光波長域は３８０～４５０ｎｍ、青色の発光波長域は４５０～４９５ｎｍ、緑色の発光波長域は４９５～５７０ｎｍである。 The multiple quantum well layer 15 is formed by epitaxially growing a semiconductor in the same plane orientation as the n-type InGaN layer 14 immediately above the n-type InGaN layer 14, and thus the main surface is a nonpolar or semipolar surface. And it has the alternately laminated structure of the barrier layer 15a and the well layer 15b. The number of barrier layers 15a and well layers 15b is, for example, 3 to 15. The multiple quantum well layer 15 constitutes a light emitting layer, and its light emission wavelength is a wavelength in the visible region, specifically, 360 to 640 nm in the light emitting region of InGaN. The multiple quantum well layer 15 is preferably configured to emit purple, blue, or green light, and more preferably configured to emit purple light. Here, the purple emission wavelength range is 380 to 450 nm, the blue emission wavelength range is 450 to 495 nm, and the green emission wavelength range is 495 to 570 nm.
　井戸層１５ｂはＩｎｙＧａ１－ｙＮで形成されており、ｙはｘよりも大きいことが好ましい。井戸層１５ｂの厚さは例えば１～２０ｎｍである。 The well layer 15b is made of In y Ga 1-y N, and y is preferably larger than x. The thickness of the well layer 15b is, for example, 1 to 20 nm.
　障壁層１５ａを形成する半導体は、例えばバンドギャップが井戸層１５ｂよりも大きいＧａＮ等が挙げられる。障壁層１５ａの厚さは例えば５～２０ｎｍである。 Examples of the semiconductor forming the barrier layer 15a include GaN having a band gap larger than that of the well layer 15b. The thickness of the barrier layer 15a is, for example, 5 to 20 nm.
　ｐ型ＡｌＧａＮ層１６は、多重量子井戸層１５の直上に、ＡｌｚＧａ１－ｚＮがｐ型のドーパントを含んで多重量子井戸層１５と同一面方位にエピタキシャル結晶成長して形成されており、従って、主面が非極性面又は半極性面である。ｐ型ＡｌＧａＮ層１６を形成するＡｌｚＧａ１－ｚＮは、Ａｌの含有割合が例えば０．０５＜ｚ＜０．３である。ｐ型ドーパントとしては、例えば、Ｍｇ、Ｃ等が挙げられる。ｐ型ドーパントの場合、アクセプタ準位が深く、ドーパント濃度と自由正孔濃度とが大きく異なることから、ホール効果で測定される自由正孔濃度を含有量評価指標とするが、その自由正孔濃度は例えば１．０×１０１７～５×１０１８／ｃｍ３である。ｐ型ＡｌＧａＮ層１６は、単一層で構成されていてもよく、また、ｐ型ドーパントの種類や濃度の異なる複数の層で構成されていてもよい。ｐ型ＡｌＧａＮ層１６の厚さは例えば１０～３０ｎｍである。 The p-type AlGaN layer 16 is formed immediately above the multiple quantum well layer 15 by epitaxially growing Al z Ga 1-z N containing a p-type dopant in the same plane orientation as the multiple quantum well layer 15. Therefore, the main surface is a nonpolar surface or a semipolar surface. Al z Ga 1-z N forming the p-type AlGaN layer 16 has an Al content ratio of, for example, 0.05 <z <0.3. Examples of the p-type dopant include Mg and C. In the case of a p-type dopant, since the acceptor level is deep and the dopant concentration and the free hole concentration differ greatly, the free hole concentration measured by the Hall effect is used as the content evaluation index. Is, for example, 1.0 × 10 17 to 5 × 10 18 / cm 3 . The p-type AlGaN layer 16 may be composed of a single layer, or may be composed of a plurality of layers having different types and concentrations of p-type dopants. The thickness of the p-type AlGaN layer 16 is, for example, 10 to 30 nm.
　ｐ型ＧａＮ層１７は、ｐ型ＡｌＧａＮ層１６の直上に、ＧａＮがｐ型のドーパントを含んでｐ型ＡｌＧａＮ層１６と同一面方位にエピタキシャル結晶成長して形成されており、従って、主面が非極性面又は半極性面である。ｐ型ドーパントとしては、ｐ型ＡｌＧａＮ層１６の場合と同様、例えば、Ｍｇ、Ｃ等が挙げられる。ホール効果測定で測定される自由正孔濃度は例えば２．０×１０１７～１０×１０１７／ｃｍ３である。ｐ型ＧａＮ層１７は、単一層で構成されていてもよく、また、ｐ型ドーパントの種類や濃度の異なる複数の層で構成されていてもよい。ｐ型ＧａＮ層１７の厚さは例えば５０～２００ｎｍである。 The p-type GaN layer 17 is formed directly on the p-type AlGaN layer 16 by epitaxially growing GaN in the same plane orientation as that of the p-type AlGaN layer 16 including the p-type dopant. Nonpolar or semipolar surface. Examples of the p-type dopant include Mg and C as in the case of the p-type AlGaN layer 16. The free hole concentration measured by the Hall effect measurement is, for example, 2.0 × 10 17 to 10 × 10 17 / cm 3 . The p-type GaN layer 17 may be composed of a single layer, or may be composed of a plurality of layers having different types and concentrations of the p-type dopant. The thickness of the p-type GaN layer 17 is, for example, 50 to 200 nm.
　なお、ｐ型層については、これらのｐ型ＡｌＧａＮ層１６及びｐ型ＧａＮ層１７に限定されるものではなく、ＩｎＧａＮ／ＧａＮの超格子構造等の特殊な構造であってもよい。 The p-type layer is not limited to the p-type AlGaN layer 16 and the p-type GaN layer 17, and may be a special structure such as an InGaN / GaN superlattice structure.
　ｎ型電極１８の構成電極材料としては、例えば、Ｃｒ／Ａｕ，Ｔｉ／Ａｌ、Ｔｉ／Ａｌ／Ｍｏ／Ａｕ、Ｈｆ／Ａｕ等の積層構造、或いは合金等が挙げられる。ｎ型電極１８の厚さは例えばＴｉ／Ａｌ（１０ｎｍ／５００ｎｍ）である。 Examples of the constituent electrode material of the n-type electrode 18 include a laminated structure such as Cr / Au, Ti / Al, Ti / Al / Mo / Au, and Hf / Au, or an alloy. The thickness of the n-type electrode 18 is, for example, Ti / Al (10 nm / 500 nm).
　ｐ型電極１９としては、例えば、Ｐｄ／Ｐｔ／Ａｕ、Ｎｉ／Ａｕ、Ｐｄ／Ｍｏ／Ａｕ等の積層構造、或いは合金等、又はＩＴＯ（酸化インジウム錫）などの酸化物系透明導電材料が挙げられる。ｐ型電極１９の厚さは例えばＩＴＯの場合１０～２００ｎｍである。ｐ型電極１９の上にはワイヤーボンディング用のパッド電極が必要であり、多くの場合はｎ型電極１８と同じ材料系で作製される。 Examples of the p-type electrode 19 include a laminated structure such as Pd / Pt / Au, Ni / Au, and Pd / Mo / Au, an alloy, or an oxide-based transparent conductive material such as ITO (indium tin oxide). It is done. The thickness of the p-type electrode 19 is, for example, 10 to 200 nm in the case of ITO. A pad electrode for wire bonding is necessary on the p-type electrode 19, and in many cases, it is made of the same material system as that of the n-type electrode 18.
　ところで、主面が非極性面であるIII族窒化物半導体を用いた半導体発光素子では、その物性の利点から高い発光効率が期待されているが、実際には、多重量子井戸層に含まれるＩｎＧａＮで形成された井戸層に欠陥が入りやすいといった構造的な欠点を有し、その物性の利点を十分に生かしきれていないという問題がある。 By the way, a semiconductor light emitting device using a group III nitride semiconductor whose main surface is a nonpolar surface is expected to have high luminous efficiency because of its physical properties, but actually, InGaN contained in a multiple quantum well layer. There is a problem that the well layer formed in (1) has a structural defect such that defects are likely to enter, and the advantages of the physical properties are not fully utilized.
　これに対し、上記構成の本実施形態に係る半導体発光素子１０では、ｎ型ＧａＮ層１３と多重量子井戸層１５との間にＩｎＧａＮの層が介設されており、そのため発光層での転位の発生が抑制される。また、ｎ型ドーパントを含有する主面が非極性面又は半極性面のｎ型ＧａＮ層１３と多重量子井戸層１５との間に、ＩｎｘＧａ１－ｘＮ（０＜ｘ＜０．１）がエピタキシャル成長して形成された、ｎ型ＧａＮ層１３と同型のｎ型ドーパントを含有した厚さ０．２μｍ以上のｎ型ＩｎＧａＮ層１４が介設され、しかも、そのｎ型ＩｎＧａＮ層１４がｎ型ＧａＮ層１３との間の格子不整合による歪みが完全又は部分的に緩和し、そのため欠陥は貫通転位とならないため、ｎ型ＩｎＧａＮ層１４の欠陥密度が下地のｎ型ＧａＮ層１３と同等となることにより高い発光効率を得ることができる。具体的には、多重量子井戸層１５の発光波長に対する発光強度分布の半値全幅が４０ｎｍ以下であることが好ましく、３５ｎｍ以下であることがより好ましい。なお、ｎ型ＧａＮ層１３が無く、ｕ-ＧａＮ層１２と多重量子井戸層１５との間にｎ型ＩｎＧａＮ層１４が介設された構成であっても同様の作用効果を得ることができる。 On the other hand, in the semiconductor light emitting device 10 according to this embodiment having the above-described configuration, an InGaN layer is interposed between the n-type GaN layer 13 and the multiple quantum well layer 15, and therefore, dislocations in the light emitting layer are eliminated. Occurrence is suppressed. In addition, In x Ga 1-x N (0 <x <0.1) is provided between the n-type GaN layer 13 whose main surface containing the n-type dopant is a nonpolar plane or a semipolar plane and the multiple quantum well layer 15. ) Is formed by epitaxial growth, and an n-type InGaN layer 14 having a thickness of 0.2 μm or more containing an n-type dopant of the same type as that of the n-type GaN layer 13 is interposed, and the n-type InGaN layer 14 is n The strain due to lattice mismatch with the n-type GaN layer 13 is completely or partially relaxed, so that the defects do not become threading dislocations. Therefore, the defect density of the n-type InGaN layer 14 is equal to that of the underlying n-type GaN layer 13. Thus, high luminous efficiency can be obtained. Specifically, the full width at half maximum of the emission intensity distribution with respect to the emission wavelength of the multiple quantum well layer 15 is preferably 40 nm or less, and more preferably 35 nm or less. Even if the n-type GaN layer 13 is not provided and the n-type InGaN layer 14 is interposed between the u-GaN layer 12 and the multiple quantum well layer 15, the same effect can be obtained.
　（半導体発光素子の製造方法）
　次に、本実施形態に係る半導体発光素子１０の製造方法について図２（ａ）～（ｅ）に基づいて説明する。 (Manufacturing method of semiconductor light emitting device)
Next, a method for manufacturing the semiconductor light emitting device 10 according to this embodiment will be described with reference to FIGS.
　本実施形態に係る半導体発光素子１０の製造方法では、ウエハ１１’上にｕ-ＧａＮ層１２、ｎ型ＧａＮ層１３（Ｓｉドープ）、ｎ型ＩｎＧａＮ層１４（Ｓｉドープ）、発光層である多重量子井戸層１５（障壁層１５ａ：ＧａＮ、井戸層１５ｂ：ＩｎＧａＮ）、ｐ型ＡｌＧａＮ層１６（Ｍｇドープ）、及びｐ型ＧａＮ層１７（Ｍｇドープ）の各半導体層を順に形成した後、エッチングによりｎ型ＧａＮ層１３を露出させ、そして、ｎ型ＩｎＧａＮ層１４及びｐ型ＧａＮ層１７の上にそれぞれｎ型電極１８及びｐ型電極１９を形成する。 In the method for manufacturing the semiconductor light emitting device 10 according to the present embodiment, the u-GaN layer 12, the n-type GaN layer 13 (Si-doped), the n-type InGaN layer 14 (Si-doped), and the light emitting layer on the wafer 11 ′. Each semiconductor layer of the quantum well layer 15 (barrier layer 15a: GaN, well layer 15b: InGaN), p-type AlGaN layer 16 (Mg-doped), and p-type GaN layer 17 (Mg-doped) is sequentially formed, and then etched. The n-type GaN layer 13 is exposed, and an n-type electrode 18 and a p-type electrode 19 are formed on the n-type InGaN layer 14 and the p-type GaN layer 17, respectively.
　＜ウエハの準備＞
　ウエハ１１’を準備する。ウエハ１１’は、その直径によっても変わるが厚さが０．３～３．０ｍｍ、及び直径が５０～３００ｍｍである。なお、直径５０ｍｍのウエハ１１’の場合では、１枚の上に５０００～１２０００個の半導体発光素子１０を作り込むことができる。 <Wafer preparation>
A wafer 11 ′ is prepared. The wafer 11 ′ has a thickness of 0.3 to 3.0 mm and a diameter of 50 to 300 mm, depending on its diameter. In the case of the wafer 11 ′ having a diameter of 50 mm, 5000 to 12000 semiconductor light emitting elements 10 can be formed on one wafer.
　ウエハ１１’の表面には、必要に応じて、エッチング、或いは、酸化窒化ケイ素（ＳiＯｘＮｙ）の堆積により、サブミクロンオーダーの多数の微細凹凸を形成加工する。 On the surface of the wafer 11 ′, a large number of fine irregularities on the order of submicrons are formed and processed by etching or silicon oxynitride (SiOxNy) deposition as necessary.
　＜半導体層の形成＞
　以下の各半導体層の形成方法としては、有機金属気相成長法（ＭＯＶＰＥ法）、ハロゲン気相成長法（ＶＰＥ法）、分子線エピタキシ法（ＭＢＥ法）、ハイドライド気相成長法（ＨＶＰＥ法）等が挙げられ、これらのうち有機金属気相成長法が最も一般的である。以下では、有機金属気相成長法を利用した各半導体層の形成方法について説明する。 <Formation of semiconductor layer>
The following semiconductor layers can be formed by metalorganic vapor phase epitaxy (MOVPE), halogen vapor phase epitaxy (VPE), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE). Of these, metal organic vapor phase epitaxy is the most common. Below, the formation method of each semiconductor layer using a metal organic chemical vapor deposition method is demonstrated.
　各半導体層の形成に用いるＭＯＶＰＥ装置は、各々、電子制御される、ウエハ搬送系、ウエハ加熱系、ガス供給系、及びガス排気系で構成されている。ウエハ加熱系は、熱電対及び抵抗加熱ヒータ、その上に設けられた炭素製或いはＳｉＣ製のサセプタで構成されている。そして、ＭＯＶＰＥ装置は、ウエハ加熱系において、搬送される石英トレイのサセプタの上にセットされたウエハ１１’上に反応ガスにより半導体層を結晶成長させるように構成されている。 The MOVPE apparatus used for forming each semiconductor layer is composed of a wafer transfer system, a wafer heating system, a gas supply system, and a gas exhaust system that are electronically controlled. The wafer heating system is composed of a thermocouple, a resistance heater, and a carbon or SiC susceptor provided thereon. In the wafer heating system, the MOVPE apparatus is configured to grow a semiconductor layer with a reactive gas on a wafer 11 'set on a susceptor of a quartz tray to be conveyed.
　－ｕ-ＧａＮ層－
　上記ＭＯＶＰＥ装置を用いて、ウエハ１１’を石英トレイ上にセットした後、ウエハ１１’を１０５０～１１５０℃に加熱すると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内に設置したフローチャネル内にキャリアガスとしてＨ２を流通させ、その状態を数分間保持することによりウエハ１１’をサーマルクリーニングする。 -U-GaN layer-
After the wafer 11 ′ was set on the quartz tray using the MOVPE apparatus, the wafer 11 ′ was heated to 1050 to 1150 ° C. and the pressure in the reaction vessel was set to 10 to 100 kPa, and was set in the reaction vessel. H 2 is circulated as a carrier gas in the flow channel, and this state is maintained for several minutes to thermally clean the wafer 11 ′.
　次いで、ウエハ１１’の温度を１０５０～１１５０℃とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＨ２を１０Ｌ／ｍｉｎ程度の流量（以下、ガス流量は基準状態（０℃、１気圧）での値とする。）で流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ３）、及びIII族元素供給源（ＴＭＧ）を、それぞれの供給流量が０．１～５Ｌ／ｍｉｎ、及び５０～１５０μｍｏｌ／ｍｉｎとなるように流す。 Next, the temperature of the wafer 11 ′ is set to 1050 to 1150 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H 2 is flowed into the reaction vessel at a flow rate of about 10 L / min (hereinafter, the gas flow rate is a reference). In this state, the V group element supply source (NH 3 ) and the Group III element supply source (TMG) are supplied as reaction gases. The flow rate is 0.1 to 5 L / min and 50 to 150 μmol / min.
　このとき、ウエハ１１’の結晶成長面を起点として、その上にアンドープのＧａＮがエピタキシャル結晶成長し、図２（ａ）に示すように、ウエハ１１’上にｕ-ＧａＮ層１２が構成される。 At this time, starting from the crystal growth surface of the wafer 11 ′, undoped GaN is epitaxially grown thereon, and as shown in FIG. 2A, the u-GaN layer 12 is formed on the wafer 11 ′. .
　なお、ｕ-ＧａＮ層１２を形成する前に低温バッファ層を形成する場合には、ウエハ１１’の温度を４００～５００℃としてＧａＮを結晶成長させる。 In the case where the low temperature buffer layer is formed before the u-GaN layer 12 is formed, the temperature of the wafer 11 ′ is set to 400 to 500 ° C., and GaN is crystal-grown.
　－ｎ型ＧａＮ層－
　反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＨ２を５～１５Ｌ／ｍｉｎの流量で流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ３）、III族元素供給源１（ＴＭＧ）、及びｎ型ドーパント供給源（ＳｉＨ４）を、それぞれの供給流量が０．１～５Ｌ／ｍｉｎ、５０～１５０μｍｏｌ／ｍｉｎ、及び１～５×１０－３μｍｏｌ／ｍｉｎとなるように流す。 -N-type GaN layer-
The pressure in the reaction vessel is set to 10 to 100 kPa, and a carrier gas H 2 is circulated in the reaction vessel at a flow rate of 5 to 15 L / min, and as a reaction gas, a group V element supply source (NH 3 ), Group III element supply source 1 (TMG) and n-type dopant supply source (SiH 4 ) are supplied at flow rates of 0.1 to 5 L / min, 50 to 150 μmol / min, and 1 to 5 × 10 −3 μmol, respectively. / Min.
　このとき、図２（ｂ）に示すように、ｕ-ＧａＮ層１２の直上にｎ型ＧａＮがエピタキシャル結晶成長してｎ型ＧａＮ層１３が形成される。 At this time, as shown in FIG. 2B, n-type GaN is epitaxially grown immediately above the u-GaN layer 12 to form an n-type GaN layer 13.
　－ｎ型ＩｎＧａＮ層－
　ウエハ１１’の温度を６００～８５０℃程度とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＮ２を流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ３）、III族元素供給源１（ＴＭＧ）、III族元素供給源２（ＴＭＩ）、及びｎ型ドーパント供給源（ＳｉＨ４）を供給する。 -N-type InGaN layer-
The temperature of the wafer 11 ′ is set to about 600 to 850 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and a carrier gas N 2 is circulated in the reaction vessel, and a group V element is supplied as a reaction gas therein. A source (NH 3 ), a group III element source 1 (TMG), a group III element source 2 (TMI), and an n-type dopant source (SiH 4 ) are supplied.
　このとき、図２（ｃ）に示すように、ｎ型ＧａＮ層１３の直上にｎ型ＩｎＧａＮがエピタキシャル結晶成長してｎ型ＩｎＧａＮ層１４が形成される。 At this time, as shown in FIG. 2C, n-type InGaN is epitaxially grown immediately above the n-type GaN layer 13 to form an n-type InGaN layer 14.
　－多重量子井戸層－
　ウエハ１１’の温度を６００～８５０℃程度とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＮ２を流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ３）、及びIII族元素供給源（ＴＭＧ）を、それぞれの供給流量を流す。このとき、ｎ型ＩｎＧａＮ層１４の直上にＧａＮがエピタキシャル結晶成長して障壁層１５ａが形成される。 -Multiple quantum well layer-
The temperature of the wafer 11 ′ is set to about 600 to 850 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and a carrier gas N 2 is circulated in the reaction vessel, and as a reaction gas, a group V element supply source is provided. (NH 3 ) and a group III element supply source (TMG) are supplied at respective supply flow rates. At this time, GaN epitaxially grows immediately above the n-type InGaN layer 14 to form the barrier layer 15a.
　次いで、Ｖ族元素供給源（ＮＨ３）、III族元素供給源１（ＴＭＧ）、及びIII族元素供給源２（ＴＭＩ）を流す。このとき、ＧａＮの障壁層１５ａの直上にＩｎＧａＮがエピタキシャル結晶成長して井戸層１５ｂが形成される。 Next, a Group V element supply source (NH 3 ), a Group III element supply source 1 (TMG), and a Group III element supply source 2 (TMI) are flowed. At this time, InGaN is epitaxially grown immediately above the GaN barrier layer 15a to form the well layer 15b.
　そして、上記と同様の操作を交互に繰り返し、図２（ｄ）に示すように、障壁層１５ａと井戸層１５ｂとを交互に形成することにより多重量子井戸層１５を構成する。なお、多重量子井戸層１５の発光波長は井戸層１５ｂの井戸幅（井戸層１５ｂの厚み）とＩｎＮ混晶比に依存し、ＩｎＮ混晶比が高いほど発光波長は長波長となる。ＩｎＮ混晶比はＴＭＩのモル流量／（ＴＭＧのモル流量＋ＴＭＩのモル流量）、Ｖ／ＩＩＩ比と成長温度によって決定される。 Then, the same operation as described above is repeated alternately to form the multiple quantum well layer 15 by alternately forming barrier layers 15a and well layers 15b as shown in FIG. 2 (d). The emission wavelength of the multiple quantum well layer 15 depends on the well width of the well layer 15b (the thickness of the well layer 15b) and the InN mixed crystal ratio, and the higher the InN mixed crystal ratio, the longer the emission wavelength. The InN mixed crystal ratio is determined by the TMI molar flow rate / (TMG molar flow rate + TMI molar flow rate), the V / III ratio, and the growth temperature.
　－ｐ型ＡｌＧａＮ層及びｐ型ＧａＮ層－
　ウエハ１１’の温度を８００～１１００℃とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスのＨ２を流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ３）、III族元素供給源１（ＴＭＧ）、III族元素供給源３（ＴＭＡ）、及びｐ型ドーパント供給源（Ｃｐ２Ｍｇ）を流す。 -P-type AlGaN layer and p-type GaN layer-
The temperature of the wafer 11 ′ is set to 800 to 1100 ° C., the pressure in the reaction vessel is set to 10 to 100 kPa, and the carrier gas H 2 is circulated in the reaction vessel and supplied as a reaction gas to supply a group V element. A source (NH 3 ), a group III element supply source 1 (TMG), a group III element supply source 3 (TMA), and a p-type dopant supply source (Cp 2 Mg) are flowed.
　このとき、図２（ｅ）に示すように、多重量子井戸層１５の直上にｐ型ＡｌＧａＮがエピタキシャル結晶成長してｐ型ＡｌＧａＮ層１６が形成される。 At this time, as shown in FIG. 2E, p-type AlGaN is epitaxially grown immediately above the multiple quantum well layer 15 to form a p-type AlGaN layer 16.
　引き続き、反応ガスとして、Ｖ族元素供給源（ＮＨ３）、III族元素供給源１（ＴＭＧ）、及びｐ型ドーパント供給源（Ｃｐ２Ｍｇ）を流す。 Subsequently, a group V element supply source (NH 3 ), a group III element supply source 1 (TMG), and a p-type dopant supply source (Cp 2 Mg) are flowed as reaction gases.
　このとき、図２（ｅ）に示すように、ｐ型ＡｌＧａＮ層１６の直上にｐ型ＧａＮがエピタキシャル結晶成長してｐ型ＧａＮ層１７が形成される。 At this time, as shown in FIG. 2E, p-type GaN is epitaxially grown immediately above the p-type AlGaN layer 16 to form a p-type GaN layer 17.
　＜電極の形成＞
　半導体層を積層形成したウエハ１１’を部分的に反応性イオンエッチングすることによりｎ型ＧａＮ層１３を露出させ、真空蒸着、スパッタリング、ＣＶＤ（Chemical Vapor Deposition）等の方法によりｎ型ＩｎＧａＮ層１４上にｎ型電極１８を形成する。また、ｐ型ＧａＮ層１７上にｐ型電極１９を形成する。なお、ｐ型ＧａＮ層１７とｐ型電極１９との間にはＩＴＯ等の透明導電膜を介設させてもよい。 <Formation of electrode>
The n-type GaN layer 13 is exposed by partially reactive ion etching of the wafer 11 ′ on which the semiconductor layer is formed, and the n-type InGaN layer 14 is exposed by a method such as vacuum deposition, sputtering, or CVD (Chemical Vapor Deposition). An n-type electrode 18 is formed on the substrate. A p-type electrode 19 is formed on the p-type GaN layer 17. A transparent conductive film such as ITO may be interposed between the p-type GaN layer 17 and the p-type electrode 19.
　最後に、ウエハ１１’を劈開することにより個々の半導体発光素子１０に分断する。 Finally, the wafer 11 ′ is cleaved and divided into individual semiconductor light emitting elements 10.
　（試験評価１）
　上記実施形態と同様の構成の半導体発光素子を作製した。 (Test evaluation 1)
A semiconductor light emitting device having the same configuration as that of the above embodiment was manufactured.
　基板には、表面に微細凹凸を形成した主面がｒ面であるサファイア基板の加工基板を用いた。そして、サファイア基板上に、低温バッファ層を介して主面が｛１１－２２｝面であるｕ-ＧａＮ層を結晶成長させ、その上に、半導体をエピタキシャル結晶成長させてｎ型ＧａＮ層、ｎ型ＩｎＧａＮ層、多重量子井戸層、ｐ型ＡｌＧａＮ層、及びｐ型ＧａＮ層を順に積層形成した。従って、いずれの層も主面が｛１１－２２｝面である。 As the substrate, a processed substrate of a sapphire substrate whose main surface with fine irregularities formed on the surface was an r-plane was used. Then, on the sapphire substrate, a u-GaN layer whose principal surface is a {11-22} plane is grown through a low-temperature buffer layer, and a semiconductor is epitaxially grown on the u-GaN layer to form an n-type GaN layer, n A type InGaN layer, a multiple quantum well layer, a p-type AlGaN layer, and a p-type GaN layer were sequentially stacked. Therefore, the main surface of each layer is the {11-22} plane.
　半導体発光素子として、多重量子井戸層の発光波長が４２０ｎｍ（紫色）であるものについて、ｎ型ＩｎＧａＮ層におけるＩｎの含有割合ｘを変量した複数種を作製した。同様に、発光波長が４５０ｎｍ（青色）であるもの及び発光波長が５２０ｎｍ（緑色）であるもののそれぞれについても、ｎ型ＩｎＧａＮ層におけるＩｎの含有割合ｘを変量した複数種を作製した。なお、リファレンス用のｎ型ＩｎＧａＮ層を設けていない半導体発光素子も作製した。 As the semiconductor light emitting device, a plurality of types in which the light emission wavelength of the multiple quantum well layer was 420 nm (purple) and the In content ratio x in the n-type InGaN layer was varied were produced. Similarly, for each of the light emission wavelength of 450 nm (blue) and the light emission wavelength of 520 nm (green), a plurality of types in which the In content ratio x in the n-type InGaN layer was varied were produced. A semiconductor light emitting device without a reference n-type InGaN layer was also produced.
　そして、各半導体発光素子について、ＰＬ発光強度を測定し、リファレンスを基準としたＰＬ発光強度の倍率を求めた。 And about each semiconductor light emitting element, PL emitted light intensity was measured and the magnification of PL emitted light intensity on the basis of a reference was calculated.
　図３は、ＩｎＧａＮ層のＩｎの含有割合ｘとリファレンスを基準としたＰＬ発光強度の倍率との関係を示す。 FIG. 3 shows the relationship between the In content ratio x of the InGaN layer and the magnification of PL emission intensity based on the reference.
　これによれば、ｎ型ＩｎＧａＮ層におけるＩｎの含有割合ｘが０＜ｘ＜０．１の範囲において、ＰＬ発光強度の倍率は１よりも大きく、従って、高い発光効率を得ることができることが分かる。特に、０．０１＜ｘ＜０．０５の範囲において、また、紫色の発光をするものにおいて、顕著に高い発光効率が得られることが分かる。 According to this, in the range where the In content ratio x in the n-type InGaN layer is in the range of 0 <x <0.1, it is understood that the PL emission intensity magnification is larger than 1, and thus high luminous efficiency can be obtained. . In particular, it can be seen that remarkably high luminous efficiency can be obtained in the range of 0.01 <x <0.05 and those that emit purple light.
　また、各半導体発光素子について逆格子空間マッピング測定を行ったところ、少なくともｎ型ＩｎＧａＮ層におけるＩｎの含有割合ｘが０＜ｘ＜０．１５の範囲にあるものについて、ｎ型ＩｎＧａＮ層は、ｎ型ＧａＮ層との間の格子不整合による歪みが完全に又は部分的に緩和していることが確認された。 Further, when reciprocal lattice space mapping measurement was performed for each semiconductor light emitting element, at least the In content ratio x in the n-type InGaN layer is in the range of 0 <x <0.15, the n-type InGaN layer is n It was confirmed that the strain due to lattice mismatch with the type GaN layer was completely or partially relaxed.
　（試験評価２）
　試験評価１と同様にして、ｎ型ＩｎＧａＮ層の厚さを変量した青緑色を発光する同種の半導体発光素子を作製した。なお、Ｉｎの含有割合ｘ＝０．０２とした。また、リファレンス用のｎ型ＩｎＧａＮ層を設けていない半導体発光素子も作製した。そして、各半導体発光素子について、２０ｍＡの電流注入時における多重量子井戸層の発光波長に対する発光強度分布の半値全幅を求めた。 (Test evaluation 2)
In the same manner as in Test Evaluation 1, a semiconductor light-emitting element of the same kind that emits blue-green light with a variable thickness of the n-type InGaN layer was produced. The In content ratio x was set to 0.02. In addition, a semiconductor light emitting device without a reference n-type InGaN layer was also produced. For each semiconductor light emitting device, the full width at half maximum of the emission intensity distribution with respect to the emission wavelength of the multiple quantum well layer at the time of current injection of 20 mA was obtained.
　図４は、ｎ型ＩｎＧａＮ層の厚さと発光強度分布の半値全幅との関係を示す。 FIG. 4 shows the relationship between the thickness of the n-type InGaN layer and the full width at half maximum of the emission intensity distribution.
　図４によれば、リファレンス用の半導体発光素子では、発光強度分布の半値全幅が４０ｎｍ強であるのに対し（図４の白丸）、ｎ型ＩｎＧａＮ層の厚さが０．２μｍ以上では、発光強度分布の半値全幅が４０ｎｍ以下であり、０．３μｍ以上では、発光強度分布の半値全幅が３５ｎｍ以下、１．０μｍでは約３０ｎｍであることが分かる。つまり、これは、ｎ型ＩｎＧａＮ層の厚さが０．２μｍ以上であることにより、半導体発光素子の高い発光効率を得ることができることを示すものである。 According to FIG. 4, in the reference semiconductor light emitting device, the full width at half maximum of the light emission intensity distribution is a little over 40 nm (white circle in FIG. 4), but when the thickness of the n-type InGaN layer is 0.2 μm or more, light emission It can be seen that the full width at half maximum of the intensity distribution is 40 nm or less, and at 0.3 μm or more, the full width at half maximum of the emission intensity distribution is 35 nm or less, and about 1.0 nm at 1.0 μm. That is, this indicates that the high light emission efficiency of the semiconductor light emitting device can be obtained when the thickness of the n-type InGaN layer is 0.2 μm or more.
　本発明は半導体発光素子について有用である。 The present invention is useful for semiconductor light emitting devices.
１０　半導体発光素子
１１　基板
１１’　ウエハ
１２　ｕ-ＧａＮ層
１３　ｎ型ＧａＮ層
１４　ｎ型ＩｎＧａＮ層
１５　多重量子井戸層
１５ａ　障壁層
１５ｂ　井戸層
１６　ｐ型ＡｌＧａＮ層
１７　ｐ型ＧａＮ層
１８　ｎ型電極
１９　ｐ型電極 DESCRIPTION OF SYMBOLS 10 Semiconductor light-emitting device 11 Substrate 11 ′ Wafer 12 u-GaN layer 13 n-type GaN layer 14 n-type InGaN layer 15 Multiple quantum well layer 15a Barrier layer 15b Well layer 16 p-type AlGaN layer 17 p-type GaN layer 18 n-type electrode 19 p-type electrode

Claims (8)

  1. 　主面が非極性面又は半極性面のＧａＮ層と、
    　上記ＧａＮ層の直上にＩｎｘＧａ１－ｘＮ（０＜ｘ＜０．１）がエピタキシャル成長して形成され、ｎ型ドーパントを含有した厚さ０．２μｍ以上のＩｎＧａＮ層と、
    　上記ＩｎＧａＮ層の直上にエピタキシャル成長して形成され、ＩｎＧａＮで形成された井戸層を含む多重量子井戸層と、
    を備え、
    　上記ＩｎＧａＮ層は、上記ＧａＮ層との間の格子不整合による歪みが完全に又は部分的に緩和している半導体発光素子。     A GaN layer whose main surface is a nonpolar surface or a semipolar surface;
    In x Ga 1-x N (0 <x <0.1) is formed by epitaxial growth directly on the GaN layer, and includes an n-type dopant-containing InGaN layer having a thickness of 0.2 μm or more,
    A multiple quantum well layer formed by epitaxial growth directly on the InGaN layer and including a well layer formed of InGaN;
    With
    The InGaN layer is a semiconductor light emitting device in which distortion due to lattice mismatch with the GaN layer is completely or partially relaxed.
  2. 　請求項１に記載された半導体発光素子において、
    　０．０１＜ｘ＜０．０５である半導体発光素子。     The semiconductor light emitting device according to claim 1,
    A semiconductor light emitting device in which 0.01 <x <0.05.
  3. 　請求項１又は２に記載された半導体発光素子において、
    　上記多重量子井戸層は、紫色、青色、又は緑色に発光するように構成されている半導体発光素子。     In the semiconductor light-emitting device according to claim 1 or 2,
    The multiple quantum well layer is a semiconductor light emitting element configured to emit light in purple, blue, or green.
  4. 　請求項３に記載された半導体発光素子において、
    　上記多重量子井戸層は、紫色に発光するように構成されている半導体発光素子。     The semiconductor light emitting device according to claim 3,
    The multiple quantum well layer is a semiconductor light emitting device configured to emit light in a purple color.
  5. 　請求項１乃至４のいずれかに記載された半導体発光素子において、
    　上記ＩｎＧａＮ層の主面が｛１１－２２｝面である半導体発光素子。     The semiconductor light-emitting device according to claim 1,
    A semiconductor light emitting device in which the main surface of the InGaN layer is a {11-22} plane.
  6. 　請求項１乃至５のいずれかに記載された半導体発光素子において、
    　上記多重量子井戸層の発光波長に対する発光強度分布の半値全幅が４０ｎｍ以下である半導体発光素子。     The semiconductor light emitting device according to any one of claims 1 to 5,
    A semiconductor light emitting device wherein the full width at half maximum of the emission intensity distribution with respect to the emission wavelength of the multiple quantum well layer is 40 nm or less.
  7. 　請求項１乃至６のいずれかに記載された半導体発光素子において、
    　上記ＧａＮ層が設けられた基板をさらに備えた半導体発光素子。     The semiconductor light-emitting device according to claim 1,
    A semiconductor light-emitting device further comprising a substrate provided with the GaN layer.
  8. 　請求項７に記載された半導体発光素子において、
    　上記基板がサファイア基板である半導体発光素子。     The semiconductor light emitting device according to claim 7,
    A semiconductor light emitting device wherein the substrate is a sapphire substrate.
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