WO2013108533A1 - Ceramic electronic component - Google Patents

Ceramic electronic component Download PDF

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Publication number
WO2013108533A1
WO2013108533A1 PCT/JP2012/082787 JP2012082787W WO2013108533A1 WO 2013108533 A1 WO2013108533 A1 WO 2013108533A1 JP 2012082787 W JP2012082787 W JP 2012082787W WO 2013108533 A1 WO2013108533 A1 WO 2013108533A1
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Prior art keywords
glass
component
external electrode
edge
ceramic electronic
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PCT/JP2012/082787
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French (fr)
Japanese (ja)
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誠史 古賀
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株式会社村田製作所
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Publication of WO2013108533A1 publication Critical patent/WO2013108533A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/228—Terminals
    • H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/30—Stacked capacitors

Definitions

  • the present invention relates to a ceramic electronic component, and more particularly, to a ceramic electronic component in which a plating film by wet plating is formed on an external electrode.
  • wet plating such as electrolytic plating is usually applied to an external electrode formed by baking.
  • an external electrode formed by baking For example, a Ni plating film and an Sn plating film thereon are external electrodes.
  • the plating solution used in carrying out wet plating as described above has a more or less undesirable effect on ceramic electronic components such as multilayer ceramic capacitors.
  • the multilayer ceramic capacitor 1 includes a rectangular parallelepiped component body 2. External electrodes 3 and 4 are formed on a pair of opposed end faces of the component body 2, respectively. The external electrodes 3 and 4 have respective end edges 5 and 6 located on a pair of main surfaces 7 and 8 facing each other and a pair of side surfaces 9 and 10 facing each other.
  • plating films 11 and 12 are formed on the external electrodes 3 and 4 by wet plating.
  • FIG. 9 shows a state before the plating films 11 and 12 are formed.
  • the crack generation mode was different before and after plating. That is, before plating, as shown in FIG. 9, the crack 13 is likely to occur so as to cross the central portion of the component body 2. On the other hand, after plating, as shown in FIG. 10, the crack 14 is likely to occur in the component body 2 starting from the portion where the edges 5 and / or 6 of the external electrodes 3 and / or 4 are located.
  • the plating solution severely deteriorates the component main body 2 particularly in the portion where the edges 5 and 6 of the external electrodes 3 and 4 are located.
  • the glass component contained in the conductive paste for forming the external electrodes 3 and 4 permeates into the ceramic portion of the component body 2 in the baking process.
  • the glass component located in the vicinity of the edges 5 and 6 of the external electrodes 3 and 4 that are easy to touch is melted by the plating solution, so that the component body 2 is in the vicinity of the edges 5 and 6 of the external electrodes 3 and 4. It can be inferred that it is caused by erosion and fragility.
  • Patent Document 1 discloses a multilayer ceramic electronic component in which the entire exposed surface of a ceramic body is covered with glass to prevent the penetration of a plating solution into the inside of the body. Is described. However, since the glass described in Patent Document 1 can be dissolved in the plating solution, the above-described problems caused by the melting of the glass cannot be solved.
  • Patent Document 2 Although not an external electrode formed by baking, by applying a water repellent treatment agent to the edge of the external electrode formed by plating, A method of manufacturing a multilayer electronic component that prevents intrusion is described. However, since the external electrode described in Patent Document 2 is formed by plating, it does not contain glass. Therefore, the problem that the glass as described above is melted by the plating solution is not encountered.
  • Patent Document 3 a conductive paste used for forming a terminal electrode of a multilayer ceramic electronic component having excellent plating solution resistance, particularly a glass powder contained in the conductive paste.
  • the ingredients are listed.
  • the glass described in Patent Document 3 can be dissolved in the plating solution as in the case of the glass described in Patent Document 1, the above-described problem caused by melting of the glass cannot be solved.
  • the above problem is not limited to multilayer ceramic electronic components, but can also be applied to single-layer ceramic electronic components.
  • an object of the present invention is to provide a multilayer ceramic electronic component that can solve the above-described problems.
  • the present invention includes a substantially rectangular parallelepiped-shaped main body having a pair of principal surfaces opposed to each other, a pair of side surfaces opposed to each other, and a pair of end surfaces opposed to each other, and a glass component.
  • An external electrode formed by baking of a conductive paste, and formed on an end face of a component main body and having an end edge located on at least one of a main surface and a side surface adjacent to the end face; In order to solve the above technical problem, at least an edge of the external electrode is provided on the surface of the component body. In the vicinity thereof, a glass region in which a glass containing silicon oxide of 23 mol% or more and 74 mol% or less exists is formed.
  • the distance from the edge position of the external electrode to the edge of the glass region measured is not more than the distance from the end surface of the component body to the edge of the external electrode.
  • the glass region is formed by applying and baking a glass paste in which a glass frit containing silicon oxide is dispersed in a region adjacent to an end surface on at least one of the main surface and the side surface of the component body.
  • the edge of the external electrode is positioned so as to expose the edge of the glass layer.
  • the distance from the end surface of the component body to the edge of the glass layer is preferably in the range of 1/4 to 1/2 times the distance between the pair of end surfaces of the component body.
  • the glass region is a glass containing conductive metal powder and silicon oxide to form part of the external electrode in a region adjacent to the end face on at least one of the main surface and the side surface of the component body.
  • a conductive paste containing frit it is provided by the glass component that exudes from the conductive paste.
  • the distance from the edge position of the external electrode to the edge of the glass region measured may be in the range of 1/10 to 1 times the distance from the end surface of the component body to the edge of the external electrode. preferable.
  • the present invention includes a component main body including a plurality of laminated ceramic layers and an internal electrode disposed along an interface between the ceramic layers, and an end of the internal electrode is exposed at the end face,
  • the present invention is advantageously applied to a multilayer ceramic electronic component connected to the end of the internal electrode exposed at the end face of the component body.
  • the glass region where the glass that is difficult to dissolve in the plating solution is formed in the vicinity of the edge of the external electrode. It is suppressed. Therefore, the generation of cracks starting from the portion where the edge of the external electrode is located as described above with reference to FIG. 10 can be advantageously suppressed. Therefore, the mechanical strength of the ceramic electronic component can be increased.
  • FIG. 1 is a cross-sectional view showing a multilayer ceramic capacitor 21 according to a first embodiment of the present invention.
  • FIG. 2 is a cross-sectional view for explaining a method of forming an external electrode of the multilayer ceramic capacitor 21 shown in FIG. 1 and shows a state in which glass layers 40 and 41 are formed.
  • FIG. 3 is a cross-sectional view for explaining a method for forming an external electrode of the multilayer ceramic capacitor 21 shown in FIG. 1 and shows a state in which external electrodes 32 and 33 are formed after the stage shown in FIG. 2. It is sectional drawing which shows the multilayer ceramic capacitor 51 by 2nd Embodiment of this invention.
  • FIG. 5 is a cross-sectional view for explaining a method of forming an external electrode of the multilayer ceramic capacitor 51 shown in FIG.
  • FIG. 6 is a cross-sectional view for explaining a method for forming an external electrode of the multilayer ceramic capacitor 51 shown in FIG. 4, after applying a conductive paste on the end faces 30 and 31 of the component body 22 after the stage shown in FIG. 5; Furthermore, the state after implementing a baking process is shown. It is a top view of the structure in the state shown in FIG. It is a figure which shows the density
  • FIG. 1 is a plan view illustrating a state in which a crack 13 is formed in a multilayer ceramic capacitor 1 before plating in order to explain a problem to be solved by the present invention.
  • BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view illustrating a state in which cracks 14 are formed in a multilayer ceramic capacitor 1 after plating in order to explain a problem to be solved by the present invention.
  • a multilayer ceramic capacitor 21 includes a component body 22 having a multilayer structure.
  • the component body 22 includes a plurality of laminated ceramic layers 23 and a plurality of first and second internal electrodes 24 and 25 arranged along an interface between the ceramic layers 23.
  • the first internal electrode 24 and the second internal electrode 25 are opposed to each other in a part of each, and are alternately arranged as viewed in the stacking direction.
  • the internal electrodes 24 and 25 are mainly composed of nickel, for example.
  • the component body 22 includes first and second main surfaces 26 and 27 facing each other, first and second side surfaces facing each other (a surface parallel to a paper surface not shown), and first and second end surfaces facing each other. It has a substantially rectangular parallelepiped shape with 30 and 31.
  • the end portions of the first and second internal electrodes 24 and 25 are exposed at the first and second end faces 30 and 31 of the component main body 22, respectively.
  • the first and second end surfaces 30 and 31 of the component body 22 are electrically connected to the end portions of the first and second internal electrodes 24 and 25, respectively.
  • External electrodes 32 and 33 are formed.
  • the first and second external electrodes 32 and 33 have respective end edges 34 and 35 positioned on the main surfaces 26 and 27 adjacent to the end surfaces 30 and 31, and in this embodiment, although not shown in the figure. It is also located on the side.
  • External electrodes 32 and 33 are formed, for example, by baking a conductive paste mainly composed of copper.
  • Plated films 36 and 37 are formed on the external electrodes 32 and 33, respectively.
  • the plating films 36 and 37 are composed of, for example, a plating layer mainly containing nickel and a plating layer mainly containing tin formed thereon.
  • the present invention includes at least 23 mol% and not more than 74 mol% of silicon oxide on the surface of the component body 22 and at least from the edges 34 and 35 of the external electrodes 32 and 33 to the vicinity thereof. Glass regions 38 and 39 in which glass is present are formed.
  • the glass regions 38 and 39 are provided by glass layers 40 and 41 made of glass containing 23 mol% or more and 74 mol% or less of silicon oxide.
  • the glass layers 40 and 41 are formed along the interfaces between the main surfaces 26 and 27 and the side surfaces of the component body 22 and the external electrodes 32 and 33.
  • a distance A from each position of the edges 34 and 35 of the external electrodes 32 and 33 to each edge 42 and 43 of the glass layers 40 and 41 is determined from each of the end faces 30 and 31 of the component body 22 to the external electrode.
  • the distance B to the end edges 34 and 35 of each of 32 and 33 is preferably equal to or less than B.
  • the component body 22 is prepared.
  • a ceramic green sheet containing a dielectric ceramic material is prepared, and then a conductive paste film to be the internal electrodes 24 and 25 is formed on the ceramic green sheet with a predetermined pattern.
  • a raw mother block is obtained, and then the mother block is cut to obtain an individual multilayer ceramic capacitor 21. It is obtained by obtaining a plurality of raw component bodies and then firing the raw component bodies.
  • External electrodes 32 and 33 are formed on the component main body 22 obtained as described above.
  • glass layers 40 and 41 are formed as shown in FIG.
  • a glass paste is applied to the regions adjacent to the end surfaces 30 and 31 on the main surfaces 26 and 27 and the side surfaces of the component body 22 and baked.
  • the glass paste is obtained by dispersing glass frit containing silicon oxide in a varnish obtained by dissolving an organic binder in an organic solvent.
  • the glass layers 40 and 41 are made of glass containing 23 mol% or more and 74 mol% or less of silicon oxide. Therefore, the glass constituting the glass frit contained in the glass paste described above has a composition that gives glass containing silicon oxide of 23 mol% or more and 74 mol% or less in the glass layers 40 and 41 obtained by baking. Have.
  • the glass constituting the glass frit contained in the glass paste is, for example, Si—B—Zn-based
  • a part of zinc oxide, which is a glass component is sublimated in the baking process, and thus obtained by baking.
  • the ratio of silicon oxide in the glass layers 40 and 41 is higher than the ratio of silicon oxide contained in the glass contained in the glass paste. Therefore, considering this, the composition of the glass contained in the glass paste should be determined.
  • the distance C from each of the end faces 30 and 31 of the component body 22 to the respective edges 42 and 43 of the glass layers 40 and 41 is between the pair of end faces 30 and 31 of the component body 22.
  • the distance L is preferably in the range of 1/4 to 1/2 times the distance L.
  • external electrodes 32 and 33 are formed by baking a conductive paste.
  • the conductive paste used here contains, for example, conductive metal powder such as Cu powder, glass frit, and varnish, and the content ratio of silicon oxide in the glass frit can be arbitrarily selected.
  • the edges 34 and 35 of the external electrodes 32 and 33 are located so as to expose the edges 42 and 43 of the glass layers 40 and 41, respectively.
  • the plating films 36 and 37 are formed on the external electrodes 32 and 33 by performing wet plating such as electrolytic plating. Since the glass constituting the glass layers 40 and 41 is not easily dissolved in the plating solution used in this plating process, the component main body 22 is eroded in the vicinity of the edges 34 and 35 of the external electrodes 32 and 33 in the plating process. And being vulnerable. Therefore, it is possible to advantageously suppress the occurrence of cracks starting from the portions where the edges 34 and 35 of the external electrodes 32 and 33 are located, and as a result, the mechanical strength of the multilayer ceramic capacitor 21 can be increased.
  • wet plating such as electrolytic plating.
  • Example 1 Production of component main body A plurality of ceramic green sheets containing ceramic material powders mainly composed of Ba and Ti were prepared. Next, on the ceramic green sheet, a conductive paste containing Ni as a main component was applied by screen printing to form a conductive paste film to be an internal electrode.
  • the ceramic green sheets on which the conductive paste film is not formed are stacked so as to have a predetermined outer layer thickness, and then a predetermined number of ceramic green sheets on which the conductive paste film is formed are stacked.
  • a green mother block in which a plurality of component main bodies can be taken out was obtained by laminating ceramic green sheets having no paste formed so as to have a predetermined outer layer thickness.
  • the mother block was cut, a plurality of chip-shaped raw component bodies were taken out, and then the raw component bodies were fired in a reducing furnace in a reducing atmosphere to obtain a sintered component body.
  • the above glass paste was printed on the main surface and the side surface of the component body adjacent to the end surface.
  • the above glass paste was baked by heat treatment at 900 ° C. for 10 minutes in a nitrogen atmosphere to form a glass layer.
  • the distance C shown in FIG. 2 is set to be in a range of 1 ⁇ 4 to 1 ⁇ 2 times the distance L.
  • a film made of the conductive paste for external electrodes is formed with a predetermined thickness on the surface plate, and after immersing the end of the component main body held by the holder in the conductive paste film, By taking out from the conductive paste film, a conductive paste to be an external electrode was applied to both end faces of the component main body. At this time, the position of the edge of the conductive paste film serving as the external electrode was adjusted so that the edge of the glass layer was exposed.
  • the component body was heat-treated in a belt furnace.
  • the condition of holding the maximum temperature in the range of 900 ° C. for 10 minutes was adopted.
  • a reducing atmosphere was applied to prevent oxidation of the external electrode.
  • Ni electrolytic plating and Sn electrolytic plating were sequentially applied to the external electrode to form a plating film on the external electrode.
  • a multilayer ceramic capacitor serving as a sample was obtained as described above.
  • the glass layer is subjected to point analysis by XRF in the vicinity of the edge of the external electrode, thereby qualitatively and quantitatively determining the elements present there. analyzed.
  • elements excluding Ba and Ti that are components of the ceramic layer, Cu that is a component of the external electrode, and Ni and Sn that are components of the plating film are used as the ends of the external electrode.
  • the element of the glass component in the vicinity of the edge was converted into an oxide, and the “amount of silicon oxide in the glass layer” in Table 1 was quantified.
  • the baking temperature of the glass paste for forming the glass layer is increased to 1000 ° C.
  • the denseness of the glass layer is improved.
  • damage to the component body is large, and electrical characteristics are increased. Has been confirmed to decrease.
  • FIG. 4 is a view corresponding to FIG. 1 and shows a multilayer ceramic capacitor 51 according to a second embodiment of the present invention.
  • a multilayer ceramic capacitor 51 includes a component body 22 that is substantially similar to the component body 22 provided in the multilayer ceramic capacitor 21 shown in FIG. Therefore, in FIG. 4, elements corresponding to those shown in FIG.
  • the first and second end surfaces 30 and 31 of the component body 22 are electrically connected to the end portions of the first and second internal electrodes 24 and 25, respectively.
  • External electrodes 52 and 53 are formed.
  • the first and second external electrodes 52 and 53 have respective end edges 54 and 55 located on the main surfaces 26 and 27 adjacent to the end surfaces 30 and 31 and on the side surfaces.
  • External electrodes 52 and 53 are formed, for example, by baking a conductive paste mainly composed of copper.
  • the external electrodes 52 and 53 are arranged on the main surfaces 56 and 57 located on the end faces 30 and 31 of the component main body 22 and on the main surfaces 26 and 27 and the side surfaces of the component main body 22 depending on the silicon oxide content. 28 and 29 (see FIG. 7) are classified into adjacent surface extensions 58 and 59. Broadly speaking, the conductive paste used to form the adjacent surface extensions 58 and 59 has a relatively high silicon oxide content.
  • Plated films 36 and 37 are formed on the external electrodes 32 and 33, respectively.
  • the plating films 36 and 37 are substantially the same as the plating films 36 and 37 in the multilayer ceramic capacitor 21 shown in FIG.
  • Glass regions 60 and 61 in which the following glass containing silicon oxide is present are formed.
  • the glass regions 60 and 61 are provided by glass components that have exuded from the conductive paste by baking the conductive paste applied to form the adjacent surface extensions 58 and 59 described above. .
  • the component body 22 is prepared.
  • the conductive paste for forming the external electrodes 52 and 53 the conductive paste for the main portions 56 and 57 and the conductive paste for the adjacent surface extension portions 58 and 59 are prepared.
  • Each of the conductive pastes contains conductive metal powder, glass frit, and varnish, but particularly the conductive paste for the adjacent surface extension portions 58 and 59 is 23 mol% or more and 74 mol as described above.
  • the glass regions 60 and 61 in which glass containing less than 1% of silicon oxide is present are selected so as to be formed by the glass component exuded from the conductive paste.
  • the conductive paste for the adjacent surface extensions 58 and 59 is formed on the main surfaces 26 and 27 and the side surfaces 28 and 29 of the component body 22 in the region adjacent to the end surfaces 30 and 31.
  • conductive paste films 62 and 63 to be adjacent surface extensions 58 and 59 are formed.
  • a conductive paste for the main portions 56 and 57 is applied on the end faces 30 and 31 of the component body 22, thereby forming a conductive paste film to be the main portions 56 and 57.
  • external electrodes 52 and 53 comprising sintered adjacent surface extensions 58 and 59 and main portions 56 and 57 are formed.
  • the glass components ooze out from the adjacent surface extension portions 58 and 59, whereby glass regions 60 and 61 in which glass containing silicon oxide of 23 mol% or more and 74 mol% or less exists are provided. And formed on the surface of the component body 22 from at least the end edges 54 and 55 of the external electrodes 52 and 53 to the vicinity thereof.
  • the glass contained in the conductive paste for forming the adjacent surface extension portions 58 and 59 is, for example, Si—B—Zn-based
  • the baking step Since a part of zinc oxide which is a glass component is sublimated, the ratio of silicon oxide in the glass regions 60 and 61 formed as a result of baking is higher than the ratio of silicon oxide contained in the glass in the conductive paste. Therefore, in consideration of this, the composition of the glass contained in the conductive paste should be determined.
  • the distance D from the positions of the edges 54 and 55 of the external electrodes 52 and 53 to the edges 64 and 65 of the glass regions 60 and 61 is determined by the end face 30 of the component body 22. And 31 to the end edges 54 and 55 of each of the external electrodes 52 and 53 are preferably in the range of 1/10 to 1 times the distance E.
  • the glass regions 60 and 61 are formed by the glass component exuded from the conductive paste, it is relatively difficult to visually determine the positions of the edges 64 and 65. is there. Therefore, in order to obtain the positions of the edges 64 and 65 of the glass regions 60 and 61, the following method is employed.
  • FIG. 7 shows a plan view of the structure in the state shown in FIG.
  • the Si concentration distribution is obtained by performing XRF line analysis along the line 66 shown in FIG. 7, an analysis result as shown in FIG. 8 is obtained.
  • the length of the glass seepage that is, the distance D between the “edge of the external electrode” and the “edge of the glass region” can be obtained.
  • the order of applying the conductive paste for the main portions 56 and 57 and the step of applying the conductive paste for the adjacent surface extension portions 58 and 59 are reversed. May be.
  • the plating films 36 and 37 are formed on the external electrodes 52 and 53 by performing wet plating such as electrolytic plating. Since the glass existing in the glass regions 60 and 61 is not easily dissolved in the plating solution used in this plating process, the component main body 22 is eroded in the vicinity of the edges 54 and 55 of the external electrodes 52 and 53 in the plating process. And being vulnerable. Therefore, it is possible to advantageously suppress the occurrence of cracks starting from the portions where the edges 54 and 55 of the external electrodes 52 and 53 are located, and as a result, the mechanical strength of the multilayer ceramic capacitor 21 can be increased.
  • wet plating such as electrolytic plating.
  • the spread of the glass region is obtained by performing a line analysis with XRF along the line 66 shown in FIG. 7 to obtain a Si concentration distribution and obtaining an analysis result as shown in FIG. It can be obtained by observing the Si concentration gradient shown in FIG.
  • the distance D (see FIG. 6) from the position of the edge of the external electrode to the edge of the glass region measured is the distance from the end surface of the component body to the edge of the external electrode. It was confirmed that it was in the range of 1/10 to 1 times E (see FIG. 6).
  • a multilayer ceramic capacitor serving as a sample was obtained as described above.
  • the ceramic layer 23 is made of a dielectric ceramic.
  • the multilayer ceramic electronic component to which the present invention is applied may be an inductor, a thermistor, a piezoelectric component, or the like. Therefore, according to the function of the multilayer ceramic electronic component, the ceramic layer may be composed of a dielectric ceramic, a magnetic ceramic, a semiconductor ceramic, a piezoelectric ceramic, or the like.
  • the illustrated multilayer ceramic capacitor 21 or 51 is of a two-terminal type including two external electrodes 32 and 33 or two external electrodes 52 and 53.
  • the present invention is a multi-terminal multilayer ceramic electronic device. It can also be applied to parts.
  • the present invention can be applied not only to multilayer ceramic electronic components but also to single-layer type ceramic electronic components.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

When a plating film is formed by a wet plating process on an external electrode provided to a ceramic electronic component, such as a stacked ceramic capacitor, and formed thereon by baking of a conductive paste containing a glass component for example, there are instances in which the glass component situated in the vicinity of end edges of the external electrode is dissolved by the plating solution, resulting in erosion and embrittlement of the component body in the vicinity of the end edges of the external electrode. Glass regions (38, 39) extending at least from the end edges (34, 35) of external electrodes (32, 33) to the vicinity thereof, in which glass containing between 23 mol% and 74 mol%, inclusive, of silicon oxide is present, are formed on the surface of a component body (22). Glass containing between 23 mol% and 74 mol%, inclusive, of silicon oxide has been found to resist dissolution by plating solutions.

Description

セラミック電子部品Ceramic electronic components
　この発明は、セラミック電子部品に関するもので、特に、外部電極に湿式めっきによるめっき膜が形成されたセラミック電子部品に関するものである。 The present invention relates to a ceramic electronic component, and more particularly, to a ceramic electronic component in which a plating film by wet plating is formed on an external electrode.
　はんだを用いて実装される積層セラミックコンデンサでは、焼付けによって形成された外部電極に対して、通常、電解めっきのような湿式めっきが適用され、たとえばＮｉめっき膜およびその上にＳｎめっき膜が外部電極上に形成され、それによって、実装性の向上、より具体的には、外部電極のはんだ付け性の向上が図られる。 In a multilayer ceramic capacitor mounted using solder, wet plating such as electrolytic plating is usually applied to an external electrode formed by baking. For example, a Ni plating film and an Sn plating film thereon are external electrodes. Thus, it is possible to improve the mountability, more specifically, the solderability of the external electrode.
　しかしながら、上述のような湿式めっきを実施するにあたって用いられるめっき液は、積層セラミックコンデンサのようなセラミック電子部品に対して、多かれ少なかれ、好ましくない影響を及ぼすことが知られている。 However, it is known that the plating solution used in carrying out wet plating as described above has a more or less undesirable effect on ceramic electronic components such as multilayer ceramic capacitors.
　上述の好ましくない影響は、実装基板のたわみ時、リフロー時またはマウント時のクラック発生といったセラミック電子部品の機械的強度の低下として現れることが多い。このことを図９および図１０を参照して説明する。 The above-mentioned undesirable effects often appear as a decrease in the mechanical strength of the ceramic electronic component, such as cracking during mounting substrate reflow or reflow or mounting. This will be described with reference to FIG. 9 and FIG.
　図９および図１０には、セラミック電子部品の一例としての積層セラミックコンデンサ１の外観が平面図で示されている。積層セラミックコンデンサ１は、直方体形状の部品本体２を備える。部品本体２の互いに対向する１対の端面上には、それぞれ、外部電極３および４が形成されている。外部電極３および４は、各々の端縁５および６を部品本体２の互いに対向する１対の主面７および８上ならびに互いに対向する１対の側面９および１０上に位置させている。 9 and 10 are plan views showing the appearance of a multilayer ceramic capacitor 1 as an example of a ceramic electronic component. The multilayer ceramic capacitor 1 includes a rectangular parallelepiped component body 2. External electrodes 3 and 4 are formed on a pair of opposed end faces of the component body 2, respectively. The external electrodes 3 and 4 have respective end edges 5 and 6 located on a pair of main surfaces 7 and 8 facing each other and a pair of side surfaces 9 and 10 facing each other.
　外部電極３および４上には、図１０に示すように、湿式めっきにより、めっき膜１１および１２が形成される。図９は、めっき膜１１および１２の形成前の状態を示している。 As shown in FIG. 10, plating films 11 and 12 are formed on the external electrodes 3 and 4 by wet plating. FIG. 9 shows a state before the plating films 11 and 12 are formed.
　このような積層セラミックコンデンサ１について、抗折強度を測定するためのたわみ試験を実施すると、クラック発生モードがめっき前とめっき後とで異なることがわかった。すなわち、めっき前では、図９に示すように、部品本体２の中央部を横切るようにクラック１３が発生しやすい。他方、めっき後においては、図１０に示すように、外部電極３および／または４の端縁５および／または６が位置する部分を起点として、部品本体２にクラック１４が発生しやすい。 When a bending test for measuring the bending strength of such a multilayer ceramic capacitor 1 was carried out, it was found that the crack generation mode was different before and after plating. That is, before plating, as shown in FIG. 9, the crack 13 is likely to occur so as to cross the central portion of the component body 2. On the other hand, after plating, as shown in FIG. 10, the crack 14 is likely to occur in the component body 2 starting from the portion where the edges 5 and / or 6 of the external electrodes 3 and / or 4 are located.
　このことから、めっき液は、特に、外部電極３および４の端縁５および６が位置する部分において、部品本体２を激しく劣化させることがわかる。これは、外部電極３および４を形成するための導電性ペーストに含まれるガラス成分が、焼付け工程において、部品本体２のセラミック部分へと浸透するが、この浸透したガラス成分のうち、めっき液に触れやすい、外部電極３および４の端縁５および６の近傍に位置するガラス成分は、めっき液によって溶かされ、その結果、部品本体２が外部電極３および４の端縁５および６の近傍において浸食されて脆弱になることが原因であると推測することができる。 From this, it can be seen that the plating solution severely deteriorates the component main body 2 particularly in the portion where the edges 5 and 6 of the external electrodes 3 and 4 are located. This is because the glass component contained in the conductive paste for forming the external electrodes 3 and 4 permeates into the ceramic portion of the component body 2 in the baking process. The glass component located in the vicinity of the edges 5 and 6 of the external electrodes 3 and 4 that are easy to touch is melted by the plating solution, so that the component body 2 is in the vicinity of the edges 5 and 6 of the external electrodes 3 and 4. It can be inferred that it is caused by erosion and fragility.
　一方、めっき液による悪影響を抑制しようとする技術として、以下のものが提案されている。 On the other hand, the following have been proposed as techniques for suppressing the adverse effects of the plating solution.
　特開２０１０－２４５０９５号公報（特許文献１）では、セラミック素体の露出面全体をガラスで被覆することによって、めっき液の素体内部等への侵入を防止するようにした、積層セラミック電子部品が記載されている。しかし、特許文献１に記載のガラスは、めっき液に溶解し得るため、ガラスの溶解によって引き起こされる前述した問題を解決し得ない。 Japanese Patent Laying-Open No. 2010-245095 (Patent Document 1) discloses a multilayer ceramic electronic component in which the entire exposed surface of a ceramic body is covered with glass to prevent the penetration of a plating solution into the inside of the body. Is described. However, since the glass described in Patent Document 1 can be dissolved in the plating solution, the above-described problems caused by the melting of the glass cannot be solved.
　特開２０１１－１６５７２５号公報（特許文献２）では、焼付けによって形成される外部電極ではないが、めっきにより形成される外部電極の端縁に、撥水処理剤を付与することによって、めっき液の浸入を防止するようにした、積層型電子部品の製造方法が記載されている。しかし、特許文献２に記載の外部電極は、めっきにより形成されたものであるので、ガラスを含まず、よって、前述したようなガラスがめっき液によって溶かされるといった問題には遭遇しない。 In Japanese Patent Application Laid-Open No. 2011-165725 (Patent Document 2), although not an external electrode formed by baking, by applying a water repellent treatment agent to the edge of the external electrode formed by plating, A method of manufacturing a multilayer electronic component that prevents intrusion is described. However, since the external electrode described in Patent Document 2 is formed by plating, it does not contain glass. Therefore, the problem that the glass as described above is melted by the plating solution is not encountered.
　特開２００７－１０３８４５号公報（特許文献３）では、耐めっき液性に優れた積層セラミック電子部品の端子電極を形成するために用いられる導電性ペースト、特に、導電性ペーストに含まれるガラス粉末の成分が記載されている。しかし、特許文献３に記載のガラスも、特許文献１に記載のガラスの場合と同様、めっき液に溶解し得るため、ガラスの溶解によって引き起こされる前述した問題を解決し得ない。 In Japanese Patent Application Laid-Open No. 2007-103845 (Patent Document 3), a conductive paste used for forming a terminal electrode of a multilayer ceramic electronic component having excellent plating solution resistance, particularly a glass powder contained in the conductive paste. The ingredients are listed. However, since the glass described in Patent Document 3 can be dissolved in the plating solution as in the case of the glass described in Patent Document 1, the above-described problem caused by melting of the glass cannot be solved.
　なお、以上の問題は、積層セラミック電子部品に限らず、単層タイプのセラミック電子部品についても言えることである。 The above problem is not limited to multilayer ceramic electronic components, but can also be applied to single-layer ceramic electronic components.
特開２０１０－２４５０９５号公報JP 2010-245095 A 特開２０１１－１６５７２５号公報JP 2011-165725 A 特開２００７－１０３８４５号公報JP 2007-103845 A
　そこで、この発明の目的は、上述したような問題を解決し得る、積層セラミック電子部品を提供しようとすることである。 Therefore, an object of the present invention is to provide a multilayer ceramic electronic component that can solve the above-described problems.
　この発明は、セラミックをもって構成され、互いに対向する１対の主面、互いに対向する１対の側面および互いに対向する１対の端面を有する、実質的に直方体形状の部品本体と、ガラス成分を含む導電性ペーストの焼付けによって形成されたものであって、部品本体の端面上に形成されるとともに、その端縁を端面に隣接する主面および側面の少なくとも一方上に位置させている、外部電極と、外部電極上に形成されるめっき膜とを備える、セラミック電子部品に向けられるものであって、上述した技術的課題を解決するため、部品本体の表面上であって、少なくとも外部電極の端縁からその近傍にわたって、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスが存在するガラス領域が形成されていることを特徴としている。 The present invention includes a substantially rectangular parallelepiped-shaped main body having a pair of principal surfaces opposed to each other, a pair of side surfaces opposed to each other, and a pair of end surfaces opposed to each other, and a glass component. An external electrode formed by baking of a conductive paste, and formed on an end face of a component main body and having an end edge located on at least one of a main surface and a side surface adjacent to the end face; In order to solve the above technical problem, at least an edge of the external electrode is provided on the surface of the component body. In the vicinity thereof, a glass region in which a glass containing silicon oxide of 23 mol% or more and 74 mol% or less exists is formed.
　上述の２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスは、めっき液に溶解しにくいことがわかった。 It was found that the glass containing 23 mol% or more and 74 mol% or less of silicon oxide described above is difficult to dissolve in the plating solution.
　好ましくは、外部電極の端縁の位置から測定したガラス領域の端縁までの距離は、部品本体の端面から外部電極の端縁までの距離以下である。 Preferably, the distance from the edge position of the external electrode to the edge of the glass region measured is not more than the distance from the end surface of the component body to the edge of the external electrode.
　好ましい実施態様では、ガラス領域は、部品本体の主面および側面の少なくとも一方上における端面に隣接する領域に、酸化ケイ素を含むガラスフリットを分散させてなるガラスペーストを付与し、焼き付けることによって形成されたガラス層によって与えられ、外部電極の端縁は、ガラス層の端縁を露出させるように位置している。この場合、部品本体の端面からガラス層の端縁までの距離は、部品本体の１対の端面間の距離の１／４倍～１／２倍の範囲にあることが好ましい。 In a preferred embodiment, the glass region is formed by applying and baking a glass paste in which a glass frit containing silicon oxide is dispersed in a region adjacent to an end surface on at least one of the main surface and the side surface of the component body. The edge of the external electrode is positioned so as to expose the edge of the glass layer. In this case, the distance from the end surface of the component body to the edge of the glass layer is preferably in the range of 1/4 to 1/2 times the distance between the pair of end surfaces of the component body.
　他の好ましい実施態様では、ガラス領域は、部品本体の主面および側面の少なくとも一方上における端面に隣接する領域に、外部電極の一部を形成するため、導電性金属粉末と酸化ケイ素を含むガラスフリットとを含む導電性ペーストを付与し、焼き付けることによって、導電性ペーストから染み出したガラス成分によって与えられる。この場合、外部電極の端縁の位置から測定したガラス領域の端縁までの距離は、部品本体の端面から外部電極の端縁までの距離の１／１０倍～１倍の範囲にあることが好ましい。 In another preferred embodiment, the glass region is a glass containing conductive metal powder and silicon oxide to form part of the external electrode in a region adjacent to the end face on at least one of the main surface and the side surface of the component body. By applying and baking a conductive paste containing frit, it is provided by the glass component that exudes from the conductive paste. In this case, the distance from the edge position of the external electrode to the edge of the glass region measured may be in the range of 1/10 to 1 times the distance from the end surface of the component body to the edge of the external electrode. preferable.
　この発明は、特に、部品本体が、積層された複数のセラミック層およびセラミック層間の界面に沿って配置された内部電極を含み、内部電極の端部が端面に露出しており、外部電極が、部品本体の端面に露出した内部電極の端部に接続されている、積層セラミック電子部品に対して有利に適用される。 In particular, the present invention includes a component main body including a plurality of laminated ceramic layers and an internal electrode disposed along an interface between the ceramic layers, and an end of the internal electrode is exposed at the end face, The present invention is advantageously applied to a multilayer ceramic electronic component connected to the end of the internal electrode exposed at the end face of the component body.
　この発明によれば、めっき液に溶解しにくいガラスが存在するガラス領域が外部電極の端縁近傍に形成されるので、めっき工程で、外部電極の端縁近傍において部品本体が浸食されて脆弱になることが抑制される。そのため、図１０を参照して前述したような外部電極の端縁が位置する部分を起点とするクラックの発生を有利に抑制することができる。したがって、セラミック電子部品の機械的強度を高めることができる。 According to the present invention, the glass region where the glass that is difficult to dissolve in the plating solution is formed in the vicinity of the edge of the external electrode. It is suppressed. Therefore, the generation of cracks starting from the portion where the edge of the external electrode is located as described above with reference to FIG. 10 can be advantageously suppressed. Therefore, the mechanical strength of the ceramic electronic component can be increased.
この発明の第１の実施形態による積層セラミックコンデンサ２１を示す断面図である。1 is a cross-sectional view showing a multilayer ceramic capacitor 21 according to a first embodiment of the present invention. 図１に示した積層セラミックコンデンサ２１の外部電極形成方法を説明するための断面図であって、ガラス層４０および４１を形成した状態を示す。FIG. 2 is a cross-sectional view for explaining a method of forming an external electrode of the multilayer ceramic capacitor 21 shown in FIG. 1 and shows a state in which glass layers 40 and 41 are formed. 図１に示した積層セラミックコンデンサ２１の外部電極形成方法を説明するための断面図であって、図２に示した段階の後に外部電極３２および３３を形成した状態を示す。FIG. 3 is a cross-sectional view for explaining a method for forming an external electrode of the multilayer ceramic capacitor 21 shown in FIG. 1 and shows a state in which external electrodes 32 and 33 are formed after the stage shown in FIG. 2. この発明の第２の実施形態による積層セラミックコンデンサ５１を示す断面図である。It is sectional drawing which shows the multilayer ceramic capacitor 51 by 2nd Embodiment of this invention. 図４に示した積層セラミックコンデンサ５１の外部電極形成方法を説明するための断面図であって、部品本体２２の主面２６および２７ならびに側面上に導電性ペーストを付与して導電性ペースト膜６２および６３を形成した状態を示す。FIG. 5 is a cross-sectional view for explaining a method of forming an external electrode of the multilayer ceramic capacitor 51 shown in FIG. And 63 are formed. 図４に示した積層セラミックコンデンサ５１の外部電極形成方法を説明するための断面図であって、図５に示した段階の後に部品本体２２の端面３０および３１上に導電性ペーストを付与し、さらに焼付け工程を実施した後の状態を示す。FIG. 6 is a cross-sectional view for explaining a method for forming an external electrode of the multilayer ceramic capacitor 51 shown in FIG. 4, after applying a conductive paste on the end faces 30 and 31 of the component body 22 after the stage shown in FIG. 5; Furthermore, the state after implementing a baking process is shown. 図６に示した状態にある構造物の平面図である。It is a top view of the structure in the state shown in FIG. 図７に示したラインに沿ってＸＲＦで線分析して得られたＳｉの濃度分布を示す図である。It is a figure which shows the density | concentration distribution of Si obtained by the line analysis by XRF along the line shown in FIG. この発明が解決しようとする課題を説明するためのもので、めっき前の積層セラミックコンデンサ１にクラック１３が形成された状態を示す平面図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view illustrating a state in which a crack 13 is formed in a multilayer ceramic capacitor 1 before plating in order to explain a problem to be solved by the present invention. この発明が解決しようとする課題を説明するためのもので、めっき後の積層セラミックコンデンサ１にクラック１４が形成された状態を示す平面図である。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view illustrating a state in which cracks 14 are formed in a multilayer ceramic capacitor 1 after plating in order to explain a problem to be solved by the present invention.
　以下、この発明が適用されるセラミック電子部品として、積層セラミックコンデンサを例にとって説明する。 Hereinafter, a multilayer ceramic capacitor will be described as an example of a ceramic electronic component to which the present invention is applied.
　［第１の実施形態］
　図１を参照して、この発明の第１の実施形態による積層セラミックコンデンサ２１は、積層構造の部品本体２２を備えている。部品本体２２は、積層された複数のセラミック層２３と、セラミック層２３間の界面に沿って配置された各々複数の第１および第２の内部電極２４および２５とを備えている。第１の内部電極２４と第２の内部電極２５とは、各々の一部において互いに対向し、積層方向に見て交互に配置される。内部電極２４および２５は、たとえば、ニッケルを主成分としている。 [First Embodiment]
Referring to FIG. 1, a multilayer ceramic capacitor 21 according to a first embodiment of the present invention includes a component body 22 having a multilayer structure. The component body 22 includes a plurality of laminated ceramic layers 23 and a plurality of first and second internal electrodes 24 and 25 arranged along an interface between the ceramic layers 23. The first internal electrode 24 and the second internal electrode 25 are opposed to each other in a part of each, and are alternately arranged as viewed in the stacking direction. The internal electrodes 24 and 25 are mainly composed of nickel, for example.
　部品本体２２は、互いに対向する第１および第２の主面２６および２７、互いに対向する第１および第２の側面（図示されない紙面に平行な面）ならびに互いに対向する第１および第２の端面３０および３１を有する、実質的に直方体形状を有している。 The component body 22 includes first and second main surfaces 26 and 27 facing each other, first and second side surfaces facing each other (a surface parallel to a paper surface not shown), and first and second end surfaces facing each other. It has a substantially rectangular parallelepiped shape with 30 and 31.
　部品本体２２の第１および第２の端面３０および３１には、それぞれ、第１および第２の内部電極２４および２５の各端部が露出している。部品本体２２の第１および第２の端面３０および３１上には、それぞれ、第１および第２の内部電極２４および２５の各端部に電気的に接続されるように、第１および第２の外部電極３２および３３が形成されている。第１および第２の外部電極３２および３３は、各々の端縁３４および３５を端面３０および３１に隣接する主面２６および２７上に位置させており、さらに、この実施形態では、図示しないが側面上にも位置させている。外部電極３２および３３は、たとえば銅を主成分とする導電性ペーストの焼付けによって形成される。 The end portions of the first and second internal electrodes 24 and 25 are exposed at the first and second end faces 30 and 31 of the component main body 22, respectively. The first and second end surfaces 30 and 31 of the component body 22 are electrically connected to the end portions of the first and second internal electrodes 24 and 25, respectively. External electrodes 32 and 33 are formed. The first and second external electrodes 32 and 33 have respective end edges 34 and 35 positioned on the main surfaces 26 and 27 adjacent to the end surfaces 30 and 31, and in this embodiment, although not shown in the figure. It is also located on the side. External electrodes 32 and 33 are formed, for example, by baking a conductive paste mainly composed of copper.
　外部電極３２および３３上には、それぞれ、めっき膜３６および３７が形成される。めっき膜３６および３７は、たとえば、ニッケルを主成分とするめっき層、およびその上に形成される、錫を主成分とするめっき層から構成される。 Plated films 36 and 37 are formed on the external electrodes 32 and 33, respectively. The plating films 36 and 37 are composed of, for example, a plating layer mainly containing nickel and a plating layer mainly containing tin formed thereon.
　この発明の特徴となる構成として、部品本体２２の表面上であって、少なくとも外部電極３２および３３の端縁３４および３５からその近傍にわたって、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスが存在するガラス領域３８および３９が形成される。この実施形態では、上記ガラス領域３８および３９は、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスからなるガラス層４０および４１によって与えられる。ガラス層４０および４１は、部品本体２２の主面２６および２７ならびに側面と、外部電極３２および３３との界面に沿って形成される。 As a characteristic feature of the present invention, it includes at least 23 mol% and not more than 74 mol% of silicon oxide on the surface of the component body 22 and at least from the edges 34 and 35 of the external electrodes 32 and 33 to the vicinity thereof. Glass regions 38 and 39 in which glass is present are formed. In this embodiment, the glass regions 38 and 39 are provided by glass layers 40 and 41 made of glass containing 23 mol% or more and 74 mol% or less of silicon oxide. The glass layers 40 and 41 are formed along the interfaces between the main surfaces 26 and 27 and the side surfaces of the component body 22 and the external electrodes 32 and 33.
　外部電極３２および３３の端縁３４および３５の各々の位置から測定したガラス層４０および４１の各々の端縁４２および４３までの距離Ａは、部品本体２２の端面３０および３１の各々から外部電極３２および３３の各々の端縁３４および３５までの距離Ｂ以下であることが好ましい。 A distance A from each position of the edges 34 and 35 of the external electrodes 32 and 33 to each edge 42 and 43 of the glass layers 40 and 41 is determined from each of the end faces 30 and 31 of the component body 22 to the external electrode. The distance B to the end edges 34 and 35 of each of 32 and 33 is preferably equal to or less than B.
　次に、積層セラミックコンデンサ２１の製造方法について説明する。 Next, a method for manufacturing the multilayer ceramic capacitor 21 will be described.
　まず、部品本体２２が用意される。部品本体２２は、誘電体セラミック材料を含むセラミックグリーンシートを用意し、次いで、セラミックグリーンシート上に、所定のパターンをもって内部電極２４および２５となるべき導電性ペースト膜を形成し、次いで、導電性ペースト膜が形成されたセラミックグリーンシートを含む複数のセラミックグリーンシートを積層することによって、生の状態のマザーブロックを得、次いで、マザーブロックを切断することによって、個々の積層セラミックコンデンサ２１のための複数の生の部品本体を得、次いで、生の部品本体を焼成することによって得られる。 First, the component body 22 is prepared. For the component body 22, a ceramic green sheet containing a dielectric ceramic material is prepared, and then a conductive paste film to be the internal electrodes 24 and 25 is formed on the ceramic green sheet with a predetermined pattern. By laminating a plurality of ceramic green sheets including a ceramic green sheet on which a paste film is formed, a raw mother block is obtained, and then the mother block is cut to obtain an individual multilayer ceramic capacitor 21. It is obtained by obtaining a plurality of raw component bodies and then firing the raw component bodies.
　上記のようにして得られた部品本体２２に、外部電極３２および３３が形成される。外部電極３２および３３を形成するにあたって、まず、図２に示すように、ガラス層４０および４１が形成される。ガラス層４０および４１を形成するため、部品本体２２の主面２６および２７上ならびに側面上における端面３０および３１に隣接する領域にガラスペーストを付与し、焼き付けることが行なわれる。ガラスペーストは、酸化ケイ素を含むガラスフリットを、有機バインダを有機溶剤に溶解させてなるワニス中に分散させることによって得られたものである。 External electrodes 32 and 33 are formed on the component main body 22 obtained as described above. In forming the external electrodes 32 and 33, first, glass layers 40 and 41 are formed as shown in FIG. In order to form the glass layers 40 and 41, a glass paste is applied to the regions adjacent to the end surfaces 30 and 31 on the main surfaces 26 and 27 and the side surfaces of the component body 22 and baked. The glass paste is obtained by dispersing glass frit containing silicon oxide in a varnish obtained by dissolving an organic binder in an organic solvent.
　ガラス層４０および４１は、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスからなる。そのため、上述のガラスペーストに含まれるガラスフリットを構成するガラスが、焼付けによって得られたガラス層４０および４１において、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスを与えるような組成を有している。 The glass layers 40 and 41 are made of glass containing 23 mol% or more and 74 mol% or less of silicon oxide. Therefore, the glass constituting the glass frit contained in the glass paste described above has a composition that gives glass containing silicon oxide of 23 mol% or more and 74 mol% or less in the glass layers 40 and 41 obtained by baking. Have.
　なお、ガラスペーストに含まれるガラスフリットを構成するガラスが、たとえばＳｉ－Ｂ－Ｚｎ系のものである場合、焼付け工程において、ガラス成分である酸化亜鉛の一部が昇華するため、焼付けによって得られたガラス層４０および４１における酸化ケイ素の比率は、ガラスペーストに含まれるガラスに含まれる酸化ケイ素の比率より高くなる。したがって、このことを考慮して、ガラスペーストに含まれるガラスの組成が決定されるべきである。 In addition, when the glass constituting the glass frit contained in the glass paste is, for example, Si—B—Zn-based, a part of zinc oxide, which is a glass component, is sublimated in the baking process, and thus obtained by baking. The ratio of silicon oxide in the glass layers 40 and 41 is higher than the ratio of silicon oxide contained in the glass contained in the glass paste. Therefore, considering this, the composition of the glass contained in the glass paste should be determined.
　図２に示すように、部品本体２２の端面３０および３１の各々からガラス層４０および４１の各々の端縁４２および４３までの距離Ｃは、部品本体２２の１対の端面３０および３１間の距離Ｌの１／４倍～１／２倍の範囲にあることが好ましい。 As shown in FIG. 2, the distance C from each of the end faces 30 and 31 of the component body 22 to the respective edges 42 and 43 of the glass layers 40 and 41 is between the pair of end faces 30 and 31 of the component body 22. The distance L is preferably in the range of 1/4 to 1/2 times the distance L.
　次に、図３に示すように、外部電極３２および３３が導電性ペーストの焼付けによって形成される。ここで用いられる導電性ペーストは、たとえばＣｕ粉末のような導電性金属粉末とガラスフリットとワニスとを含むものであるが、ガラスフリットにおける酸化ケイ素の含有比率については任意に選ぶことができる。外部電極３２および３３の端縁３４および３５は、それぞれ、ガラス層４０および４１の端縁４２および４３を露出させるように位置している。 Next, as shown in FIG. 3, external electrodes 32 and 33 are formed by baking a conductive paste. The conductive paste used here contains, for example, conductive metal powder such as Cu powder, glass frit, and varnish, and the content ratio of silicon oxide in the glass frit can be arbitrarily selected. The edges 34 and 35 of the external electrodes 32 and 33 are located so as to expose the edges 42 and 43 of the glass layers 40 and 41, respectively.
　なお、前述したガラス層４０および４１の焼付けと外部電極３２および３３の焼付けとは、これらを同時に実施してもよい。 Note that the above-described baking of the glass layers 40 and 41 and the baking of the external electrodes 32 and 33 may be performed simultaneously.
　次に、図１に示したように、めっき膜３６および３７が、たとえば電解めっきのような湿式めっきを実施することにより、外部電極３２および３３上に形成される。前述したガラス層４０および４１を構成するガラスは、このめっき工程において用いられるめっき液に溶解されにくいため、めっき工程で、外部電極３２および３３の端縁３４および３５近傍において部品本体２２が浸食されて脆弱になることが抑制される。そのため、外部電極３２および３３の端縁３４および３５が位置する部分を起点とするクラックの発生を有利に抑制することができ、結果として、積層セラミックコンデンサ２１の機械的強度を高めることができる。 Next, as shown in FIG. 1, the plating films 36 and 37 are formed on the external electrodes 32 and 33 by performing wet plating such as electrolytic plating. Since the glass constituting the glass layers 40 and 41 is not easily dissolved in the plating solution used in this plating process, the component main body 22 is eroded in the vicinity of the edges 34 and 35 of the external electrodes 32 and 33 in the plating process. And being vulnerable. Therefore, it is possible to advantageously suppress the occurrence of cracks starting from the portions where the edges 34 and 35 of the external electrodes 32 and 33 are located, and as a result, the mechanical strength of the multilayer ceramic capacitor 21 can be increased.
　次に、第１の実施形態に基づき、この発明による効果を確認するために実施した実験例１について説明する。 Next, Experimental Example 1 carried out to confirm the effect of the present invention based on the first embodiment will be described.
　［実験例１］
　（１）部品本体の作製
　ＢａおよびＴｉを主成分とするセラミック材料粉末を含む複数のセラミックグリーンシートを用意した。次に、セラミックグリーンシート上に、Ｎｉを主成分とする導電性ペーストをスクリーン印刷により塗布し、内部電極となるべき導電性ペースト膜を形成した。 [Experimental Example 1]
(1) Production of component main body A plurality of ceramic green sheets containing ceramic material powders mainly composed of Ba and Ti were prepared. Next, on the ceramic green sheet, a conductive paste containing Ni as a main component was applied by screen printing to form a conductive paste film to be an internal electrode.
　次に、導電性ペースト膜が形成されていないセラミックグリーンシートを所定の外層厚みになるように積層し、次いで、導電性ペースト膜が形成されたセラミックグリーンシートを所定枚数積層し、さらに、導電性ペーストが形成されていないセラミックグリーンシートを所定の外層厚みになるように積層することによって、複数の部品本体を取り出すことが可能な生の状態のマザーブロックを得た。 Next, the ceramic green sheets on which the conductive paste film is not formed are stacked so as to have a predetermined outer layer thickness, and then a predetermined number of ceramic green sheets on which the conductive paste film is formed are stacked. A green mother block in which a plurality of component main bodies can be taken out was obtained by laminating ceramic green sheets having no paste formed so as to have a predetermined outer layer thickness.
　次に、マザーブロックを切断し、複数のチップ状の生の部品本体を取り出し、次いで、生の部品本体をバッチ炉において還元性雰囲気下で焼成し、焼結した部品本体を得た。 Next, the mother block was cut, a plurality of chip-shaped raw component bodies were taken out, and then the raw component bodies were fired in a reducing furnace in a reducing atmosphere to obtain a sintered component body.
　（２）ガラス層の形成
　表１の「ガラスフリット中の酸化ケイ素量」の欄に示すように、酸化ケイ素の含有量を５モル％、１０モル％、２０モル％、３０モル％、４０モル％、５０モル％、６０モル％、７０モル％、８０モル％とそれぞれしたガラスフリット（Ｓｉ－Ｂ－Ｚｎ系ガラス）とワニスとを、３本ロールで分散・混合して、ガラスペーストを得た。ここで、ガラスペースト中のガラスフリットの含有量は、２０～３０体積％の範囲になるようにした。また、ワニスは、アクリル系樹脂を、ターピネオールを主成分とする有機溶剤に溶解して作製した。 (2) Formation of glass layer As shown in the column of “amount of silicon oxide in glass frit” in Table 1, the content of silicon oxide is 5 mol%, 10 mol%, 20 mol%, 30 mol%, 40 mol. %, 50 mol%, 60 mol%, 70 mol%, 80 mol% of glass frit (Si—B—Zn glass) and varnish are dispersed and mixed with three rolls to obtain a glass paste. It was. Here, the content of the glass frit in the glass paste was set in the range of 20 to 30% by volume. The varnish was prepared by dissolving an acrylic resin in an organic solvent containing terpineol as a main component.
　次に、部品本体の主面上および側面上における端面に隣接する領域に、上述のガラスペーストを印刷した。 Next, the above glass paste was printed on the main surface and the side surface of the component body adjacent to the end surface.
　次に、上述のガラスペーストを、９００℃で１０分間、窒素雰囲気下で熱処理することによって焼き付け、ガラス層を形成した。ここで、図２に示した距離Ｃは、距離Ｌの１／４倍～１／２倍の範囲になるようにした。 Next, the above glass paste was baked by heat treatment at 900 ° C. for 10 minutes in a nitrogen atmosphere to form a glass layer. Here, the distance C shown in FIG. 2 is set to be in a range of ¼ to ½ times the distance L.
　（３）外部電極の形成
　Ｃｕ粉末（Ｄ50＝１．５μｍ）と、軟化点：５５０～７００℃のＳｉ－Ｂ－Ｚｎ系ガラスからなるガラスフリットと、ターピネオールを主成分とする有機溶剤にアクリル系樹脂を溶解してなるワニスとを、分散・混合することによって、外部電極用の導電性ペーストを得た。ここで、導電性ペースト中の無機成分（Ｃｕ粉末およびガラスフリット）の割合が３０体積％、および、Ｃｕ粉末とガラスフリットとの割合が、体積比で、４：１～６：４になるようにした。 (3) Formation of external electrode: Cu powder (D50 = 1.5 μm), glass frit made of Si—B—Zn glass at a softening point of 550 to 700 ° C., acrylic solvent in organic solvent mainly composed of terpineol A conductive paste for external electrodes was obtained by dispersing and mixing the varnish obtained by dissolving the resin. Here, the ratio of inorganic components (Cu powder and glass frit) in the conductive paste is 30% by volume, and the ratio of Cu powder and glass frit is 4: 1 to 6: 4 in volume ratio. I made it.
　次に、定盤上に上記外部電極用導電性ペーストからなる膜を所定の厚みで形成しておき、この導電性ペースト膜中に、ホルダによって保持された部品本体の端部を浸漬した後、導電性ペースト膜から取り出すことによって、部品本体の両端面に外部電極となる導電性ペーストを塗布した。このとき、外部電極となる導電性ペースト膜の端縁は、ガラス層の端縁を露出させるように位置調整した。 Next, a film made of the conductive paste for external electrodes is formed with a predetermined thickness on the surface plate, and after immersing the end of the component main body held by the holder in the conductive paste film, By taking out from the conductive paste film, a conductive paste to be an external electrode was applied to both end faces of the component main body. At this time, the position of the edge of the conductive paste film serving as the external electrode was adjusted so that the edge of the glass layer was exposed.
　次いで、外部電極となる導電性ペーストを焼き付けるため、部品本体をベルト炉で熱処理した。熱処理においては、９００℃の範囲の最高温度を１０分間保持する条件を採用した。ここで、外部電極の酸化を防止するため、還元性雰囲気を適用した。 Next, in order to bake the conductive paste to be the external electrode, the component body was heat-treated in a belt furnace. In the heat treatment, the condition of holding the maximum temperature in the range of 900 ° C. for 10 minutes was adopted. Here, a reducing atmosphere was applied to prevent oxidation of the external electrode.
　（４）めっき膜の形成
　上記外部電極に対し、Ｎｉ電解めっきおよびＳｎ電解めっきを順次施し、外部電極上にめっき膜を形成した。 (4) Formation of plating film Ni electrolytic plating and Sn electrolytic plating were sequentially applied to the external electrode to form a plating film on the external electrode.
　以上のようにした、試料となる積層セラミックコンデンサを得た。 A multilayer ceramic capacitor serving as a sample was obtained as described above.
　（５）ガラス層での酸化ケイ素の定量
　各試料に係る積層セラミックコンデンサについて、ガラス層を、外部電極の端縁近傍において、ＸＲＦで点分析し、それによって、そこに存在する元素を定性および定量分析した。 (5) Quantification of silicon oxide in the glass layer For the multilayer ceramic capacitor according to each sample, the glass layer is subjected to point analysis by XRF in the vicinity of the edge of the external electrode, thereby qualitatively and quantitatively determining the elements present there. analyzed.
　この分析によって見出された元素から、セラミック層の成分であるＢａおよびＴｉと、外部電極の成分であるＣｕと、めっき膜の成分であるＮｉおよびＳｎとを除いた元素を、外部電極の端縁近傍でのガラス成分の元素とし、この元素を酸化物に換算して、表１の「ガラス層での酸化ケイ素量」を定量した。 From the elements found by this analysis, elements excluding Ba and Ti that are components of the ceramic layer, Cu that is a component of the external electrode, and Ni and Sn that are components of the plating film are used as the ends of the external electrode. The element of the glass component in the vicinity of the edge was converted into an oxide, and the “amount of silicon oxide in the glass layer” in Table 1 was quantified.
　（６）たわみ試験
　ガラスエポキシ基板に、各試料に係る積層セラミックコンデンサをはんだで実装し、１．０ｍｍ／秒の速度で荷重を加え、たわみ量が１．５ｍｍに達してから５±１秒間保持した。 (6) Deflection test A multilayer ceramic capacitor according to each sample is mounted on a glass epoxy substrate with solder, a load is applied at a speed of 1.0 mm / sec, and the deflection amount is held for 5 ± 1 sec after reaching 1.5 mm. did.
　次いで、上記のたわみ試験を実施した後の積層セラミックコンデンサを断面研磨し、研磨面を観察してクラックの発生の有無を確認し、試料数２０個中でのクラック発生率を算出した。その結果が表１の「クラック発生率」の欄に示されている。 Next, the multilayer ceramic capacitor after the above deflection test was subjected to cross-section polishing, the polished surface was observed to check for the occurrence of cracks, and the crack generation rate in 20 samples was calculated. The result is shown in the column of “crack rate” in Table 1.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　表１において、「ガラスフリット中の酸化ケイ素量」と「ガラス層での酸化ケイ素量」とを比較すると、ガラスペーストを焼き付けると、ガラスフリットを構成するガラス成分の１つである酸化亜鉛の一部が昇華するため、「ガラス層での酸化ケイ素量」は「ガラスフリット中の酸化ケイ素量」よりも多くなったことがわかる。 In Table 1, when “the amount of silicon oxide in the glass frit” and “the amount of silicon oxide in the glass layer” are compared, when the glass paste is baked, one of the zinc oxides which are one of the glass components constituting the glass frit. Since the part sublimates, it can be seen that the “amount of silicon oxide in the glass layer” is larger than the “amount of silicon oxide in the glass frit”.
　「ガラス層での酸化ケイ素量」がそれぞれ７モル％および１４モル％である試料１および２では、たわみ試験でクラックが発生した。これは、外部電極の端縁近傍において、ガラスがめっき液に溶解して、部品本体が浸食されたためであると推測される。 In the samples 1 and 2 whose “amount of silicon oxide in the glass layer” is 7 mol% and 14 mol%, cracks occurred in the deflection test. This is presumably because the glass was dissolved in the plating solution in the vicinity of the edge of the external electrode, and the component main body was eroded.
　他方、「ガラス層での酸化ケイ素量」が８４モル％である試料９でも、たわみ試験でクラックが発生した。これは、ガラスの軟化点が高くなり、焼付け時にガラスが十分に軟化しなかったため、ガラス層の緻密性が低くなって、めっき液を遮断する機能が低下し、部品本体が浸食されたためであると推測される。 On the other hand, even in Sample 9 where the “silicon oxide content in the glass layer” was 84 mol%, cracks occurred in the deflection test. This is because the softening point of the glass was high and the glass was not sufficiently softened during baking, so the denseness of the glass layer was lowered, the function of blocking the plating solution was lowered, and the component body was eroded. It is guessed.
　これらに対して、「ガラス層での酸化ケイ素量」が２３～７４モル％の範囲にある試料３～８では、たわみ試験でクラックが発生しなかった。これは、ガラス層のガラスがめっき液に溶解しにくい組成であるため、部品本体が浸食されなかったためであると推測される。 On the other hand, in the samples 3 to 8 in which the “amount of silicon oxide in the glass layer” was in the range of 23 to 74 mol%, no crack was generated in the deflection test. This is presumably because the glass of the glass layer has a composition that is difficult to dissolve in the plating solution, and thus the component main body was not eroded.
　なお、ガラス層の形成のためのガラスペーストの焼付け温度を１０００℃まで上げると、ガラス層の緻密性は向上するが、このような高温で熱処理すると、部品本体へのダメージが大きく、電気的特性が低下することが確認されている。 When the baking temperature of the glass paste for forming the glass layer is increased to 1000 ° C., the denseness of the glass layer is improved. However, when heat treatment is performed at such a high temperature, damage to the component body is large, and electrical characteristics are increased. Has been confirmed to decrease.
　［第２の実施形態］
　図４は、図１に対応する図であって、この発明の第２の実施形態による積層セラミックコンデンサ５１を示している。 [Second Embodiment]
FIG. 4 is a view corresponding to FIG. 1 and shows a multilayer ceramic capacitor 51 according to a second embodiment of the present invention.
　図４を参照して、積層セラミックコンデンサ５１は、図１に示した積層セラミックコンデンサ２１に備える部品本体２２と実質的に同様の部品本体２２を備えている。したがって、図４において、図１に示す要素に相当する要素には同様の参照符号を付すことによって、重複する説明は省略する。 Referring to FIG. 4, a multilayer ceramic capacitor 51 includes a component body 22 that is substantially similar to the component body 22 provided in the multilayer ceramic capacitor 21 shown in FIG. Therefore, in FIG. 4, elements corresponding to those shown in FIG.
　部品本体２２の第１および第２の端面３０および３１上には、それぞれ、第１および第２の内部電極２４および２５の各端部に電気的に接続されるように、第１および第２の外部電極５２および５３が形成されている。第１および第２の外部電極５２および５３は、各々の端縁５４および５５を端面３０および３１に隣接する主面２６および２７上ならびに側面上に位置させている。外部電極５２および５３は、たとえば銅を主成分とする導電性ペーストの焼付けによって形成される。 The first and second end surfaces 30 and 31 of the component body 22 are electrically connected to the end portions of the first and second internal electrodes 24 and 25, respectively. External electrodes 52 and 53 are formed. The first and second external electrodes 52 and 53 have respective end edges 54 and 55 located on the main surfaces 26 and 27 adjacent to the end surfaces 30 and 31 and on the side surfaces. External electrodes 52 and 53 are formed, for example, by baking a conductive paste mainly composed of copper.
　外部電極５２および５３は、酸化ケイ素含有量の多寡に応じて、それぞれ、部品本体２２の端面３０および３１上に位置する主要部分５６および５７と、部品本体２２の主面２６および２７上ならびに側面２８および２９（図７参照）上に位置する隣接面延長部分５８および５９とに分類される。大まかに言えば、隣接面延長部分５８および５９を形成するために用いられる導電性ペーストは、酸化ケイ素含有量が比較的多くされる。 The external electrodes 52 and 53 are arranged on the main surfaces 56 and 57 located on the end faces 30 and 31 of the component main body 22 and on the main surfaces 26 and 27 and the side surfaces of the component main body 22 depending on the silicon oxide content. 28 and 29 (see FIG. 7) are classified into adjacent surface extensions 58 and 59. Broadly speaking, the conductive paste used to form the adjacent surface extensions 58 and 59 has a relatively high silicon oxide content.
　外部電極３２および３３上には、それぞれ、めっき膜３６および３７が形成される。めっき膜３６および３７は、図１に示した積層セラミックコンデンサ２１におけるめっき膜３６および３７と実質的に同様である。 Plated films 36 and 37 are formed on the external electrodes 32 and 33, respectively. The plating films 36 and 37 are substantially the same as the plating films 36 and 37 in the multilayer ceramic capacitor 21 shown in FIG.
　この発明の特徴となる構成として、この実施形態においても、部品本体２２の表面上であって、少なくとも外部電極５２および５３の端縁５４および５５からその近傍にわたって、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスが存在するガラス領域６０および６１が形成される。この実施形態では、ガラス領域６０および６１は、前述した隣接面延長部分５８および５９を形成するために付与された導電性ペーストを焼き付けることによって、当該導電性ペーストから染み出したガラス成分によって与えられる。 As a feature of the present invention, also in this embodiment, at least 23 mol% and 74 mol% on the surface of the component body 22 and at least from the edges 54 and 55 of the external electrodes 52 and 53 to the vicinity thereof. Glass regions 60 and 61 in which the following glass containing silicon oxide is present are formed. In this embodiment, the glass regions 60 and 61 are provided by glass components that have exuded from the conductive paste by baking the conductive paste applied to form the adjacent surface extensions 58 and 59 described above. .
　次に、積層セラミックコンデンサ５１の製造方法について説明する。 Next, a method for manufacturing the multilayer ceramic capacitor 51 will be described.
　まず、部品本体２２が用意される。 First, the component body 22 is prepared.
　他方、外部電極５２および５３を形成するための導電性ペーストとして、前述した主要部分５６および５７のための導電性ペーストと隣接面延長部分５８および５９のための導電性ペーストとが用意される。いずれの導電性ペーストも、導電性金属粉末とガラスフリットとワニスとを含むが、特に隣接面延長部分５８および５９のための導電性ペーストについては、前述したように、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスが存在するガラス領域６０および６１をこの導電性ペーストから染み出したガラス成分によって形成し得るような組成に選ばれる。 On the other hand, as the conductive paste for forming the external electrodes 52 and 53, the conductive paste for the main portions 56 and 57 and the conductive paste for the adjacent surface extension portions 58 and 59 are prepared. Each of the conductive pastes contains conductive metal powder, glass frit, and varnish, but particularly the conductive paste for the adjacent surface extension portions 58 and 59 is 23 mol% or more and 74 mol as described above. The glass regions 60 and 61 in which glass containing less than 1% of silicon oxide is present are selected so as to be formed by the glass component exuded from the conductive paste.
　次に、図５に示すように、部品本体２２の主面２６および２７上ならびに側面２８および２９上における端面３０および３１に隣接する領域に、隣接面延長部分５８および５９のための導電性ペーストが付与され、それによって、隣接面延長部分５８および５９となるべき導電性ペースト膜６２および６３が形成される。 Next, as shown in FIG. 5, the conductive paste for the adjacent surface extensions 58 and 59 is formed on the main surfaces 26 and 27 and the side surfaces 28 and 29 of the component body 22 in the region adjacent to the end surfaces 30 and 31. As a result, conductive paste films 62 and 63 to be adjacent surface extensions 58 and 59 are formed.
　次に、部品本体２２の端面３０および３１上に、主要部分５６および５７のための導電性ペーストが付与され、それによって、主要部分５６および５７となるべき導電性ペースト膜が形成され、その後、焼付け工程が実施されることによって、図６に示すように、焼結した隣接面延長部分５８および５９ならびに主要部分５６および５７からなる外部電極５２および５３が形成される。 Next, a conductive paste for the main portions 56 and 57 is applied on the end faces 30 and 31 of the component body 22, thereby forming a conductive paste film to be the main portions 56 and 57. By performing the baking process, as shown in FIG. 6, external electrodes 52 and 53 comprising sintered adjacent surface extensions 58 and 59 and main portions 56 and 57 are formed.
　また、上述の焼付け工程の結果、隣接面延長部分５８および５９からガラス成分が染み出し、それによって、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスが存在するガラス領域６０および６１が、部品本体２２の表面上であって、少なくとも外部電極５２および５３の端縁５４および５５からその近傍にわたって形成される。 Further, as a result of the baking process described above, the glass components ooze out from the adjacent surface extension portions 58 and 59, whereby glass regions 60 and 61 in which glass containing silicon oxide of 23 mol% or more and 74 mol% or less exists are provided. And formed on the surface of the component body 22 from at least the end edges 54 and 55 of the external electrodes 52 and 53 to the vicinity thereof.
　なお、第１の実施形態の場合と同様、隣接面延長部分５８および５９を形成するための導電性ペーストに含まれるガラスが、たとえばＳｉ－Ｂ－Ｚｎ系のものである場合、焼付け工程において、ガラス成分である酸化亜鉛の一部が昇華するため、焼付けの結果形成されたガラス領域６０および６１における酸化ケイ素の比率は、導電性ペースト中のガラスに含まれる酸化ケイ素の比率より高くなる。したがって、このことを考慮して、導電性ペーストに含まれるガラスの組成が決定されるべきである。 As in the case of the first embodiment, when the glass contained in the conductive paste for forming the adjacent surface extension portions 58 and 59 is, for example, Si—B—Zn-based, in the baking step, Since a part of zinc oxide which is a glass component is sublimated, the ratio of silicon oxide in the glass regions 60 and 61 formed as a result of baking is higher than the ratio of silicon oxide contained in the glass in the conductive paste. Therefore, in consideration of this, the composition of the glass contained in the conductive paste should be determined.
　図６に示すように、外部電極５２および５３の各々の端縁５４および５５の位置から測定したガラス領域６０および６１の各々の端縁６４および６５までの距離Ｄは、部品本体２２の端面３０および３１の各々から外部電極５２および５３の各々の端縁５４および５５までの距離Ｅの１／１０倍～１倍の範囲にあることが好ましい。なお、この実施形態では、ガラス領域６０および６１は、導電性ペーストから染み出したガラス成分によって形成されるものであるので、その端縁６４および６５の位置を目視により見極めることが比較的困難である。そこで、ガラス領域６０および６１の端縁６４および６５の位置を求めるため、以下のような方法が採用される。 As shown in FIG. 6, the distance D from the positions of the edges 54 and 55 of the external electrodes 52 and 53 to the edges 64 and 65 of the glass regions 60 and 61 is determined by the end face 30 of the component body 22. And 31 to the end edges 54 and 55 of each of the external electrodes 52 and 53 are preferably in the range of 1/10 to 1 times the distance E. In this embodiment, since the glass regions 60 and 61 are formed by the glass component exuded from the conductive paste, it is relatively difficult to visually determine the positions of the edges 64 and 65. is there. Therefore, in order to obtain the positions of the edges 64 and 65 of the glass regions 60 and 61, the following method is employed.
　図７には、図６に示した状態にある構造物が平面図で示されている。図７に示したライン６６に沿ってＸＲＦで線分析することによってＳｉの濃度分布を求めると、図８に示すような分析結果が得られる。図８に示したＳｉの濃度勾配からガラスの染み出し長さ、すなわち、「外部電極の端縁」と「ガラス領域の端縁」との間の距離Ｄを求めることができる。 FIG. 7 shows a plan view of the structure in the state shown in FIG. When the Si concentration distribution is obtained by performing XRF line analysis along the line 66 shown in FIG. 7, an analysis result as shown in FIG. 8 is obtained. From the Si concentration gradient shown in FIG. 8, the length of the glass seepage, that is, the distance D between the “edge of the external electrode” and the “edge of the glass region” can be obtained.
　上述したような外部電極５２および５３の形成にあたって、主要部分５６および５７のための導電性ペーストの付与工程と隣接面延長部分５８および５９のための導電性ペーストの付与工程とは順序を逆にしてもよい。 In forming the external electrodes 52 and 53 as described above, the order of applying the conductive paste for the main portions 56 and 57 and the step of applying the conductive paste for the adjacent surface extension portions 58 and 59 are reversed. May be.
　次に、図４に示したように、めっき膜３６および３７が、たとえば電解めっきのような湿式めっきを実施することにより、外部電極５２および５３上に形成される。前述したガラス領域６０および６１に存在するガラスは、このめっき工程において用いられるめっき液に溶解されにくいため、めっき工程で、外部電極５２および５３の端縁５４および５５近傍において部品本体２２が浸食されて脆弱になることが抑制される。そのため、外部電極５２および５３の端縁５４および５５が位置する部分を起点とするクラックの発生を有利に抑制することができ、結果として、積層セラミックコンデンサ２１の機械的強度を高めることができる。 Next, as shown in FIG. 4, the plating films 36 and 37 are formed on the external electrodes 52 and 53 by performing wet plating such as electrolytic plating. Since the glass existing in the glass regions 60 and 61 is not easily dissolved in the plating solution used in this plating process, the component main body 22 is eroded in the vicinity of the edges 54 and 55 of the external electrodes 52 and 53 in the plating process. And being vulnerable. Therefore, it is possible to advantageously suppress the occurrence of cracks starting from the portions where the edges 54 and 55 of the external electrodes 52 and 53 are located, and as a result, the mechanical strength of the multilayer ceramic capacitor 21 can be increased.
　次に、第２の実施形態に基づき、この発明による効果を確認するために実施した実験例２について説明する。 Next, experimental example 2 conducted to confirm the effect of the present invention will be described based on the second embodiment.
　［実験例２］
　（１）部品本体の作製
　実験例１の場合と同様の部品本体を作製した。 [Experiment 2]
(1) Production of component body A component body similar to that in Experimental Example 1 was produced.
　（２）隣接面延長部分用導電性ペーストの作製
　部品本体の主面および側面を周回するように形成される外部電極の隣接面延長部分のための導電性ペーストとして、Ｃｕ粉末（Ｄ50＝１．５μｍ）と、表２の「ガラスフリット中の酸化ケイ素量」の欄に示すように、酸化ケイ素の含有量を５モル％、１０モル％、２０モル％、３０モル％、４０モル％、５０モル％、６０モル％、７０モル％、８０モル％とそれぞれしたガラスフリット（Ｓｉ－Ｂ－Ｚｎ系ガラス）と、ターピネオールを主成分とする有機溶剤にアクリル系樹脂を溶解してなるワニスとを、分散・混合してなるものを作製した。 (2) Production of conductive paste for adjacent surface extension portion Cu powder (D50 = 1.D) as a conductive paste for the adjacent surface extension portion of the external electrode formed so as to go around the main surface and side surface of the component body. 5 μm), and as shown in the column of “amount of silicon oxide in glass frit” in Table 2, the content of silicon oxide is 5 mol%, 10 mol%, 20 mol%, 30 mol%, 40 mol%, 50 mol% A glass frit (Si—B—Zn glass) of mol%, 60 mol%, 70 mol%, and 80 mol%, respectively, and a varnish obtained by dissolving an acrylic resin in an organic solvent mainly composed of terpineol. A product obtained by dispersing and mixing was prepared.
　（３）主要部分用導電性ペーストの作製
　部品本体の端面上に形成される外部電極の主要部分のための導電性ペーストとして、実験例１において外部電極用の導電性ペーストとして準備したものと同様のものを作製した。 (3) Production of conductive paste for main part As the conductive paste for the main part of the external electrode formed on the end face of the component body, the same as that prepared as the conductive paste for the external electrode in Experimental Example 1 Was made.
　（４）外部電極の形成
　上記隣接面延長部分用導電性ペーストを、部品本体の主面および側面を周回するように印刷するとともに、上記主要部分用導電性ペーストを部品本体の端面上に印刷した。 (4) Formation of external electrode The conductive paste for extending the adjacent surface was printed so as to circulate around the main surface and side surfaces of the component body, and the conductive paste for the main portion was printed on the end surface of the component body. .
　次いで、上記隣接面延長部分用導電性ペーストおよび主要部分用導電性ペーストを焼き付けるため、実験例１における外部電極形成のための焼付け工程と同様の条件の焼付け工程を実施して、外部電極を形成した。 Next, in order to bake the conductive paste for the adjacent surface extension portion and the main portion conductive paste, a baking step under the same conditions as the baking step for forming the external electrode in Experimental Example 1 is performed to form an external electrode. did.
　（５）ガラス領域の広がりの測定
　上述の外部電極形成のための焼付け時に、隣接面延長部分用導電性ペーストから染み出したガラス成分によってガラス領域が、部品本体の表面上であって、外部電極の端縁からその近傍にわたって形成された。 (5) Measurement of spread of glass region During baking for forming the external electrode described above, the glass region is on the surface of the component main body due to the glass component exuded from the conductive paste for the adjacent surface extension portion, and the external electrode It was formed from the edge of the region to its vicinity.
　ガラス領域の広がりは、前述のように、図７に示したライン６６に沿ってＸＲＦで線分析することによってＳｉの濃度分布を求め、図８に示すような分析結果を得た後、図８に示したＳｉの濃度勾配を見ることによって求めることができる。この実験例２で得られた試料では、外部電極の端縁の位置から測定したガラス領域の端縁までの距離Ｄ（図６参照）は、部品本体の端面から外部電極の端縁までの距離Ｅ（図６参照）の１／１０倍～１倍の範囲にあることが確認された。 As described above, the spread of the glass region is obtained by performing a line analysis with XRF along the line 66 shown in FIG. 7 to obtain a Si concentration distribution and obtaining an analysis result as shown in FIG. It can be obtained by observing the Si concentration gradient shown in FIG. In the sample obtained in Experimental Example 2, the distance D (see FIG. 6) from the position of the edge of the external electrode to the edge of the glass region measured is the distance from the end surface of the component body to the edge of the external electrode. It was confirmed that it was in the range of 1/10 to 1 times E (see FIG. 6).
　（６）めっき膜の形成
　上記外部電極に対し、実験例１の場合と同様、Ｎｉ電解めっきおよびＳｎ電解めっきを順次施し、外部電極上にめっき膜を形成した。 (6) Formation of Plating Film As in the case of Experimental Example 1, Ni electrolytic plating and Sn electrolytic plating were sequentially applied to the external electrode to form a plating film on the external electrode.
　以上のようにした、試料となる積層セラミックコンデンサを得た。 A multilayer ceramic capacitor serving as a sample was obtained as described above.
　（７）ガラス領域での酸化ケイ素の定量
　実験例１の場合と同様の方法によって、ガラス領域での酸化ケイ素量を求めた。その結果が表２の「ガラス領域での酸化ケイ素量」の欄に示されている。 (7) Quantification of silicon oxide in glass region By the same method as in Experimental Example 1, the amount of silicon oxide in the glass region was determined. The result is shown in the column of “amount of silicon oxide in the glass region” in Table 2.
　（８）たわみ試験
　実験例１の場合と同様の方法によって、たわみ試験を実施し、表２の「クラック発生率」を求めた。 (8) Deflection test A deflection test was carried out by the same method as in Experimental Example 1, and the “crack rate” in Table 2 was determined.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
　表２において、「ガラスフリット中の酸化ケイ素量」と「ガラス領域での酸化ケイ素量」とを比較すると、ガラスフリットを含有する導電性ペーストを焼き付けると、ガラスフリットを構成するガラス成分の１つである酸化亜鉛の一部が昇華するため、「ガラス領域での酸化ケイ素量」は「ガラスフリット中の酸化ケイ素量」よりも多くなったことがわかる。 In Table 2, when “the amount of silicon oxide in the glass frit” is compared with “the amount of silicon oxide in the glass region”, one of the glass components constituting the glass frit is obtained by baking the conductive paste containing the glass frit. It can be seen that “amount of silicon oxide in the glass region” is larger than “amount of silicon oxide in the glass frit” because a part of the zinc oxide is sublimated.
　「ガラス領域での酸化ケイ素量」がそれぞれ７モル％および１３モル％である試料１１および１２では、たわみ試験でクラックが発生した。これは、外部電極の端縁近傍において、ガラスがめっき液に溶解して、部品本体が浸食されたためであると推測される。 In the samples 11 and 12 in which “the amount of silicon oxide in the glass region” was 7 mol% and 13 mol%, cracks occurred in the deflection test. This is presumably because the glass was dissolved in the plating solution in the vicinity of the edge of the external electrode, and the component main body was eroded.
　他方、「ガラス領域での酸化ケイ素量」が８３モル％である試料１９でも、たわみ試験でクラックが発生した。これは、ガラスの軟化点が高くなり、焼付け時にガラスが十分に軟化しなかったため、ガラス領域が緻密に形成されず、めっき液を遮断する機能が十分でなく、部品本体が浸食されたためであると推測される。 On the other hand, even in the sample 19 in which the “amount of silicon oxide in the glass region” was 83 mol%, cracks occurred in the deflection test. This is because the glass softening point was high and the glass was not sufficiently softened during baking, so the glass region was not formed densely, the function of blocking the plating solution was not sufficient, and the component body was eroded. It is guessed.
　これらに対して、「ガラス領域での酸化ケイ素量」が２３～７４モル％の範囲にある試料１３～１８では、たわみ試験でクラックが発生しなかった。これは、ガラス層のガラスがめっき液に溶解しにくい組成であるため、部品本体が浸食されなかったためであると推測される。 On the other hand, in samples 13 to 18 in which the “amount of silicon oxide in the glass region” is in the range of 23 to 74 mol%, no crack was generated in the deflection test. This is presumably because the glass of the glass layer has a composition that is difficult to dissolve in the plating solution, and thus the component main body was not eroded.
　［他の実施形態］
　この発明に係る積層セラミック電子部品が、図１または図４に示したような積層セラミックコンデンサ２１または５１である場合、セラミック層２３は、誘電体セラミックから構成される。この発明が適用される積層セラミック電子部品は、その他、インダクタ、サーミスタ、圧電部品などであってもよい。したがって、積層セラミック電子部品の機能に応じて、セラミック層は、誘電体セラミックの他、磁性体セラミック、半導体セラミック、圧電体セラミックなどから構成されてもよい。 [Other Embodiments]
When the multilayer ceramic electronic component according to the present invention is the multilayer ceramic capacitor 21 or 51 as shown in FIG. 1 or 4, the ceramic layer 23 is made of a dielectric ceramic. The multilayer ceramic electronic component to which the present invention is applied may be an inductor, a thermistor, a piezoelectric component, or the like. Therefore, according to the function of the multilayer ceramic electronic component, the ceramic layer may be composed of a dielectric ceramic, a magnetic ceramic, a semiconductor ceramic, a piezoelectric ceramic, or the like.
　また、図示した積層セラミックコンデンサ２１または５１は、２個の外部電極３２および３３または２個の外部電極５２および５３を備える２端子型のものであるが、この発明は多端子型の積層セラミック電子部品にも適用することができる。 The illustrated multilayer ceramic capacitor 21 or 51 is of a two-terminal type including two external electrodes 32 and 33 or two external electrodes 52 and 53. However, the present invention is a multi-terminal multilayer ceramic electronic device. It can also be applied to parts.
　さらに、この発明は、積層セラミック電子部品に限らず、単層タイプのセラミック電子部品にも適用することができる。 Furthermore, the present invention can be applied not only to multilayer ceramic electronic components but also to single-layer type ceramic electronic components.
２１，５１　積層セラミックコンデンサ
２２　部品本体
２３　セラミック層
２４，２５　内部電極
２６，２７　主面
２８，２９　側面
３０，３１　端面
３２，３３，５２，５３　外部電極
３４，３５，５４，５５　外部電極の端縁
３６，３７　めっき膜
３８，３９，６０，６１　ガラス領域
４０，４１　ガラス層
４２，４３　ガラス層の端縁
５６，５７　外部電極の主要部分
５８，５９　外部電極の隣接面延長部分
６２，６３　導電性ペースト膜
６４，６５　ガラス領域の端縁 21, 51 Multilayer ceramic capacitor 22 Component body 23 Ceramic layers 24, 25 Internal electrodes 26, 27 Main surfaces 28, 29 Side surfaces 30, 31 End surfaces 32, 33, 52, 53 External electrodes 34, 35, 54, 55 Ends of external electrodes Edge 36, 37 Plated film 38, 39, 60, 61 Glass region 40, 41 Glass layer 42, 43 Edge 56, 57 of glass layer Main portion 58, 59 of external electrode Adjacent surface extension portion 62, 63 of external electrode Paste film 64, 65 Edge of glass region

Claims (7)

  1. 　セラミックをもって構成され、互いに対向する１対の主面、互いに対向する１対の側面および互いに対向する１対の端面を有する、実質的に直方体形状の部品本体と、
    　ガラス成分を含む導電性ペーストの焼付けによって形成されたものであって、前記部品本体の前記端面上に形成されるとともに、その端縁を前記端面に隣接する前記主面および前記側面の少なくとも一方上に位置させている、外部電極と、
    　前記外部電極上に形成されるめっき膜と
    を備え、
    　前記部品本体の表面上であって、少なくとも前記外部電極の前記端縁からその近傍にわたって、２３モル％以上かつ７４モル％以下の酸化ケイ素を含むガラスが存在するガラス領域が形成されている、
    セラミック電子部品。     A substantially rectangular parallelepiped component body, which is configured with ceramic and has a pair of main surfaces facing each other, a pair of side surfaces facing each other, and a pair of end surfaces facing each other;
    It is formed by baking of a conductive paste containing a glass component, and is formed on the end surface of the component main body, and its end edge is on at least one of the main surface and the side surface adjacent to the end surface. An external electrode positioned at
    A plating film formed on the external electrode,
    A glass region is formed on the surface of the component main body, in which glass containing 23 mol% or more and 74 mol% or less of silicon oxide is present at least from the edge of the external electrode to the vicinity thereof.
    Ceramic electronic components.
  2. 　前記外部電極の前記端縁の位置から測定した前記ガラス領域の端縁までの距離は、前記部品本体の前記端面から前記外部電極の前記端縁までの距離以下である、請求項１に記載のセラミック電子部品。 The distance from the position of the said edge of the said external electrode to the edge of the said glass area | region measured below is the distance from the said end surface of the said component main body to the said edge of the said external electrode. Ceramic electronic components.
  3. 　前記ガラス領域は、前記部品本体の前記主面および前記側面の少なくとも一方上における前記端面に隣接する領域に、酸化ケイ素を含むガラスフリットを分散させてなるガラスペーストを付与し、焼き付けることによって形成されたガラス層によって与えられ、前記外部電極の端縁は、前記ガラス層の端縁を露出させるように位置している、請求項１または２に記載のセラミック電子部品。 The glass region is formed by applying and baking a glass paste in which glass frit containing silicon oxide is dispersed in a region adjacent to the end surface on at least one of the main surface and the side surface of the component body. 3. The ceramic electronic component according to claim 1, wherein an edge of the external electrode is provided so as to expose an edge of the glass layer.
  4. 　前記部品本体の前記端面から前記ガラス層の前記端縁までの距離は、前記部品本体の前記１対の端面間の距離の１／４倍～１／２倍の範囲にある、請求項３に記載のセラミック電子部品。 The distance from the end surface of the component body to the edge of the glass layer is in a range of ¼ to ½ times the distance between the pair of end surfaces of the component body. The ceramic electronic component described.
  5. 　前記ガラス領域は、前記部品本体の前記主面および前記側面の少なくとも一方上における前記端面に隣接する領域に、前記外部電極の一部を形成するため、導電性金属粉末と酸化ケイ素を含むガラスフリットとを含む導電性ペーストを付与し、焼き付けることによって、前記導電性ペーストから染み出したガラス成分によって与えられる、請求項１または２に記載のセラミック電子部品。 The glass region is a glass frit containing conductive metal powder and silicon oxide for forming a part of the external electrode in a region adjacent to the end surface on at least one of the main surface and the side surface of the component body. The ceramic electronic component according to claim 1, wherein the ceramic electronic component is provided by a glass component exuded from the conductive paste by applying and baking a conductive paste including:
  6. 　前記外部電極の前記端縁の位置から測定した前記ガラス領域の端縁までの距離は、前記部品本体の前記端面から前記外部電極の前記端縁までの距離の１／１０倍～１倍の範囲にある、請求項５に記載のセラミック電子部品。 The distance from the position of the edge of the external electrode to the edge of the glass region is in the range of 1/10 to 1 times the distance from the end surface of the component body to the edge of the external electrode. The ceramic electronic component according to claim 5.
  7. 　前記部品本体は、積層された複数のセラミック層および前記セラミック層間の界面に沿って配置された内部電極を含み、前記内部電極の端部が前記端面に露出しており、前記外部電極は、前記部品本体の前記端面に露出した前記内部電極の端部に接続されている、請求項１ないし６のいずれかに記載のセラミック電子部品。 The component main body includes a plurality of laminated ceramic layers and an internal electrode disposed along an interface between the ceramic layers, and an end portion of the internal electrode is exposed at the end surface, and the external electrode is The ceramic electronic component according to any one of claims 1 to 6, wherein the ceramic electronic component is connected to an end portion of the internal electrode exposed at the end face of the component main body.
PCT/JP2012/082787 2012-01-19 2012-12-18 Ceramic electronic component WO2013108533A1 (en)

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