WO2013102311A1 - 功分移相器 - Google Patents

功分移相器 Download PDF

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Publication number
WO2013102311A1
WO2013102311A1 PCT/CN2012/070334 CN2012070334W WO2013102311A1 WO 2013102311 A1 WO2013102311 A1 WO 2013102311A1 CN 2012070334 W CN2012070334 W CN 2012070334W WO 2013102311 A1 WO2013102311 A1 WO 2013102311A1
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WO
WIPO (PCT)
Prior art keywords
phase shifter
power split
power
loading
output
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Application number
PCT/CN2012/070334
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English (en)
French (fr)
Inventor
朱旗
邢红兵
Original Assignee
镇江中安通信科技有限公司
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Application filed by 镇江中安通信科技有限公司 filed Critical 镇江中安通信科技有限公司
Priority to US13/984,017 priority Critical patent/US20140285282A1/en
Publication of WO2013102311A1 publication Critical patent/WO2013102311A1/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/18—Phase-shifters
    • H01P1/184—Strip line phase-shifters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/12—Coupling devices having more than two ports
    • H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port

Definitions

  • the invention belongs to the field of phased array feeding networks, and particularly relates to an integrated design of feeding and phase shifting functions, in particular to a power splitting phase shifter. Background technique
  • the phased array design includes the power division network, phase shifter and its control circuit design.
  • the integration complexity, system loss, and manufacturing cost of these devices and circuits are issues that must be considered in the design.
  • phase of each sub-array internal unit is the same. This is actually a phase imaginary technique. . In this way, it is also possible to overlap or cross the individual sub-arrays, thereby reducing the number of phase shifters, but this method leads to a decrease in gain of the antenna array and an increase in sidelobes.
  • the phased array network includes multiple 3dB directional couplers, amplifiers, power combiners and two phase shifters. Stepped phase and output with a specific amplitude distribution can be achieved by controlling the phase shifter and amplifier. Display However, a large number of 3dB directional couplers, amplifiers, and power combiners are used, and the circuit structure also makes the circuit structure complicated and low power efficiency.
  • each output requires an independent phase shifter to control the phase.
  • the phase shifter is used in a large amount, resulting in a complicated circuit structure, large volume and large insertion loss. Integrating the power splitter and phase shifter to avoid the use of phase shifters is an effective way to reduce system complexity and system loss. So far, there has been no report on the integrated design method of power splitter and phase shifter. . Summary of the invention
  • the object of the present invention is to solve the problems of large volume, large loss, complicated circuit structure, etc. caused by separate design and integration of the power splitter and the phase shifter in the existing phased array feed network, and a compact and simultaneous work is proposed.
  • a power split phase shifter that is divided into phase shifting functions.
  • a power split phase shifter which is a hybrid ring structure composed of a power split loop and two coupling loops, wherein the input end of the power split loop is used as an input of a power split phase shifter, and the output of the power split loop is connected to two a parallel coupling loop, the output end of the coupling loop is used as an output of the power split phase shifter, and the power split loop is provided with a plurality of corresponding loading branches for controlling a plurality of output states, respectively
  • a switch is provided to control the power branch and the equal phase signal output of each state through the switch control corresponding loading branch.
  • the power split phase shifter of the present invention is designed on a PCB board; the PCB is a first conductor layer, a dielectric layer and a second conductor layer from top to bottom, and the dielectric constant of the dielectric layer located in the middle is greater than 1, second The conductor layer is ground, and the first conductor layer is a microstrip circuit, that is, a power splitter.
  • the first conductor layer and the second conductor layer of the PCB of the present invention are conductor copper having a thickness of 0.001 - 0.1 mm and a dielectric layer having a thickness of 0.127 mm - 1 mm.
  • the magnitude of the difference phase phase difference corresponding to each state of the present invention depends on the electrical length of the loading branch corresponding to the state.
  • the number of loading branches of the present invention is equal to the number of states of the power split phase shifter, and when the number of states of the power splitting phase shifter is even, the plurality of loading branches are symmetrically mounted on both sides of the power dividing ring.
  • Symmetrical mounting on both sides of the power dividing ring is based on design ideas: due to structural symmetry, symmetrically installing the same length of the branch is actually can be realised With the same equal-amplitude and reverse-equivalent phase outputs, the phase change of adjacent output ports can be achieved by switching the two states of symmetrically loaded segments of the same length while maintaining the amplitude.
  • the number of states of the power splitter of the present invention is four, and four load branches are symmetrically mounted on both sides of the power split ring, and the lengths of the load branches on the same side of the power split ring are different, and the length difference between the two is determined.
  • the variation of the output of the difference phase, the length of the loaded short branch is 0.5 ⁇ 1.5mm, and the length of the loaded long branch is 3-4mm.
  • Each state corresponds to loading a branch, forming a phase difference of the phase distribution, such as setting the equivalence phase to thetal, loading another branch is also forming an equidistant phase distribution, setting the equivalence phase to theta2, just the difference
  • the value of the phase is different, then the difference in length between the two branches determines the difference in the phase of the difference between the two states, ie theta2-thetal
  • the phase difference of the adjacent output ports is 0° to 20°.
  • the line width of the loading branch of the present invention is 0.2 to 0.6 mm, and the distance between any two loading branches on the same side is less than 2 mm.
  • the line widths of the input line and the output line of the power splitter of the present invention are both 0.4 to 1.2 mm.
  • the distance between the switch on each loading branch and the power dividing ring is 1.4 to 1.8 mm.
  • the invention is based on the nonlinear dispersion characteristic after the transmission line is loaded, and on a microstrip structure with a power division function, the power distribution and the isophase signal output are realized by the switch control loading branch.
  • the magnitude of the phase difference depends on the electrical length of the loading branch.
  • the power split phase shifter has a compact structure and functions as both a power split and a phase shift.
  • FIG. 1 is a perspective view showing the structure of a power split phase shifter of the present invention
  • FIG. 2 is a side view showing the structure of the power split phase shifter of the present invention.
  • Fig. 3 is a top plan view showing the structure of the power split phase shifter of the present invention.
  • FIG. 4 is a schematic diagram of scattering parameters of the first working state of the first embodiment of the power split phase shifter of the present invention.
  • FIG. 5 is a schematic diagram showing the phase of the scattering parameter S ( 2, 1 ) of the first working state of the first embodiment of the power split phase shifter of the present invention.
  • FIG. 6 is a schematic diagram of scattering parameters of the second working state of Embodiment 1 of the power split phase shifter of the present invention.
  • FIG. 7 is a schematic diagram showing the phase of the scattering parameter S (2, 1 ) in the second working state of the first embodiment of the power splitter of the present invention.
  • FIG. 8 is a schematic diagram of scattering parameters of the third working state of Embodiment 1 of the power split phase shifter of the present invention.
  • Figure 9 is a schematic diagram showing the phase of the scattering parameter S (2, 1 ) in the third operational state of the first embodiment of the power split phase shifter of the present invention.
  • Fig. 10 is a schematic view showing the scattering parameter S of the fourth operational state of the first embodiment of the power splitter of the present invention.
  • Figure 11 is a schematic diagram showing the phase of the scattering parameter S ( 2, 1 ) in the fourth operational state of the first embodiment of the power split phase shifter of the present invention. detailed description
  • a power split phase shifter is a hybrid loop structure composed of a power split loop and two coupling loops, and the input end of the power split loop is used as an input of a power split phase shifter.
  • the output of the divided loop is connected to two parallel coupling loops, and the output end of the coupling loop is used as an output of the power split phase shifter, and the power split loop is provided with a plurality of corresponding loading branches 14 for controlling a plurality of output states.
  • Each of the loading branches 14 is respectively provided with a switch 15 for controlling the corresponding loading section 14 to realize the power division and the equal phase signal output of each state through the switch 15.
  • the power splitter of the present invention is designed on a PCB; the PCB is a first conductor layer 16, a dielectric layer 17, and a second conductor layer 18 from top to bottom, and a dielectric layer in the middle.
  • the dielectric constant of 17 is greater than 1
  • the second conductor layer 18 is ground
  • the first conductor layer 16 is a microstrip circuit, that is, a power splitter.
  • the first conductor layer 16 and the second conductor layer 18 of the PCB are conductor copper having a thickness of 0.004 mm
  • the dielectric layer 17 has a thickness of 0.127 mm to 1 mm.
  • the magnitude of the difference phase phase difference corresponding to each state of the present invention depends on the electrical length of the load branch 14 corresponding to the state.
  • the number of loading branches 14 is equal to the number of states of the power split phase shifter. When the number of states of the power splitting phase shifter is even, the plurality of loading branches 14 are symmetrically mounted on both sides of the power dividing ring. (Because the number of digital phase shift states is even, we design an even number of states here.
  • Symmetrically mounted on the power divider The two sides are based on the design idea: Due to the structural symmetry, symmetrically installing the same length of the branch can actually achieve the same equal amplitude and reversed equal phase output, then symmetrically load two of the same length of the branch The state switching can achieve the phase difference change of the adjacent output ports while keeping the amplitude unchanged.
  • the length difference between adjacent two loading branches 14 on the same side is 0 ⁇ 4mm
  • the phase difference variation of adjacent output ports is 0°-20°.
  • the line width of the loading branch 14 is 0.2-0.6 mm, and the distance between any two loading branches 14 on the same side is less than 2 mm.
  • the line widths of the input line 1 and the output line 2-5 of the power splitter of the present invention are both 0.4 to 1.2 mm.
  • the distance between the switch 15 and the power dividing ring on each loading branch 14 is 1.4 to 1.8 mm.
  • the left-hand microstrip transmission line phase shifter is designed on the PCB board, using Rogers RT/Duroid 5880 dielectric substrate; the first and third layers of the PCB are conductor copper, and the thickness is ( 0.004 mm), the third layer of metal constitutes the ground 1 of the left-hand transmission line, and the intermediate layer is the dielectric layer 2 having a dielectric constant of 2.2, and has a thickness of 0.254 mm.
  • 1 is the input port
  • 2, 3, 4, 5 are the output ports
  • the line width is 0.78mm.
  • the number of states of the power split phase shifter is four.
  • the four load branches 14 are symmetrically mounted on both sides of the power split ring, and the lengths of the load branches on the same side of the power split ring are different, and the length difference between the two is determined.
  • the phase difference of the output is determined.
  • the wide side of the power dividing ring 6 and 7 has a line width of 0.78 mm, and the long side of the power dividing ring is 11 and 12, that is, the wide side 6 and the distance of 7 is 6.22 mm.
  • the wide sides of the coupling loops 8, 9, 10 have a line width of 0.6 mm; the long sides of the coupling loop are wide sides 8 and 9, and the wide sides 9 and 10 have a distance of 3.22.
  • the line width of the long side 11 of the power dividing ring is 1.00 mm
  • the line width of the long side 12 of the power dividing ring is 1.10 mm
  • the length of the long side of the two coupling rings is 0.78 mm
  • the long sides of the power dividing ring are 11 and 12
  • the length of the wide sides 6, 7 of the power split ring is 5.4 mm
  • the length of the wide sides 8, 9, 10 of the coupling ring that is, the long sides 12 and 13 of the coupling ring are 3.1 mm apart.
  • the length of the short branch is 0.8 mm, and the length of the loaded long branch is 3.5 mm. Load symmetrically on both sides of the splitter. The end of the long branch is loaded 5.2 mm from the splitter, and the end of the short branch is loaded 2.6 mm from the splitter. The distance between the switch 15 and the power divider is 1.6 mm. Adjusting the length of the output transmission line in the structure allows the first working state to achieve equal amplitude and phase output, and the remaining states to achieve equal amplitude phase shift State phase shift amount switch 1 switch 2 switch 3 switch 4
  • Table 1 (0 means disconnected, 1 means closed)
  • the electrical performance that can be achieved by this implementation is: center frequency 10 GHz, working bandwidth 9.7 ⁇ 10.5 GHz, Table 1 is four working states
  • Figure 1 to Figure 3 are structural Stereoscopic, side and top views
  • Figures 4 and 5 show the first state achieving equal amplitude in-phase output
  • Figures 6 and 7 show the second state achieving equal amplitude and 11.25° equal phase output
  • Figure 8 and Figure 9. Indicates that the second state achieves equal amplitude and 22.5 Q equal phase output.
  • Figures 10 and 11 show the second state achieving equal amplitude and 33.5 Q equal phase output.

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Abstract

一种功分移相器，它为一个功分环和两个耦合环构成的混合环结构，所述的功分环的输入端作为功分移相器的输入，功分环的输出连接两个并联的耦合环，耦合环的输出端作为功分移相器的输出，所述的功分环上设有用于控制多个输出状态的多个对应的加载支节（14），各加载支节（14）上分别设有一开关（15），通过开关（15）控制对应加载支节（14）实现各状态的功分与等差相位信号输出。本发明基于传输线加载支节后的非线性色散特性，在一种具有功分功能的微带结构上，通过开关控制加载支节实现功分与等差相位信号输出。等差相位的大小取决于加载支节的电长度。该功分移相器的结构紧凑，同时兼有功分与移相的功能。

Description

功分移相器 技术领域
本发明属于相控阵馈电网络领域，特别涉及馈电与移相功能的一体化设计, 具体地说是一种功分移相器。 背景技术
相控阵设计中包括功分网络、 移相器及其控制电路设计。这些器件及电路 的集成复杂度、 系统损耗和制造成本是设计必须考虑的问题。
有源相控阵中采用的 T/R (收 /发模块)组件中的放大器效率较低， 固态移相 器的插损较大， 使得有源相控阵在很多领域应用受限。 因此， 减少移相器数量 进而降低系统损耗在相控阵领域应用备受关注。
2003年 Abbas Abbaspour-Tamijani和 Kamal Sarabandi在美国电气和电子工 程师学会天线与传播期刊 2003年 9月第九期（2193— 2202页）发表了论文"一 种利用交叠平面子阵构成的低成本毫米波波束扫描天线" （" An Affordable Millimeter-wave Beam-Steerable Antenna Using Interleaved Planar Subarrays, " IEEE Transaction on Antennas Propagation, vol.51, no.9,pp.2193-2202,Sep.2003 )。 论文中将天线阵列划分为多个天线子阵的组合，每个子阵只用一个移相器控制 馈电相位，每个子阵内部单元的相位是相同的，这实际上是一种相位虚位技术。 基于这种方式还可以将各个子阵重叠或者交叉， 从而减少移相器数量， 但这种 方法会带来天线阵列增益下降和副瓣升高。
2010年 D.Ehyaie和 A.Mortazawi在美国电气和电子工程师学会微波理论 与技术国际会议上发表了论文"一种低成本、低复杂度相控阵的设计方法 "（"A new approach to design low cost, low complexity phased arrays, " 2010 IEEE MTT-S International, pp.l270-1273,2010)。 论文提出了一种新的相控阵设计方 法， 该相控阵网络包括有多个 3dB定向耦合器、放大器、功率合成器和两个移 相器。通过控制移相器和放大器即可实现步进相位和特定幅度分布的输出。显 然， 大量使用 3dB定向耦合器、 放大器、 功率合成器， 电路结构同样使得电路 结构复杂和低功率效率。
无源相控阵中， 通常每一路输出都需要独立的一组移相器控制相位， 当移 相器位数又较多时大量使用移相器导致系统电路结构复杂、 体积和插损较大。 将功分器和移相器一体化设计从而避免大量使用移相器是一种降低系统复杂 性和系统损耗的有效方法，至今还未见有关功分器与移相器一体化设计方法的 报道。 发明内容
本发明的目的是针对现有的相控阵馈电网络中功分器与移相器单独设计 然后集成带来的体积大， 损耗大， 电路结构复杂等问题， 提出一种结构紧凑同 时兼有功分与移相功能的功分移相器。
本发明的技术方案是：
一种功分移相器， 它为一个功分环和两个耦合环构成的混合环结构， 所述 的功分环的输入端作为功分移相器的输入，功分环的输出连接两个并联的耦合 环， 耦合环的输出端作为功分移相器的输出， 所述的功分环上设有用于控制多 个输出状态的多个对应的加载支节， 各加载支节上分别设有一开关， 通过开关 控制对应加载支节实现各状态的功分与等差相位信号输出。
本发明的功分移相器是在 PCB板上设计的； PCB从上至下依次为第一导 体层、 介质层和第二导体层， 位于中间的介质层的介电常数大于 1， 第二导体 层为地， 第一导体层为微带电路即功分移相器。
本发明的 PCB 的第一导体层和第二导体层为导体铜， 厚度为 0.001-O.Olmm, 介质层的厚度为 0.127mm~lmm。
本发明的各状态对应的等差相位相位差的大小取决于与状态对应的加载 支节的电长度。
本发明的加载支节的个数与功分移相器的状态数相等，功分移相器的状态 数为偶数时， 多个加载支节对称的安装在功分环的两侧。 （因为数字式移相状 态数为偶数， 所以这里我们设计成偶数个状态。对称安装在功分环的两侧是根 据设计思想而来： 由于结构对称性， 对称安装相同长度的支节实际上可以实现 相同的等幅与反向的等差相位输出，那么在对称加载相同长度支节的两个状态 的切换即可实现相邻输出端口的相差变化， 同时保持幅度不变。）
本发明的功分移相器的状态数为四， 四个加载支节对称的安装在功分环的 两侧， 位于功分环同一侧的加载支节的长度不同， 二者的长度差决定了输出的 等差相位的变化量， 加载短支节的长度为 0.5~1.5mm， 加载长支节的长度为 3-4mm。 （每个状态对应加载一个支节， 形成一定相位的等差相位分布， 如设 等差相位为 thetal , 加载另一个支节是也是形成等差相位分布， 设等差相位为 theta2 , 只是等差相位的值不同， 那么着两个支节的长度差决定了两个状态的 等差相位的差值， 即 theta2- thetal )
本发明中， 当同一侧的相邻两个加载支节长度差为 0~4mm时， 相邻输出 端口的相位差为 0° ~ 20° 。
本发明的加载支节的线宽均为 0.2~0.6mm， 位于同一侧的任意两加载支节 的距离小于 2mm。
本发明的功分移相器的输入线、 输出线的线宽均为 0.4~1.2mm。
本发明中， 各加载支节上的开关与功分环的距离均为 1.4~1.8mm。
本发明的有益效果：
本发明基于传输线加载支节后的非线性色散特性，在一种具有功分功能的 微带结构上， 通过开关控制加载支节实现功分与等差相位信号输出。等差相位 的大小取决于加载支节的电长度。 该功分移相器的结构紧凑， 同时兼有功分与 移相的功能。 附图说明
图 1为本发明功分移相器的 ；施例 1结构立体示意图。
图 2为本发明功分移相器的 ；施例 1结构侧视示意图。
图 3为本发明功分移相器的 ；施例 1结构俯视示意图。
图 4为本发明功分移相器的 ；施例 1第一个工作状态的散射参数示意图。 图 5为本发明功分移相器的 ；施例 1第一个工作状态的散射参数 S ( 2， 1 ) 相位示意图。 图 6为本发明功分移相器的实施例 1第二个工作状态的散射参数示意图。 图 7为本发明功分移相器的实施例 1第二个工作状态的散射参数 S (2， 1 ) 相位示意图。
图 8为本发明功分移相器的实施例 1第三个工作状态的散射参数示意图。 图 9为本发明功分移相器的实施例 1第三个工作状态的散射参数 S (2， 1 ) 相位示意图。
图 10为本发明功分移相器的实施例 1第四个工作状态的散射参数 S示意 图。
图 11为本发明功分移相器的实施例 1第四个工作状态的散射参数 S ( 2， 1 ) 相位示意图。 具体实施方式
下面结合附图和实施例对本发明作进一步的说明。
如图 1所示， 一种功分移相器， 它为一个功分环和两个耦合环构成的混合 环结构， 所述的功分环的输入端作为功分移相器的输入， 功分环的输出连接两 个并联的耦合环， 耦合环的输出端作为功分移相器的输出， 所述的功分环上设 有用于控制多个输出状态的多个对应的加载支节 14， 各加载支节 14上分别设 有一开关 15，通过开关 15控制对应加载支节 14实现各状态的功分与等差相位 信号输出。
如图 2所示， 本发明的功分移相器是在 PCB板上设计的； PCB从上至下 依次为第一导体层 16、 介质层 17和第二导体层 18， 位于中间的介质层 17的 介电常数大于 1， 第二导体层 18为地， 第一导体层 16为微带电路即功分移相 器。 PCB的第一导体层 16和第二导体层 18为导体铜， 厚度为 0.004mm， 介质 层 17的厚度为 0.127mm~lmm。
本发明的各状态对应的等差相位相位差的大小取决于与状态对应的加载 支节 14的电长度。加载支节 14的个数与功分移相器的状态数相等， 功分移相 器的状态数为偶数时， 多个加载支节 14对称的安装在功分环的两侧。 （因为数 字式移相状态数为偶数， 所以这里我们设计成偶数个状态。对称安装在功分环 的两侧是根据设计思想而来： 由于结构对称性， 对称安装相同长度的支节实际 上可以实现相同的等幅与反向的等差相位输出，那么在对称加载相同长度支节 的两个状态的切换即可实现相邻输出端口的相差变化， 同时保持幅度不变。 ） 当同一侧的相邻两个加载支节 14长度差为 0~4mm时，相邻输出端口的相位差 变化量为 0° ~20° 。 加载支节 14的线宽均为 0.2~0.6mm， 位于同一侧的任意 两加载支节 14的距离小于 2mm。
本发明的功分移相器的输入线 1、 输出线 2-5的线宽均为 0.4~1.2mm。 本发明中， 各加载支节 14上的开关 15与功分环的距离均为 1.4~1.8mm。 实施例一
如图 1、 2、 3所示， 左手微带传输线移相器是在 PCB板上设计的， 采用 Rogers RT/Duroid 5880介质基板； PCB的第一层、 第三层为导体铜， 厚度为 (0.004mm), 由第三层的金属构成左手传输线的地 1， 中间层为介电常数 2.2的 介质层 2， 厚度为 0.254mm。 1为输入端口， 2、 3、 4、 5为输出端口， 线宽均 为 0.78mm。
功分移相器的状态数以四为例， 四个加载支节 14对称的安装在功分环的 两侧， 位于功分环同一侧的加载支节的长度不同， 二者的长度差决定了输出的 相位差。
功分环的宽边 6、 7的线宽 0.78mm， 功分环的长边 11、 12长度即宽边 6、 7的距离为 6.22mm。 耦合环的宽边 8、 9、 10的线宽 0.6mm; 耦合环的长边长 度即宽边 8与 9， 宽边 9与 10距离为 3.22。
功分环的长边 11的线宽为 1.00mm, 功分环的长边 12的线宽为 1.10mm, 两耦合环的长边 13线宽为 0.78mm;功分环的长边 11与 12距离即功分环的宽 边 6、 7的长度为 5.4mm， 耦合环的宽边 8、 9、 10的长度即耦合环的长边 12 与 13距离 3.1mm。
加载短支节的长度为 0.8mm， 加载长支节的长度为 3.5mm。在功分器两侧 对称加载。 加载长支节的末端距功分器 5.2mm, 加载短支节的末端距功分器 2.6mm。 开关 15与功分器距离均为 1.6mm。 调节结构中的输出传输线的长度 可以使得第一个工作状态实现等幅同相位输出，其余状态实现等幅等差相位输 状态 相移量 开关 1 开关 2 开关 3 开关 4
II 0° 1 0 0 0
III 11.25° 0 1 0 0
IIII 22.5° 0 0 1 0
IV 33.75° 0 0 0 1
表一 (0表示断开， 1表示闭合） 该具体实施所能实现的电气性能为： 中心频率 10GHz , 工作带宽 9.7~10.5GHz, 表一是四个工作状态， 图 1至图三是结构的立体、 侧视与俯视 图， 图 4与图 5表示第一个状态实现等幅同相位输出， 图 6与图 7表示第二个 状态实现等幅与 11.25°等差相位输出， 图 8与图 9表示第二个状态实现等幅与 22.5Q等差相位输出， 图 10与图 11表示第二个状态实现等幅与 33.5Q等差相位 输出。
本发明未涉及部分均与现有技术相同或可采用现有技术加以实现。

Claims

权利要求书
1、一种功分移相器，其特征是它为一个功分环和两个耦合环构成的混合环结构， 所述的功分环的输入端作为功分移相器的输入， 功分环的输出连接两个并联的 耦合环， 耦合环的输出端作为功分移相器的输出， 所述的功分环上设有用于控 制多个输出状态的多个对应的加载支节 （14)， 各加载支节 （14 ) 上分别设有一 开关 （15 )， 通过开关 （15 ) 控制对应加载支节 （14 ) 实现各状态的功分与等差 相位信号输出。
2、 根据权利要求 1 所述的功分移相器， 其特征是所述的功分移相器是在 PCB 板上设计的； PCB从上至下依次为第一导体层 （16)、 介质层 （17 )和第二导体 层 （18 )， 位于中间的介质层 （17 ) 的介电常数大于 1， 第二导体层 （18 ) 为地， 第一导体层 （16 ) 为微带电路即功分移相器。
3、根据权利要求 2所述的功分移相器，其特征是所述的 PCB的第一导体层（16) 和第二导体层 （18 ) 为导体铜， 厚度为 0.001~0.01mm， 介质层 （17 ) 的厚度为 0.127mm~lmm。
4、 根据权利要求 1所述的功分移相器， 其特征是所述的各状态对应的等差相位 相位差的大小取决于与状态对应的加载支节 （14) 的电长度。
5、 根据权利要求 1所述的功分移相器， 其特征是所述的加载支节 （14 ) 的个数 与功分移相器的状态数相等，功分移相器的状态数为偶数时，多个加载支节（14 ) 对称的安装在功分环的两侧。
6、 根据权利要求 5所述的功分移相器， 其特征是所述的功分移相器的状态数为 四， 四个加载支节 （14 ) 对称的安装在功分环的两侧， 位于功分环同一侧的加 载支节的长度不同， 二者的长度差决定了相应两个状态的输出的等差相位的变 化量， 加载短支节的长度为 0.5~1.5mm， 加载长支节的长度为 3-4mm。
7、 根据权利要求 5或 6所述的功分移相器， 其特征是当同一侧的相邻两个加载 支节 （14 ) 长度差为 0~4mm时， 相邻输出端口的等差相位变化量为 0° ~20° 。
8、 根据权利要求 6所述的功分移相器， 其特征是所述的加载支节 （14 ) 的线宽 均为 0.2~0.6mm， 位于同一侧的任意两加载支节 （14 ) 的距离小于 2mm。
9、根据权利要求 1所述的功分移相器，其特征是所述的功分移相器的输入线（1 )、 输出线 （2-5) 的线宽均为 0.4~1.2mm。
10、 根据权利要求 1 所述的功分移相器， 其特征是各加载支节 （14) 上的开关 (15) 与功分环的距离均为 1.4~1.8mm。
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