WO2013061603A1 - Circuit device manufacturing method - Google Patents

Circuit device manufacturing method Download PDF

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Publication number
WO2013061603A1
WO2013061603A1 PCT/JP2012/006873 JP2012006873W WO2013061603A1 WO 2013061603 A1 WO2013061603 A1 WO 2013061603A1 JP 2012006873 W JP2012006873 W JP 2012006873W WO 2013061603 A1 WO2013061603 A1 WO 2013061603A1
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WO
WIPO (PCT)
Prior art keywords
sealing resin
resin
circuit board
mold
sealing
Prior art date
Application number
PCT/JP2012/006873
Other languages
French (fr)
Japanese (ja)
Inventor
英行 坂本
安藤　守
Original Assignee
セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー
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Application filed by セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー filed Critical セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー
Publication of WO2013061603A1 publication Critical patent/WO2013061603A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present invention relates to a method for manufacturing a circuit device in which a circuit board having a circuit element incorporated on an upper surface is resin-sealed.
  • the hybrid integrated circuit formed on the upper surface of the circuit board is accommodated in the hollow part of the case material by fitting the lid-like case material provided with the hollow part to the circuit board.
  • the hybrid integrated circuit formed on the upper surface of the circuit board is covered by injection molding using a mold.
  • FIG. 8A the configuration of the resin-encapsulated hybrid integrated circuit device 100 will be described.
  • the hybrid integrated circuit 100 first, the upper surface of the circuit board 101 made of a metal such as aluminum is entirely covered with the insulating layer 102.
  • a circuit element is connected to the conductive pattern 103 formed on the upper surface of the insulating layer 102 to constitute a predetermined hybrid integrated circuit.
  • a semiconductor element 105A and a chip element 105B connected by a thin metal wire 107 are illustrated.
  • a lead 104 is fixed to the pad-like conductive pattern 103 at the end of the circuit board 101.
  • the sealing resin 106 is a thermoplastic resin and covers the upper surface, side surfaces, and lower surface of the circuit board 101.
  • a sealing resin 106 that covers the lower surface of the circuit board 101 is used. Thinning is effective.
  • the thickness of the sealing resin 106 that covers the lower surface of the circuit board 101 is set to be as thin as, for example, about 0.5 mm, there arises a problem that the lower surface of the circuit board 101 is not partially covered with the sealing resin 106. This is because the gap between the lower surface of the circuit board 101 and the lower surface of the inner wall of the mold is narrowed in the step of injection molding the sealing resin 106 using a mold, and the sealing resin does not sufficiently reach the gap. Because.
  • the injection molding is performed with the support member 110 supporting the circuit board 101 from the lower surface.
  • the support member 110 is made of a thermoplastic resin, and the inner surface has a size that contacts the lower surface and part of the side surface of the circuit board 101.
  • the outer surface of the support member 110 is in contact with the inner wall lower surface and side surfaces of the mold 112. Therefore, when the circuit board 101 supported by the support member 110 is stored in the cavity 114 of the mold 112, the support member 110 is positioned in the gap between the lower surface of the circuit board 101 and the lower surface of the inner wall of the mold 112.
  • the circuit board 101 is resin-sealed by injecting a thermoplastic resin into the cavity 114.
  • a thermoplastic resin into the cavity 114.
  • the support member 110 since the support member 110 is located in the gap between the lower surface of the circuit board 101 and the lower surface of the inner wall of the mold 112, it is not necessary to inject liquid thermosetting resin into the gap. Generation of voids due to the lower surface of 101 not being partially covered is prevented.
  • a potting resin 120 is formed on the upper surface of the circuit board 101 so as to cover the circuit elements in order to protect the fine metal wires and the like from the injection pressure during resin sealing.
  • the lower surface of the circuit board 22 can be thinly resin-sealed by melting the resin sheet 52 disposed on the lower surface of the circuit board 22.
  • a resin sheet 52 formed by tableting a resin material is placed in the lower mold 44, and the circuit board 22 is placed on the upper surface of the resin sheet 52.
  • the lower surface of the circuit board 22 is thinly covered with the resin sheet 52 heated and melted by the lower mold 44.
  • the lower surface of the circuit board 22 can be thinly resin-sealed without generating voids.
  • Patent Document 3 a technique for resin-sealing a circuit element by a plurality of resin molds is described in Patent Document 3 below.
  • the semiconductor chip 103 is covered with a first mold resin 116, and the first mold resin 116 and the heat sink 101 are further covered with a second mold resin 11. is doing.
  • the circuit board is entirely made of resin by a resin sheet prepared on the lower surface of the circuit board and a mold resin injected into the cavity where the circuit board is arranged. Sealed.
  • the present invention has been made in view of the above-mentioned problems, and an object of the present invention is to realize a resin sealing process for thinly resin-sealing the back surface of a circuit board in which circuit elements are incorporated on the upper surface at a low cost. Another object of the present invention is to provide a method for manufacturing a circuit device.
  • a substrate having circuit elements mounted on the upper surface thereof is housed in a first mold, and the lower surface of the substrate is brought into contact with the inner wall of the first mold to seal the substrate.
  • a first step of sealing with a sealing resin; and a substrate sealed with the first sealing resin is housed in a second mold, and the first sealing resin is sandwiched between the first sealing resin and the first sealing resin.
  • a second step of sealing with two sealing resins is also be used in the first sealing resin.
  • the first resin sealing is performed with the lower surface of the circuit board in contact with the first mold, and the lower surface of the circuit board is removed by the second resin sealing using the second mold. Resin sealed.
  • the second resin sealing is a process specialized in mainly covering the lower surface of the circuit board, so that the lower surface of the circuit board can be thinly resin-sealed without voids.
  • the upper surface of the first sealing resin formed in the first resin sealing step is brought into contact with the inner wall of the second mold, thereby The position is fixed. This makes it possible to stably perform the second resin sealing step.
  • (A) is a perspective view which shows the 1st sealing resin shape
  • FIG. 1A is a perspective view of the hybrid integrated circuit device 10
  • FIG. 1B is a cross-sectional view taken along line BB ′ of FIG. 1A
  • FIG. 1C is CC ′. It is sectional drawing in a line.
  • a hybrid integrated circuit composed of a conductive pattern 22 and circuit elements is incorporated on the upper surface of the circuit board 14, and leads 24 electrically connected to the circuit are led out to the outside. Furthermore, the hybrid integrated circuit constructed on the upper surface of the circuit board 14, and the upper surface, side surfaces, and lower surface of the circuit board 14 are integrally covered with a sealing resin 16 made of a thermosetting resin.
  • a material other than metal may be employed as the material of the circuit board 14, and for example, ceramic or resin material may be employed as the material of the circuit board 14.
  • the insulating layer 26 is made of an epoxy resin highly filled with a filler, and is formed so as to cover the entire surface of the circuit board 14.
  • the conductive pattern 22 is made of a metal film such as copper having a thickness of about 50 ⁇ m, and is formed on the surface of the insulating layer 26 so as to realize a predetermined electric circuit. A pad made of the conductive pattern 22 is formed on the side from which the lead 24 is led out.
  • the semiconductor element 28 and the chip element 30 are fixed to predetermined portions of the conductive pattern 22 via a bonding material such as solder.
  • a bonding material such as solder.
  • the semiconductor element 28 a transistor, an LSI chip, a diode, or the like is employed.
  • the semiconductor element 28 and the conductive pattern 22 are connected via a thin metal wire 34.
  • the chip element 30 a chip resistor, a chip capacitor, or the like is employed, and electrodes at both ends are fixed to the conductive pattern 22 via a bonding material such as solder.
  • the semiconductor element 28 is a power element that emits a large amount of heat
  • the semiconductor element 28 is fixed to the upper surface of the circuit board 14 via a heat sink made of a metal piece having a thickness of about several millimeters.
  • the lead 24 is fixed to a pad provided in the peripheral portion of the circuit board 14 and functions as an external connection terminal through which an input signal and an output signal pass. Referring to FIG. 1B, a large number of leads 24 are provided along two opposing sides of the circuit board 14, but the leads 24 are arranged along one side or four sides. May be.
  • the sealing resin 16 is formed by transfer molding using a thermosetting resin.
  • the sealing resin 16 is formed by a plurality of transfer moldings.
  • FIG. 1B the conductive pattern 22, the semiconductor element 28, the chip element 30, and the fine metal wire 34 are sealed with the sealing resin 16. Further, the upper surface, the side surface, and the lower surface of the circuit board 14 are covered with the sealing resin 16.
  • fixed part 19 is provided in the side surface intermediate part of the sealing resin 16 which opposes the left-right direction on a paper surface.
  • the fixing portion 19 is a portion in which the side surface of the sealing resin 16 is recessed inward in a substantially semicircular shape in plan view, and a fixing means such as a screw is disposed in this portion, so that the lower surface of the sealing resin 16 Is brought into contact with a heat sink such as a heat sink.
  • the sealing resin 16 will be further described with reference to FIG. First, as for the appearance of the sealing resin 16, the lower surface and side surfaces are made of the second sealing resin 20, the peripheral portion of the upper surface is made of the second sealing resin 20, and the first sealing resin 18 is exposed on the other upper surfaces. It becomes the surface to do.
  • the first sealing resin 18 covers the circuit element and the circuit board 14 with the lower surface of the circuit board 14 exposed
  • the second sealing resin 20 is the lower surface of the circuit board 14 and the first sealing resin.
  • the side surfaces of 18 are sealed.
  • the interface between the first sealing resin 18 and the second sealing resin 20 can be a path through which moisture easily enters from the outside toward the circuit board 14, but this path is set longer by this configuration, so that the moisture resistance is improved. To do.
  • the first sealing resin 18 is formed by the first transfer molding, and covers the circuit elements such as the semiconductor elements 28, the connection portions of the leads 24, and the upper and side surfaces of the circuit board 14.
  • the first sealing resin 18 is made of a thermosetting resin such as an epoxy resin filled with a filler. Further, the lower surface of the circuit board 14 is basically not covered with the first sealing resin and exposed downward. The first sealing resin 18 does not cover the lower surface of the circuit board 14 that is a path of heat generated from the semiconductor element 28. Therefore, since high heat dissipation is not required, a resin material with low heat dissipation is used as the material of the first sealing resin 18.
  • the side surface of the first sealing resin 18 led out by the lead 24 is an inclined surface in which the lead-out portion of the lead 24 protrudes to the outside in consideration of releasability during resin sealing.
  • the lower surface of the circuit board 14 is not necessarily exposed downward from the first sealing resin 18, and the first sealing resin 18 such as a thin resin burr having a thickness of about several tens of ⁇ m is used to form the circuit board 14. The lower surface may be covered.
  • the second sealing resin 20 is formed by the second transfer molding, and covers the side surface and the lower surface of the first sealing resin and the lower surface of the circuit board 14. The thickness of the second sealing resin 20 is not uniform.
  • the thickness of the sealing resin 20 is set constant.
  • the thickness L1 of the second sealing resin 20 that covers the lower surfaces of the circuit board 14 and the first sealing resin 18 is, for example, not less than 0.1 mm and not more than 0.3 mm.
  • the resin sealing can be performed without voids by uniformly spreading the second sealing resin 20 over these portions in the resin sealing step. This matter will be described later with reference to FIG.
  • the second sealing resin that covers the side surface of the first sealing resin 18 on the side surface (the side surface facing in the left-right direction in FIG. 1A) from which the lead 24 is not led out.
  • the thickness L3 is, for example, about 5 mm, which is thicker than that in the case of FIG. This is because the fixing portion 19 shown in FIG.
  • the upper surface of the first sealing resin 18 is illustrated as being exposed from the second sealing resin 20, but a thin resin burr having a thickness of about several tens of ⁇ m is illustrated.
  • the upper surface of the first sealing resin 18 may be covered with the second sealing resin 20.
  • the side surface (boundary 36) of the first sealing resin 18 is an inclined surface in which the lower portion extends outward from the upper portion.
  • resin protrusions 12 are provided in which the lower surface of the first sealing resin 18 is protruded downward in a columnar shape.
  • the width of the resin protrusion 12 is about 2.0 mm, and the height is not less than 0.1 mm and not more than 0.3 mm, similar to the second sealing resin 20 that covers the lower surface of the circuit board 14.
  • the side surface of the resin protrusion 12 is covered with the second sealing resin 20, and the lower surface of the resin protrusion 12 is exposed downward from the second sealing resin 20 or is thinly covered with the second sealing resin 20.
  • the lower surface of the first sealing resin 18 is partially protruded downward to form the resin protrusion 12, and the side surface of the resin protrusion 12 is covered with the second sealing resin 20.
  • the stop resin 18 and the second sealing resin 20 fit well, and peeling of both is prevented.
  • the distance L4 between the resin protrusion 12 and the circuit board 14 is set to 0.5 mm or more, for example.
  • the side surface of the end portion of the circuit board 14 is a surface from which the metal material is exposed, and this portion is continuous with the outside via a boundary 36 between the first sealing resin 18 and the second sealing resin 20. Therefore, there is a possibility of short-circuiting with the outside via the boundary 36. In this embodiment, the risk of this short-circuit is reduced by separating the resin protrusion 12 from the end of the circuit board 14.
  • the resin projection 12 is not an essential component. If the gap below the circuit board 14 is secured by a configuration other than the resin projection 12 by a resin sealing method described later, the resin projection 12 Not formed.
  • the first sealing resin 18 and the second sealing resin 20 described above are a mixture of a resin material such as an epoxy resin, a filler, a curing accelerator, and the like.
  • the 1st sealing resin 18 and the 2nd sealing resin 20 may be comprised from the same material, and may be comprised from a different material.
  • the amount of filler contained in the second sealing resin 20 may be larger than the amount of filler contained in the first sealing resin 18.
  • the ratio of the filler contained in the second sealing resin 20 is 83 wt% or more and 87 wt% or less (for example, 85 wt%), and the ratio of the filler contained in the first sealing resin is 78 wt% or more. 82 wt% or less (for example, 80 wt%).
  • the 2nd sealing resin 20 contains a lot of fillers, the heat dissipation of the 2nd sealing resin 20 becomes favorable. Therefore, the heat generated by the operation of the circuit element such as the semiconductor element 28 is released to the outside through the circuit board 14 and the second sealing resin 20.
  • the frequency with which the hard filler collides with the circuit elements and the fine metal wires 34 during resin injection is reduced. Damage to circuit elements is suppressed.
  • the type of filler contained in the first sealing resin 18 and the type of filler contained in the second sealing resin 20 may be different.
  • alumina Al 2 O 3
  • silica SiO 2
  • alumina having excellent thermal conductivity As the filler contained in the second sealing resin 20, the effect of heat dissipation via the second sealing resin 20 is improved.
  • silica having excellent moisture resistance As a filler contained in the first sealing resin 18, it is possible to prevent moisture from entering from the outside via the first sealing resin 18. A short circuit of the circuit element sealed by the sealing resin 18 is prevented.
  • the proportion of alumina contained in the filler employed in the second sealing resin 20 may be greater than that of the first sealing resin 18.
  • the amount (shrinkage rate) by which the second sealing resin 20 cures and shrinks may be larger than that of the first sealing resin 18.
  • the roughness of the surface of the first sealing resin 18 may be set to a certain level or more.
  • the roughness of the surface of the first sealing resin 18 is preferably 13.0 ⁇ RZ or more and 15.0 ⁇ RZ or less. This is realized by making the inner wall of the mold for molding the first sealing resin 18 into a surface having the same roughness in the resin sealing step.
  • the second sealing resin 20 can be satisfactorily fitted to the surface of the first sealing resin 18 at the boundary 36.
  • the surface roughness of the first sealing resin 18 can be satisfactorily released from the mold when the first sealing resin 18 is resin-molded. be able to.
  • FIG. 2 the structure of the 1st sealing resin 18 and the 2nd sealing resin 20 is further demonstrated.
  • This figure is a plan view of the hybrid integrated circuit device 10 as viewed from above, and the outer edges of the circuit board 14 and the first sealing resin 18 that are not actually seen are indicated by dotted lines.
  • the outer edge (side) of the first sealing resin 18 is disposed between the circuit board 14 and the second sealing resin 20. Further, an intermediate portion of the side of the first sealing resin 18 facing in the left-right direction on the paper surface is disposed, for example, at an inner side of 2.0 to 3.0 mm or more from the end, whereby the concave region 13 is formed. Is formed. In addition, a part of the fixing portion 19 in which the central portion of the side surface of the second sealing resin 20 is recessed is disposed in the concave region 13.
  • a fixing means such as a screw is fixed to the fixing portion 19 and a stress acts.
  • the boundary portion between the first sealing resin 18 and the second sealing resin 20 is an interface of different materials, the mechanical strength is weaker than other portions of the sealing resin 16. Therefore, in the present embodiment, the side surface of the first sealing resin 18 is recessed inward to form the concave region 13, whereby the interface between the first sealing resin 18 and the second sealing resin 20 is fixed to the fixing portion 19. The two resins are prevented from being separated from the interface by the stress applied to the fixing portion 19.
  • the entire apparatus is downsized.
  • the resin protrusions 12 described above are arranged on the lower surfaces of the respective corners of the first sealing resin 18.
  • FIGS. 3A is a perspective view showing the first sealing resin 18,
  • FIG. 3B is an enlarged perspective view showing a corner of the first sealing resin 18, and
  • FIG. FIG. 4 is a cross-sectional view taken along line BB ′ in FIG. 3A, and
  • FIG. 4B is a plan view showing the circuit board 14.
  • the four corners of the first sealing resin 18 exhibit protrusions 21 protruding in the left-right direction on the paper surface, and the upper surface of the circuit board 14 is the first sealing.
  • An exposed portion 25 exposed from the stop resin 18 is formed.
  • the exposed portion 25 is a portion formed by pressing and fixing the upper surface of the circuit board 14 with a mold in the step of resin-sealing the circuit board 14 with the first sealing resin 18. Therefore, in the step of forming the first sealing resin 18, the exposed portion is not formed in the first sealing resin 18 unless the circuit board 14 is pressed with a mold.
  • the resin projection part 12 shown in FIG.1 (C) is provided in the lower surface of each protrusion part 21. As shown in FIG.
  • wall portions 23A and 23B are provided on projecting portion 21 so as to surround exposed portion 25 from both sides.
  • the height L12 of the wall portion 23B disposed on the outer side is set to be lower than the height L11 of the wall portion 23A disposed on the inner side. That is, the upper surface of the outer wall portion 23B is disposed below the upper surface of the inner wall portion 23A. This prevents the resin from reaching the concave portion where the exposed portion 25 is formed in the resin sealing step and generating voids.
  • the liquid resin that has flowed into the exposed portion 25 in the resin sealing step flows outwardly above the lower outer wall portion 23B. Thereby, resin spreads enough to the concave part in which the exposed part 25 was provided, and a void is prevented.
  • the other protrusions 21 is set to be lower than the height L11 of the wall portion 23A disposed on the inner side. That is, the upper surface of the outer wall portion 23B is disposed below the upper surface of the inner wall portion 23A.
  • exposed portions 25 where the upper surface of the circuit board 14 is exposed from the first sealing resin 18 are provided at the four corners of the circuit board 14.
  • the exposed portion 25 is provided in a region within a radius of 10.0 mm to 5.0 mm from the end portion of the circuit board 14.
  • the insulating layer 26 covering the upper surface of the circuit board 14 is often cracked by pressing or dicing, so that circuit elements such as the conductive pattern 22 and the semiconductor element 28 are arranged. Absent. Therefore, even if the upper surface of the corner circuit board 14 is exposed to the outside as the exposed portion 25 from the first sealing resin 18, there is no adverse effect on the hybrid integrated circuit incorporated on the upper surface of the circuit board 14.
  • FIG. 5 shows a first transfer mold for forming the first sealing resin 18 described above
  • FIG. 6 shows a second transfer mold for forming the second sealing resin 20.
  • FIG. 7 is a diagram illustrating the operation of the eject pin.
  • FIG. 5A is a perspective view showing the first sealing resin 18 manufactured in this step
  • FIGS. 5B and 5C are cross-sectional views showing this step in which transfer molding is performed.
  • the cross-sectional view in FIG. 5B corresponds to the line BB ′ in FIG. 5A
  • the cross-sectional view in FIG. 5C corresponds to the line CC ′ in FIG. ing.
  • the circuit board 14 in which circuit elements such as semiconductor elements are incorporated on the upper surface is housed in the mold 27.
  • a circuit element such as a semiconductor element is fixed to the upper surface of the circuit board 14, and the circuit element and the conductive pattern are electrically connected.
  • the leads 24 are fixed to the pads arranged around the circuit board 14.
  • the circuit board 14 is housed in the lower mold 31 and the upper mold 29 is brought into contact with the lower mold 31 so that the circuit board 14 is housed in the cavity 39 formed as a gap between the two molds.
  • the lead 24 is fixed by being sandwiched between the upper die 29 and the lower die 31 from above and below, whereby the position of the circuit board 14 in the cavity 39 is fixed in the thickness direction and the left-right direction. Is done. Furthermore, the lower surface of the circuit board 14 is brought into contact with the inner wall of the lower mold 31 by holding the leads 24 with the mold 27, whereby the lower surface of the circuit board 14 is covered with the first sealing resin 18 in this step. It will be exposed.
  • the first sealing resin 18 that has been heated to be in a liquid or semi-solid state is injected into the cavity 39.
  • a gate 42 is provided on the side where the lead 24 is not led out, and an air vent 44 is provided at a position facing the gate 42. Therefore, as the first sealing resin 18 is injected from the gate 42, the air inside the cavity 39 is released to the outside via the air vent 44.
  • the side and upper surfaces of the circuit board 14 and circuit elements such as semiconductor elements are resin-sealed with the first sealing resin 18.
  • the lower surface of the circuit board 14 is in contact with the inner wall of the lower mold 31, it is basically not covered with the first sealing resin 18.
  • the lower surface of the circuit board 14 is covered with a thin resin film made of the first sealing resin 18 that has entered the gap. .
  • the first sealing resin 18 injected into the cavity 39 is heated and cured, the upper mold 29 and the lower mold 31 are released, and the first sealing resin 18 is taken out from the mold 27.
  • a cylindrical hole is provided in the upper mold 29, and the eject pin 38 is accommodated in this hole.
  • the lower surface of the eject pin 38 is positioned on the same plane as the inner wall of the upper mold 29 while the first sealing resin 18 is sealed in the cavity 39.
  • the 1 sealing resin 18 is taken out, it moves downward.
  • the molded first sealing resin 18 is pushed out by the eject pin 38 and released.
  • Four eject pins 38 are provided on the upper mold 29, and correspondingly, a contact portion 40 as a press mark is provided on the upper surface of the first sealing resin 18 (see FIG. 5A). .
  • the side surface of the upper mold 29 is an inclined surface in which the lower part extends outward from the upper part, and the side surface of the lower mold 31 is lower at the upper part. It is an inclined surface that spreads outward. Since the side surfaces of both molds have such a shape, the first sealing resin molded in the cavity 39 can be easily released from the inner walls of both molds.
  • the side surface of the upper mold 29 is an inclined surface in which the lower part is inclined outward from the upper part, and the lower mold 31 has a side surface. No. By doing in this way, the side surface of the 1st sealing resin 18 shape
  • molded becomes an inclined surface which inclines uniformly, and the anchor effect with the 2nd sealing resin formed later is acquired.
  • a recess 76 is provided in which the inner wall of the lower mold 31 is partially recessed at the periphery of the circuit board 14.
  • the resin protrusion 12 shown in FIG. 4A is formed.
  • This resin protrusion 12 is for ensuring the clearance of the circuit board 14 in the next step.
  • the resin protrusion 12 may not be formed.
  • a pressing portion 41 may be provided by projecting a part of the inner wall of the upper mold 29 inward, and the peripheral end portion of the circuit board 14 may be pressed by the pressing portion 41. Specifically, the peripheral end portion of the upper surface of the circuit board 14 is pressed from above at a location and shape corresponding to the exposed portion 25 shown in FIG. Thereby, the circuit board 14 is fixed in the thickness direction, and movement during resin sealing is prevented. Furthermore, since the lower surface of the circuit board 14 comes into close contact with the side wall of the lower mold 31 by the pressing force of the pressing portion 41, the first sealing resin 18 is prevented from entering the lower surface of the circuit board 14.
  • the inner wall of the mold 27 used in this process has a rough surface shape.
  • the inner wall of the mold 27 has a shape such that the surface roughness of the first sealing resin 18 is 13.0 ⁇ RZ or more and 15.0 ⁇ RZ or less. Within this range, the first sealing resin 18 can be easily released from the inner wall of the first mold 27.
  • the first sealing resin 18 having the shape shown in FIG. 5A is formed.
  • the side surface from which the lead 24 of the first sealing resin 18 leads is An intermediate portion from which the lead 24 is led out is an inclined surface protruding outward.
  • the side surface of the first sealing resin 18 from which the lead 24 is not led out is a uniform inclined surface in which the upper portion is inclined inward, thereby generating an anchor effect with the second sealing resin formed in the next step.
  • the upper surface of the first sealing resin 18 is a flat surface, which allows the entire upper surface of the first sealing resin to be in contact with the inner wall of the mold stably in the next step.
  • FIG. 6A is a perspective view showing the second sealing resin 20 manufactured in this step
  • FIG. 6B and FIG. 6C are cross-sectional views showing this step.
  • 6B is a cross-sectional view corresponding to the line BB ′ in FIG. 6A
  • FIG. 6C is a cross-sectional view corresponding to the line CC ′ in FIG. 6A. It is.
  • a mold 50 including an upper mold 52 and a lower mold 54 is prepared.
  • the cavity 56 of the mold 50 is formed slightly larger than the cavity 39 of the mold 27 used in the previous step, and the inner wall shape is the same as the shape of the resin portion shown in FIG.
  • a specific sealing method is as follows. First, the circuit board 14 that is resin-sealed with the first sealing resin 18 is disposed in the lower mold 54, and the upper mold 52 is brought into contact with the lower mold 54. The circuit board 14 is accommodated in the cavity 56 to be formed. Further, the position of the circuit board 14 inside the cavity 56 is fixed by sandwiching the lead 24 between the upper mold 52 and the lower mold 54.
  • the side surface of the upper mold 52 is an inclined surface whose lower portion extends outward
  • the side surface of the lower mold 54 is an inclined surface whose upper portion extends outward.
  • the distance L1 between the lower surface of the circuit board 14 and the inner wall of the lower mold 54 is the distance L2 between the side surface of the first sealing resin 18 and the side walls of the lower mold 54 and the upper mold 52. It is the same. Specifically, the distance between L1 and L2 is, for example, in a range from 0.1 mm to 0.3 mm.
  • the position of the first sealing resin 18 inside the cavity 56 is firmly fixed by pressing the first sealing resin 18 with the mold 50. Yes. Specifically, the entire upper surface of the flat first sealing resin 18 contacts the inner wall of the upper mold 52, and the resin protrusion 12 provided on the lower surface of the first sealing resin 18 is formed on the inner wall of the lower mold 54. It is in contact. As a result, the lower surface of the circuit board 14 is separated from the inner wall of the lower mold 54 by the thickness (L1) of the resin protrusion 12.
  • the liquid second sealing resin 20 is injected from the gate 58 into the cavity 56.
  • the injected second sealing resin 20 is first filled in the region 56A on the left side of the first sealing resin.
  • the second sealing resin 20 is filled in the region 56 ⁇ / b> A, the second sealing resin 20 is filled in a narrow gap between the lower surface of the circuit board 14 and the inner wall of the lower mold 54.
  • the second sealing resin 20 is also filled in the gap between the side surface of the first sealing resin 18 and the side walls of the lower mold 54 and the upper mold 52. .
  • the gap below the circuit board 14 shown in FIG. 6C and the width of the gap on the side of the first sealing resin 18 shown in FIG. 6B are set to be substantially the same. Has been. Accordingly, since the second sealing resin 20 is uniformly filled in both regions, even if the gap below the circuit board 14 is set to be narrow, for example, about 0.2 mm, the second sealing resin 20 is not voided in this region. It can be filled.
  • the upper mold 52 used in this step is also provided with an eject pin 62, and after the filling of the second sealing resin 20 is completed, the upper surface of the first sealing resin 18 is ejected.
  • the circuit board 14 resin-sealed with the second sealing resin 20 is taken out from the mold 50 by pressing downward with the pins 62.
  • the resin protrusion 12 is used to ensure a constant clearance below the circuit board 14, but other methods may be used.
  • the lower mold 54 at a position corresponding to the resin protrusion 12 is protruded upward to provide a fixing pin (fixing protrusion), and this fixing pin is brought into contact with the lower surface of the first sealing resin 18 to provide clearance. It may be secured.
  • a movable pin may be employed instead of the fixed pin.
  • FIG. 7A shows the eject pin 38 used in the step of forming the first sealing resin
  • FIG. 7B shows the eject pin 62 used in the step of forming the second sealing resin.
  • the eject pin 38 is housed in the hole 43 provided in the upper mold 29. Is disposed on the same plane as the inner wall of the upper mold 29.
  • the positions of the eject pin 38 provided in the first mold and the eject pin 62 provided in the second mold are made to correspond (overlapping).
  • the hole 64 provided with the eject pin 62 in the second mold is formed larger in plan view than the hole 43 provided with the eject pin 38 in the first mold.
  • the lower end of the eject pin 62 is disposed above the inner wall of the upper mold 52. Accordingly, since the resin burr 66 is accommodated in the hole 64, the resin burr 66 is prevented from coming into contact with the inner wall of the upper mold 52, and the inner wall of the upper mold 52 is placed on the upper surface of the first sealing resin 18. In close contact.
  • the hybrid integrated circuit device 10 shown in FIG. 1 is manufactured through a step of forming the lead 24 into a predetermined shape and length and a step of inspecting the characteristics of the built-in hybrid integrated circuit device.

Abstract

Provided is a circuit device manufacturing method wherein a resin sealing step of thinly sealing the rear surface of a circuit board with a resin is performed at low cost, said circuit board having circuit elements mounted on the upper surface thereof. In the present invention, the upper surface and the side surfaces of a circuit board (14) are coated with a first sealing resin (18) that is formed by transfer molding, said upper surface having a hybrid integrated circuit mounted thereon, then, the lower surface of the circuit board (14), and the lower surface and the side surfaces of the first sealing resin (18) are coated with a second sealing resin (20). Furthermore, in a step of forming the second sealing resin (20), stable transfer molding is performed by fixing the position by having the upper surface of the first sealing resin (18) in contact with the inner wall of a second molding die (50).

Description

回路装置の製造方法Circuit device manufacturing method
　本発明は、上面に回路素子が組み込まれた回路基板を樹脂封止する回路装置の製造方法に関する。 The present invention relates to a method for manufacturing a circuit device in which a circuit board having a circuit element incorporated on an upper surface is resin-sealed.
　トランジスタやチップ素子から成る混成集積回路が上面に組み込まれた回路基板を封止する方法としては、ケース材を用いた封止方法と、樹脂により樹脂封止する方法が有る。 There are a sealing method using a case material and a resin sealing method using a resin as a method for sealing a circuit board in which a hybrid integrated circuit composed of transistors and chip elements is incorporated on the upper surface.
　ケース材を用いた場合では、中空部を備えた蓋状のケース材を回路基板に嵌合させることで、回路基板の上面に形成された混成集積回路を、ケース材の中空部に収納する。 When the case material is used, the hybrid integrated circuit formed on the upper surface of the circuit board is accommodated in the hollow part of the case material by fitting the lid-like case material provided with the hollow part to the circuit board.
　樹脂封止が採用された場合は、金型を用いた射出成形により回路基板の上面に形成された混成集積回路が被覆される。図８（Ａ）を参照して、樹脂封止された混成集積回路装置１００の構成を説明する。混成集積回路１００では、先ず、アルミニウム等の金属から成る回路基板１０１の上面が全面的に絶縁層１０２により被覆されている。そして、絶縁層１０２の上面に形成された導電パターン１０３に回路素子が接続されて所定の混成集積回路が構成されている。回路基板１０１の上面に配置される素子としては、金属細線１０７により接続された半導体素子１０５Ａとチップ素子１０５Ｂが図示されている。回路基板１０１の端部では、パッド状の導電パターン１０３にリード１０４が固着されている。 When resin sealing is adopted, the hybrid integrated circuit formed on the upper surface of the circuit board is covered by injection molding using a mold. With reference to FIG. 8A, the configuration of the resin-encapsulated hybrid integrated circuit device 100 will be described. In the hybrid integrated circuit 100, first, the upper surface of the circuit board 101 made of a metal such as aluminum is entirely covered with the insulating layer 102. A circuit element is connected to the conductive pattern 103 formed on the upper surface of the insulating layer 102 to constitute a predetermined hybrid integrated circuit. As elements disposed on the upper surface of the circuit board 101, a semiconductor element 105A and a chip element 105B connected by a thin metal wire 107 are illustrated. A lead 104 is fixed to the pad-like conductive pattern 103 at the end of the circuit board 101.
　封止樹脂１０６は熱可塑性樹脂であり、回路基板１０１の上面、側面および下面を被覆している。ここで、回路基板１０１の上面に形成された回路素子から発生した熱を、回路基板１０１を経由して良好に外部に放出させるためには、回路基板１０１の下面を被覆する封止樹脂１０６を薄くすることが有効である。しかしながら、回路基板１０１の下面を被覆する封止樹脂１０６の厚みを例えば０．５ｍｍ程度に薄く設定すると、回路基板１０１の下面が部分的に封止樹脂１０６により被覆されない問題が発生する。この理由は、金型を用いて封止樹脂１０６を射出成形する工程にて、回路基板１０１の下面と金型の内壁下面との間隙が狭くなり、この間隙に十分に封止樹脂が行き渡らなくなるからである。 The sealing resin 106 is a thermoplastic resin and covers the upper surface, side surfaces, and lower surface of the circuit board 101. Here, in order to release heat generated from the circuit elements formed on the upper surface of the circuit board 101 to the outside through the circuit board 101, a sealing resin 106 that covers the lower surface of the circuit board 101 is used. Thinning is effective. However, if the thickness of the sealing resin 106 that covers the lower surface of the circuit board 101 is set to be as thin as, for example, about 0.5 mm, there arises a problem that the lower surface of the circuit board 101 is not partially covered with the sealing resin 106. This is because the gap between the lower surface of the circuit board 101 and the lower surface of the inner wall of the mold is narrowed in the step of injection molding the sealing resin 106 using a mold, and the sealing resin does not sufficiently reach the gap. Because.
　この問題を回避するための方法を、図８（Ｂ）を参照して説明する（下記特許文献１）。ここでは、支持部材１１０により回路基板１０１を下面から支持した状態でインジェクションモールドを行っている。具体的には、支持部材１１０は熱可塑性樹脂から成り、内側の面は回路基板１０１の下面および側面の一部に当接するサイズである。また、支持部材１１０の外側の面は金型１１２の内壁下面および側面に接触する大きさとなっている。従って、支持部材１１０により支持された状態の回路基板１０１を金型１１２のキャビティ１１４に収納させると、回路基板１０１の下面と金型１１２の内壁下面との間隙に支持部材１１０が位置する。この状態で、熱可塑性樹脂をキャビティ１１４に注入することにより、回路基板１０１の樹脂封止が行われる。この方法によると、回路基板１０１の下面と金型１１２の内壁下面との間隙には支持部材１１０が位置しており、この間隙に液状の熱硬化性樹脂を注入する必要がないので、回路基板１０１の下面が部分的に被覆されないことによるボイドの発生が防止される。また、樹脂封止時の注入圧から金属細線等を保護するために、回路素子が被覆されるように回路基板１０１の上面にポッティング樹脂１２０が形成されている。 A method for avoiding this problem will be described with reference to FIG. 8B (Patent Document 1 below). Here, the injection molding is performed with the support member 110 supporting the circuit board 101 from the lower surface. Specifically, the support member 110 is made of a thermoplastic resin, and the inner surface has a size that contacts the lower surface and part of the side surface of the circuit board 101. Further, the outer surface of the support member 110 is in contact with the inner wall lower surface and side surfaces of the mold 112. Therefore, when the circuit board 101 supported by the support member 110 is stored in the cavity 114 of the mold 112, the support member 110 is positioned in the gap between the lower surface of the circuit board 101 and the lower surface of the inner wall of the mold 112. In this state, the circuit board 101 is resin-sealed by injecting a thermoplastic resin into the cavity 114. According to this method, since the support member 110 is located in the gap between the lower surface of the circuit board 101 and the lower surface of the inner wall of the mold 112, it is not necessary to inject liquid thermosetting resin into the gap. Generation of voids due to the lower surface of 101 not being partially covered is prevented. In addition, a potting resin 120 is formed on the upper surface of the circuit board 101 so as to cover the circuit elements in order to protect the fine metal wires and the like from the injection pressure during resin sealing.
　更に、他の封止方法が下記特許文献２に記載されている。この文献の図３およびその説明箇所を参照すると、回路基板２２の下面に配置された樹脂シート５２を溶融させることにより、回路基板２２の下面を薄く樹脂封止することを可能としている。 Furthermore, another sealing method is described in Patent Document 2 below. Referring to FIG. 3 of this document and the description thereof, the lower surface of the circuit board 22 can be thinly resin-sealed by melting the resin sheet 52 disposed on the lower surface of the circuit board 22.
　具体的には、先ず、樹脂材料を打錠加工した樹脂シート５２を下金型４４に配置し、この樹脂シート５２の上面に回路基板２２を載置している。そして、下金型４４により加熱溶融された樹脂シート５２により、回路基板２２の下面が薄く被覆される。樹脂シート５２で回路基板２２の下面を被覆することにより、ボイドを発生させることなく回路基板２２の下面を薄く樹脂封止することが可能となる。 Specifically, first, a resin sheet 52 formed by tableting a resin material is placed in the lower mold 44, and the circuit board 22 is placed on the upper surface of the resin sheet 52. The lower surface of the circuit board 22 is thinly covered with the resin sheet 52 heated and melted by the lower mold 44. By covering the lower surface of the circuit board 22 with the resin sheet 52, the lower surface of the circuit board 22 can be thinly resin-sealed without generating voids.
　一方、複数回の樹脂モールドにより回路素子を樹脂封止する技術が下記特許文献３に記載されている。この文献の第１図および明細書３頁の記載を参照すると、半導体チップ１０３を第１のモールド樹脂１１６で被覆し、更に第１のモールド樹脂１１６およびヒートシンク１０１を第２のモールド樹脂１１で被覆している。 Meanwhile, a technique for resin-sealing a circuit element by a plurality of resin molds is described in Patent Document 3 below. Referring to FIG. 1 and the description on page 3 of this document, the semiconductor chip 103 is covered with a first mold resin 116, and the first mold resin 116 and the heat sink 101 are further covered with a second mold resin 11. is doing.
特許第３３１６４４９号公報Japanese Patent No. 3316449 特開２０１０－８６９９３号公報JP 2010-86993 A 特開昭６３－１４１３５３号公報JP 63-141353 A
　特許文献２に示された樹脂封止の方法では、回路基板の下面に敷いて用意される樹脂シートと、回路基板が配置されたキャビティに注入されるモールド樹脂により、回路基板が全体的に樹脂封止される。 In the resin sealing method shown in Patent Document 2, the circuit board is entirely made of resin by a resin sheet prepared on the lower surface of the circuit board and a mold resin injected into the cavity where the circuit board is arranged. Sealed.
しかしながら、この製造方法では、モールド樹脂の材料と成るタブレットとは別に薄い樹脂シートを用意する必要があり、このことが製造コストを上昇させていた。更には、打錠加工で製造される樹脂シートは脆い性質を備えており、製造工程の途中段階にて樹脂シートが割れて破損してしまう恐れもあった。 However, in this manufacturing method, it is necessary to prepare a thin resin sheet separately from the tablet that is the material of the mold resin, which increases the manufacturing cost. Furthermore, the resin sheet manufactured by the tableting process has a brittle property, and there is a possibility that the resin sheet may be broken and damaged in the middle of the manufacturing process.
　更にまた、特許文献３に記載された樹脂封止方法では、第２図に示すモールド金型を用いてモールドを行うが、この金型の内部で第１のモールド樹脂１１６を固定する具体的な方法が示されていない。特に、トランスファーモールドでは高い圧力で液状の樹脂が金型に注入されるので、この圧力により第１のモールド樹脂１１６が移動してしまう恐れがあった。 Furthermore, in the resin sealing method described in Patent Document 3, molding is performed using the mold shown in FIG. 2, and a specific method for fixing the first mold resin 116 inside the mold is shown. The method is not shown. In particular, in the transfer mold, since the liquid resin is injected into the mold at a high pressure, the first mold resin 116 may move due to the pressure.
本発明は上記した問題点を鑑みて成されたものであり、本発明の目的は、上面に回路素子が組み込まれた回路基板の裏面を薄く樹脂封止する樹脂封止工程を低コストで実現する回路装置の製造方法を提供することにある。 The present invention has been made in view of the above-mentioned problems, and an object of the present invention is to realize a resin sealing process for thinly resin-sealing the back surface of a circuit board in which circuit elements are incorporated on the upper surface at a low cost. Another object of the present invention is to provide a method for manufacturing a circuit device.
　本発明の回路装置の製造方法は、その上面に回路素子を実装した基板を第１金型に収納し、前記基板の下面を前記第１金型の内壁に接触させて前記基板を第１封止樹脂により封止する第１工程と、前記第１封止樹脂で封止された基板を第２金型に収納し、前記第１封止樹脂の表面を挟持して前記基板を含めて第２封止樹脂で封止する第２工程と、を備えることを特徴とする。 In the method of manufacturing a circuit device according to the present invention, a substrate having circuit elements mounted on the upper surface thereof is housed in a first mold, and the lower surface of the substrate is brought into contact with the inner wall of the first mold to seal the substrate. A first step of sealing with a sealing resin; and a substrate sealed with the first sealing resin is housed in a second mold, and the first sealing resin is sandwiched between the first sealing resin and the first sealing resin. And a second step of sealing with two sealing resins.
　本発明によれば、回路基板の下面を第１金型に当接させた状態で１回目の樹脂封止を行い、第２金型を用いた２回目の樹脂封止で回路基板の下面を樹脂封止している。このようにすることで、２回目の樹脂封止は主に回路基板の下面を被覆することに特化した工程となるので、回路基板の下面をボイド無く薄く樹脂封止することができる。 According to the present invention, the first resin sealing is performed with the lower surface of the circuit board in contact with the first mold, and the lower surface of the circuit board is removed by the second resin sealing using the second mold. Resin sealed. By doing in this way, the second resin sealing is a process specialized in mainly covering the lower surface of the circuit board, so that the lower surface of the circuit board can be thinly resin-sealed without voids.
　更に本発明では、２回目の樹脂封止の工程では、１回目の樹脂封止の工程で形成された第１封止樹脂の上面を第２金型の内壁に当接させることで回路基板の位置を固定している。これにより、２回目の樹脂封止工程を安定して行うことが可能となる。 Furthermore, in the present invention, in the second resin sealing step, the upper surface of the first sealing resin formed in the first resin sealing step is brought into contact with the inner wall of the second mold, thereby The position is fixed. This makes it possible to stably perform the second resin sealing step.
本発明の回路装置の製造方法により製造される混成集積回路装置を示す図であり、（Ａ）は斜視図であり、（Ｂ）および（Ｃ）は断面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is a figure which shows the hybrid integrated circuit device manufactured by the manufacturing method of the circuit device of this invention, (A) is a perspective view, (B) and (C) are sectional drawings. 本発明の回路装置の製造方法を示す平面図である。It is a top view which shows the manufacturing method of the circuit apparatus of this invention. 本発明の回路装置の製造方法により製造される混成集積回路装置の第１封止樹脂を示す図であり、（Ａ）は斜視図であり、（Ｂ）は部分的に拡大された斜視図である。It is a figure which shows the 1st sealing resin of the hybrid integrated circuit device manufactured by the manufacturing method of the circuit device of this invention, (A) is a perspective view, (B) is a partially expanded perspective view. is there. 本発明の回路装置の製造方法を示す図であり、（Ａ）は断面図であり、（Ｂ）は回路基板を抜き出して示す平面図である。It is a figure which shows the manufacturing method of the circuit apparatus of this invention, (A) is sectional drawing, (B) is a top view which extracts and shows a circuit board. 本発明の回路装置の製造方法を示す図であり、（Ａ）は成形される第１封止樹脂を示す斜視図であり、（Ｂ）および（Ｃ）は断面図である。It is a figure which shows the manufacturing method of the circuit apparatus of this invention, (A) is a perspective view which shows the 1st sealing resin shape | molded, (B) And (C) is sectional drawing. 本発明の回路装置の製造方法を示す図であり、（Ａ）は成形される第２封止樹脂を示す斜視図であり、（Ｂ）および（Ｃ）は断面図である。It is a figure which shows the manufacturing method of the circuit apparatus of this invention, (A) is a perspective view which shows 2nd sealing resin shape | molded, (B) And (C) is sectional drawing. 本発明の回路装置の製造方法を示す図であり、（Ａ）は第１封止樹脂を成形する工程でのイジェクトピンを示す断面図であり、（Ｂ）は第２封止樹脂を成形する工程でのイジェクトピンを示す断面図である。It is a figure which shows the manufacturing method of the circuit apparatus of this invention, (A) is sectional drawing which shows the eject pin in the process of shape | molding 1st sealing resin, (B) shape | molds 2nd sealing resin. It is sectional drawing which shows the eject pin in a process. 背景技術の回路装置の製造方法を示す図であり、（Ａ）は製造される混成集積回路装置を示す断面図であり、（Ｂ）は樹脂封止工程を示す断面図である。It is a figure which shows the manufacturing method of the circuit device of background art, (A) is sectional drawing which shows the hybrid integrated circuit device manufactured, (B) is sectional drawing which shows the resin sealing process.
　図１を参照して、本形態が適用される混成集積回路装置１０の構成を説明する。図１（Ａ）は混成集積回路装置１０の斜視図であり、図１（Ｂ）は図１（Ａ）のＢ－Ｂ’線に於ける断面図であり、（Ｃ）はＣ－Ｃ’線に於ける断面図である。 With reference to FIG. 1, the configuration of a hybrid integrated circuit device 10 to which the present embodiment is applied will be described. 1A is a perspective view of the hybrid integrated circuit device 10, FIG. 1B is a cross-sectional view taken along line BB ′ of FIG. 1A, and FIG. 1C is CC ′. It is sectional drawing in a line.
　混成集積回路装置１０は、回路基板１４の上面に、導電パターン２２と回路素子から成る混成集積回路が組み込まれ、この回路と電気的に接続されたリード２４が外部に導出している。更に、回路基板１４の上面に構築された混成集積回路、回路基板１４の上面、側面および下面は、熱硬化性樹脂から成る封止樹脂１６により一体的に被覆されている。 In the hybrid integrated circuit device 10, a hybrid integrated circuit composed of a conductive pattern 22 and circuit elements is incorporated on the upper surface of the circuit board 14, and leads 24 electrically connected to the circuit are led out to the outside. Furthermore, the hybrid integrated circuit constructed on the upper surface of the circuit board 14, and the upper surface, side surfaces, and lower surface of the circuit board 14 are integrally covered with a sealing resin 16 made of a thermosetting resin.
　回路基板１４は、アルミニウムや銅等の金属から成る基板であり、具体的な大きさは、例えば縦×横×厚さ＝６１ｍｍ×４２ｍｍ×１ｍｍ程度である。ここで、回路基板１４の材料として金属以外が採用されても良く、例えば、セラミックや樹脂材料が回路基板１４の材料として採用されても良い。 The circuit board 14 is a board made of a metal such as aluminum or copper, and its specific size is, for example, about vertical × horizontal × thickness = 61 mm × 42 mm × 1 mm. Here, a material other than metal may be employed as the material of the circuit board 14, and for example, ceramic or resin material may be employed as the material of the circuit board 14.
　絶縁層２６は、フィラーが高充填されたエポキシ樹脂から成り、回路基板１４の表面全域を覆うように形成されている。 The insulating layer 26 is made of an epoxy resin highly filled with a filler, and is formed so as to cover the entire surface of the circuit board 14.
　導電パターン２２は厚みが５０μｍ程度の銅等の金属膜から成り、所定の電気回路が実現されるように絶縁層２６の表面に形成される。また、リード２４が導出する辺に、導電パターン２２からなるパッドが形成される。 The conductive pattern 22 is made of a metal film such as copper having a thickness of about 50 μm, and is formed on the surface of the insulating layer 26 so as to realize a predetermined electric circuit. A pad made of the conductive pattern 22 is formed on the side from which the lead 24 is led out.
　半導体素子２８およびチップ素子３０（回路素子）は、半田等の接合材を介して、導電パターン２２の所定の箇所に固着されている。半導体素子２８としては、トランジスタ、ＬＳＩチップ、ダイオード等が採用される。ここでは、半導体素子２８と導電パターン２２とは、金属細線３４を経由して接続される。チップ素子３０としては、チップ抵抗やチップコンデンサ等が採用され、両端の電極は半田等の接合材を介して導電パターン２２に固着されている。また、半導体素子２８が、多量の熱を放出するパワー系の素子である場合は、厚さが数ミリ程度の金属片から成るヒートシンクを介して回路基板１４の上面に固着される。 The semiconductor element 28 and the chip element 30 (circuit element) are fixed to predetermined portions of the conductive pattern 22 via a bonding material such as solder. As the semiconductor element 28, a transistor, an LSI chip, a diode, or the like is employed. Here, the semiconductor element 28 and the conductive pattern 22 are connected via a thin metal wire 34. As the chip element 30, a chip resistor, a chip capacitor, or the like is employed, and electrodes at both ends are fixed to the conductive pattern 22 via a bonding material such as solder. Further, when the semiconductor element 28 is a power element that emits a large amount of heat, the semiconductor element 28 is fixed to the upper surface of the circuit board 14 via a heat sink made of a metal piece having a thickness of about several millimeters.
　リード２４は、回路基板１４の周辺部に設けられたパッドに固着され、入力信号や出力信号が通過する外部接続端子として機能している。図１（Ｂ）を参照すると、回路基板１４の対向する２つの辺に沿って多数個のリード２４が設けられているが、１つの側辺または４つの側辺に沿ってリード２４が配置されても良い。 The lead 24 is fixed to a pad provided in the peripheral portion of the circuit board 14 and functions as an external connection terminal through which an input signal and an output signal pass. Referring to FIG. 1B, a large number of leads 24 are provided along two opposing sides of the circuit board 14, but the leads 24 are arranged along one side or four sides. May be.
　封止樹脂１６は、熱硬化性樹脂を用いるトランスファーモールドにより形成される。本形態では、複数回のトランスファーモールドにより、封止樹脂１６が形成される。図１（Ｂ）では、封止樹脂１６により、導電パターン２２、半導体素子２８、チップ素子３０、金属細線３４が封止されている。更に、回路基板１４の上面、側面および下面が封止樹脂１６により被覆されている。 The sealing resin 16 is formed by transfer molding using a thermosetting resin. In this embodiment, the sealing resin 16 is formed by a plurality of transfer moldings. In FIG. 1B, the conductive pattern 22, the semiconductor element 28, the chip element 30, and the fine metal wire 34 are sealed with the sealing resin 16. Further, the upper surface, the side surface, and the lower surface of the circuit board 14 are covered with the sealing resin 16.
　更に、図１（Ａ）を参照して、紙面上にて左右方向に対向する封止樹脂１６の側面中間部に固定部１９が設けられている。固定部１９は、平面視で封止樹脂１６の側面を略半円状に内側に窪ませた部位であり、この部分にビス等の固定手段が配置されることで、封止樹脂１６の下面がヒートシンク等の放熱体に当接される。 Furthermore, with reference to FIG. 1 (A), the fixing | fixed part 19 is provided in the side surface intermediate part of the sealing resin 16 which opposes the left-right direction on a paper surface. The fixing portion 19 is a portion in which the side surface of the sealing resin 16 is recessed inward in a substantially semicircular shape in plan view, and a fixing means such as a screw is disposed in this portion, so that the lower surface of the sealing resin 16 Is brought into contact with a heat sink such as a heat sink.
　図１（Ｂ）を参照して、封止樹脂１６に関して更に説明する。まず、封止樹脂１６の外観は、下面および側面が第２封止樹脂２０から成り、上面の周辺部は第２封止樹脂２０から成り、それ以外の上面は第１封止樹脂１８が露出する面となる。 The sealing resin 16 will be further described with reference to FIG. First, as for the appearance of the sealing resin 16, the lower surface and side surfaces are made of the second sealing resin 20, the peripheral portion of the upper surface is made of the second sealing resin 20, and the first sealing resin 18 is exposed on the other upper surfaces. It becomes the surface to do.
　換言すると、第１封止樹脂１８は回路基板１４の下面を露出した状態で回路素子および回路基板１４を被覆しており、第２封止樹脂２０は回路基板１４の下面および第１封止樹脂１８の側面を包み込むように封止している。第１封止樹脂１８と第２封止樹脂２０との界面は外部から回路基板１４に向かって水分が進入しやすい経路となり得るが、この構成によりこの経路が長く設定されるので耐湿性が向上する。 In other words, the first sealing resin 18 covers the circuit element and the circuit board 14 with the lower surface of the circuit board 14 exposed, and the second sealing resin 20 is the lower surface of the circuit board 14 and the first sealing resin. The side surfaces of 18 are sealed. The interface between the first sealing resin 18 and the second sealing resin 20 can be a path through which moisture easily enters from the outside toward the circuit board 14, but this path is set longer by this configuration, so that the moisture resistance is improved. To do.
　第１封止樹脂１８は１回目のトランスファーモールドにより形成され、半導体素子２８等の回路素子、リード２４の接続部分、回路基板１４の上面および側面を被覆している。第１封止樹脂１８は、フィラーが充填されたエポキシ樹脂等の熱硬化性樹脂から成る。また、回路基板１４の下面は基本的には第１封止樹脂では被覆されずに下方に露出している。第１封止樹脂１８は、半導体素子２８から発生する熱の経路である回路基板１４の下面を被覆しない。従って、高い放熱性を要求されないことから、第１封止樹脂１８の材料としては放熱性の低い樹脂材料が採用される。また、リード２４が導出する第１封止樹脂１８の側面は、樹脂封止時の離型性が考慮されて、リード２４の導出部分が外部に突出する傾斜面と成っている。ここで、回路基板１４の下面は必ずしも第１封止樹脂１８から下方に露出させる必要はなく、厚さが数十μｍ程度の薄い樹脂バリのような第１封止樹脂１８により回路基板１４の下面が被覆されても良い。 The first sealing resin 18 is formed by the first transfer molding, and covers the circuit elements such as the semiconductor elements 28, the connection portions of the leads 24, and the upper and side surfaces of the circuit board 14. The first sealing resin 18 is made of a thermosetting resin such as an epoxy resin filled with a filler. Further, the lower surface of the circuit board 14 is basically not covered with the first sealing resin and exposed downward. The first sealing resin 18 does not cover the lower surface of the circuit board 14 that is a path of heat generated from the semiconductor element 28. Therefore, since high heat dissipation is not required, a resin material with low heat dissipation is used as the material of the first sealing resin 18. Further, the side surface of the first sealing resin 18 led out by the lead 24 is an inclined surface in which the lead-out portion of the lead 24 protrudes to the outside in consideration of releasability during resin sealing. Here, the lower surface of the circuit board 14 is not necessarily exposed downward from the first sealing resin 18, and the first sealing resin 18 such as a thin resin burr having a thickness of about several tens of μm is used to form the circuit board 14. The lower surface may be covered.
　第２封止樹脂２０は２回目のトランスファーモールドにより形成され、第１封止樹脂の側面および下面、回路基板１４の下面を被覆している。第２封止樹脂２０の厚みは一様ではない。 The second sealing resin 20 is formed by the second transfer molding, and covers the side surface and the lower surface of the first sealing resin and the lower surface of the circuit board 14. The thickness of the second sealing resin 20 is not uniform.
　具体的には、図１（Ｂ）を参照して、回路基板１４の下面、第１封止樹脂１８の下面および、リード２４が導出する対向する第１封止樹脂１８の側面を被覆する第２封止樹脂２０の厚みは一定に設定される。回路基板１４および第１封止樹脂１８の下面を被覆する第２封止樹脂２０の厚みＬ１は、例えば０．１ｍｍ以上０．３ｍｍ以下である。回路基板１４の下面を被覆する第２封止樹脂２０をこの様に薄くすることにより、第２封止樹脂２０の熱抵抗が低減され、半導体素子２８から発生した熱が、回路基板１４および第２封止樹脂２０を経由して良好に外部に放出される。第１封止樹脂１８の側面を被覆する第２封止樹脂２０の厚みＬ２も、Ｌ１と同程度である。 Specifically, referring to FIG. 1B, the lower surface of the circuit board 14, the lower surface of the first sealing resin 18, and the side surfaces of the opposing first sealing resin 18 led out by the leads 24 are covered. 2 The thickness of the sealing resin 20 is set constant. The thickness L1 of the second sealing resin 20 that covers the lower surfaces of the circuit board 14 and the first sealing resin 18 is, for example, not less than 0.1 mm and not more than 0.3 mm. By thinning the second sealing resin 20 covering the lower surface of the circuit board 14 in this way, the thermal resistance of the second sealing resin 20 is reduced, and the heat generated from the semiconductor element 28 is reduced by the circuit board 14 and the first sealing resin 20. 2 It is discharged to the outside through the sealing resin 20 well. The thickness L2 of the second sealing resin 20 covering the side surface of the first sealing resin 18 is also approximately the same as L1.
　本形態では、第１封止樹脂１８の側面を被覆する第２封止樹脂２０の厚みＬ２を、回路基板１４の下面を被覆する第２封止樹脂２０の厚みＬ１と同様にすることにより、樹脂封止の工程にてこれらの部分に一様に第２封止樹脂２０を行き渡らせてボイド無く樹脂封止を行うことができる。この事項は、図５を参照して後述する。 In this embodiment, by making the thickness L2 of the second sealing resin 20 covering the side surface of the first sealing resin 18 the same as the thickness L1 of the second sealing resin 20 covering the lower surface of the circuit board 14, The resin sealing can be performed without voids by uniformly spreading the second sealing resin 20 over these portions in the resin sealing step. This matter will be described later with reference to FIG.
　一方、図１（Ｃ）を参照して、リード２４が導出しない側面（図１（Ａ）で左右方向に対向する側面）では、第１封止樹脂１８の側面を被覆する第２封止樹脂の厚さＬ３は例えば５ｍｍ程度であり、図１（Ｂ）の場合と比較すると厚く被覆される。これは、図１（Ａ）に示す固定部１９を設けるためである。 On the other hand, referring to FIG. 1C, the second sealing resin that covers the side surface of the first sealing resin 18 on the side surface (the side surface facing in the left-right direction in FIG. 1A) from which the lead 24 is not led out. The thickness L3 is, for example, about 5 mm, which is thicker than that in the case of FIG. This is because the fixing portion 19 shown in FIG.
　ここで、図１（Ｂ）では、第１封止樹脂１８の上面は第２封止樹脂２０から露出しているように図示されているが、厚さが数十μｍ程度の薄い樹脂バリのような第２封止樹脂２０により第１封止樹脂１８の上面が被覆されても良い。 Here, in FIG. 1B, the upper surface of the first sealing resin 18 is illustrated as being exposed from the second sealing resin 20, but a thin resin burr having a thickness of about several tens of μm is illustrated. The upper surface of the first sealing resin 18 may be covered with the second sealing resin 20.
　また、図１（Ｃ）を参照して、第１封止樹脂１８の側面（境界３６）は、下部が上部よりも外側に広がる傾斜面と成っている。これにより、境界３６にて第１封止樹脂１８と第２封止樹脂２０との嵌合が強化されてアンカー効果が発生し、両樹脂の剥離が防止される。 Referring to FIG. 1C, the side surface (boundary 36) of the first sealing resin 18 is an inclined surface in which the lower portion extends outward from the upper portion. Thereby, fitting with the 1st sealing resin 18 and the 2nd sealing resin 20 is strengthened in the boundary 36, an anchor effect occurs, and exfoliation of both resin is prevented.
　また、回路基板１４の４隅に対応して、第１封止樹脂１８の下面を円柱状に下方に突起させた樹脂突起部１２が設けられている。樹脂突起部１２の幅は２．０ｍｍ程度であり、高さは回路基板１４の下面を被覆する第２封止樹脂２０と同様に、０．１ｍｍ以上０．３ｍｍ以下である。樹脂突起部１２の側面は第２封止樹脂２０により被覆され、樹脂突起部１２の下面は第２封止樹脂２０から下方に露出するか或いは第２封止樹脂２０により薄く覆われる。この様に、第１封止樹脂１８の下面を部分的に下方に突出させて樹脂突起部１２とし、この樹脂突起部１２の側面を第２封止樹脂２０で被覆する事により、第１封止樹脂１８と第２封止樹脂２０とが良好に嵌合し、両者の剥離が防止される。 Also, corresponding to the four corners of the circuit board 14, resin protrusions 12 are provided in which the lower surface of the first sealing resin 18 is protruded downward in a columnar shape. The width of the resin protrusion 12 is about 2.0 mm, and the height is not less than 0.1 mm and not more than 0.3 mm, similar to the second sealing resin 20 that covers the lower surface of the circuit board 14. The side surface of the resin protrusion 12 is covered with the second sealing resin 20, and the lower surface of the resin protrusion 12 is exposed downward from the second sealing resin 20 or is thinly covered with the second sealing resin 20. In this way, the lower surface of the first sealing resin 18 is partially protruded downward to form the resin protrusion 12, and the side surface of the resin protrusion 12 is covered with the second sealing resin 20. The stop resin 18 and the second sealing resin 20 fit well, and peeling of both is prevented.
　更にまた、樹脂突起部１２と回路基板１４とが離間する距離Ｌ４は、例えば０．５ｍｍ以上に設定される。回路基板１４の端部側面は金属材料が露出する面であり、この部分は第１封止樹脂１８と第２封止樹脂２０との境界３６を経由して外部と連続している。従って、この境界３６を経由して外部とショートする可能性が有るが、本形態では樹脂突起部１２を回路基板１４の端部から離間させることによりこのショートの危険性を少なくしている。 Furthermore, the distance L4 between the resin protrusion 12 and the circuit board 14 is set to 0.5 mm or more, for example. The side surface of the end portion of the circuit board 14 is a surface from which the metal material is exposed, and this portion is continuous with the outside via a boundary 36 between the first sealing resin 18 and the second sealing resin 20. Therefore, there is a possibility of short-circuiting with the outside via the boundary 36. In this embodiment, the risk of this short-circuit is reduced by separating the resin protrusion 12 from the end of the circuit board 14.
　尚、この樹脂突起部１２は必須の構成要素ではなく、後述する樹脂封止方法にて樹脂突起部１２以外の構成にて回路基板１４の下方の間隙が確保されれば、樹脂突起部１２は形成されない。 The resin projection 12 is not an essential component. If the gap below the circuit board 14 is secured by a configuration other than the resin projection 12 by a resin sealing method described later, the resin projection 12 Not formed.
　上記した第１封止樹脂１８および第２封止樹脂２０は、エポキシ樹脂等の樹脂材料、フィラーおよび硬化促進剤等の混合物である。ここで、第１封止樹脂１８と第２封止樹脂２０とは同じ材料から構成されても良いし、異なる材料から構成されても良い。 The first sealing resin 18 and the second sealing resin 20 described above are a mixture of a resin material such as an epoxy resin, a filler, a curing accelerator, and the like. Here, the 1st sealing resin 18 and the 2nd sealing resin 20 may be comprised from the same material, and may be comprised from a different material.
　例えば、第２封止樹脂２０に含まれるフィラーの量を、第１封止樹脂１８に含まれるフィラーの量よりも多くしても良い。具体的には、第２封止樹脂２０にフィラーが含まれる割合を８３重量％以上８７重量％以下（例えば８５重量％）とし、第１封止樹脂にフィラーが含まれる割合を７８重量％以上８２重量％以下（例えば８０重量％）とする。第２封止樹脂２０が大量のフィラーを含むことにより、第２封止樹脂２０の放熱性が良好となる。従って、半導体素子２８等の回路素子が動作することにより発生した熱が、回路基板１４および第２封止樹脂２０を経由して良好に外部に放出される。一方、第１封止樹脂１８に含まれるフィラーの量を少なくすることにより、樹脂注入の際に硬いフィラーが回路素子や金属細線３４に衝突する頻度が少なくなるので、樹脂封止の工程に於ける回路素子の損傷が抑制される。 For example, the amount of filler contained in the second sealing resin 20 may be larger than the amount of filler contained in the first sealing resin 18. Specifically, the ratio of the filler contained in the second sealing resin 20 is 83 wt% or more and 87 wt% or less (for example, 85 wt%), and the ratio of the filler contained in the first sealing resin is 78 wt% or more. 82 wt% or less (for example, 80 wt%). When the 2nd sealing resin 20 contains a lot of fillers, the heat dissipation of the 2nd sealing resin 20 becomes favorable. Therefore, the heat generated by the operation of the circuit element such as the semiconductor element 28 is released to the outside through the circuit board 14 and the second sealing resin 20. On the other hand, by reducing the amount of filler contained in the first sealing resin 18, the frequency with which the hard filler collides with the circuit elements and the fine metal wires 34 during resin injection is reduced. Damage to circuit elements is suppressed.
　また、第１封止樹脂１８に含まれるフィラーの種類と、第２封止樹脂２０に含まれるフィラーの種類を異ならせても良い。例えば、第２封止樹脂２０に含まれるフィラーとしてアルミナ（Ａｌ２Ｏ３）を採用し、第１封止樹脂１８に含まれるフィラーとしてシリカ（ＳｉＯ２）を採用しても良い。第２封止樹脂２０に含まれるフィラーとして熱伝導性に優れるアルミナを採用することにより、第２封止樹脂２０を経由した放熱の効果が向上される。更に、耐湿性に優れるシリカを、第１封止樹脂１８に含まれるフィラーとして採用することにより、第１封止樹脂１８を経由して外部から水分が侵入することが抑制されるので、第１封止樹脂１８により封止される回路素子のショートが防止される。更に、両樹脂にフィラーとしてアルミナおよびシリカが含まれる場合は、第２封止樹脂２０に採用されるフィラーにアルミナが含まれる割合を第１封止樹脂１８よりも多くしても良い。 Further, the type of filler contained in the first sealing resin 18 and the type of filler contained in the second sealing resin 20 may be different. For example, alumina (Al 2 O 3 ) may be employed as the filler contained in the second sealing resin 20, and silica (SiO 2 ) may be employed as the filler contained in the first sealing resin 18. By adopting alumina having excellent thermal conductivity as the filler contained in the second sealing resin 20, the effect of heat dissipation via the second sealing resin 20 is improved. Further, by adopting silica having excellent moisture resistance as a filler contained in the first sealing resin 18, it is possible to prevent moisture from entering from the outside via the first sealing resin 18. A short circuit of the circuit element sealed by the sealing resin 18 is prevented. Furthermore, when both resins contain alumina and silica as fillers, the proportion of alumina contained in the filler employed in the second sealing resin 20 may be greater than that of the first sealing resin 18.
　更に、第２封止樹脂２０が硬化収縮する量（収縮率）を第１封止樹脂１８よりも大きくしても良い。これにより、第２封止樹脂２０の収縮に伴う圧縮力が第１封止樹脂１８に作用し、両者が境界３６にて嵌合する作用が大きくなり剥離が防止される。 Furthermore, the amount (shrinkage rate) by which the second sealing resin 20 cures and shrinks may be larger than that of the first sealing resin 18. Thereby, the compressive force accompanying the shrinkage | contraction of the 2nd sealing resin 20 acts on the 1st sealing resin 18, the effect | action which both fit in the boundary 36 becomes large, and peeling is prevented.
　また、境界３６における第１封止樹脂１８と第２封止樹脂２０との嵌合作用をより大きくするために、第１封止樹脂１８の表面の粗度を一定以上にしても良い。例えば、第１封止樹脂１８の表面の粗度は、１３．０μＲＺ以上１５．０μＲＺ以下が好適である。これは、樹脂封止の工程にて、第１封止樹脂１８を成形するモールド金型の内壁を、同様の粗度を有する面とすることにより実現される。第１封止樹脂１８の表面の粗度を１３μＲＺ以上とすることにより、境界３６にて、第１封止樹脂１８の表面に第２封止樹脂２０を良好に嵌合できる。また、第１封止樹脂１８の表面の粗度を１５μＲＺ以下とすることで、第１封止樹脂１８を樹脂成形する際に、モールド金型から第１封止樹脂１８を良好に離型させることができる。 Further, in order to increase the fitting action between the first sealing resin 18 and the second sealing resin 20 at the boundary 36, the roughness of the surface of the first sealing resin 18 may be set to a certain level or more. For example, the roughness of the surface of the first sealing resin 18 is preferably 13.0 μRZ or more and 15.0 μRZ or less. This is realized by making the inner wall of the mold for molding the first sealing resin 18 into a surface having the same roughness in the resin sealing step. By setting the roughness of the surface of the first sealing resin 18 to 13 μRZ or more, the second sealing resin 20 can be satisfactorily fitted to the surface of the first sealing resin 18 at the boundary 36. In addition, by setting the surface roughness of the first sealing resin 18 to 15 μRZ or less, the first sealing resin 18 can be satisfactorily released from the mold when the first sealing resin 18 is resin-molded. be able to.
　図２を参照して、第１封止樹脂１８および第２封止樹脂２０の構成を更に説明する。この図は混成集積回路装置１０を上方から見た平面図であり、実際には見えない回路基板１４および第１封止樹脂１８の外縁を点線にて示している。 With reference to FIG. 2, the structure of the 1st sealing resin 18 and the 2nd sealing resin 20 is further demonstrated. This figure is a plan view of the hybrid integrated circuit device 10 as viewed from above, and the outer edges of the circuit board 14 and the first sealing resin 18 that are not actually seen are indicated by dotted lines.
　この図を参照して、まず第１封止樹脂１８の外縁（側辺）は、回路基板１４と第２封止樹脂２０の間に配置されている。また、紙面上で左右方向に対向する第１封止樹脂１８の側辺の中間部分は、例えば端部よりも２．０～３．０ｍｍ以上内側に配置されており、これにより凹状領域１３が形成されている。また、第２封止樹脂２０の側面中央部を内側に窪ませた固定部１９の一部は、この凹状領域１３に配置されている。 Referring to this figure, first, the outer edge (side) of the first sealing resin 18 is disposed between the circuit board 14 and the second sealing resin 20. Further, an intermediate portion of the side of the first sealing resin 18 facing in the left-right direction on the paper surface is disposed, for example, at an inner side of 2.0 to 3.0 mm or more from the end, whereby the concave region 13 is formed. Is formed. In addition, a part of the fixing portion 19 in which the central portion of the side surface of the second sealing resin 20 is recessed is disposed in the concave region 13.
　混成集積回路装置１０の使用状況下では、固定部１９にはネジ等の固定手段が固定されて応力が作用する。また、第１封止樹脂１８と第２封止樹脂２０との境界部分は異種材料の界面であるので、封止樹脂１６の他の部分と比較すると機械的強度が弱い。このことから本形態では、第１封止樹脂１８の側面を内側に窪ませて凹状領域１３を形成することで、第１封止樹脂１８と第２封止樹脂２０との界面を固定部１９から離間し、固定部１９に加えられる応力で界面から両樹脂が剥離することを防止している。更に、固定部１９の内側の端部が凹状領域１３に配置されるで、固定部１９を設けるために第１封止樹脂１８を紙面上にて左右方向に過度に拡大させる必要がなく、これにより装置全体が小型化される。 Under the usage condition of the hybrid integrated circuit device 10, a fixing means such as a screw is fixed to the fixing portion 19 and a stress acts. In addition, since the boundary portion between the first sealing resin 18 and the second sealing resin 20 is an interface of different materials, the mechanical strength is weaker than other portions of the sealing resin 16. Therefore, in the present embodiment, the side surface of the first sealing resin 18 is recessed inward to form the concave region 13, whereby the interface between the first sealing resin 18 and the second sealing resin 20 is fixed to the fixing portion 19. The two resins are prevented from being separated from the interface by the stress applied to the fixing portion 19. Furthermore, since the inner end portion of the fixing portion 19 is disposed in the concave region 13, there is no need to excessively enlarge the first sealing resin 18 in the left-right direction on the paper surface in order to provide the fixing portion 19. As a result, the entire apparatus is downsized.
　また、第１封止樹脂１８の各角部の下面には、上記した樹脂突起部１２が配置されている。 Further, the resin protrusions 12 described above are arranged on the lower surfaces of the respective corners of the first sealing resin 18.
　図３および図４を参照して、次に、第１封止樹脂１８の形状を更に説明する。図３（Ａ）は第１封止樹脂１８を示す斜視図であり、図３（Ｂ）は第１封止樹脂１８の角部を拡大して示す斜視図であり、図４（Ａ）は図３（Ａ）のＢ－Ｂ’線での断面図であり、図４（Ｂ）は回路基板１４を示す平面図である。 Next, the shape of the first sealing resin 18 will be further described with reference to FIGS. 3A is a perspective view showing the first sealing resin 18, FIG. 3B is an enlarged perspective view showing a corner of the first sealing resin 18, and FIG. FIG. 4 is a cross-sectional view taken along line BB ′ in FIG. 3A, and FIG. 4B is a plan view showing the circuit board 14.
　図３（Ａ）および図４（Ａ）を参照して、第１封止樹脂１８の４隅は、紙面上左右方向に突出する突出部２１を呈すると共に、回路基板１４の上面が第１封止樹脂１８から露出する露出部２５が形成されている。この露出部２５は、回路基板１４を第１封止樹脂１８で樹脂封止する工程にて、金型で回路基板１４の上面を押圧固定することで形成される部位である。従って、第１封止樹脂１８を形成する工程にて、回路基板１４を金型で押圧しなければ、第１封止樹脂１８に露出部は形成されない。また、各突出部２１の下面には、図１（Ｃ）に示した樹脂突起部１２が設けられている。 Referring to FIGS. 3A and 4A, the four corners of the first sealing resin 18 exhibit protrusions 21 protruding in the left-right direction on the paper surface, and the upper surface of the circuit board 14 is the first sealing. An exposed portion 25 exposed from the stop resin 18 is formed. The exposed portion 25 is a portion formed by pressing and fixing the upper surface of the circuit board 14 with a mold in the step of resin-sealing the circuit board 14 with the first sealing resin 18. Therefore, in the step of forming the first sealing resin 18, the exposed portion is not formed in the first sealing resin 18 unless the circuit board 14 is pressed with a mold. Moreover, the resin projection part 12 shown in FIG.1 (C) is provided in the lower surface of each protrusion part 21. As shown in FIG.
　図３（Ｂ）を参照して、突出部２１には、露出部２５を両側から囲むように、壁部２３Ａ、２３Ｂが設けられている。ここで、外側に配置された壁部２３Ｂの高さＬ１２は、内側に配置された壁部２３Ａの高さＬ１１よりも低く設定されている。即ち、外側の壁部２３Ｂの上面は、内側の壁部２３Ａの上面よりも下方に配置されている。これにより、樹脂封止の工程にて露出部２５が形成される凹状の部分に樹脂が行き渡らずにボイドが発生することが防止される。具体的には、樹脂封止の工程にて露出部２５の部分に流入した液状の樹脂は、低い外側の壁部２３Ｂの上方を外側に向かって流動する。これにより、露出部２５が設けられた凹状部分に充分に樹脂が行き渡り、ボイドが防止される。この事項は、他の突出部２１に関しても同様である。 Referring to FIG. 3B, wall portions 23A and 23B are provided on projecting portion 21 so as to surround exposed portion 25 from both sides. Here, the height L12 of the wall portion 23B disposed on the outer side is set to be lower than the height L11 of the wall portion 23A disposed on the inner side. That is, the upper surface of the outer wall portion 23B is disposed below the upper surface of the inner wall portion 23A. This prevents the resin from reaching the concave portion where the exposed portion 25 is formed in the resin sealing step and generating voids. Specifically, the liquid resin that has flowed into the exposed portion 25 in the resin sealing step flows outwardly above the lower outer wall portion 23B. Thereby, resin spreads enough to the concave part in which the exposed part 25 was provided, and a void is prevented. The same applies to the other protrusions 21.
　図４（Ｂ）を参照して、第１封止樹脂１８から回路基板１４の上面が露出する露出部２５は、回路基板１４の４隅に設けられる。具体的には、露出部２５は、回路基板１４の端部から半径１０．０ｍｍ～５．０ｍｍ以内の領域に設けられる。この角部の領域は、プレス加工やダイシング加工により回路基板１４の上面を被覆する絶縁層２６にクラックが生じている場合が多いので、導電パターン２２や半導体素子２８等の回路素子は配置されていない。このことから、この角部の回路基板１４の上面が露出部２５として第１封止樹脂１８から外部に露出しても、回路基板１４の上面に組み込まれる混成集積回路には悪影響は及ばない。 Referring to FIG. 4B, exposed portions 25 where the upper surface of the circuit board 14 is exposed from the first sealing resin 18 are provided at the four corners of the circuit board 14. Specifically, the exposed portion 25 is provided in a region within a radius of 10.0 mm to 5.0 mm from the end portion of the circuit board 14. In this corner area, the insulating layer 26 covering the upper surface of the circuit board 14 is often cracked by pressing or dicing, so that circuit elements such as the conductive pattern 22 and the semiconductor element 28 are arranged. Absent. Therefore, even if the upper surface of the corner circuit board 14 is exposed to the outside as the exposed portion 25 from the first sealing resin 18, there is no adverse effect on the hybrid integrated circuit incorporated on the upper surface of the circuit board 14.
　図５から図７を参照して、次に、上記した構成の混成集積回路装置の製造方法を説明する。図５は上記した第１封止樹脂１８を形成する１回目のトランスファーモールドを示し、図６は第２封止樹脂２０を形成する２回目のトランスファーモールドを示す。図７は、イジェクトピンの動作を示す図である。 Next, a method for manufacturing a hybrid integrated circuit device having the above-described configuration will be described with reference to FIGS. FIG. 5 shows a first transfer mold for forming the first sealing resin 18 described above, and FIG. 6 shows a second transfer mold for forming the second sealing resin 20. FIG. 7 is a diagram illustrating the operation of the eject pin.
　図５を参照して、まず、第１封止樹脂１８で回路基板１４を被覆する工程を説明する。図５（Ａ）は本工程で製造される第１封止樹脂１８を示す斜視図であり、図５（Ｂ）および図５（Ｃ）はトランスファーモールドを行う本工程を示す断面図である。ここで、図５（Ｂ）の断面図は図５（Ａ）のＢ－Ｂ’線に対応し、図５（Ｃ）の断面図は図５（Ａ）のＣ－Ｃ’線に対応している。 Referring to FIG. 5, first, a process of covering the circuit board 14 with the first sealing resin 18 will be described. FIG. 5A is a perspective view showing the first sealing resin 18 manufactured in this step, and FIGS. 5B and 5C are cross-sectional views showing this step in which transfer molding is performed. Here, the cross-sectional view in FIG. 5B corresponds to the line BB ′ in FIG. 5A, and the cross-sectional view in FIG. 5C corresponds to the line CC ′ in FIG. ing.
　図５（Ｂ）を参照して、まず、半導体素子等の回路素子が上面に組み込まれた回路基板１４を金型２７に収納する。具体的には、回路基板１４の上面に半導体素子等の回路素子を固着し、この回路素子と導電パターンとを電気的に接続する。更に、回路基板１４の周辺部に配置されたパッドにリード２４を固着する。その後、下金型３１に回路基板１４を収納して下金型３１に上金型２９を当接させることで、両金型の間隙として形成されるキャビティ３９に回路基板１４が収納される。また、リード２４は上下方向から上金型２９および下金型３１により挟持されることで固定され、これによりキャビティ３９の内部に於ける回路基板１４の位置が厚み方向および左右方向に対して固定される。更にまた、金型２７でリード２４を狭持することにより回路基板１４の下面が下金型３１の内壁に当接し、これにより本工程では回路基板１４の下面が第１封止樹脂１８で覆われず露出することに成る。 Referring to FIG. 5B, first, the circuit board 14 in which circuit elements such as semiconductor elements are incorporated on the upper surface is housed in the mold 27. Specifically, a circuit element such as a semiconductor element is fixed to the upper surface of the circuit board 14, and the circuit element and the conductive pattern are electrically connected. Further, the leads 24 are fixed to the pads arranged around the circuit board 14. Thereafter, the circuit board 14 is housed in the lower mold 31 and the upper mold 29 is brought into contact with the lower mold 31 so that the circuit board 14 is housed in the cavity 39 formed as a gap between the two molds. The lead 24 is fixed by being sandwiched between the upper die 29 and the lower die 31 from above and below, whereby the position of the circuit board 14 in the cavity 39 is fixed in the thickness direction and the left-right direction. Is done. Furthermore, the lower surface of the circuit board 14 is brought into contact with the inner wall of the lower mold 31 by holding the leads 24 with the mold 27, whereby the lower surface of the circuit board 14 is covered with the first sealing resin 18 in this step. It will be exposed.
　次に、図５（Ｃ）を参照して、加熱されることで液状または半固形の状態となった第１封止樹脂１８を、キャビティ３９に注入する。本形態では、図５（Ａ）および図５（Ｃ）を参照して、リード２４が導出しない側辺にゲート４２を設け、ゲート４２に対向する位置にエアベント４４を設けている。従って、ゲート４２から第１封止樹脂１８を注入するに従い、キャビティ３９内部の空気はエアベント４４を経由して外部に放出される。 Next, referring to FIG. 5C, the first sealing resin 18 that has been heated to be in a liquid or semi-solid state is injected into the cavity 39. In this embodiment, referring to FIGS. 5A and 5C, a gate 42 is provided on the side where the lead 24 is not led out, and an air vent 44 is provided at a position facing the gate 42. Therefore, as the first sealing resin 18 is injected from the gate 42, the air inside the cavity 39 is released to the outside via the air vent 44.
　キャビティ３９の全域に第１封止樹脂１８が注入されることで、回路基板１４の側面および上面、半導体素子等の回路素子が第１封止樹脂１８により樹脂封止される。一方、回路基板１４の下面は下金型３１の内壁に当接しているので第１封止樹脂１８では基本的に被覆されない。しかしながら、回路基板１４の下面と下金型３１の内壁との間に間隙がある場合は、この間隙に進入した第１封止樹脂１８から成る薄い樹脂膜により回路基板１４の下面が被覆される。 By injecting the first sealing resin 18 over the entire area of the cavity 39, the side and upper surfaces of the circuit board 14 and circuit elements such as semiconductor elements are resin-sealed with the first sealing resin 18. On the other hand, since the lower surface of the circuit board 14 is in contact with the inner wall of the lower mold 31, it is basically not covered with the first sealing resin 18. However, when there is a gap between the lower surface of the circuit board 14 and the inner wall of the lower mold 31, the lower surface of the circuit board 14 is covered with a thin resin film made of the first sealing resin 18 that has entered the gap. .
　キャビティ３９に注入された第１封止樹脂１８が加熱硬化したら、上金型２９と下金型３１とを離型し、第１封止樹脂１８を金型２７から取り出す。本工程では、上金型２９に円筒状の孔部を設け、この孔部にイジェクトピン３８が収納されている。イジェクトピン３８の下面は、キャビティ３９に第１封止樹脂１８を封入する間は上金型２９の内壁と同一平面上に位置し、第１封止樹脂１８が硬化した後に金型２７から第１封止樹脂１８を取り出す際に、下方に移動する。これにより、成形された第１封止樹脂１８がイジェクトピン３８により押し出されて離型される。イジェクトピン３８は、上金型２９に４つ設けられ、これに対応して第１封止樹脂１８の上面には、押圧痕としての当接部４０が設けられる（図５（Ａ）参照）。 When the first sealing resin 18 injected into the cavity 39 is heated and cured, the upper mold 29 and the lower mold 31 are released, and the first sealing resin 18 is taken out from the mold 27. In this step, a cylindrical hole is provided in the upper mold 29, and the eject pin 38 is accommodated in this hole. The lower surface of the eject pin 38 is positioned on the same plane as the inner wall of the upper mold 29 while the first sealing resin 18 is sealed in the cavity 39. After the first sealing resin 18 is cured, When the 1 sealing resin 18 is taken out, it moves downward. As a result, the molded first sealing resin 18 is pushed out by the eject pin 38 and released. Four eject pins 38 are provided on the upper mold 29, and correspondingly, a contact portion 40 as a press mark is provided on the upper surface of the first sealing resin 18 (see FIG. 5A). .
　図５（Ｂ）を参照して、リード２４が導出される側辺では、上金型２９の側面は下部が上部よりも外側に広がる傾斜面であり、下金型３１の側面は上部が下部よりも外側に広がる傾斜面である。両金型の側面がこの様な形状を呈することにより、キャビティ３９で成形された第１封止樹脂を、両金型の内壁から容易に離型することができる。 Referring to FIG. 5B, on the side where the lead 24 is led out, the side surface of the upper mold 29 is an inclined surface in which the lower part extends outward from the upper part, and the side surface of the lower mold 31 is lower at the upper part. It is an inclined surface that spreads outward. Since the side surfaces of both molds have such a shape, the first sealing resin molded in the cavity 39 can be easily released from the inner walls of both molds.
　一方、図５（Ｃ）を参照して、リード２４が導出しない側辺では、上金型２９の側面は下部が上部よりも外側に傾斜する傾斜面であり、下金型３１は側面を有さない。このようにすることで、成形される第１封止樹脂１８の側面が一様に傾斜する傾斜面と成り、後に形成される第２封止樹脂とのアンカー効果が得られる。 On the other hand, referring to FIG. 5C, on the side where the lead 24 is not led out, the side surface of the upper mold 29 is an inclined surface in which the lower part is inclined outward from the upper part, and the lower mold 31 has a side surface. No. By doing in this way, the side surface of the 1st sealing resin 18 shape | molded becomes an inclined surface which inclines uniformly, and the anchor effect with the 2nd sealing resin formed later is acquired.
　図５（Ｃ）を参照して、本工程では、回路基板１４の周辺部にて下金型３１の内壁を部分的に窪ませた凹部７６を設けている。本工程にてこの凹部７６に第１封止樹脂１８が注入されることで、図４（Ａ）に示す樹脂突起部１２が形成される。この樹脂突起部１２は、次工程にて回路基板１４のクリアランスを確保するためのものである。しかしながら、次工程で樹脂突起部１２以外を用いた方法でクリアランスが確保される場合は、樹脂突起部１２が形成されなくても良い。 Referring to FIG. 5C, in this step, a recess 76 is provided in which the inner wall of the lower mold 31 is partially recessed at the periphery of the circuit board 14. By injecting the first sealing resin 18 into the recess 76 in this step, the resin protrusion 12 shown in FIG. 4A is formed. This resin protrusion 12 is for ensuring the clearance of the circuit board 14 in the next step. However, when the clearance is ensured by a method using a part other than the resin protrusion 12 in the next step, the resin protrusion 12 may not be formed.
　更に本工程では、上金型２９の内壁の一部を内側に突出させて押圧部４１を設け、この押圧部４１で回路基板１４の周辺端部を押圧しても良い。具体的には、図５（Ａ）に示した露出部２５に対応する箇所および形状で、回路基板１４の上面の周端部を上方から押圧している。これにより、回路基板１４は厚み方向に固定されて樹脂封止時の移動が防止される。更には、押圧部４１の押圧力により回路基板１４の下面が下金型３１の側壁に密着するので、回路基板１４の下面に第１封止樹脂１８が侵入することが抑制される。 Further, in this step, a pressing portion 41 may be provided by projecting a part of the inner wall of the upper mold 29 inward, and the peripheral end portion of the circuit board 14 may be pressed by the pressing portion 41. Specifically, the peripheral end portion of the upper surface of the circuit board 14 is pressed from above at a location and shape corresponding to the exposed portion 25 shown in FIG. Thereby, the circuit board 14 is fixed in the thickness direction, and movement during resin sealing is prevented. Furthermore, since the lower surface of the circuit board 14 comes into close contact with the side wall of the lower mold 31 by the pressing force of the pressing portion 41, the first sealing resin 18 is prevented from entering the lower surface of the circuit board 14.
　また、本工程で用いる金型２７の内壁は粗面形状と成っている。具体的には、金型２７の内壁は、第１封止樹脂１８の表面の粗度が１３．０μＲＺ以上１５．０μＲＺ以下と成るような形状を呈している。この範囲であれば、第１金型２７の内壁から容易に第１封止樹脂１８を離型できる。 Also, the inner wall of the mold 27 used in this process has a rough surface shape. Specifically, the inner wall of the mold 27 has a shape such that the surface roughness of the first sealing resin 18 is 13.0 μRZ or more and 15.0 μRZ or less. Within this range, the first sealing resin 18 can be easily released from the inner wall of the first mold 27.
　上記工程により、図５（Ａ）に示す形状の第１封止樹脂１８が形成される、図１を参照して上記したように、第１封止樹脂１８のリード２４が導出する側面は、リード２４が導出する中間部分が外側に向かって突出する傾斜面である。一方、リード２４が導出しない第１封止樹脂１８の側面は上部が内側に傾く一様な傾斜面であり、これにより次工程で形成される第２封止樹脂とのアンカー効果が発生する。更に、第１封止樹脂１８の上面は平坦面であり、これにより次工程にて金型内壁に安定して第１封止樹脂の上面全域を当接できる。 By the above process, the first sealing resin 18 having the shape shown in FIG. 5A is formed. As described above with reference to FIG. 1, the side surface from which the lead 24 of the first sealing resin 18 leads is An intermediate portion from which the lead 24 is led out is an inclined surface protruding outward. On the other hand, the side surface of the first sealing resin 18 from which the lead 24 is not led out is a uniform inclined surface in which the upper portion is inclined inward, thereby generating an anchor effect with the second sealing resin formed in the next step. Furthermore, the upper surface of the first sealing resin 18 is a flat surface, which allows the entire upper surface of the first sealing resin to be in contact with the inner wall of the mold stably in the next step.
　図６を参照して、次に、２回目のトランスファーモールドを行い、上記工程にて形成された第１封止樹脂１８と回路基板１４とを第２封止樹脂で被覆する。図６（Ａ）は本工程で製造される第２封止樹脂２０を示す斜視図であり、図６（Ｂ）および図６（Ｃ）は本工程を示す断面図である。ここで、図６（Ｂ）は図６（Ａ）のＢ－Ｂ’線に対応する断面図であり、図６（Ｃ）は図６（Ａ）のＣ－Ｃ’線に対応する断面図である。 Referring to FIG. 6, the second transfer molding is then performed, and the first sealing resin 18 and the circuit board 14 formed in the above process are covered with the second sealing resin. FIG. 6A is a perspective view showing the second sealing resin 20 manufactured in this step, and FIG. 6B and FIG. 6C are cross-sectional views showing this step. 6B is a cross-sectional view corresponding to the line BB ′ in FIG. 6A, and FIG. 6C is a cross-sectional view corresponding to the line CC ′ in FIG. 6A. It is.
　本工程では、最初に、上金型５２および下金型５４から成る金型５０を用意する。金型５０のキャビティ５６は、先工程で用いた金型２７のキャビティ３９よりも若干大きく形成され、その内壁形状は図６（Ａ）に示す樹脂部分の形状と同様である。 In this step, first, a mold 50 including an upper mold 52 and a lower mold 54 is prepared. The cavity 56 of the mold 50 is formed slightly larger than the cavity 39 of the mold 27 used in the previous step, and the inner wall shape is the same as the shape of the resin portion shown in FIG.
　具体的な封止方法は、先ず、第１封止樹脂１８で樹脂封止された回路基板１４を、下金型５４に配置し、下金型５４に上金型５２を当接させることで形成されるキャビティ５６の内部に回路基板１４を収納する。また、リード２４が上金型５２および下金型５４で挟持されることにより、キャビティ５６の内部に於ける回路基板１４の位置が固定される。 A specific sealing method is as follows. First, the circuit board 14 that is resin-sealed with the first sealing resin 18 is disposed in the lower mold 54, and the upper mold 52 is brought into contact with the lower mold 54. The circuit board 14 is accommodated in the cavity 56 to be formed. Further, the position of the circuit board 14 inside the cavity 56 is fixed by sandwiching the lead 24 between the upper mold 52 and the lower mold 54.
　図６（Ｂ）に示す断面では、上金型５２の側面は下部が外側に広がる傾斜面であり、下金型５４の側面は上部が外側に広がる傾斜面である。これにより、先回と同様に、本工程で成形される第２封止樹脂２０を金型５０の内壁から容易に離型できる。 In the cross section shown in FIG. 6 (B), the side surface of the upper mold 52 is an inclined surface whose lower portion extends outward, and the side surface of the lower mold 54 is an inclined surface whose upper portion extends outward. Thereby, the 2nd sealing resin 20 shape | molded by this process can be easily released from the inner wall of the metal mold | die 50 similarly to last time.
　また、この断面では、回路基板１４の下面と下金型５４の内壁との距離Ｌ１は、第１封止樹脂１８の側面と下金型５４および上金型５２の側壁との距離Ｌ２と、同様である。具体的には、Ｌ１およびＬ２の距離は、例えば０．１ｍｍ以上０．３ｍｍ以下の範囲である。このようにすることで、キャビティ５６に注入された第２封止樹脂２０が、回路基板１４の下方および第１封止樹脂１８の側方に一様に充填され、ボイドが抑制される。 In this cross section, the distance L1 between the lower surface of the circuit board 14 and the inner wall of the lower mold 54 is the distance L2 between the side surface of the first sealing resin 18 and the side walls of the lower mold 54 and the upper mold 52. It is the same. Specifically, the distance between L1 and L2 is, for example, in a range from 0.1 mm to 0.3 mm. By doing in this way, the 2nd sealing resin 20 inject | poured into the cavity 56 is uniformly filled under the circuit board 14 and the side of the 1st sealing resin 18, and a void is suppressed.
　本工程では、図６（Ｃ）を参照して、金型５０で第１封止樹脂１８を押圧することによりキャビティ５６の内部に於ける第１封止樹脂１８の位置を強固に固定している。具体的には、平坦な第１封止樹脂１８の上面全域が上金型５２の内壁に当接し、第１封止樹脂１８の下面に設けた樹脂突起部１２が下金型５４の内壁に当接している。これにより、回路基板１４の下面は、樹脂突起部１２の厚み（Ｌ１）で下金型５４の内壁と離間される。 In this step, referring to FIG. 6C, the position of the first sealing resin 18 inside the cavity 56 is firmly fixed by pressing the first sealing resin 18 with the mold 50. Yes. Specifically, the entire upper surface of the flat first sealing resin 18 contacts the inner wall of the upper mold 52, and the resin protrusion 12 provided on the lower surface of the first sealing resin 18 is formed on the inner wall of the lower mold 54. It is in contact. As a result, the lower surface of the circuit board 14 is separated from the inner wall of the lower mold 54 by the thickness (L1) of the resin protrusion 12.
　次に、図６（Ｃ）を参照して、液状の第２封止樹脂２０をゲート５８からキャビティ５６に注入する。注入された第２封止樹脂２０は、先ず第１封止樹脂の左側の領域５６Ａに充填される。第２封止樹脂２０が領域５６Ａに充填された後は、回路基板１４の下面と下金型５４の内壁との間の狭い間隙に第２封止樹脂２０が充填される。これと同時に図６（Ｂ）を参照して、第１封止樹脂１８の側面と下金型５４および上金型５２の側壁との間の間隙にも第２封止樹脂２０が充填される。その後、図６（Ｃ）を参照して、紙面上にて第１封止樹脂１８の右側の領域５６Ｂに第２封止樹脂２０が充填されると、本工程の樹脂充填が完了する。また、第２封止樹脂２０の充填に伴い、キャビティ５６の空気はエアベント６０を経由して外部に放出される。 Next, referring to FIG. 6C, the liquid second sealing resin 20 is injected from the gate 58 into the cavity 56. The injected second sealing resin 20 is first filled in the region 56A on the left side of the first sealing resin. After the second sealing resin 20 is filled in the region 56 </ b> A, the second sealing resin 20 is filled in a narrow gap between the lower surface of the circuit board 14 and the inner wall of the lower mold 54. At the same time, referring to FIG. 6B, the second sealing resin 20 is also filled in the gap between the side surface of the first sealing resin 18 and the side walls of the lower mold 54 and the upper mold 52. . Thereafter, referring to FIG. 6C, when the second sealing resin 20 is filled in the region 56B on the right side of the first sealing resin 18 on the paper surface, the resin filling in this step is completed. Further, as the second sealing resin 20 is filled, the air in the cavity 56 is discharged to the outside via the air vent 60.
　本工程では、上記したように、図６（Ｃ）に示す回路基板１４の下方の間隙と、図６（Ｂ）に示す第１封止樹脂１８の側方の間隙の幅が略同一に設定されている。従って、両領域に満遍なく第２封止樹脂２０が充填されるので、回路基板１４の下方の間隙が例えば０．２ｍｍ程度に狭く設定されても、この領域にボイド無く第２封止樹脂２０を充填させることが可能となる。 In this step, as described above, the gap below the circuit board 14 shown in FIG. 6C and the width of the gap on the side of the first sealing resin 18 shown in FIG. 6B are set to be substantially the same. Has been. Accordingly, since the second sealing resin 20 is uniformly filled in both regions, even if the gap below the circuit board 14 is set to be narrow, for example, about 0.2 mm, the second sealing resin 20 is not voided in this region. It can be filled.
　更に、先工程と同様に、本工程で用いる上金型５２にもイジェクトピン６２が設けられており、第２封止樹脂２０の充填が終了した後に、第１封止樹脂１８の上面をイジェクトピン６２で下方に押圧することにより、第２封止樹脂２０で樹脂封止された回路基板１４を金型５０から取り出す。 Further, as in the previous step, the upper mold 52 used in this step is also provided with an eject pin 62, and after the filling of the second sealing resin 20 is completed, the upper surface of the first sealing resin 18 is ejected. The circuit board 14 resin-sealed with the second sealing resin 20 is taken out from the mold 50 by pressing downward with the pins 62.
　更に本工程では、回路基板１４の下方のクリアランスを一定に確保するために樹脂突起部１２を用いていたが、他の手法が用いられても良い。例えば、樹脂突起部１２に対応する箇所の下金型５４を上方に突起させて固定ピン（固定突起部）を設け、この固定ピンを第１封止樹脂１８の下面に当接させてクリアランスを確保しても良い。更には、この固定ピンに替えて可動ピンが採用されても良い。 Furthermore, in this step, the resin protrusion 12 is used to ensure a constant clearance below the circuit board 14, but other methods may be used. For example, the lower mold 54 at a position corresponding to the resin protrusion 12 is protruded upward to provide a fixing pin (fixing protrusion), and this fixing pin is brought into contact with the lower surface of the first sealing resin 18 to provide clearance. It may be secured. Furthermore, a movable pin may be employed instead of the fixed pin.
　図７を参照して、上記した工程で用いられるイジェクトピンに関して更に説明する。図７（Ａ）は第１封止樹脂を形成する工程にて用いられるイジェクトピン３８を示し、図７（Ｂ）は第２封止樹脂を形成する工程にて使用されるイジェクトピン６２を示す。 Referring to FIG. 7, the eject pin used in the above process will be further described. 7A shows the eject pin 38 used in the step of forming the first sealing resin, and FIG. 7B shows the eject pin 62 used in the step of forming the second sealing resin. .
　図７（Ａ）を参照して、第１封止樹脂１８を射出成形する工程では、上金型２９に設けた孔部４３にイジェクトピン３８は収納された状態となっており、イジェクトピン３８の下面は上金型２９の内壁と同一平面上に配置されている。 With reference to FIG. 7A, in the step of injection molding the first sealing resin 18, the eject pin 38 is housed in the hole 43 provided in the upper mold 29. Is disposed on the same plane as the inner wall of the upper mold 29.
　しかしながら、孔部４３とイジェクトピン３８との間には、摩耗が進行すると僅かな間隙が存在しており、この間隙に第１封止樹脂１８が侵入することにより、第１封止樹脂１８の上面が局所的に上方に突出する樹脂バリ６６が形成される。 However, a slight gap exists between the hole 43 and the eject pin 38 as wear progresses, and the first sealing resin 18 penetrates into this gap, so that the first sealing resin 18 A resin burr 66 whose upper surface locally protrudes upward is formed.
　図７（Ｂ）を参照して、この樹脂バリ６６をそのままの状態にして２回目のトランスファーモールドを行うと、樹脂バリ６６が第２金型の上金型５２の内壁に接触して、第２金型の内部に於ける第１封止樹脂１８の位置がずれる恐れがある。 Referring to FIG. 7B, when the second transfer molding is performed with the resin burr 66 left as it is, the resin burr 66 comes into contact with the inner wall of the upper mold 52 of the second mold, There is a possibility that the position of the first sealing resin 18 inside the two molds is shifted.
　そこで本形態では、第１金型に設けられるイジェクトピン３８と、第２金型に設けられるイジェクトピン６２の位置を対応（重畳）させている。更に、第２金型でイジェクトピン６２が設けられる孔部６４を、第１金型でイジェクトピン３８が設けられる孔部４３よりも平面視で大きく形成している。更にまた、第２封止樹脂を樹脂封止する工程では、イジェクトピン６２の下端を、上金型５２の内壁よりも上方に配置している。これにより、樹脂バリ６６が孔部６４に収納されるので、樹脂バリ６６が上金型５２の内壁に当接することが防止され、上金型５２の内壁が第１封止樹脂１８の上面に密着する。 Therefore, in this embodiment, the positions of the eject pin 38 provided in the first mold and the eject pin 62 provided in the second mold are made to correspond (overlapping). Further, the hole 64 provided with the eject pin 62 in the second mold is formed larger in plan view than the hole 43 provided with the eject pin 38 in the first mold. Furthermore, in the step of resin-sealing the second sealing resin, the lower end of the eject pin 62 is disposed above the inner wall of the upper mold 52. Accordingly, since the resin burr 66 is accommodated in the hole 64, the resin burr 66 is prevented from coming into contact with the inner wall of the upper mold 52, and the inner wall of the upper mold 52 is placed on the upper surface of the first sealing resin 18. In close contact.
　上記工程が終了した後は、リード２４を所定の形状や長さに成形する工程、内蔵される混成集積回路装置の特性を検査する工程を経て、図１に示す混成集積回路装置１０が製造される。 After the above steps are completed, the hybrid integrated circuit device 10 shown in FIG. 1 is manufactured through a step of forming the lead 24 into a predetermined shape and length and a step of inspecting the characteristics of the built-in hybrid integrated circuit device. The
１０     混成集積回路装置
１２     樹脂突起部
１３     凹状領域
１４     回路基板
１６     封止樹脂
１８     第１封止樹脂
１９     固定部
２０     第２封止樹脂
２１     突出部
２２     導電パターン
２３Ａ，２３Ｂ            壁部
２４     リード
２５     露出部
２６     絶縁層
２７     金型
２８     半導体素子
２９     上金型
３０     チップ素子
３１     下金型
３２     収納部
３４     金属細線
３６     境界
３８     イジェクトピン
３９     キャビティ
４０     当接部
４１     押圧部
４２     ゲート
４３     孔部
４４     エアベント
５０     金型
５２     上金型
５４     下金型
５６     キャビティ
５６Ａ，５６Ｂ            領域
５８     ゲート
６０     エアベント
６２     イジェクトピン
６４     孔部
６６     樹脂バリ DESCRIPTION OF SYMBOLS 10 Hybrid integrated circuit device 12 Resin protrusion part 13 Concave area 14 Circuit board 16 Sealing resin 18 First sealing resin 19 Fixing part 20 Second sealing resin 21 Protrusion part 22 Conductive pattern 23A, 23B Wall part 24 Lead 25 Exposed part 26 Insulating layer 27 Mold 28 Semiconductor element 29 Upper mold 30 Chip element 31 Lower mold 32 Storage part 34 Metal wire 36 Boundary 38 Eject pin 39 Cavity 40 Contact part 41 Press part 42 Gate 43 Hole part 44 Air vent 50 Mold 52 Upper mold 54 Lower mold 56 Cavity 56A, 56B Region 58 Gate 60 Air vent 62 Eject pin 64 Hole 66 Resin burr

Claims (10)

  1. 　その上面に回路素子を実装した基板を第１金型に収納し、前記基板の下面を前記第１金型の内壁に接触させて前記基板を第１封止樹脂により封止する第１工程と、
    　前記第１封止樹脂で封止された基板を第２金型に収納し、前記第１封止樹脂の表面を挟持して前記基板を含めて第２封止樹脂で封止する第２工程と、を備えることを特徴とする回路装置の製造方法。     A first step in which a substrate having circuit elements mounted on the upper surface is housed in a first mold, the lower surface of the substrate is brought into contact with an inner wall of the first mold, and the substrate is sealed with a first sealing resin; ,
    A second step of storing the substrate sealed with the first sealing resin in a second mold, sandwiching the surface of the first sealing resin, and sealing with the second sealing resin including the substrate. And a method of manufacturing a circuit device.
  2. 　前記第１工程では、前記基板の上面を部分的に押圧して、前記基板の下面を前記第１金型に当接させることを特徴とする請求項１に記載に回路装置の製造方法。 2. The method of manufacturing a circuit device according to claim 1, wherein, in the first step, the upper surface of the substrate is partially pressed so that the lower surface of the substrate is brought into contact with the first mold.
  3. 　前記第１工程では、前記基板の４隅付近を押圧固定することを特徴とする請求項２に記載の回路装置の製造方法。 3. The circuit device manufacturing method according to claim 2, wherein in the first step, the four corners of the substrate are pressed and fixed.
  4. 　前記押圧固定される部分の前基板の上面は、前記第２工程にて前記第２封止樹脂により被覆されることを特徴とする請求項２または請求項３に記載に回路装置の製造方法。 4. The method of manufacturing a circuit device according to claim 2, wherein an upper surface of the front substrate of the portion to be pressed and fixed is covered with the second sealing resin in the second step.
  5. 　前記第２工程において前記基板の下面に一定膜厚の第２封止樹脂を形成することを特徴とする請求項１から請求項４いずれかに記載の回路装置の製造方法。 5. The method of manufacturing a circuit device according to claim 1, wherein a second sealing resin having a constant film thickness is formed on the lower surface of the substrate in the second step.
  6. 　前記第１封止樹脂の表面の少なくとも一部を、前記一定膜厚の第２封止樹脂で被覆することを特徴とする請求項５に記載の回路装置の製造方法。 6. The method of manufacturing a circuit device according to claim 5, wherein at least a part of the surface of the first sealing resin is covered with the second sealing resin having the constant film thickness.
  7. 　前記第１工程および前記第２工程では、トランスファーモールドにより前記第１封止樹
    脂および前記第２封止樹脂を形成することを特徴とする請求項１から請求項６の何れかに
    記載の回路装置の製造方法。     The circuit device according to claim 1, wherein in the first step and the second step, the first sealing resin and the second sealing resin are formed by transfer molding. Manufacturing method.
  8. 　前記第２金型に、前記第１封止樹脂と当接し、前記一定膜厚に対応する固定突起部を設けたことを特徴とする請求項５から請求項７の何れかに記載の回路装置の製造方法。 8. The circuit device according to claim 5, wherein the second mold is provided with a fixing protrusion that contacts the first sealing resin and corresponds to the constant film thickness. 9. Manufacturing method.
  9. 　前記第２金型に、前記第１封止樹脂と当接し、前記一定膜厚に対応する可動ピンを設けたことを特徴とする請求項５から請求項７の何れかに記載の回路装置の製造方法。 8. The circuit device according to claim 5, wherein the second mold is provided with a movable pin that comes into contact with the first sealing resin and corresponds to the constant film thickness. 9. Production method.
  10. 　第１封止樹脂から露出する前記基板の下面が第２封止樹脂により被覆されることを特徴とする請求項１から請求項９の何れかに記載の回路装置の製造方法。 10. The method for manufacturing a circuit device according to claim 1, wherein a lower surface of the substrate exposed from the first sealing resin is covered with a second sealing resin.
PCT/JP2012/006873 2011-10-28 2012-10-26 Circuit device manufacturing method WO2013061603A1 (en)

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JP2011237613A JP2013098247A (en) 2011-10-28 2011-10-28 Manufacturing method of circuit device

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0825860A (en) * 1994-07-11 1996-01-30 Sharp Corp Integrally molding method for circuit board
JPH1022435A (en) * 1996-07-02 1998-01-23 Hitachi Ltd Semiconductor device and manufacture thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0825860A (en) * 1994-07-11 1996-01-30 Sharp Corp Integrally molding method for circuit board
JPH1022435A (en) * 1996-07-02 1998-01-23 Hitachi Ltd Semiconductor device and manufacture thereof

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