WO2013058352A1 - Group iii nitride semiconductor crystal - Google Patents

Abstract

Since a group III nitride semiconductor crystal such as gallium nitride sometimes suffers from cracking during the processing such as slicing or polishing, the group III nitride semiconductor crystal has been a factor that lowers the production yield of a substrate or the like. By having a region (region X) where the basal plane dislocation density is not less than a specific value and a region (region Y) where the basal plane dislocation density is less than the specific value, the internal stress within the crystal is dispersed, a group III nitride semiconductor crystal becomes less susceptible to cracking during the processing such as slicing or polishing.

Description

Group III nitride semiconductor crystal

The present invention relates to a group III nitride semiconductor crystal having specific properties.

Nitride semiconductors typified by gallium nitride have a large band gap, and the transition between bands is a direct transition type. Therefore, light emitting diodes such as ultraviolet, blue and green, semiconductor lasers and the like on the relatively short wavelength side It has been put to practical use as a light emitting element. Recently, with the development of crystal growth technology, the manufacture of gallium nitride substrates used in these devices has also been realized. In order to improve the characteristics of these elements, it is necessary to establish a technique capable of manufacturing a nitride semiconductor substrate having a low dislocation density.

An ELO method (Epitaxial Lateral Overgrowth) is known as a method for manufacturing a gallium nitride substrate having a low dislocation density. The ELO method is a crystal growth method in which a mask layer is formed on a base substrate and laterally grown on the mask from an opening. However, since threading dislocations are stopped by lateral growth, a layer with few crystal defects can be formed. (See Patent Document 1). Similarly, a method of forming a mask layer on a base substrate and performing facet growth has been proposed, and it has been reported that threading dislocations can be integrated at predetermined positions (see Patent Documents 2 and 3).

Japanese Patent Laid-Open No. 11-251253 JP 2003-165799 A JP 2003-183100 A

The group III nitride semiconductor crystal is generally subjected to a molding process such as slicing or polishing after growth, but the crystal may be cracked during the molding process. It was a factor that lowered the yield.
An object of the present invention is to improve the yield due to crystal cracking.

As a result of intensive investigations to solve the above problems, the present inventors have found that when basal plane dislocations are aggregated in a certain region, cracks are less likely to occur during molding processing such as slicing and polishing, The present invention has been completed.

That is, the present invention is as follows.
(1) A part of the crystal includes a region (region X) having a basal plane dislocation density of 1.0 × 10 ⁶ cm ⁻² or more and a region (region Y) having a basal plane dislocation density of less than 1.0 × 10 ⁶ cm ^−2. A group III nitride semiconductor crystal characterized by the above.
(2) The group III nitride semiconductor crystal according to (1), wherein the region X and the region Y are randomly arranged in the crystal.
(3) The group III nitride semiconductor crystal according to (1), wherein the region X and the region Y are arranged in a stripe shape.
(4) The group III nitride semiconductor crystal according to (3), wherein the stripe direction is parallel to the m-axis.
(5) The group III nitride semiconductor crystal according to any one of (1) to (4), which is manufactured by facet growth that forms a facet surface that appears obliquely from the M plane.
(6) The group III nitride semiconductor crystal according to (1), wherein the region X and the region Y are arranged in layers.
(7) The group III nitride semiconductor crystal according to any one of (1) to (6), wherein the region X has a region (region X ′) having a uniform basal plane dislocation density.
(8) The group III nitride semiconductor crystal according to any one of (1) to (7), wherein a ratio of the region X to the entire crystal is 3% or more.
(9) The group III nitride semiconductor crystal according to any one of (1) to (8), wherein the region X and / or the region Y contains a basal plane dislocation array arranged in a polygon.
(10) A substrate obtained from the group III nitride semiconductor crystal according to any one of (1) to (9).

According to the present invention, it is possible to provide a group III nitride semiconductor crystal in which internal stress remaining in the crystal is dispersed and cracking during molding such as slicing is difficult to occur.

It is a conceptual diagram which shows a basal plane dislocation and a threading dislocation. It is a conceptual diagram which shows the group III nitride semiconductor crystal in which the area | region X and the area | region Y were arranged in the stripe form or the layer form. It is a conceptual diagram which shows the principle of the crystal growth in which the area | region X is formed. It is the schematic which shows the manufacturing apparatus used for HVPE method. 3 is a SEM-CL image of a group III nitride semiconductor crystal obtained in Example 1, which is an image observed from the C-plane side (micrograph). 3 is an SEM-CL image of the group III nitride semiconductor crystal obtained in Example 1, which is an image observed from the M-plane side (micrograph). It is a transmission electron microscope image of the group III nitride semiconductor crystal obtained in Example 1, and is the image in the area | region Y observed from the M surface side (micrograph). FIG. 3 is an SEM-CL image of a group III nitride semiconductor crystal obtained in Example 2, which is an image observed from the M-plane side (micrograph). It is a SEM-CL image of the group III nitride semiconductor crystal obtained in Example 3, which is an image observed from the M-plane side (micrograph). It is a SEM-CL image of the group III nitride semiconductor crystal obtained by the comparative example, and is an image observed from the M plane side (micrograph). It is a measurement result of the photoelasticity of the group III nitride semiconductor crystal obtained by the Example and the comparative example. It is the graph which plotted the phase difference ((delta)) of the point which adjoins at an interval of 181 micrometers in the diameter direction about the phase difference distribution of an Example and a comparative example. FIG. 6b is a graph plotting the difference (| Δδ |) between adjacent points of the phase difference (δ) plotted in FIG. 6b.

The group III nitride semiconductor crystal of the present invention will be described in detail below, but is not limited to these contents unless it is contrary to the gist of the present invention.

In this specification, the “main surface” of the group III nitride semiconductor crystal refers to the widest surface of the group III nitride semiconductor crystal and the surface on which crystal growth is to be performed.
In the present specification, the “C plane” is a {0001} plane in a hexagonal crystal structure (wurtzite crystal structure) and is a plane orthogonal to the c-axis. Such a plane is a polar plane. In the group III semiconductor crystal, the “+ C plane” is a group III plane (gallium plane in the case of gallium nitride), and the “−C plane” is a nitrogen plane.
In this specification, the “M plane” means (1-100) plane, (01-10) plane, (−1010) plane, (−1100) plane, (0-110) plane, or (10− 10) A plane that is perpendicular to the m-axis. Such a surface is usually a cleavage plane.
In this specification, “A plane” means (2-1-10) plane, (-12-10) plane, (−1-120) plane, (−2110) plane, (1-210) plane. Or (11-20) plane, a plane orthogonal to the a-axis.
In this specification, the “semipolar plane” is not particularly limited as long as both the group III metal element and the nitrogen element are present on the crystal plane, and the abundance ratio thereof is not 1: 1. For example, {20 -21} plane, {10-11} plane, {10-12} plane, {11-21} plane, {11-22} plane, {11-23} plane, {11-24} plane, etc. .
Further, in this specification, when referring to the C, M, A, or specific index plane, a range having an off angle within 10 ° from each crystal axis measured with an accuracy within ± 0.01 °. Including the inner face. The off angle is preferably within 5 °, more preferably within 3 °.
Furthermore, a numerical range expressed using “to” in this specification means a range including numerical values described before and after “to” as a lower limit value and an upper limit value.

<Group III nitride semiconductor crystal of the present invention>
The group III nitride semiconductor crystal of the present invention has a region (region X) in which the basal plane dislocation density is a specific value or more and a region (region Y) in which the basal plane dislocation density is less than a specific value. And The inventors of the present invention have skillfully applied the internal stress generated in the crystal during crystal growth by including the region X having many basal plane dislocations and the region Y having few basal plane dislocations in the group III nitride semiconductor crystal. Succeeded in relaxing and improving processability. The “basal plane dislocation” is a linear defect (dislocation) generated on the C-plane (basal plane), and the direction and length of the dislocation line is particularly limited as long as it is perpendicular to the c-axis. In FIG. 1, 3 corresponds to this. Further, the “region” does not mean a planar region, but means a three-dimensional region. That is, the basal plane dislocation in the region X means not only the basal plane dislocation existing on the crystal surface of the region X but also the basal plane dislocation existing in the crystal of the region X. ing.

The basal plane dislocation density in the present invention means a value calculated by the following calculation formula (1).

(Ρ: basal plane dislocation density, N: number of measured basal plane dislocations, A: sectional area of the portion where the number of basal plane dislocations was measured)

The number N of basal plane dislocations is measured by using, for example, a transmission electron microscope method (TEM method), a cathodoluminescence method (SEM-CL method), or a method of observing surface pits by etching with an AFM or an optical microscope. can do. These methods have different observable fields of view. In the TEM method, the dislocation density is mainly 5 × 10 ⁷ cm ⁻² or more, and in the SEM-CL method, the dislocation density is mainly 1 × 10 ⁵ cm ⁻² or more. The method of observing surface pits by etching with an AFM or an optical microscope is suitable when the dislocation density is mainly 1 × 10 ³ to 1 × 10 ⁶ cm ⁻² . In the present invention, it is particularly preferable to measure using the SEM-CL method.
Further, the specific measurement conditions when using the SEM-CL method are not particularly limited, but the acceleration voltage is usually preferably 3 to 5 kV, and more preferably 3 kV.

The number N of basal plane dislocations can be measured by the method as described above, but the measured value varies depending on the direction from which the crystal is observed, and the cross-sectional area A is also derived from the surface to be observed. The value to be Therefore, the value of the basal plane dislocation density ρ can also vary depending on the direction from which the crystal is observed. Therefore, in the present invention, the group III nitride semiconductor crystal is specified by utilizing the value of the basal plane dislocation density ρ particularly when the {10-10} plane is observed. That is, in the present specification, when simply referred to as “basal plane dislocation density (ρ)”, the number N of basal plane dislocations observed mainly as points when the M plane intersecting the basal plane is observed is measured. It is assumed that this is converted into a value per unit area (cm ² ). Further, the specific value of the cross-sectional area A for calculating the basal plane dislocation density ρ is not particularly limited, but is usually 1 μm ² or more, preferably 25 μm ² or more, more preferably 100 μm ² or more. 22500μm ² or less, preferably set to 14400Myuemu ² or less, and more preferably set to 10000 ² below. Within the above range, the value of the basal plane dislocation density can be calculated with good reproducibility. The cross-sectional area A is preferably a rectangular area close to a rectangle or a square.
On the other hand, when the {0001} plane of the crystal is observed, the basal plane dislocation is observed as a line. In this specification, when a C plane selected as a specific surface of a crystal is observed, a unit distance (cm) is set in a direction crossing the basal plane dislocation observed as a line, and the unit distance per unit distance is set. The number of intersecting basal plane dislocations is referred to as “basal plane dislocation frequency in the C plane” and is distinguished from the “basal plane dislocation density (ρ)”. The “basal plane dislocation frequency in the C plane” does not consider the number of basal plane dislocations in the depth direction corresponding to the c-axis direction.

In the present invention, when specifying a group III nitride semiconductor crystal, the number of basal plane dislocations when the {10-10} plane or {0001} plane is observed is used. The measurement is preferably performed after molding the crystal so that the crystal plane appears on the crystal surface and the basal plane dislocations are easily observed. Specifically, it is preferable to perform cutting or slicing so that the {10-10} plane or {0001} plane appears on the crystal surface, and further polishing such a plane by lapping with diamond slurry and CMP.

The basal plane dislocation in the present invention is not particularly limited in the direction and length of the dislocation line as long as it is perpendicular to the c-axis as described above, but the dislocation line length is 0.1 μm or more. It is preferably 1 μm or more, more preferably 3 μm or more.

In the region X in the present invention, the basal plane dislocation density when the {10-10} plane of the crystal is observed is 1.0 × 10 ⁶ cm ⁻² or more, and 1.0 × 10 ⁷ cm ⁻² or more. It is preferably 1.0 × 10 ⁸ cm ⁻² or more. The upper limit of the basal plane dislocation density is usually 1.0 × 10 ¹⁰ cm ⁻² or less, preferably 1.0 × 10 ⁹ cm ⁻² or less.
On the other hand, in the region X, when the {0001} plane of the crystal is observed, the C-plane basal plane dislocation frequency is preferably 1.0 × 10 ⁶ cm ⁻¹ or more, and 1.0 × 10 ⁷ cm ^−1. More preferably. Further, the upper limit value of the basal plane dislocation frequency of the C plane is usually 1.0 × 10 ¹⁰ cm ⁻¹ or less, preferably 1.0 × 10 ⁹ cm ⁻¹ or less.

In the region Y in the present invention, the basal plane dislocation density when the {10-10} plane of the crystal is observed is less than 1.0 × 10 ⁶ cm ^{−2 and} less than 6.0 × 10 ⁵ cm ^−2. Preferably, it is less than 4.0 × 10 ⁵ cm ⁻² .
On the other hand, in the region Y, the basal plane dislocation frequency of the C plane when the {0001} plane of the crystal is observed is preferably less than 1.0 × 10 ⁶ cm ⁻¹ , and 6.0 × 10 ⁵ cm ^−1. More preferably, it is more preferably less than 4.0 × 10 ⁵ cm ⁻¹ .

The region X in the present invention preferably has a region (region X ′) having a uniform basal plane dislocation density. In the region X ′ where the basal plane dislocation density is uniform, the basal plane dislocation density calculated from any 80 μm × 80 μm region including the region is 1.0 × 10 ⁶ cm ⁻² or more, and 1 / A region of 40 μm × 40 μm corresponding to the area of 4 is arbitrarily extracted, and a basal plane dislocation density calculated from the region and a basal plane dislocation density calculated from the region of 80 μm × 80 μm are within a 1.5-fold difference. Shall point to. By having the region X ′, internal stress generated in the crystal during crystal growth can be efficiently relaxed, and the workability tends to be improved.

Furthermore, it is preferable that the region X and / or the region Y in the present invention contains a basal plane dislocation array arranged in a polygon. The basal plane dislocation array arranged in a polygonal arrangement refers to an array of basal plane dislocations arranged at intervals of 50 nm or less. The arrangement direction is not particularly limited, but is preferably arranged in the c-axis direction. By including a basal plane dislocation array arranged in a polygon, internal stress generated in the crystal during crystal growth is relaxed, and workability tends to be improved.
Further, the length in the arrangement direction of the basal plane dislocation arrangement arranged in a polygon is not particularly limited, but is preferably 1 μm or more, more preferably 10 μm or more, and preferably 20 mm or less, and 10 mm or less. It is more preferable that

The region X and the region Y in the present invention are not particularly limited as to the form, number, and distribution of the regions in the crystal as long as the basal plane dislocation density is in a specific range, but the ratio of the region X in the entire crystal is usually 1% or more, preferably 3% or more, more preferably 5% or more, more preferably 10% or more, usually 95% or less, preferably 80% or less, more preferably 70% or less, more preferably 50% or less, particularly Preferably it is 30% or less. The ratio of the region Y to the entire crystal is usually 10% or more, preferably 30% or more, more preferably 50% or more, still more preferably 70% or more, usually 99% or less, preferably 97% or less, more preferably Is 95% or less, more preferably 93% or less. Note that the ratio of the region X (or region Y) to the entire crystal means the ratio of the volume of the region X (or region Y) to the volume of the entire crystal. For example, as shown in FIG. In the case of a crystal, it can be calculated from the ratio of the short side of region X (a-axis direction) to the short side of region Y (a-axis direction). Within the above range, basal plane dislocations are moderately aggregated, cracks during molding can be prevented, and a region with little basal plane dislocations can be secured sufficiently. The region Y usually has a size of 350 μm square or more, preferably a size of 400 μm square or more, and more preferably a size of 1 mm square or more. When it is in the above range, a size for producing a device or the like can be sufficiently secured. Further, the region X has a maximum length of preferably 100 μm or more, more preferably 300 μm or more, further preferably 500 μm or more, and preferably 21 cm or less, and 11 cm or less. More preferably, it is more preferably 5 mm or less, and particularly preferably 1 mm or less. By having the region X in the above range, the internal stress generated in the crystal during crystal growth can be efficiently relaxed, and the workability tends to be improved. Further, the distribution of the region X and the region Y may be regularly arranged or randomly arranged. However, since the internal stress is dispersed by the presence of the region X, it is preferable that the region X is widely distributed throughout the crystal. Further, since it is considered that having both the region X and the region Y having different basal plane dislocation densities is effective for dispersion of internal stress, it is preferable that the regions X and Y are periodically arranged. More preferably, both the regions X and Y are widely distributed throughout the crystal. Further, if the basal plane dislocation is a dislocation perpendicular to the c-axis as described above, the direction of the dislocation line is not particularly limited, but within the region X, when a plurality of basal plane dislocations face the same direction, This is preferable because the crystal forming process becomes easy.

As a preferable specific example relating to the distribution of the region X and the region Y, as in the crystal shown in FIG. 2A as the first aspect, the region X and the region Y are rectangular parallelepiped long in either direction, In addition, the region X and the region Y are alternately and regularly arranged, that is, the region X and the region Y are arranged in a stripe shape, or the crystal shown in FIG. As described above, the region X and the region Y are spread as a plane substantially perpendicular to the growth direction, and the region X and the region Y are alternately arranged, that is, the region X and the region Y are arranged in layers. (In FIG. 2, 5 is a basal plane dislocation, 6 is a region X, and 7 is a region Y).

In the first embodiment, when the main surface is a C plane, the long side direction of the region X arranged in a stripe shape is not particularly limited, but preferably extends in the m-axis direction, and the base existing in the region X It is preferable that the plane dislocation also extends in the m-axis direction. The width (short side) of the region X is also not particularly limited, but is usually 10 to 500 μm, preferably 30 to 200 μm, more preferably 40 to 100 μm. Also, the width of the region Y is not particularly limited, but is usually preferably 100 μm or more, 200 μm or more, and more preferably 300 μm or more. In such a group III nitride semiconductor crystal, internal stress is moderately dispersed and it is difficult to break, and a region with few basal plane dislocations can be sufficiently secured. Further, in the first aspect, when the main surface is a nonpolar surface or a semipolar surface, the long side direction of the region X arranged in a stripe shape is not particularly limited, but those extending in the a-axis direction are preferable, The basal plane dislocation existing in the region X is also preferably extended in the a-axis direction. For example, when the main surface is the M plane, the long side direction can be the a-axis direction and the short side direction can be the c-axis direction. The width (short side) of the region X is also not particularly limited, but is usually 10 to 2000 μm, preferably 100 to 1000 μm, more preferably 200 to 750 μm. The width of the region Y is not particularly limited, but is usually preferably 100 μm or more and 500 μm or more, more preferably 1000 μm or more, and particularly preferably 2000 μm or more. In such a group III nitride semiconductor crystal, internal stress is moderately dispersed and it is difficult to break, and a region with few basal plane dislocations can be sufficiently secured.
The region X arranged in a layered manner in the second embodiment is not particularly limited, even if it is a single layer or a plurality of regions. The width of the region X (layer thickness) viewed from the M-plane direction is not particularly limited, but is usually 1 to 1000 μm, preferably 10 to 900 μm, more preferably 50 to 800 μm. Also, the width of the region Y (layer thickness) is not particularly limited, but is usually preferably 10 μm or more, 20 μm or more, and more preferably 50 μm or more. Such a group III nitride semiconductor crystal is preferable because it periodically includes basal plane dislocations, so that internal stress is moderately dispersed, and it is difficult to break when the substrate is cut out.

The group III nitride semiconductor crystal of the present invention is not particularly limited in the density and distribution of other defects as long as it includes a region (region X and Y) in which the basal plane dislocation density is in a specific range. Since the region Y is a highly practical region as a semiconductor crystal, it is preferable that there are few or no threading dislocations (edge dislocations, screw dislocations) and planar defects.

The group III nitride semiconductor crystal of the present invention includes a region (region X and Y) in which the basal plane dislocation density is in a specific range, but the internal stress in the crystal is relaxed by the presence of such a region. It is characterized by. The internal stress remaining in the crystal can be grasped by the residual strain, and the residual strain can be measured by, for example, a phase difference by a photoelastic method. The measurement of the residual strain amount by the photoelastic method is performed using the following relational expression (2) (see APPL. Phys. Lett. 47 (1985) pp. 365-367). The residual strain amount is the absolute value | S _r −S _t | of the difference between the radial strain S _r and the tangential strain S _t, and this value is a function of the phase difference δ. Can be relatively grasped by the distribution of the phase difference δ.

(Λ is the wavelength of light used for measurement, d is the thickness of the substrate used for measurement, n ₀ is the refractive index, δ is the phase difference caused by the birefringence of the sample, φ is the main vibration azimuth, P ₁₁ , P ₁₂ , _P44 is photoelastic constant)

As long as the group III nitride semiconductor crystal of the present invention has a region (region X and Y) in which the basal plane dislocation density is in a specific range, the specific numerical value of residual strain (internal stress) is not particularly limited. For example, in a group III nitride semiconductor crystal having a diameter of 50 mm, the standard deviation of the phase difference δ by the photoelastic method is preferably less than 0.1 nm, more preferably less than 0.09 nm. When it is in the above range, cracks during processing and molding are less likely to occur. As the phase difference distribution, if a portion where the value of the phase difference δ is high or low is localized in the plane of the crystal, the residual strain is also unevenly distributed at a specific portion of the crystal. Therefore, in the group III nitride semiconductor crystal of the present invention, it is preferable that the phase difference distribution is uniformly dispersed in the plane.
In another example, in the plane of the group III nitride semiconductor crystal, there are 10 or more consecutive sections where the difference (Δδ) between two adjacent points at an interval of about 180 μm is 0.05 or more. It is preferable that there are more than 20 sections.

Examples of the group III nitride semiconductor crystal of the present invention include gallium nitride, aluminum nitride, indium nitride, and mixed crystals thereof.
The main surface of the group III nitride semiconductor crystal of the present invention includes a + C plane, a −C plane, an M plane, an A plane, or a semipolar plane, and a + C plane, an M plane, or a semipolar plane. It is preferable that it is an M plane or a semipolar plane.

In the group III nitride semiconductor crystal of the present invention, the carrier concentration in the crystal is preferably 1 × 10 ¹⁸ cm ⁻³ or more, and more preferably 1 × 10 ¹⁹ cm ⁻³ . When the carrier concentration in the crystal is high, the resistivity in the crystal is low and the semiconductor crystal is excellent in conductivity. The carrier concentration in the crystal can be measured using hole measurement by the van der Pauw method.

The group III nitride semiconductor crystal of the present invention includes the region X and the region Y, so that the warpage of the crystal plane of the main surface can be suppressed. Specifically, the curvature radius of curvature of the crystal face of the main surface is usually 3 m or more, preferably 3.5 m or more, more preferably 5 m or more, and further preferably 10 m or more. When it is within the above range, good quality can be ensured when used as a substrate. As the radius of curvature of the crystal plane of the main surface, any crystal axis substantially parallel to the crystal plane of the main surface (for example, in a group III nitride semiconductor crystal obtained by growing in the c-axis direction, the a axis and (Or m-axis) direction radius of curvature is preferably within the above range. Here, the radius of curvature can be calculated from a tilt of the crystal axis measured by X-ray diffractometry or the like by a known method as an indication of the curvature of the crystal plane.
However, since the basal plane dislocation is not considered to contribute significantly to strain relaxation in the c-axis direction, the group III nitride semiconductor crystal of the present invention contains the region X and the region Y, so that the a-axis direction and m There is a tendency that warpage in a direction other than the c-axis direction such as the axial direction is improved.

The group III nitride semiconductor crystal of the present invention is characterized by having regions (regions X and Y) having a basal plane dislocation density in a specific range.
For example, in the first aspect, the present inventors have the effect that the basal plane dislocations relieve the stress generated when the crystal plane is coreless by facet growth, and this effect makes the crystal difficult to break. Was revealed. The inventors have also revealed that such basal plane dislocations have self-strain in the polar direction and perform a glide motion for relaxation of the self-strain during crystal growth. For example, when a crystal is grown on a base substrate arranged in a line stripe, basal plane dislocations occur randomly immediately before coreless (joining by lateral growth), but when coreless, the plane orientation of each crystal growth surface is fine. The deviation (off angle) becomes distortion, and the distortion is absorbed as basal plane dislocations along the mask. Even in a region where the core is not cored, the residual stress in the crystal becomes a driving force, and a glide motion is generated for optimal arrangement of the individual basal plane dislocations.
Furthermore, according to the study by the present inventors, in the second aspect, it is presumed that basal plane dislocations are generated in layers due to a rapid change in the growth temperature or the like. By generating such stratified basal plane dislocations, the stress in the thickness direction is partially relieved, and if the position to be cut out is appropriately selected, the yield during processing can be increased.

The group III nitride semiconductor crystal of the present invention is not particularly limited in its production method as long as it includes a region (region X and Y) having a basal plane dislocation density in a specific range. Based on the method, the group III nitride semiconductor crystal of the present invention can be preferably produced.

A method for obtaining a semiconductor crystal in which the region X and the region Y according to the first embodiment are arranged in a stripe shape parallel to the m-axis in the group III nitride semiconductor crystal of the present invention will be specifically described below. explain.
For example, semiconductor crystals arranged in stripes can be obtained by using the following method (A), (B), or (C).
(A) A method in which a stripe mask parallel to the m-axis is placed on the base substrate, and a semiconductor crystal is facet grown in the c-axis direction (that is, a method including the following steps).
(A1) A step of forming a stripe mask parallel to the m-axis on the base substrate.
(A2) A step of performing facet growth in the c-axis direction from the exposed portion of the base substrate.
(B) A method in which a semiconductor crystal is facet grown in the c-axis direction using a group III nitride semiconductor substrate in which basal plane dislocations are aggregated in a line parallel to the m-axis obtained by the method of (A) as a base substrate ( That is, the method includes the following steps).
(B1) A step of preparing a group III nitride semiconductor substrate in which basal plane dislocations are aggregated in a line shape parallel to the m-axis.
(B2) A step of facet growing a semiconductor crystal in the c-axis direction on the group III nitride semiconductor substrate.
(C) A method in which a semiconductor crystal is facet grown in a c-axis direction from a base substrate having a groove parallel to the m-axis.
(C1) A step of processing a plurality of grooves including recesses extending in the m-axis direction and forming a mask on the groove bottom surface.
(C2) A step of facet growing in the c-axis direction from the exposed portion of the convex portion (terrace) sandwiched between the grooves.
Here, in the above-described methods (A) to (C), it is preferable that the growth surface in the case where the semiconductor crystal is facet grown is a facet surface (M-plane facet) appearing inclined from the M-plane. By performing growth while forming M-plane facets, basal plane dislocations can be efficiently aggregated at specific positions.

The principle of obtaining the semiconductor crystal of the present invention from the method (A), (B) or (C) will be described with reference to FIG. 8 is a growth region from which growth starts, 9 is a region in which basal plane dislocations are aggregated (region X), and 10 is a crystal in which growth occurs. By continuing facet growth in the c-axis direction while 10 crystals maintain the M-plane facet, the growth surface of each crystal enters the region 9 and the growth planes of adjacent crystals (M-plane facets) are angled. Collide with.
Accordingly, the present inventors have found that when the growth planes of adjacent crystals collide approximately in the middle of the nine regions, the following drought process is taken. When crystals grown in the a-axis direction collide, basal plane dislocations are unlikely to occur, but in the case of collisions between grown crystals having different crystallographic orientations, the surface of each crystal growth surface at the time of coreless It can be inferred that a minute misalignment (off angle) of the orientation becomes a distortion, and the distortion is absorbed in the m-axis direction as a basal plane dislocation along the mask. That is, in order to obtain a semiconductor crystal having a stripe region X parallel to the m-axis (basal plane dislocations are also parallel to the m-axis), the occurrence of basal plane dislocations on the stripe mask or line is utilized. This is made possible by intentionally setting a growth region parallel to the axis and a basal plane dislocation generation region and performing facet growth so that an M-plane facet is generated (the basal plane dislocation generation region on the stripe mask). A method for forming the M-plane facet is not particularly limited, and examples thereof include a temperature, a supply rate of the raw material, a supply amount, and a supply amount ratio (V / III ratio) between the group III raw material and the nitrogen raw material. For example, an M-plane facet tends to be easily formed by performing initial growth at a temperature lower than that of main growth in the initial stage of growth. Similarly, with respect to other growth conditions, the means is not limited to this as long as an M-plane facet can be formed.

Regarding the group III nitride semiconductor crystal of the present invention, the method for obtaining the semiconductor crystal in which the region X and the region Y according to the second embodiment are arranged in a layer shape approximately perpendicular to the growth direction will be specifically described below. explain.
When obtaining a group III nitride semiconductor crystal by growth in the c-axis direction, for example, as a base substrate for growth, a template substrate in which gallium nitride is grown by MOCVD on a heterogeneous substrate such as sapphire by about 15 μm is used. There is a method of growing a semiconductor crystal by exposing the C plane while periodically changing the crystal growth conditions. As a result, basal plane dislocations can be generated in a layered manner, and stress due to distortion with a different substrate can be released out of the crystal.

Examples of the growth conditions that are periodically changed include the temperature, the supply rate of the raw material, the supply amount, and the supply amount ratio (V / III ratio) of the group III raw material and the nitrogen raw material. For example, when the growth temperature is lowered, basal plane dislocations tend to be concentrated and easily generated. Similarly, as long as basal plane dislocations can be generated periodically and aggregated for other growth conditions, the means is not limited to this.
The preferred growth thickness of the semiconductor crystal is not particularly limited as long as it allows the substrate to be taken out, but it is preferably 1 mm or more. The position to be cut out preferably includes a portion where basal plane dislocations are generated in a layered manner, and can be determined by the growth rate and growth conditions.

The crystal growth method for obtaining the group III nitride semiconductor crystal of the present invention is not particularly limited. Specifically, Hydride vapor phase epitaxy (HVPE method)
2. Metalorganic chemical vapor deposition (MOCVD)
3. Organometallic chloride vapor phase growth method (MOC method)
4). A known vapor phase growth method such as a sublimation method can be appropriately employed. Among these, the HVPE method or the MOCVD method is preferable, and the HVPE method is particularly preferable.

The crystal growth method may be homoepitaxial growth or heteroepitaxial growth, and specific examples of the underlying substrate include silicon, sapphire, gallium arsenide, gallium nitride, aluminum nitride, and zinc oxide. Of these, gallium nitride is particularly preferred.

When the group III nitride semiconductor crystal of the present invention is obtained using a mask, the mask pattern is not particularly limited, and either a dot shape or a stripe shape can be used. When obtaining a group III nitride semiconductor crystal in which the regions X are arranged in stripes, it is preferable to use a stripe mask. The pitch of the stripe mask is usually 100 μm to 3000 μm, preferably 200 μm to 2000 μm, more preferably 300 μm to 1000 μm.

The method for forming the mask is not particularly limited, and a mask layer is formed by appropriately adopting a known method such as a sputtering method, a CVD method (preferably a plasma CVD method), a vacuum deposition method, and the like, and then by a known photolithography method. Patterning and etching can be performed to form a mask having a desired shape. The mask material is not particularly limited, and silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, tantalum oxide, zirconium oxide, hafnium oxide, or the like can be used.

When the group III nitride semiconductor crystal of the present invention is obtained using a base substrate on which a stripe mask parallel to the m-axis is formed or a base substrate having a groove parallel to the m-axis, its manufacturing method is not particularly limited, For example, it can be obtained by the following operations (1) and (2).
(1) A mask that inhibits crystal growth is formed on the main surface of the base substrate. As the material for the mask, silicon oxide, silicon nitride, or the like can be used. Hexamethyldisilazane is applied as a primer to this mask, and then a photoresist is applied. The photoresist is patterned by exposing and developing through a photomask having an arbitrary drawing. Subsequently, wet etching is performed with buffered hydrofluoric acid (NH ₄ HF ₂ ), and a portion of the mask having no photoresist pattern is removed by etching. Thus, the mask on the main surface of the base substrate is patterned.
(2) In order to manufacture a base substrate having a groove parallel to the m-axis by providing a concave portion and a convex portion on one main surface of the base substrate, a mask such as silicon nitride or silicon oxide is first used on the main surface. Then, a mask pattern is prepared in the same manner as in the above (1). By providing the groove in the opening without the mask film by inductive coupling type reactive etching on the base substrate on which the mask is patterned, it is possible to form irregularities in a pattern parallel to the m-axis on the base substrate main surface. By increasing the etching amount, a base substrate with deep grooves can be manufactured. If the growth conditions for epitaxially growing a semiconductor single crystal are conditions for promoting facet growth, a semiconductor crystal in which basal plane dislocations are aggregated in a line shape parallel to the m-axis can be produced on the underlying substrate.
Further, when a mask film such as silicon nitride or silicon oxide is formed on the bottom or side wall of the groove, a semiconductor crystal in which the regions X are arranged in stripes parallel to the m-axis can be obtained more easily. As a method of forming a mask film only on the bottom and side walls of the groove, a lift-off method, a self-alignment method using a photoresist, a method of performing dry etching or wet etching after forming a protective layer by patterning, etc. Is mentioned.

About the vapor phase growth method mentioned above, the manufacturing apparatus and manufacturing conditions at the time of employ | adopting especially HVPE method are described below.
In FIG. 4, the conceptual diagram of the manufacturing apparatus used for the manufacturing method which employ | adopted HVPE method is shown. The HVPE apparatus shown in FIG. 4 includes a susceptor 107 and a reservoir 105 for storing a raw material of a group III nitride semiconductor crystal to be grown in a reactor 100. In addition, introduction pipes 101 to 104 for introducing gas into the reactor 100 and an exhaust pipe 108 for exhausting are installed. Further, a heater 106 for heating the reactor 100 from the side surface is installed.

As a material of the reactor 100, quartz, sintered boron nitride, stainless steel, or the like can be used, but a preferable material is quartz. The reactor 100 is filled with atmospheric gas in advance before starting the reaction. Examples of the atmospheric gas (carrier gas) include inert gases such as hydrogen, nitrogen, He, Ne, and Ar. These gases may be used alone or in combination.

The material of the susceptor 107 is preferably carbon, and more preferably one whose surface is coated with SiC. The shape of the susceptor 107 is not particularly limited, but it is preferable that the structure does not exist in the vicinity of the crystal growth surface during crystal growth. If there is a structure that can grow near the crystal growth surface, polycrystals adhere to the structure, and HCl gas is generated as the product, which may adversely affect the crystal to be grown. is there.

The raw material of the III nitride semiconductor to be grown is put in the reservoir 105. Ga, Al, In, etc. can be mentioned as a raw material used as a group III source. A gas that reacts with the raw material put in the reservoir 105 is supplied from an introduction pipe 103 for introducing the gas into the reservoir 105. For example, when a raw material that is a group III source is put in the reservoir 105, HCl gas can be supplied from the introduction pipe 103. At this time, the carrier gas may be supplied from the introduction pipe 103 together with the HCl gas. Examples of the carrier gas include hydrogen, nitrogen, an inert gas such as He, Ne, and Ar. These gases may be used alone or in combination.

From the introduction pipe 104, a source gas serving as a nitrogen source is supplied. Usually, NH ₃ is supplied. A carrier gas is supplied from the introduction pipe 101. As the carrier gas, the same carrier gas supplied from the introduction pipe 104 can be exemplified. This carrier gas also has an effect of separating the source gas nozzle and preventing the polycrystal from adhering to the nozzle tip. A dopant gas can also be supplied from the introduction pipe 102. For example, an n-type dopant gas such as oxygen, water, SiH ₄ , SiH ₂ Cl ₂ , or H ₂ S can be supplied.

The above gases supplied from the introduction pipes 101 to 104 may be exchanged with each other and supplied from different introduction pipes. In addition, the source gas and the carrier gas serving as a nitrogen source may be mixed and supplied from the same introduction pipe. Further, a carrier gas may be mixed from another introduction pipe. These supply modes can be appropriately determined according to the size and shape of the reactor 100, the reactivity of the raw materials, the target crystal growth rate, and the like.

The gas exhaust pipe 108 can be installed on the top, bottom and side surfaces of the reactor inner wall. From the viewpoint of dust removal, it is preferably located below the crystal growth end, and more preferably a gas exhaust pipe 108 is installed on the bottom of the reactor as shown in FIG.

The temperature conditions for crystal growth are not particularly limited, but are usually preferably 800 ° C. to 1200 ° C., 850 ° C. to 1150 ° C., more preferably 900 ° C. to 1100 ° C., and even more preferably 970 ° C. to 1040 ° C.
The pressure in the reactor is not particularly limited, but is preferably 50 kPa to 120 kPa, and particularly preferably atmospheric pressure.

The growth rate of crystal growth varies depending on the growth method, growth temperature, raw material gas supply amount, crystal growth surface orientation, etc., but is generally in the range of 5 μm / h to 500 μm / h, and is 10 μm / h or more. Preferably, 50 μm / h or more is more preferable, 70 μm or more is further preferable, and 140 μm / h or more is particularly preferable. The growth rate can be controlled by appropriately setting the type, flow rate, supply port-crystal growth end distance, etc. of the carrier gas.
When obtaining the semiconductor crystal of the second aspect, it is preferable to periodically change the items described above. The items to be changed periodically can be one type or a plurality of combinations. In particular, it is preferable to change the growth temperature, the ratio of nitrogen source to group III, and the type of carrier gas, alone or in combination.
In addition, as a method for obtaining a crystal whose main surface is a nonpolar plane (M plane / A plane) or a semipolar plane, the same method as described above can be employed. In addition, in order to obtain a crystal having a large area on the main surface, a plurality of seed crystals arranged may be used as a base substrate. For the means for obtaining the regions X and Y, the same method as described above can be adopted. When an array of a plurality of seed crystals is used as the base substrate, basal plane dislocations may be aggregated and generated in the crystal portion grown immediately above the junction between the seed crystals.

The production method for obtaining the group III nitride semiconductor crystal of the present invention may include a molding process (separation process and polishing process) described below. The separation step is a step of separating the grown group III nitride semiconductor from the base substrate, and specifically includes a cutting operation and a slicing operation. A slicing operation is particularly preferable. In addition, since a group III nitride semiconductor includes a part containing many threading dislocations from the seed crystal surface, it is preferable to remove the part, and the above-described cutting operation and slicing operation can be used. Examples of the slicing operation include wire slicing and inner peripheral edge slicing.

Since the surface of the crystal that has undergone the separation process has large irregularities (due to the influence of a slicing blade or the like), a polishing process is required to use the crystal as a semiconductor substrate. As a specific polishing step, it is preferable to wrap with diamond slurry and perform CMP.

The group III nitride semiconductor crystal according to the present invention can be used for various applications. In particular, it is useful as a substrate for semiconductor devices such as light emitting diodes of ultraviolet, blue or green, etc., light emitting elements having relatively short wavelengths such as semiconductor lasers, and electronic devices.

Hereinafter, the present invention will be described in more detail with reference to examples and comparative examples. However, the present invention is not limited to the specific modes shown in the following examples.

<Example 1>
(1) A single crystal gallium nitride (GaN) substrate was prepared as a base substrate. This single crystal GaN substrate is a self-standing substrate having a disk shape with a thickness of 400 μm and a diameter of 50 mm, and having a {0001} plane (C plane).
(2) About 0.1 μm of SiO ₂ film was deposited on the surface of the GaN free-standing substrate by plasma CVD. This GaN free-standing substrate with SiO ₂ film was subjected to ultrasonic cleaning for 10 minutes in each of acetone and methanol, and rinsed with pure water for 5 minutes.
(3) Hexamethyldisilazane (HMDS: “OAP” manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied to the surface of the cleaned GaN free-standing substrate as a primer. First, it was homogenized with a spinner at 1000 rpm for 7 seconds, then at 4000 rpm for 30 seconds, and then baked at 70 ° C. for 5 minutes. This is a process necessary for improving the adhesion between the SiO ₂ film and the resist described later.
(4) A positive resist was applied on the above-mentioned HMDS, and was made uniform by a spinner in the same procedure as the above-mentioned OAP application, and then prebaked at 90 ° C. for 30 minutes. Pre-baking is a process for fixing the resist. The positive resist used is “OFPR-800” manufactured by Tokyo Ohka Kogyo Co., Ltd.
(5) The resist was exposed using a Cr mask for exposure. In this Cr mask pattern, a stripe pattern having a line (Mask) / space (Window) of 50 μm / 400 μm is formed, and the stripe direction is <1-100> on the surface of the GaN free-standing substrate as the base substrate. Exposure was performed with a Cr mask set so as to be parallel to the m-axis. The exposure time was 8 seconds, and post-baking was performed at 120 ° C. for 30 minutes after exposure.
(6) The exposed GaN free-standing substrate was immersed in a positive resist developer (“NMD-3” manufactured by Tokyo Ohka Kogyo Co., Ltd.) for 30 seconds to remove the exposed portion of the resist and HMDS. Then, it rinsed with pure water for about 30 seconds.
(7) Wet etching of SiO ₂ was performed with buffered hydrofluoric acid (NH ₄ HF ₂ ) with a concentration of 22%. The etching time is 5 minutes and 20 seconds. Thereafter, ultrasonic cleaning was performed in an acetone solvent to dissolve and remove the remaining resist and HMDS.
(8) The base substrate having undergone the above steps was placed on the substrate holder on the HVPE device susceptor with the + C surface facing upward. At this time, the -C surface is in contact with the substrate holder and does not come into direct contact with the source gas.
(9) The temperature of the reaction chamber was raised to 970 ° C., and the raw material was supplied from the + C plane direction of the base substrate to grow the initial growth for 15 minutes.
(10) O-doped GaN was grown by raising the temperature of the reaction chamber to 1005 ° C. and supplying the raw material from the + C plane direction of the base substrate. Here, O-doping is realized by facet growth. In this growth step, the growth pressure is set to 1.01 × 10 ⁵ Pa, the partial pressure of NH ₃ gas is 8.13 × 10 ³ Pa, the partial pressure of N ₂ gas is 1.17 × 10 ⁴ Pa, GaCl gas The partial pressure was 7.00 × 10 ² Pa, the partial pressure of H ₂ gas was 8.04 × 10 ⁴ Pa, and the raw material was introduced from the introduction tube.
(11) After growing for 60 hours, the temperature was lowered to room temperature.
(12) The shape of the obtained gallium nitride single crystal was a circular shape with irregularities whose surface maintained the facet growth of the line, and the film thickness in the C-axis direction was about 6.3 mm. The area of the main surface (C surface) was 1963 mm ^{2 as} an effective diameter of 50 mm as a result of using a 57 mm base substrate.
(13) The obtained gallium nitride single crystal was processed into a disk shape by outer peripheral processing, and then sliced so that the C-plane became a plate shape of the main surface, which was suitable for fluorescence microscope observation and SEM-CL observation Polishing was performed until the surface state was obtained, and the gallium nitride semiconductor crystal substrate 1 was obtained. Next, the radius of curvature of the gallium nitride semiconductor crystal substrate 1 was measured. The radius of curvature can be calculated by a well-known method from the inclination of the crystal axis measured by X-ray diffraction measurement or the like as an indication of the curvature of the crystal plane. When the radius of curvature of the + C plane was measured with an X-ray diffractometer, the radius of curvature in the direction parallel to the line, that is, the direction parallel to the m-axis was 10.3 m, and the radius of curvature in the direction parallel to the a-axis was 3 0.0 m.
(14) The basal plane dislocation distribution of the gallium nitride semiconductor crystal substrate 1 was observed by SEM-CL using a JSM-7000 scanning electron microscope manufactured by JEOL Ltd. and a cathodoluminescence detector manufactured by OXFORD. The acceleration voltage of the cathodoluminescence scanning electron microscope was adjusted to 3.0 kV. Information from the sample surface to a depth of 0.08 μm is detected by this acceleration voltage.

SEM-CL images are shown in FIGS. 5a and 5b. FIG. 5 a is an image observed from the C-plane side of the crystal, and the black line-shaped one is the basal plane dislocation. From this, it was confirmed that the basal plane dislocations having a dislocation line length of 3 μm or more are concentrated in a line shape parallel to the m-axis. FIG. 5b is an image observed from the M-plane side of the crystal, and the black dots are basal plane dislocations. From the SEM-CL image observed at a magnification at which the basal plane dislocation can be recognized as a black spot, a region with a large basal plane dislocation (region X) and a region with a small basal plane dislocation (region Y) are selected, and the basal plane dislocation density ρ Was calculated. The results are shown in Table 1.
Further, when examining the region X, the dislocation density value calculated from the 80 μm × 80 μm region and the 40 μm × 40 μm region corresponding to 1/4 of the region are arbitrarily extracted, and the dislocation density calculated therefrom is calculated. It was confirmed to have a region X ′ whose value is within 1.5 times the difference.
Further, from the SEM-CL image, it was confirmed that the gallium nitride semiconductor crystal substrate 1 contained 11% of the region X and 89% of the region Y.
Further, from the SEM-CL image or the like, the region X and the region Y are arranged in a stripe shape in the gallium nitride semiconductor crystal substrate 1, the width (short side) of the region X is 50 μm, and the width of the region Y ( It was confirmed that the short side was 400 μm. Further, it was confirmed that the maximum length of the region X was 50 mm.

Next, about the gallium nitride semiconductor crystal substrate 1, the arrangement | positioning of the basal plane dislocation was observed using the TECNAI G2F20 transmission electron microscope made from FEI Company. The acceleration voltage of the transmission electron microscope was adjusted to 200 kV. With this acceleration voltage, information on the region from the edge to the thickness of 1000 nm is detected for the knife-edge thin film sample.
A transmission electron microscope image is shown in FIG. FIG. 6 is an image in the region Y observed from the M-plane side of the crystal, and the linear dark contrast is the basal plane dislocation. As a result, a polygonal arrangement of basal plane dislocations was confirmed. Since the basal plane dislocation itself has polar self-strain, the state of being arranged in a line in the polarity direction in FIG. 6 can be interpreted as a dislocation theory as a mechanism for reducing internal residual stress.

<Example 2>
(1) A rectangular parallelepiped having a length of 25 mm in the [-12-10] direction and 10 mm in the [0001] direction and having a thickness of 330 μm, the main surface is −1 in the [0001] direction from the (10-10) plane. Ten GaN free-standing substrates having a 0 ° off-angle in the [-12-10] direction were prepared and used as seed substrates.
(2) Ten seed substrates were arranged so that the (0001) plane, the (000-1) plane, the (1-210) plane, and the (-12-10) plane of the seed substrate were bonded surfaces. Specifically, 10 seed substrates are arranged in 5 rows in the [0001] direction and 2 rows in the [-12-10] direction, and the cross section of the (0001) plane and the (000-1) plane of each seed substrate. They were arranged on the susceptor 107 so that the cross sections face each other and the cross section of the (1-210) plane and the cross section of the (-12-10) plane face each other.
(3) The susceptor was placed in the reactor 100, the temperature of the reaction chamber was raised to 970 ° C., and growth of the GaN single crystal layer was started by the HVPE method. Simultaneously with the start of growth, the temperature in the reaction chamber was raised from 970 ° C. to 1020 ° C. over 1 hour, and then grown at a constant 1020 ° C. for 77 hours. In this single crystal growth step, the growth pressure is 1.01 × 10 ⁵ Pa from the start of growth to the end of growth, the partial pressure of GaCl gas is 5.96 × 10 ² Pa, and the partial pressure of NH ₃ gas is 5.34. × 10 ³ Pa. After completing the single crystal growth step, the temperature was lowered to room temperature to obtain a GaN crystal.
After completion of the single crystal growth step, the temperature was lowered to room temperature to obtain a group III nitride crystal. In the region above the boundary region between adjacent seed substrates in the obtained crystal, the group III nitride crystal was grown in combination and grew 3.5 mm in the [10-10] direction.
The obtained group III nitride crystal was subjected to outer shape processing and surface polishing treatment, and then sliced and polished by the same method as in Example 1 to obtain (10-10) having a diameter of 2 inches and a thickness of 440 μm. ) Three gallium nitride semiconductor crystal substrates 2 having a main surface as a main surface were produced. About the obtained gallium nitride semiconductor crystal substrate 2, the radius of curvature was measured in the same manner as in Example 1. When the curvature radius of the M plane was measured with an X-ray diffractometer, the curvature radius in the direction parallel to the a-axis of the crystal was 3.6 m. With respect to the gallium nitride semiconductor crystal substrate, the distribution of basal plane dislocations was observed using a SEM-CL apparatus, and the basal plane dislocation density ρ was calculated.

SEM-CL images of region X and region Y are shown in FIGS. 7A and 7B, respectively. 7A and 7B are images of the crystal observed from the M-plane side. Furthermore, in the low-magnification SEM-CL image, it was confirmed that the basal plane dislocations were concentrated in a layer shape approximately parallel to the growth direction. Further, the distribution of basal plane dislocations was observed in the same manner as in Example 1, and the basal plane dislocation density ρ in the regions X and Y was calculated. The results are shown in Table 1.
Further, when examining the region X, the dislocation density value calculated from the 80 μm × 80 μm region and the 40 μm × 40 μm region corresponding to 1/4 of the region are arbitrarily extracted, and the dislocation density calculated therefrom is calculated. It was confirmed to have a region X ′ whose value is within 1.5 times the difference.
Further, from the SEM-CL image, it was confirmed that the gallium nitride semiconductor crystal substrate 2 contained 10% of the region X and 90% of the region Y.
Further, from the SEM-CL image or the like, the region X and the region Y are arranged in a stripe shape in the gallium nitride semiconductor crystal substrate 2, and the width (short side, c-axis direction) of the region X is 500 μm. It was confirmed that the width of Y (short side, c-axis direction) was 4500 μm. Further, it was confirmed that the maximum length of the region X was 50 mm.

<Example 3>
(1) As a base substrate, a template substrate was prepared by growing gallium nitride by about 15 μm by MOCVD on a sapphire substrate.
(2) The base substrate was placed on the substrate holder on the HVPE device susceptor with the + C surface facing upward. At this time, the -C surface is in contact with the substrate holder and does not come into direct contact with the source gas.
(3) The concentration in the reaction chamber was raised to 1080 ° C., and the raw material was supplied from the + C plane direction of the base substrate to grow for 45 minutes (hereinafter also referred to as region Y growth).
(4) The temperature of the reaction chamber was raised to 1020 ° C., and the raw material was supplied from the + C plane direction of the base substrate to grow Si-doped gallium nitride for 6 hours (hereinafter also referred to as region X growth).
In this growth step, the growth pressure is set to 1.01 × 10 ⁵ Pa, the partial pressure of NH ₃ gas is 8.13 × 10 ³ Pa, the partial pressure of N ₂ gas is 1.17 × 10 ⁴ Pa, GaCl gas The partial pressure was 7.00 × 10 ² Pa, the partial pressure of H ₂ gas was 8.04 × 10 ⁴ Pa, the partial pressure of dichlorosilane gas was 1.74 × 10 ⁻¹ Pa, and the raw material was introduced from the introduction tube.
(5) Thereafter, the region Y growth (1080 ° C., 45 minutes) and the region X growth (1020 ° C., 6 hours) were periodically repeated four times.
(6) After growing for a total of 35 hours including the time of growth interruption during temperature adjustment, the temperature was lowered to room temperature.
(7) The shape of the obtained gallium nitride single crystal was a circular shape with a mirror surface, and the film thickness in the C-axis direction was about 3.6 mm. As a result of using the base substrate having a diameter of 63 mm, the area of the main surface (C surface) of the obtained gallium nitride single crystal was 2043 mm ² and the effective diameter was 51 mm.
(8) The obtained gallium nitride single crystal was shaped into a disk shape by outer periphery processing in the same manner as in Example 1, and then the C surface was the main surface, and the plate shape including the predesigned region X as a layer The gallium nitride semiconductor crystal substrate 3 was obtained by slicing and polishing until a surface state suitable for fluorescence microscope observation and SEM-CL observation was obtained. The curvature radius of the obtained gallium nitride semiconductor crystal substrate 3 was measured in the same manner as in Example 1. When the radius of curvature of the + C plane was measured with an X-ray diffractometer, the radius of curvature in the direction parallel to the a-axis was 4.4 m, and the radius of curvature in the direction parallel to the m-axis was 3.8 m.
(9) For the gallium nitride semiconductor crystal substrate 3, the basal plane dislocation distribution was observed using the SEM-CL apparatus in the same manner as in Example 1, and the basal plane dislocation density ρ was calculated.

A SEM-CL image is shown in FIG. FIG. 8 is an image obtained by observing the crystal from the M-plane side, and in the low-magnification SEM-CL image, it was confirmed that the basal plane dislocations were concentrated in a layer shape approximately perpendicular to the growth direction. Table 1 shows the results of the basal plane dislocation density ρ.
Further, when examining the region X, the dislocation density value calculated from the 80 μm × 80 μm region and the 40 μm × 40 μm region corresponding to 1/4 of the region are arbitrarily extracted, and the dislocation density calculated therefrom is calculated. It was confirmed to have a region X ′ whose value is within 1.5 times the difference.
Further, from the SEM-CL image, it was confirmed that the gallium nitride semiconductor crystal substrate contained 88% region X and 12% region Y.
Further, from the SEM-CL image or the like, the region X and the region Y are arranged in layers in the gallium nitride semiconductor crystal substrate, the width of the region X (layer thickness) is 700 μm, and the width of the region Y (layer) Thickness) was 100 μm. Further, it was confirmed that the maximum length of the region X was 50 mm.

<Comparative example>
(1) As a base substrate, a template substrate was prepared by growing gallium nitride by about 15 μm by MOCVD on a sapphire substrate.
(2) The base substrate was placed on the substrate holder on the HVPE device susceptor with the + C surface facing upward. At this time, the -C surface is in contact with the substrate holder and does not come into direct contact with the source gas.
(3) The initial growth was performed for 1 hour 30 minutes by raising the concentration in the reaction chamber to 970 ° C. and supplying the raw material from the + C plane direction of the base substrate.
(4) The temperature of the reaction chamber was raised to 1020 ° C., and the raw material was supplied from the + C plane direction of the base substrate to grow undoped gallium nitride. In this growth step, the growth pressure is set to 1.01 × 10 ⁵ Pa, the partial pressure of NH ₃ gas is 7.54 × 10 ³ Pa, the partial pressure of N ₂ gas is 8.88 × 10 ³ Pa, the GaCl gas The partial pressure was 6.52 × 10 ² Pa, the partial pressure of H ₂ gas was 8.39 × 10 ⁴ Pa, and the raw material was introduced from the introduction tube.
(5) After growing for 29 hours, the temperature was lowered to room temperature.
(6) The shape of the obtained gallium nitride single crystal was a circular shape with a mirror surface, and the film thickness in the c-axis direction was about 4.1 mm. As a result of using a base substrate having a diameter of 63 mm, the area of the main surface (C surface) of the obtained gallium nitride single crystal was 2376 mm ² and the effective diameter was 55 mm.
(7) In the same manner as in Example 3, the obtained gallium nitride single crystal was shaped into a disk shape by outer periphery processing, and then the C surface was the main surface and the plate shape did not include the region X. The gallium nitride semiconductor crystal substrate was obtained by slicing and polishing until a surface state suitable for fluorescence microscope observation and SEM-CL observation was obtained. The radius of curvature of the obtained gallium nitride semiconductor crystal substrate was measured in the same manner as in Example 1. When the radius of curvature of the + C plane was measured with an X-ray diffractometer, the radius of curvature in the direction parallel to the a-axis was 2.5 m, and the radius of curvature in the direction parallel to the m-axis was 2.8 m.
(8) For the gallium nitride semiconductor crystal substrate, the basal plane dislocation distribution was observed using the SEM-CL apparatus in the same manner as in Example 1, and the basal plane dislocation density ρ was calculated. An SEM-CL image is shown in FIG. Table 1 shows the results of the basal plane dislocation density ρ.

From Table 1, in the gallium nitride single crystals of Examples 1 and 2, the region X and the crystal whose basal plane dislocation density is 1.0 × 10 ⁶ cm ⁻² or more when the {10-10} plane of the crystal is observed It is clear that the basal plane dislocation density in the case of observing the {10-10} plane of the region includes a region Y that is less than 1.0 × 10 ⁶ cm ⁻² .

Also, from Table 2 collectively showing the measurement results of the radius of curvature, the radius of curvature of the crystal plane of the main surface of the gallium nitride semiconductor single crystal substrate of Examples 1, 2, and 3 can be measured in both the a-axis direction and the m-axis direction. It is clear that it has a radius of curvature of 3.0 m or more.

<Measurement of residual strain by photoelastic method>
In order to observe the internal stress in the gallium nitride single crystals obtained in the examples and comparative examples, the residual strain in the crystals was measured by a photoelastic method. The residual strain was measured using a GaN wafer residual strain measuring device manufactured by Japan Laser Co., Ltd. The results of the phase difference distributions of the example and the comparative example are shown in FIG. In the comparative example, it can be seen that the phase difference distribution is localized in a rotationally symmetrical manner, and the distortion is also localized. In the example, localization of the phase difference distribution as in the comparative example is not recognized, and it is clear that the examples are uniformly dispersed.
FIG. 10b shows a graph in which the phase difference (δ) of points adjacent to each other at intervals of 181 μm in the diameter direction is plotted for the phase difference distributions of Examples 1 and 3 and Comparative Example 1 shown in FIG. 10a. Further, FIG. 10c shows a graph in which the difference (| Δδ |) between points adjacent to the phase difference (δ) plotted in FIG. 10b is plotted. From FIG. 10c, in Examples 1 and 3, the section in which the difference (| Δδ |) of the phase difference δ between adjacent points is 0.05 or more is continuous, whereas in the comparative example, it is continuous. You can see that they are not.

<Evaluation of crystal cracking>
The gallium nitride single crystals obtained in the examples and comparative examples were sliced with a wire saw and polished by CMP. The yield obtained without breaking the gallium nitride single crystal by slicing and polishing was evaluated. The results are shown in Table 3.

It is apparent that the III nitride semiconductor crystal of the present invention is a crystal in which internal stress is uniformly dispersed within the crystal and cracking is less likely to occur during molding.

DESCRIPTION OF SYMBOLS 1 Base substrate 2 Formed crystal 3 Basal plane dislocation 4 Threading dislocation 5 Basal plane dislocation 6
7 Area Y
8 Growth region that is the starting point of growth 9 Region X (region where basal plane dislocations are aggregated)
10 Growing crystal 100 Reactor 101 Carrier gas pipe 102 Dopant gas pipe 103 Group III raw material pipe 104 Group V raw material pipe 105 Group III raw material reservoir 106 Heater 107 Susceptor 108 Exhaust pipe 109 Substrate holder G1 Carrier gas G2 Dopant gas G3 Group III source gas G4 Group V source gas

Claims (10)

1. A part of the crystal includes a region having a basal plane dislocation density of 1.0 × 10 ⁶ cm ⁻² or more (region X) and a region having a basal plane dislocation density of less than 1.0 × 10 ⁶ cm ⁻² (region Y). A group III nitride semiconductor crystal characterized.
2. The group III nitride semiconductor crystal according to claim 1, wherein the region X and the region Y are randomly arranged in the crystal.
3. The group III nitride semiconductor crystal according to claim 1, wherein the region X and the region Y are arranged in a stripe shape.
4. The group III nitride semiconductor crystal according to claim 3, wherein the stripe direction is parallel to the m-axis.
5. The group III nitride semiconductor crystal according to any one of claims 1 to 4, wherein the group III nitride semiconductor crystal is manufactured by facet growth that forms a facet surface that appears obliquely from the M plane.
6. The group III nitride semiconductor crystal according to claim 1, wherein the region X and the region Y are arranged in layers.
7. The group III nitride semiconductor crystal according to any one of claims 1 to 6, wherein the region X has a region (region X ') having a uniform basal plane dislocation density.
8. The group III nitride semiconductor crystal according to any one of claims 1 to 7, wherein a ratio of the region X to the entire crystal is 3% or more.
9. The group III nitride semiconductor crystal according to any one of claims 1 to 8, wherein the region X and / or the region Y contains a basal plane dislocation array arranged in a polygon.
10. A substrate obtained from the group III nitride semiconductor crystal according to any one of claims 1 to 9.

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