JP2013199412A - Method for manufacturing group iii nitride semiconductor crystal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing group III nitride semiconductor crystal widely having an area with fewer stacking faults.SOLUTION: One group III nitride semiconductor crystal is grown from two or more growth start surfaces of base crystal, and the growth surface of the group III nitride semiconductor crystal is grown to an area which is three or more times as large as the total area of the growth start surface of the base crystal so that it is possible to provide high quality group III nitride semiconductor crystal widely having an area with fewer stacking faults.

Description

  The present invention relates to a group III nitride semiconductor crystal having excellent crystal quality and a method for producing a group III nitride semiconductor crystal having such characteristics.

Group III nitride semiconductor crystals are variously used as substrates for light-emitting elements such as light-emitting diodes (LEDs) and semiconductor lasers (LDs). Among these, GaN crystals are useful as substrates for blue light emitting devices such as blue light emitting diodes and blue semiconductor lasers, and active research has been conducted.
Recently, in an InGaN blue, green LED or LD using a GaN substrate with a C-plane surface, the generation of a piezo electric field in the c-axis direction, which is the growth axis, can lead to a decrease in the external quantum efficiency of the light-emitting device. In order to weaken the influence, research on InGaN blue, green LEDs and LDs using non-polar planes called A-planes and M-planes perpendicular to the C-plane of GaN crystals as growth surfaces is becoming increasingly popular (non-patented) Reference 1).
However, an electronic device to which a group III nitride semiconductor crystal substrate is applied is greatly affected by basic characteristics including element lifetime, depending on dislocations and stresses inherent in the group III nitride semiconductor crystal substrate. However, as long as heteroepitaxial growth using a heterogeneous wafer such as sapphire is performed, there is a limit to the reduction of lattice defects and stress. Therefore, an attempt to produce a group III nitride semiconductor crystal capable of homoepitaxial growth instead of a heterogeneous wafer such as sapphire has been studied.

For example, after forming a GaN thin film on a sapphire wafer by metal organic chemical vapor deposition, a striped mask is formed, and a GaN layer is grown to a thick film by halide vapor deposition, and then the sapphire wafer is deleted. For example, Patent Document 1 discloses that a GaN single crystal having dislocations reduced to 10 ⁷ / cm ² or less can be obtained.

  Further, in providing a nonpolar nitride crystal substrate, a substrate of several centimeters square can be obtained by cutting the crystal grown thicker in the c-axis direction along the M plane by improving the manufacturing method of Patent Document 1. This is disclosed in Patent Document 2.

  Further, the M-plane substrates obtained by the method of Patent Document 2 are arranged in a matrix so that the C-planes face each other and the A-faces face each other, and then the M-plane is the main surface. Patent Document 3 discloses a homoepitaxial growth method of an M-plane GaN layer that performs halide vapor phase growth.

  Further, Patent Document 4 discloses that a plurality of nitride semiconductor bars having a C plane and an M plane are arranged so that the C planes face each other and the M plane is an upper surface, and a nitride semiconductor is grown on the M plane. Has been.

  Further, Patent Document 5 discloses that after growing GaN on the A-plane or M-plane of seed crystal GaN in the melt, GaN is further grown in the −c-axis direction.

  Further, Patent Document 6 discloses that a seed crystal plate having a principal plane C plane having an M plane on the side surface is prepared, and an enlarged M plane is grown so as to extend in the + c-axis direction from the side M plane.

JP 11-43398 A JP 2002-29897 A JP 2010-275171 A JP 2006-315947 A JP 2006-160568 A JP 2008-308401 A

"27th Basic Course on Thin Film and Surface Physics", Applied Physics Society, Thin Film and Surface Physics Subcommittee, November 16, 1998, p. 75 C. Stampfl and Chris G. Van de Walle, "Energetics and electronic structure of stacking faults in AlN, GaN, and InN", PHYSICAL REVIEW B, 1998, VOLUME 57, NUMBER 24, pp. R15 052- R15 055 Koji Maeda, Kunio Suzuki, Masaki Ichihara, Satoshi Nishiguchi, Kana Ono, Yutaka Mera and Shin Takeuchi, Physica B, 1999, Condensed Matter, Volumes 273-274, pp. 134-13

  The method described in Patent Document 2 is to obtain a substrate by slicing a GaN crystal grown thick in the c-axis direction in parallel with the growth direction. In order to manufacture an inch-sized substrate by this method, The GaN single crystal needs to be grown to a thickness of at least several centimeters. However, in the current vapor phase growth technique, various problems occur when trying to grow a GaN single crystal to a thickness of several centimeters or more. For example, when a GaN single crystal is grown by a general halide vapor phase epitaxy method (HVPE method), if the vapor phase growth is continued for a long time, Ga metal adheres to the vapor phase growth apparatus, and the flow rate of the source gas The balance is easily disturbed. Further, since the GaN seed crystal is originally obtained by heteroepitaxial growth from a heterogeneous substrate as in the method of Patent Document 1, the strain generated at the interface with the heterogeneous substrate remains. In addition, the influence of the stress due to the strain increases as the film thickness of the GaN single crystal increases. Therefore, when a GaN single crystal is grown to a thickness of several centimeters or more, the surface flatness is impaired, or new lattice defects for strain relaxation are generated.

  In view of such a problem, Patent Document 3 includes a main surface M plane, a side C plane, and a side A plane, sliced in parallel to the growth direction from a GaN single crystal that has been grown to several cm in the c-axis direction. A plurality of on-board substrates are prepared, arranged in a matrix so that the C faces of each other face each other and the A faces face each other, and then the HVPE method using the M face as a principal face is performed. This is a homoepitaxial growth method of a GaN layer. Although an inch-sized substrate can be obtained by this manufacturing method, the present inventors faced the problem that stacking faults of 3rd power or more per cm are inherent in the regrown crystal layer. Since InGaN-based blue and green LEDs and LDs of nonpolar GaN crystal substrates containing stacking faults give the problem of emission intensity distribution / dispersion, stacking faults are desired to be suppressed from nonpolar GaN crystals.

  Although Patent Document 4 describes a means that has both a low dislocation density and a wide wafer area, it does not describe any stacking faults to which the present invention is focused, and is still improved in terms of crystal quality. It turns out that there is a need.

  In the method described in Patent Document 5, the growth to the −c axis has a large amount of impurity incorporation, and there is a problem in the quality of the crystal.

Although the method described in Patent Document 6 is not mentioned in terms of suppressing stacking faults, it is effective in reducing threading dislocations. However, since the growth distance in the c-axis direction is limited to a few centimeters, there is a problem in having a large wafer area.

  That is, the present invention has been made in view of the above background, and an object thereof is to provide a method for producing a group III nitride semiconductor crystal having a wide range of regions having few stacking faults.

  As a result of intensive studies to solve the above-mentioned problems, the present inventors have grown one group III nitride semiconductor crystal from two or more growth start surfaces of the base crystal, and the group III nitride semiconductor crystal It has been found that a high-quality group III nitride semiconductor crystal having a wide range of regions having few stacking faults can be obtained by growing the growth surface of the substrate to an area that is at least three times the total area of the growth start surface of the base crystal. The present invention has been completed.

That is, the contents of the present invention are as follows.
(1) A method for producing a group III nitride semiconductor crystal comprising a growth step of growing a group III nitride semiconductor crystal on a base crystal, wherein the growth step comprises two or more growth start surfaces of the base crystal A group III nitride semiconductor crystal, and a group III nitride semiconductor crystal growth surface is grown to an area that is at least three times the total area of the growth start surface of the base crystal. A method for producing a nitride semiconductor crystal.
(2) The method for producing a group III nitride semiconductor crystal according to (1), wherein the growth start surface is a nonpolar surface or a semipolar surface.
(3) The group III according to (1) or (2), wherein the crystal planes of the two or more growth start surfaces are all the same, and the absolute value of the angle difference between the crystal planes is within 1 ° A method for producing a nitride semiconductor crystal.
(4) The growth step is a step of growing a group III nitride semiconductor crystal from the growth start surface of each seed crystal using two or more seed crystals as a base crystal. The manufacturing method of the group III nitride semiconductor crystal in any one.
(5) The method for producing a group III nitride semiconductor crystal according to (4), wherein the seed crystal has a rectangular parallelepiped shape or a rectangular parallelepiped-derived shape having a narrow side surface aspect ratio (height / short side) of 3 or more.
(6) The method for producing a group III nitride semiconductor crystal according to (4) or (5), wherein the two or more seed crystals are installed on a surface having a radius of curvature of 3 m or more.
(7) Any of (4) to (6), wherein each of the two or more seed crystals has a side surface orthogonal to the growth start surface, and is disposed so as to sandwich a support between the side surfaces. A method for producing a group III nitride semiconductor crystal according to claim 1.
(8) The method for producing a group III nitride semiconductor crystal according to (7), wherein the support has a spherical shape with an absolute value of a diameter tolerance of 50 μm or less.
(9) The method for producing a group III nitride semiconductor crystal according to (7), wherein the support has a rectangular parallelepiped shape with an absolute value of dimensional accuracy of 50 μm or less.
(10) The method for producing a group III nitride semiconductor crystal according to any one of (1) to (9), wherein the growth step is a step of crystal growth from a surface on the base crystal other than the growth start surface.

  According to the present invention, a group III nitride semiconductor crystal having a wide range of regions with few stacking faults can be easily produced.

It is a conceptual diagram showing the crystal growth of the growth process which concerns on this invention. It is a conceptual diagram showing the angle difference of the crystal plane of a growth start surface, and the angle difference of the crystal axis parallel to a crystal plane. It is a conceptual diagram showing the method of setting two or more growth start surfaces. It is a conceptual diagram showing the shape of a seed crystal. It is a conceptual diagram showing the installation method of two or more seed crystals and a support body. It is a conceptual diagram of the manufacturing apparatus used for HVPE method. It is a conceptual diagram showing the group III nitride semiconductor crystal which has a low basal plane dislocation density region and a high base area layer defect density region. It is an electron micrograph of a lateral growth region (drawing substitute photo).

  Hereinafter, the contents of the present invention will be described in detail. The description of the constituent elements described below may be made based on typical embodiments and specific examples of the present invention, but the present invention is not limited to such embodiments and specific examples. For example, the GaN crystal may be described as a representative example of the group III nitride semiconductor crystal, but the present invention is not limited to the GaN crystal and the manufacturing method thereof. In the present specification, a numerical range represented by using “to” means a range including numerical values described before and after “to” as a lower limit value and an upper limit value.

In the present specification, “C plane” or “basal plane” means a plane equivalent to the {0001} plane in a hexagonal crystal structure (wurtzite type crystal structure). In the group III nitride semiconductor crystal, the C plane is a polar plane, the + C plane corresponds to a group III plane, and in the case of gallium nitride, it corresponds to a Ga plane.
Further, in this specification, the “M plane” is a plane comprehensively represented as a {1-100} plane, specifically, a (1-100) plane, a (01-10) plane, (− 1010) plane, (-1100) plane, (0-110) plane, and (10-10) plane. Such a surface is a nonpolar surface.
Furthermore, in this specification, the “A plane” is a plane comprehensively represented as a {2-1-10} plane, specifically, a (2-1-10) plane, (-12-10). ) Plane, (-1-120) plane, (-2110) plane, (1-210) plane, and (11-20) plane. Such a surface is a nonpolar surface.
In the present specification, the “semipolar plane” is not particularly limited as long as both the Group 13 element and the nitrogen element are present on the crystal plane and the abundance ratio thereof is not 1: 1. For example, {20 -21} plane, {10-11} plane, {10-12} plane, {11-21} plane, {11-22} plane, {11-23} plane, {11-24} plane, etc. .
In this specification, the notation <...> Represents a collective expression of directions, and the notation [...] Represents an individual expression of directions. On the other hand, the notation {...} Represents the collective representation of the surface, and the notation (...) Represents the individual representation of the surface.
Further, in this specification, when referring to the C, M, A, or specific index plane, a range having an off angle within 10 ° from each crystal axis measured with an accuracy within ± 0.01 °. Including the inner face. The off angle is preferably within 5 °, more preferably within 3 °.
In this specification, the main surface means a surface on which a device is to be formed or a widest surface in the structure.

[Method for Producing Group III Nitride Semiconductor Crystal]
In the method for producing a group III nitride semiconductor crystal of the present invention, one group III nitride semiconductor crystal is grown from two or more growth start surfaces of the base crystal, and the group III nitride semiconductor crystal growth surface is formed on the base crystal. It includes a step of growing to an area that is at least three times the total area of the crystal growth start surface (hereinafter sometimes abbreviated as “growth step according to the present invention”). The inventors set the area of the growth start surface on the base crystal on which the group III nitride semiconductor crystal starts to grow smaller than the target group III nitride semiconductor crystal, and is parallel to the growth start surface. By encouraging crystal growth (hereinafter sometimes abbreviated as “lateral growth”) to secure a wider area on the growth surface formed by the lateral growth, a wide range of areas with fewer stacking faults can be obtained. It has been found that a high-quality group III nitride semiconductor crystal can be obtained. This is sometimes abbreviated as a crystal region (4 or less in FIG. 1, “region on the growth start surface”) formed on the growth start surface (1 in FIG. 1).
) In the crystal region (5 or less in FIG. 1, sometimes abbreviated as “lateral growth region”) formed by lateral growth is less likely to cause stacking faults. Is based on becoming. In addition, the present inventors apply the above-described knowledge to set and arrange two or more growth start surfaces, and associate and bond crystals formed from the respective growth start surfaces into one large crystal. It has been found that by growing, a high-quality group III nitride semiconductor crystal with few stacking faults can be obtained as compared with the case of growing from a base crystal having a wide growth start surface. The present invention is an invention based on such knowledge, and from the viewpoint of obtaining a group III nitride semiconductor crystal having high practicality as a substrate of a light-emitting element, the area of the growth surface is at least three times the total area of the growth start surface It is characterized by growing to become. If the area of the growth surface is smaller than three times, it becomes difficult to efficiently manufacture, for example, a substrate having few stacking faults.
The growth start surface is one surface or a partial surface on the base crystal where the group III nitride semiconductor crystal starts to grow, and the growth direction as a whole crystal (the direction in which the crystal thickness increases as a whole crystal. Means a plane perpendicular to the direction in which the crystal thickness increases when each crystal grown from the growth start surface of each other is associated and bonded to grow into one large crystal and then continues to grow. Shall. Referring to FIG. 1, 1 is the growth start surface, and 2 is the growth direction of the entire crystal.
Further, in the present invention, the growth plane is a plane on the group III nitride semiconductor crystal formed by crystal growth, particularly a plane perpendicular to the growth direction of the entire crystal, that is, a plane parallel to the growth start plane. Shall mean. If it demonstrates with reference to FIG. 1, 3 is a growth surface.
Furthermore, the stacking fault is a stacking irregularity of a basal plane widely known for GaN crystals (see Non-Patent Document 2).

The growth step according to the present invention is characterized in that one group III nitride semiconductor crystal is grown from two or more growth start surfaces of the base crystal. “Plane” means that two or more growth start surfaces physically separated in the plane direction are set on one base crystal, or two or more seed crystals are used as base crystals, and each seed crystal It means that one or more growth start surfaces are set above (each growth start surface is physically separated in the surface direction). In addition, “grow a group III nitride semiconductor crystal from two or more growth start surfaces” means that crystals formed from two or more growth start surfaces are associated with each other to form one large crystal. It means to grow.
The number of growth starting surfaces can be appropriately set depending on the size of the target group III nitride semiconductor crystal, but is preferably 5 or more, more preferably 10 or more, and usually 50 or less, preferably 30 or less, more preferably 20 or less.
In addition, the growth process according to the present invention is not intended for crystal growth in which crystal growth proceeds only from the growth start surface, but proceeds from a surface on the base crystal other than the growth start surface. May be. On the other hand, when there are a plurality of one or partial surfaces that can be the growth start surface and it is desired to set a part of them as the growth start surface, for example, it is easy to supply or select a raw material component to the selected one surface or partial surface. It can be set intentionally by inhibiting growth from a surface other than one surface or a partial surface.

  In the growth step according to the present invention, the growth surface of the group III nitride semiconductor crystal is grown to an area that is at least three times the total area of the growth start surface of the base crystal. It is preferable to grow to an area that is twice or more, and it is more preferable to grow to an area that is five times or more the total area of the growth start surface. In addition, the upper limit is usually grown to 400 times or less of the total area of the growth start surface, but it is preferable to grow to 100 times or less of the total area of the growth start surface, and grow to 50 times or less. More preferably, the growth is 10 times or less.

In the growth step according to the present invention, the growth surface of the group III nitride semiconductor crystal is grown to an area that is at least three times the total area of the growth start surface of the base crystal. The area is not particularly limited. The total area of concrete growth start surface, usually 16cm ² or less, preferably 8 cm ² or less, more preferably 4 cm ² or less, usually greater than 0.03 cm ^2, preferably 0.06 cm ² or more, more preferably Is 0.15 cm ² or more.
The area of the growth start surface per one is not particularly limited, but is usually less than 16 cm ² , preferably 8 cm ² or less, more preferably 4 cm ² or less, further preferably 1 cm ² or less, and still more preferably 0.5 cm ^2. or less, particularly preferably 0.1 cm ² or less, usually 0.03 cm ² or more, preferably 0.06 cm ² or more, more preferably 0.15 cm ² or more.

The crystal plane (index plane) of the growth start plane can be appropriately set depending on the target group III nitride semiconductor crystal, but is preferably a nonpolar plane or a semipolar plane, and more preferably an M plane. preferable. Further, the off angle of the growth start surface is preferably within 10 °, more preferably within 5 °, and preferably within 3 °.
Moreover, it is preferable that the crystal planes (index planes) of two or more growth start planes are all the same. By unifying the crystal planes, the occurrence of dislocations in the associative region can be reduced. When the crystal planes are the same, the absolute value of the angle difference between the crystal planes is preferably within 1 °, and more preferably within 0.5 °. The orientation of the crystal axes on the crystal plane is preferably the same, and the absolute value of the angle difference between the crystal axes is preferably within 0.5 °, more preferably within 0.3 °. . 2A (when the off-angle of the growth start surface is 0 °), 2a is a perspective view of two growth start surfaces, and 2b is two growth start surfaces (crystal planes). FIGS. 2c and 2c are top views of two growth start faces, 6 and 7 are growth start faces (crystal faces), 8 is a crystal axis on the crystal face, 9 is an angle difference between crystal faces, It represents the angle difference between the crystal axes on the crystal plane.

As described above, the growth process according to the present invention may be such that crystal growth proceeds from a surface on the base crystal other than the growth start surface. However, the surface other than the growth start surface is a + C plane and / or semipolar. A surface is preferred. The presence of such a surface can promote lateral growth and efficiently promote crystal growth.
In addition, when a surface other than the growth start surface exists in a space between two or more growth start surfaces, the surface is also preferably a + C surface and / or a semipolar surface. The presence of the C-plane and / or semipolar plane in the space between the growth start surfaces makes it easy to obtain a bulk crystal by filling the space. Furthermore, when there are a plurality of such spaces, and there is a surface other than the growth start surface for each space, it is preferable to align the surfaces other than the growth start surface in the same direction, specifically, When + C planes are present in the space, it is preferable to align the + C planes in the same direction. When the same semipolar planes are present in the respective spaces, the semipolar planes are aligned in the same direction. Is preferred. The absolute value of the angle difference between the crystal planes other than the growth start plane is preferably within 1 °, and more preferably within 0.5 °. Furthermore, the orientation of the crystal axes on the crystal plane is preferably the same, and the absolute value of the angle difference between the crystal axes is preferably within 0.5 °, and more preferably within 0.3 °. By unifying the surfaces other than the growth start surface, the quality of crystals formed in such a space can be made uniform.

  The shape of the growth start surface is preferably a rectangle with a large aspect ratio. By arranging rectangular growth start surfaces in parallel (especially parallel so that the long sides of the rectangle are arranged side by side), the lateral growth can be controlled in a certain direction, and a higher-quality group III nitride semiconductor crystal Can be obtained. In the case of a rectangular growth start surface, the length of the short side is usually 1 mm or less, preferably 0.5 mm or less, more preferably 0.01 mm or less, and usually 0.001 mm or more. The length of the long side of the rectangular growth start surface can be appropriately set depending on the shape of the target group III nitride semiconductor crystal, but is usually 1 to 15 cm.

  The spacing between adjacent growth start surfaces can be appropriately set depending on the shape of the growth start surface and the like, but is usually 1 mm or more, preferably 2 mm or more, more preferably 10 mm or more, and usually 50 mm or less, preferably 30 mm or less. More preferably, it is 20 mm or less. Within the above range, a region with few stacking faults can be secured sufficiently. When three or more growth start surfaces are set, the intervals between the respective growth start surfaces may be the same or different. Further, the height at which the growth start surface is located is not particularly limited, but it is preferable to align all the growth start surfaces at the same height.

  As a method of setting two or more growth start surfaces, for example, a method of using two or more seed crystals as a base crystal and setting a growth start surface for each seed crystal (3a in FIG. 3), a large base crystal Examples thereof include a method of forming a mask layer (3b in FIG. 3), a method of cutting a large base crystal to form a groove (3c in FIG. 3), and the like. In view of simplicity of operation, a method of using two or more seed crystals as a base crystal and setting a growth start surface for each seed crystal is preferable.

  The types of base crystals used in the method for producing a Group III nitride semiconductor crystal of the present invention include Group III nitride semiconductor crystals such as GaN, AlN, InN, InGaN, and AlGaN, metal oxides such as sapphire, ZnO, and BeO, Examples thereof include silicon-containing materials such as SiC and Si, and GaAs. Among these, it is preferable to use the same kind of crystal as the target group III nitride semiconductor crystal such as GaN, AlN, InN or the like.

It is preferable to use a base crystal that has been heat-treated. As specific heat treatment conditions, conditions for GaN will be described below. When heat-treating GaN, N ₂ , NH _3, or a mixed gas thereof can be used as the atmospheric gas. The heat treatment may be a closed system or a flow system, but a flow system is preferable, and the flow rate is usually 50 ml / min or more, preferably 150 ml / min or more, more preferably 180 ml / min or more. The temperature condition is usually 900 ° C. or higher, preferably 1100 ° C. or higher, more preferably 1250 ° C. or higher, and usually 2500 ° C. or lower, preferably 2220 ° C. or lower, more preferably 1400 ° C. or lower. The heating time is usually 1 minute or longer, preferably 1 hour or longer, more preferably 3 hours or longer, and usually 1666 hours or shorter, preferably 833 hours or shorter, more preferably 240 hours or shorter. The base crystal heat-treated under the above conditions aggregates the basal plane dislocations in a thermodynamically stable position and reduces the residual stress, so when using the heat-treated base crystal in the present invention, There is a tendency to obtain a high-quality group III nitride semiconductor crystal with fewer stacking faults.
In addition, a surface-modified layer such as a group III metal layer, an oxide layer, a hydroxide layer, or an oxyhydroxide may be formed on the surface of the base crystal by the above-described heat treatment. Therefore, it is preferable to remove the surface altered layer before using it for crystal growth. Specific methods for removing the surface altered layer include a method of immersing the base crystal in an acid solution and a mechanical polishing method. The type of the acid solution used when the base crystal is immersed in the acid solution is not particularly limited, and examples thereof include hydrochloric acid, sulfuric acid, and nitric acid, and nitric acid is particularly preferable. The concentration of the acid solution is not particularly limited, but is usually 10% or more, preferably 30% or more. By using a high-concentration acid solution or mixed acid solution, film removal becomes efficient. Further, the immersion in the acid solution is preferably performed while stirring using a stirrer, an ultrasonic vibration device, or the like, and more preferably performed while heating at a temperature of 60 ° C. or higher, preferably 80 ° C. or higher.

The shape of the base crystal is not particularly limited as long as the above-described growth start surface can be set, but a preferable shape in the case where two or more seed crystals as described above are used as the base crystal will be described below. .
As described above, it is preferable that the growth start surface has a rectangular shape. However, it is preferable that the seed crystal has a rectangular surface. Further, in order to arrange the rectangular growth start surfaces in parallel, the seed crystal preferably has a side surface orthogonal to the surface to be the growth start surface. Specific examples of the shape of the seed crystal include those having a rectangular parallelepiped shape or a rectangular parallelepiped-derived shape as shown in FIG. 4 (the upper side of FIG. 4 is a perspective view of the seed crystal, and the lower side is a side view of the seed crystal. is there). The rectangular parallelepiped-derived shape is, for example, a shape as shown in 4b or 4c of FIG. 4, and particularly means a shape obtained by deforming the rectangular parallelepiped shape so that the area of the surface to be the growth start surface is reduced. . Such a rectangular parallelepiped-derived shape can be obtained, for example, by processing the rectangular parallelepiped seed crystal 4a in FIG. 4 using a rotary polishing machine, an ion beam, or the like.
The dimension of the seed crystal can be appropriately set depending on the shape and interval of the growth start surface. However, when described with reference to FIG. 4, the short side (13 in FIG. 4) is usually 1 mm or less, preferably 0.5 mm. Hereinafter, it is more preferably 0.3 mm or less, usually 0.05 mm or more, preferably 0.1 mm or more, more preferably 0.15 mm or more. The height (14 in FIG. 4) is usually 10 mm or less, preferably 5 mm or less, more preferably 2 mm or less, and usually 0.5 mm or more, preferably 1 mm or more. The long side (15 in FIG. 4) is usually 5 mm or more, preferably 20 mm or more, more preferably 50 mm or more. Also, the aspect ratio (hereinafter sometimes abbreviated as “narrow side aspect ratio”) of height (14 in FIG. 4) / short side (13 in FIG. 4) is usually 3 or more, preferably 4 Above, more preferably 5 or more, usually 100 or less, preferably 50 or less, more preferably 20 or less.

As described above, it is preferable that the crystal planes (index planes) of two or more growth start planes are all the same, and that the crystal axis orientations on the crystal planes are also preferably the same. In order to achieve this, it is preferable to set the surfaces to be the growth start surfaces of all the seed crystals to be set to be the same.
In addition, as described above, when a surface other than the growth start surface exists in the space between the growth start surfaces, it is preferable that the surface is a + C surface and / or a semipolar surface. Therefore, it is preferable to set all the seed crystals to be set so that the side surface orthogonal to the surface to be the growth start surface becomes a + C surface or a semipolar surface. Specifically, the growth start surface of all the seed crystals to be installed is the M plane, the side surfaces of the opposing various crystals are the + C plane and the −C plane, and the + C planes of all the seed crystals are aligned in the same direction. Is preferred.

  The seed crystal is preferably installed on a surface having a radius of curvature of 3 m or more, more preferably installed on a surface of 5 m or more, and even more preferably installed on a surface of 10 m or more.

  The method of installing the seed crystal is not particularly limited, but a method of using a side surface orthogonal to the surface to be the growth start surface can be mentioned in order to keep the target growth start surface. For example, as shown in FIG. 5, there are a method of bringing the side surfaces of the seed crystals into contact with each other (5a in FIG. 5) and a method of sandwiching a support between the seed crystals (5b and 5c in FIG. 5). Among these, it is preferable to employ a method in which a support is sandwiched between seed crystals for ease of operation.

The shape of the support is not particularly limited as long as the target growth start surfaces can be kept apart, and examples thereof include a spherical shape (5b in FIG. 5) and a rectangular parallelepiped shape (5c in FIG. 5).
When a spherical support is used, the absolute value of the diameter tolerance of the support is usually 50 μm or less, preferably 20 μm or less, more preferably 10 μm or less. The number of spherical supports to be used can be set as appropriate depending on the shape of the seed crystal and the like, but it is preferable to pack the particles in the closest packing.
When a rectangular parallelepiped support is used, the absolute value of the dimensional accuracy of the support is usually 50 μm or less, preferably 20 μm or less, more preferably 10 μm or less. The absolute value of the dimensional accuracy of the support refers to the variation in the distance between the side surfaces of the support that contacts the side surface of the seed crystal.

  The material of the support is not particularly limited as long as it does not inhibit crystal growth and can maintain the spacing between the growth start surfaces, but is preferably a material having a low coefficient of thermal expansion, specifically quartz or growth. Examples include the same material as the crystal (in this case, a GaN crystal).

  The growth process according to the present invention is a process in which the growth surface of the group III nitride semiconductor crystal is grown to an area that is at least three times the total area of the growth start surface of the underlying crystal. Unless a specific growth start surface is set and the lateral growth is particularly inhibited, halide vapor phase epitaxy (HVPE), metal organic chemical vapor deposition (MOCVD), metal organic chloride vapor phase epitaxy (MOC) Method), sublimation method, melt growth, high pressure solution method, flux method, heat treatment method, etc., any known growth method can be employed. Among these, the HVPE method is particularly preferably employed, and in explaining the details of the growth process according to the present invention, a specific example of the configuration of the manufacturing apparatus and the growth conditions when obtaining the GaN semiconductor crystal using the HVPE method. I will give you a description.

<Configuration of manufacturing equipment>
The structure of the manufacturing apparatus used for the HVPE method will be described with reference to FIG. The production apparatus is provided with a reactor (reaction vessel 100 in FIG. 6), and in this reactor, a susceptor (107 in FIG. 6) and a reservoir (in FIG. 6) into which a group III nitride semiconductor crystal raw material is placed. 105). Also, an introduction pipe (101 to 104 in FIG. 6) for introducing gas into the reactor, an exhaust pipe (108 in FIG. 6) for exhausting, and a heater (in FIG. 6) for heating the reactor 106) is installed.

  Examples of the material for the reactor include quartz, sintered boron nitride, and stainless steel. A preferable material is quartz. Carbon is preferable as the material of the susceptor, and a material whose surface is coated with SiC is more preferable. The shape of the susceptor is not particularly limited, but it is preferable that the structure does not exist in the vicinity of the crystal growth surface during crystal growth. If there is a structure that can grow near the crystal growth surface, polycrystals adhere to the structure, and HCl gas is generated as the product, which may adversely affect the crystal to be grown. is there.

  The reservoir can contain, for example, a target group III nitride semiconductor crystal raw material, and examples include a source material of a group III source such as Ga, Al, and In. From an introduction pipe (103 in FIG. 6) connected to the reservoir, a gas that reacts with a raw material to be a group III source, for example, HCl gas, can be mentioned. At this time, the carrier gas may be supplied from the introduction pipe together with the HCl gas. Examples of the carrier gas include hydrogen, nitrogen, He, Ne, Ar, and the like, and these gases may be used alone or in combination.

From an introduction pipe (101, 102, 104 in FIG. 6) other than the introduction pipe connected to the reservoir, for example, a source gas, a carrier gas, a dopant gas, or the like serving as a nitrogen source can be supplied. The source gas for the nitrogen source is usually NH ₃ , the carrier gas is hydrogen, nitrogen, He, Ne, Ar, and the dopant gas is oxygen, water, SiH ₄ , SiH ₂ Cl ₂ , H ₂ S, etc. Can be mentioned. These gases may be used alone or in combination. The number of introduction pipes is not particularly limited, and the number of introduction pipes may be increased or decreased depending on the type of gas to be supplied.

  The exhaust pipe can be installed on the top, bottom and side surfaces of the reactor inner wall. From the viewpoint of dropping impurities, it is preferably located below the crystal growth end, and more preferably a gas exhaust pipe is installed on the bottom of the reactor as shown in FIG.

The growth process according to the present invention is a crystal growth in which the growth surface of the group III nitride semiconductor crystal is grown to an area that is at least three times the total area of the growth start surface of the base crystal, that is, the lateral growth proceeds. However, the lateral growth can proceed even under normal growth conditions if there are no factors that hinder the lateral growth such that the raw material is difficult to reach or there is a structural obstacle. Specific growth conditions that can control the lateral growth include temperature, raw material partial pressure, nitrogen raw material / group III raw material ratio, raw material supply port—crystal growth edge distance, and the like. Hereinafter, preferred embodiments of the growth process conditions (in the case of the HVPE method) according to the present invention will be described.
<Initial slow growth>
As described above, in the growth process according to the present invention, the area of the growth start surface on the base crystal where the group III nitride semiconductor crystal starts to grow is set smaller than the target group III nitride semiconductor crystal growth surface. The growth region (growth surface) at the initial stage of growth tends to be smaller than when a general base crystal is used. For this reason, if a source gas amount similar to that in the case of using a general base crystal is supplied, the source material becomes excessive, and there is a high possibility that a polycrystalline portion is generated. Therefore, in the initial stage of growth where the growth region is relatively small, it is preferable to reduce the supply amount of the raw material gas and slow down the growth rate (hereinafter, the initial growth in which the growth rate is set slower is referred to as “initial slow growth”). Is).
The growth rate is usually 10 μm / h or more, preferably 15 μm / h or more, more preferably 20 μm / h or more, and usually 70 μm / h or less, preferably 60 μm / h or less, more preferably 50 μm / h or less. .
The source gas supply amount can be appropriately set depending on the area of the growth start surface, but the source gas supply partial pressure (NH ₃ ) is usually 1.50 × 10 ⁴ Pa or less, preferably 1.15 × 10 ⁴ Pa. Hereinafter, more preferably 8.00 × 10 ³ Pa or less, usually 3.00 × 10 ³ Pa or more, preferably 3.60 × 10 ³ Pa or more, more preferably 4.20 × 10 ² Pa or more. . The source gas supply partial pressure (GaCl) is usually 9.00 × 10 ² Pa or less, preferably 7.00 × 10 ² Pa or less, more preferably 5.00 × 10 ² Pa or less. 20 × 10 ² Pa or more, preferably 1.60 × 10 ² Pa or more, more preferably 2.00 × 10 ² Pa or more.
The temperature condition for the initial slow growth is usually 800 ° C. or higher, preferably 860 ° C. or higher, more preferably 920 ° C. or higher, and usually 1200 ° C. or lower, preferably 1100 ° C. or lower, more preferably 1000 ° C. or lower.
The growth time for the initial slow growth is usually 4 hours or longer, preferably 10 hours or longer, more preferably 16 hours or longer. Generation | occurrence | production of a polycrystal part can be suppressed as it is the said range.

<Growth>
The growth rate of the main growth after the initial low-speed growth is usually 25 μm / h or more, preferably 30 μm / h or more, more preferably 35 μm / h or more, and usually 150 μm / h or less, preferably 100 μm / h. h or less, more preferably 80 μm / h or less.
The raw material gas supply partial pressure (NH ₃ ) is usually 1.50 × 10 ⁴ Pa or less, preferably 1.15 × 10 ⁴ Pa or less, more preferably 8.00 × 10 ³ Pa or less, and usually 3.00. × 10 ³ Pa or more, preferably 3.60 × 10 ³ Pa or more, more preferably 4.20 × 10 ² Pa or more. The source gas supply partial pressure (GaCl) is usually 9.00 × 10 ² Pa or less, preferably 7.00 × 10 ² Pa or less, more preferably 5.00 × 10 ² Pa or less. 20 × 10 ² Pa or more, preferably 1.60 × 10 ² Pa or more, more preferably 2.00 × 10 ² Pa or more.
The temperature conditions for the main growth are usually 800 ° C. or higher, preferably 860 ° C. or higher, more preferably 920 ° C. or higher, and usually 1200 ° C. or lower, preferably 1100 ° C. or lower, more preferably 1000 ° C. or lower.
The growth time of the main growth is usually 20 hr or more, preferably 30 hr or more, more preferably 40 hr or more, and usually 150 hr or less, preferably 120 hr or less, more preferably 100 hr or less.

<Intermittent growth>
As the growth time elapses, the growth region becomes larger, and the risk of the occurrence of the polycrystalline portion as described above is reduced. However, the polycrystalline portion may still be generated. For example, in the case of crystal growth in which the M plane is the growth plane (growth start plane), a polycrystalline region is likely to occur when the off angle in the + C axis direction is large and the off angle in the −C axis direction is small. . Therefore, by temporarily cutting off or reducing the raw material supply, the raw material concentration on the growth surface is lowered and the crystal growth is slowed down, so that the generation of polycrystalline sites can be suppressed (hereinafter referred to as the temporary growth rate). The growth that slows down is sometimes abbreviated as “intermittent growth”). In the intermittent growth, the source gas supply partial pressure (GaCl) is preferably lowered to 4.50 × 10 ¹ Pa, more preferably 4.50 Pa or less.

  In addition to the growth process described above, the manufacturing method of the present invention may include a slicing process for slicing the group III nitride semiconductor crystal to a desired size, a surface polishing process for polishing the surface, and the like. Specific examples of the slicing step include wire slicing and inner peripheral edge slicing, and the surface polishing step includes, for example, an operation of polishing the surface using abrasive grains such as diamond abrasive grains, CMP (chemical mechanical polishing). An operation of etching a damaged layer by RIE after mechanical polishing can be mentioned.

  The type of the group III nitride semiconductor crystal produced by the production method of the present invention is not particularly limited as long as it is a nitride semiconductor crystal containing a group III element. For example, one type of group III element such as GaN, AlN, InN, etc. In addition to nitrides composed of, composite nitrides composed of two or more Group III elements such as GaInN and GaAlN can be mentioned.

[Group III nitride semiconductor crystal]
In the method for producing a group III nitride semiconductor crystal of the present invention, one group III nitride semiconductor crystal is grown from two or more growth start surfaces of the base crystal, and the group III nitride semiconductor crystal growth surface is formed on the base crystal. The method includes a step of growing to an area of 3 times or more of the total area of the crystal growth start surface, but as described above, there are many in the crystal region (4 in FIG. 7) formed on the growth start surface. Whereas stacking faults occur, the crystal defects (5 in FIG. 7) formed by lateral growth tend to reduce stacking faults. The inventors of the present invention confirmed that basal plane dislocations were present in the crystal region formed by lateral growth, but observed basal plane dislocation density (observed from the growth plane side). Value) of 1.0 × 10 ⁷ cm ⁻² or less. Further, it was confirmed that the stacking fault density (value observed from the growth surface side) of the crystal region formed on the growth start surface was 1.0 × 10 ⁴ cm ⁻¹ or more. That is, according to the manufacturing method of the present invention, the basal plane dislocation density is 1.0 × 10 ⁷ cm ⁻² or less (hereinafter sometimes abbreviated as “low basal plane dislocation density region”) and stacking fault density. A group III nitride semiconductor crystal having a region of 1.0 × 10 ⁴ cm ⁻¹ or more (hereinafter sometimes abbreviated as “high base area layer defect density region”), and a low basal plane dislocation density region A group III nitride semiconductor crystal having a main surface in which a portion belonging to (19 in FIG. 7) has an area more than twice as large as a portion belonging to a high base area layer defect density region (20 in FIG. 7) is manufactured. It can be said that it is possible.
In addition, the stacking fault is a stacking irregularity of the basal plane widely known in the GaN crystal as described above. The determination of the presence or absence of stacking faults can be made by, for example, low-temperature PL (Photo Luminescence) measurement. Also, the stacking fault type can be determined by a transmission electron microscope. Further, in the case of a crystal having a feature that the stacking fault density partially reaches 1.0 × 10 ⁵ cm ⁻¹ , the stacking fault area and the stacking fault free area can be discriminated as a dark line parallel to the basal plane by a fluorescence microscope. It becomes possible. On the other hand, basal plane dislocations are different from threading dislocations widely known for GaN crystals and the like. The threading dislocation is a considerable number of dislocations of about 1.0 × 10 ⁹ cm ⁻² generated in the GaN crystal due to a large difference in lattice constant when a GaN crystal is vapor-phase grown on a different substrate such as a sapphire substrate. It is. On the other hand, the basal plane dislocation as referred to in the present invention is a dislocation introduced when a stress-induced slip occurs on the bottom surface, and is also called basal dislocation because its propagation direction is perpendicular to the crystal growth direction of GaN. It is what has been.

By the production method of the present invention, a low basal plane dislocation density region, that is, a region having a basal plane dislocation density of 1.0 × 10 ⁷ cm ⁻² or less, and a high base area layer defect density region, that is, stacking fault density is 1. Although a group III nitride semiconductor crystal having a region of 0 × 10 ⁴ cm ⁻¹ or more can be produced, the basal plane dislocation density in the low basal plane dislocation density region is 1.0 × 10 ⁶ cm ⁻² or less. It is preferable that it is 1.0 * 10 ^{< 5} > cm ^<-2> or less. Moreover, as a lower limit, it is 1.0 * 10 ^{< 3} > cm ^<-2 > or more normally. On the other hand, the stacking fault density (value observed from the growth surface side) of the high base area layer defect density region is 1.0 × 10 ⁴ cm ⁻¹ or more, but the upper limit is usually 1.0 × 10 ^6. cm ^-1 or less.

  By the manufacturing method of the present invention, a group III nitride semiconductor crystal having a main surface in which the area of the portion belonging to the low basal plane dislocation density region is at least twice the area of the portion belonging to the high base area layer defect density region is manufactured. However, it is preferable that the area of the portion belonging to the low basal plane dislocation density region has a main surface that is 10 times or more the area of the portion belonging to the high base area layer defect density region, and is 40 times or more. It is preferable to have a main surface that is In addition, the area of the portion belonging to the low basal plane dislocation density region is usually 500 times or less the area of the portion belonging to the high base area layer defect density region.

The area of the portion belonging to the low basal plane dislocation density region is not particularly limited, but is usually 2 cm ² or less, preferably 4 cm ² or less, more preferably 10 cm ² or less, and usually 0.2 cm ² or more, preferably 0.4 cm ^2. As described above, more preferably 1 cm ² or more.
Although the area of the portion belonging to the high basal plane stacking defect density region is not particularly limited, usually 0.25 cm ² or less, preferably 0.1 cm ² or less, more preferably 0.05 cm ² or less.

  In the group III nitride semiconductor crystal produced by the production method of the present invention, the low basal plane dislocation density region preferably has an XRC radius of curvature of 200 μm or more, more preferably 10 m or more.

  The features of the present invention will be described more specifically with reference to examples and comparative examples. The materials, amounts used, ratios, processing details, processing procedures, and the like shown in the following examples can be changed as appropriate without departing from the spirit of the present invention. Therefore, the scope of the present invention should not be construed as being limited by the specific examples shown below.

<Example 1>
(1) Preparation of seed crystal A template substrate having a C-plane as a main surface on which GaN was grown by MOCVD on a sapphire substrate having a diameter of 76 mmΦ was prepared. Placed on a made substrate holder and placed in the reactor of the HVPE apparatus. After the reactor was heated to 1020 ° C., HCl gas was supplied through the introduction tube, and GaCl gas generated by reacting with Ga in the reservoir was supplied into the reactor through the introduction tube. In such a GaN layer growth step on the base crystal, the reactor temperature of 1020 ° C. is maintained for 29 hours, the growth pressure is 1.01 × 10 ⁵ Pa, and the partial pressure of GaCl gas is 6.52 × 10 6. ^The partial pressure of NH ₃ gas was 7.54 × 10 ³ Pa, and the partial pressure of hydrogen chloride (HCl) was 3.55 × 10 ¹ Pa. After the completion of the GaN layer growth step, the temperature in the reactor was lowered to room temperature to obtain a C-plane grown GaN crystal that was a group III nitride semiconductor crystal. The obtained GaN crystal had a mirror surface as a growth surface, and the thickness measured by a stylus type film thickness meter was 3.5 mm. The obtained GaN crystal was subjected to the following heat treatment (high temperature corrosion annealing) without performing pretreatment such as cleaning, etching, and cap.

(Heat treatment)
The heat treatment was carried out by installing a GaN crystal in an alumina tube (Al ₂ O ₃ 99.7%) and introducing an ammonia / nitrogen mixed gas from the gas introduction tube at a flow rate of 200 ml / min. Ammonia / nitrogen mixed gas (NH ₃ 8.5% + N ₂ 91.5%) is 4
. A mixture of ammonia gas and nitrogen gas in a 47 liter cylinder of 9 MPa was used after being left for 45 days or more until a uniform mixed gas was obtained. When raising the temperature, the temperature was raised from room temperature to 600 ° C. at 300 ° C./hour using a heater, and from 600 ° C. to 1300 ° C. was raised at 250 ° C./hour. Thereafter, heat treatment was performed at 1300 ° C. for 6 hours. Then, it cooled from 1300 degreeC to 600 degreeC at 100 degreeC / hour.

(Washing)
The obtained crystal is immersed in concentrated nitric acid (containing 69% of HNO ₃ ) at 120 ° C. to remove the gallium metal adhering to the surface, and a crystal in which cream-like gallium oxyhydroxide and white gallium oxide are present on the surface A sample was obtained.

(Processing (etching, cap))
To remove the gallium hydroxide layer and gallium oxide layer on the front and back sides of the C surface, the C surface and the back surface are ground and polished by 500 μm or more, and then the + C surface is chemically polished to a uniform thickness of 0.4 mm ± 0.05 mm. A C-side polished wafer having A plate-like seed crystal having a short side: 0.4 mm, a height: 2.5 mm: a long side: more than 20 mm was obtained from the same C-surface polished wafer. When the crystal plane (index plane) on the surface of the plate-like seed crystal is represented by the conceptual diagram of the seed crystal in FIG. 4 (4a), 1 in FIG. 4 which is the growth start plane is the M plane, and the wide side (height) X Long side surface) is the C surface.

(2) Arrangement and crystal growth of plate seed crystal (underlying crystal) Prepare a carbon plate, place a (10-1-1) GaN substrate on it, and place a plate seed crystal produced did. The plate-like seed crystal was placed vertically so that one of the M-planes of the plate-like seed crystal faced the table, and the next another seed crystal plate was also placed vertically and arranged in parallel. At this time, in order to ensure the parallelism of the C-plane, a quartz ball (diameter 2 mm, diameter tolerance; ± 2.5 μm) manufactured by Humanity is provided between the seed crystals, and each quartz ball is a double-plate seed crystal. It arranged so that it might touch. Thus, the state in which the two plate-like seed crystals are arranged in parallel is preserved, placed on a SiC-coated carbon substrate holder having a diameter of 85 mm and a thickness of 20 mm, and placed in the reactor of the HVPE apparatus. Was raised to 1000 ° C., and a GaN single crystal film was grown for 40 hours by the HVPE method. In this single crystal growth step, the growth pressure is 1.01 × 10 ⁵ Pa, the partial pressure of GaCl gas is 2.75 × 10 ² Pa for 8 hours from the start of growth, and the partial pressure of NH ₃ gas is 3.89. × the initial slow growth implemented as 10 ³ Pa, then the partial pressure of GaCl gas was 4.12 × 10 ² Pa, practice the present growth the partial pressure of NH ₃ gas is changed from 8.24 × 10 ³ Pa did. After completion of the single crystal growth step, the temperature was lowered to room temperature to obtain an M-plane grown GaN crystal that was a group III nitride semiconductor crystal. One GaN crystal was obtained, and a mirror growth surface was obtained between the plate-like seed crystals. The thickness measured by a stylus type film thickness meter was 3.5 mm. It was also confirmed that the quartz sphere was confined between the plate crystals. The obtained GaN crystal was subjected to the following processing for evaluation without performing pretreatment such as cleaning, etching, and cap.

(3) Crystal Quality The obtained GaN crystal has an M-plane main surface, and it was confirmed by XRD that the c-axis and a-axis intersect at right angles in the plane. The A-plane of the obtained GaN crystal was mirror-finished with a # 3000 diamond polishing cloth to obtain an A-plane cross-section evaluation sample of a regrowth crystal containing a plate crystal suitable for an optical microscope.

As a result of cross-sectional observation, it was found by image processing measurement that the angle difference along the m-axis direction of the C-plane of the plate-like seed crystal was 0.33 °.
By the low temperature PL measurement, the basal plane dislocation density and the basal plane dislocation density in the region on the growth start surface and in the lateral growth region of the obtained GaN crystal were measured. The results are shown in Table 1, and an electron micrograph of the lateral growth region is shown in FIG. 8 (8a).
Stacking faults existed in the region on the growth start surface on the M-plane of both plate crystals, but were not detected in the lateral growth region.
Further, the radius of curvature of the crystal was measured by an X-ray diffraction method. Similarly, the results are shown in Table 1.

<Example 2>

The crystal was produced in the same manner as in Example 1. As a result of cross-sectional observation, the angle difference along the m-axis direction of the C-plane of the plate-like seed crystal was very bad at 1.52 °.
Similarly, the basal plane dislocation density and the basal plane dislocation density in the growth start surface region and the lateral growth region of the obtained GaN crystal were measured by low-temperature PL measurement. The results are shown in Table 1, and an electron micrograph of the lateral growth region is shown in FIG. 8 (8b).
Stacking faults existed in the region on the growth start surface on the M-plane of both plate crystals, but were not detected in the lateral growth region. However, the density of basal plane dislocations that can be the starting source of stacking faults was very high.

  The group III nitride semiconductor crystal produced by the production method of the present invention can be used for various applications. In particular, as a substrate for manufacturing a light emitting element on a relatively short wavelength side such as an ultraviolet to blue light emitting diode or a semiconductor laser, and a light emitting element on a relatively long wavelength side of green to red, further a semiconductor device such as an electronic device is used. It is also useful as a substrate.

DESCRIPTION OF SYMBOLS 1 Growth start surface 2 Growth direction 3 Growth surface 4 Crystal region formed on the growth start surface (region on the growth start surface)
5 Crystal region formed by lateral growth (lateral growth region)
6.7 Growth start plane (crystal plane)
8 Crystal axis on crystal plane 9 Angle difference of crystal plane 10 Angle difference of crystal axis on crystal plane 11 Base crystal 12 Mask layer 13 Short side of base crystal 14 Height of base crystal 15 Long side of base crystal 16 Base crystal (Seed crystal)
17 spherical support 18 cuboid support 19 Region where basal plane dislocation density is 1.0 × 10 ⁷ cm ⁻² or less (low basal plane dislocation density region)
20 Region where stacking fault density is 1.0 × 10 ⁴ cm ⁻¹ or more (high base area layer defect density region)
100 reactor (reaction vessel)
101-104 Introduction pipe 105 Reservoir 106 Heater 107 Susceptor 108 Exhaust pipe 109 Substrate holder

Claims (10)

A method for producing a group III nitride semiconductor crystal comprising a growth step of growing a group III nitride semiconductor crystal on an underlying crystal,
The growth step grows one group III nitride semiconductor crystal from two or more growth start surfaces of the base crystal, and the group III nitride semiconductor crystal grows as a total of the growth start surfaces of the base crystal. A method for producing a group III nitride semiconductor crystal, which is a step of growing to an area that is at least three times the area. The method for producing a group III nitride semiconductor crystal according to claim 1, wherein the growth start surface is a nonpolar surface or a semipolar surface. 3. The group III nitride semiconductor crystal according to claim 1, wherein the crystal planes of the two or more growth start surfaces are all the same, and an absolute value of an angle difference between the crystal planes is within 1 °. Production method. 4. The method according to claim 1, wherein the growth step is a step of growing a group III nitride semiconductor crystal from a growth start surface of each seed crystal using two or more seed crystals as a base crystal. The manufacturing method of the group III nitride semiconductor crystal of description. 5. The method for producing a group III nitride semiconductor crystal according to claim 4, wherein the seed crystal has a rectangular parallelepiped shape or a rectangular parallelepiped-derived shape having a narrow side surface aspect ratio (height / short side) of 3 or more. The method for producing a group III nitride semiconductor crystal according to claim 4 or 5, wherein the two or more seed crystals are disposed on a surface having a curvature radius of 3 m or more. The two or more seed crystals each have a side surface orthogonal to the growth start surface, and are installed so as to sandwich a support between the side surfaces. A method for producing a group III nitride semiconductor crystal of The method for producing a group III nitride semiconductor crystal according to claim 7, wherein the support has a spherical shape with an absolute value of a diameter tolerance of 50 µm or less. The method for producing a group III nitride semiconductor crystal according to claim 7, wherein the support has a rectangular parallelepiped shape with an absolute value of dimensional accuracy of 50 μm or less. The method for producing a group III nitride semiconductor crystal according to any one of claims 1 to 9, wherein the growth step is a step of crystal growth from a surface on the base crystal other than the growth start surface.