WO2013054782A1 - Resistance measuring device, connection resistance measuring method - Google Patents

Resistance measuring device, connection resistance measuring method Download PDF

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Publication number
WO2013054782A1
WO2013054782A1 PCT/JP2012/076078 JP2012076078W WO2013054782A1 WO 2013054782 A1 WO2013054782 A1 WO 2013054782A1 JP 2012076078 W JP2012076078 W JP 2012076078W WO 2013054782 A1 WO2013054782 A1 WO 2013054782A1
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WIPO (PCT)
Prior art keywords
voltage
electrode
capacitor
connection
resistance
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PCT/JP2012/076078
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French (fr)
Japanese (ja)
Inventor
誠 玉木
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シャープ株式会社
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Publication of WO2013054782A1 publication Critical patent/WO2013054782A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/006Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3648Control of matrices with row and column drivers using an active matrix
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2853Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0223Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/06Adjustment of display parameters
    • G09G2320/0693Calibration of display systems

Definitions

  • the present invention relates to a technique for measuring the resistance of a connection portion when an electronic component is connected to a connection wiring.
  • connection portion when an electronic component is connected to a connection wiring.
  • a signal having a predetermined voltage is output from the electronic component to the connection wiring
  • the voltage output from the electronic component the voltage input to the connection wiring, and the current flowing through the connection wiring
  • the voltage output from the electronic component can be measured using a probe or the like.
  • a technique for measuring the voltage of the core wire of the coated cable from the outside of the insulating coating is known (for example, Patent Document 1), and the voltage input to the connection wiring can be measured in a non-contact manner using this. Is possible.
  • connection wiring it may be difficult to measure the current flowing through the connection wiring.
  • By directly contacting the current measurement terminal with the connection wiring it is possible to measure the current flowing through the connection wiring.
  • the connection wiring it is necessary to expose the conduction portion of the connection wiring, which increases the damage factor of the wiring portion.
  • the miniaturization of the connection wiring is progressing due to the demand for miniaturization, it is difficult to align the contact measurement.
  • a technique that can measure the resistance of a connection portion in a non-destructive manner is desired.
  • This invention is made in view of such a condition, and it aims at providing the technique which can measure the connection resistance between the connection wiring connected to the electronic component, and the said electronic component nondestructively. .
  • a resistance measuring device of the present invention is a resistance measuring device for measuring a connection resistance between a connection wiring connected to an electronic component and the electronic component, and between the connection wiring
  • a fourth capacitor connected to the other electrode of the capacitor; a first measuring unit for measuring a first voltage, which is a voltage of the one electrode of the third capacitor, at a specified time; the first voltage and the reference Calculating a time change rate of the first voltage from the time; A calculating unit; a second measuring unit that measures a second voltage that is a voltage of the one electrode of the second capacitor at each specified time; and a time change of the second voltage from the second voltage and the reference time.
  • a second calculation unit that calculates a rate; and a measurement unit that measures the connection resistance, wherein the first capacitor and the second capacitor are set to the same capacitance, and the calculation unit outputs an output of the electronic component
  • the connection resistance is measured using the voltage, the voltage of the other electrode of the third capacitor, the first voltage and its time change rate, and the second voltage and its time change rate.
  • the current flowing through the composite capacitor constituted by the first capacitor and the second capacitor is used to change the amount of charge accumulated in the composite capacitor, that is, the time change rate of the first voltage and the time of the second voltage. It can be determined using the rate of change.
  • the current flowing through the connection wiring can be obtained without directly contacting the connection wiring, and the connection resistance between the connection wiring connected to the electronic component and the electronic component is nondestructive. Can be measured.
  • connection wiring is covered with an insulating film, and the first electrode and the second electrode form the first capacitor and the second capacitor in a non-contact state with the insulating film. It is good also as a structure. According to this resistance measuring device, when measuring the connection resistance, not only is not connected to the connection wiring, it is not necessary to contact the insulating film covering the connection wiring, so that the connection wiring is reliably prevented from being destroyed. can do.
  • connection wiring may be provided on a display panel
  • the output voltage of the electronic component may be a display panel driving voltage for driving the display panel.
  • the yield of the display panel can be improved by measuring the connection resistance between the connection wiring and the electronic component and changing the drive voltage.
  • the display panel may be a liquid crystal panel
  • the electronic component may be a liquid crystal driving integrated circuit that drives the liquid crystal panel.
  • the electronic component may be built in an IC circuit that drives the liquid crystal panel. According to this resistance measuring apparatus, the yield of the liquid crystal panel can be improved.
  • the measurement unit may calculate the connection resistance over a plurality of times and use the connection resistance as an average connection resistance measured by averaging the calculated connection resistances.
  • the present invention is also embodied in a connection resistance measuring method realized by using the above resistance measuring apparatus.
  • the connection resistance measuring method of the present invention is a method for measuring a connection resistance between a connection wiring connected to an electronic component and the electronic component, and a capacitor having the same capacity is formed between the connection wiring and the connection wiring.
  • An arrangement step of arranging the first electrode and the second electrode, and the other electrode of the third capacitor having a known third capacitance and one electrode connected to the first electrode, A connecting step of connecting the other electrode of the fourth capacitor having a fourth capacitor different from the third capacitor and having one electrode connected to the second electrode; and the disposing step and the connecting step end A measuring step of measuring a first voltage, which is a voltage of the one electrode of the third capacitor, and a second voltage, which is a voltage of the one electrode of the fourth capacitor, at the same specified time later; From the first voltage and the specified time A first calculation step of calculating a time change rate of the first voltage, a second calculation step of calculating a time change rate of the second voltage from the second voltage and the specified time, and an output voltage of the electronic component, And measuring the connection resistance using the voltage of the other electrode of the third capacitor, the first voltage and its time rate of change, and the second voltage and its time rate of change. .
  • connection resistance measurement method the current flowing through the connection wiring can be measured without directly contacting the connection wiring, and the connection resistance between the connection wiring connected to the electronic component and the electronic component is measured. Can be measured non-destructively.
  • the first voltage and the second voltage may be measured at the same timing in the measurement step.
  • the connection resistance between the connection wiring and the electronic component can be accurately measured using the first voltage and the second voltage measured at the same timing and their time rate of change. Can do.
  • connection resistance measuring method the voltage in the transient state of the third capacitor and the fourth capacitor may be measured in the measuring step.
  • this connection resistance measurement method by measuring the voltage in the transient state of the third capacitor and the fourth capacitor, it is possible to measure a change in the current flowing through the connection wiring, between the connection wiring and the electronic component. Can be measured.
  • connection resistance between the connection wiring connected to the electronic component and the said electronic component can be measured nondestructively.
  • FIG. 1 shows a liquid crystal panel (an example of a display panel) 10 according to this embodiment.
  • the liquid crystal panel 10 is mounted on, for example, a mobile phone, a PDA, a smartphone, or a tablet-type multifunction mobile terminal device.
  • the liquid crystal panel 10 includes a first glass substrate 11, a second glass substrate 12, and a liquid crystal driving IC (an example of an electronic component, hereinafter referred to as IC) 16.
  • IC liquid crystal driving IC
  • the liquid crystal panel 10 is, for example, a TFT (Thin Film Transistor) color liquid crystal panel, and a liquid crystal display unit 17 including a plurality of pixels P is formed in a region where the first glass substrate 11 and the second glass substrate 12 overlap each other.
  • each pixel P includes a TFT and a liquid crystal cell LC.
  • the on / off state of the TFT is switched based on the liquid crystal driving signal input from the liquid crystal driving IC 16 via the gate line Lg and the source line Ls, and the voltage applied to the liquid crystal cell LC changes. .
  • the transmittance of the liquid crystal cell LC changes.
  • a change in transmittance of each liquid crystal cell LC light incident from a backlight device (not shown) disposed behind the liquid crystal panel 10, and a color filter provided on the second glass substrate 12 are provided. In this way, a predetermined color image is displayed on the liquid crystal display unit 17.
  • a plurality of input wirings 13 made of, for example, ITO, a plurality of gate lines Lg, and a plurality of source lines Ls are formed according to the number of pixels P included in the liquid crystal display unit 17. Yes.
  • the input wiring 13, the gate line Lg, and the source line Ls are examples of connection wiring.
  • each input wiring 13 At one end of each input wiring 13, an FPC pad 13a for connection to an FPC (flexible substrate) 21 (see FIG. 2) is formed. At the other end of each input wiring 13, an IC pad portion 13 b for connecting to the input side pump Bin of the IC 16 is formed.
  • each gate line Lg and each source line Ls At one end of each gate line Lg and each source line Ls, an IC pad portion 15 for connecting to the output side pump pair Bout of the IC 16 is formed.
  • Each gate line Lg and each source line Ls are provided up to the liquid crystal display unit 17, the gate line Lg is connected to the gate G of the TFT of each pixel P, and the source line Ls is the TFT of each pixel P. Connected to the source S.
  • the surface of the input wiring 13 and the gate line Lg (source line Ls) is covered with an insulating film 18, and the FPC pad is formed by one end of the input wiring 13 that is not covered with the insulating film 18. 13a is formed.
  • the IC pad portion 13b is formed by the other end not covered by the insulating film 18 of the input wiring 13, and the IC pad portion is formed by the one end not covered by the insulating film 18 of the gate line Lg (source line Ls). 15 is formed.
  • the FPC pad 13 a is electrically connected to the FPC 21 by the anisotropic conductive material 19
  • the IC pad portions 13 b and 15 are electrically connected to the IC 16 by the anisotropic conductive material 19. Has been.
  • the IC 16 and the IC pad 15 are electrically connected by thermocompression bonding via an anisotropic conductive material 19.
  • the resistance value may increase due to a change in the pressure bonding conditions and the like, and the connection resistance R between the IC 16 and the IC pad portion 15 may increase.
  • the connection resistance R between the IC 16 and the IC pad unit 15 increases, the liquid crystal drive voltage of the liquid crystal drive signal input to the gate line Lg (source line Ls) decreases, and the liquid crystal display unit 17 is suitable for the liquid crystal display unit 17. A color image cannot be displayed. Therefore, it is necessary to measure the connection resistance R between the IC 16 and the IC pad portion 15.
  • connection resistance R it is necessary to measure the output voltage of the IC 16, the input voltage of the IC pad section 15, and the current flowing through the gate line Lg (source line Ls).
  • the connection portion with the IC pad portion 15 is covered with an anisotropic conductive material 19, and a probe or the like is directly brought into contact with the IC pad portion 15 to input voltage to the IC pad portion 15. And it is difficult to measure current.
  • the gate line Lg (source line Ls) continuous to the IC pad portion 15 is covered with an insulating film 18, and the input voltage and current of the IC pad portion 15 are measured by directly contacting a probe or the like. Difficult to do.
  • the current flowing through the gate line Lg (source line Ls) is measured without directly contacting the IC pad unit 15 and the gate line Lg (source line Ls). .
  • FIG. 3 shows a resistance measuring device 31 of this embodiment.
  • the resistance measurement device 31 includes a first electrode 33, a second electrode 35, a third capacitor 37, and a fourth capacitor 39.
  • the first electrode 33 is connected to one electrode 37 a of the third capacitor 37.
  • the second electrode 35 is connected to one electrode 39 a of the fourth capacitor 39.
  • the third capacitor 37 has a known capacitance Cop3, and the other electrode 37b is connected to the ground voltage (an example of a reference voltage).
  • the fourth capacitor 39 has a known capacitance Cop 4 different from the capacitance Cop 3, and the other electrode 39 b is connected to the other electrode 37 b of the third capacitor 37. Therefore, the other electrode 39b of the fourth capacitor 39 is also connected to the ground voltage.
  • the resistance measurement device 31 includes a voltmeter (an example of a first measurement unit and a second measurement unit) 41 and a CPU (an example of a first calculation unit, a second calculation unit, and a measurement unit) 43.
  • the voltmeter 41 is connected to the CPU 43 and measures the first voltage V1 of one electrode 37a of the third capacitor 37 and the second voltage V2 of one electrode 39a of the fourth capacitor 39.
  • the voltmeter 41 measures these voltages at the same timing and every specified time ⁇ T, and stores the measured voltages V1 and V2 in the memory 45 of the CPU 43.
  • the specified time ⁇ T for measuring the voltage by the voltmeter 41 is set to about several picoseconds corresponding to a period of several terahertz.
  • the CPU 43 further uses the liquid crystal driving voltage Vin, the first voltage V1, the second voltage V2, the first differential voltage ⁇ V1, and the second differential voltage ⁇ V2 measured by using the IC 16 to connect resistance R. Measure.
  • connection resistance R the measurement process of the connection resistance R will be described with reference to FIG. 4 or FIG. FIG. 4 shows a flowchart of the measurement process.
  • description is given using an example in which the connection resistance R between the IC 16 and the gate line Lg is measured.
  • the connection resistance R between the IC 16 and the source line Ls can be measured in the same manner.
  • the connection resistance R between the FPC 21 and the input wiring 13 can be similarly measured.
  • the resistance measuring device 31 is arranged close to the target gate line Lg (S2).
  • the first electrode 33 of the resistance measuring device 31 is disposed to face the gate line Lg, and forms a first capacitor C1 having a capacitance Cs with the gate line Lg.
  • the second electrode 35 of the resistance measuring device 31 is disposed to face the gate line Lg, and forms a second capacitor C2 having a capacitance Cs with the gate line Lg. That is, the resistance measuring device 31 is arranged so that the capacities of the first capacitor C1 and the second capacitor C2 are equal.
  • the resistance measuring device 31 is arranged in a non-contact state with respect to the liquid crystal panel 10 in order to prevent the insulating film 18 from being damaged by the resistance measuring device 31 and the gate line Lg from being disconnected.
  • the voltmeter 41 measures the first voltage V1 and the second voltage V2 (S4), and the CPU 43 calculates the time change rates D1 and D2. Calculate (S6, S8). As shown in FIG. 5, the voltmeter 41 measures the voltages V1 and V2 in a transient state such as when the liquid crystal drive voltage Vin is switched (changed from zero to Vin in FIG. 5). The change rates D1 and D2 are calculated.
  • the “transient state” means a state in which the voltage applied to the third capacitor 37 and the fourth capacitor 39 is not stable and a charge / discharge current flows through the third capacitor 37 and the fourth capacitor 39. To do.
  • connection resistance R (Calculation formula for connection resistance)
  • Cm Cs * Cop3 / (Cs + Cop3) + Cs * Cop4 / (Cs + Cop4)
  • connection resistance R (Vin ⁇ Vm) / Im
  • connection resistance R (Vin ⁇ Vm) / (Cm ⁇ dVm / dT)
  • the time change rate dVm / dT can be calculated using the input voltage Vm and the time change rates D1 and D2. That is, the connection resistance R is calculated using the known capacitances Cop3 and Cop4, the measured voltages V1 and V2, and the calculated time change rates D1 and D2.
  • the CPU 43 calculates the connection resistance R every specified time ⁇ T, and uses the average connection resistance R obtained by averaging the calculated connection resistances R as the connection resistance R between the IC 16 and the target gate line Lg (S10). ).
  • the current flowing in the target gate line Lg from the transient current Im flowing in the composite capacitor constituted by the first capacitor C1 to the fourth capacitor 39. Im is obtained, and the transient state current Im flowing in the composite capacitor uses the change in the amount of charge accumulated in the composite capacitor, that is, the time change rate D1 of the first voltage V1 and the time change rate D2 of the second voltage V2. Can be obtained.
  • the current Im flowing in the target gate line Lg can be obtained without being directly connected to the gate line Lg, and the connection resistance R between the IC 16 and the target gate line Lg. Can be measured non-destructively.
  • the resistance measurement device 31 of the present embodiment if a capacitor having the same capacity can be formed using the first electrode 33 and the second electrode 35, the resistance measurement device 31 is not brought into contact with the liquid crystal panel 10.
  • the connection resistance R can be measured. Since the gate line Lg and the like provided in the liquid crystal panel 10 are formed as a thin film, the gate line Lg and the like are damaged when the resistance measuring device 31 and the liquid crystal panel 10 come into contact with each other even through the insulating film 18. Sometimes. According to this resistance measuring device 31, since the connection resistance R can be measured without bringing the resistance measuring device 31 into contact with the liquid crystal panel 10, it is possible to reliably prevent the gate line Lg and the like from being destroyed. .
  • the specified time ⁇ T is set to about several picoseconds corresponding to a period of several terahertz.
  • the area other than the liquid crystal display unit 17 is required to be downsized, and the line width of the input wiring 13 and the gate line Lg (source line Ls).
  • the capacitance Cs of the first capacitor C1 (second capacitor C2) formed by the target gate line Lg and the first electrode 33 (second electrode 35) is set to about several pF (picofarad).
  • the capacity stored in the first capacitor C1 (second capacitor C2) is also small, and the period of the transient state is also shortened.
  • the specified time ⁇ T is set to be as short as several picoseconds. Therefore, the time change rates D1 and D2 of the voltages V1 and V2 in the transient state of the liquid crystal panel 10 are obtained using the resistance measuring device 31.
  • the connection resistance R can be measured.
  • connection resistance R when measuring the connection resistance R, a plurality of connection resistances R are calculated, and the average value of these connection resistances R is the measured connection resistance R. There is no need to calculate.
  • the connection resistance R calculated after a preset reference time from the switching of the liquid crystal drive voltage Vin may be used as the measured connection resistance R.
  • the present invention is not limited to this. Any electronic component that outputs a signal having a predetermined voltage is not particularly limited. Further, the display panel provided with the target connection wiring is not limited. In the above embodiment, the liquid crystal panel is exemplified, but the present invention can also be applied to other types of display panels, for example, EL panels.
  • the display panel may not be provided with the target connection wiring.
  • the present invention can be applied to wiring provided on a printed circuit board or a solar panel.
  • the specified time ⁇ T can be freely set according to the line width of the target connection wiring.
  • the resistance measurement device 31 has been described using the example in which the other electrode 37b of the third capacitor 37 is connected to the ground voltage. It may be connected to. Further, it may be connected to a fluctuating voltage such as a pulse voltage. When the pulse period is set longer than the specified time ⁇ T, it can be regarded as a constant voltage at the time of measurement.
  • the resistance measuring device 31 is arranged on the insulating film 18 side of the target gate line Lg, and the connection resistance R is measured.
  • the connection resistance R may be measured by arranging it on the first glass substrate 11 side.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

In this resistance measuring device (31), a first electrode (33) and a second electrode (35) are arranged relative to a target gate line (Lg) so as to form the same capacity, and the voltages (V1, V2) of one electrode (37a) of a third capacitor (37) connected to the first electrode (33) and of one electrode (39a) of a fourth capacitor (39) connected to the second electrode (35), and also the rates of change over time (D1, D2) of said voltages (V1, V2), are calculated. The CPU (43) can then use the calculated voltages (V1, V2) and rates of change over time (D1, D2) thereof to calculate the current (Im) flowing through the gate line (Lg), and can measure the connection resistance (R).

Description

抵抗測定装置、接続抵抗の測定方法Resistance measuring device, connection resistance measuring method
 本発明は、電子部品を接続配線に接続した際の接続部の抵抗を測定する技術に関する。 The present invention relates to a technique for measuring the resistance of a connection portion when an electronic component is connected to a connection wiring.
 従来、電子部品を接続配線に接続した際の接続部の抵抗を測定したいという要望がある。例えば、電子部品から接続配線に対して所定の電圧を有する信号を出力しているような場合には、電子部品から出力される電圧と、接続配線に入力される電圧と、接続配線に流れる電流を測定することで、接続部の抵抗を測定することが可能である。電子部品から出力される電圧は、プローブ等を用いて測定することができる。また、被覆ケーブルの心線の電圧を絶縁被覆の外側から測定する技術が知られており(例えば、特許文献1)、これを用いて接続配線に入力される電圧を非接触で測定することが可能である。 Conventionally, there is a desire to measure the resistance of a connection portion when an electronic component is connected to a connection wiring. For example, when a signal having a predetermined voltage is output from the electronic component to the connection wiring, the voltage output from the electronic component, the voltage input to the connection wiring, and the current flowing through the connection wiring It is possible to measure the resistance of the connection part by measuring. The voltage output from the electronic component can be measured using a probe or the like. Further, a technique for measuring the voltage of the core wire of the coated cable from the outside of the insulating coating is known (for example, Patent Document 1), and the voltage input to the connection wiring can be measured in a non-contact manner using this. Is possible.
特開2000-65868号公報JP 2000-65868 A
(発明が解決しようとする課題)
 しかし、接続配線に流れる電流を測定することが難しい場合がある。接続配線に電流測定端子を直接接触させることで、接続配線に流れる電流を測定することは可能である。しかし、回路基板や液晶パネル等の分野では、接続配線に電流測定端子を直接接触させた場合、その接続配線の導通部を露出する必要があり、配線部の破損要因を増加させる。また、小型化の要望から接続配線の微細化が進んでいる為、接触測定の位置合わせが困難である。非破壊で接続部の抵抗を測定することができる技術が所望されている。
(Problems to be solved by the invention)
However, it may be difficult to measure the current flowing through the connection wiring. By directly contacting the current measurement terminal with the connection wiring, it is possible to measure the current flowing through the connection wiring. However, in the field of circuit boards, liquid crystal panels, and the like, when the current measurement terminal is brought into direct contact with the connection wiring, it is necessary to expose the conduction portion of the connection wiring, which increases the damage factor of the wiring portion. Further, since the miniaturization of the connection wiring is progressing due to the demand for miniaturization, it is difficult to align the contact measurement. A technique that can measure the resistance of a connection portion in a non-destructive manner is desired.
 本発明は、このような状況に鑑みてなされたものであり、電子部品に接続された接続配線と当該電子部品との間の接続抵抗を非破壊で測定できる技術を提供することを目的とする。 This invention is made in view of such a condition, and it aims at providing the technique which can measure the connection resistance between the connection wiring connected to the electronic component, and the said electronic component nondestructively. .
(課題を解決するための手段)
 上記課題を解決するために、本発明の抵抗測定装置は、電子部品に接続された接続配線と当該電子部品との間の接続抵抗を測定する抵抗測定装置であって、前記接続配線との間で第1容量の第1コンデンサを形成する第1電極と、前記接続配線との間で第2容量の第2コンデンサを形成する第2電極と、既知の第3容量を有し、一方の電極が前記第1電極に接続される第3コンデンサと、既知であるとともに前記第3容量と異なる第4容量を有し、一方の電極が前記第2電極に接続され、他方の電極が前記第3コンデンサの他方の電極に接続される第4コンデンサと、前記第3コンデンサの前記一方の電極の電圧である第1電圧を規定時間毎に計測する第1計測部と、前記第1電圧と前記基準時間から前記第1電圧の時間変化率を算出する第1算出部と、前記第2コンデンサの前記一方の電極の電圧である第2電圧を前記規定時間毎に計測する第2計測部と、前記第2電圧と前記基準時間から前記第2電圧の時間変化率を算出する第2算出部と、前記接続抵抗を測定する測定部と、を備え、前記第1容量と前記第2容量は同一の容量に設定され、前記算出部は、前記電子部品の出力電圧と、前記第3コンデンサの他方の電極の電圧と、前記第1電圧及びその時間変化率と、前記第2電圧及びその時間変化率と、を用いて前記接続抵抗を測定する。
(Means for solving the problem)
In order to solve the above problems, a resistance measuring device of the present invention is a resistance measuring device for measuring a connection resistance between a connection wiring connected to an electronic component and the electronic component, and between the connection wiring A first electrode that forms a first capacitor having a first capacity, a second electrode that forms a second capacitor having a second capacity between the connection wirings, and one electrode having a known third capacity. Has a fourth capacitor that is known and is different from the third capacitor, one electrode is connected to the second electrode, and the other electrode is the third capacitor connected to the first electrode. A fourth capacitor connected to the other electrode of the capacitor; a first measuring unit for measuring a first voltage, which is a voltage of the one electrode of the third capacitor, at a specified time; the first voltage and the reference Calculating a time change rate of the first voltage from the time; A calculating unit; a second measuring unit that measures a second voltage that is a voltage of the one electrode of the second capacitor at each specified time; and a time change of the second voltage from the second voltage and the reference time. A second calculation unit that calculates a rate; and a measurement unit that measures the connection resistance, wherein the first capacitor and the second capacitor are set to the same capacitance, and the calculation unit outputs an output of the electronic component The connection resistance is measured using the voltage, the voltage of the other electrode of the third capacitor, the first voltage and its time change rate, and the second voltage and its time change rate.
 この抵抗測定装置では、第1コンデンサないし第2コンデンサによって構成される合成コンデンサに流れる電流を、当該合成コンデンサに蓄積される電荷量の変化、すなわち第1電圧の時間変化率と第2電圧の時間変化率とを用いて求めることができる。この抵抗測定装置によれば、接続配線に流れる電流を接続配線に直接的に接触させることなく求めることができ、電子部品に接続された接続配線と当該電子部品との間の接続抵抗を非破壊で測定することができる。 In this resistance measuring apparatus, the current flowing through the composite capacitor constituted by the first capacitor and the second capacitor is used to change the amount of charge accumulated in the composite capacitor, that is, the time change rate of the first voltage and the time of the second voltage. It can be determined using the rate of change. According to this resistance measuring apparatus, the current flowing through the connection wiring can be obtained without directly contacting the connection wiring, and the connection resistance between the connection wiring connected to the electronic component and the electronic component is nondestructive. Can be measured.
 上記抵抗測定装置では、前記接続配線は、絶縁膜により覆われており、前記第1電極及び前記第2電極は、前記絶縁膜と非接触状態において前記第1コンデンサ及び前記第2コンデンサを形成する構成としてもよい。この抵抗測定装置によれば、接続抵抗を測定する際に、接続配線に接続されないばかりでなく、接続配線を覆う絶縁膜に接触する必要もないので、接続配線が破壊されることを確実に抑制することができる。 In the resistance measuring apparatus, the connection wiring is covered with an insulating film, and the first electrode and the second electrode form the first capacitor and the second capacitor in a non-contact state with the insulating film. It is good also as a structure. According to this resistance measuring device, when measuring the connection resistance, not only is not connected to the connection wiring, it is not necessary to contact the insulating film covering the connection wiring, so that the connection wiring is reliably prevented from being destroyed. can do.
 上記抵抗測定装置では、前記接続配線は、表示パネルに設けられており、前記電子部品の出力電圧は、前記表示パネルを駆動する表示パネル駆動電圧である構成としてもよい。この抵抗測定装置によれば、接続配線と電子部品の接続抵抗を測定し、駆動電圧を変更することによって表示パネルの歩留まりを向上させることができる。 In the resistance measurement device, the connection wiring may be provided on a display panel, and the output voltage of the electronic component may be a display panel driving voltage for driving the display panel. According to this resistance measuring apparatus, the yield of the display panel can be improved by measuring the connection resistance between the connection wiring and the electronic component and changing the drive voltage.
 上記抵抗測定装置では、前記表示パネルは、液晶パネルであり、前記電子部品は、前記液晶パネルを駆動する液晶駆動用集積回路である構成としてもよい。すなわち、液晶パネルを駆動するIC回路に内蔵する構成としてもよい。この抵抗測定装置によれば、液晶パネルの歩留まりを向上させることができる。 In the resistance measuring apparatus, the display panel may be a liquid crystal panel, and the electronic component may be a liquid crystal driving integrated circuit that drives the liquid crystal panel. In other words, it may be built in an IC circuit that drives the liquid crystal panel. According to this resistance measuring apparatus, the yield of the liquid crystal panel can be improved.
 上記抵抗測定装置では、前記測定部は、複数回に亘って前記接続抵抗を算出し、その算出した前記接続抵抗を平均した平均接続抵抗を測定した前記接続抵抗とする構成としてもよい。 In the resistance measuring apparatus, the measurement unit may calculate the connection resistance over a plurality of times and use the connection resistance as an average connection resistance measured by averaging the calculated connection resistances.
 本発明は、上記の抵抗測定装置を用いて実現される接続抵抗の測定方法にも具現化される。本発明の接続抵抗の測定方法は、電子部品に接続された接続配線と当該電子部品との間の接続抵抗を測定する方法であって、前記接続配線との間で同一の容量のコンデンサを形成するように、第1電極及び第2電極を配置する配置工程と、既知の第3容量を有し、一方の電極が前記第1電極に接続される第3コンデンサの他方の電極と、既知であるとともに前記第3容量と異なる第4容量を有し、一方の電極が前記第2電極に接続される第4コンデンサの他方の電極とを接続する接続工程と、前記配置工程及び前記接続工程終了後に、前記第3コンデンサの前記一方の電極の電圧である第1電圧と、前記第4コンデンサの前記一方の電極の電圧である第2電圧と、を同一の規定時間毎に計測する計測工程と、前記第1電圧と前記規定時間から前記第1電圧の時間変化率を算出する第1算出工程と、前記第2電圧と前記規定時間から前記第2電圧の時間変化率を算出する第2算出工程と、前記電子部品の出力電圧と、前記第3コンデンサの他方の電極の電圧と、前記第1電圧及びその時間変化率と、前記第2電圧及びその時間変化率と、を用いて前記接続抵抗を測定する測定工程と、を含む。 The present invention is also embodied in a connection resistance measuring method realized by using the above resistance measuring apparatus. The connection resistance measuring method of the present invention is a method for measuring a connection resistance between a connection wiring connected to an electronic component and the electronic component, and a capacitor having the same capacity is formed between the connection wiring and the connection wiring. An arrangement step of arranging the first electrode and the second electrode, and the other electrode of the third capacitor having a known third capacitance and one electrode connected to the first electrode, A connecting step of connecting the other electrode of the fourth capacitor having a fourth capacitor different from the third capacitor and having one electrode connected to the second electrode; and the disposing step and the connecting step end A measuring step of measuring a first voltage, which is a voltage of the one electrode of the third capacitor, and a second voltage, which is a voltage of the one electrode of the fourth capacitor, at the same specified time later; From the first voltage and the specified time A first calculation step of calculating a time change rate of the first voltage, a second calculation step of calculating a time change rate of the second voltage from the second voltage and the specified time, and an output voltage of the electronic component, And measuring the connection resistance using the voltage of the other electrode of the third capacitor, the first voltage and its time rate of change, and the second voltage and its time rate of change. .
 この接続抵抗の測定方法によれば、接続配線に流れる電流を接続配線に直接的に接触させることなく測定することができ、電子部品に接続された接続配線と当該電子部品との間の接続抵抗を非破壊で測定することができる。 According to this connection resistance measurement method, the current flowing through the connection wiring can be measured without directly contacting the connection wiring, and the connection resistance between the connection wiring connected to the electronic component and the electronic component is measured. Can be measured non-destructively.
 上記接続抵抗の測定方法では、前記計測工程において、前記第1電圧及び前記第2電圧は、同一タイミングで計測される構成としてもよい。この接続抵抗の測定方法によれば、同一タイミングで計測された第1電圧及び第2電圧及びそれらの時間変化率を用いて、接続配線と電子部品との間の接続抵抗を精度良く測定することができる。 In the connection resistance measurement method, the first voltage and the second voltage may be measured at the same timing in the measurement step. According to this connection resistance measurement method, the connection resistance between the connection wiring and the electronic component can be accurately measured using the first voltage and the second voltage measured at the same timing and their time rate of change. Can do.
 上記接続抵抗の測定方法では、前記計測工程において、前記第3コンデンサ及び前記第4コンデンサの過渡状態における電圧が計測される構成としてもよい。この接続抵抗の測定方法によれば、第3コンデンサ及び第4コンデンサの過渡状態における電圧を計測することで、接続配線に流れる電流の変化を測定することができ、接続配線と電子部品との間の接続抵抗を測定することができる。 In the connection resistance measuring method, the voltage in the transient state of the third capacitor and the fourth capacitor may be measured in the measuring step. According to this connection resistance measurement method, by measuring the voltage in the transient state of the third capacitor and the fourth capacitor, it is possible to measure a change in the current flowing through the connection wiring, between the connection wiring and the electronic component. Can be measured.
(発明の効果)
 本発明によれば、電子部品に接続された接続配線と当該電子部品との間の接続抵抗を非破壊で測定することができる。
(The invention's effect)
ADVANTAGE OF THE INVENTION According to this invention, the connection resistance between the connection wiring connected to the electronic component and the said electronic component can be measured nondestructively.
液晶パネルの概略的な構成を示す図である。It is a figure which shows the schematic structure of a liquid crystal panel. 液晶パネルの断面を示す図である。It is a figure which shows the cross section of a liquid crystal panel. 抵抗測定装置の概略的な構成を示す図である。It is a figure which shows schematic structure of a resistance measuring apparatus. 測定処理のフローチャートを示す図である。It is a figure which shows the flowchart of a measurement process. 入力電圧の過渡状態を示すグラフである。It is a graph which shows the transient state of input voltage. 液晶パネルの断面を示す図である。It is a figure which shows the cross section of a liquid crystal panel.
 <実施形態>
 本発明の一実施形態を、図面を参照して説明する。
 1.液晶パネルの構成
 図1に、本実施形態の液晶パネル(表示パネルの一例)10を示す。液晶パネル10は、例えば、携帯電話、PDA、スマートフォン、タブレット型多機能携帯端末装置に搭載される。図1に示すように、液晶パネル10は、第1ガラス基板11、第2ガラス基板12、液晶駆動用IC(電子部品の一例、以下IC)16を含む。
<Embodiment>
An embodiment of the present invention will be described with reference to the drawings.
1. Configuration of Liquid Crystal Panel FIG. 1 shows a liquid crystal panel (an example of a display panel) 10 according to this embodiment. The liquid crystal panel 10 is mounted on, for example, a mobile phone, a PDA, a smartphone, or a tablet-type multifunction mobile terminal device. As shown in FIG. 1, the liquid crystal panel 10 includes a first glass substrate 11, a second glass substrate 12, and a liquid crystal driving IC (an example of an electronic component, hereinafter referred to as IC) 16.
 液晶パネル10は、例えば、TFT(Thin Film Transistor)カラー液晶パネルであり、第1ガラス基板11と第2ガラス基板12とが重なって存在する領域に複数の画素Pを含む液晶表示部17が形成されている。図1に示すように、各画素Pには、TFTおよび液晶セルLCが含まれる。各画素Pでは、ゲート線Lg及びソース線Lsを介して液晶駆動用IC16から入力される液晶駆動信号に基づいてTFTのオン/オフ状態が切り換わり、液晶セルLCに印加される電圧が変化する。 The liquid crystal panel 10 is, for example, a TFT (Thin Film Transistor) color liquid crystal panel, and a liquid crystal display unit 17 including a plurality of pixels P is formed in a region where the first glass substrate 11 and the second glass substrate 12 overlap each other. Has been. As shown in FIG. 1, each pixel P includes a TFT and a liquid crystal cell LC. In each pixel P, the on / off state of the TFT is switched based on the liquid crystal driving signal input from the liquid crystal driving IC 16 via the gate line Lg and the source line Ls, and the voltage applied to the liquid crystal cell LC changes. .
 液晶パネル10では、各画素Pの液晶セルLCに印加される電圧を制御することで、液晶セルLCの透過率が変化する。液晶パネル10では、各液晶セルLCの透過率の変化、液晶パネル10の後方に配置されたバックライト装置(不図示)から入射される光、及び第2ガラス基板12に設けられたカラーフィルタを用いて、液晶表示部17に所定のカラー画像が表示される。 In the liquid crystal panel 10, by controlling the voltage applied to the liquid crystal cell LC of each pixel P, the transmittance of the liquid crystal cell LC changes. In the liquid crystal panel 10, a change in transmittance of each liquid crystal cell LC, light incident from a backlight device (not shown) disposed behind the liquid crystal panel 10, and a color filter provided on the second glass substrate 12 are provided. In this way, a predetermined color image is displayed on the liquid crystal display unit 17.
 更に、第1ガラス基板11には、例えばITOからなる複数の入力配線13、複数のゲート線Lg、複数のソース線Lsが、液晶表示部17に含まれる画素Pの数に応じて形成されている。入力配線13、ゲート線Lg、ソース線Lsが接続配線の一例である。 Further, on the first glass substrate 11, a plurality of input wirings 13 made of, for example, ITO, a plurality of gate lines Lg, and a plurality of source lines Ls are formed according to the number of pixels P included in the liquid crystal display unit 17. Yes. The input wiring 13, the gate line Lg, and the source line Ls are examples of connection wiring.
 各入力配線13の一端には、FPC(フレキシブル基板)21(図2参照)と接続するためのFPC用パッド13aが形成されている。各入力配線13の他端には、IC16の入力側パンプBinと接続するためのIC用パッド部13bが形成されている。 At one end of each input wiring 13, an FPC pad 13a for connection to an FPC (flexible substrate) 21 (see FIG. 2) is formed. At the other end of each input wiring 13, an IC pad portion 13 b for connecting to the input side pump Bin of the IC 16 is formed.
 各ゲート線Lg及び各ソース線Lsの一端には、IC16の出力側パンプ対Boutと接続するためのIC用パッド部15が形成されている。各ゲート線Lg及び各ソース線Lsは、液晶表示部17内にまで設けられており、ゲート線Lgは、各画素PのTFTのゲートGに接続され、ソース線Lsは、各画素PのTFTのソースSに接続される。 At one end of each gate line Lg and each source line Ls, an IC pad portion 15 for connecting to the output side pump pair Bout of the IC 16 is formed. Each gate line Lg and each source line Ls are provided up to the liquid crystal display unit 17, the gate line Lg is connected to the gate G of the TFT of each pixel P, and the source line Ls is the TFT of each pixel P. Connected to the source S.
 図2に示すように、入力配線13及びゲート線Lg(ソース線Ls)は、その表面が絶縁膜18によって覆われており、入力配線13の絶縁膜18によって覆われていない一端によってFPC用パッド13aが形成されている。同様に、入力配線13の絶縁膜18によって覆われていない他端によってIC用パッド部13bが形成され、ゲート線Lg(ソース線Ls)の絶縁膜18によって覆われていない一端によってIC用パッド部15が形成されている。図2に示すように、FPC用パッド13aは、異方性導電材19によってFPC21と電気的に接続され、IC用パッド部13b、15は、異方性導電材19によってIC16と電気的に接続されている。 As shown in FIG. 2, the surface of the input wiring 13 and the gate line Lg (source line Ls) is covered with an insulating film 18, and the FPC pad is formed by one end of the input wiring 13 that is not covered with the insulating film 18. 13a is formed. Similarly, the IC pad portion 13b is formed by the other end not covered by the insulating film 18 of the input wiring 13, and the IC pad portion is formed by the one end not covered by the insulating film 18 of the gate line Lg (source line Ls). 15 is formed. As shown in FIG. 2, the FPC pad 13 a is electrically connected to the FPC 21 by the anisotropic conductive material 19, and the IC pad portions 13 b and 15 are electrically connected to the IC 16 by the anisotropic conductive material 19. Has been.
 2.液晶パネルの駆動
 液晶パネル10では、FPC21を介して外部から入力された各種信号が、IC16に入力され、IC16により液晶表示部17の各画素Pを駆動するための液晶駆動電圧(表示パネル駆動電圧の一例)Vinを有する液晶駆動信号が生成される。そして、IC16により生成された駆動信号は、IC16とIC用パッド部15との接続部を介してゲート線Lg(ソース線Ls)に入力され、上記したように液晶表示部17の各画素Pに入力される。
2. Driving the liquid crystal panel In the liquid crystal panel 10, various signals input from the outside via the FPC 21 are input to the IC 16, and a liquid crystal driving voltage (display panel driving voltage) for driving each pixel P of the liquid crystal display unit 17 by the IC 16. Example) A liquid crystal driving signal having Vin is generated. Then, the drive signal generated by the IC 16 is input to the gate line Lg (source line Ls) via the connection portion between the IC 16 and the IC pad unit 15 and is applied to each pixel P of the liquid crystal display unit 17 as described above. Entered.
 IC16とIC用パッド部15とは、異方性導電材19を介して熱圧着されることで電気的に接続される。異方性導電材19による圧着では、その圧着条件等の変化により抵抗値が増大してしまうことがあり、IC16とIC用パッド部15との間の接続抵抗Rが増大してしまうことがある。IC16とIC用パッド部15との間の接続抵抗Rが増大すると、ゲート線Lg(ソース線Ls)に入力される液晶駆動信号の液晶駆動電圧が低下してしまい、液晶表示部17に適切なカラー画像を表示することができない。そのため、IC16とIC用パッド部15との間の接続抵抗Rを測定する必要がある。 The IC 16 and the IC pad 15 are electrically connected by thermocompression bonding via an anisotropic conductive material 19. In the pressure bonding with the anisotropic conductive material 19, the resistance value may increase due to a change in the pressure bonding conditions and the like, and the connection resistance R between the IC 16 and the IC pad portion 15 may increase. . When the connection resistance R between the IC 16 and the IC pad unit 15 increases, the liquid crystal drive voltage of the liquid crystal drive signal input to the gate line Lg (source line Ls) decreases, and the liquid crystal display unit 17 is suitable for the liquid crystal display unit 17. A color image cannot be displayed. Therefore, it is necessary to measure the connection resistance R between the IC 16 and the IC pad portion 15.
 接続抵抗Rの測定には、IC16の出力電圧と、IC用パッド部15の入力電圧と、ゲート線Lg(ソース線Ls)に流れる電流と、を計測する必要がある。しかし、通常、IC用パッド部15との接続部は、異方性導電材19により覆われており、IC用パッド部15にプローブ等を直接的に接触させてIC用パッド部15の入力電圧及び電流を計測することは難しい。また、IC用パッド部15に連続するゲート線Lg(ソース線Ls)は、絶縁膜18により覆われており、プローブ等を直接的に接触させてIC用パッド部15の入力電圧及び電流を測定することは難しい。以下で示す本実施形態の抵抗測定装置31では、IC用パッド部15及びゲート線Lg(ソース線Ls)に直接的に接触させることなく、ゲート線Lg(ソース線Ls)に流れる電流を測定する。 To measure the connection resistance R, it is necessary to measure the output voltage of the IC 16, the input voltage of the IC pad section 15, and the current flowing through the gate line Lg (source line Ls). However, normally, the connection portion with the IC pad portion 15 is covered with an anisotropic conductive material 19, and a probe or the like is directly brought into contact with the IC pad portion 15 to input voltage to the IC pad portion 15. And it is difficult to measure current. Further, the gate line Lg (source line Ls) continuous to the IC pad portion 15 is covered with an insulating film 18, and the input voltage and current of the IC pad portion 15 are measured by directly contacting a probe or the like. Difficult to do. In the resistance measuring device 31 of the present embodiment described below, the current flowing through the gate line Lg (source line Ls) is measured without directly contacting the IC pad unit 15 and the gate line Lg (source line Ls). .
 3.抵抗測定装置の構成
 図3に、本実施形態の抵抗測定装置31を示す。図3に示すように、抵抗測定装置31は、第1電極33と、第2電極35と、第3コンデンサ37と、第4コンデンサ39と、を含む。第1電極33は、第3コンデンサ37の一方の電極37aに接続されている。第2電極35は、第4コンデンサ39の一方の電極39aに接続されている。第3コンデンサ37は、既知の容量Cop3を有し、他方の電極37bが接地電圧(基準電圧の一例)に接続されている。第4コンデンサ39は、容量Cop3と異なる既知の容量Cop4を有し、他方の電極39bが第3コンデンサ37の他方の電極37bに接続されている。そのため、第4コンデンサ39の他方の電極39bも接地電圧に接続されている。
3. Configuration of Resistance Measuring Device FIG. 3 shows a resistance measuring device 31 of this embodiment. As shown in FIG. 3, the resistance measurement device 31 includes a first electrode 33, a second electrode 35, a third capacitor 37, and a fourth capacitor 39. The first electrode 33 is connected to one electrode 37 a of the third capacitor 37. The second electrode 35 is connected to one electrode 39 a of the fourth capacitor 39. The third capacitor 37 has a known capacitance Cop3, and the other electrode 37b is connected to the ground voltage (an example of a reference voltage). The fourth capacitor 39 has a known capacitance Cop 4 different from the capacitance Cop 3, and the other electrode 39 b is connected to the other electrode 37 b of the third capacitor 37. Therefore, the other electrode 39b of the fourth capacitor 39 is also connected to the ground voltage.
 更に、抵抗測定装置31は、電圧計(第1計測部及び第2計測部の一例)41と、CPU(第1算出部、第2算出部及び測定部の一例)43と、を含む。電圧計41は、CPU43に接続されており、第3コンデンサ37の一方の電極37aの第1電圧V1及び第4コンデンサ39の一方の電極39aの第2電圧V2を計測する。電圧計41は、これらの電圧を同一タイミングで、かつ規定時間ΔT毎に計測し、計測した電圧V1、V2をCPU43のメモリ45に格納する。本実施形態では、電圧計41が電圧を計測する規定時間ΔTは、数テラヘルツの周期に相当する数ピコ秒程度に設定されている。 Furthermore, the resistance measurement device 31 includes a voltmeter (an example of a first measurement unit and a second measurement unit) 41 and a CPU (an example of a first calculation unit, a second calculation unit, and a measurement unit) 43. The voltmeter 41 is connected to the CPU 43 and measures the first voltage V1 of one electrode 37a of the third capacitor 37 and the second voltage V2 of one electrode 39a of the fourth capacitor 39. The voltmeter 41 measures these voltages at the same timing and every specified time ΔT, and stores the measured voltages V1 and V2 in the memory 45 of the CPU 43. In the present embodiment, the specified time ΔT for measuring the voltage by the voltmeter 41 is set to about several picoseconds corresponding to a period of several terahertz.
 CPU43は、メモリ45を内蔵しており、メモリ45に格納された第1電圧V1と電圧計41に設定された規定時間ΔTから第1電圧V1の時間変化率D1を算出する。図5に示すように、CPU43は、メモリ45に連続して格納された第1電圧V1から、その差分電圧である第1差分電圧ΔV1を求め、これを規定時間ΔTで除して時間変化率D1を算出する。CPU43は、同様にして、第2電圧V2の時間変化率D2を算出する。
 D1=ΔV1/ΔT、D2=ΔV2/ΔT
The CPU 43 has a built-in memory 45, and calculates a time change rate D1 of the first voltage V1 from the first voltage V1 stored in the memory 45 and a specified time ΔT set in the voltmeter 41. As shown in FIG. 5, the CPU 43 obtains a first differential voltage ΔV1, which is a differential voltage, from the first voltage V1 continuously stored in the memory 45, and divides this by a specified time ΔT to change the rate of time change. D1 is calculated. Similarly, the CPU 43 calculates the time change rate D2 of the second voltage V2.
D1 = ΔV1 / ΔT, D2 = ΔV2 / ΔT
 CPU43は、さらに、IC16を用いて測定される液晶駆動電圧Vinと、第1電圧V1と、第2電圧V2と、第1差分電圧ΔV1と、第2差分電圧ΔV2と、を用いて接続抵抗Rを測定する。 The CPU 43 further uses the liquid crystal driving voltage Vin, the first voltage V1, the second voltage V2, the first differential voltage ΔV1, and the second differential voltage ΔV2 measured by using the IC 16 to connect resistance R. Measure.
 4.測定処理
 次に、図4または図5を参照して、接続抵抗Rの測定処理について説明する。図4に、測定処理のフローチャートを示す。本実施形態では、IC16とゲート線Lgとの間の接続抵抗Rを測定する例を用いて説明を行うが、IC16とソース線Lsとの間の接続抵抗Rも同様に測定することができる。更には、FPC21と入力配線13との間の接続抵抗Rについても同様に測定することが可能である。
4). Measurement Process Next, the measurement process of the connection resistance R will be described with reference to FIG. 4 or FIG. FIG. 4 shows a flowchart of the measurement process. In the present embodiment, description is given using an example in which the connection resistance R between the IC 16 and the gate line Lg is measured. However, the connection resistance R between the IC 16 and the source line Ls can be measured in the same manner. Further, the connection resistance R between the FPC 21 and the input wiring 13 can be similarly measured.
 測定処理を開始すると、図2に示すように、抵抗測定装置31を対象となるゲート線Lgに近接して配置する(S2)。抵抗測定装置31の第1電極33は、ゲート線Lgに対向して配置され、ゲート線Lgとの間で容量Csの第1コンデンサC1を形成する。また、抵抗測定装置31の第2電極35は、ゲート線Lgに対向して配置され、ゲート線Lgとの間で容量Csの第2コンデンサC2を形成する。つまり、抵抗測定装置31は、第1コンデンサC1と第2コンデンサC2の容量が等しくなるように配置される。 When the measurement process is started, as shown in FIG. 2, the resistance measuring device 31 is arranged close to the target gate line Lg (S2). The first electrode 33 of the resistance measuring device 31 is disposed to face the gate line Lg, and forms a first capacitor C1 having a capacitance Cs with the gate line Lg. The second electrode 35 of the resistance measuring device 31 is disposed to face the gate line Lg, and forms a second capacitor C2 having a capacitance Cs with the gate line Lg. That is, the resistance measuring device 31 is arranged so that the capacities of the first capacitor C1 and the second capacitor C2 are equal.
 この際、抵抗測定装置31は、抵抗測定装置31により絶縁膜18が損傷し、ゲート線Lgが断線してしまうのを防止するために、液晶パネル10に対して非接触状態に配置される。 At this time, the resistance measuring device 31 is arranged in a non-contact state with respect to the liquid crystal panel 10 in order to prevent the insulating film 18 from being damaged by the resistance measuring device 31 and the gate line Lg from being disconnected.
 抵抗測定装置31は、対象となるゲート線Lgに近接して配置されると、電圧計41は第1電圧V1及び第2電圧V2を計測し(S4)、CPU43は時間変化率D1、D2を算出する(S6、S8)。図5に示すように、電圧計41は、液晶駆動電圧Vinの切り替わり時(図5では、ゼロからVinに変化)等の過渡状態における電圧V1、V2を計測し、CPU43は当該過渡状態の時間変化率D1、D2を算出する。ここで「過渡状態」とは、第3コンデンサ37及び第4コンデンサ39に印加される電圧が安定しておらず、第3コンデンサ37及び第4コンデンサ39に充放電電流が流れている状態を意味する。 When the resistance measuring device 31 is arranged close to the target gate line Lg, the voltmeter 41 measures the first voltage V1 and the second voltage V2 (S4), and the CPU 43 calculates the time change rates D1 and D2. Calculate (S6, S8). As shown in FIG. 5, the voltmeter 41 measures the voltages V1 and V2 in a transient state such as when the liquid crystal drive voltage Vin is switched (changed from zero to Vin in FIG. 5). The change rates D1 and D2 are calculated. Here, the “transient state” means a state in which the voltage applied to the third capacitor 37 and the fourth capacitor 39 is not stable and a charge / discharge current flows through the third capacitor 37 and the fourth capacitor 39. To do.
 次に、CPU43は、接続抵抗Rを測定する。
(接続抵抗の算出式)
 第1コンデンサC1ないし第4コンデンサ39の合成容量Cmは、各コンデンサの容量から以下のように表される。
 Cm=Cs×Cop3/(Cs+Cop3)+Cs×Cop4/(Cs+Cop4)
Next, the CPU 43 measures the connection resistance R.
(Calculation formula for connection resistance)
The combined capacitance Cm of the first capacitor C1 to the fourth capacitor 39 is expressed as follows from the capacitance of each capacitor.
Cm = Cs * Cop3 / (Cs + Cop3) + Cs * Cop4 / (Cs + Cop4)
 また、第1容量(第2容量)Cs、及び接続抵抗Rにより降圧されてゲート線Lgに入力される入力電圧Vmは、各コンデンサの容量及び第1電圧V1及び第2電圧V2から以下のように表される。
 Cs=(Cop3×V1-Cop4×V2)/(V2-V1)
 Vm={1+Cop3×(V2-V1)/(Cop3×V1-Cop4×V2)}×V1
Further, the input voltage Vm stepped down by the first capacitor (second capacitor) Cs and the connection resistor R and inputted to the gate line Lg is as follows from the capacitance of each capacitor and the first voltage V1 and the second voltage V2. It is expressed in
Cs = (Cop3 × V1−Cop4 × V2) / (V2−V1)
Vm = {1 + Cop3 × (V2−V1) / (Cop3 × V1−Cop4 × V2)} × V1
 ゲート線Lgに流れる電流をImとすると、オームの法則より、接続抵抗Rは以下のように表される。
 R=(Vin-Vm)/Im
 また、過渡状態にゲート線Lgに流れる電流Imは、第1コンデンサC1ないし第4コンデンサ39に流れる充放電電流と等しいことから、電流Imは、合成容量Cm及び入力電圧Vmの時間変化率dVm/dTを用いて以下のように表すことができる。
Im=Cm×dVm/dT
When the current flowing through the gate line Lg is Im, the connection resistance R is expressed as follows from Ohm's law.
R = (Vin−Vm) / Im
In addition, since the current Im flowing through the gate line Lg in the transient state is equal to the charge / discharge current flowing through the first capacitor C1 to the fourth capacitor 39, the current Im is a time change rate dVm / of the combined capacitance Cm and the input voltage Vm. It can be expressed as follows using dT.
Im = Cm × dVm / dT
 つまり、接続抵抗Rは次のように表される。
 R=(Vin-Vm)/(Cm×dVm/dT)
 時間変化率dVm/dTは、上記の入力電圧Vm、及び時間変化率D1、D2を用いて算出することができる。つまり、接続抵抗Rは、既知の容量Cop3、Cop4と、計測された電圧V1、V2、及び算出された時間変化率D1、D2を用いて算出される。
That is, the connection resistance R is expressed as follows.
R = (Vin−Vm) / (Cm × dVm / dT)
The time change rate dVm / dT can be calculated using the input voltage Vm and the time change rates D1 and D2. That is, the connection resistance R is calculated using the known capacitances Cop3 and Cop4, the measured voltages V1 and V2, and the calculated time change rates D1 and D2.
 CPU43は、規定時間ΔT毎に接続抵抗Rを算出し、算出された複数の接続抵抗Rを平均した平均接続抵抗Rを、IC16と対象となるゲート線Lgの間の接続抵抗Rとする(S10)。 The CPU 43 calculates the connection resistance R every specified time ΔT, and uses the average connection resistance R obtained by averaging the calculated connection resistances R as the connection resistance R between the IC 16 and the target gate line Lg (S10). ).
 5.本発明の効果
(1)本実施形態の抵抗測定装置31においては、第1コンデンサC1ないし第4コンデンサ39によって構成される合成コンデンサに流れる過渡状態の電流Imから対象となるゲート線Lgに流れる電流Imを求め、合成コンデンサに流れる過渡状態の電流Imは、当該合成コンデンサに蓄積される電荷量の変化、すなわち第1電圧V1の時間変化率D1と第2電圧V2の時間変化率D2とを用いて求めることができる。この抵抗測定装置31によれば、対象となるゲート線Lgに流れる電流Imを当該ゲート線Lgに直接接続することなく求めることができ、IC16と対象となるゲート線Lgとの間の接続抵抗Rを非破壊で測定することができる。
5. Advantages of the Present Invention (1) In the resistance measuring device 31 of the present embodiment, the current flowing in the target gate line Lg from the transient current Im flowing in the composite capacitor constituted by the first capacitor C1 to the fourth capacitor 39. Im is obtained, and the transient state current Im flowing in the composite capacitor uses the change in the amount of charge accumulated in the composite capacitor, that is, the time change rate D1 of the first voltage V1 and the time change rate D2 of the second voltage V2. Can be obtained. According to the resistance measuring device 31, the current Im flowing in the target gate line Lg can be obtained without being directly connected to the gate line Lg, and the connection resistance R between the IC 16 and the target gate line Lg. Can be measured non-destructively.
(2)本実施形態の抵抗測定装置31においては、第1電極33と第2電極35を用いて同一容量のコンデンサを形成することができれば、抵抗測定装置31を液晶パネル10に接触させることなく接続抵抗Rを測定することができる。液晶パネル10に設けられるゲート線Lg等は薄膜形成されるため、絶縁膜18を介してであっても抵抗測定装置31と液晶パネル10が接触することで、ゲート線Lg等が損傷してしまうことがある。この抵抗測定装置31によれば、抵抗測定装置31を液晶パネル10に接触させることなく接続抵抗Rを測定することができるので、ゲート線Lg等が破壊されることを確実に抑制することができる。 (2) In the resistance measurement device 31 of the present embodiment, if a capacitor having the same capacity can be formed using the first electrode 33 and the second electrode 35, the resistance measurement device 31 is not brought into contact with the liquid crystal panel 10. The connection resistance R can be measured. Since the gate line Lg and the like provided in the liquid crystal panel 10 are formed as a thin film, the gate line Lg and the like are damaged when the resistance measuring device 31 and the liquid crystal panel 10 come into contact with each other even through the insulating film 18. Sometimes. According to this resistance measuring device 31, since the connection resistance R can be measured without bringing the resistance measuring device 31 into contact with the liquid crystal panel 10, it is possible to reliably prevent the gate line Lg and the like from being destroyed. .
(3)本実施形態の抵抗測定装置31においては、規定時間ΔTが数テラヘルツの周期に相当する数ピコ秒程度に設定されている。液晶パネル10では、液晶パネル10が搭載される製品の小型化に伴い、液晶表示部17以外の領域の小型化が求められており、入力配線13及びゲート線Lg(ソース線Ls)の線幅が狭幅化が求められている。そのため、対象となるゲート線Lgと第1電極33(第2電極35)とによって形成される第1コンデンサC1(第2コンデンサC2)の容量Csは、数pF(ピコファラッド)程度に設定されことがあり、これにより、第1コンデンサC1(第2コンデンサC2)に蓄えられる容量も小さく、過渡状態の期間も短くなる。この抵抗測定装置31では、規定時間ΔTが数ピコ秒程度に短く設定されているので、抵抗測定装置31を用いて液晶パネル10の過渡状態における電圧V1、V2の時間変化率D1、D2を求めることができ、接続抵抗Rを測定することができる。 (3) In the resistance measuring device 31 of the present embodiment, the specified time ΔT is set to about several picoseconds corresponding to a period of several terahertz. In the liquid crystal panel 10, as the product on which the liquid crystal panel 10 is mounted is downsized, the area other than the liquid crystal display unit 17 is required to be downsized, and the line width of the input wiring 13 and the gate line Lg (source line Ls). However, narrowing is required. Therefore, the capacitance Cs of the first capacitor C1 (second capacitor C2) formed by the target gate line Lg and the first electrode 33 (second electrode 35) is set to about several pF (picofarad). Accordingly, the capacity stored in the first capacitor C1 (second capacitor C2) is also small, and the period of the transient state is also shortened. In the resistance measuring device 31, the specified time ΔT is set to be as short as several picoseconds. Therefore, the time change rates D1 and D2 of the voltages V1 and V2 in the transient state of the liquid crystal panel 10 are obtained using the resistance measuring device 31. The connection resistance R can be measured.
 <他の実施形態>
 本発明は上記記述及び図面によって説明した実施形態に限定されるものではなく、例えば次のような実施形態も本発明の技術的範囲に含まれる。
<Other embodiments>
The present invention is not limited to the embodiments described with reference to the above description and drawings. For example, the following embodiments are also included in the technical scope of the present invention.
(1)上記実施形態においては、接続抵抗Rを測定する際に、複数の接続抵抗Rを算出し、それらの接続抵抗Rの平均値を測定された接続抵抗Rとしたが、必ずしも平均値を算出する必要はない。液晶駆動電圧Vinの切り替わりから予め設定された基準時間後に算出された接続抵抗Rを測定された接続抵抗Rとしても良い。 (1) In the above embodiment, when measuring the connection resistance R, a plurality of connection resistances R are calculated, and the average value of these connection resistances R is the measured connection resistance R. There is no need to calculate. The connection resistance R calculated after a preset reference time from the switching of the liquid crystal drive voltage Vin may be used as the measured connection resistance R.
(2)上記実施形態においては、電子部品としてIC16を用いた例を示したが、これに限られない。所定の電圧を有する信号を出力する電子部品であれば、特に限定されるものではい。また、対象となる接続配線が設けられる表示パネルも限定されない。上記実施形態においては、液晶パネルを例示したが、他の種類の表示パネル、例えば、ELパネルにも本発明は適用可能である。 (2) In the above-described embodiment, an example in which the IC 16 is used as an electronic component has been described. However, the present invention is not limited to this. Any electronic component that outputs a signal having a predetermined voltage is not particularly limited. Further, the display panel provided with the target connection wiring is not limited. In the above embodiment, the liquid crystal panel is exemplified, but the present invention can also be applied to other types of display panels, for example, EL panels.
(3)さらには、対象となる接続配線が設けられるものは、表示パネルでなくても良い。例えばプリント基板や太陽光パネル等に設けられる配線にも適応できる。この場合、規定時間ΔTは、対象となる接続配線の線幅に応じて自由に設定することが可能である。 (3) Furthermore, the display panel may not be provided with the target connection wiring. For example, the present invention can be applied to wiring provided on a printed circuit board or a solar panel. In this case, the specified time ΔT can be freely set according to the line width of the target connection wiring.
(4)上記実施形態においては、抵抗測定装置31において、第3コンデンサ37の他方の電極37bが接地電圧に接続されている例を用いて説明を行ったが、電源電圧などの他の基準電圧に接続されていても良い。さらには、パルス電圧等、変動する電圧に接続されていても良い。パルス周期が規定時間ΔTに比べて長く設定されている場合には、測定時において一定電圧とみなすことができる。 (4) In the above embodiment, the resistance measurement device 31 has been described using the example in which the other electrode 37b of the third capacitor 37 is connected to the ground voltage. It may be connected to. Further, it may be connected to a fluctuating voltage such as a pulse voltage. When the pulse period is set longer than the specified time ΔT, it can be regarded as a constant voltage at the time of measurement.
(5)上記実施形態においては、抵抗測定装置31を対象となるゲート線Lgの絶縁膜18側に配置して、接続抵抗Rを測定する例を用いて説明を行ったが、図6に示すように、第1ガラス基板11側に配置して接続抵抗Rを測定しても良い。 (5) In the above-described embodiment, the resistance measuring device 31 is arranged on the insulating film 18 side of the target gate line Lg, and the connection resistance R is measured. As described above, the connection resistance R may be measured by arranging it on the first glass substrate 11 side.
10:液晶パネル、15:IC用パッド部、31:抵抗測定装置、33:第1電極、35:第2電極、37:第3コンデンサ、39:第4コンデンサ、41:電圧計、43:CPU、V1:第1電圧、D1:第1電圧の時間変化率、V2:第2電圧、D2:第2電圧の時間変化率、Im:電流、Lg:ゲート線、Ls:ソース線、R:接続抵抗、Vin:液晶駆動電圧、Vm:入力電圧、ΔT:規定時間 10: liquid crystal panel, 15: pad portion for IC, 31: resistance measuring device, 33: first electrode, 35: second electrode, 37: third capacitor, 39: fourth capacitor, 41: voltmeter, 43: CPU , V1: first voltage, D1: time change rate of the first voltage, V2: second voltage, D2: time change rate of the second voltage, Im: current, Lg: gate line, Ls: source line, R: connection Resistance, Vin: Liquid crystal drive voltage, Vm: Input voltage, ΔT: Specified time

Claims (8)

  1.  電子部品に接続された接続配線と当該電子部品との間の接続抵抗を測定する抵抗測定装置であって、
     前記接続配線との間で第1容量の第1コンデンサを形成する第1電極と、
     前記接続配線との間で第2容量の第2コンデンサを形成する第2電極と、
     既知の第3容量を有し、一方の電極が前記第1電極に接続される第3コンデンサと、
     既知であるとともに前記第3容量と異なる第4容量を有し、一方の電極が前記第2電極に接続され、他方の電極が前記第3コンデンサの他方の電極に接続される第4コンデンサと、
     前記第3コンデンサの前記一方の電極の電圧である第1電圧を規定時間毎に計測する第1計測部と、
     前記第1電圧と前記基準時間から前記第1電圧の時間変化率を算出する第1算出部と、
     前記第4コンデンサの前記一方の電極の電圧である第2電圧を前記規定時間毎に計測する第2計測部と、
     前記第2電圧と前記基準時間から前記第2電圧の時間変化率を算出する第2算出部と、
     前記接続抵抗を測定する測定部と、
    を備え、
     前記第1容量と前記第2容量は同一の容量に設定され、
     前記算出部は、前記電子部品の出力電圧と、前記第3コンデンサの他方の電極の電圧と、前記第1電圧及びその時間変化率と、前記第2電圧及びその時間変化率と、を用いて前記接続抵抗を測定する抵抗測定装置。
    A resistance measuring device for measuring a connection resistance between a connection wiring connected to an electronic component and the electronic component,
    A first electrode forming a first capacitor having a first capacitance with the connection wiring;
    A second electrode forming a second capacitor having a second capacitance with the connection wiring;
    A third capacitor having a known third capacitance, one electrode connected to the first electrode;
    A fourth capacitor that is known and has a fourth capacitance different from the third capacitance, one electrode connected to the second electrode, and the other electrode connected to the other electrode of the third capacitor;
    A first measuring unit that measures a first voltage, which is a voltage of the one electrode of the third capacitor, every specified time;
    A first calculator that calculates a time change rate of the first voltage from the first voltage and the reference time;
    A second measuring unit that measures a second voltage, which is a voltage of the one electrode of the fourth capacitor, at each specified time;
    A second calculator for calculating a time change rate of the second voltage from the second voltage and the reference time;
    A measurement unit for measuring the connection resistance;
    With
    The first capacity and the second capacity are set to the same capacity,
    The calculation unit uses the output voltage of the electronic component, the voltage of the other electrode of the third capacitor, the first voltage and its time change rate, and the second voltage and its time change rate. A resistance measuring device for measuring the connection resistance.
  2.  前記接続配線は、絶縁膜により覆われており、前記第1電極及び前記第2電極は、前記絶縁膜と非接触状態において前記第1コンデンサ及び前記第2コンデンサを形成することを特徴とする請求項1に記載の抵抗測定装置。 The connection wiring is covered with an insulating film, and the first electrode and the second electrode form the first capacitor and the second capacitor in a non-contact state with the insulating film. Item 2. The resistance measuring device according to Item 1.
  3.  前記接続配線は、表示パネルに設けられており、
     前記電子部品の出力電圧は、前記表示パネルを駆動する表示パネル駆動電圧であることを特徴とする請求項1または請求項2に記載の抵抗測定装置。
    The connection wiring is provided on a display panel,
    The resistance measurement apparatus according to claim 1, wherein the output voltage of the electronic component is a display panel drive voltage for driving the display panel.
  4.  前記表示パネルは、液晶パネルであり、
     前記電子部品は、前記液晶パネルを駆動する液晶駆動用集積回路であることを特徴とする請求項3に記載の抵抗測定装置。
    The display panel is a liquid crystal panel,
    The resistance measuring apparatus according to claim 3, wherein the electronic component is a liquid crystal driving integrated circuit that drives the liquid crystal panel.
  5.  前記測定部は、複数回に亘って前記接続抵抗を算出し、その算出した前記接続抵抗を平均した平均接続抵抗を測定した前記接続抵抗とすることを特徴とする請求項1ないし請求項4のいずれか一項に記載の抵抗測定装置。 5. The measurement unit according to claim 1, wherein the measurement unit calculates the connection resistance over a plurality of times, and sets the average connection resistance obtained by averaging the calculated connection resistances as the connection resistance. The resistance measuring device according to any one of the above.
  6.  電子部品に接続された接続配線と当該電子部品との間の接続抵抗を測定する方法であって、
     前記接続配線との間で同一の容量のコンデンサを形成するように、第1電極及び第2電極を配置する配置工程と、
     既知の第3容量を有し、一方の電極が前記第1電極に接続される第3コンデンサの他方の電極と、既知であるとともに前記第3容量と異なる第4容量を有し、一方の電極が前記第2電極に接続される第4コンデンサの他方の電極とを接続する接続工程と、
     前記配置工程及び前記接続工程終了後に、前記第3コンデンサの前記一方の電極の電圧である第1電圧と、前記第4コンデンサの前記一方の電極の電圧である第2電圧と、を同一の規定時間毎に計測する計測工程と、
     前記第1電圧と前記規定時間から前記第1電圧の時間変化率を算出する第1算出工程と、
     前記第2電圧と前記規定時間から前記第2電圧の時間変化率を算出する第2算出工程と、
     前記電子部品の出力電圧と、前記第3コンデンサの他方の電極の電圧と、前記第1電圧及びその時間変化率と、前記第2電圧及びその時間変化率と、を用いて前記接続抵抗を測定する測定工程と、
    を含む接続抵抗の測定方法。
    A method for measuring a connection resistance between a connection wiring connected to an electronic component and the electronic component,
    An arrangement step of arranging the first electrode and the second electrode so as to form a capacitor having the same capacitance with the connection wiring;
    One electrode having a known third capacitance, one electrode having a fourth capacitance that is known and different from the third capacitance, and the other electrode of the third capacitor connected to the first electrode; Connecting the other electrode of the fourth capacitor connected to the second electrode,
    After the arrangement step and the connection step, the first voltage that is the voltage of the one electrode of the third capacitor and the second voltage that is the voltage of the one electrode of the fourth capacitor are the same. A measurement process to measure every hour;
    A first calculation step of calculating a time change rate of the first voltage from the first voltage and the specified time;
    A second calculation step of calculating a time change rate of the second voltage from the second voltage and the specified time;
    The connection resistance is measured using the output voltage of the electronic component, the voltage of the other electrode of the third capacitor, the first voltage and its time change rate, and the second voltage and its time change rate. Measuring process to
    Measuring method of connection resistance including
  7.  前記計測工程では、前記第1電圧及び前記第2電圧は、同一タイミングで計測されることを特徴とする請求項6に記載の接続抵抗の測定方法。 The connection resistance measuring method according to claim 6, wherein in the measuring step, the first voltage and the second voltage are measured at the same timing.
  8.  前記計測工程では、前記第3コンデンサ及び前記第4コンデンサの過渡状態における電圧が計測されることを特徴とする請求項6または請求項7に記載の接続抵抗の測定方法。 The connection resistance measuring method according to claim 6 or 7, wherein in the measuring step, a voltage in a transient state of the third capacitor and the fourth capacitor is measured.
PCT/JP2012/076078 2011-10-12 2012-10-09 Resistance measuring device, connection resistance measuring method WO2013054782A1 (en)

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JP2000258494A (en) * 1999-03-09 2000-09-22 Rohm Co Ltd Semiconductor integrated device
JP2000275302A (en) * 1999-03-26 2000-10-06 Advantest Corp Probe for ic test and dc testing device for ic
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JP2009103608A (en) * 2007-10-24 2009-05-14 Nippon Telegr & Teleph Corp <Ntt> Noncontact-type voltage and current probe device

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* Cited by examiner, † Cited by third party
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WO2018092188A1 (en) * 2016-11-15 2018-05-24 株式会社日立製作所 Non-contact voltage measurement device and diagnosis system
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