WO2013012195A3 - Procédé de fabrication d'un substrat et procédé de fabrication d'un dispositif électronique comprenant ledit substrat - Google Patents

Procédé de fabrication d'un substrat et procédé de fabrication d'un dispositif électronique comprenant ledit substrat Download PDF

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Publication number
WO2013012195A3
WO2013012195A3 PCT/KR2012/005466 KR2012005466W WO2013012195A3 WO 2013012195 A3 WO2013012195 A3 WO 2013012195A3 KR 2012005466 W KR2012005466 W KR 2012005466W WO 2013012195 A3 WO2013012195 A3 WO 2013012195A3
Authority
WO
WIPO (PCT)
Prior art keywords
forming
metal layer
manufacturing
substrate
electronic device
Prior art date
Application number
PCT/KR2012/005466
Other languages
English (en)
Korean (ko)
Other versions
WO2013012195A2 (fr
Inventor
이종람
유철종
김기수
손준호
Original Assignee
포항공과대학교 산학협력단
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 포항공과대학교 산학협력단 filed Critical 포항공과대학교 산학협력단
Publication of WO2013012195A2 publication Critical patent/WO2013012195A2/fr
Publication of WO2013012195A3 publication Critical patent/WO2013012195A3/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/80—Etching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20—Exposure; Apparatus therefor
    • G03F7/2041—Exposure; Apparatus therefor in the presence of a fluid, e.g. immersion; using fluid cooling means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Electroluminescent Light Sources (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

La présente invention concerne un procédé qui permet de réduire significativement le coût d'un dispositif électronique par une opération de formation sélective d'un nanodépression sur une couche métallique qui est façonnée à bas coût. Le procédé selon la présente invention comprend les étapes qui consistent: (a) à former la couche métallique sur un substrat; (b) à former une couche de masque qui est réalisée avec un motif prédéterminé, sur la couche métallique; (c) à former un oxyde métallique comportant des nanotrous auto-alignés sur la couche métallique qui est exposée par immersion du substrat dans une solution acide et par application d'une tension; et (d) à former la nanodépression sur la couche métallique par une opération d'élimination par gravure de l'oxyde métallique.
PCT/KR2012/005466 2011-07-19 2012-07-10 Procédé de fabrication d'un substrat et procédé de fabrication d'un dispositif électronique comprenant ledit substrat WO2013012195A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR20110071331A KR101243635B1 (ko) 2011-07-19 2011-07-19 기판의 제조방법 및 이를 이용한 전자소자의 제조방법
KR10-2011-0071331 2011-07-19

Publications (2)

Publication Number Publication Date
WO2013012195A2 WO2013012195A2 (fr) 2013-01-24
WO2013012195A3 true WO2013012195A3 (fr) 2013-03-14

Family

ID=47558573

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/KR2012/005466 WO2013012195A2 (fr) 2011-07-19 2012-07-10 Procédé de fabrication d'un substrat et procédé de fabrication d'un dispositif électronique comprenant ledit substrat

Country Status (2)

Country Link
KR (1) KR101243635B1 (fr)
WO (1) WO2013012195A2 (fr)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10767143B2 (en) 2014-03-06 2020-09-08 Sage Electrochromics, Inc. Particle removal from electrochromic films using non-aqueous fluids
KR101585788B1 (ko) * 2014-08-28 2016-01-15 주식회사 포스코 전자소자용 기판의 제조방법 및 박막형 태양전지의 제조방법
KR101651341B1 (ko) * 2014-12-02 2016-08-26 한양대학교 에리카산학협력단 초발수성 금속 구조물의 제조 방법
KR101683796B1 (ko) * 2015-06-11 2016-12-08 한국과학기술연구원 백색광 펄스를 이용하여 고분자를 경화시키는 방법 및 이를 이용한 유기 박막 트랜지스터의 제조 방법
KR101785468B1 (ko) * 2016-02-05 2017-10-16 호서대학교 산학협력단 반도체 박막트랜지스터의 제조방법 및 이에 의해 제조된 반도체 박막트랜지스터
WO2018236785A1 (fr) * 2017-06-20 2018-12-27 Board Of Trustees Of The University Of Arkansas Procédé de formation de nanostructures d'oxyde métallique de grande superficie et ses applications
CN107622974A (zh) * 2017-08-28 2018-01-23 武汉华星光电半导体显示技术有限公司 Tft基板的制作方法及tft显示装置的制作方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080110709A (ko) * 2007-06-16 2008-12-19 고려대학교 산학협력단 하이브리드 나노임프린트 마스크의 제조방법 및 이를이용한 전자소자의 제조방법
KR20090005889A (ko) * 2007-07-10 2009-01-14 호서대학교 산학협력단 나노 입자의 제조방법
KR20100002486A (ko) * 2008-06-30 2010-01-07 서울옵토디바이스주식회사 패턴된 기판 및 질화물 반도체층 제조방법
KR20110034710A (ko) * 2009-09-29 2011-04-06 광주과학기술원 패턴 형성방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080110709A (ko) * 2007-06-16 2008-12-19 고려대학교 산학협력단 하이브리드 나노임프린트 마스크의 제조방법 및 이를이용한 전자소자의 제조방법
KR20090005889A (ko) * 2007-07-10 2009-01-14 호서대학교 산학협력단 나노 입자의 제조방법
KR20100002486A (ko) * 2008-06-30 2010-01-07 서울옵토디바이스주식회사 패턴된 기판 및 질화물 반도체층 제조방법
KR20110034710A (ko) * 2009-09-29 2011-04-06 광주과학기술원 패턴 형성방법

Also Published As

Publication number Publication date
WO2013012195A2 (fr) 2013-01-24
KR101243635B1 (ko) 2013-03-15
KR20130010603A (ko) 2013-01-29

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