WO2013004775A1 - Adaptateur destine a un dispositif de controle et dispositif de controle de cartes a circuits imprimes - Google Patents

Adaptateur destine a un dispositif de controle et dispositif de controle de cartes a circuits imprimes Download PDF

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Publication number
WO2013004775A1
WO2013004775A1 PCT/EP2012/063109 EP2012063109W WO2013004775A1 WO 2013004775 A1 WO2013004775 A1 WO 2013004775A1 EP 2012063109 W EP2012063109 W EP 2012063109W WO 2013004775 A1 WO2013004775 A1 WO 2013004775A1
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WO
WIPO (PCT)
Prior art keywords
test
plate
guide
adapter
grid
Prior art date
Application number
PCT/EP2012/063109
Other languages
German (de)
English (en)
Inventor
Victor Romanov
Andreas Gülzow
Bernd-Ulrich OTT
Original Assignee
Dtg International Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dtg International Gmbh filed Critical Dtg International Gmbh
Publication of WO2013004775A1 publication Critical patent/WO2013004775A1/fr

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02—General constructional details
    • G01R1/06—Measuring leads; Measuring probes
    • G01R1/067—Measuring probes
    • G01R1/073—Multiple probes
    • G01R1/07307—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07364—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch
    • G01R1/07371—Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card with provisions for altering position, number or connection of probe tips; Adapting to differences in pitch using an intermediate card or back card with apertures through which the probes pass
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2805—Bare printed circuit boards
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2801—Testing of printed circuits, backplanes, motherboards, hybrid circuits or carriers for multichip packages [MCP]
    • G01R31/2806—Apparatus therefor, e.g. test stations, drivers, analysers, conveyors
    • G01R31/2808—Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards

Definitions

  • the present invention relates to an adapter for a test apparatus and a test apparatus for testing printed circuit boards.
  • the present invention relates to an adapter for a parallel tester for testing bare printed circuit boards and a parallel tester for testing bare printed circuit boards.
  • Devices for testing printed circuit boards are fundamentally subdivided into two groups, the finger testers, which serially scan test points of a printed circuit board under test with a plurality of contact fingers, and the parallel testers, which contact all test points or board test points of a printed circuit board to be examined simultaneously by means of a multiplicity of contacts ,
  • the parallel testers once again differentiate between the universal tester and the dedicated tester.
  • Universal testers are parallel testers with a basic grid.
  • the basic grid is a regular grid of contact points, which are connected to an evaluation device. Since the board test points to be tested a printed circuit board to be tested are normally arranged in a grid deviating from the regular grid of the basic grid, it is necessary to provide an adapter, which connects in each case a circuit board test point of the printed circuit board to be tested with a contact point of the basic grid.
  • Such adapters are also referred to as Rasteranpassungsadap- ter, since they implement the predetermined, regular basic grid of the tester on the usually irregular arrangement of the board test points of a circuit board to be tested.
  • Such an adapter generally has a plurality of spaced apart guide plates, in which guide holes are introduced for receiving test needle. The test needle can be arranged obliquely in the adapter, so that the contact points of the regular basic grid can electrically connect to the circuit board test points, which generally differ from the regular arrangement of the basic grid.
  • the adapter is not arranged directly on the basic grid, but it is provided between the basic grid and the adapter, a so-called full grid cassette.
  • a full grid cassette is similar to the adapter formed of a plurality of guide plates, in which contact pins are arranged in the same grid as the basic grid. These pins are resilient. The reason why such a full raste cassette is used is that it is difficult to insert resilient contact pins into the adapter because they are too thick to be able to arrange them diagonally in the adapter can. On the other hand, it is necessary that differences in height due to unevenness in the circuit board to be tested or due to the inclination of the needles in the adapter can be compensated by the resilient contact pins of the full grid cassette.
  • an elastic conductive rubber plate can be provided, which establishes an electrical connection between the needles of the adapter and the corresponding contact points of the basic grid.
  • a special adapter must be produced in each case.
  • the basic grid and the full grid cassette are independent of the type of printed circuit board to be tested.
  • Such parallel tester with a basic grid is also called universal tester, since only the adapter is specific to the respective printed circuit board. to adapt to the type of tent.
  • the remaining components of the test apparatus can be used to test any type of board.
  • the dedicated testers are parallel testers which have a contact plate in which contact elements are arranged in the grid of the board test points of the circuit board to be tested.
  • the contact elements of the contact plate are connected individually with wires or thin cables directly to the connection points of an evaluation or an evaluation.
  • Such dedicated testers are used primarily for testing microchips (ICs). However, they are also increasingly being used in the testing of printed circuit boards, in particular if the printed circuit boards have very small printed circuit board test points arranged close to one another.
  • the production of the contact plate is very expensive, since the individual contact elements must be soldered by hand with the appropriate cables.
  • Dedicated testers are therefore disadvantageous in the case of large-area, bare printed circuit boards, which at the same time have to contact thousands of printed circuit board test points.
  • a parallel tester emerges, which has a basic grid plate on whose surface a basic grid is formed.
  • the basic grid plate is a multi-layer printed circuit board, wherein a plurality of contact points of the basic grid are electrically connected to one another by means of scan channels extending in the basic grid plate.
  • a plurality of contact points of the basic grid which are each linked to one of the scan channels, are electrically connected to one connection each of an evaluation electronics.
  • multiple contact points of the basic grid can be operated with a connection of the evaluation electronics, whereby it is possible to provide the contact elements of the basic grid in high density, without the capacity of evaluation must be increased accordingly.
  • On the basic grid an adapter and / or translator, on which the printed circuit board to be tested can be placed.
  • WO 02/31516 A1 discloses a module for a parallel tester which has a strip-shaped section with contact points, which forms part of a basic grid of the parallel tester. Below the strip-shaped section is a arranged vertically standing plate on which a part of an evaluation for the evaluation of test signals is arranged. The contact points on the strip-shaped section are arranged in a grid with a grid spacing of not more than 2 mm and at least two contact points of a module are electrically connected to one another such that the electrically connected or linked contact points are in contact with a single input of an evaluation electronics stand.
  • WO 2008/071541 A2 discloses another module for a parallel tester for testing circuit boards.
  • This module has a support plate and a contact plate.
  • the contact plate is formed of a rigid circuit board portion referred to as a basic screen member and at least one flexible circuit board portion. At the base grid contact points are provided, each forming a part of the contact points of the basic grid.
  • the basic screen element is arranged on an end face of the support plate and the flexible printed circuit board section is bent in such a way that at least part of the remaining area of the contact plate is arranged parallel to the support plate.
  • the contact points of the basic grid element are each in electrical contact with conductor tracks running in the contact plate, which extend from the basic grid element into the flexible conductor section.
  • a large number of such modules are arranged next to one another in the parallel tester, so that the basic grid elements form a continuous base grid plate, on which the basic grid is shown in the form of contact points arranged in a regular grid.
  • an adapter can be seen, for example, from WO 2009/047160 A2 or US 2010/0283498 A1.
  • DE 44 41 347 A1 discloses a method and a device for testing populated assemblies by means of a four-wire measurement. For this purpose, at least four needles which are freely movable in the X and Y directions are provided. Testing populated assemblies requires significantly fewer contacts than testing bare PCBs. When testing unpopulated printed circuit boards, each trace must be contacted separately, whereas when testing populated assemblies, a bump test or in-circuit test can be performed the function of a complete electrical circuit with a few contacts is tested.
  • EP 1 031 840 A2 discloses a test device for testing printed circuit boards, in which the electrodes can be brought into contact with the contact points of the test object by means of an electrically conductive elastomer layer.
  • This electrically conductive elastomer layer is designed so that it reduces its electrical resistance in the compression direction when compressed.
  • the individual electrodes in the contact plates can be arranged very closely adjacent and nevertheless an individual contact to the test points of the printed circuit board can be produced.
  • the arrangement of the electrodes may even be formed so close adjacent that two adjacent electrodes together contact a contact point of a printed circuit board, wherein via the one electrode, a measuring current is supplied and the voltage is measured by means of the other electrode.
  • the document DE 197 15 094 A1 describes an adapter for testing printed circuit boards, which consists of a minimum number of individual parts and can be assembled quickly and easily.
  • This adapter has a plurality of guide plates in which holes are drilled. Needle-shaped test probes are stored in the holes.
  • An upper guide plate has holes in a standard grid arrangement that corresponds to the grid arrangement of the contact points of an electronic test or analysis device.
  • the bottom plate is provided with an array of holes drilled according to the locations of the test points of the circuit board to be tested.
  • Each hole of the upper plate is associated with a respective hole in the lower plates.
  • a needle-shaped test probe is inserted into these corresponding holes so that the probe is held at each plate level.
  • the invention has for its object to provide an adapter and a parallel tester, with which it is possible to test unpopulated printed circuit boards with a high density of contact points very precise.
  • the object is achieved by an adapter with the features of claim 1 and by a parallel tester with the features of claim 9.
  • Advantageous embodiments of the invention are specified in the respective subclaims.
  • An inventive adapter for a parallel tester for testing unpopulated printed circuit boards comprises
  • the master grid guide plate having guide bores arranged in a regular grid whose grid corresponds to a basic grid of a parallel tester,
  • the sample guide plate has patterned guide holes corresponding to the pattern of board test points of a printed circuit board to be tested, and
  • Test probes each bearing one end portion in one of the guide holes of the base grid guide plate and the other end portion in one of the guide holes of the sample guide plate.
  • the invention is characterized in that in each case at least two test needles are arranged in several guide bores of the exclings Entrysplatte and arranged jointly in guide bores of the educalings Entrysplatte test needles are insulated from each other.
  • the corresponding circuit board test points are contacted simultaneously with two test probes, so that a four-wire measurement can be carried out at these circuit board test points.
  • a four-wire measurement is much more accurate than a 2-wire measurement.
  • adapters where the pilot holes are so close together that two test probes can simultaneously contact a board test point of a board to be tested. This also allows a four-wire measurement.
  • the density of the printed circuit board test points to be contacted is low, since the two guide holes require much more space than the guide bore according to the invention for receiving two test pins.
  • test needles are insulated from one another ensures that the test probes arranged together in the guide bore independently contact the respective circuit board test point, so that the contact resistance between the test probes and the respective circuit board test point can be reliably eliminated. If there was an electrical contact between the two test probes, then the current flows through the two needles could not be separated cleanly.
  • At least one of the test needles has an electrically insulating coating which comprises at least the portion of the test needle located in the region of this guide bore, wherein a tip of the test needle adjacent thereto is not coated.
  • all located in the guide hole test pins are coated.
  • the coating is preferably formed from aluminum oxide, titanium oxide or from a carbon coating.
  • test probes may also be electrically insulated from each other by means of a thin foil placed between the test probes.
  • the film it is possible for the film to partially surround at least one of the test needles in the form of a sleeve.
  • the film consists of an abrasion-resistant plastic, in particular a fiber-reinforced plastic.
  • a parallel tester according to the invention comprises
  • a beautsensplatte arranged in a predetermined pattern Holes corresponding to the pattern of circuit board test points of a printed circuit board to be tested, wherein a plurality of pairs of test pins are respectively disposed in a common bore of the fürlings. michsplatte with one of its end portions, so that contacted with a arranged in a bore pair of test probes each a circuit board test point of a circuit board to be tested can be.
  • the parallel tester can be designed as a universal tester with a basic grid and an adapter described above.
  • the parallel tester can also be a dedicated tester, the test probes being connected by means of wires or cables directly to an evaluation device.
  • the dedicated tester the test probes arranged together in a bore are preferably also electrically isolated from one another, wherein the electrical insulation can be realized by means of one of the above-explained coatings and / or by means of a foil.
  • the parallel tester is designed such that each of the test probes is electrically connected to a terminal of an evaluation device, wherein two or more test needles are each connected to the same terminal of the evaluation, and connected to the same terminal of the evaluation test probes are in each case arranged different holes in the scholarlings- contacting plate.
  • This principle of linking groups of test probes and connecting the group of test probes to a common terminal of the evaluation device is known from EP 875 767 B1.
  • the linkage can take place by means of scanning channels running within the base raster plate, and in the case of a dedicated tester, a plurality of wires or cables can be connected directly to a connection of the evaluation device.
  • FIG. 1 shows a detail of an adapter and a full grid cassette in a sectional view
  • FIG. 2 shows the boundary region between the adapter and the full grid cassette from FIG. 1 in an enlarged view
  • FIG. 3 shows a guide bore of the adapter of FIG. 1 with two test probes in a sectional view
  • FIG. 4 shows an alternative embodiment of an adapter in the region of a guide bore with two test probes in a sectional view
  • Fig. 5 shows a parallel tester (universal tester) with full grid cassette and adapter schematically simplified in an exploded view
  • Fig. 6 shows a parallel tester (Dedicated Tester) schematically simplified in an exploded view. The invention is first explained by means of a parallel tester in the form of a universal tester (FIGS. 1 to 5).
  • Such a parallel tester has a plate-shaped basic screen element 1 (FIG. 5) which has a plurality of contact points in the form of contact surfaces which are arranged in a regular grid. These contact points of the basic grid element 1 are each connected to a terminal of an evaluation device or evaluation electronics 2.
  • the basic grid element 1 may be formed from a plurality of strip-shaped modules 3, as e.g. from the US 7,893,705; or EP 1 322 967 B1 are known.
  • a full grid cassette 4 is arranged, which has spring contact pins 5.
  • the spring contact pins 5 of the full grid cassette 4 are arranged in the same grid as the contact points of the basic grid element 1, so that each contact point of the basic grid element 1 touches a spring contact pin 5 and is electrically contacted.
  • the spring contact pins 5 are arranged parallel to each other.
  • the electrical connection between the arranged in the regular grid spring contact pins 5 and the irregularly arranged contact points of a circuit board to be tested 6, which are referred to below as printed circuit board test points, is made via an adapter 7.
  • the adapter 7 is formed of a plurality of mutually parallel guide plates 8 (Fig. 1).
  • a plate pack 9 Adjacent to the full grid cassette 2, a plate pack 9 is arranged with two plates having holes in the grid of the arrangement of the spring contact pins 5 of the full grid cassette 4 and the contact points of the basic grid.
  • This plate pack is referred to below as the basic grid unit 9 or GR unit 9.
  • the GR unit 9 is composed of a cover plate 10 and a structural plate 1 1.
  • the cover plate is disposed immediately adjacent to the full grid cassette 4 and has a thickness of 1, 5 mm.
  • the structural plate 1 1 is applied to the cover plate 10. It has a thickness of 3 mm and gives the adapter the necessary mechanical strength on the side facing the full grid cassette.
  • the basic grid unit has 9 holes in the grid of the arrangement of the spring contact pins 5 of the full grid cassette 4 and the contact points of the basic grid, the two plates 10, 1 1 of the basic grid unit respectively a Grundrasterstructure- approximately plate 10, 1 1 represents.
  • a holding plate 12 is arranged.
  • the holding plate 12 has a thickness of 3 mm.
  • a Plate unit provided with three plates, which is hereinafter referred to as PCB unit or LP unit 13.
  • the LP unit 13 is composed of a structural plate 14, a guide plate 15 and a cover plate 16.
  • the structural plate 14 gives the LP unit 13 the necessary mechanical strength. This structural plate is formed in the present embodiment with a thickness of 4 mm.
  • the cover plate 10 and the cover plate 16 are bolted outside the test field with the other plates 1 1, 14 of the adapter. These screw connections can thus not influence the electrical properties of the adapter.
  • the guide plate 15 is again a thin guide plate with a thickness of 0.3 mm. In such a thin plate, the bores for guiding the probes and pins can be more easily inserted with high precision than in the thick structural and holding plates.
  • the guide plate 15 and the cover plate 16 has a drilling pattern corresponding to the pattern of the board test points and thus ensures that the test pins of the adapter 7 are aligned exactly with the board test points. All plates, with the exception of the cover plates 10, 16, are kept at a distance by several column mechanisms 17, which are known per se.
  • Alignment pins 18 extend between the GR unit 9 and the LP unit 13 and engage in each case in a form-fitting manner through a hole in the holding plate 12 and the guide plates 8, so that the plates 8, 12 are exactly aligned with one another.
  • the alignment pins also serve as spacers between the basic grid unit 9 and the printed circuit board unit 13.
  • the adapter 7 has probes 19 which are guided in the guide plates 8, 15.
  • the test needles 19 are used to contact Padfeldern on the circuit board to be tested 6.
  • the contact pins 20 are provided for contacting vias of the printed circuit board 6.
  • the test needles 19 may be formed with different diameters.
  • the test needles 19 each have a circular cross-section. They are each provided with a thickening 21 at their ends pointing towards the full-raster cassette. This thickening 21 may be formed by a plugged or shrunk on sleeve or by a pinch of the test needle 19. A pinch is easier and cheaper to produce. However, it requires a certain thickness of the test needle and is particularly suitable for thicker probes.
  • Stepped bores for receiving the thickenings 21 of the test probes 19 are provided in the cover plate 10 (FIGS. 1, 2). These stepped holes serve that the test needles 19 with their thickening 21 can not be moved through the plate 10 and thus secured against falling out in the direction of the side of the circuit board to be tested 6.
  • the test needles 19 are freely movable in the direction of the full-raster cassette 2 in the adapter 7.
  • the thin guide plates 8, 15 are provided with substantially smaller through holes than the two cover plates 10, 16, the structural plate 1 1 and retaining plate 12.
  • the position of the test pins 19 is thus essentially determined by the through holes of the thin-walled guide plates 8, 15.
  • at least two test pins 19 are arranged in a plurality of through bores of the test piece guide plate 15.
  • Figure 3 shows such a through hole of theticianlings Equipmentsplatte 15, which is also referred to as a guide bore 22 through which two test pins 19 extend.
  • the corresponding through-holes in the adjacent structural plate 14 and cover plate 16 are dimensioned so large that they do not come into contact with the test needles 19.
  • the position of the probes 19 is thus determined solely by the guide bore 22 in the scholarlings Equipmentsplatte 15.
  • the test needles 19 have a conical tip 23 and an adjoining cylindrical base body 24. In the region of the base body, the test needles have a diameter of about 80 ⁇ .
  • the diameter is preferably in the range of 70 ⁇ to 100 ⁇ and in particular in the range of 75 ⁇ to 85 ⁇ .
  • the test probes are made of metal, in particular a highly conductive copper alloy.
  • the guide bore 22 of the present embodiment has a diameter of about 180 ⁇ .
  • the diameter of the guide bore may be in the range of 170 to 190 ⁇ .
  • the test pins 19 are provided with an insulating coating 25 on the portion extending through the sample guide plate 15.
  • the coating 25 is, for example, a ceramic coating of aluminum oxide or titanium oxide. It may also be a carbon coating, wherein the carbon is present in an electrically non-conductive structure similar to the diamond structure. These coatings form abrasion-resistant coatings, so that even with a repeated mutual rubbing of the test pins 19, the insulation is ensured in the long term.
  • the coating extends from the area of the cone-shaped tip 23 in the direction of the solid grid cassette end of the test probes 19 so far that it is ensured that two adjacent test probes can not come into contact with the uncoated area.
  • the specimen-facing region of the conical tip 23 is free of the insulating coating 25 in order to make electrical contact with the circuit board test point 6 of the test piece.
  • the coating also extends over a portion of the conical tip 23.
  • the conical tip 23 has an angle of about 90 degrees.
  • the conical tip may also be formed with a smaller angle.
  • the two probes 19 in a guide bore 22 come into contact with the same circuit board test point of the printed circuit board to be tested, so that by one of the two test probes 19, a measuring current can be passed with a predetermined current and the voltage with the other test needle, at the corresponding conductor track in the PCB to be tested drops, can be removed.
  • The- This measurement principle is also referred to as four-wire measurement. When determining the ohmic resistance of the measured conductor track of the circuit board to be tested, the contact resistance between the test pins 19 and the circuit board test point is eliminated in the four-wire measurement. This makes this measurement very precise.
  • test needles 19 each are guided through a guide bore 22 of the test object guide plate 15 as well as through a through bore of a guide plate 8 adjacent to the test object guide plate 15.
  • the area in which the two probes 19 can touch much larger, which is why the section in which the two probes 19 are electrically isolated, is to be formed correspondingly longer.
  • the coating extends from the region of the tip 23 further towards the opposite end of the test probes than in the embodiment according to FIG. 3.
  • This section thus still extends through the guide plate 8 arranged adjacent to the printed circuit board unit 13.
  • the advantage of this Embodiment is that the portion of the test probes, which is adjacent to the test circuit board, is less inclined to a vertical to the guide plates 8, 15 and to the test printed circuit board as in the embodiment of Figure 3.
  • test pins 19 are flexible, so that they can be bent away from each other by the guide by means of the further guide plate 8 with the other sections.
  • the probes and bore should be chosen small enough to allow four-wire measurement. This would theoretically possible with test probes with a diameter of 60 ⁇ and holes with a diameter of 80 ⁇ , wherein the minimum distance between the edges of two holes is 40 ⁇ .
  • test needles with a diameter of only 60 ⁇ are very difficult to handle. For example, such probes are so light and the holes are so small that due to the frictional forces occurring during insertion, it is very difficult to pass the probes through the individual guide plates. It has been shown that guide needles having a thickness of at least 70 ⁇ , preferably 75 ⁇ and in particular preferably 80 ⁇ are much easier to handle, since they are both more stable and heavier and so an adapter can be fitted much easier with these test needles ,
  • the two located in a common guide bore 22 probes 19 are arranged substantially narrower to each other than the thinner guided in separate guide holes probes, so that with the inventive arrangement smaller board test points are contacted.
  • test probes 19 located within a guide bore 22 ensures that the four-wire measurement can be carried out reliably.
  • this electrical insulation is accomplished by means of an abrasion-resistant coating.
  • an abrasion-resistant plastic film as an insulating layer between the two needles.
  • an electrically insulating plastic For grid adapters, there are already test probes that are coated with an electrically insulating plastic. Such conventional plastic coatings ensure satisfactory insulation in a static use of the test pins, in which two Touch needles only briefly and with little force.
  • these known plastic coatings are not resistant to abrasion, so that they do not suffice for permanent insulation of guided through a common through-bore portions of the test pins.
  • fiber-reinforced plastic coatings are provided, in particular with nanofiber reinforced plastic coatings that can be applied with a small thickness, yet high strength on the needles. Instead of such a plastic coating also a thin plastic sleeve or plastic film between the two needles can be arranged.
  • the invention is also suitable for a dedicated tester (FIG. 6).
  • a dedicated tester has a sketchlingsAuthêt michsplatte 26, in which the test needles 19 are fixed in the pattern of board test points of a circuit board to be tested.
  • one or more guide plates Adjacent to the für s. für splatte 26 one or more guide plates (not shown) may be provided on the side remote from the circuit board to be tested 6 admirlingscript michsplatte 26. These guide plates serve to arrange the ends of the test probes pointing away from the printed circuit board to be tested so far apart that a wire 27 can be attached to them by means of soldering. In these guide plates, the probes can be held by friction and / or positive locking.
  • the frictional engagement is made, for example, by sliding two adjacent guide plates one against the other so that the probes are clamped in through holes in the guide plates.
  • a positive connection can be made, for example, by a special geometry of the test probes, such as a thick end, with which the test probes engage positively in a corresponding bore of a guide plate.
  • the test probes are individually soldered to the wires 27, which lead to terminals of the transmitter 2. Several such wires 27 can be combined in cables. According to the invention, in each case a few test probes are arranged in several bores of the beaulingskom devissplatte to simultaneously contact a common printed circuit test point. These test probes are in turn electrically isolated from each other, for example by one of the above-explained coatings.
  • FIGS. 5 and 6 each show a parallel tester for a two-sided test of a printed circuit board. Therefore, two beaulingsAuthêt michsplatten are provided, wherein in the universal tester according to Figure 5, the striglingsplayer michsplatte is represented by the respective adapter 7 and its printed circuit board unit 13.
  • the invention may also be practiced in a parallel tester for unilaterally testing an unpopulated circuit board.
  • the present invention can be briefly summarized as follows:
  • the present invention relates to an adapter for a parallel tester for testing bare printed circuit boards and a parallel tester for testing bare printed circuit boards.
  • test probes are arranged in each case in a plurality of guide bores of a test object contacting plate which can be arranged adjacent to a test object, and these test probes are electrically insulated from one another.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Measuring Leads Or Probes (AREA)

Abstract

La présente invention concerne un adaptateur pour un contrôleur en parallèle servant à contrôler des plaquettes à circuits imprimés sans composants et un contrôleur en parallèle servant à contrôler des plaquettes à circuits imprimés sans composants. Selon l'invention, dans plusieurs trous de guidage (22) d'une plaque de mise en contact (15) d'échantillons qui peut être placée de manière adjacente à un échantillon (6) sont placés respectivement au moins deux aiguilles de contrôle (19) qui sont électriquement isolées l'une de l'autre. Il est ainsi possible de réaliser une mesure à quatre fils dans un contrôleur en parallèle tout en conservant une grande densité de points de contact.
PCT/EP2012/063109 2011-07-06 2012-07-05 Adaptateur destine a un dispositif de controle et dispositif de controle de cartes a circuits imprimes WO2013004775A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE201110051607 DE102011051607A1 (de) 2011-07-06 2011-07-06 Adapter für eine Prüfvorrichtung und Prüfvorrichtung zum Testen von Leiterplatten
DE102011051607.7 2011-07-06

Publications (1)

Publication Number Publication Date
WO2013004775A1 true WO2013004775A1 (fr) 2013-01-10

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PCT/EP2012/063109 WO2013004775A1 (fr) 2011-07-06 2012-07-05 Adaptateur destine a un dispositif de controle et dispositif de controle de cartes a circuits imprimes

Country Status (3)

Country Link
DE (1) DE102011051607A1 (fr)
TW (1) TW201303331A (fr)
WO (1) WO2013004775A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108008161A (zh) * 2017-10-26 2018-05-08 惠州市金百泽电路科技有限公司 金属化半孔光电产品电性能的快速检测方法

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0149776A1 (fr) * 1983-12-08 1985-07-31 Martin Maelzer Adaptateur pour un dispositif de test de circuits imprimés
EP0268969A1 (fr) * 1986-11-18 1988-06-01 Luther & Maelzer GmbH Adaptateur pour un dispositif d'essai de cartes imprimées
DE4441347A1 (de) 1994-11-21 1996-05-30 Peter Fritzsche Adaptiergerät zur Prüfung von Leiterplatten
DE19715094A1 (de) 1996-04-12 1997-11-06 Methode Electronics Inc Halterung zum Prüfen von Leiterplatten
DE19644725C1 (de) * 1996-10-28 1998-04-02 Atg Test Systems Gmbh Vorrichtung und Verfahren zum Prüfen von Leiterplatten
EP1031840A2 (fr) 1999-02-24 2000-08-30 JSR Corporation Appareil et procédé pour mesurer la résistance électrique adapté pour des circuits intégrés
WO2002031516A1 (fr) 2000-10-04 2002-04-18 Atg Test Systems Gmbh & Co. Kg Module destine a un dispositif de test pour le test de cartes a circuits imprimes
US6384614B1 (en) 2000-02-05 2002-05-07 Fluke Corporation Single tip Kelvin probe
EP0875767B1 (fr) 1997-05-02 2007-08-08 atg test systems GmbH Appareil et procédé pour tester des circuits imprimés non pourvus de composants
WO2008071541A2 (fr) 2006-12-15 2008-06-19 Atg Luther & Maelzer Gmbh Module pour dispositif de contrôle destiné à tester des plaquettes de circuits imprimés
DE102007047269A1 (de) * 2007-10-02 2009-04-09 Atg Luther & Maelzer Gmbh Vollrasterkassette für einen Paralleltester zum Testen einer unbestückten Leiterplatte, Federkontaktstift für eine solche Vollrasterkassette sowie Adapter für einen Paralleltester zum Testen einer unbestückten Leiterplatte

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0149776A1 (fr) * 1983-12-08 1985-07-31 Martin Maelzer Adaptateur pour un dispositif de test de circuits imprimés
EP0268969A1 (fr) * 1986-11-18 1988-06-01 Luther & Maelzer GmbH Adaptateur pour un dispositif d'essai de cartes imprimées
DE4441347A1 (de) 1994-11-21 1996-05-30 Peter Fritzsche Adaptiergerät zur Prüfung von Leiterplatten
DE19715094A1 (de) 1996-04-12 1997-11-06 Methode Electronics Inc Halterung zum Prüfen von Leiterplatten
DE19644725C1 (de) * 1996-10-28 1998-04-02 Atg Test Systems Gmbh Vorrichtung und Verfahren zum Prüfen von Leiterplatten
EP0875767B1 (fr) 1997-05-02 2007-08-08 atg test systems GmbH Appareil et procédé pour tester des circuits imprimés non pourvus de composants
EP1031840A2 (fr) 1999-02-24 2000-08-30 JSR Corporation Appareil et procédé pour mesurer la résistance électrique adapté pour des circuits intégrés
US6384614B1 (en) 2000-02-05 2002-05-07 Fluke Corporation Single tip Kelvin probe
WO2002031516A1 (fr) 2000-10-04 2002-04-18 Atg Test Systems Gmbh & Co. Kg Module destine a un dispositif de test pour le test de cartes a circuits imprimes
EP1322967B1 (fr) 2000-10-04 2005-05-18 atg test systems GmbH & Co. KG Module destine a un dispositif de test pour le test de cartes a circuits imprimes
WO2008071541A2 (fr) 2006-12-15 2008-06-19 Atg Luther & Maelzer Gmbh Module pour dispositif de contrôle destiné à tester des plaquettes de circuits imprimés
US7893705B2 (en) 2006-12-15 2011-02-22 Atg Luther & Maelzer Gmbh Module for test device for testing circuit boards
DE102007047269A1 (de) * 2007-10-02 2009-04-09 Atg Luther & Maelzer Gmbh Vollrasterkassette für einen Paralleltester zum Testen einer unbestückten Leiterplatte, Federkontaktstift für eine solche Vollrasterkassette sowie Adapter für einen Paralleltester zum Testen einer unbestückten Leiterplatte
WO2009047160A2 (fr) 2007-10-02 2009-04-16 Atg Luther & Maelzer Gmbh Cassette à grille pleine surface pour un testeur parallèle servant à tester un circuit imprimé nu, tige de contact à ressort pour une telle cassette à grille pleine surface et adaptateur pour un testeur parallèle servant à tester un circuit imprimé nu
US20100283498A1 (en) 2007-10-02 2010-11-11 Guelzow Andreas Full grid cassette for a parallel tester for testing a non-componented printed circuit board, spring contact pin for such a full grid cassette and adapter for a parallel tester for testing a non-componented printed circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108008161A (zh) * 2017-10-26 2018-05-08 惠州市金百泽电路科技有限公司 金属化半孔光电产品电性能的快速检测方法

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