WO2012126087A1 - Apparatus for the automated testing and validation of electronic components - Google Patents

Apparatus for the automated testing and validation of electronic components Download PDF

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Publication number
WO2012126087A1
WO2012126087A1 PCT/CA2012/000214 CA2012000214W WO2012126087A1 WO 2012126087 A1 WO2012126087 A1 WO 2012126087A1 CA 2012000214 W CA2012000214 W CA 2012000214W WO 2012126087 A1 WO2012126087 A1 WO 2012126087A1
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WO
WIPO (PCT)
Prior art keywords
pad
test
contact
mounting surface
lattice
Prior art date
Application number
PCT/CA2012/000214
Other languages
French (fr)
Inventor
Rashid RASHIDZADEH
Nabeeh KANDALAFT
Majid Ahmadi
Original Assignee
University Of Windsor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by University Of Windsor filed Critical University Of Windsor
Priority to KR1020137027712A priority Critical patent/KR20140020967A/en
Priority to CN201280014240.6A priority patent/CN103477237B/en
Priority to JP2014500210A priority patent/JP2014508944A/en
Priority to CA2829986A priority patent/CA2829986C/en
Priority to EP20120761411 priority patent/EP2689259A4/en
Priority to US14/006,020 priority patent/US9261533B2/en
Publication of WO2012126087A1 publication Critical patent/WO2012126087A1/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • G01R31/2889Interfaces, e.g. between probe and tester
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/04Housings; Supporting members; Arrangements of terminals
    • G01R1/0408Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06716Elastic
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2822Testing of electronic circuits specially adapted for particular applications not provided for elsewhere of microwave or radiofrequency circuits

Definitions

  • the present invention provides an apparatus for the automated testing and validation of electronic components. More particularly, the present invention relates to an apparatus which includes a MEMS based device interface module, and more particularly a high speed test interface panel or module for testing electronic components such as chips, resistors and/or diodes used in electronic circuitry and the like.
  • the device interface unit provides temporary electrical connections between the component or unit under test and the measurement instruments within the ATE.
  • the device interface unit also provides space for unit under test-specific local circuits, such as buffer amplifiers and load circuits.
  • unit under test-specific local circuits such as buffer amplifiers and load circuits.
  • test head circuitry may be removed from the mass interconnect assembly and located remotely in an attached mainframe chassis.
  • comparators, programmable loads, drivers and switching circuits are typically left in the test head.
  • the circuits are then integrated on a low power monolithic circuit to facilitate packaging and reduce cooling requirements.
  • designing a pin electronics board in such a manner reduces the total length between the unit under test outputs and comparators inputs to approximately 2 to 3 inches for a conventionally packaged VLSI device, a 2 to 3 inch gap may still undermine signal integrity when frequencies exceed a few gigahertz.
  • CMOS complimentary-symmetry metal-oxide-semiconductor
  • the present invention provides for an automatic test equipment (ATE) unit, which incorporates a mass interconnect system.
  • ATE automatic test equipment
  • the mass interconnect system is provided with a universal mounting table for use with receiver and test interface modules for electronically mounting and testing a variety of different types of electronic components or unit under test thereon.
  • the mass interconnect system includes a pin electronic array configured to minimize the physical separation between each individual unit under test and the pin electronics of the ATE.
  • the present invention provides a mounting table test interface module based on MEMS technology, and which is adapted for electronic coupling with a receiver module of an ATE.
  • high-speed micro test- channels are provided in the test interface module to establish signal connectivity between the components or unit under test and the tester at the die level, and more preferably which maintain the signal integrity up to 50 GHz without significant signal loss distortion.
  • the present invention provides a MEMS based interface module for use in an ATE to perform high-speed testing of a plurality of electronic components and more preferably such components at a die level, as for example as part of a bulk testing procedure.
  • the provided architecture of the interface module reduces the distance between the unit under test and pin electronics of the ATE less then 2000 and preferably less than about a few hundred micrometers. As a result, the transmission line effects may significantly attenuated, allowing the test channels to operate up to 50 GHz without considerable signal integrity degradation.
  • ATE automatic test equipment
  • a number of interchangeable MEMS based modules are incorporated into an automatic test equipment (ATE) mass interconnect test table for use in the high speed testing of a variety of different electronic components.
  • Such electronic components or unit under test may include without restriction resistors, chips, diodes and the like.
  • the test table is operable to test devices rated at up to at least about 40 GHz, and preferably upto about 50 GHz, without requiring custom test head circuitry removal and/or reconfiguration. .
  • the present invention resides in a mass interconnect system for use in automatic test equipment for concurrently testing of a plurality of electronic components of a unit under test, the interconnect system comprising: the receiver module including a forward mounting surface, a plurality of contact pins being mounted on and extending forwardly from said mounting surface, the receiver module for electronic coupling to a controller activatable to provide electronic signals simulating at least one selected test condition to selected one of said contact pins, a test interface module positionable adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting the unit under test in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive I/O pad and a resiliently deformable biasing member, the I/O pad being engagable with an associated one of said electronic components when the unit under test is moved to the testing position, and selectively movable between an operating position, wherein said I/O pad is moved
  • the present invention resides in a mass interconnect system for use in automatic test equipment for effecting a selected test of an electronic component of a unit under test, the interconnect system comprising: a receiver module electronically coupled to a controller activatable to provide electric signals correlated to the selected test, the receiver module including a forward mounting surface, and a plurality of contact pins being mounted on and extending forwardly from said mounting surface, a test interface module positioned adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting the unit under test in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive pad and a resiliently deformable pad support, the conductive pad being engagable with said electronic component when the device under test is in the testing position, the conductive pad being movable from a rest position, where the conductive pad is moved forwardly to a position spaced from the associated contact pin, and an operating position, where said conductive pad
  • the present invention resides in a test interface module for use in a mass interconnect system for electronic component testing, the mass interconnect system including a receiver module electronically connectable to and activatable to provide electric signals correlated to a selected component test, the receiver module including a forward mounting surface, and a plurality of contact pins extending forwardly relative to said mounting surface, the test interface module positionable adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting a unit under test comprising a plurality of electronic components to be tested in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive pad and a resiliently deformable support, at least one of said conductive pad being engagable with an associated one of said electronic components when the device under test is in the testing position, the conductive pad being movable between a rest position, where the conductive pad is moved to a position spaced from the associated contact pin, and an operating position
  • Figure 1 illustrates schematically an automatic test equipment which incorporates a mass interconnect system operable to provide temporary testing signal paths between the automatic test equipment and a number of units under test;
  • Figure 2 shows schematically a robot assembly used in the positioning of electrical components in a testing die for use in an automatic test equipment of Figure 1 ;
  • Figure 3 shows schematically the positioning of the testing die of Figure 2 in the mass interconnect system testing table of the automated test equipment of Figure 1;
  • Figures 4 to 6 show schematically an enlarged schematic view of the mass interconnect system incorporating the MEMS based test interfaced module and receiver module used in the ATE of Figure 1,
  • Figure 7 illustrates schematically a MEMS contact spring used in the test interface module of Figure 2, in electronically coupling a unit under test to a receiver module, in a relaxed state;
  • Figure 8 illustrates schematically the MEMS contact spring of Figure 7 under a mass load pressure during component testing
  • Figure 9 illustrates graphically the relationship between AC resistance for selected contact spring metals versus frequency
  • Figure 10 illustrates schematically a cross sectional view of the contact spring of Figure 7 and an electronic component of a unit under test prior to applying a mass load pressure
  • Figure 11 illustrates schematically a cross sectional view of the contact spring and electronic components of Figure 10 under mass load pressure, and showing temporary electronic connection during operation of the automatic test equipment of Figure 1;
  • Figure 12 illustrates schematically the signal path from the automatic test equipment pin electronics to the electronic component under test contact paths
  • Figure 13 illustrates graphically the AC response for the contact spring of Figure 7, a strip-line and a coax cable
  • Figure 14 illustrates graphically the volt peak-to-peak output versus input voltage at 1 GHz for each of the contact spring of Figure 7, a strip-line and a coax cable;
  • Figure 15 illustrates the peak-to-peak output voltage at 50 GHz for the contact spring of Figure 7.
  • Figure 1 shows an automatic test equipment 10 unit for use in the automated testing and validation of electronic components 12 ( Figure 2) and preferably the concurrent testing of multiple components 12 positioned with a test die 16 prior to their assembly as part of a circuit board and/or the like.
  • the automatic test equipment 10 is provided with a mass interconnect system 20 which is configured to achieve the simultaneous high speed testing of a variety of different types of electronic components 12, including by way of non-limiting example, switches, chips, resistors, diodes, and the like without requiring significant device-specific customization and/or reconfiguration for each different die or unit under test 16 to be tested.
  • the automatic test equipment 10 includes a main processor 22, a robotic handler assembly 26, a test protocol controller 28, and an interconnect module interface 30.
  • the main processor 22 provides overall control to the mass interconnect system 20, the robotic handler assembly 26 and the test protocol controller 28 in initial placement of multiple components 12 into the test die 16; as well as the positioning, testing and removal of the testing die 16 into the mass interconnect system 20 as a unit under test, and its subsequent removal therefrom following testing.
  • the robotic handler assembly 26 includes a three axis movable robot arm 32 which has a selectively actuable gripping fixture 34, and which is operable to move the components 12 individually from a supply station 35, into the test die 16. Following placement of the components 12 in the die 16, the robot arm 32 moves the die 16 into the mass interconnect system 20 for component testing; and thereafter following testing and validation to a discharge station (not shown).
  • the handler assembly 26 may be provided with multiple robot arms 32 which are used to simultaneously preposition multiple components 12 in a grouped prearranged array within the die 16 as a desired unit under test.
  • the mass interconnect system 20 is shown best in Figures 4 to 6 as including a modular test interface board 36 and a modular interface receiver board 38 which collectively function as a testing mounting table 40 for supporting the die/unit under test 16 during testing and validation.
  • an actuator assembly 42 is provided for use in positioning the test interface board 36 relative to the receiver board 38 during component testing.
  • a preferred test interface board 36 used in the testing mounting table 40 ( Figure 5) is provided as a generally rectangular panel having a planar top central surface 44.
  • An array of between about 25 to about 500 spring contacts 46 are positioned within a corresponding aperture 48 extending through the panel 36.
  • Figure 3 shows the upper surface 44 of the removable test interface board 38 as including an array of contact spring connectors 46, each of which is about 50 to 1000 ⁇ and preferably about 50 to 150 ⁇ long.
  • the spring connectors 46 provide temporary electrical connection between the components 12 in the die 16 or unit under test and the automatic test equipment 10.
  • the top of the spring contacts 46 provide temporary electrical connection with the electrical leads of the electrical components 12 secured die 16 or unit under test, while the bottom of the contact spring 46 provides the connectivity with the ATE pin electronics through the interface receiver board 38 as shown in Figure 6.
  • the test interface board 36 is provided as a modular interchangeable board. Accordingly, different interface boards 36 may be used in the automated test equipment 10 depending on the particular electrical component and/or unit under test to be validated.
  • Figures 7 and 8 show best each spring contact 46 as including a centrally disposed conductive metal contact pad 50 which is supported by an elastically deformable sling assembly 52.
  • the sling assembly 52 is formed as a generally planar square lattice 54 which is secured along peripheral edge portions to the adjacent portions of the test interface board 36 by edge supports 56a,56b ( Figure 10).
  • the lattice 54 is formed from a suitable elastically deformable material, and most preferably silicone, selected to resiliently return to an initial unbiased state.
  • the test interface board 36 is used to support the die 16 or unit under test with the pin contacts of selected electronic components 12 in electrical contact with an associated contact pad 50, so as to permit the transmission of electrical test signals therebetween.
  • the spring contacts 46 are provided as part of a preselected geometric array which is configured to allow the positioning of a number of differing test dies 16 thereon, for component testing and validation of a number of different component types.
  • Figures 3 and 4 show the interface receiver board 38 used in the mass interconnect system 20.
  • the central portion of the interface receiver board 38 is preferably provided with generally planar, upper forward and lower rear surfaces 58, 60.
  • An array of electrical contact pins 62 is provided in the central portion 58, and which project upwardly from the forward surface 58.
  • the upper surface 58 of the fixed receiving board 38 most preferably includes a bed of micro contact pins 62 which are each electronically coupled to an associated solder pad 76.
  • the contact pins 62 are positioned and configured to establish electrical connections with an underside of the removable interface receiver board 38, as well as a selected die 16 under testing.
  • the micro contact pins 62 are preferably formed from gold and are provided as substitutes for conventional pogo pins commonly used in automatic test equipment.
  • the contact pins 62 are arranged in a preselected geometric array so that at least one contact pin 62 corresponds to that of a contact pad 50, so as to align therewith when the test interface board 36 is moved into juxtaposed alignment with the receiver board 38 in assembly of the testing mounting table 40.
  • the interface receiver board 38 may also be formed having a modular construction whereby the contact pins 62 are each electronically connected with an associated contact pad 50 formed on the lower rear surface 60.
  • the lower surface 60 of the receiver board 38 may further include an array of the solder pads 76 which are configured and positioned to directly connect to the automated test equipment pin electronics as shown in Figure 6. Each solder pad 76 in turn is provided for electronic coupling with corresponding permanent pin contact 64 provided within the interconnect module interface 30.
  • the interconnect module interface 30 is provided in electronic communication with the test protocol controller 28 to receive and send testing signals therefrom.
  • the module interface 30 is further provided with a test table housing or support surface for receiving the modular test interface board 36, receiver board 38 and die 16 thereon during testing operations.
  • the module interface 30 preferably also includes a pressing element 70.
  • the pressing element 70 being selectively operable to apply a preselected downward contact pressure on the die 16 when secured in a testing position in generally juxtaposed alignment over the test interface board 36.
  • Figures 4 to 6 show the test interface board 36 and receiver board 38 as respectively including complimentary alignment keys 78,79.
  • the alignment keys 78,79 are configured for complimentary engagement to facilitate the assembly of the testing mounting table 40 within the test table housing, and with contact pads 50, contact pins 62 and permanent pin contacts 64 directly aligned.
  • the test interface board 36 is positioned immediately above the forward surface 58 of the interface receiver board 38.
  • the contact pad 50 of each spring contact 46 assumes an unbiased position, spaced a marginal distance above the associated contact pin 62, and preferably spaced a distance selected at preferably about 5 and 20 microns.
  • a number of electrical components 12 are pre-positioned within the test die 16 or unit under test.
  • the die 16 is moved by way of the robotic handler assembly 26 to a juxtaposed position on top of the test interface board 36.
  • the die 16 is most preferably tested in the automatic test equipment 10 so that multiple individual electronic components 12 are tested concurrently.
  • the connectivity is established by actuating the pressing element 70 to apply a low pressure mass load on top of the die 16.
  • test interface board 36 to be used in the testing mounting table 40 will depend on the specific electrical component 12 to be tested and/or the die 16 under test.
  • the die 16 is positioned in juxtaposed alignment with the top surface of the test interface board 36, so that the electrical contact leads of each individual component 12 is brought into electronic communication with the contact pad 50 of an associated spring contact 46.
  • the processor 22 is used to activate the pressing element 70 to apply a downward pressure on the die 16 or unit under test.
  • the application of a downward pressure (arrow 100 in Figure 6) which exceeds a predetermined minimum pressure results in a contact force between the electrical leads of the components 12 and contact pad 50 which elastically deforms the lattice 54 and effects the downward displacement of the contact pads 50 into electronic communication with the associated contact pin 62.
  • the test protocol controller 28 is thereafter activated, transmitting and receiving desired test signals to and from each electronic component 12 via the permanent pin contact 64, contact pin 62 and contact pad 50 of the spring contact 46.
  • the test protocol controller 28 is configured to activate one or more of a series of preselected testing protocols on the electronic components 12, while the die 16 or unit under test is positioned on the testing mounting table 40 by the handler assembly 26.
  • the test protocol controller 28 may include without limitation, a digital power supply (DPS); a parametric measurement unit (PMU); and arbitrary wave form generator (AWG); and/or digital I/O.
  • the MEMS based test interface board 36 is most preferably configured to accommodate test interface circuits usually required to perform functional tests on high speed analog and RF circuits.
  • the test interface board 36 as compared to conventional device interface boards, provides necessary means for fault detection at the die level. This enables manufacturers to detect electronic component faults at the die level, before packing and/or assembly on circuit boards. Therefore, the cost of packaging, which is frequently a major portion of the overall cost of current fabrication, may be virtually eliminated, a) Spring Contact
  • spring contacts 46 used in the ATE 10 is shown best in Figures 7 and 8.
  • the spring contacts 46 have a square geometry with a length and width dimension of about 100 ⁇ 100 ⁇ .
  • Each spring contact 46 includes a rectangular central conductive metal pad 50, and which is supported in a central area of the elastically deformable sling assembly 52.
  • the contact pad 50 has width and length dimensions of about 40 ⁇ 40 ⁇ , and a height thickness of about 5 to 30 ⁇ ⁇ , and preferably 10 ⁇ .
  • the contact pad 50 is supported about its edge periphery only by the sling lattice 54, and which consists of eight integrally formed silicone beams of generally equal length.
  • the sling lattice 54 is in turn suspended within the test interface board apertures along opposing edges by edge sling supports 56a,56b ( Figure 10).
  • the sling assembly 52 is configured so that when unbiased, the contact pad 50 is maintained in a raised position spaced above associated contact pin 62, with the silicone lattice 54 maintaining symmetrical pressure around the contact pad 50.
  • the spring contact 46 is most preferably formed so as to satisfy the following criteria: (a) a flat top surface of the contact pad 50 provides larger contact area to minimize the contact resistance with the electronic component 12; (b) low contact force; (c) small area to be matched with the die contact pins 52; (d) negligible shear; and (e) reliable elastic performance.
  • the yield strength of the sling assembly 52 is defined by the stress where a material begins to deform plastically.
  • Plasticity is the deformation of a material undergoing nonreversible permanent change in response to applied load. Because of its high stress yield, silicone is selected as a preferred supporting material.
  • FIG. 10 A side perspective view of a contact spring 46 and electronic component 12 under test in the steady and deformed state are shown in Figures 10 and 11.
  • the pressure load mass 70 positioned on top of the die 16 effects a pressing force against the spring contacts 46 of the removable interface receiver board 38 to maintain the connection during the test phase.
  • the pressure load mass 70 is preferably minimized to keep the deformation of the contact springs 46 within the limits of material elasticity of the sling assembly 52 and away from the plasticity region,
  • Electromagnetic performance parameters and spice models for MEMS contact springs were extracted using the industry-standard tools HFSSTM and Q3DExtraxtorTM.
  • RDIB , C2, and L2 are the resistance, capacitance and inductance of the device interface board contact spring respectively.
  • R CO ntact, CI, C3, LI and L3 are the lumped parameters at PE/device interface board and the device interface board/die under test interfaces.
  • the - 3dB bandwidth for the strip-line and the coax cable lie at 20 MHz and 70 MHz respectively, indicating that the input signals for both models are heavily attenuated beyond 100 MHz. This will limit the dynamic range of the test signals and can reduce the signal integrity and the signal to noise ratio considerably.
  • the AC response of the MEMS interface shows drastic improvement over the conventional solutions.
  • the -3dB bandwidth lies in the vicinity of 50 GHz which is higher than the bandwidth of currently available test channel by orders of magnitudes.
  • Figure 14 shows the transient response at 1 GHz for the three extracted models.
  • the signal integrity is maintained for the contact spring while it is extremely degraded for both the strip-line and the coax cable; only at low frequencies less than 1 GHz the signal can be transmitted.
  • Figure 15 shows the response for the contact spring at 50 GHz. The signal integrity can be preserved up to 50 GHz with little loss or distortion.
  • Table I and Table II present the extracted lumped parameters at 1.00 GHz and 50 GHz.
  • the contact spring 46 of the present invention shows significantly lower values of parasitic capacitance and inductance as compared to the strip-line and the coax cable models.
  • the proposed test interface board module also provides lower path resistance between the electrical component under test and the automatic test equipment resources. The lower resistance, capacitance and inductance values for the contact spring 46 allow the MEMS structure to operate at higher frequencies without the loss of signal integrity.
  • the foregoing construction establishes a viable test interface board module which is suitable for use in automatic test equipment 10 for the high speed testing of electronic components.
  • the proposed MEMS based structure can reduce the physical separation between the die under test and the ATE resources by orders of magnitude due to its micro- scale sizes.
  • the MEMS device test interface board 36 of the present invention avoids problem of undesired transmission line effects that limits the bandwidth of ATE test channels.
  • the parasitic capacitances and inductances due to long wire traces in conventional test channels are reduced considerably allowing the MEMS test channels to operate at much higher frequencies.
  • the MEMS device interface board test channels can operate up to 50 GHz while maintaining a high level of signal integrity.
  • the proposed interface module can also provide a place for testing interface circuits to enhance the electrical performance of the tester during critical tests.
  • the MEMS device test interface board 36 can be used to establish necessary test channels between a die under test and the ATE measurement instruments. Conducting test at the die 16 level reduces the cost of fabrication by detecting and removing faulty devices from the production line before the added expense of packaging.
  • test interface module may be provided as a stand alone test interface module. More preferably however a number of the high speed test interface modules are incorporated into a test table 40 for the precision testing of electronic components including without restriction advanced micro-processors, PC chipsets and graphics, disk drives, video game devices, system on a chip (SiP), memory, baseband digital, network and broadband devices.
  • test table 40 for the precision testing of electronic components including without restriction advanced micro-processors, PC chipsets and graphics, disk drives, video game devices, system on a chip (SiP), memory, baseband digital, network and broadband devices.

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  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
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Abstract

An automatic test equipment (ATE) unit, which incorporates a mass interconnect system. The mass interconnect system is provided with a universal mounting table for use with receiver and test interface modules for electronically mounting and testing a variety of different types of electronic components or unit under test thereon. The mounting table test interface module incorporates MEMS based spring contacts to provide high-speed micro test-channels in order to establish signal connectivity between the components or unit under test and the tester, and which maintain the signal integrity up to 50 GHz without significant signal loss distortion.

Description

APPARATUS FOR THE AUTOMATED TESTING AND VALIDATION OF
ELECTRONIC COMPONENTS
RELATED APPLICATIONS
This application claims the benefit under 35 USC §119(e) to United States Provisional Application No. 61/457404, filed 21 March 201 1, entitled MEMS Based Device Interface Module.
SCOPE OF THE INVENTION
The present invention provides an apparatus for the automated testing and validation of electronic components. More particularly, the present invention relates to an apparatus which includes a MEMS based device interface module, and more particularly a high speed test interface panel or module for testing electronic components such as chips, resistors and/or diodes used in electronic circuitry and the like.
BACKGROUND OF THE INVENTION
Currently almost 100% of all electronic components are tested prior to assembly onto circuit boards. Such testing is highly desirable as in circuit board assembly processes up to 80,000 components may be used in each assembly line per minute. If a single component is defective, it is typically more cost effective to scrap the entire finished circuit board, rather than identify and repair any manufacturing defects.
As the speed of electronic circuitry manufacture has increased, various manufacturers have developed automatic test equipment to test and validate individual components. Conventional automatic test equipment typically includes a master controller which is electronically coupled to a signal simulator, sensing card or the like by way of a connector interface and mass interconnect system. The mass interconnect system is provided with a mounting table used to position and electronically couple a component device or unit under test to the simulator during testing. A robot handler physically positions the component device or unit under test to be tested within the automatic test equipment. Conventional automatic test equipment used to test individual components however, currently experience difficulties keeping pace with faster assembly speeds. In particular, conventional automatic test equipment (ATE) is limited to less than 12 GHz, and most typically operates at about 4 GHz.
Various manufactures have proposed automatic test systems which operate to test components at speeds as high as 77 GHz. However, major constraints exist with adopting higher processing speeds, as a result of limitations on current mass interconnect system mounting tables. At frequencies above a few gigahertz, testing integrated circuits becomes a challenging task. In particular, signal integrity degradation due to parasitic effects of interconnects and electromagnetic coupling undermines the test results at high speeds.
Conventional automatic test equipment incorporate a device interface unit to perform tests on integrated circuits. The device interface unit provides temporary electrical connections between the component or unit under test and the measurement instruments within the ATE. The device interface unit also provides space for unit under test-specific local circuits, such as buffer amplifiers and load circuits. The applicant has appreciated that it is highly desirable to reduce the physical distance between the unit under test and the testing circuitry of the ATE to lower transmission line effects and the electromagnetic coupling. One traditional approach is to locate the mounting table pin electronics of the automatic test equipment as close as possible to the unit under test pins. However, in practice general purpose pin electronics are designed to meet a variety of requirements to cover different test scenarios. As a result, general purpose pin electronics are commonly bulky and cannot be readily integrated and positioned adjacent to the unit under test pins. Furthermore, conventional mounting tables consume considerable amounts of power, and in some cases require liquid cooling systems to avoid overheating and maintain desired temperature. Heretofore, the problem of physical separation between unit under test and pin electronics has not been decisively solved. As a result, heretofore in the state of the art automated test equipment (ATE), this distance still may exceed several inches.
To reduce the length of transmission distance between the automated test equipment and unit under test, various techniques have been considered. In certain applications, test head circuitry may be removed from the mass interconnect assembly and located remotely in an attached mainframe chassis. In such constructions, comparators, programmable loads, drivers and switching circuits are typically left in the test head. The circuits are then integrated on a low power monolithic circuit to facilitate packaging and reduce cooling requirements. Although designing a pin electronics board in such a manner reduces the total length between the unit under test outputs and comparators inputs to approximately 2 to 3 inches for a conventionally packaged VLSI device, a 2 to 3 inch gap may still undermine signal integrity when frequencies exceed a few gigahertz.
Alternately, general purpose pin electronics may be replaced with device specific receivers. By restricting the pin electronics architecture to only a single device, the power and area overhead are reduced. Transceivers may then be fabricated and mounted on the unit under test interface board to serve as a local test interface. While such changes allow the characteristics of the inputs and outputs of the test system to be matched to the component or unit under test I/O pad and reduce both the effects of signal reflection as well as the distance between the device under test and pin electronics, such approach restricts the flexibility of the general purpose pin electronics architecture. The applicant has appreciated that with the transient frequency of available complimentary-symmetry metal-oxide-semiconductor (CMOS) technologies exceeding 200 GHz, the architecture of the conventional testers needs to be greatly improved to maintain acceptable testing speeds. High-speed test signals experience a broad range of nonlinearities associated with the signal paths. It has been recognized that when the frequency of interaction between the unit under test and the automatic test equipment approaches the gigahertz range, the effects of transmission lines become a critical issue requiring matching impedances to minimize signal reflection and enhance the performance parameters of test channels. Moreover, AC resistance due to the skin effect and electromagnetic coupling caused by radiation become significant, degrading the signal integrity. These undesired effects eventually undermine the timing measurement accuracy and the test results.
SUMMARY OF THE INVENTION
To at least partially overcome at least some of the disadvantages associated with prior art devices, the present invention provides for an automatic test equipment (ATE) unit, which incorporates a mass interconnect system. The mass interconnect system is provided with a universal mounting table for use with receiver and test interface modules for electronically mounting and testing a variety of different types of electronic components or unit under test thereon. As will be described, the mass interconnect system includes a pin electronic array configured to minimize the physical separation between each individual unit under test and the pin electronics of the ATE.
In another embodiment, the present invention provides a mounting table test interface module based on MEMS technology, and which is adapted for electronic coupling with a receiver module of an ATE. In a preferred construction, high-speed micro test- channels are provided in the test interface module to establish signal connectivity between the components or unit under test and the tester at the die level, and more preferably which maintain the signal integrity up to 50 GHz without significant signal loss distortion.
In another embodiment, the present invention provides a MEMS based interface module for use in an ATE to perform high-speed testing of a plurality of electronic components and more preferably such components at a die level, as for example as part of a bulk testing procedure. The provided architecture of the interface module reduces the distance between the unit under test and pin electronics of the ATE less then 2000 and preferably less than about a few hundred micrometers. As a result, the transmission line effects may significantly attenuated, allowing the test channels to operate up to 50 GHz without considerable signal integrity degradation.
More preferably, a number of interchangeable MEMS based modules are incorporated into an automatic test equipment (ATE) mass interconnect test table for use in the high speed testing of a variety of different electronic components. Such electronic components or unit under test may include without restriction resistors, chips, diodes and the like. Preferably, the test table is operable to test devices rated at up to at least about 40 GHz, and preferably upto about 50 GHz, without requiring custom test head circuitry removal and/or reconfiguration. .
Accordingly, in one aspect, the present invention resides in a mass interconnect system for use in automatic test equipment for concurrently testing of a plurality of electronic components of a unit under test, the interconnect system comprising: the receiver module including a forward mounting surface, a plurality of contact pins being mounted on and extending forwardly from said mounting surface, the receiver module for electronic coupling to a controller activatable to provide electronic signals simulating at least one selected test condition to selected one of said contact pins, a test interface module positionable adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting the unit under test in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive I/O pad and a resiliently deformable biasing member, the I/O pad being engagable with an associated one of said electronic components when the unit under test is moved to the testing position, and selectively movable between an operating position, wherein said I/O pad is moved rearwardly towards the mounting surface into electrical contact with said associated contact pin, and rest position where the I/O pad is moved forwardly a distance spaced therefrom, the resiliently deformable biasing member providing a threshold force to resiliently bias the I/O pad towards the rest position, and an actuator selectively operable to effect a contact pressure between the I/O pad and the associated electronic component greater than the threshold force to move the I/O pad to the operating position and effect electrical communication between the electronic component, I/O pad and associated contact pin.
In another aspect, the present invention resides in a mass interconnect system for use in automatic test equipment for effecting a selected test of an electronic component of a unit under test, the interconnect system comprising: a receiver module electronically coupled to a controller activatable to provide electric signals correlated to the selected test, the receiver module including a forward mounting surface, and a plurality of contact pins being mounted on and extending forwardly from said mounting surface, a test interface module positioned adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting the unit under test in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive pad and a resiliently deformable pad support, the conductive pad being engagable with said electronic component when the device under test is in the testing position, the conductive pad being movable from a rest position, where the conductive pad is moved forwardly to a position spaced from the associated contact pin, and an operating position, where said conductive pad is moved towards the mounting surface and into electrical contact with said associated contact pin, the resiliently deformable pad support resiliently biasing the contact pad towards the rest position, and an actuator assembly selectively operable to effect contact between the conductive pad and the electronic component to move the contact pad to the operating position and effect electrical communication between the electronic component, I/O contact pad and said associated contact pin. In yet a further aspect, the present invention resides in a test interface module for use in a mass interconnect system for electronic component testing, the mass interconnect system including a receiver module electronically connectable to and activatable to provide electric signals correlated to a selected component test, the receiver module including a forward mounting surface, and a plurality of contact pins extending forwardly relative to said mounting surface, the test interface module positionable adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting a unit under test comprising a plurality of electronic components to be tested in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive pad and a resiliently deformable support, at least one of said conductive pad being engagable with an associated one of said electronic components when the device under test is in the testing position, the conductive pad being movable between a rest position, where the conductive pad is moved to a position spaced from the associated contact pin, and an operating position, where said conductive pad is moved towards the mounting surface and into electrical contact with said associated contact pin, and an operating position, wherein said conduct pad is moved into electrical communication with an associated contact pin, the deformable support resiliently biasing the contact pad towards the rest position, and whereby the conductive pad is movable from the rest position to the operating position on the application of a predetermined threshold force to the unit under test, to effect electrical communication between the electronic component, the contact pad and the associated contact pin.
BRIEF DESCRIPTION OF THE DRAWINGS
Reference may now be had to the following detailed description, taken together with the accompanying drawings, in which:
Figure 1 illustrates schematically an automatic test equipment which incorporates a mass interconnect system operable to provide temporary testing signal paths between the automatic test equipment and a number of units under test;
Figure 2 shows schematically a robot assembly used in the positioning of electrical components in a testing die for use in an automatic test equipment of Figure 1 ;
Figure 3 shows schematically the positioning of the testing die of Figure 2 in the mass interconnect system testing table of the automated test equipment of Figure 1;
Figures 4 to 6 show schematically an enlarged schematic view of the mass interconnect system incorporating the MEMS based test interfaced module and receiver module used in the ATE of Figure 1,
Figure 7 illustrates schematically a MEMS contact spring used in the test interface module of Figure 2, in electronically coupling a unit under test to a receiver module, in a relaxed state;
Figure 8 illustrates schematically the MEMS contact spring of Figure 7 under a mass load pressure during component testing; Figure 9 illustrates graphically the relationship between AC resistance for selected contact spring metals versus frequency;
Figure 10 illustrates schematically a cross sectional view of the contact spring of Figure 7 and an electronic component of a unit under test prior to applying a mass load pressure;
Figure 11 illustrates schematically a cross sectional view of the contact spring and electronic components of Figure 10 under mass load pressure, and showing temporary electronic connection during operation of the automatic test equipment of Figure 1;
Figure 12 illustrates schematically the signal path from the automatic test equipment pin electronics to the electronic component under test contact paths;
Figure 13 illustrates graphically the AC response for the contact spring of Figure 7, a strip-line and a coax cable;
Figure 14 illustrates graphically the volt peak-to-peak output versus input voltage at 1 GHz for each of the contact spring of Figure 7, a strip-line and a coax cable; and
Figure 15 illustrates the peak-to-peak output voltage at 50 GHz for the contact spring of Figure 7.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
Reference is made to Figure 1 which shows an automatic test equipment 10 unit for use in the automated testing and validation of electronic components 12 (Figure 2) and preferably the concurrent testing of multiple components 12 positioned with a test die 16 prior to their assembly as part of a circuit board and/or the like. As will be described, the automatic test equipment 10 is provided with a mass interconnect system 20 which is configured to achieve the simultaneous high speed testing of a variety of different types of electronic components 12, including by way of non-limiting example, switches, chips, resistors, diodes, and the like without requiring significant device-specific customization and/or reconfiguration for each different die or unit under test 16 to be tested.
As shown best in Figure 1, in addition to the mass interconnect system 20, the automatic test equipment 10 includes a main processor 22, a robotic handler assembly 26, a test protocol controller 28, and an interconnect module interface 30.
The main processor 22 provides overall control to the mass interconnect system 20, the robotic handler assembly 26 and the test protocol controller 28 in initial placement of multiple components 12 into the test die 16; as well as the positioning, testing and removal of the testing die 16 into the mass interconnect system 20 as a unit under test, and its subsequent removal therefrom following testing.
In a simplified construction, the robotic handler assembly 26 includes a three axis movable robot arm 32 which has a selectively actuable gripping fixture 34, and which is operable to move the components 12 individually from a supply station 35, into the test die 16. Following placement of the components 12 in the die 16, the robot arm 32 moves the die 16 into the mass interconnect system 20 for component testing; and thereafter following testing and validation to a discharge station (not shown). Optionally, the handler assembly 26 may be provided with multiple robot arms 32 which are used to simultaneously preposition multiple components 12 in a grouped prearranged array within the die 16 as a desired unit under test.
The mass interconnect system 20 is shown best in Figures 4 to 6 as including a modular test interface board 36 and a modular interface receiver board 38 which collectively function as a testing mounting table 40 for supporting the die/unit under test 16 during testing and validation. As will be described, an actuator assembly 42 is provided for use in positioning the test interface board 36 relative to the receiver board 38 during component testing. In the construction of Figure 3, a preferred test interface board 36 used in the testing mounting table 40 (Figure 5) is provided as a generally rectangular panel having a planar top central surface 44. An array of between about 25 to about 500 spring contacts 46 are positioned within a corresponding aperture 48 extending through the panel 36. Figure 3 shows the upper surface 44 of the removable test interface board 38 as including an array of contact spring connectors 46, each of which is about 50 to 1000 μπι and preferably about 50 to 150 μιτι long. The spring connectors 46 provide temporary electrical connection between the components 12 in the die 16 or unit under test and the automatic test equipment 10. As will be described, the top of the spring contacts 46 provide temporary electrical connection with the electrical leads of the electrical components 12 secured die 16 or unit under test, while the bottom of the contact spring 46 provides the connectivity with the ATE pin electronics through the interface receiver board 38 as shown in Figure 6. Although not essential, most preferably, the test interface board 36 is provided as a modular interchangeable board. Accordingly, different interface boards 36 may be used in the automated test equipment 10 depending on the particular electrical component and/or unit under test to be validated.
Figures 7 and 8 show best each spring contact 46 as including a centrally disposed conductive metal contact pad 50 which is supported by an elastically deformable sling assembly 52. The sling assembly 52 is formed as a generally planar square lattice 54 which is secured along peripheral edge portions to the adjacent portions of the test interface board 36 by edge supports 56a,56b (Figure 10). In a preferred construction, the lattice 54 is formed from a suitable elastically deformable material, and most preferably silicone, selected to resiliently return to an initial unbiased state.
As will be described, the test interface board 36 is used to support the die 16 or unit under test with the pin contacts of selected electronic components 12 in electrical contact with an associated contact pad 50, so as to permit the transmission of electrical test signals therebetween. Although not essential, most preferably, the spring contacts 46 are provided as part of a preselected geometric array which is configured to allow the positioning of a number of differing test dies 16 thereon, for component testing and validation of a number of different component types.
Figures 3 and 4 show the interface receiver board 38 used in the mass interconnect system 20. The central portion of the interface receiver board 38 is preferably provided with generally planar, upper forward and lower rear surfaces 58, 60. An array of electrical contact pins 62 is provided in the central portion 58, and which project upwardly from the forward surface 58. The upper surface 58 of the fixed receiving board 38 most preferably includes a bed of micro contact pins 62 which are each electronically coupled to an associated solder pad 76. The contact pins 62 are positioned and configured to establish electrical connections with an underside of the removable interface receiver board 38, as well as a selected die 16 under testing. The micro contact pins 62 are preferably formed from gold and are provided as substitutes for conventional pogo pins commonly used in automatic test equipment. In particular, the contact pins 62 are arranged in a preselected geometric array so that at least one contact pin 62 corresponds to that of a contact pad 50, so as to align therewith when the test interface board 36 is moved into juxtaposed alignment with the receiver board 38 in assembly of the testing mounting table 40.
Although not essential, the interface receiver board 38 may also be formed having a modular construction whereby the contact pins 62 are each electronically connected with an associated contact pad 50 formed on the lower rear surface 60. The lower surface 60 of the receiver board 38 may further include an array of the solder pads 76 which are configured and positioned to directly connect to the automated test equipment pin electronics as shown in Figure 6. Each solder pad 76 in turn is provided for electronic coupling with corresponding permanent pin contact 64 provided within the interconnect module interface 30.
The interconnect module interface 30 is provided in electronic communication with the test protocol controller 28 to receive and send testing signals therefrom. The module interface 30 is further provided with a test table housing or support surface for receiving the modular test interface board 36, receiver board 38 and die 16 thereon during testing operations.
With the interface receiver board 38 positioned on the support surface or housing of the interconnect module interface 30, the contact pads 50 may be provided into electronic connection with an associated permanent pin contact 64, to thereby transmit electronic test signals between the test protocol controller 28, the receiver board 38 and the test interface board 36 in testing operation. The module interface 30 preferably also includes a pressing element 70. The pressing element 70 being selectively operable to apply a preselected downward contact pressure on the die 16 when secured in a testing position in generally juxtaposed alignment over the test interface board 36.
Figures 4 to 6 show the test interface board 36 and receiver board 38 as respectively including complimentary alignment keys 78,79. The alignment keys 78,79 are configured for complimentary engagement to facilitate the assembly of the testing mounting table 40 within the test table housing, and with contact pads 50, contact pins 62 and permanent pin contacts 64 directly aligned. As shown best in Figure 4, in initial assembly, the test interface board 36 is positioned immediately above the forward surface 58 of the interface receiver board 38. When first positioned, the contact pad 50 of each spring contact 46 assumes an unbiased position, spaced a marginal distance above the associated contact pin 62, and preferably spaced a distance selected at preferably about 5 and 20 microns. Most preferably, a number of electrical components 12 are pre-positioned within the test die 16 or unit under test. The die 16 is moved by way of the robotic handler assembly 26 to a juxtaposed position on top of the test interface board 36. The die 16 is most preferably tested in the automatic test equipment 10 so that multiple individual electronic components 12 are tested concurrently. The connectivity is established by actuating the pressing element 70 to apply a low pressure mass load on top of the die 16.
It is to be appreciated that the final selection of the test interface board 36 to be used in the testing mounting table 40 will depend on the specific electrical component 12 to be tested and/or the die 16 under test. Following alignment and placement of the test interface board 36 over the interface receiver board 38, the die 16 is positioned in juxtaposed alignment with the top surface of the test interface board 36, so that the electrical contact leads of each individual component 12 is brought into electronic communication with the contact pad 50 of an associated spring contact 46.
With the die 16 or unit under test positioned in juxtaposed alignment with the top surface 44, the processor 22 is used to activate the pressing element 70 to apply a downward pressure on the die 16 or unit under test. The application of a downward pressure (arrow 100 in Figure 6) which exceeds a predetermined minimum pressure results in a contact force between the electrical leads of the components 12 and contact pad 50 which elastically deforms the lattice 54 and effects the downward displacement of the contact pads 50 into electronic communication with the associated contact pin 62. While the pressing element 70 is so deployed, the test protocol controller 28 is thereafter activated, transmitting and receiving desired test signals to and from each electronic component 12 via the permanent pin contact 64, contact pin 62 and contact pad 50 of the spring contact 46. The test protocol controller 28 is configured to activate one or more of a series of preselected testing protocols on the electronic components 12, while the die 16 or unit under test is positioned on the testing mounting table 40 by the handler assembly 26. The test protocol controller 28 may include without limitation, a digital power supply (DPS); a parametric measurement unit (PMU); and arbitrary wave form generator (AWG); and/or digital I/O.
The MEMS based test interface board 36 is most preferably configured to accommodate test interface circuits usually required to perform functional tests on high speed analog and RF circuits. The test interface board 36 as compared to conventional device interface boards, provides necessary means for fault detection at the die level. This enables manufacturers to detect electronic component faults at the die level, before packing and/or assembly on circuit boards. Therefore, the cost of packaging, which is frequently a major portion of the overall cost of current fabrication, may be virtually eliminated, a) Spring Contact
A preferred MEMS based construction of spring contacts 46 used in the ATE 10 is shown best in Figures 7 and 8. In a most preferred construction, the spring contacts 46 have a square geometry with a length and width dimension of about 100 χ 100 μηι. Each spring contact 46 includes a rectangular central conductive metal pad 50, and which is supported in a central area of the elastically deformable sling assembly 52. Preferably, the contact pad 50 has width and length dimensions of about 40 χ 40 μηι, and a height thickness of about 5 to 30 μιη, and preferably 10 μιη. The contact pad 50 is supported about its edge periphery only by the sling lattice 54, and which consists of eight integrally formed silicone beams of generally equal length. The sling lattice 54 is in turn suspended within the test interface board apertures along opposing edges by edge sling supports 56a,56b (Figure 10). The sling assembly 52 is configured so that when unbiased, the contact pad 50 is maintained in a raised position spaced above associated contact pin 62, with the silicone lattice 54 maintaining symmetrical pressure around the contact pad 50. The spring contact 46 is most preferably formed so as to satisfy the following criteria: (a) a flat top surface of the contact pad 50 provides larger contact area to minimize the contact resistance with the electronic component 12; (b) low contact force; (c) small area to be matched with the die contact pins 52; (d) negligible shear; and (e) reliable elastic performance.
The yield strength of the sling assembly 52 is defined by the stress where a material begins to deform plastically. Plasticity is the deformation of a material undergoing nonreversible permanent change in response to applied load. Because of its high stress yield, silicone is selected as a preferred supporting material. Skin effect is the tendency of AC currents to flow near the surface of the conductor. The distance below the surface where the current density becomes 1/e of its value at the surface is called the skin depth, and it is given
Figure imgf000018_0001
where P is the resistivity of conductor, ω = / is the angular frequency in radians/second, and
* = absolute magnetic permeability of conductor, M— V- aPr where
μ 0 = 4ιτ x
is the permeability of free space and r is the relative permeability of the conductor. At high frequency the effective resistance increases due to skin effect. For long, cylindrical conductors the AC resistance ^ is given by
Figure imgf000018_0002
where L and D are the length and the diameter of the conductor respectively. The approximation above is valid if D » δ. The AC resistance versus frequency for copper, gold, and aluminum was calculated up to 100 GHz as shown in Figure 9. Copper was selected as the preferred material for the contact pad 50 among different metals for its high tensile strength, good conductivity, and low skin effect.
A side perspective view of a contact spring 46 and electronic component 12 under test in the steady and deformed state are shown in Figures 10 and 11. The pressure load mass 70 positioned on top of the die 16 effects a pressing force against the spring contacts 46 of the removable interface receiver board 38 to maintain the connection during the test phase. The pressure load mass 70 is preferably minimized to keep the deformation of the contact springs 46 within the limits of material elasticity of the sling assembly 52 and away from the plasticity region,
(i) Simulation Results
Electromagnetic performance parameters and spice models for MEMS contact springs were extracted using the industry-standard tools HFSS™ and Q3DExtraxtor™.
The generalized lumped-element model for the transmission line from the ATE pin electronics to the unit under test contact pads is shown in Figure 12, wherein RDIB, C2, and L2 are the resistance, capacitance and inductance of the device interface board contact spring respectively. RCOntact, CI, C3, LI and L3 are the lumped parameters at PE/device interface board and the device interface board/die under test interfaces.
Simulation results indicate the performance difference between were compared for a typical strip-line 8cm long with the cross section of °·25 x °-04 mm , a coax-cable of 10 cm long with the cross section of °·13 * 0-i*™™ and a proposed MEMS device test interface board section providing electric connectivity between the automatic test equipment pin electronics and a component device under test contact pad using the spice extracted models. The input signal for the analysis carried out in this section was a sinusoidal waveform of one volt peak-to-peak. The AC responses for the three mentioned models are shown in Figure 13. The - 3dB bandwidth for the strip-line and the coax cable lie at 20 MHz and 70 MHz respectively, indicating that the input signals for both models are heavily attenuated beyond 100 MHz. This will limit the dynamic range of the test signals and can reduce the signal integrity and the signal to noise ratio considerably. The AC response of the MEMS interface shows drastic improvement over the conventional solutions. The -3dB bandwidth lies in the vicinity of 50 GHz which is higher than the bandwidth of currently available test channel by orders of magnitudes.
Figure 14 shows the transient response at 1 GHz for the three extracted models. The signal integrity is maintained for the contact spring while it is extremely degraded for both the strip-line and the coax cable; only at low frequencies less than 1 GHz the signal can be transmitted. Figure 15 shows the response for the contact spring at 50 GHz. The signal integrity can be preserved up to 50 GHz with little loss or distortion.
Table I and Table II present the extracted lumped parameters at 1.00 GHz and 50 GHz. The contact spring 46 of the present invention shows significantly lower values of parasitic capacitance and inductance as compared to the strip-line and the coax cable models. The proposed test interface board module also provides lower path resistance between the electrical component under test and the automatic test equipment resources. The lower resistance, capacitance and inductance values for the contact spring 46 allow the MEMS structure to operate at higher frequencies without the loss of signal integrity.
TABLE I
EXTRACTED PARAMETERS USING Q3DEXTRACTOR AT 1.0 GHz.
Figure imgf000020_0001
RAC m THE Q Inductance Capacitance
100χ100μηι-540μη long
Strip-Line
1.1 Ω 100 nH 1.87 pF
0.25x0.04mm-8cm long
Coax Cable
2.7 Ω 182 nH 2.53 pF
0.13x0.10mm- 15cm long
TABLE II
THE EXTRACTED PARAMETERS USING Q3DEXTRACTOR AT 50 GHz.
Figure imgf000021_0001
The foregoing construction establishes a viable test interface board module which is suitable for use in automatic test equipment 10 for the high speed testing of electronic components. The proposed MEMS based structure can reduce the physical separation between the die under test and the ATE resources by orders of magnitude due to its micro- scale sizes. The MEMS device test interface board 36 of the present invention avoids problem of undesired transmission line effects that limits the bandwidth of ATE test channels. The parasitic capacitances and inductances due to long wire traces in conventional test channels are reduced considerably allowing the MEMS test channels to operate at much higher frequencies. The MEMS device interface board test channels can operate up to 50 GHz while maintaining a high level of signal integrity. The proposed interface module can also provide a place for testing interface circuits to enhance the electrical performance of the tester during critical tests. Furthermore, the MEMS device test interface board 36 can be used to establish necessary test channels between a die under test and the ATE measurement instruments. Conducting test at the die 16 level reduces the cost of fabrication by detecting and removing faulty devices from the production line before the added expense of packaging.
It is to be appreciated that the present invention may be provided as a stand alone test interface module. More preferably however a number of the high speed test interface modules are incorporated into a test table 40 for the precision testing of electronic components including without restriction advanced micro-processors, PC chipsets and graphics, disk drives, video game devices, system on a chip (SiP), memory, baseband digital, network and broadband devices.
While the preferred embodiment describes and illustrates the spring contact 46 as including silicone lattice as resiliently deformable pad support, the invention is not so limited. It is to be appreciated that different pad support constructions and/or materials may also be used and will now become readily apparent.
Although the detailed description describes and illustrates various preferred embodiments, the invention is not expressly limited to the preferred embodiments which are disclosed. Many variations and modifications will now appear to a person skilled in the art. For a definition of the invention, reference may be had to the appended claims.

Claims

We claim:
1. A mass interconnect system for use in automatic test equipment for concurrently testing of a plurality of electronic components of a unit under test, the interconnect system comprising:
the receiver module including a forward mounting surface, a plurality of contact pins being mounted on and extending forwardly from said mounting surface, the receiver module for electronic coupling to a controller activatable to provide electronic signals simulating at least one selected test condition to selected one of said contact pins,
a test interface module positionable adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting the unit under test in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive I/O pad and a resiliently deformable biasing member,
the I/O pad being engagable with an associated one of said electronic components when the unit under test is moved to the testing position, and selectively movable between an operating position, wherein said I/O pad is moved rearwardly towards the mounting surface into electrical contact with said associated contact pin, and rest position where the I/O pad is moved forwardly a distance spaced therefrom,
the resiliently deformable biasing member providing a threshold force to resiliently bias the I/O pad towards the rest position, and
an actuator selectively operable to effect a contact pressure between the I/O pad and the associated electronic component greater than the threshold force to move the I/O pad to the operating position and effect electrical communication between the electronic component, I/O pad and associated contact pin.
2. The mass interconnected system of claim 1 , wherein the resiliently deformable biasing member includes a generally planar polygonally-shaped deformable support lattice, the I/O pad being mounted to said support.
3. The mass interconnected system of claim 1 , wherein the biasing assembly includes a generally square deformable support lattice, the lattice including a plurality of silicone cross-members, in the rest position, the support lattice being spaced from said mounting surface by one or more peripheral shoulder members, and wherein the I/O pad being mounted towards a central portion of said support lattice.
4. The mass interconnected system of claim 2 or claim 3, wherein the support lattice has length and width dimensions selected at between about 25 and 200 microns, and more preferably between about 75 and 125 microns.
5. The mass interconnected system of any one of claims 1 to 4, wherein the I/O pad is provided with a generally square cross-sectional shape and has a width and length dimensions selected at between about 20 and 100 microns, and more preferably between about 30 to 50 microns.
6. The mass interconnected system of any one of claims 1 to 5, wherein the I/O pad is a conductive metal pad having a height in a forward direction selected at between about 5 and 50 microns, and preferably about 7 to 15 microns.
7. The mass interconnected system of any one of claims 1 to 6, wherein said contact pins are mounted to said mounting surface in a generally equispaced polygonal array.
8. The mass interconnect system as claimed in any one of claims 1 to 7, wherein the receiver module further includes a seating surface rearward from said mounting surface, a plurality of electrically conductive contact pads being disposed on said seating surface.
9. The mass interconnected system as claimed in claim 8, wherein the automatic test equipment further includes a receiver housing, the receiver module being releasably coupled to the receiver housing, the receiver housing including a receiver module interface comprising a pin electronics array electrically connectable with at least some of said contact pads when said receiver module is coupled thereto.
10. The mass interconnected system as claimed in any one of claims 1 to 9, wherein the test interface module is detachably connectable to said receiver module, at least one of the test interface module and the receiver module including guide members for aligning the test interference module spring contacts with the corresponding contact pin when connecting the test interface module to the receiver module.
1 1. The mass interconnected system as claimed in any one of claims 1 to 10, including a plurality of said test interface modules, each of said test interface module having a modular interchangeable construction configured for selective electronic coupling and decoupling with said receiver module.
12. A mass interconnect system for use in automatic test equipment for effecting a selected test of an electronic component of a unit under test, the interconnect system comprising: a receiver module electronically coupled to a controller activatable to provide electric signals correlated to the selected test, the receiver module including a forward mounting surface, and a plurality of contact pins being mounted on and extending forwardly from said mounting surface,
a test interface module positioned adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting the unit under test in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive pad and a resiliently deformable pad support,
the conductive pad being engagable with said electronic component when the device under test is in the testing position, the conductive pad being movable from a rest position, where the conductive pad is moved forwardly to a position spaced from the associated contact pin, and an operating position, where said conductive pad is moved towards the mounting surface and into electrical contact with said associated contact pin,
the resiliently deformable pad support resiliently biasing the contact pad towards the rest position, and
an actuator assembly selectively operable to effect contact between the conductive pad and the electronic component to move the contact pad to the operating position and effect electrical communication between the electronic component, I/O contact pad and said associated contact pin.
13. The mass interconnected system as claimed in claim 12, the pad support includes a generally planar square lattice, the lattice secured in a position spaced from said mounting surface by at least one peripheral shoulder member, and wherein the contact pad is secured towards a central portion of said lattice.
14. The mass interconnected system as claimed in claim 13, wherein the lattice comprises a plurality of silicone cross-members.
15. The mass interconnected system as claimed in claim 3 or claim 14, wherein the lattice has length and width dimensions selected at between about 25 and 200 microns, and preferably about 75 to 125 microns, the contact pad comprises a conducting pad having width and length dimension selected at between about 20 and 100 microns, and more preferably about 30 to 50 microns.
16. A test interface module for use in a mass interconnect system for electronic component testing, the mass interconnect system including a receiver module electronically connectable to and activatable to provide electric signals correlated to a selected component test, the receiver module including a forward mounting surface, and a plurality of contact pins extending forwardly relative to said mounting surface,
the test interface module positionable adjacent to the forward mounting surface of the receiver module, the test interface module having a support surface for supporting a unit under test comprising a plurality of electronic components to be tested in a testing position thereon, the support surface including a plurality of spring contacts associated with a corresponding contact pin, the spring contacts comprising a conductive pad and a resiliently deformable support,
at least one of said conductive pad being engagable with an associated one of said electronic components when the unit under test is in the testing position, the conductive pad being movable between a rest position, where the conductive pad is moved to a position spaced from the associated contact pin, and an operating position, where said conductive pad is moved towards the mounting surface and into electrical contact with said associated contact pin, and an operating position, wherein said conductive pad is moved into electrical communication with an associated contact pin,
the deformable support resiliently biasing the contact pad towards the rest position, and whereby the conductive pad is movable from the rest position to the operating position on the application of a predetermined threshold force to the unit under test, to effect electrical communication between the electronic component, the contact pad and the associated contact pin.
17. The test module as claimed in claim 16, wherein the deformable support includes a generally planar deformable lattice, the contact pad being secured to a generally central portion of said lattice.
18. The test interface module as claimed in claim 16 or claim 17, wherein the lattice includes a plurality of silicone support members.
19. The test interface module as claimed in claim 17 or claim 18, wherein the lattice has length and width dimensions selected at between about 25 and 250 microns, and preferably about 75 to 125 microns, and the contact pad having a width and length dimension selected at between about 20 and 150 microns, and more preferably about 30 to 50 microns.
20. The test interconnected system as claimed in any one of claims 16 to 19, wherein the test interface module has a modular interchangeable construction configured for selective electronic coupling and decoupling with said receiver module.
PCT/CA2012/000214 2011-03-21 2012-03-07 Apparatus for the automated testing and validation of electronic components WO2012126087A1 (en)

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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014130074A1 (en) * 2013-02-21 2014-08-28 Advantest Corporation Gui implementations on central controller computer system for supporting protocol independent device testing
TWI550629B (en) * 2013-02-21 2016-09-21 愛德萬測試股份有限公司 A test architecture having multiple fpga based hardware accelerator blocks for testing multiple duts independently
US9810729B2 (en) 2013-02-28 2017-11-07 Advantest Corporation Tester with acceleration for packet building within a FPGA block
US9952276B2 (en) 2013-02-21 2018-04-24 Advantest Corporation Tester with mixed protocol engine in a FPGA block
US10161993B2 (en) 2013-02-21 2018-12-25 Advantest Corporation Tester with acceleration on memory and acceleration for automatic pattern generation within a FPGA block
US10288681B2 (en) 2013-02-21 2019-05-14 Advantest Corporation Test architecture with a small form factor test board for rapid prototyping
US10884847B1 (en) 2019-08-20 2021-01-05 Advantest Corporation Fast parallel CRC determination to support SSD testing
US10976361B2 (en) 2018-12-20 2021-04-13 Advantest Corporation Automated test equipment (ATE) support framework for solid state device (SSD) odd sector sizes and protection modes
US11137910B2 (en) 2019-03-04 2021-10-05 Advantest Corporation Fast address to sector number/offset translation to support odd sector size testing
US11237202B2 (en) 2019-03-12 2022-02-01 Advantest Corporation Non-standard sector size system support for SSD testing

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103477237B (en) * 2011-03-21 2016-03-02 温莎大学 The device of automatic test and checking electronic component
US9658972B1 (en) * 2012-11-20 2017-05-23 Mac Panel Company Universal pull-through receiver
DE102013100700B3 (en) * 2013-01-24 2014-05-15 Infineon Technologies Ag Method of manufacturing semiconductor device module, involves inserting terminal free ends into contact holes of a board and introducing adjusting device relative to carrier in different relative positions by sliding board on terminals
DE102013100701B4 (en) 2013-01-24 2022-07-21 Infineon Technologies Ag SEMICONDUCTOR MODULE ARRANGEMENT AND METHOD FOR MANUFACTURING A SEMICONDUCTOR MODULE ARRANGEMENT
US9726718B2 (en) * 2014-05-30 2017-08-08 Skyworks Solutions, Inc. Modular test fixture
TWI547792B (en) * 2014-09-11 2016-09-01 Motech Taiwan Automatic Corp Electronic device test module of the opening and closing device (a)
CN106715058A (en) 2014-09-26 2017-05-24 泰拉丁公司 Grasping gripper
CN104316859A (en) * 2014-11-06 2015-01-28 山东华芯半导体有限公司 Chip testing equipment with high universality
US9885748B2 (en) 2015-06-09 2018-02-06 International Business Machines Corporation Module testing utilizing wafer probe test equipment
KR101683018B1 (en) * 2015-07-03 2016-12-07 주식회사 오킨스전자 Test board having contact rubber and Burn-in test socket using the same
KR102656451B1 (en) * 2016-03-18 2024-04-12 (주)테크윙 Handler for testing electronic components
CN206096201U (en) * 2016-07-21 2017-04-12 梁永焯 A system, tangent line probe card for test of semiconductor wafer and probe subassembly thereof
CN108254637A (en) * 2016-12-29 2018-07-06 北京铁路信号有限公司 A kind of coupling decoupling network
US20190011497A1 (en) * 2017-07-09 2019-01-10 Texas Instruments Incorporated Test Fixture with Sintered Connections Between Mother Board and Daughter Board
CN107543994A (en) * 2017-08-31 2018-01-05 华勤通讯技术有限公司 The test system of Type C interface
CN108100991A (en) * 2017-11-29 2018-06-01 北京航天控制仪器研究所 Chip quality detection method, apparatus and system on a kind of MEMS air flow meters wafer
US11131718B2 (en) * 2018-07-24 2021-09-28 Astee International Limited Systems and methods for automated testing of power supply units
CN109188255B (en) * 2018-10-26 2019-08-23 南通深南电路有限公司 Control method, test device and the storage medium of pcb board test device
CN109188161B (en) 2018-11-06 2020-07-31 苏州电器科学研究院股份有限公司 Capacitor detection equipment and detection method thereof
EP3687271A1 (en) * 2019-01-25 2020-07-29 Mycronic AB Eletrical verification of electronic components
US11187746B2 (en) * 2019-03-26 2021-11-30 Nuvoton Technology Corporation Contact quality testing
US11011249B2 (en) * 2019-08-21 2021-05-18 Nvidia Corporation Concurrent testing of a logic device and a memory device within a system package
CN111259581B (en) * 2020-01-10 2024-02-27 浪潮商用机器有限公司 Pressure contact type conductive contact failure connection detection method, device and medium
CN111880019A (en) * 2020-08-19 2020-11-03 江苏云意电气股份有限公司 High-power diode low-frequency noise test system for multi-way vehicle
CN112034327B (en) * 2020-08-29 2023-04-28 湖北龙腾电子科技股份有限公司 Flexible circuit board test switching device for electric connector
US11940478B2 (en) 2020-12-07 2024-03-26 Duke University Electronic device characterization systems and methods
KR102558862B1 (en) * 2021-06-01 2023-07-24 주식회사 아이에스시 Test socket

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1837830A (en) * 2005-03-22 2006-09-27 旺矽科技股份有限公司 Elastic micro-contact element and manufacturing method thereof
US20070152687A1 (en) * 2005-12-30 2007-07-05 Advanced Semiconductor Engineering Inc. Mems probe card with elastic multi-layer structure
WO2010104913A1 (en) 2009-03-10 2010-09-16 Johnstech International Electrically conductive pins for microcircuit tester

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3142112A (en) * 1960-03-30 1964-07-28 Hughes Aircraft Co Method of making an electrical interconnection grid
US4774462A (en) * 1984-06-11 1988-09-27 Black Thomas J Automatic test system
US4799006A (en) * 1987-06-11 1989-01-17 Augat Inc. ATE test fixture having a self-sealing vacuum skirt
US5098311A (en) * 1989-06-12 1992-03-24 Ohio Associated Enterprises, Inc. Hermaphroditic interconnect system
US5633598A (en) * 1993-06-23 1997-05-27 Everett Charles Technologies, Inc. Translator fixture with module for expanding test points
US5450017A (en) * 1993-12-03 1995-09-12 Everett Charles Technologies, Inc. Test fixture having translator for grid interface
US5945837A (en) * 1995-10-10 1999-08-31 Xilinx, Inc. Interface structure for an integrated circuit device tester
US6181149B1 (en) * 1996-09-26 2001-01-30 Delaware Capital Formation, Inc. Grid array package test contactor
US6690185B1 (en) * 1997-01-15 2004-02-10 Formfactor, Inc. Large contactor with multiple, aligned contactor units
JP4060919B2 (en) * 1997-11-28 2008-03-12 富士通株式会社 Electrical connection device, contact manufacturing method, and semiconductor test method
US6468098B1 (en) * 1999-08-17 2002-10-22 Formfactor, Inc. Electrical contactor especially wafer level contactor using fluid pressure
US6686732B2 (en) * 2001-12-20 2004-02-03 Teradyne, Inc. Low-cost tester interface module
AU2003223783A1 (en) * 2002-04-29 2003-11-17 Silicon Pipe, Inc. Direct-connect signaling system
US6744267B2 (en) * 2002-07-16 2004-06-01 Nptest, Llc Test system and methodology
US6747447B2 (en) * 2002-09-25 2004-06-08 Advantest Corporation Locking apparatus and loadboard assembly
WO2004093252A2 (en) 2003-04-11 2004-10-28 Neoconix, Inc. Electrical connector and method for making
US7244125B2 (en) * 2003-12-08 2007-07-17 Neoconix, Inc. Connector for making electrical contact at semiconductor scales
JP2005129428A (en) * 2003-10-27 2005-05-19 Sumitomo Electric Ind Ltd Manufacturing method for telescopic contact, contact manufactured by the method and inspection device or electronic instrument provided with the contact
US7362089B2 (en) * 2004-05-21 2008-04-22 Advantest Corporation Carrier module for adapting non-standard instrument cards to test systems
US7301326B1 (en) * 2004-07-13 2007-11-27 Intest Corporation Modular interface
US7180321B2 (en) * 2004-10-01 2007-02-20 Teradyne, Inc. Tester interface module
US20060139017A1 (en) * 2004-12-28 2006-06-29 Peiffer Ronald J Interface circuit for electronic test system
US7439731B2 (en) * 2005-06-24 2008-10-21 Crafts Douglas E Temporary planar electrical contact device and method using vertically-compressible nanotube contact structures
US7616036B1 (en) * 2005-09-12 2009-11-10 Virage Logic Corporation Programmable strobe and clock generator
US7262615B2 (en) * 2005-10-31 2007-08-28 Freescale Semiconductor, Inc. Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections
US8102184B2 (en) * 2006-01-17 2012-01-24 Johnstech International Test contact system for testing integrated circuits with packages having an array of signal and power contacts
SG134271A1 (en) * 2006-01-17 2007-08-29 Jeffrey C Sherry Test contact system for testing integrated circuits with packages having an array of signal and power contacts
CN101059550A (en) * 2006-01-17 2007-10-24 约翰国际有限公司 Test contact system for testing integrated circuits with packages having an array of signal and power contacts
US20080106294A1 (en) * 2006-11-02 2008-05-08 Stephen William Smith Apparatus and method for universal connectivity in test applications
US7667466B2 (en) * 2007-01-31 2010-02-23 Benchmark Electronics Target tester interface
US20080238461A1 (en) * 2007-04-02 2008-10-02 Ken Skala Multi-type test interface system and method
US7518357B2 (en) * 2007-04-12 2009-04-14 Chroma Ate Inc. Test circuits of an apparatus for testing micro SD devices
US7733081B2 (en) * 2007-10-19 2010-06-08 Teradyne, Inc. Automated test equipment interface
US8884639B2 (en) * 2008-08-27 2014-11-11 Advantest (Singapore) Pte Ltd Methods, apparatus and articles of manufacture for testing a plurality of singulated die
US7936172B2 (en) * 2008-09-30 2011-05-03 Honeywell International Inc. Automatic test equipment self test
CN103477237B (en) * 2011-03-21 2016-03-02 温莎大学 The device of automatic test and checking electronic component
US8740654B2 (en) * 2011-08-15 2014-06-03 Philip Anthony Sedberry, JR. Flexible organizational connect

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1837830A (en) * 2005-03-22 2006-09-27 旺矽科技股份有限公司 Elastic micro-contact element and manufacturing method thereof
US20070152687A1 (en) * 2005-12-30 2007-07-05 Advanced Semiconductor Engineering Inc. Mems probe card with elastic multi-layer structure
WO2010104913A1 (en) 2009-03-10 2010-09-16 Johnstech International Electrically conductive pins for microcircuit tester

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP2689259A4 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014130074A1 (en) * 2013-02-21 2014-08-28 Advantest Corporation Gui implementations on central controller computer system for supporting protocol independent device testing
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US9952276B2 (en) 2013-02-21 2018-04-24 Advantest Corporation Tester with mixed protocol engine in a FPGA block
US10161993B2 (en) 2013-02-21 2018-12-25 Advantest Corporation Tester with acceleration on memory and acceleration for automatic pattern generation within a FPGA block
US10162007B2 (en) 2013-02-21 2018-12-25 Advantest Corporation Test architecture having multiple FPGA based hardware accelerator blocks for testing multiple DUTs independently
US10288681B2 (en) 2013-02-21 2019-05-14 Advantest Corporation Test architecture with a small form factor test board for rapid prototyping
US9810729B2 (en) 2013-02-28 2017-11-07 Advantest Corporation Tester with acceleration for packet building within a FPGA block
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US10884847B1 (en) 2019-08-20 2021-01-05 Advantest Corporation Fast parallel CRC determination to support SSD testing

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CA2829986A1 (en) 2012-09-27
EP2689259A4 (en) 2014-12-17
KR20140020967A (en) 2014-02-19
CN103477237B (en) 2016-03-02
US9261533B2 (en) 2016-02-16
EP2689259A1 (en) 2014-01-29
CA2829986C (en) 2015-02-10
US20140062516A1 (en) 2014-03-06
JP2014508944A (en) 2014-04-10
CN103477237A (en) 2013-12-25

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