CN101059550A - Test contact system for testing integrated circuits with packages having an array of signal and power contacts - Google Patents

Test contact system for testing integrated circuits with packages having an array of signal and power contacts Download PDF


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CN101059550A CN 200710087990 CN200710087990A CN101059550A CN 101059550 A CN101059550 A CN 101059550A CN 200710087990 CN200710087990 CN 200710087990 CN 200710087990 A CN200710087990 A CN 200710087990A CN 101059550 A CN101059550 A CN 101059550A
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contact element
test contact
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CN 200710087990
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A test contact element for making temporary electrical contact with a microcircuit terminal comprises at least one resilient finger projecting from an insulating contact membrane as a cantilevered beam. The finger has on a contact side thereof, a conducting contact pad for contacting the microcircuit terminal. Preferably the test contact element has a plurality of fingers, where each finger is defined at least in part by two radially oriented slots in the membrane that mechanically separate each finger from every other finger of the plurality of fingers forming the test contact element. A plurality of the test contact elements can form a test contact element array comprising with the test contact elements arranged in a predetermined pattern. A plurality of connection vias preferably in an interface membrane are arranged in substantially the predetermined pattern of the test contacts elements, with each of said connection vias is aligned with one of the test contact elements. The connection vias may have a cup shape with an open end, with the open end of the cup-shaped via contacting the aligned test contact element. The contact and interface membranes may be used as part of a test receptacle including a load board on which individual microcircuit s are mounted for testing.


带有信号和电力触点阵列的用于测试封装集成电路的测试触点系统 Test system with signal contacts and power contacts used for testing an array of packaging integrated circuits

相关申请的交叉引用这是符合35U.SC第111(a)条的正式申请,并根据35U.SC第119(e)(1)条声明享有于2006年1月17日根据35U.SC第111(b)条提交的临时申请序列号为60/759,459的文件的优先权。 Cross-Reference to Related Applications This is in line 35U.SC section 111 (a) formal application bar and enjoy 35U.SC according to section 119 (e) (1) of Article statement on January 17, 2006 in accordance with section 111 35U.SC provisional application serial No. (b) is a priority document under Article 60 / 759,459 in.

背景技术 Background technique

本发明涉及对用于测试微电路的设备的改进。 The present invention relates to improvements in apparatus for testing a microcircuit. 微电路的制造工艺不能保证每个微电路都完全可使用。 Microcircuit manufacturing process to ensure that each microcircuit are not fully used. 单独的微电路尺寸是极微小的,且工艺步骤非常复杂,因此,制造工艺中很小或细微的疏忽都会导致器件有缺陷。 Separate microcircuit microscopic size, and the process steps are very complicated, and therefore, the manufacturing process is small or minor negligence will result in defective devices.

在电路板上安装有缺陷的微电路会付出相对高的代价。 A circuit board mounted defective microcircuit will pay a relatively high price. 安装通常包括将微电路焊接到电路板上。 Installation generally comprises soldering to a circuit board microcircuit. 一旦安装在电路板上,由于第二次熔化焊料的过程会损坏电路板,因此将微电路移除会产生许多问题。 Once installed on the circuit board, the molten solder since the second process can damage the circuit board, thereby to remove the microcircuit will have many problems. 这样,如果微电路是有缺陷的,电路板本身也可能损坏,这意味着至此附加到电路板上的全部价值都将丧失。 Thus, if the microcircuit is defective, the circuit board itself may be damaged, which means that so far attached to the circuit board full value will be lost. 由于所有这些原因,微电路在安装到电路板上之前,通常都要经过测试。 For all these reasons, the microcircuit is mounted to the circuit board prior to, typically are tested.

每个微电路都必须以这样的方式经过测试,即能够识别出所有有缺陷的器件,而又不会不正确地将良好的器件识别为有缺陷。 Each microcircuit must undergo testing in such a manner, i.e., able to identify all defective devices, but does not good device correctly identified as defective. 两种错误中的任何一个如果频繁发生,都将显著增加电路板制造工艺的总成本。 Any one of, if two errors occur frequently, will significantly increase the total cost of the circuit board manufacturing process.

微电路测试设备本身是非常复杂的。 Microcircuit testing device itself is very complicated. 首先,测试设备必须与每个间隔很近的微电路触点实现精确的且低电阻的短暂性和非破坏性电接触。 First, the test equipment must be accurate and low resistance contact with the microcircuit of each transient closely spaced electrical contact and non-destructive. 由于微电路触点和它们之间的间隔尺寸都很小,因此,即使是进行接触中很小的误差也会导致错误的连接。 Since the size of the micro-circuit contact and spacing between them are small, and therefore, even if the contact is very small errors can lead to errors in the connections. 与微电路的连接未对准或其他的错误会使测试设备将被测器件(device under test,DUT)识别为有缺陷,即使这种现象是由于测试设备和DUT之间的电连接存在缺陷,而不是由于DUT本身存在缺陷。 Connected to the microcircuit misalignment or other errors in the test device will cause the device under test (device under test, DUT) identified as defective, even if this phenomenon is due to the presence of defective electrical connection between the DUT and the test equipment is connected, rather than flawed due to the DUT itself.

微电路测试设备中的另一个问题出现在自动测试中。 Another problem microcircuit testing device occurs automatically in the test. 测试设备一分钟可以测试100个器件,甚至更多。 One minute test equipment can test the device 100, or even more. 单就测试数量而言,会造成在测试期间与微电路端子进行电连接的测试设备触点的磨损。 Solely on the number of tests, it can cause wear test apparatus electrically connected to the contacts of the microcircuit terminal during testing. 这种磨损会从测试设备触点和DUT端子处磨落导电碎屑,从而污染测试设备和DUT本身。 Such wear debris will wear off from the conductive contact and the test equipment at the DUT terminal, thus contaminating the DUT and the test equipment itself.

该碎屑最终会导致测试期间电连接不良以及错误指示DUT为有缺陷。 The debris will eventually lead to poor electrical connection during testing and error indication DUT is defective. 附着到微电路上的碎屑可能导致组件故障,除非从微电路中去除碎屑。 Attached to the microcircuit debris may cause component failure, unless the removal of debris from the microcircuit. 去除碎屑会增加成本,并且会引入微电路本身的另一缺陷源。 Removing debris will increase the cost, and introduces a further source of defects microcircuit itself.

也有其他考虑。 There are also other considerations. 能够良好工作的廉价测试设备触点是有利的。 Able to work well in low-cost test equipment contacts are beneficial. 尽可能缩短更换触点所需的时间也很重要,因为测试设备很昂贵。 As far as possible to shorten the time required to replace the contact is also very important, because the test equipment is very expensive. 如果测试设备由于正常维护而长时间离线,测试单独微电路的成本将增加。 If the test equipment maintenance time due to normal offline, the cost of testing increases separate microcircuit.

目前使用的测试设备的测试触点阵列模仿微电路端子阵列的图案。 Test contact array patterns mimic the microcircuit terminal array test equipment currently used. 该测试触点阵列支撑在应能够精确地保持触点间的相互对准的结构上。 The test should be supported in contact array can be accurately aligned with each other on the holding structure between the contacts. 一对准模板或板将微电路本身和测试触点对准。 Aligning a template or plate microcircuit itself and test contacts are aligned. 该测试触点和对准板安装在具有导电焊盘的承载板上,该导电焊盘与测试触点电连接。 The test contacts and the alignment plate is mounted on the carrier plate having a conductive pad, the conductive pad is electrically connected to the test contact. 该承载板的焊盘与电路连接,该电路载送测试设备电子电路和测试触点之间的信号和电力。 Pad with the circuit board is connected to the carrier, carrying the signal and power circuit between the test equipment and electronics test contacts.

“Kelvin”测试是指每个微电路端子接触两个测试触点的工艺。 "Kelvin" refers to the process of testing each terminal contacts two test contacts of the microcircuit. 测试程序的预备部分是测量两个测试触点之间的电阻。 Preliminary part of the test procedure is the resistance measured between the two test contacts. 如果该值很高,则两个测试触点中的一个或两个都没有实现与微电路端子的良好电接触。 If this value is high, then one or both of the two test contacts are not achieved in good electrical contact with a microcircuit terminal. 如果该界面处可能的高电阻会影响微电路性能的实际测试精确性,可根据测试协议中的条款处理该问题。 If the actual test the accuracy of high resistance at the interface may affect the performance of the microcircuit, this problem may be processed in accordance with the terms of the test protocol.

在附图中示出的各种部件的形状因子不是按比例给出的,这样可以使读者更容易理解本发明。 In the drawings, the shape factor of the various components are not shown to scale analysis, so that the reader may more readily understand the invention. 该说明书在相关或有助于说明的地方给出代表性的尺寸。 The description given in the relevant representative size or local help illustration. 通常在安装前被测试的特殊类型的微电路具有封装或外壳,该封装或外壳具有通常被称为球栅阵列(ball grid array,BGA)的端子排列方式。 Usually tested special type of package or housing having a microcircuit prior to installation of the package or housing having a terminal arrangement is commonly referred to as ball grid array (ball grid array, BGA) a. 图1和2示出微电路10的BGA封装类型的例子。 1 and FIG. 2 shows an example of a BGA package type of microcircuit 10. 这类封装的形状可以是一侧为1.5cm数量级且厚度为1mm的平矩形块。 Such a shape of the package may be a side of the order of 1.5cm and a thickness of 1mm flat rectangular block.

图1示出具有外壳13的微电路10,其中外壳13将实际的电路封闭在内。 FIG 1 shows microcircuit 10 with a housing 13, which housing 13 is closed, including the actual circuit. 信号和电力(signal and power,S&P)端子20位于外壳13的两个较大平面中的一个上,即表面14上。 Signal and power (signal and power, S & amp; P) terminals on the two large plane 20 is located in a housing 13, i.e., the upper surface 14. 信号和电力(S&P)端子20围绕表面14上的一突起物16。 Signal and power (S & amp; P) terminals 20 surround a projection 16 on the surface 14. 典型地,端子20占据表面14的边缘和间隔物16之间的大部分区域,而不是只有图1中所示的一部分区域。 Typically, terminals 20 occupy most of the area between the edge and the surface 14 of the spacer 16, rather than part of the region is only shown in FIG.

图2示出当端子20随表面14出现在边缘上时放大的侧视图或正视图。 Figure 2 shows a side view with the surface 20 when the terminal 14 appears at the upper edge or an enlarged elevational view. 每个端子20都包括很小的且近似为球形的焊球,该焊球牢固地附着在穿透表面14的内部电路的引线上,因此被称为“球栅组件”。 Each terminal 20 includes a small and approximately spherical solder balls, the solder balls penetrate firmly attached on the lead surface 14 of the internal circuit, so called "ball grid assembly." 图2示出每个端子20比间隔物16从表面14伸出更远的一小段距离。 Figure 2 shows a short distance of each terminal 20 projects from the spacer 16 to the surface 14 farther. 在装配期间,所有端子20同时熔化,并附着到之前在电路板上形成的适当定位的导体上。 During assembly, all terminals 20 are simultaneously melted, and adhere to suitably located conductors previously formed on the circuit board.

端子20彼此之间可以很靠近。 Terminal 20 can be close to each other. 一些中心线的间距最小达0.5mm,并且即使对于间隔相对较宽的端子20,仍有大约1.5mm的间隔。 Some of the minimum centerline spacing 0.5mm, and even for relatively wide spaced terminals 20 are still approximately 1.5mm intervals. 相邻的端子20之间的间距经常被称为“节距”。 The spacing between adjacent terminals 20 is often referred to as "pitch."

除上述因素外,BGA微电路测试还涉及其他因素。 In addition to these factors, BGA microcircuit further relates to test other factors. 在与球形端子20短暂接触时,测试设备不应刮擦与电路板接触的S&P端子表面或在其上作标记,因为这样的标记可能影响那个端子的焊接接缝的可靠性。 Upon brief contact with the ball terminals 20, the test equipment should not be S & amp scraper in contact with the circuit board; P or the terminal surface on which the mark, because such markers that may affect the terminal solder joint reliability.

其次,如果载送信号的导体的长度保持很短,测试工艺会更加精确。 Second, if the length of the conductor carrying the signal is kept short, the test process will be more accurate. 理想的测试触点布置应具有较短的信号路径。 Over the test contact arrangement should have a shorter signal path.

再次,出于环境的考虑,BGA端子目前通常使用的焊料主要是锡。 Again, due to environmental considerations, BGA solder terminals commonly used today, mainly tin. 锡基焊料合金可能在外表面上形成导电性差的氧化膜。 Poorly conductive oxide film is a tin-based solder alloy may be formed on the outer surface. 过去的焊料合金中含有大量的不形成氧化膜的铅。 Past solder alloy containing a large amount of lead oxide film is not formed. 测试触点必须能够穿过存在的氧化膜。 Test contacts must be able to pass through the oxide film is present.

现有技术中公知和使用的BGA测试触点使用由多部件组成的弹簧销,包括弹簧、主体以及顶插棒和底插棒。 It is well known in the prior art and used in BGA test contacts using a spring member composed of a multi-pin, comprising a spring body and a top end of the plunger and the plunger.


用于与微电路端子短暂电接触的测试触点元件,包括至少一作为悬臂梁从绝缘接触薄膜伸出的弹性爪指。 Test contact element for contacting the microcircuit terminal is electrically short, comprising at least one elastic cantilever beam protruding from the insulating film as the contact fingers. 该爪指在其一接触侧具有用于与微电路端子接触的导电性触点焊盘。 The fingers and having a conductive contact pad of the microcircuit terminal contacts on one contact side.

优选地,该测试触点元件具有多个爪指,这些爪指可具有饼形这一有利的布局。 Preferably the test contact element has a plurality of fingers, the fingers may have a pie-shaped arrangement of the advantageous. 在这种布局中,每个爪指至少部分地由薄膜中的两个径向槽限定,这两个槽将每个爪指和形成测试触点元件的多个爪指中的其他每个机械地间隔开。 In this arrangement, each of the fingers at least partially defined by two radial slots in the film, each of the two grooves formed fingers and other fingers of each mechanical test contact element of the plurality of pawls spaced.

多个测试触点元件可以形成测试触点元件阵列,该阵列包括按预定图案布置的测试触点元件。 A plurality of test contact elements can form a test contact element array, the array comprising the test contact elements arranged in a predetermined pattern. 多个连接旁路孔基本上按测试触点元件的预定图案布置,其中每个所述连接旁路孔与一测试触点元件对准。 Connecting a plurality of bypass holes in a predetermined pattern substantially contact the test element arrangement, wherein each of said bypass hole is connected with a test contact element is aligned. 优选地,由界面薄膜支撑预定图案中的多个连接旁路孔。 Preferably, a plurality of interface membrane supporting the predetermined pattern is connected bypass hole.

该连接旁路孔可以是具有一开口端的杯形,且该杯形旁路孔的开口端接触对准的测试触点元件。 The connection may be a bypass hole having a cup-shaped open end, the open end of the cup and bypass the contact hole aligned test contact element. 在测试设备上装卸DUT时产生的碎屑可通过测试触点元件落下,并在杯形旁路孔中积存。 Loading debris generated when the DUT on the test device via the test contact element falls and accumulates in the cup-shaped bypass hole.

接触薄膜和界面薄膜可以用作包括承载板的测试容器的一部分。 Contacting the thin film and used as part of the interface membrane may include a test vessel carrier plate. 该承载板具有多个基本上按测试触点元件的预定图案布置的连接焊盘。 The carrier plate having a plurality of connection pads in a predetermined pattern substantially contact the test element arrangement. 该承载板支撑界面薄膜,且承载板上的每个连接焊盘都基本上与一连接旁路孔对准,并与其电接触。 Each interface is connected to the carrier plate supports the film, the pads and the carrier plate are connected to a bypass hole substantially aligned and in electrical contact therewith.

本发明使用具有保持性的非常薄的导电板,该导电板附着在非常薄的非导电性绝缘体上。 The present invention uses a conductive plate having a very thin retentive, the conductive plate is attached on a very thin non-conductive insulator. 该器件的金属部分提供位于接触I/O和承载板之间的多个接触点或路径。 Providing a metal part of the device located at multiple contact points or paths between the contacting I / O and carrier plate. 这可以由电镀通孔外壳、电镀贯通旁路孔或凸起表面实现,且可能与弹簧结合;且第一表面与第二表面(即I/O器件)接触。 This housing is made of plated through-holes, plated through-holes or convex surface to achieve bypass, and possibly in combination with the spring; and contacting the first and second surfaces (i.e., I / O devices).

本发明将I/O器件放置在实体上靠近承载板的位置,由此提高电性能。 The present invention I / O devices physically placed in a position close to the carrier plate, thereby improving electrical properties. 另外,本发明还具有灵活性,由此可用于手动和自动测试设备中。 Further, the present invention also has the flexibility, whereby for manual and automated test equipment.

在测试期间,本发明的结构在球形端子侧而不是将与电路板接触的末端提供抹拭功能,同时也提供非常好的电接触。 During the test, the end structure of the present invention in a terminal side than the spherical contact with the circuit board provides a wiping function, while also providing very good electrical contact. 该抹拭功能通常能够穿透端子20上存在的任何氧化层。 The wiping function usually any terminal capable of penetrating the oxide layer present on 20. 每个测试触点在接触面的中间都有一个孔,因此在测试期间不对端子20的末端作标记。 Each test contact has a contact surface in the middle of a hole, and therefore does not mark the end terminal 20 during testing. 这对易于产生较厚的氧化层的无铅端子尤其有利。 This is particularly advantageous for thick oxide layer is prone to lead-free terminals. 可使用弹簧对将测试触点元件与承载板连接起来的旁路孔进行改进,以允许使用没有共面端子的微电路封装,并提供Z轴柔度。 Spring can be used to test the shunt hole will contact elements connecting the carrier plate to improve, to allow microcircuit package is not coplanar terminals and to provide Z axis compliance.

本发明适用于具有密节距的端子20,并可容易用于与管芯或晶片的互联。 The present invention is applicable to a terminal having a 20 mil pitch, and can be easily used to interconnect to die or wafers. 这个构想成功地用于节距从1.27mm至0.5mm的端子。 The idea for the successful from the terminal pitch of 1.27mm to 0.5mm. 非导电材料将设计中的导电部件保持在恰当的位置,且将上述任意可选项上的封装、管芯以及I/O晶片对准。 The non-conductive material is a conductive member held in an appropriate design position, and the package can be any of the options on the die and the I / O wafer alignment.


图1是示出端子阵列的BGA微电路的立体图。 FIG. 1 is a perspective view showing a BGA microcircuit terminal array.

图2是BGA微电路的放大侧视图。 FIG 2 is an enlarged side view of a BGA microcircuit.

图3是具有DUT井的一部分测试设备的立体图,该DUT井用于盛放被测试的DUT。 FIG 3 is a perspective view of a portion of the test device wells DUT, the DUT well for containing DUT being tested.

图4是图3中测试设备的侧剖视图。 FIG 4 is a side sectional view of FIG. 3 of the test device.

图5是一部分测试触点阵列的实际放大的俯视图。 FIG 5 is an enlarged plan view of a portion of the actual test contact array.

图6是测试触点阵列的分解侧视图。 FIG 6 is an exploded side view of a test contact array.

图7是测试触点阵列的组装侧视图。 FIG 7 is an assembled side view of a test contact array.

图8是测试触点阵列的侧视图,其中球形端子位于测试触点上的测试位置。 FIG 8 is a side view of a test contact array, wherein the ball terminals located at the testing position on the test contacts.

图9是单一测试触点的另一放大俯视图,示出优选实施例的附加部件。 FIG 9 is another enlarged plan view of a single test contact showing additional components of the preferred embodiment.

图10是测试触点阵列的立体图。 FIG 10 is a perspective view of a test contact array.

图11是完整的可用作商品的界面薄膜的俯视图,该界面薄膜包括对准部件。 FIG 11 is a plan view of the complete product may be used as the interface membrane, the interface member comprises an alignment film.

图12是完整的可用作商品的接触薄膜的俯视图,该接触薄膜包括对准部件。 FIG 12 is a complete top plan view of the contact product may be used as a thin film, which comprises contacting the alignment film member.

图13是完整的可用作商品的间隔物薄膜的俯视图,该间隔物薄膜包括对准部件。 FIG 13 is a plan view of a complete film can be used as a spacer item, the spacer member includes an alignment film.

图14是本发明的另一实施例的立体图,该实施例使用具有内部弹簧的旁路孔。 FIG 14 is a perspective view of another embodiment of the present invention, this embodiment uses the bypass hole having an internal spring.

图15是测试触点的俯视图,示出偏置测试接触爪指的弹簧的位置。 FIG 15 is a plan view of a test contact showing the position offset test contact spring fingers.

具体实施方式 detailed description

图3示出用于DUT的测试容器30的总体布局,该DUT包括图1和2中示出的BGA型微电路10。 Figure 3 shows the overall layout of the DUT for testing container 30, comprising the DUT 1 and the BGA type microcircuit 102 illustrated. 承载板47支撑具有开口或孔33的对准板45,且开口或孔33精确地确定微电路10在容器30中的X和Y位置(参见坐标指示)。 Supporting the carrier plate 47 having an opening or aperture 33 of the alignment plate 45, and openings or holes 33 to accurately determine the X and Y position in the container 30 of the microcircuit 10 (see the coordinate indicator). 如果微电路10具有定位部件,普遍的做法是在孔33中设有配合部件。 If microcircuit 10 has a positioning member, provided with common practice in the hole 33 mating member.

承载板47在其表面上承载连接焊盘,该连接焊盘通过S&P导体连接至电缆42。 Carrier plate 47 carries on its surface a connection pad, the connection pad through the S & amp; P 42 connected to the cable conductor. 电缆42连接至执行微电路10的电测试的电子器件。 Cable 42 is electrically connected to the electronic device performs the microcircuit 10 of the test. 如果测试电子器件与容器30集成在一起,电缆42可以很短或者甚至在容器30的内部;如果测试电子电路位于独立的底板上,电缆42可以较长。 If the test electronics are integrated together with the container 30, cable 42 can be very short or even inside the container 30; if the test electronics on a separate base, the cable 42 may be longer.

测试触点阵列40包括多个单独的测试触点元件,这些测试触点元件精确地映照承载在微电路10的表面14上的BGA端子20。 Test contact array 40 comprises a plurality of individual test contact elements, these test contact elements precisely mapping the microcircuit carried on the surface 10 of the terminal 14 of the BGA 20. 当微电路10插入到孔33中时,端子20精确地与测试触点阵列40对准。 When microcircuit 10 is inserted into the hole 33, the terminal 20 accurately with the test contact array 40 are aligned. 容器30设计与具体体现本发明的测试触点阵列40兼容。 It reflects the design of the container 30 is compatible with the particular test contact array 40 of the present invention.

测试触点阵列40承载在接触薄膜或薄板50上。 Test contact array 40 is carried on a contact membrane or sheet 50. 薄膜50最初包括诸如Kapton(TM DuPont Corp.)之类的绝缘塑料芯层61(参见图6),且在每个表面上具有导电铜层。 An insulating plastic film 50 comprises a first core 61 such as Kapton (TM DuPont Corp.) or the like (see FIG. 6), and having a layer of conductive copper on each surface. Kapton层和铜层各层的厚度可以是0.001in.数量级。 Kapton layer and the copper layer thickness of the layers may be 0.001in. Magnitude. 阵列40中单独的测试触点优选利用公知的光刻和激光加工工艺、在薄膜50上和在薄膜50中形成。 A separate array 40 test contacts preferably using well-known photolithographic and laser machining process, and are formed in the thin film 50 on the film 50.

薄膜50具有对准部件,例如位于对准板45和承载板47之间的区域中的孔或边缘图案;该对准部件用于将薄膜50与对准板47上相应伸出的部件精确对准。 The film has an alignment member 50, for example, the alignment plate is located between the region 45 and the carrier plate 47 in a hole or edge pattern; 47 projecting from a respective thin plate member 50 is aligned with the alignment means for precise alignment quasi. 所有测试触点40都与薄膜50的对准部件精确对准。 All the test contacts 40 are precisely aligned with the alignment member 50 of the film. 这样,阵列40的测试触点位于与孔33精确对准的位置。 Thus, a test contact array 40 is located at a position exactly aligned with the hole 33.

图4中的剖面图示出测试容器30的总体布局,该测试容器在边缘处具有薄膜50,且剖面穿过阵列40的一些测试触点。 Sectional view in FIG. 4 illustrates the general layout of the test vessel 30, the test vessel 50 having a thin film at the edges, and some of the test section through the array of contact 40. 图4中单独的元件稍微间隔开,以更好地理解该结构。 A separate element in FIG. 4 slightly spaced apart, for a better understanding of the structure. 当设置使用时,薄膜50的上表面接触对准板45的下表面,且使用机器螺钉或其他紧固件将容器30的所有元件一同固定。 When use is provided, on the surface of the film 50 contacts the lower surface 45 of the alignment plate, and the use of machine screws or other fasteners with all elements of the container 30 is fixed.

薄膜50的下表面与专门设计的界面薄膜80机械接触。 The lower surface of the film 50 and the film 80 designed mechanical contact interface. 薄膜80具有导体旁路孔的阵列90。 An array of thin film 80 has a conductor 90 of the bypass hole. 阵列90中每个通孔的末端稍微延伸穿过薄膜80的两个表面,且与测试触点40精确对准。 The ends of each array 90 extend slightly through the through-hole 80 of both surfaces of the film, and is accurately aligned with the test contacts 40. 这里使用的术语“旁路孔”代表完全延伸穿过薄膜80、并暴露在薄膜80每一侧上的导电柱或杆,虽然在该实施例中,术语“焊盘”可能比“柱”能够更形象地描述实际形状。 As used herein, the term "bypass hole" means extends completely through the film 80, and exposed conductive posts or rods 80 on each side of the film, although in this embodiment, the term "pad" may be more than "column" can be the actual shape is described more vividly. 包括阵列90和薄膜80的其他部件的旁路孔通常是采用公知的光刻工艺形成的。 Comprises a bypass hole array 90 and other components of the film 80 is typically a known photolithography process of forming.

包括旁路孔阵列90的旁路孔具有两个主要用途。 Aperture array includes a bypass shunt hole 90 has two main purposes. 首先,阵列90的旁路孔为阵列40测试触点的工作提供机械支撑和余隙空间。 First, the bypass hole array 90 provide mechanical support and clearance space for the work of array 40 test contacts. 阵列90的旁路孔也将阵列40中单独的测试触点电连接至承载板47上的连接焊盘91-93(图6和7)。 Bypass hole array 90 will also be a separate test contact array 40 is electrically connected to the carrier plate 47 on the connection pads 91-93 (FIGS. 6 and 7).

阵列40中测试触点元件的结构如图5-7所示。 Structure array 40 test contacts elements shown in Figures 5-7. 图5的顶投影示出包括一小部分阵列40的三个单独的测试触点元件56-58。 5 top projection shows three individual test contact elements 56-58 a small portion of the array 40. 测试触点56-58显示出阵列40中所有单独的测试触点元件的详细结构。 Test contacts 56-58 shows the detailed construction of the array 40 all the individual test contact elements.

在一优选实施例中,阵列40中各测试触点56-58都包括八个渐缩形爪指56a、56b、57a、57b等,它们通常被设置为饼形。 In a preferred embodiment, the array 40 test contacts 56-58 each comprise eight tapered fingers 56a, 56b, 57a, 57b, etc., they are usually set as pie. 各爪指56a等的外端部都与层61成为一体,并通常形成同一圆的一段圆弧。 Each of the fingers 56a, etc. and the outer end portion of layer 61 are integrated, and is generally formed of an arc of the same circle. 爪指56a等通过径向槽62和其他未指明的槽相互间机械和电隔离。 And between the fingers 56a, etc. are mechanically and electrically isolated from other unspecified grooves by radial grooves 62. 激光加工是形成槽62的便利方法。 The laser processing is a convenient method of forming the groove 62. 除去层61上的部分初始铜层,以至少使测试触点40中的每一个相互间电绝缘。 Part of the initial copper layer on the layer 61 is removed, such that at least 40 test contacts each electrically insulated from each other. 对于Kelvin测试应用而言,单一的测试触点56的一些爪指56a等也可以和其他爪指56b等电绝缘。 For Kelvin testing applications, some of a single test contact 56 of the pawl 56a and the like may also refer to other fingers 56b, and electrically insulating.

对于八个爪指的实施例而言,各单独的爪指56a等都与45°的圆弧相对。 For eight fingers embodiment, each of the individual fingers 56a are all 45 ° relative to the arc. 其他数目的爪指56a等也完全在本发明的精神内。 Other numbers of fingers 56a, etc. is well within the spirit of the invention. 事实上,矩形而不是饼形的爪指可以很好地适用于没有BGA结构的DUT。 In fact, rectangular rather than pie-shaped fingers may well not be applied to DUT BGA structure. 为避免在过薄的相邻测试触点56等之间的薄膜区域中存在桥路,单独的测试触点56等相对于各自的相邻触点旋转22.5°。 To avoid the presence of the bridge region of the film is too thin between adjacent test contacts 56, etc., individual test contacts 56, etc. with respect to the rotation of the respective adjacent contacts 22.5 °. 这种定位使得每个测试触点56等中的槽62的端部与相邻的测试触点56等内的槽62尽可能远地间隔开。 This positioning so that the end portion of each test contact 56, and the like groove 62 and the groove 62 in the adjacent test contacts 56, etc. spaced apart as far as possible.

图6和7是穿过槽62等的侧剖图,槽62等界定测试触点56和58的爪指56a、56b、58a和58b的下边缘。 6 and FIG. 7 is a side sectional view through the groove 62 and the like, and other slots 62 and 56 define the test contact fingers 58 of the lower edge 56a, 56b, 58a and 58b of. 注意,尺寸之间的部分不是按比例绘制的。 Note that, a portion between the dimensions are not drawn to scale. 这使得更容易理解本发明。 This makes it easier to understand the present invention. 图6和7中所示的剖面部分实际上是将爪指57a和57b对截开后的部分。 6 and 7 are cross-sectional portion shown is actually the part after the fingers 57a and 57b sectioned pair. 一组爪指56a等包括一测试触点56等。 A set of fingers 56a, etc. comprising a test contact 56 and the like. 各个爪指56a等都与该测试触点40的所有其他爪指间隔开。 All other respective fingers spaced pawls 56a with the test contacts 40 are all fingers.

各爪指56a等都具有面向正Z方向的触点焊盘63a、63b等。 Each of the fingers 56a and so has a contact pad 63a facing the positive Z direction, 63b and the like. 焊盘63a、63b等形成用于测试触点56的与端子20接触的表面。 Pads 63a, 63b is formed like a test contact surface 56 of the contact terminal 20. 每个爪指56a等在负Z方向还具有朝下的连接焊盘75a、75b等。 Each of the fingers 56a, etc. in the negative Z-direction also has a downward connection pads 75a, 75b and the like. 触点焊盘63a、63b等分别与连接焊盘75a、75b等电接触。 Contact pads 63a, 63b, respectively, in electrical contact with the connection pads 75a, 75b and the like. 该电连接可以包括如图所示的爪指56a等的电镀边缘69a、69b、70a、70b、71a、71b,或者可以包括旁路孔(未示出),该旁路孔在适宜位置处通过内层61将焊盘63a等连接至焊盘75a等。 The electrical connection may include fingers 56a, as shown in FIG like electroplating edges 69a, 69b, 70a, 70b, 71a, 71b, or may include a bypass hole (not shown), through which bypass hole at an appropriate position the inner layer 61 and the like connected to the land 63a pad 75a and the like.

爪指56a等中的每个均形成悬臂梁,该悬臂梁可通过弯曲层61以及包括每个爪指56a等的焊盘63a等和75a等中的一或二者(取决于具体的结构),弹性地偏移薄膜50的平面。 The fingers 56a are each formed like a cantilever, the cantilever layer 61 can be formed by bending and comprising one or both of each of the fingers 56a, etc. to pads 63a and 75a of the like, etc. (depending on the particular configuration) , 50 elastically bias the plane of the film. 为避免爪指56a等的底部应力集中,槽62的底部可以比沿槽62的其他位置宽一些。 To avoid fingers 56a, etc. bottom stress concentration, the bottom of the groove 62 may be wider than the other number of positions along the slot 62. 较宽的槽62的底部可以具有小的圆形开口或扩展部分66。 Wider at the bottom of the groove 62 may have a small circular opening 66 or extension portion.

使用时,爪指56a等稍微向下(即向负Z方向)偏移。 In use, fingers 56a, etc. slightly downward (ie negative Z-direction) offset. 爪指56a等重复弯曲后,高的应力集中可能导致其永久变形,扩展部分66至少部分缓和这一高的应力集中。 Fingers 56a, etc. after repeated bending, high stress concentration which may lead to permanent deformation, the high stress portion 66 at least partially alleviate the expansion set. 扩展部分66可以采用形成槽62的激光加工工艺成形。 Extended portion 66 may be formed by laser machining process of forming the groove 62.

界面薄膜80位于承载板47和接触薄膜50之间。 Interface membrane 80 is positioned between the carrier plates 47 and 50 contact membrane. 由于要求薄膜80具有极低的挠性,薄膜80可以比薄膜50稍厚一些。 Since the film is required to have a very low flexibility 80, film 80 may be thicker than the film 50. 薄膜80中的旁路孔阵列90包括单独的圆柱形旁路孔83-85。 Shunt hole array film 8090 includes a single cylindrical bypass hole 83-85. 薄膜80支撑旁路孔阵列90,并如旁路孔83-85所示定位旁路孔旁路孔阵列90,且将它们与测试触点56-58分别对准。 The support film 80 bypass hole array 90, and 83-85 as shown bypass hole positioned bypass hole bypass hole array 90, and they are aligned with the test contacts 56-58.

承载板47具有连接焊盘91-93,这些连接焊盘通过常规技术连接至电缆42。 Carrier plate 47 having a connection pad 91-93, the connection pads 42 connected to the cable by conventional techniques. 焊盘91-93与相关的旁路孔83-85精确对准,由此实现与旁路孔83-85间的牢固电接触和机械接触。 Pads 91-93 and 83-85 associated bypass hole precise alignment, thereby realizing secure electrical and mechanical contact between the 83-85 and the bypass hole. 这种布局用于DUT 10的BGA触点20和承载板47的连接焊盘91-93之间导电长度极短的情况。 This arrangement is used to connect the conductive pads 91-93 between the length is extremely short DUT BGA contacts 10 and 20 of the carrier plate 47.

在一实施例中,旁路孔83-85可以包括实心圆柱。 In one embodiment, the bypass holes 83-85 may comprise a solid cylinder. 但是,对于它们而言,可能的更好的结构是开口端朝上的杯形,如图6和7所示。 However, for their part, may be a better structure is upwardly open cup-shaped end, shown in Figures 6 and 7. 每个旁路孔83-85的边缘与爪指69a等上的相邻连接焊盘75a等、以及与测试触点57和58等的爪指上的类似连接焊盘接触。 Each bypass hole edge of the fingers 83-85 on the adjacent connection pads 75a, etc. and the like 69a, and a test contact 57 and fingers 58 or the like on the contact pads similar connection.

采用旁路孔83-85的这种结构具有多个理由。 This architecture uses a plurality of bypass hole having 83-85 reasons. 首先,这种结构允许每个爪指56a等自由向下弯曲。 First, this configuration allows each of the fingers 56a, etc. freely bent downward. 其次,旁路孔83-85的杯形结构非常适合收集测试过程中不可避免产生的大部分碎屑。 Secondly, the cup-shaped structure bypass hole is 83-85 for most debris collection inevitably generated during the test. 当爪指56a等接触到单独的球20时,形成的碎屑通过爪指落下并盛放在旁路孔83-85内。 When the fingers 56a, etc. contact individual balls 20, debris formed by dropping and accommodating fingers in the bypass hole 83-85. 防止碎屑玷污承载板47可以避免电性能下降,并避免承载板47遭受机械损坏。 The carrier plate 47 prevents debris contamination electrical performance degradation can be avoided, and to prevent the carrier plate 47 subjected to mechanical damage.

图7示出组装时井30的一部分。 FIG 7 illustrates a portion of the well 30 during the assembly. 连接焊盘75a、75b等与旁路孔83建立起牢固的电连接和机械连接。 Connection pads 75a, 75b and the bypass hole 83 and the like to establish a secure electrical and mechanical connection. 注意,对准板45不限制单独的爪指56a等的弯曲。 Note that, the alignment plate 45 does not limit individual fingers 56a bent like. 连接焊盘75a等和旁路孔83之间牢固的机械连接使得进入连接焊盘75a等和旁路孔83之间的接触区的碎屑数量达到最少。 Firm mechanical connection between connection pads 75a, etc. and the number of the bypass hole 83 so that debris entering the contact area between connection pads 75a, etc. and reach a minimum bypass orifice 83.

图8示出与测试触点56-58机械接触和电接触的DUT10的BGA端子20,正如在实际测试过程中触点20的可能使用方式那样。 FIG 8 shows the contact with the test contacts 56-58 mechanical and electrical contact with a BGA DUT10 terminal 20, as the contacts 20 as possible to use in the actual test. 爪指56a等在测试设备的DUT装载元件施加的外力作用下,弹性地且独立地偏移进入旁路孔83-85的内部空间中。 Fingers 56a, etc. in the internal space of the external force DUT loading element of the test device is applied, elastically and independently into the bypass hole offset in 83-85. 如果单独的BGA端子20未与其测试触点56-58完全对准,则每个单独的爪指56a等的独立柔度可确保在整个测试过程中、在涉及的测试触点56等和相关的BGA端子20之间产生良好的电接触。 If the individual BGA terminal 20 is not perfectly aligned with its test contacts 56-58, each individual fingers 56a, etc. independently ensures compliance throughout the test, and the associated test contact 56, etc. involved in the produce good electrical contact between the terminals 20 BGA.

间隔物100在装载期间将DUT10正确地定位在Z轴上的位置,并防止DUT10对测试触点65等过度地施压。 The spacer 100 during the loading position DUT10 correctly positioned in the Z-axis, and to prevent pressure DUT10 test contact 65, etc. excessively.

每个BGA端子20的中心区不接触任何爪指56a等。 Each center BGA terminal 20 does not contact any of the fingers 56a and the like. 相应地,在测试过程中始终不对这些中心区作标记。 Accordingly, during the test does not always mark these central area.

由槽62形成的空间以及爪指56a等自由端之间的间隙允许碎屑落入到旁路孔83-85的内部。 A space formed by the groove 62 and the gap between the fingers 56a, etc. allow debris to the free end falls to the interior of the bypass hole 83-85. 每个旁路孔83-85的杯形结构可俘获碎屑,防止碎屑到达和机械损坏承载板47,该承载板47是测试设备中的昂贵元件。 Each cup-shaped bypass hole structure 83-85 may capture debris, mechanical damage and to prevent debris from reaching the bearing plate 47, the carrier plate 47 is a member expensive test equipment.

图9是测试触点56的另一放大俯视图,示出其中的其他部件。 FIG 9 is another test contact 56 is an enlarged plan view showing the other components therein. 尤其是,单独爪指56a等的表面63a等上的锯齿或齿88在测试期间接触BGA端子20。 In particular, the individual fingers such as serrations 56a on surface 63a or the other teeth 88 in contact with BGA terminals 20 during testing. 当端子20被压在测试触点56等上时,齿88切割并刮擦穿过BGA端子20上的任意氧化层。 When the terminal 20 is pressed against the test contacts 56, etc., the cutting teeth 88 and through the scraper 20 of any oxide layer on a BGA terminals. 齿88可以放置在触点焊盘63a等上的任何方便之处。 Teeth 88 may be placed on contact pads 63a, etc. at any convenience. 理想地,齿88与限定每个测试触点56等的圆圈近似径向对准。 Ideally, the circle, the teeth 88 and 56 defining each of the test contacts are aligned approximately radially and the like. 这使得当将微电路10装入容器30中以及BGA端子20偏移爪指56等时,会在BGA端子20上出现齿88的切割效应。 This enables the microcircuit 10 into the container 30 and the offset fingers 20 BGA terminals 56 and the like, the cutting effect of the teeth 88 appears on BGA terminal 20.

齿88可以通过多种技术成形。 Teeth 88 may be formed by various techniques. 优选的技术是作为形成槽62的优选激光加工工艺的偶然发现的副产品、沿爪指56a的边缘形成齿88。 Preferred technique is preferable as incidental by-product of laser machining process for forming the groove 62 found along the edges of fingers 56a of the teeth 88 are formed. 在槽的成形工艺中,使用强度相对高的激光束会造成薄膜50上承载的铜皮飞溅和起皱。 In the groove forming process, a relatively high intensity laser beam causes copper film 50 carried on the splash and wrinkling. 理想地,将激光加工束定向到薄膜50的顶面上。 Ideally, the laser machining beam is directed onto the top surface of the film 50. 经常在爪指56a等的暴露的铜表面上镀上薄的镍层和金层。 Often plated thin nickel layer and a gold layer on the copper surface of the fingers 56a, etc. exposed. 该电镀工艺似乎不会影响齿88充分切入BGA端子20表面的能力。 This plating process does not seem to affect the ability of the full teeth 88 cut into the surface of the BGA terminal 20.

下列数值适用于容器30中各种尺寸的元件,且容器30设计用于具有.8mm中心的BGA端子20。 The following values ​​apply to the various dimensions of the container element 30 and the container 30 is designed for BGA terminals 20 having .8mm center. 所有数值的单位都是mm。 All values ​​are in units of mm. 可以从给出的尺寸推出未特别说明的尺寸的近似值。 Release approximation size can not be described particularly from the dimensions given.

测试触点56的直径 0.5槽62的宽度 0.03层61的厚度 0.025焊盘63a和75a的厚度 0.018爪指56a等的Z轴柔度是爪指56a等的长度、厚度以及允许多区域接触使用的I/O暴露的函数。 Width of the test contact 56 of the groove 62 of diameter 0.5 thickness of 0.025 pad 63a 61 and 75a of the layer thickness of 0.03 to 0.018 fingers 56a, etc. Z axis compliance of fingers 56a, etc. is the length, thickness, and the area of ​​contact allowing multiple use I / O function exposed.

图10是一部分接触薄膜50的立体图。 FIG 10 is a perspective view of the contact portion 50 of the film. 可以看到在薄膜50的周围表面上稍微向上伸出的单独的触点焊盘63a等。 You can see the individual contact pads 63a, etc. projecting slightly upward on the peripheral surface of the film 50.

图11是界面薄膜80的未放大的俯视图,其中界面薄膜80具有完整的旁路孔阵列90和对准部件92,该对准部件92用于将薄膜80相对于对准板45精确定位。 FIG 11 is the interface membrane 80 unamplified plan view, wherein the interface membrane 80 with a complete bypass hole array 90 and alignment member 92, aligning member 92 for the film 80 with respect to the alignment plate 45 accurately.

图12是接触薄膜50的未放大的俯视图,其中接触薄膜50具有完整的测试触点阵列40和对准部件95,该对准部件95用于将薄膜50相对于对准板45精确定位。 FIG 12 is an enlarged plan not contact membrane 50, wherein the contact membrane 50 with a complete test contacts array 40 and alignment member 95, aligning member 95 for the film 50 with respect to the alignment plate 45 accurately.

旁路孔83-85与承载板47刚性接触,由此减轻承载板47的磨损,而这一承载板磨损问题在其他测试触点设计中存在。 83-85 bypass hole 47 and the carrier plate rigid contact, thereby reducing wear of the carrier plate 47, and this carrier plate wear problems in other test contact designs. 该设计具有相对短的信号路径,且只具有一或两个刚性部分,所以相对于在路径中具有多个部分的设计而言,接触电阻变小,且性能更稳定。 This design has a relatively short signal path, and has only one or two rigid parts, so with respect to the design having a plurality of portions, the contact resistance in the path becomes smaller, and more stable performance. 该特征还提高了测试过程中的电性能。 This feature also improves electrical performance during the test. 用于旁路孔的中空导体限制了电场。 The hollow conductor for limiting the field of the bypass hole. 该设计减少了直角连接的数量,由此改进了电性能和信号保真度。 This design reduces the number of right-angle connector, thereby improving electrical performance and signal fidelity.

图13示出限制DUT 10的Z方向位移的间隔物105的形状。 Figure 13 shows the shape of DUT 10 limits the Z-direction displacement of the spacer 105. 对准部件105将间隔物100适当地放置在相对于测试触点阵列40的Z方向上。 The aligning member 105 is suitably spacer 100 placed on the Z-direction with respect to test contact array 40.

图14和15示出具有内部弹簧110的旁路孔83-85,该内部弹簧110在爪指56等上的中间位置施加力。 14 and FIG. 15 shows an internal spring 110 having a bypass hole 83-85, the inner spring 110 exerts a force on the intermediate position of fingers 56 or the like. 图14示出置于旁路孔83-85的内部底部和单独的爪指56-58之间的弹簧110。 Figure 14 shows the bypass hole is placed inside the bottom of 83-85 and a separate spring 110 between the fingers 56-58. 该实施例除界面薄膜80外,还可能需要第二个界面薄膜80'。 This embodiment except the interface membrane 80, but also may require a second interface membrane 80 '. 使用弹簧110具有以下优点:提高Z轴柔度,在爪指56-58和旁路孔83-85之间提供另一导电路径,以及改进整体电性能。 Use spring 110 has the following advantages: flexibility improved Z-axis, the fingers 56-58 to provide another conductive path between the bypass orifice and 83-85, and improved overall electrical performance.

可修改该结构,以允许对BGA或地面器件封装进行Kelvin测试。 This structure can be modified to permit BGA device package of ground or for Kelvin testing. 如果将Kelvin迹线放置在电路上,可将Kelvin迹线路由至一界面处;在该界面处,利用一适用于Kelvin测试系统的连接器,Kelvin迹线被缚在Kelvin测量系统上,无需修改电路板,。 If Kelvin traces disposed on a circuit, may Kelvin trace routing to an interface; at the interface, using a suitable Kelvin test system connector, Kelvin traces are tied to a Kelvin measuring system without modification circuit board. 可以修改测试触点56的结构,以将爪指56a等的一半与其余爪指56a等之间电绝缘。 You can modify the test contact structure 56, to the fingers 56a, etc. from the remaining half of the fingers 56a, etc. between the electrically insulating. 可将单独的旁路孔83-85划分开,以向包括每个测试触点56等的两组爪指56a等提供独立的连接。 It may be divided into 83-85 individual bypass hole opened to provide a separate means connected to the two claws 56a, etc. comprising each test contact 56 and the like.

可将稍作修改的焊盘类型用作光学支架的基准,该光学支架允许将部件非常精确地放置在测试接触器中。 Reference may be slightly modified pad type used as the optical holder, the holder allows the optical member is placed very precisely in the test contactor. 具有精确切割图案的额外基准焊盘的公差允许将器件最佳定位在接触器的中心。 Tolerance additional reference pads having a precise cutting pattern allows optimal positioning of the device at the center of the contact. 该焊盘可以离开器件一段距离,因此外壳需要一小孔,以允许光学器件在焊盘上对准。 The pad may be some distance away from the device, and therefore requires a housing aperture to permit alignment of the optical device on the pad. 这样的修改将潜在地消除对于对准板45的需要。 Such modifications would potentially eliminate the need for alignment plate 45.

或者该设计可以包括每个爪指56等之间的电绝缘,以通过将从顶侧至承载板侧的路径数量加倍,使路径具有更高的热容量和更低的电感。 Alternatively the design may include electrical isolation between each of the fingers 56, etc., through the number of paths from the top side to the side of the carrier plate is doubled, so that a thermal path having a higher capacity and lower inductance. 将每个单独的爪指56a等与测试触点56的其他爪指电绝缘可以提高电性能。 The other jaw of each individual fingers 56a, etc. of the test contact 56 may improve electrical means electrically insulating properties.

焊盘63a等可以具有许多不同的尺寸和形状,以配合器件和/或器件封装的I/O尺寸、形状和节距。 Pads 63a, etc. can have many different sizes and shapes to fit the device and / or device package I / O size, shape and pitch. 具有不同厚度和强度的层61、焊盘63a等和75a等可向I/O器件提供不同的接触力。 With different thickness and strength of the layer 61, the pads 63a and 75a, etc., etc. may provide different contact forces to the I / O devices. 该特征允许控制接触力最佳穿过各种类型和厚度的氧化物。 This feature allows the optimum control of the contact force through the oxide thickness and types. 对装载器可提供的力加以限制。 To limit the force of the loading can be provided. 调整接触力的能力允许接触力与装载器的力匹配。 The ability to adjust the contact force allows the contact force with the force matching the loader.

使用柔性绝缘材料调整器件的静止点,并最优化插入力。 A flexible insulating material, the rest point adjustment device, and optimize insertion forces. 间隔物100的厚度将仅是球在器件或器件封装上扩展程度的函数。 Thickness of the spacer 100 will be only a function of the degree of extension of the ball on the device or device package. 通过用与接触板相同的材料制造间隔物,会产生实时压缩调整,用于达到触针在工作期间处于升高的插入等级时的应力消除。 By using the same material as the contact plate spacer, it will produce real-time compression adjustment for achieving strain relief during operation of the stylus in the raised insertion level.

在进行非破坏性器件测试期间,该设计仅使用两个部件在器件和/或器件封装I/O与承载板之间建立起机械和电接口。 A period during nondestructive testing device, the design uses only two parts to establish a mechanical and electrical interface between the device and / or device package I / O and the carrier plate. 特殊接触薄膜50可潜在地用于某一测试应用中,或者可以是一系列具有相同节距的器件的标准覆盖区。 Particular contact membrane 50 may potentially be used for certain test applications, or may be a series of standards covering the region of the device having the same pitch. 界面薄膜80可以是刚性电路,且该电路足够厚和坚硬,以确保DUT I/O不与承载板47发生破坏性接触。 Interface membrane 80 may be a rigid circuit, and the circuit is sufficiently thick and stiff, to ensure that the DUT I / O does not contact with the destructive carrier plate 47. 在该实施例中,对准板安装在顶部,且将DUT与测试触点阵列40对准。 In this embodiment, the alignment plate mounted at the top, and the DUT to test contact array 40 are aligned. 相应地,可以利用最少的承载板空间、同时测试多个器件。 Accordingly, the carrier plate can be with minimal space while testing a plurality of devices. 刚性界面薄膜80具有导体路径,这些路径将信号直接路由至承载板上预定的测试点。 Rigid interface membrane 80 has conductor paths that route the signals directly to predetermined test points on the carrier plate. 实际上,界面薄膜80对于DUT而言是特定的,而测试触点阵列40是标准化的。 Indeed, for the interface membrane 80 is specific to the DUT while the test contact array 40 is standardized.

由于测试触点阵列40的制造成本比界面薄膜80高,因此该实施例可具有成本优势。 Since the manufacturing cost of the test contact array 40 is a high ratio of the interface membrane 80, this embodiment may have a cost advantage. 该构想可以用于实现与晶片上的管芯和单一管芯的接触。 The idea may be used to implement a single contact with the die and the die on the wafer. 顶部上的柔性界面具有嵌入式组件,这些组件可使测试接触器系统模拟将一部件焊接到印刷电路或承载板上。 The flexible interface on top of an embedded components that enable the system to simulate the test contactor member welded to a printed circuit board or carrier. 顶部柔性或薄膜电路设计具有下列特征:1、可在一区域中与I/O器件接触而不会损坏该I/O器件,使该I/O器件仍可进行以后的焊接。 Or the top flexible membrane circuit design has the following characteristics: 1, may contact in an area with the I / O devices without damaging the I / O devices, so that after the I / O to the device may be welded.

2、抹拭穿过I/O上的氧化层的抹拭功能。 2, wiping wiping function through the oxide layer on the I / O.

3、柔性电路中的槽允许用户确定Z轴柔度。 3, the flexible circuit allows the user to determine the Z-axis groove compliance.

4、柔性电路中的槽允许使用至器件的多个接触点,以降低接触电阻和电感。 4, the flexible circuit in the slot to allow the use of a plurality of contact points of the device, to reduce the contact resistance and inductance.

5、柔性电路具有嵌入在电路中且靠近器件的输入端和输出端的匹配或去耦部件。 5, the flexible circuit having embedded close to the device in the circuit and the input terminal and the output terminal of matching or decoupling member.

6、焊盘图案是器件节距、I/O尺寸以及I/O扩展的函数,因此该构想是很容易扩展的,大到集成电路封装的范围、小至管芯上节距的范围。 6, the pitch of the pad pattern is a device, I / O size and I / O expansion function, so the idea is easily extended, the large range of an integrated circuit package, a die onto a small pitch range.

7、该构想可用于军用温度范围。 7, the concept can be used for military temperature range.

8、具有在小的印刷电路板空间中同时测试多个部分的能力,该能力对于生产测试和老化测试而言是最佳的。 8, has the ability in a small printed circuit board space simultaneously testing a plurality of parts, this capability is optimal for production testing and burn-in test.

9、可将接触板成形为器件上I/O的几何形状。 9, the contact plate may be shaped into the geometry of I / O devices on.

10、无焊接表面安装连接。 10, no solder surface mount connector.

11、半刚性触点。 11, semi-rigid contacts.

12、接触球、焊盘或铅制端子的能力。 12, the contact balls, pads or leaden terminal capabilities.

13、DUT端子的多个独立的接触。 13, a plurality of separate contact terminals DUT.

14、自定心部件和为增加精度而采用光学对准的能力。 14, the capacity of the optical alignment and self-centering member employed to increase accuracy.

下述刚性板具有下列特征:1、以最短距离将信号直接路由至承载板。 Following a rigid plate having the following characteristics: 1, the shortest distance signal routed directly to the carrier plate.

2、与圆柱内部的被测器件建立起接口,以降低EMI和串扰。 2, the inner cylindrical device under test to establish the interface, to reduce EMI and crosstalk.

3、定制信号路由,以允许重复使用承载板。 3, signal routing custom, to allow reuse of the carrier plate.

4、在接触板和昂贵的承载板之间提供阻隔物,以防部件干扰或施加在接触器上的力极高。 4, providing a barrier between the contact plate and expensive carrier plate member to prevent interference or contact force applied to the extremely high. 如果某部件会出故障,用户将希望它是系统中最廉价的部件。 If a component will fail, the user would want it to be the cheapest system components.

5、无焊接表面安装。 5, mounting surfaces without welding.

6、半刚性触点。 6, a semi-rigid contacts.

该构想可以用于自动测试环境,而无需在测试前将接触器或对准板旋拧到承载板上。 The concept can be used in automatic test environment without prior testing contactor or the alignment plate screwed to the carrier plate. 这使接触器容易组装、更换或清洁。 This makes contacts easier assembly, replacement or cleaning. 这也允许更小节距的器件具有更精确的对准程度。 This also allows a smaller pitch devices with a more precise degree of alignment.

使用极薄型,使得电气性能优于市场上任何其他的BGA接触器或插座。 Use very thin, so that electrical performance superior to any other BGA contacts or socket on the market. 该接触器不会对承载板造成磨损,并可在某一区域抹拭器件,这既不影响其焊接,还能提供较好的接触电阻。 The contact does not cause wear on the carrier plate, and wiping device in an area, which will not affect the welding, also provides a good contact resistance. 该构想可具有多个抹拭点以及与球接触的冗余,以减小接触电阻,并减少开口的数量,即使当还存在一些碎屑时。 This concept may have a plurality of points and redundant wiping contact with the ball, to reduce contact resistance, and reduce the number of openings, even when there are still some debris. BGA界面可以有助于球的自对准。 BGA interface can help self-aligning ball. 该构想的尺寸可以很容易调整,以测试具有非常小的球的非常小的器件,甚至测试凸块晶片;为实现该构想,可以将凸块晶片倒转,以从顶部触碰到晶片上的凸块。 The contemplated dimensions may be easily adjusted to a very small ball test with a very small device, even test wafer bumps; To achieve this concept, the bump wafer may be reversed in order to touch the top of the projections on the wafer Piece. 可以进行设计,以使接触板可以旋转180度或反向旋转,并仍能正常工作。 It can be designed so that the contact plate can be rotated 180 degrees or reverse rotation, and still work properly. 如果器件稍未对准,该特征可以减少清洁次数,并显著延长潜在寿命。 If the device is slightly misaligned, the feature may reduce the frequency of cleaning, and significantly prolong the life potential.

该构想将确定器件上的球何时不存在。 This concept will determine when the device is not present on the ball. 该构想在诸如剥落测试之类需要大的柔度的应用中效果良好。 In the contemplated application, such as a peeling test and the like requiring a large degree of flexibility in a good effect. 将器件插入测试用插座或接触器时产生的碎屑将通过界面薄膜80中的孔落到承载板47上,且不影响测试。 The resulting debris or socket contact when inserted into the test device will fall through the holes in the carrier plate 80 of the interface membrane 47, and does not affect the test. 由于碎屑堆积所需的维修时间间隔也由此变长。 Since the accumulation of debris required maintenance intervals thereby also becomes long. 柔性接口易于更换,且一旦其有效寿命期满,丢弃也是合算的。 Flexible joint easy to replace, and once its useful life is expired, discarding also advantageous. 重建仅需要三分钟,而重建类似的弹簧销插座却需要数小时。 Reconstruction only three minutes, and a similar spring pin receptacle rebuild it takes several hours. 该构想提供了一种能力,即使用柔性电路帮助将测试信号路由至电路板边缘上的连接器处。 This concept provides a capability, i.e., using the flexible circuit test signal is routed to assist in the connector on the circuit board at an edge.

该Kelvin BGA构想是针对Kelvin测试BGA封装而首次发展起来的。 The idea is for Kelvin Kelvin BGA BGA package and test first developed. 这是非常有价值的,因为在BGA封装上进行Kelvin测试将允许对测试系统进行外部连接,而无需对承载板进行费用高的修改。 This is very valuable because the test would allow for Kelvin testing of the external connection system, without the need for high cost of the carrier plate on the BGA package modification. 基本上,当使用本发明的人员为进行更精确的测量且延长清洁时间间隔或维护周期而想要监控接触电阻、以将结果化为因子输入测试软件中时,他/她只会使用Kelvin构想。 Basically, when the present invention is the use of personnel for more accurate measurement and the time interval to extend the cleaning or maintenance cycle want to monitor contact resistance factor to the result input into test software, he / she will use contemplated Kelvin .

可以理解,该公开在许多方面仅是说明性的。 It will be appreciated that the disclosure in many respects, only illustrative. 在不超出本发明保护范围的情况下,可以在细节、尤其是各个部分的形状、尺寸、材料以及布置上给予改变。 Without departing from the scope of the present invention, in details, particularly given the shape of each portion changes, size, material, and arrangement. 相应地,本发明的保护范围由所附权利要求的文字限定。 Accordingly, the scope of the present invention as defined by the appended claims text.

Claims (20)

  1. 1.一种用于与微电路端子短暂电接触的测试触点元件,包括作为悬臂梁从绝缘薄膜伸出的弹性爪指,且在所述测试触点元件的一触点侧上具有用于与所述微电路端子接触的导电触点焊盘。 A test contact element for contacting the microcircuit terminal is electrically short, includes a resilient cantilever beams extending from the insulating film fingers, and having a contact side for the contact elements of the test electrically conductive contact pads contacting the microcircuit terminal.
  2. 2.如权利要求1所述的测试触点元件,其特征在于包括多个相邻的爪指,这些爪指中的每个都作为悬臂梁从绝缘薄膜伸出,且每个在其一触点侧上都具有用于与所述微电路端子接触的导电层。 2. The test contact element as claimed in claim 1 and one contact in each claim, comprising a plurality of adjacent fingers, these fingers are extended from each of the insulating film as a cantilever, having an electrically conductive layer for contacting the microcircuit terminal point side.
  3. 3.如权利要求2所述的测试触点元件,其特征在于形成所述多个相邻爪指的爪指中的每个都向一端逐渐变窄,并被布置为饼形。 Test contact element according to claim 2, wherein said plurality of fingers are formed adjacent to each of the fingers tapering toward one end, and arranged to pie.
  4. 4.如权利要求3所述的测试触点元件,其特征在于由薄膜支撑所述爪指的外端部。 4. The test contact element according to claim 3, characterized in that the film is supported by the fingers of the outer end portion.
  5. 5.如权利要求4所述的测试触点元件,其特征在于所述爪指与所述薄膜成为一体。 5. The test contact element of claim 4, wherein said fingers is integral with the film.
  6. 6.如权利要求5所述的测试触点元件,其特征在于每个爪指至少部分是由所述薄膜中的两个槽限定的,这两个槽将每个爪指与形成所述测试触点元件的所述多个爪指中的其他每个爪指机械地间隔开。 6. The test contact element of claim 5, wherein each of the fingers at least in part by the film defined two slots, two grooves each forming said test fingers the plurality of elements of each of the other pawl contacts the finger mechanically fingers spaced.
  7. 7.如权利要求6所述的测试触点元件,其特征在于每个槽都径向定位。 7. The test contact element according to claim 6, characterized in that each of the slots are positioned radially.
  8. 8.如权利要求6所述的测试触点元件,其特征在于至少有一槽在其底部具有扩展部分。 The test contact element as claimed in claim 6, characterized in that at least one groove has an extended portion at its bottom.
  9. 9.如权利要求6所述的测试触点元件,其特征在于每个爪指在与所述触点侧相对的所述爪指侧都具有连接焊盘。 9. The test contact element according to claim 6, characterized in that each of the fingers on the side opposite the contact fingers have side connection pad.
  10. 10.如权利要求9所述的测试触点元件,其特征在于所述触点焊盘与在至少一单独的爪指上的所述连接焊盘电连接。 10. The test contact element according to claim 9, characterized in that said contact pad and said at least one separate fingers on the connection pads are electrically connected.
  11. 11.如权利要求10所述的测试触点元件,其特征在于至少一所述单独的爪指具有导电层,该导电层限定所述相邻槽侧的至少一部分,且所述导电层与所述触点焊盘和所述连接焊盘电连接。 11. The test contact element of claim 10 and the conductive layer as claimed in claim, characterized in that at least one of said fingers having a separate conductive layer, the conductive layer defining at least a portion of the adjacent groove side, said contact pads and said connection pads are electrically connected.
  12. 12.如权利要求6所述的测试触点元件,其特征在于至少一爪指在所述触点焊盘上具有多个齿。 12. The test contact element according to claim 6, characterized in that at least a plurality of fingers having teeth on said contact pad.
  13. 13.如权利要求12所述的测试触点元件,其特征在于所述齿按线性图案布置,该线性图案沿由槽限定的所述触点焊盘的至少一边缘延伸。 13. The test contact element of claim 12, wherein said teeth arranged in a linear pattern, a linear pattern along the groove defined by the at least one contact pad of the edge extension.
  14. 14.一种测试触点元件阵列,包括多个如权利要求6所述的测试触点元件,这些测试触点元件按预定图案布置。 A test contact element array comprising a plurality of such test contact element according to claim 6, which test contact elements arranged in a predetermined pattern.
  15. 15.如权利要求14所述的阵列,其特征在于限定相邻测试触点元件的所述爪指的槽具有不同的角定向。 15. The array according to claim 14, characterized in that the test contact element adjacent fingers defining a slot having a different angular orientation.
  16. 16.一种测试容器,其特征在于包括:a)如权利要求14所述的测试触点元件;以及b)基本上按所述测试触点元件的所述预定图案布置的多个连接旁路孔,每个所述连接旁路孔都与所述测试触点元件之一对准。 16. A test vessel, comprising: a) A test contact element according to claim 14; and a plurality of said predetermined pattern is connected to a bypass b) substantially by the contact element arrangement of the test holes, each of the connection holes are aligned with one pass of the test contact element.
  17. 17.如权利要求16所述的测试容器,其特征在于包括用于支撑所述多个连接旁路孔的界面薄膜。 17. The test container according to claim 16, characterized by comprising a plurality of interfaces for supporting the thin film is connected to the bypass hole.
  18. 18.如权利要求17所述的测试容器,其特征在于至少一所述连接旁路孔是具有开口端的杯形,且该杯形旁路孔的开口端接触所述对准的测试触点元件。 The test contact element 18. The test vessel according to claim 17, wherein said at least one bypass hole connected to cup-shaped having an open end, and the open end of the cup-shaped bypass hole of said aligned contacts .
  19. 19.如权利要求18所述的测试容器,其特征在于包括承载板,该承载板具有多个基本上按所述测试触点元件的所述预定图案布置的连接焊盘;所述承载板支撑所述界面薄膜,且每个所述连接焊盘基本上与所述连接旁路孔之一对准,并与其电接触旁路孔。 19. The test container according to claim 18, characterized by comprising a carrier plate, the carrier plate having a plurality of connection pads are substantially predetermined by the pattern of the test contact elements arranged; supporting the carrier plate the interface film, and each of the connection pads substantially aligned with one of said connecting bypass hole, the bypass hole and in electrical contact therewith.
  20. 20.如权利要求16所述的测试容器,其特征在于在旁路孔中包括内部弹簧,该内部弹簧按压所述测试触点的所述爪指中的至少一个。 20. The test container according to claim 16, characterized by comprising a bypass hole in the inner spring, the inner spring contact presses the jaws of the test at least one of the fingers.
CN 200710087990 2006-01-17 2007-01-17 Test contact system for testing integrated circuits with packages having an array of signal and power contacts CN101059550A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102621466A (en) * 2012-03-22 2012-08-01 上海华力微电子有限公司 Aging test board and method for manufacturing same
CN103026555A (en) * 2010-09-30 2013-04-03 伊斯梅卡半导体控股公司 Electrical contact and testing platform
CN103477237A (en) * 2011-03-21 2013-12-25 温莎大学 Apparatus for the automated testing and validation of electronic components
US8912811B2 (en) 2006-01-17 2014-12-16 Johnstech International Corporation Test contact system for testing integrated circuits with packages having an array of signal and power contacts

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8912811B2 (en) 2006-01-17 2014-12-16 Johnstech International Corporation Test contact system for testing integrated circuits with packages having an array of signal and power contacts
CN103026555A (en) * 2010-09-30 2013-04-03 伊斯梅卡半导体控股公司 Electrical contact and testing platform
CN103477237B (en) * 2011-03-21 2016-03-02 温莎大学 Means automated testing and verification of the electronic component
CN103477237A (en) * 2011-03-21 2013-12-25 温莎大学 Apparatus for the automated testing and validation of electronic components
US9261533B2 (en) 2011-03-21 2016-02-16 University Of Windsor Apparatus for the automated testing and validation of electronic components
CN102621466B (en) * 2012-03-22 2015-02-11 上海华力微电子有限公司 Aging test board and method for manufacturing same
CN102621466A (en) * 2012-03-22 2012-08-01 上海华力微电子有限公司 Aging test board and method for manufacturing same

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