WO2012090640A1 - Solar cell, solar cell module, and production method for solar cell module - Google Patents

Solar cell, solar cell module, and production method for solar cell module Download PDF

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Publication number
WO2012090640A1
WO2012090640A1 PCT/JP2011/077768 JP2011077768W WO2012090640A1 WO 2012090640 A1 WO2012090640 A1 WO 2012090640A1 JP 2011077768 W JP2011077768 W JP 2011077768W WO 2012090640 A1 WO2012090640 A1 WO 2012090640A1
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Prior art keywords
solar cell
mark
side electrode
type
light receiving
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PCT/JP2011/077768
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French (fr)
Japanese (ja)
Inventor
有二 菱田
三島　孝博
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三洋電機株式会社
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Publication of WO2012090640A1 publication Critical patent/WO2012090640A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1876—Particular processes or apparatus for batch treatment of the devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H01L31/0682—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells back-junction, i.e. rearside emitter, solar cells, e.g. interdigitated base-emitter regions back-junction cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
    • H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a back junction solar cell, a solar cell module including the solar cell, and a manufacturing method thereof.
  • Patent Document 1 proposes a so-called back junction type solar cell in which a p-type region and an n-type region are formed on the back surface side.
  • this back junction solar cell it is not always necessary to provide an electrode for collecting carriers on the light receiving surface. For this reason, in the back junction solar cell, the light receiving efficiency can be improved. Therefore, more improved photoelectric conversion efficiency can be realized.
  • the back junction solar cell has a p-type region and an n-type region formed on the back surface with high definition. For this reason, when manufacturing a back junction solar cell, it is necessary to form the p-type region and the n-type region after accurately detecting the position of the semiconductor substrate.
  • a direction for detecting the position of the semiconductor substrate for example, by detecting the position of the end surface of the semiconductor substrate, by detecting the position of the semiconductor substrate, or by detecting the position of the alignment mark formed on the semiconductor substrate
  • a method for detecting the position of the semiconductor substrate may be used.
  • the method of detecting the position of the semiconductor substrate by detecting the position of the alignment mark formed on the semiconductor substrate is particularly useful because it can detect the position of the semiconductor substrate with high accuracy. .
  • an alignment mark is generally formed on the back surface of a semiconductor substrate.
  • This invention is made
  • the objective is to provide the solar cell which has the photoelectric conversion efficiency improved in the back junction type solar cell which has marks, such as an alignment mark. is there.
  • the solar cell according to the present invention includes a solar cell substrate, a p-side electrode, an n-side electrode, and a mark.
  • the solar cell substrate has a light receiving surface and a back surface.
  • the p-type surface and the n-type surface are exposed on the back surface.
  • the p-side electrode is electrically connected to the p-type surface.
  • the n-side electrode is electrically connected to the n-type surface.
  • the mark is provided on a part of the light receiving surface.
  • the solar cell module according to the present invention includes a plurality of solar cells and a wiring material that electrically connects the plurality of solar cells.
  • the solar cell includes a solar cell substrate, a p-side electrode, an n-side electrode, and a mark.
  • the solar cell substrate has a light receiving surface and a back surface. The p-type surface and the n-type surface are exposed on the back surface.
  • the p-side electrode is electrically connected to the p-type surface.
  • the n-side electrode is electrically connected to the n-type surface.
  • the mark is provided on a part of the light receiving surface.
  • a method for manufacturing a solar cell module according to the present invention includes a plurality of solar cells and a wiring material that electrically connects the plurality of solar cells, the solar cell having a light receiving surface and a back surface, a solar cell substrate having an exposed p-type surface and an n-type surface; a p-side electrode electrically connected to the p-type surface; an n-side electrode electrically connected to the n-type surface;
  • the present invention relates to a method for manufacturing a solar cell module including a mark provided in part.
  • one side of the wiring member is electrically connected to the p-side electrode of the solar cell, and the other side is electrically connected to the n-side electrode of another solar cell.
  • a connecting step of electrically connecting a plurality of solar cells with the wiring material. In the connecting step, relative positioning of the solar cell with respect to the wiring material is performed using the mark.
  • a solar cell having improved photoelectric conversion efficiency can be provided in a back junction solar cell having a mark such as an alignment mark.
  • FIG. 1 is a schematic cross-sectional view of the solar cell module according to the first embodiment.
  • FIG. 2 is a schematic rear view of a part of the solar cell string in the first embodiment.
  • FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG.
  • FIG. 4 is a schematic rear view of the solar cell in the first embodiment.
  • FIG. 5 is a schematic plan view of the solar cell in the first embodiment.
  • 6 is a schematic cross-sectional view taken along line VI-VI in FIG.
  • FIG. 7 is a schematic plan view of the solar cell in the second embodiment.
  • FIG. 8 is a schematic cross-sectional view of a solar cell in the third embodiment.
  • FIG. 1 is a schematic cross-sectional view of the solar cell module according to the first embodiment.
  • the solar cell module 2 includes one or a plurality of solar cell strings 3. Adjacent solar cell strings are electrically connected by connection wiring.
  • a protective member 5 is disposed on the light receiving surface side of the solar cell string 3.
  • a protective member 6 is disposed on the back side of the solar cell string 3.
  • a filler layer 7 is provided between the protective member 5 and the protective member 6. The solar cell string 3 is sealed by the filler layer 7.
  • the filler layer 7 can be formed of a light-transmitting resin such as ethylene / vinyl acetate copolymer (EVA) or polyvinyl butyral (PVB).
  • EVA ethylene / vinyl acetate copolymer
  • PVB polyvinyl butyral
  • the protective members 5 and 6 can be formed of glass, resin, or the like, for example. Moreover, the protection member 6 distribute
  • a metal frame such as Al may be attached to the outer periphery of the laminate having the protective members 5 and 6, the filler layer 7 and one or a plurality of solar cell strings 3.
  • a terminal box (not shown) for taking out the output of the solar cell 1 to the outside may be provided on the surface of the protective member 6 disposed on the back side.
  • the solar cell string 3 includes a plurality of solar cells 1 arranged along the x direction.
  • the plurality of solar cells 1 are electrically connected by the wiring material 4.
  • the electrical connection aspect of the some solar cell 1 by the wiring material 4 is explained in full detail behind.
  • FIG. 4 is a schematic rear view of the solar cell in the first embodiment.
  • FIG. 5 is a schematic plan view of the solar cell in the first embodiment.
  • 6 is a schematic cross-sectional view taken along line VI-VI in FIG.
  • the solar cell 1 is a so-called back junction type solar cell.
  • the solar cell 1 includes a solar cell substrate 10.
  • the solar cell substrate 10 has a light receiving surface 10a and a back surface 10b.
  • Solar cell substrate 10 has a p-type surface 10p and an n-type surface 10n exposed on back surface 10b.
  • the solar cell substrate 10 includes a crystalline semiconductor substrate 11 having one conductivity type.
  • the crystalline semiconductor substrate 11 has a light receiving surface 11a and a back surface 11b.
  • the light receiving surface 11 a of the crystalline semiconductor substrate 11 constitutes the light receiving surface 10 a of the solar cell substrate 10.
  • the crystalline semiconductor substrate 11 may have a p-type conductivity.
  • the crystalline semiconductor substrate 11 can be made of a crystalline semiconductor such as single crystal silicon or polycrystalline silicon.
  • a p-type amorphous semiconductor layer 12p and an n-type amorphous semiconductor layer 12n are disposed on the back surface of the crystalline semiconductor substrate 11.
  • the surface of the p-type amorphous semiconductor layer 12p constitutes a p-type surface 10p.
  • the n-type surface 10n is constituted by the surface of the n-type amorphous semiconductor layer 12n.
  • the back surface 10b of the solar cell substrate 10 is constituted by the surfaces of the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n and the exposed portion of the back surface 11b of the crystalline semiconductor substrate 11. Has been.
  • the p-type amorphous semiconductor layer 12p is arranged in a line at a predetermined interval.
  • the p-type amorphous semiconductor layer 12p can be formed of, for example, p-type amorphous silicon containing hydrogen.
  • the n-type amorphous semiconductor layers 12n are arranged in a line at a predetermined interval.
  • the p-type amorphous semiconductor layers 12p and the n-type amorphous semiconductor layers 12n are alternately arranged at a predetermined interval.
  • the n-type amorphous semiconductor layer 12n can be formed of, for example, n-type amorphous silicon containing hydrogen.
  • an i-type amorphous semiconductor layer that does not substantially contribute to power generation is disposed between the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n and the crystalline semiconductor substrate 11. May be.
  • the i-type amorphous semiconductor layer can be formed of i-type amorphous silicon containing hydrogen, for example.
  • a p-side electrode 13p is disposed on the p-type amorphous semiconductor layer 12p.
  • an n-side electrode 13n is disposed on the n-type amorphous semiconductor layer 12n.
  • the n-side electrode 13n is an electrode that collects electrons that are majority carriers.
  • the p-side electrode 13p is an electrode that collects holes that are minority carriers.
  • each of the p-side electrode 13p and the n-side electrode 13n is not particularly limited.
  • Each of the p-side electrode 13p and the n-side electrode 13n can be formed of, for example, a metal such as Ag, Cu, Au, Pt, Al, Sn, or Pd, or an alloy containing one or more of these metals.
  • each of the p-side electrode 13p and the n-side electrode 13n may be configured by a stacked body of a plurality of conductive films made of the above metals or alloys.
  • the formation method of the p-side electrode 13p and the n-side electrode 13n is not particularly limited.
  • Each of the p-side electrode 13p and the n-side electrode 13n may be formed, for example, by applying a resin-type conductive paste containing conductive particles made of metal, an alloy, or the like, or formed by plating. May be.
  • Each of the p-side electrode 13p and the n-side electrode 13n may be formed by a vapor deposition method, a sputtering method, or the like.
  • This mark 15 is an alignment mark used for position detection of the solar cell substrate 10 in the present embodiment.
  • the mark may be a mark other than the alignment mark.
  • the mark may be a product information mark.
  • a plurality of types of marks such as alignment marks and product information marks may be provided.
  • the “product information mark” is a mark that can identify some information related to the solar cell 1 such as a manufacturing date, a manufacturing line, a lot number, a type of a semiconductor substrate used, and a lot number.
  • the mark 15 is optically readable. Specifically, the mark 15 is constituted by a recess. In the present embodiment, in detail, the mark 15 is formed by two grooves that are formed by laser light irradiation and intersect each other. However, in the present invention, the mark is not limited to this configuration.
  • the mark may be constituted by, for example, a dot shape, a triangle shape, a quadrilateral shape, a polygonal shape, a circular shape, an elliptical shape, or an oval shaped concave portion, or may be constituted by numbers or characters. Further, the mark may be a barcode (registered trademark) or a QR code (registered trademark) constituted by a plurality of concave portions arranged in a matrix.
  • the depth of the mark 15 is preferably smaller than the thickness of the i-type amorphous semiconductor layer 16 and the n-type amorphous semiconductor layer 17 which are passivation films.
  • the marks 15 are arranged at the corners of the light receiving surface 11a of the semiconductor substrate 11.
  • the mark 15 is provided at a position that does not overlap with either the p-side electrode 13p or the n-side electrode 13n in plan view.
  • the position where the mark 15 is provided is not particularly limited, the outer peripheral region of the light receiving surface 11a of the semiconductor substrate 11 is preferable in appearance.
  • a stacked body of an i-type amorphous semiconductor layer 16, an n-type amorphous semiconductor layer 17, and a reflection suppressing layer 18 having a thickness that does not substantially contribute to power generation is formed on the light receiving surface 10a.
  • the mark 15 is covered with this laminate.
  • the i-type amorphous semiconductor layer 16 and the n-type amorphous semiconductor layer 17 function as so-called passivation layers that suppress carrier recombination.
  • the i-type amorphous semiconductor layer 16 preferably contains hydrogen.
  • the i-type amorphous semiconductor layer 16 can be formed of, for example, i-type amorphous silicon containing hydrogen.
  • the n-type amorphous semiconductor layer 17 can be formed of, for example, n-type amorphous silicon containing hydrogen.
  • the mark 15 is covered with at least a film having a passivation function.
  • the reflection suppression layer 18 has a function of suppressing reflection of light that is about to enter the light receiving surface 10a.
  • the antireflection layer 18 can be formed of, for example, silicon nitride, but is not limited thereto.
  • FIG. 2 is a schematic rear view of a part of the solar cell string in the first embodiment.
  • FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. Next, the electrical connection mode of the plurality of solar cells 1 by the wiring member 4 will be described in detail with reference to FIGS.
  • the wiring member 4 is a printed wiring board having an insulating wiring member body 4a and wirings 4b provided on the wiring member body 4a.
  • One end of the wiring 4b of the wiring member 4 is electrically connected to the p-side electrode 13p of one solar cell 1 of the solar cells 1 adjacent in the x direction.
  • the other end of the wiring 4b is electrically connected to the n-side electrode 13n of the other solar cell 1 of the solar cells 1 adjacent in the x direction.
  • the p-side electrode 13p and the n-side electrode 13n of the adjacent solar cells 1 are electrically connected, so that a plurality of solar cells are connected in series.
  • the wiring member 4 and the solar cell substrate 10 are bonded with an adhesive.
  • an adhesive solder or a resin adhesive can be used.
  • the resin adhesive may have an insulating property or an anisotropic conductivity.
  • the adhesion process of the wiring material 4 can be made easy by using the resin adhesive which has anisotropic conductivity as an adhesive agent.
  • the mark 15 is formed by irradiating the light receiving surface 11 a of the semiconductor substrate 11 with a laser beam. As described above, the mark 15 is composed of a depression having a dot shape or a linear shape.
  • a layer having a passivation function and a layer having a reflection suppressing function are formed on the light receiving surface 11a.
  • an i-type amorphous semiconductor layer 16 and an n-type amorphous semiconductor layer 17 are formed as layers having a passivation function.
  • a reflection suppression layer 18 is formed on the surface of the n-type amorphous semiconductor layer 17 as a layer having a reflection suppression function.
  • the solar cell substrate 10 is produced by appropriately forming the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n in a predetermined pattern on the surface of the back surface 10b.
  • An intrinsic thickness between the back surface 10b and the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n that does not substantially contribute to power generation for example, a thickness of several to 250 mm.
  • An amorphous semiconductor layer may be interposed. By doing so, the junction characteristics between the semiconductor substrate 11 and the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n can be improved.
  • the i-type amorphous semiconductor layer 16, the n-type amorphous semiconductor layer 17, the p-type amorphous semiconductor layer 12p, and the n-type amorphous semiconductor layer 12n are formed by, for example, a CVD method such as a plasma CVD method. Can be formed. Further, the reflection suppressing layer 18 can be formed by a method such as a sputtering method in addition to the CVD method.
  • the solar cell 1 is completed by forming the p-side electrode 13p and the n-side electrode 13n.
  • the p-side electrode 13p and the n-side electrode 13n can be formed by, for example, applying a conductive paste, plating, vapor deposition, sputtering, or the like.
  • a connection step of electrically connecting the plurality of solar cells 1 using the wiring material 4 is performed. Specifically, one side of the wiring 4b of the wiring member 4 is electrically connected to the p-side electrode 13p of the solar cell 1, and the other side is electrically connected to the n-side electrode 13n of the other solar cell 1. Thus, the solar cell 1 and the wiring material 4 are adhere
  • the solar cell string 3 is produced by repeating this bonding step.
  • the mark 15 is used to perform relative positioning with respect to the wiring material 4 of the solar cell 1. Specifically, the mark 15 of the solar cell 1 is recognized using an image recognition device such as a camera. Then, the current position of the solar cell 1 is detected based on the recognized position of the mark 15. And the solar cell 1 and the wiring material 4 are relatively positioned based on the positional information.
  • the first resin sheet for configuring the light receiving surface side portion of the filler layer 7, the solar cell string 3, and the back surface side portion of the filler layer 7 are configured.
  • the second resin sheet and the protective member 6 are laminated.
  • the solar cell module 2 can be completed by laminating the obtained laminate.
  • the photoelectric conversion efficiency is greatly reduced when the light receiving surface 11a is damaged.
  • the manufacturing process of the solar cell module 2 it is possible to hold the light receiving surface 11a facing down and the light receiving surface 11a facing up so that the light receiving surface 11a is not in contact with other members. preferable. Therefore, for example, when a mark is provided on the back surface, it is difficult to detect the mark in the manufacturing process of the solar cell module.
  • the mark 15 is provided on the light receiving surface 11a. For this reason, even if it is a case where the solar cell module 2 is manufactured in a state where the back surface 11b is arranged to face downward, the mark 15 can be easily detected in the manufacturing process of the solar cell module 2.
  • the relative position and orientation of the solar cell 1 and the wire 4b can be easily detected from the light receiving surface 11a side.
  • the mark includes a product information mark
  • the product information can be easily detected from the light receiving surface 11a side in the manufacturing process of the solar cell module 2.
  • the mark 15 can be optically read, the mark 15 can be easily detected using an imaging device such as a camera.
  • the light receiving surface 11a is covered with an amorphous semiconductor layer as a passivation film. For this reason, it can suppress that a recombination center generate
  • the i-type amorphous semiconductor layer 16 as the passivation film of the present embodiment is made of amorphous silicon containing hydrogen, generation of recombination centers can be more effectively suppressed, and improved photoelectric conversion efficiency can be achieved. can get.
  • the thickness of the passivation film thicker than the depth of the recess (dent) constituting the mark 15, it becomes easy to cover the entire surface of the recess with the passivation film. As a result, more improved photoelectric conversion efficiency can be obtained.
  • the mark 15 is provided at a position that does not overlap the p-side electrode 13p and the n-side electrode 13n in plan view. For this reason, even if a recombination center is generated in the semiconductor substrate 11 by the mark 15, the recombination center has little influence on carrier collection. Therefore, further improved photoelectric conversion efficiency can be obtained.
  • the passivation film is configured by the i-type amorphous semiconductor layer 16 made of amorphous silicon.
  • the passivation film is not limited to one made of amorphous silicon.
  • the passivation film may be made of silicon nitride or silicon oxide. Even in that case, improved photoelectric conversion efficiency can be obtained similarly.
  • FIG. 7 is a schematic plan view of the solar cell in the second embodiment.
  • each of the p-side electrode 13p and the n-side electrode 13n is a so-called busbarless electrode configured by only a plurality of finger electrode portions extending in the x direction has been described.
  • the present invention is not limited to this configuration.
  • each of the p-side electrode 13p and the n-side electrode 13n includes a plurality of finger electrode portions 13p2 and 13n2 and a plurality of finger electrode portions 13p2 and 13n2 extending in parallel with each other along the x direction. May be electrically connected and may include bus bar portions 13p1 and 13n1 extending along the y direction.
  • the mark 15 may be arranged so as not to overlap the p-side electrode 13p and the n-side electrode 13n in plan view.
  • the n-side electrode 13n is arranged. It is arranged so as to overlap with the bus bar portion 13n1.
  • the bus bar portion 13n1 is an electrode portion that collects majority carriers in the present embodiment, if it is a portion on the bus bar portion 13n1 of the solar cell substrate 10, the photoelectric conversion efficiency is unlikely to decrease even if a recombination center occurs. Therefore, a decrease in photoelectric conversion efficiency due to the mark 15 can be suppressed.
  • FIG. 8 is a schematic cross-sectional view of a solar cell in the third embodiment.
  • the present invention is not limited to this configuration.
  • a p-type dopant diffusion region 11p in which a p-type dopant is diffused and an n-type dopant diffusion region 11n in which an n-type dopant is diffused are exposed on the surface.
  • the solar cell substrate 10 may be constituted by the semiconductor substrate 11 that is provided. Even in this case, the same effect as the first embodiment can be obtained.

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Abstract

A rear surface joining-type solar cell with a mark such as an alignment mark and which has improved photoelectric conversion efficiency is provided.　The solar cell (1) has a light-receiving surface (11a), a rear surface (11b), a solar cell substrate (10) with a p-type surface (10p) and an n-type surface (10n) exposed to the rear surface (11b) thereof, a p-side electrode (13p) electrically connected to the p-type surface (10p), and an n-side electrode (13n) electrically connected to the n-type surface (10n), and comprises a mark (15) that is disposed on part of the light-receiving surface (11a).

Description

太陽電池、太陽電池モジュール及び太陽電池モジュールの製造方法Solar cell, solar cell module and method for manufacturing solar cell module
　本発明は、裏面接合型の太陽電池、それを備える太陽電池モジュール及びその製造方法に関する。 The present invention relates to a back junction solar cell, a solar cell module including the solar cell, and a manufacturing method thereof.
　近年、環境に対する負荷が小さなエネルギー源として、太陽電池が大いに注目されている。このため、太陽電池に関する研究開発が活発に行われている。なかでも、太陽電池の光電変換効率を如何に高めるかが重要な課題となってきている。従って、向上した光電変換効率を有する太陽電池やその製造方法の研究開発が特に盛んに行われている。 In recent years, solar cells have attracted a great deal of attention as an energy source with a low environmental impact. For this reason, research and development relating to solar cells are being actively conducted. In particular, how to increase the photoelectric conversion efficiency of solar cells has become an important issue. Therefore, research and development of a solar cell having improved photoelectric conversion efficiency and a method for manufacturing the solar cell are particularly actively performed.
　光電変換効率が高い太陽電池としては、例えば下記の特許文献１などにおいて、裏面側にｐ型領域及びｎ型領域が形成されている所謂裏面接合型の太陽電池が提案されている。この裏面接合型の太陽電池では、キャリアを収集するための電極を受光面に設ける必要が必ずしもない。このため、裏面接合型の太陽電池では、光の受光効率を向上することができる。従って、より向上した光電変換効率を実現し得る。 As a solar cell having a high photoelectric conversion efficiency, for example, the following Patent Document 1 proposes a so-called back junction type solar cell in which a p-type region and an n-type region are formed on the back surface side. In this back junction solar cell, it is not always necessary to provide an electrode for collecting carriers on the light receiving surface. For this reason, in the back junction solar cell, the light receiving efficiency can be improved. Therefore, more improved photoelectric conversion efficiency can be realized.
特開２００５－２７７０５５号公報JP 2005-277055 A
　裏面接合型太陽電池は、裏面にｐ型領域及びｎ型領域が高精細に形成される。このため裏面接合型太陽電池の製造に際しては、半導体基板の位置を正確に検出した上でｐ型領域、ｎ型領域を形成する必要がある。 The back junction solar cell has a p-type region and an n-type region formed on the back surface with high definition. For this reason, when manufacturing a back junction solar cell, it is necessary to form the p-type region and the n-type region after accurately detecting the position of the semiconductor substrate.
　半導体基板の位置を検出する方向としては、例えば、半導体基板の端面の位置を検出することにより、半導体基板の位置を検出する方法や、半導体基板に形成したアライメントマークの位置を検出することにより、半導体基板の位置を検出する方法などが挙げられる。なかでも、半導体基板に形成したアライメントマークの位置を検出することにより、半導体基板の位置を検出する方法は、半導体基板の位置を高精度に検出することができる方法であるため、特に有用である。 As a direction for detecting the position of the semiconductor substrate, for example, by detecting the position of the end surface of the semiconductor substrate, by detecting the position of the semiconductor substrate, or by detecting the position of the alignment mark formed on the semiconductor substrate, For example, a method for detecting the position of the semiconductor substrate may be used. In particular, the method of detecting the position of the semiconductor substrate by detecting the position of the alignment mark formed on the semiconductor substrate is particularly useful because it can detect the position of the semiconductor substrate with high accuracy. .
　ところで、裏面接合型の太陽電池においては、上記特許文献１に記載のように、アライメントマークは、一般的に、半導体基板の裏面に形成される。 By the way, in a back junction solar cell, as described in Patent Document 1, an alignment mark is generally formed on the back surface of a semiconductor substrate.
　しかしながら、アライメントマークが形成される位置にはｐ型領域やｎ型領域、あるいは電極を形成することができないため、光電変換効率の低下を生じさせてしまう。 However, since a p-type region, an n-type region, or an electrode cannot be formed at the position where the alignment mark is formed, the photoelectric conversion efficiency is lowered.
　本発明は、斯かる点に鑑みてなされたものであり、その目的は、アライメントマーク等のマークを有する裏面接合型の太陽電池において、改善された光電変換効率を有する太陽電池を提供することにある。 This invention is made | formed in view of such a point, The objective is to provide the solar cell which has the photoelectric conversion efficiency improved in the back junction type solar cell which has marks, such as an alignment mark. is there.
　本発明に係る太陽電池は、太陽電池基板と、ｐ側電極と、ｎ側電極と、マークとを備えている。太陽電池基板は、受光面と裏面を有する。裏面には、ｐ型表面及びｎ型表面が露出している。ｐ側電極は、ｐ型表面に電気的に接続されている。ｎ側電極は、ｎ型表面に電気的に接続されている。マークは、受光面の一部に設けられている。 The solar cell according to the present invention includes a solar cell substrate, a p-side electrode, an n-side electrode, and a mark. The solar cell substrate has a light receiving surface and a back surface. The p-type surface and the n-type surface are exposed on the back surface. The p-side electrode is electrically connected to the p-type surface. The n-side electrode is electrically connected to the n-type surface. The mark is provided on a part of the light receiving surface.
　本発明に係る太陽電池モジュールは、複数の太陽電池と、複数の太陽電池を電気的に接続している配線材とを備えている。太陽電池は、太陽電池基板と、ｐ側電極と、ｎ側電極と、マークとを備えている。太陽電池基板は、受光面と裏面を有する。裏面には、ｐ型表面及びｎ型表面が露出している。ｐ側電極は、ｐ型表面に電気的に接続されている。ｎ側電極は、ｎ型表面に電気的に接続されている。マークは、受光面の一部に設けられている。 The solar cell module according to the present invention includes a plurality of solar cells and a wiring material that electrically connects the plurality of solar cells. The solar cell includes a solar cell substrate, a p-side electrode, an n-side electrode, and a mark. The solar cell substrate has a light receiving surface and a back surface. The p-type surface and the n-type surface are exposed on the back surface. The p-side electrode is electrically connected to the p-type surface. The n-side electrode is electrically connected to the n-type surface. The mark is provided on a part of the light receiving surface.
　本発明に係る太陽電池モジュールの製造方法は、複数の太陽電池と、複数の太陽電池を電気的に接続している配線材とを備え、太陽電池が、受光面と裏面を有し、裏面にｐ型表面及びｎ型表面が露出している太陽電池基板と、ｐ型表面に電気的に接続されたｐ側電極と、ｎ型表面に電気的に接続されたｎ側電極と、受光面の一部に設けられたマークとを備える太陽電池モジュールの製造方法に関する。本発明に係る太陽電池モジュールの製造方法は、配線材の一方側を太陽電池のｐ側電極に電気的に接続すると共に、他方側を他の太陽電池のｎ側電極に電気的に接続することにより複数の太陽電池を配線材により電気的に接続する接続工程を備えている。接続工程において、マークを用いて太陽電池の配線材に対する相対的な位置決めを行う。 A method for manufacturing a solar cell module according to the present invention includes a plurality of solar cells and a wiring material that electrically connects the plurality of solar cells, the solar cell having a light receiving surface and a back surface, a solar cell substrate having an exposed p-type surface and an n-type surface; a p-side electrode electrically connected to the p-type surface; an n-side electrode electrically connected to the n-type surface; The present invention relates to a method for manufacturing a solar cell module including a mark provided in part. In the method for manufacturing a solar cell module according to the present invention, one side of the wiring member is electrically connected to the p-side electrode of the solar cell, and the other side is electrically connected to the n-side electrode of another solar cell. Is provided with a connecting step of electrically connecting a plurality of solar cells with the wiring material. In the connecting step, relative positioning of the solar cell with respect to the wiring material is performed using the mark.
　本発明によれば、アライメントマーク等のマークを有する裏面接合型の太陽電池において、改善された光電変換効率を有する太陽電池を提供することができる。 According to the present invention, a solar cell having improved photoelectric conversion efficiency can be provided in a back junction solar cell having a mark such as an alignment mark.
図１は、第１の実施形態に係る太陽電池モジュールの略図的断面図である。FIG. 1 is a schematic cross-sectional view of the solar cell module according to the first embodiment. 図２は、第１の実施形態における太陽電池ストリングの一部分の略図的裏面図である。FIG. 2 is a schematic rear view of a part of the solar cell string in the first embodiment. 図３は、図２の線ＩＩＩ－ＩＩＩにおける略図的断面図である。FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. 図４は、第１の実施形態における太陽電池の略図的裏面図である。FIG. 4 is a schematic rear view of the solar cell in the first embodiment. 図５は、第１の実施形態における太陽電池の略図的平面図である。FIG. 5 is a schematic plan view of the solar cell in the first embodiment. 図６は、図５の線ＶＩ－ＶＩにおける略図的断面図である。6 is a schematic cross-sectional view taken along line VI-VI in FIG. 図７は、第２の実施形態における太陽電池の略図的平面図である。FIG. 7 is a schematic plan view of the solar cell in the second embodiment. 図８は、第３の実施形態における太陽電池の略図的断面図である。FIG. 8 is a schematic cross-sectional view of a solar cell in the third embodiment.
　以下、本発明を実施した好ましい形態の例について説明する。但し、下記の実施形態は単なる例示である。本発明は、以下の実施形態に何ら限定されない。 Hereinafter, examples of preferable embodiments in which the present invention is implemented will be described. However, the following embodiment is merely an example. The present invention is not limited to the following embodiments.
　また、実施形態等において参照する各図面において、実質的に同一の機能を有する部材は同一の符号で参照することとする。また、実施形態等において参照する図面は、模式的に記載されたものである。図面に描画された物体の寸法の比率などは、現実の物体の寸法の比率などとは異なる場合がある。図面相互間においても、物体の寸法比率等が異なる場合がある。具体的な物体の寸法比率等は、以下の説明を参酌して判断されるべきである。 In each drawing referred to in the embodiment and the like, members having substantially the same function are referred to by the same reference numerals. The drawings referred to in the embodiments and the like are schematically described. A ratio of dimensions of an object drawn in a drawing may be different from a ratio of dimensions of an actual object. The dimensional ratio of the object may be different between the drawings. The specific dimensional ratio of the object should be determined in consideration of the following description.
　《第１の実施形態》
　（太陽電池モジュール２の概略構成）
　図１は、第１の実施形態に係る太陽電池モジュールの略図的断面図である。図１に示すように、太陽電池モジュール２は、１または複数の太陽電池ストリング３を備えている。隣り合う太陽電池ストリング同士は、接続配線によって電気的に接続されている。太陽電池ストリング３の受光面側には、保護部材５が配されている。一方、太陽電池ストリング３の裏面側には、保護部材６が配されている。保護部材５と保護部材６との間には、充填剤層７が設けられている。この充填剤層７により、太陽電池ストリング３が封止されている。 << First Embodiment >>
(Schematic configuration of solar cell module 2)
FIG. 1 is a schematic cross-sectional view of the solar cell module according to the first embodiment. As shown in FIG. 1, the solar cell module 2 includes one or a plurality of solar cell strings 3. Adjacent solar cell strings are electrically connected by connection wiring. A protective member 5 is disposed on the light receiving surface side of the solar cell string 3. On the other hand, a protective member 6 is disposed on the back side of the solar cell string 3. A filler layer 7 is provided between the protective member 5 and the protective member 6. The solar cell string 3 is sealed by the filler layer 7.
　なお、充填剤層７は、例えば、エチレン・酢酸ビニル共重合体（ＥＶＡ）やポリビニルブチラール（ＰＶＢ）等の透光性を有する樹脂により形成することができる。 The filler layer 7 can be formed of a light-transmitting resin such as ethylene / vinyl acetate copolymer (EVA) or polyvinyl butyral (PVB).
　保護部材５，６は、例えば、ガラス、樹脂などにより形成することができる。また、裏面側に配された保護部材６は、アルミニウム箔などの金属箔を介在させた樹脂フィルムにより構成されていてもよい。 The protective members 5 and 6 can be formed of glass, resin, or the like, for example. Moreover, the protection member 6 distribute | arranged to the back surface side may be comprised with the resin film which interposed metal foil, such as aluminum foil.
　保護部材５，６、充填剤層７及び１または複数の太陽電池ストリング３を有する積層体の外周には、Ａｌ等の金属製の枠体（図示しない）が取り付けられていてもよい。また、裏面側に配される保護部材６の表面上には、太陽電池１の出力を外部に取り出すための端子ボックス（図示しない）が設けられていてもよい。 A metal frame (not shown) such as Al may be attached to the outer periphery of the laminate having the protective members 5 and 6, the filler layer 7 and one or a plurality of solar cell strings 3. Moreover, a terminal box (not shown) for taking out the output of the solar cell 1 to the outside may be provided on the surface of the protective member 6 disposed on the back side.
　（太陽電池ストリング３）
　太陽電池ストリング３は、ｘ方向に沿って配列された複数の太陽電池１を備えている。複数の太陽電池１は、配線材４によって電気的に接続されている。なお、配線材４による複数の太陽電池１の電気的接続態様については、後に詳述する。 (Solar cell string 3)
The solar cell string 3 includes a plurality of solar cells 1 arranged along the x direction. The plurality of solar cells 1 are electrically connected by the wiring material 4. In addition, the electrical connection aspect of the some solar cell 1 by the wiring material 4 is explained in full detail behind.
　図４は、第１の実施形態における太陽電池の略図的裏面図である。図５は、第１の実施形態における太陽電池の略図的平面図である。図６は、図５の線ＶＩ－ＶＩにおける略図的断面図である。 FIG. 4 is a schematic rear view of the solar cell in the first embodiment. FIG. 5 is a schematic plan view of the solar cell in the first embodiment. 6 is a schematic cross-sectional view taken along line VI-VI in FIG.
　太陽電池１は、所謂裏面接合型の太陽電池である。太陽電池１は、太陽電池基板１０を備えている。太陽電池基板１０は、受光面１０ａと、裏面１０ｂとを有する。太陽電池基板１０は、裏面１０ｂに露出するｐ型表面１０ｐ及びｎ型表面１０ｎとを有する。 The solar cell 1 is a so-called back junction type solar cell. The solar cell 1 includes a solar cell substrate 10. The solar cell substrate 10 has a light receiving surface 10a and a back surface 10b. Solar cell substrate 10 has a p-type surface 10p and an n-type surface 10n exposed on back surface 10b.
　具体的には、本実施形態では、太陽電池基板１０は、一の導電型を有する結晶性半導体基板１１を有する。結晶性半導体基板１１は、受光面１１ａと裏面１１ｂとを有する。この結晶性半導体基板１１の受光面１１ａが、太陽電池基板１０の受光面１０ａを構成している。なお、本実施形態では、結晶性半導体基板１１の導電型がｎ型である例について説明するが、結晶性半導体基板の導電型はｐ型であってもよい。 Specifically, in this embodiment, the solar cell substrate 10 includes a crystalline semiconductor substrate 11 having one conductivity type. The crystalline semiconductor substrate 11 has a light receiving surface 11a and a back surface 11b. The light receiving surface 11 a of the crystalline semiconductor substrate 11 constitutes the light receiving surface 10 a of the solar cell substrate 10. In this embodiment, an example in which the crystalline semiconductor substrate 11 has an n-type conductivity will be described. However, the crystalline semiconductor substrate may have a p-type conductivity.
　結晶性半導体基板１１は、例えば、単結晶シリコンまたは多結晶シリコン等の結晶性半導体により構成することができる。 The crystalline semiconductor substrate 11 can be made of a crystalline semiconductor such as single crystal silicon or polycrystalline silicon.
　結晶性半導体基板１１の裏面の上には、ｐ型非晶質半導体層１２ｐと、ｎ型非晶質半導体層１２ｎとが配されている。ｐ型非晶質半導体層１２ｐの表面により、ｐ型表面１０ｐが構成されている。ｎ型非晶質半導体層１２ｎの表面により、ｎ型表面１０ｎが構成されている。本実施形態では、これらｐ型非晶質半導体層１２ｐ及びｎ型非晶質半導体層１２ｎの表面と、結晶性半導体基板１１の裏面１１ｂの露出部とにより、太陽電池基板１０の裏面１０ｂが構成されている。 On the back surface of the crystalline semiconductor substrate 11, a p-type amorphous semiconductor layer 12p and an n-type amorphous semiconductor layer 12n are disposed. The surface of the p-type amorphous semiconductor layer 12p constitutes a p-type surface 10p. The n-type surface 10n is constituted by the surface of the n-type amorphous semiconductor layer 12n. In the present embodiment, the back surface 10b of the solar cell substrate 10 is constituted by the surfaces of the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n and the exposed portion of the back surface 11b of the crystalline semiconductor substrate 11. Has been.
　ｐ型非晶質半導体層１２ｐは、所定の間隔を隔ててライン状に配されている。ｐ型非晶質半導体層１２ｐは、例えば、水素を含むｐ型アモルファスシリコンにより形成することができる。 The p-type amorphous semiconductor layer 12p is arranged in a line at a predetermined interval. The p-type amorphous semiconductor layer 12p can be formed of, for example, p-type amorphous silicon containing hydrogen.
　ｎ型非晶質半導体層１２ｎは、所定の間隔を隔ててライン状に配されている。ｐ型非晶質半導体層１２ｐとｎ型非晶質半導体層１２ｎとは、所定の間隔を隔てて交互に配されている。ｎ型非晶質半導体層１２ｎは、例えば、水素を含むｎ型アモルファスシリコンにより形成することができる。 The n-type amorphous semiconductor layers 12n are arranged in a line at a predetermined interval. The p-type amorphous semiconductor layers 12p and the n-type amorphous semiconductor layers 12n are alternately arranged at a predetermined interval. The n-type amorphous semiconductor layer 12n can be formed of, for example, n-type amorphous silicon containing hydrogen.
　なお、ｐ型非晶質半導体層１２ｐ及びｎ型非晶質半導体層１２ｎと、結晶性半導体基板１１との間に、実質的に発電に寄与しない程度のｉ型非晶質半導体層を配してもよい。ｉ型非晶質半導体層は、例えば、水素を含むｉ型アモルファスシリコンにより形成することができる。 Note that an i-type amorphous semiconductor layer that does not substantially contribute to power generation is disposed between the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n and the crystalline semiconductor substrate 11. May be. The i-type amorphous semiconductor layer can be formed of i-type amorphous silicon containing hydrogen, for example.
　ｐ型非晶質半導体層１２ｐの上には、ｐ側電極１３ｐが配されている。一方、ｎ型非晶質半導体層１２ｎの上には、ｎ側電極１３ｎが配されている。上述の通り、本実施形態では、結晶性半導体基板１１がｎ型であるため、ｎ側電極１３ｎが、多数キャリアである電子を収集する電極である。一方、ｐ側電極１３ｐが、少数キャリアである正孔を収集する電極である。 A p-side electrode 13p is disposed on the p-type amorphous semiconductor layer 12p. On the other hand, an n-side electrode 13n is disposed on the n-type amorphous semiconductor layer 12n. As described above, in this embodiment, since the crystalline semiconductor substrate 11 is n-type, the n-side electrode 13n is an electrode that collects electrons that are majority carriers. On the other hand, the p-side electrode 13p is an electrode that collects holes that are minority carriers.
　ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれの材質は特に限定されない。ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれは、例えば、Ａｇ，Ｃｕ，Ａｕ，Ｐｔ，Ａｌ，Ｓｎ，Ｐｄなどの金属やそれらの金属の一種以上を含む合金により形成することができる。また、ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれは、上記金属や合金からなる複数の導電膜の積層体により構成されていてもよい。 The material of each of the p-side electrode 13p and the n-side electrode 13n is not particularly limited. Each of the p-side electrode 13p and the n-side electrode 13n can be formed of, for example, a metal such as Ag, Cu, Au, Pt, Al, Sn, or Pd, or an alloy containing one or more of these metals. In addition, each of the p-side electrode 13p and the n-side electrode 13n may be configured by a stacked body of a plurality of conductive films made of the above metals or alloys.
　ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれの形成方法も特に限定されない。ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれは、例えば、金属や合金などからなる導電性粒子を含む樹脂型の導電性ペーストを塗布することにより形成されていてもよいし、めっきにより形成されていてもよい。また、ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれは、蒸着法やスパッタ法等によって形成されていてもよい。 The formation method of the p-side electrode 13p and the n-side electrode 13n is not particularly limited. Each of the p-side electrode 13p and the n-side electrode 13n may be formed, for example, by applying a resin-type conductive paste containing conductive particles made of metal, an alloy, or the like, or formed by plating. May be. Each of the p-side electrode 13p and the n-side electrode 13n may be formed by a vapor deposition method, a sputtering method, or the like.
　結晶性半導体基板１１の受光面１１ａ（本実施形態においては、受光面１１ａ＝受光面１０ａ）には、マーク１５が形成されている。このマーク１５は、本実施形態においては、太陽電池基板１０の位置検出に用いられるアライメントマークである。もっとも、本発明においては、マークは、アライメントマーク以外のマークであってもよい。例えば、マークは、製品情報マークであってもよい。また、アライメントマークや製品情報マークなどの複数種類のマークが設けられていてもよい。 A mark 15 is formed on the light receiving surface 11a of the crystalline semiconductor substrate 11 (in this embodiment, the light receiving surface 11a = the light receiving surface 10a). This mark 15 is an alignment mark used for position detection of the solar cell substrate 10 in the present embodiment. However, in the present invention, the mark may be a mark other than the alignment mark. For example, the mark may be a product information mark. A plurality of types of marks such as alignment marks and product information marks may be provided.
　なお、本発明において、「製品情報マーク」とは、製造年月日、製造ライン、ロット番号、使用した半導体基板の種類、ロット番号などの太陽電池１に関する何らかの情報が識別可能なマークである。 In the present invention, the “product information mark” is a mark that can identify some information related to the solar cell 1 such as a manufacturing date, a manufacturing line, a lot number, a type of a semiconductor substrate used, and a lot number.
　本実施形態では、マーク１５は、光学的に読み取り可能なものである。具体的には、マーク１５は、凹部により構成されている。本実施形態では、詳細には、マーク１５は、レーザー光の照射により形成され、互いに交差する２本の溝により構成されている。但し、本発明において、マークは、この構成に限定されない。マークは、例えばドット状、三角形状、四辺形状、多角形状、円形状、楕円形状または長円形状の凹部により構成されていてもよいし、数字や文字により構成されていてもよい。また、マークは、マトリクス状に配置された複数の凹部により構成されたバーコード（登録商標）やＱＲコード（登録商標）であってもよい。 In the present embodiment, the mark 15 is optically readable. Specifically, the mark 15 is constituted by a recess. In the present embodiment, in detail, the mark 15 is formed by two grooves that are formed by laser light irradiation and intersect each other. However, in the present invention, the mark is not limited to this configuration. The mark may be constituted by, for example, a dot shape, a triangle shape, a quadrilateral shape, a polygonal shape, a circular shape, an elliptical shape, or an oval shaped concave portion, or may be constituted by numbers or characters. Further, the mark may be a barcode (registered trademark) or a QR code (registered trademark) constituted by a plurality of concave portions arranged in a matrix.
　マーク１５の深さは、パッシベーション膜であるｉ型非晶質半導体層１６及びｎ型非晶質半導体層１７の厚みよりも小さいことが好ましい。 The depth of the mark 15 is preferably smaller than the thickness of the i-type amorphous semiconductor layer 16 and the n-type amorphous semiconductor layer 17 which are passivation films.
　本実施形態において、マーク１５は、半導体基板１１の受光面１１ａの角部に配されている。マーク１５は、平面視において、ｐ側電極１３ｐ及びｎ側電極１３ｎのいずれとも重ならない位置に設けられている。尚、マーク１５を設ける位置は特に限定されるものではないが、外観上、半導体基板１１の受光面１１ａの外周領域が好ましい。 In the present embodiment, the marks 15 are arranged at the corners of the light receiving surface 11a of the semiconductor substrate 11. The mark 15 is provided at a position that does not overlap with either the p-side electrode 13p or the n-side electrode 13n in plan view. Although the position where the mark 15 is provided is not particularly limited, the outer peripheral region of the light receiving surface 11a of the semiconductor substrate 11 is preferable in appearance.
　受光面１０ａの上には、実質的に発電に寄与しない程度の厚みのｉ型非晶質半導体層１６と、ｎ型非晶質半導体層１７と、反射抑制層１８との積層体が形成されている。上記マーク１５は、この積層体により覆われている。 On the light receiving surface 10a, a stacked body of an i-type amorphous semiconductor layer 16, an n-type amorphous semiconductor layer 17, and a reflection suppressing layer 18 having a thickness that does not substantially contribute to power generation is formed. ing. The mark 15 is covered with this laminate.
　ｉ型非晶質半導体層１６及びｎ型非晶質半導体層１７は、キャリアの再結合を抑制する、所謂パッシベーション層として機能する。ｉ型非晶質半導体層１６は、水素を含んでいることが好ましい。ｉ型非晶質半導体層１６は、例えば、水素を含むｉ型アモルファスシリコンにより形成することができる。ｎ型非晶質半導体層１７は、例えば、水素を含むｎ型アモルファスシリコンにより形成することができる。上記マーク１５は、少なくともパッシベーション機能を有する膜に覆われている。 The i-type amorphous semiconductor layer 16 and the n-type amorphous semiconductor layer 17 function as so-called passivation layers that suppress carrier recombination. The i-type amorphous semiconductor layer 16 preferably contains hydrogen. The i-type amorphous semiconductor layer 16 can be formed of, for example, i-type amorphous silicon containing hydrogen. The n-type amorphous semiconductor layer 17 can be formed of, for example, n-type amorphous silicon containing hydrogen. The mark 15 is covered with at least a film having a passivation function.
　反射抑制層１８は、受光面１０ａへと入射しようとする光の反射を抑制する機能を有する。反射抑制層１８は、例えば、窒化ケイ素により形成することができるが、これに限るものではない。 The reflection suppression layer 18 has a function of suppressing reflection of light that is about to enter the light receiving surface 10a. The antireflection layer 18 can be formed of, for example, silicon nitride, but is not limited thereto.
　図２は、第１の実施形態における太陽電池ストリングの一部分の略図的裏面図である。図３は、図２の線ＩＩＩ－ＩＩＩにおける略図的断面図である。次に、図２及び図３を参照しながら、配線材４による複数の太陽電池１の電気的接続態様について詳細に説明する。 FIG. 2 is a schematic rear view of a part of the solar cell string in the first embodiment. FIG. 3 is a schematic cross-sectional view taken along line III-III in FIG. Next, the electrical connection mode of the plurality of solar cells 1 by the wiring member 4 will be described in detail with reference to FIGS.
　本実施形態において、配線材４は、絶縁性の配線材本体４ａと、配線材本体４ａに設けられた配線４ｂとを有するプリント配線基板である。この配線材４の配線４ｂの一方側端部は、ｘ方向に隣り合う太陽電池１の一方の太陽電池１のｐ側電極１３ｐと電気的に接続されている。一方、配線４ｂの他方側端部は、ｘ方向に隣り合う太陽電池１の他方の太陽電池１のｎ側電極１３ｎと電気的に接続されている。これにより、隣り合う太陽電池１のｐ側電極１３ｐとｎ側電極１３ｎとが電気的に接続されることによって、複数の太陽電池が直列に接続されている。 In the present embodiment, the wiring member 4 is a printed wiring board having an insulating wiring member body 4a and wirings 4b provided on the wiring member body 4a. One end of the wiring 4b of the wiring member 4 is electrically connected to the p-side electrode 13p of one solar cell 1 of the solar cells 1 adjacent in the x direction. On the other hand, the other end of the wiring 4b is electrically connected to the n-side electrode 13n of the other solar cell 1 of the solar cells 1 adjacent in the x direction. Thereby, the p-side electrode 13p and the n-side electrode 13n of the adjacent solar cells 1 are electrically connected, so that a plurality of solar cells are connected in series.
　なお、配線材４と太陽電池基板１０とは、接着剤によって接着されている。接着剤としては、半田または樹脂接着剤を用いることができる。接着剤として樹脂接着剤を用いる場合には、樹脂接着剤は絶縁性を有するものであってもよいし、異方導電性を有するものであってもよい。尚、接着剤として異方導電性を有する樹脂接着剤を用いることにより、配線材４の接着工程を容易にすることができる。 The wiring member 4 and the solar cell substrate 10 are bonded with an adhesive. As the adhesive, solder or a resin adhesive can be used. When a resin adhesive is used as the adhesive, the resin adhesive may have an insulating property or an anisotropic conductivity. In addition, the adhesion process of the wiring material 4 can be made easy by using the resin adhesive which has anisotropic conductivity as an adhesive agent.
　（太陽電池モジュール２の製造方法）
　次に、太陽電池モジュール２の製造方法の一例について説明する。 (Method for manufacturing solar cell module 2)
Next, an example of a method for manufacturing the solar cell module 2 will be described.
　まず、結晶性半導体からなる半導体基板１１を用意する。次に、半導体基板１１の受光面１１ａにレーザー光線を照射することによりマーク１５を形成する。マーク１５は前述の通り、ドット状や線状の形状を有する窪みから構成される。 First, a semiconductor substrate 11 made of a crystalline semiconductor is prepared. Next, the mark 15 is formed by irradiating the light receiving surface 11 a of the semiconductor substrate 11 with a laser beam. As described above, the mark 15 is composed of a depression having a dot shape or a linear shape.
　その後、受光面１１ａの上に、パッシベーション機能を有する層及び反射抑制機能を有する層を形成する。具体的に、パッシベーション機能を有する層としてｉ型非晶質半導体層１６及びｎ型非晶質半導体層１７を形成する。ｎ型非晶質半導体層１７の表面上に反射抑制機能を有する層として反射抑制層１８を形成する。また、裏面１０ｂの表面上に、ｐ型非晶質半導体層１２ｐ及びｎ型非晶質半導体層１２ｎを所定のパターンで適宜形成することにより、太陽電池基板１０を作製する。なお、裏面１０ｂとｐ型非晶質半導体層１２ｐ及びｎ型非晶質半導体層１２ｎの間のそれぞれに、実質的に発電に寄与しない程度の厚み、例えば数Å～２５０Åの厚みを有する真性の非晶質半導体層を介挿してもよい。このようにすることで、半導体基板１１とｐ型非晶質半導体層１２ｐ及びｎ型非晶質半導体層１２ｎとの間の接合特性を良好なものにすることができる。上記のｉ型非晶質半導体層１６、ｎ型非晶質半導体層１７、ｐ型非晶質半導体層１２ｐ及びｎ型非晶質半導体層１２ｎは、例えば、プラズマＣＶＤ法などのＣＶＤ法などにより形成することができる。また、反射抑制層１８はＣＶＤ法の他スパッタ法などの方法によっても形成することができる。 Thereafter, a layer having a passivation function and a layer having a reflection suppressing function are formed on the light receiving surface 11a. Specifically, an i-type amorphous semiconductor layer 16 and an n-type amorphous semiconductor layer 17 are formed as layers having a passivation function. A reflection suppression layer 18 is formed on the surface of the n-type amorphous semiconductor layer 17 as a layer having a reflection suppression function. Moreover, the solar cell substrate 10 is produced by appropriately forming the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n in a predetermined pattern on the surface of the back surface 10b. An intrinsic thickness between the back surface 10b and the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n that does not substantially contribute to power generation, for example, a thickness of several to 250 mm. An amorphous semiconductor layer may be interposed. By doing so, the junction characteristics between the semiconductor substrate 11 and the p-type amorphous semiconductor layer 12p and the n-type amorphous semiconductor layer 12n can be improved. The i-type amorphous semiconductor layer 16, the n-type amorphous semiconductor layer 17, the p-type amorphous semiconductor layer 12p, and the n-type amorphous semiconductor layer 12n are formed by, for example, a CVD method such as a plasma CVD method. Can be formed. Further, the reflection suppressing layer 18 can be formed by a method such as a sputtering method in addition to the CVD method.
　次に、ｐ側電極１３ｐとｎ側電極１３ｎとを形成することにより太陽電池１を完成させる。ｐ側電極１３ｐとｎ側電極１３ｎは、例えば、導電性ペーストの塗布、めっき法、蒸着法、スパッタ法等により形成することができる。 Next, the solar cell 1 is completed by forming the p-side electrode 13p and the n-side electrode 13n. The p-side electrode 13p and the n-side electrode 13n can be formed by, for example, applying a conductive paste, plating, vapor deposition, sputtering, or the like.
　次に、複数の太陽電池１を配線材４を用いて電気的に接続する接続工程を行う。具体的には、配線材４の配線４ｂの一方側が太陽電池１のｐ側電極１３ｐに電気的に接続されると共に、他方側が他の太陽電池１のｎ側電極１３ｎに電気的に接続されるように、太陽電池１と配線材４とを接着剤により接着する（接着工程）。この接着工程を繰り返し行うことにより、太陽電池ストリング３を作製する。 Next, a connection step of electrically connecting the plurality of solar cells 1 using the wiring material 4 is performed. Specifically, one side of the wiring 4b of the wiring member 4 is electrically connected to the p-side electrode 13p of the solar cell 1, and the other side is electrically connected to the n-side electrode 13n of the other solar cell 1. Thus, the solar cell 1 and the wiring material 4 are adhere | attached with an adhesive agent (bonding process). The solar cell string 3 is produced by repeating this bonding step.
　この接着工程においては、マーク１５を用いて太陽電池１の配線材４に対する相対的な位置決めを行う。具体的には、太陽電池１のマーク１５を、カメラなどの画像認識装置を用いて認識する。そして、認識されたマーク１５の位置に基づいて太陽電池１の現在の位置を検出する。そして、その位置情報に基づいて、太陽電池１と配線材４とを相対的に位置決めする。 In this bonding step, the mark 15 is used to perform relative positioning with respect to the wiring material 4 of the solar cell 1. Specifically, the mark 15 of the solar cell 1 is recognized using an image recognition device such as a camera. Then, the current position of the solar cell 1 is detected based on the recognized position of the mark 15. And the solar cell 1 and the wiring material 4 are relatively positioned based on the positional information.
　最後に、保護部材５の上に、充填剤層７の受光面側の部分を構成するための第１の樹脂シート、太陽電池ストリング３、充填剤層７の裏面側の部分を構成するための第２の樹脂シート及び保護部材６を積層する。次に、得られた積層体をラミネートすることにより、太陽電池モジュール２を完成させることができる。 Finally, on the protective member 5, the first resin sheet for configuring the light receiving surface side portion of the filler layer 7, the solar cell string 3, and the back surface side portion of the filler layer 7 are configured. The second resin sheet and the protective member 6 are laminated. Next, the solar cell module 2 can be completed by laminating the obtained laminate.
　ところで、裏面接合型の太陽電池１では、受光面１１ａが損傷すると光電変換効率が大きく低下してしまう。このため、太陽電池モジュール２の製造工程においては、受光面１１ａが他の部材と非接触となるように、裏面１１ｂ側を下に向け、受光面１１ａを上に向けた状態に保持することが好ましい。よって、例えば、裏面にマークを設けた場合は、太陽電池モジュールの製造工程においてマークの検出が困難となる。 By the way, in the back junction solar cell 1, the photoelectric conversion efficiency is greatly reduced when the light receiving surface 11a is damaged. For this reason, in the manufacturing process of the solar cell module 2, it is possible to hold the light receiving surface 11a facing down and the light receiving surface 11a facing up so that the light receiving surface 11a is not in contact with other members. preferable. Therefore, for example, when a mark is provided on the back surface, it is difficult to detect the mark in the manufacturing process of the solar cell module.
　それに対して本実施形態では、マーク１５が受光面１１ａに設けられている。このため、裏面１１ｂが下を向くように配置した状態で太陽電池モジュール２の製造を行った場合であっても、太陽電池モジュール２の製造工程においてマーク１５を容易に検出することができる。 In contrast, in the present embodiment, the mark 15 is provided on the light receiving surface 11a. For this reason, even if it is a case where the solar cell module 2 is manufactured in a state where the back surface 11b is arranged to face downward, the mark 15 can be easily detected in the manufacturing process of the solar cell module 2.
　例えば、配線材４による太陽電池１の電気的接続の際にも受光面１１ａ側から容易に太陽電池１と配線４ｂとの相対的な位置や姿勢を検出することができる。また、例えば、マークが製品情報マークを含む場合には、太陽電池モジュール２の製造工程において、受光面１１ａ側から、容易に製品情報を検出することができる。 For example, even when the solar cell 1 is electrically connected by the wiring member 4, the relative position and orientation of the solar cell 1 and the wire 4b can be easily detected from the light receiving surface 11a side. For example, when the mark includes a product information mark, the product information can be easily detected from the light receiving surface 11a side in the manufacturing process of the solar cell module 2.
　また、本実施形態では、マーク１５が光学的に読み取り可能であるため、カメラ等の撮像装置を用いてマーク１５を容易に検出することができる。 In this embodiment, since the mark 15 can be optically read, the mark 15 can be easily detected using an imaging device such as a camera.
　また、受光面１１ａがパッシベーション膜としての非晶質半導体層により覆われている。このため、受光面１１ａのマーク１５が設けられた部分に再結合中心が発生することを抑制できる。従って、改善された光電変換効率を得ることができる。特に、本実施形態のパッシベーション膜としてのｉ型非晶質半導体層１６は、水素を含むアモルファスシリコンからなるため、再結合中心の発生をより効果的に抑制で、より改善された光電変換効率が得られる。また、パッシベーション膜の厚みをマーク１５を構成する凹部（窪み）の深さより厚くすることで、凹部の全面をパッシベーション膜によって覆うことが容易になる。この結果、より改善された光電変換効率を得ることができる。 Further, the light receiving surface 11a is covered with an amorphous semiconductor layer as a passivation film. For this reason, it can suppress that a recombination center generate | occur | produces in the part in which the mark 15 of the light-receiving surface 11a was provided. Therefore, improved photoelectric conversion efficiency can be obtained. In particular, since the i-type amorphous semiconductor layer 16 as the passivation film of the present embodiment is made of amorphous silicon containing hydrogen, generation of recombination centers can be more effectively suppressed, and improved photoelectric conversion efficiency can be achieved. can get. In addition, by making the thickness of the passivation film thicker than the depth of the recess (dent) constituting the mark 15, it becomes easy to cover the entire surface of the recess with the passivation film. As a result, more improved photoelectric conversion efficiency can be obtained.
　さらに、本実施形態では、マーク１５が平面視において、ｐ側電極１３ｐ及びｎ側電極１３ｎと重ならない位置に設けられている。このため、マーク１５により半導体基板１１に再結合中心が発生したとしても、その再結合中心がキャリアの収集に及ぼす影響が少ない。従って、さらに改善された光電変換効率を得ることができる。 Furthermore, in this embodiment, the mark 15 is provided at a position that does not overlap the p-side electrode 13p and the n-side electrode 13n in plan view. For this reason, even if a recombination center is generated in the semiconductor substrate 11 by the mark 15, the recombination center has little influence on carrier collection. Therefore, further improved photoelectric conversion efficiency can be obtained.
　なお、本実施形態では、パッシベーション膜がアモルファスシリコンからなるｉ型非晶質半導体層１６により構成されている例について説明した。但し、本発明においてパッシベーション膜は、アモルファスシリコンからなるものに限定されない。パッシベーション膜は、窒化ケイ素や酸化ケイ素からなるものであってもよい。その場合であっても同様に、改善された光電変換効率を得ることができる。 In the present embodiment, the example in which the passivation film is configured by the i-type amorphous semiconductor layer 16 made of amorphous silicon has been described. However, in the present invention, the passivation film is not limited to one made of amorphous silicon. The passivation film may be made of silicon nitride or silicon oxide. Even in that case, improved photoelectric conversion efficiency can be obtained similarly.
　以下、本発明を実施した好ましい形態の他の例について説明する。なお、以下の説明において、上記第１の実施形態と実質的に共通の機能を有する部材を共通の符号で参照し、説明を省略する。 Hereinafter, other examples of preferred embodiments in which the present invention is implemented will be described. In the following description, members having substantially the same functions as those of the first embodiment are referred to by the same reference numerals, and description thereof is omitted.
　（第２の実施形態）
　図７は、第２の実施形態における太陽電池の略図的平面図である。 (Second Embodiment)
FIG. 7 is a schematic plan view of the solar cell in the second embodiment.
　上記第１の実施形態では、ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれが、ｘ方向に延びる複数のフィンガー電極部のみにより構成された所謂バスバーレスの電極である例について説明した。但し、本発明は、この構成に限定されない。 In the first embodiment, an example in which each of the p-side electrode 13p and the n-side electrode 13n is a so-called busbarless electrode configured by only a plurality of finger electrode portions extending in the x direction has been described. However, the present invention is not limited to this configuration.
　例えば、図７に示すように、ｐ側電極１３ｐ及びｎ側電極１３ｎのそれぞれは、ｘ方向に沿って相互に平行に延びる複数のフィンガー電極部１３ｐ２，１３ｎ２と、複数のフィンガー電極部１３ｐ２，１３ｎ２が電気的に接続されており、ｙ方向に沿って延びるバスバー部１３ｐ１，１３ｎ１とを備えていてもよい。この場合において、上記第１の実施形態と同様に、平面視においてマーク１５をｐ側電極１３ｐ及びｎ側電極１３ｎと重ならないように配してもよいが、本実施形態では、ｎ側電極１３ｎのバスバー部１３ｎ１と重なるように配されている。バスバー部１３ｎ１は、本実施形態において多数キャリアを収集する電極部であるため、太陽電池基板１０のバスバー部１３ｎ１上の部分であれば、再結合中心が生じても光電変換効率が低下しにくい。従って、マーク１５による光電変換効率の低下を抑制することができる。 For example, as illustrated in FIG. 7, each of the p-side electrode 13p and the n-side electrode 13n includes a plurality of finger electrode portions 13p2 and 13n2 and a plurality of finger electrode portions 13p2 and 13n2 extending in parallel with each other along the x direction. May be electrically connected and may include bus bar portions 13p1 and 13n1 extending along the y direction. In this case, as in the first embodiment, the mark 15 may be arranged so as not to overlap the p-side electrode 13p and the n-side electrode 13n in plan view. However, in this embodiment, the n-side electrode 13n is arranged. It is arranged so as to overlap with the bus bar portion 13n1. Since the bus bar portion 13n1 is an electrode portion that collects majority carriers in the present embodiment, if it is a portion on the bus bar portion 13n1 of the solar cell substrate 10, the photoelectric conversion efficiency is unlikely to decrease even if a recombination center occurs. Therefore, a decrease in photoelectric conversion efficiency due to the mark 15 can be suppressed.
　（第３の実施形態）
　図８は、第３の実施形態における太陽電池の略図的断面図である。 (Third embodiment)
FIG. 8 is a schematic cross-sectional view of a solar cell in the third embodiment.
　上記第１の実施形態では、太陽電池基板１０が、半導体基板１１と、ｎ型非晶質半導体層１２ｎと、ｐ型非晶質半導体層１２ｐとにより構成されている例について説明した。但し、本発明は、この構成に限定されない。例えば、図８に示すように、ｐ型のドーパントが拡散しているｐ型ドーパント拡散領域１１ｐと、ｎ型のドーパントが拡散しているｎ型ドーパント拡散領域１１ｎとが表面に露出するように形成されている半導体基板１１により太陽電池基板１０を構成してもよい。この場合であっても、上記第１の実施形態と同様の効果が得られる。 In the first embodiment, the example in which the solar cell substrate 10 includes the semiconductor substrate 11, the n-type amorphous semiconductor layer 12n, and the p-type amorphous semiconductor layer 12p has been described. However, the present invention is not limited to this configuration. For example, as shown in FIG. 8, a p-type dopant diffusion region 11p in which a p-type dopant is diffused and an n-type dopant diffusion region 11n in which an n-type dopant is diffused are exposed on the surface. The solar cell substrate 10 may be constituted by the semiconductor substrate 11 that is provided. Even in this case, the same effect as the first embodiment can be obtained.
　１…太陽電池
　２…太陽電池モジュール
　３…太陽電池ストリング
　４…配線材
　４ａ…基板本体
　４ｂ…配線
　１０…太陽電池基板
　１１ａ…太陽電池基板の受光面
　１１ｂ…太陽電池基板の裏面
　１０ｎ…ｎ型表面
　１０ｐ…ｐ型表面
　１１…半導体基板
　１１ａ…半導体基板の受光面
　１１ｂ…半導体基板の裏面
　１１ｎ…ｎ型ドーパント拡散領域
　１１ｐ…ｐ型ドーパント拡散領域
　１２ｎ…ｎ型非晶質半導体層
　１２ｐ…ｐ型非晶質半導体層
　１３ｎ…ｎ側電極
　１３ｐ…ｐ側電極
　１３ｐ１、１３ｎ１…バスバー部
　１３ｐ２、１３ｎ２…フィンガー電極部
　１５…マーク
　１６…ｉ型非晶質半導体層 DESCRIPTION OF SYMBOLS 1 ... Solar cell 2 ... Solar cell module 3 ... Solar cell string 4 ... Wiring material 4a ... Substrate body 4b ... Wiring 10 ... Solar cell substrate 11a ... Photosensitive surface 11b ... Solar cell substrate back surface 10n ... N-type surface 10p ... p-type surface 11 ... semiconductor substrate 11a ... light-receiving surface of semiconductor substrate 11b ... back surface of semiconductor substrate 11n ... n-type dopant diffusion region 11p ... p-type dopant diffusion region 12n ... n-type amorphous semiconductor layer 12p ... p-type non-layer Crystalline semiconductor layer 13n ... n-side electrode 13p ... p-side electrode 13p1, 13n1 ... bus bar part 13p2, 13n2 ... finger electrode part 15 ... mark 16 ... i-type amorphous semiconductor layer

Claims (13)

  1. 　受光面と裏面を有し、前記裏面にｐ型表面及びｎ型表面が露出している太陽電池基板と、
    　前記ｐ型表面に電気的に接続されたｐ側電極と、
    　前記ｎ型表面に電気的に接続されたｎ側電極と、
    　前記受光面の一部に設けられたマークと、
    を備える、
    　太陽電池。     A solar cell substrate having a light receiving surface and a back surface, the p-type surface and the n-type surface being exposed on the back surface;
    A p-side electrode electrically connected to the p-type surface;
    An n-side electrode electrically connected to the n-type surface;
    A mark provided on a part of the light receiving surface;
    Comprising
    Solar cell.
  2. 　前記マークは、光学的に読取可能である、
    　請求項１に記載の太陽電池。     The mark is optically readable;
    The solar cell according to claim 1.
  3. 　前記受光面の前記マークが設けられている部分を覆うパッシベーション膜を備える、請求項１または２に記載の太陽電池。 The solar cell according to claim 1, further comprising a passivation film that covers a portion of the light receiving surface where the mark is provided.
  4. 　前記パッシベーション膜が、アモルファスシリコン、窒化ケイ素または酸化ケイ素からなる、請求項３に記載の太陽電池。 The solar cell according to claim 3, wherein the passivation film is made of amorphous silicon, silicon nitride, or silicon oxide.
  5. 　前記マークは、平面視において、前記ｐ側電極及び前記ｎ側電極と重ならない位置に設けられている、請求項１乃至４のいずれかに記載の太陽電池。 The solar cell according to any one of claims 1 to 4, wherein the mark is provided at a position that does not overlap the p-side electrode and the n-side electrode in plan view.
  6. 　前記ｎ側電極及び前記ｐ側電極のうち、多数キャリアを収集する電極は、線状の複数の第１の電極部と、前記複数の第１の電極部が電気的に接続された第２の電極部とを含み、
    　前記マークは、平面視において、前記第２の電極部と重なる位置に設けられている、請求項１乃至４のいずれかに記載の太陽電池。     Of the n-side electrode and the p-side electrode, the electrode that collects majority carriers is a second plurality of linear first electrode portions and a second one in which the plurality of first electrode portions are electrically connected. Including an electrode part,
    5. The solar cell according to claim 1, wherein the mark is provided at a position overlapping the second electrode portion in plan view.
  7. 　前記マークは、アライメントマーク及び製品情報マークの少なくとも一方を含む、請求項１乃至６のいずれかに記載の太陽電池。 The solar cell according to any one of claims 1 to 6, wherein the mark includes at least one of an alignment mark and a product information mark.
  8. 　前記マークは、凹部により構成されている、請求項１乃至７のいずれかに記載の太陽電池。 The solar cell according to any one of claims 1 to 7, wherein the mark is constituted by a concave portion.
  9. 　前記パッシベーション膜の厚みは、前記凹部の深さより大きい、請求項８に記載の太陽電池。 The solar cell according to claim 8, wherein the thickness of the passivation film is larger than the depth of the recess.
  10. 　複数の太陽電池と、前記複数の太陽電池を電気的に接続している配線材とを備え、
    　前記太陽電池は、受光面と裏面を有し、前記裏面にｐ型表面及びｎ型表面が露出している太陽電池基板と、前記ｐ型表面に電気的に接続されたｐ側電極と、前記ｎ型表面に電気的に接続されたｎ側電極と、前記受光面の一部に設けられたマークとを備える、太陽電池モジュール。     A plurality of solar cells, and a wiring member electrically connecting the plurality of solar cells,
    The solar cell has a light-receiving surface and a back surface, a p-type surface and an n-type surface are exposed on the back surface, a p-side electrode electrically connected to the p-type surface, A solar cell module comprising an n-side electrode electrically connected to an n-type surface and a mark provided on a part of the light receiving surface.
  11. 　前記受光面の前記マークが設けられている部分を覆うパッシベーション膜を備える、請求項１０に記載の太陽電池モジュール。 The solar cell module according to claim 10, further comprising a passivation film that covers a portion of the light receiving surface where the mark is provided.
  12. 　前記配線材が、隣り合う前記太陽電池の一方の太陽電池の前記ｐ側電極と他方の太陽電池の前記ｎ側電極とを電気的に接続しているプリント配線基板である、請求項１０または１１に記載の太陽電池モジュール。 The said wiring material is the printed wiring board which has electrically connected the said p side electrode of one solar cell of the said adjacent solar cell, and the said n side electrode of the other solar cell. The solar cell module according to.
  13. 　複数の太陽電池と、前記複数の太陽電池を電気的に接続している配線材とを備え、前記太陽電池が、受光面と裏面を有し、前記裏面にｐ型表面及びｎ型表面が露出している太陽電池基板と、前記ｐ型表面に電気的に接続されたｐ側電極と、前記ｎ型表面に電気的に接続されたｎ側電極と、前記受光面の一部に設けられたマークとを備える太陽電池モジュールの製造方法であって、
    　前記配線材の一方側を前記太陽電池の前記ｐ側電極に電気的に接続すると共に、他方側を他の前記太陽電池の前記ｎ側電極に電気的に接続することにより前記複数の太陽電池を前記配線材により電気的に接続する接続工程を備え、
    　前記接続工程において、前記マークを用いて前記太陽電池の前記配線材に対する相対的な位置決めを行う、太陽電池モジュールの製造方法。     A plurality of solar cells, and a wiring member electrically connecting the plurality of solar cells, the solar cell having a light receiving surface and a back surface, and a p-type surface and an n-type surface exposed on the back surface. A solar cell substrate, a p-side electrode electrically connected to the p-type surface, an n-side electrode electrically connected to the n-type surface, and a part of the light receiving surface A solar cell module manufacturing method comprising a mark,
    While electrically connecting one side of the wiring material to the p-side electrode of the solar cell and electrically connecting the other side to the n-side electrode of the other solar cell, the plurality of solar cells A connection step of electrically connecting with the wiring material;
    The method for manufacturing a solar cell module, wherein in the connecting step, the solar cell module is positioned relative to the wiring member using the mark.
PCT/JP2011/077768 2010-12-29 2011-12-01 Solar cell, solar cell module, and production method for solar cell module WO2012090640A1 (en)

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