WO2012090409A1 - 時分割受信機及び時分割受信方法 - Google Patents
時分割受信機及び時分割受信方法 Download PDFInfo
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- WO2012090409A1 WO2012090409A1 PCT/JP2011/006980 JP2011006980W WO2012090409A1 WO 2012090409 A1 WO2012090409 A1 WO 2012090409A1 JP 2011006980 W JP2011006980 W JP 2011006980W WO 2012090409 A1 WO2012090409 A1 WO 2012090409A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/06—Receivers
- H04B1/16—Circuits
- H04B1/163—Special arrangements for the reduction of the damping of resonant circuits of receivers
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- the present invention relates to a time division receiver and a time division reception method for performing reception processing of a time division multiplexed signal.
- MIMO Multiple Input Multiple Output
- the MIMO technology is used in many wireless standards.
- a plurality of high frequency circuits are required. Therefore, the circuit scale or power consumption increases as the number of high frequency circuits increases. Therefore, in order to suppress an increase in circuit scale and power consumption, it is necessary to realize a time division system capable of processing a plurality of branches (also referred to as streams) by using one high frequency circuit in a time division manner. It was.
- Patent Document 1 and Patent Document 2 describe a technique of using an RF (Radio Frequency) circuit in a time-sharing manner.
- Patent Document 1 describes an RF circuit of a time division receiver constituted by a mixer.
- Patent Document 2 describes a technology of a direct sampling mixer (Direct Sampling Mixer: DSM).
- DSM Direct Sampling Mixer
- Inter-branch leakage means that signals are mixed between branches. Inter-branch leakage occurs when a high frequency circuit used in time division includes an element having frequency characteristics in a time division receiver.
- This frequency characteristic is formed by parasitic capacitance. Therefore, ideally, if parasitic capacitance does not occur in the high-frequency circuit, frequency characteristics are not formed, and leakage between branches does not occur.
- the elements constituting the actual high frequency circuit have parasitic capacitance, and it is very difficult to completely eliminate the frequency characteristics. Therefore, when an element having a parasitic capacitance is shared between branches, a signal component before branch switching is charged as a charge in the parasitic capacitance, and the charged charge has an influence after branch switching. As a result, the time division receiver has a problem that leakage between branches occurs, MIMO decoding processing becomes difficult, and reception characteristics of the MIMO system deteriorate. It has been found that this problem appears more prominently when the time division receiver is adapted to a higher-speed and broadband wireless transmission system. Therefore, mitigation of inter-branch leakage is considered an indispensable technique for realizing a high-speed time division receiver.
- An object of the present invention is to provide a time division receiver and a time division receiver capable of reducing inter-branch leakage even when a time division multiplexed signal in which a plurality of branches are time division multiplexed is processed by a single high frequency circuit. It is to provide a receiving method.
- the time division receiver of the present invention includes a mixer that downconverts a time division multiplexed signal in which a plurality of branch signals are time division multiplexed, and a separation that separates the time division multiplexed signal downconverted by the mixer into each branch signal. And an initialization unit that initializes the charge remaining when the first branch signal passes through the parasitic capacitance generated in the path between the mixer and the separation unit before the second branch signal passes through.
- the structure which comprises is taken.
- the time division reception method of the present invention down-converts a time-division multiplexed signal obtained by time-division-multiplexing a plurality of branch signals, separates the down-converted time-division multiplexed signal into each branch signal, and downconverts the time-division multiplexed signal.
- the charge remaining when the first branch signal passes through the parasitic capacitance generated in the path through which the time division multiplexed signal passes is initialized before the second branch signal passes through.
- the block diagram which shows the structure of the time division receiver to which this invention is applied The figure which shows the control signal supplied from a control signal generation circuit
- the figure which shows the control signal supplied from a control signal generation circuit A diagram conceptually showing the parasitic capacitance generated in the time-division signal line
- FIG. The figure which shows the electric charge of the parasitic capacitance of the positive phase circuit and the reverse phase circuit
- FIG. 3 is a block diagram showing another configuration of the time division receiver according to the first embodiment.
- FIG. 3 is a block diagram showing still another configuration of the time division receiver according to the first embodiment.
- FIG. 3 is a block diagram showing still another configuration of the time division receiver according to the first embodiment.
- FIG. 3 is a block diagram showing still another configuration of the time division receiver according to the first embodiment.
- the block diagram which shows the structure of the time division receiver which concerns on Embodiment 2 of this invention.
- a diagram conceptually showing the parasitic capacitance generated in the time-division signal line The figure which shows the internal structure of the residual charge initialization part which concerns on Embodiment 2.
- FIG. 3 is a block diagram showing another configuration of the time division receiver according to the first embodiment.
- FIG. 3 is a block diagram showing still another configuration of the time division receiver according to the first embodiment.
- FIG. 3 is a block diagram showing still another configuration of the time division receiver according to the first embodiment.
- the block diagram which shows the structure of the time
- FIG. 9 is a block diagram showing another configuration of the time division receiver according to the third embodiment.
- FIG. 9 is a block diagram showing still another configuration of the time division receiver according to the third embodiment.
- FIG. 9 is a block diagram showing still another configuration of the time division receiver according to the third embodiment.
- FIG. 9 is a block diagram showing still another configuration of the time division receiver according to the third embodiment.
- the block diagram which shows the structure of the time division receiver which concerns on Embodiment 4 of this invention.
- the block diagram which shows the structure of the time division receiver to which this invention is applied
- Block diagram showing a configuration of a time division receiver according to a fifth embodiment of the present invention Diagram showing spectrum of desired signal and aliasing signal
- FIG. 9 is a block diagram showing a configuration of another time division receiver according to the fifth embodiment.
- FIG. 10 is a block diagram showing still another configuration of the time division receiver according to the fifth embodiment.
- FIG. 10 is a block diagram showing still another configuration of the time division receiver according to the fifth embodiment.
- FIG. 10 is a block diagram showing still another configuration of the time division receiver according to the fifth embodiment.
- FIG. 10 is a block diagram showing a configuration of still another time division receiver according to the fifth embodiment.
- the figure which shows an example of the control signal in case the number of branches is 3.
- FIG. 1 is a block diagram showing a configuration of a time division receiver to which the present invention is applied. 1 employs a configuration in which the number of branches is two, in which the first branch and the second branch are time-division multiplexed into one system.
- the time division receiver 100 includes a time division multiplexing unit 110, a mixer 120, a time division separation unit 130, and a control signal generation circuit 140.
- the control signal generation circuit 140 supplies a control signal (clock) to the time division multiplexing unit 110 and the time division separation unit 130. Specifically, the control signal generation circuit 140 generates SW1 and SW2 and supplies them to the time division multiplexing unit 110 and the time division separation unit 130.
- FIG. 2 is a diagram illustrating the control signals SW1 and SW2 supplied from the control signal generation circuit 140.
- control signal generation circuit 140 generates a local signal LO p . Then, the control signal generation circuit 140 supplies the local signal LO p to the mixer 120.
- the time division multiplexing unit 110 has input terminals 111 and 112.
- the input terminal 111 receives a high frequency signal of the first branch.
- a high frequency signal of the second branch is input to the input terminal 112.
- the time division multiplexing unit 110 generates a single time division multiplexed signal by time division multiplexing the high frequency signals of the first and second branches according to SW1 and SW2. Specifically, the time division multiplexing unit 110 outputs the high frequency signal of the first branch input from the input terminal 111 to the mixer 120 during the period in which SW1 is active. In addition, the time division multiplexing unit 110 outputs the high-frequency signal of the second branch input from the input terminal 112 to the mixer 120 while SW2 is active.
- the branch switching speed needs to be higher than the symbol rate of the high-frequency signal. In this way, the time division multiplexing unit 110 generates a time division multiplexed signal and outputs it to the mixer 120.
- the mixer 120 performs frequency conversion (down-conversion) on the time division multiplexed signal using the local signal LO p to generate a baseband time division multiplexed signal (hereinafter abbreviated as a baseband signal).
- the data is output to the division / separation unit 130.
- the time division separation unit 130 has output terminals 131 and 132. Then, the time division separation unit 130 separates the baseband signal into the first and second branches according to SW1 and SW2. Specifically, the time division separation unit 130 outputs the baseband signal to the output terminal 131 during the period when SW1 is active. Further, the time division separation unit 130 outputs the baseband signal to the output terminal 132 during the period in which SW2 is active. As described above, the time division separation unit 130 separates the baseband signal into the first and second branches at the same branch switching speed as the time division multiplexing unit 110.
- the configuration of the time division receiver 100 to which the present invention is applied has been described above. Next, the time division receiver according to the present embodiment will be described.
- FIG. 3 is a block diagram showing the configuration of the time division receiver 100A according to the present embodiment.
- the same components as those in FIG. 1 are denoted by the same reference numerals as those in FIG.
- the time division receiver 100A includes a time division multiplexing unit 110, mixers 120-1 and 120-2, time division separation units 130-1 and 130-2, a control signal generation circuit 140A, and a reverse phase signal generation unit 150. And a residual charge initialization unit 160.
- the mixer 120-1 and the time division separator 130-1 process the positive phase signal in the differential system. Further, the mixer 120-2 and the time division separation unit 130-2 process the reverse phase signal in the differential system.
- processing units that process normal phase signals are collectively referred to as a normal phase circuit, and processing units that process reverse phase signals are collectively referred to as a negative phase circuit.
- the path between the time division multiplexing unit 110 and the mixer 120-1 and the path between the anti-phase signal generation unit 150 and the mixer 120-2 are each a time division shared signal line 170-. 1, 170-2.
- the path between the mixer 120-1 and the time division separation unit 130-1 (the output path of the mixer 120-1) is referred to as a time division shared signal line 180-1.
- the path between the mixer 120-2 and the time division separation unit 130-2 (the output path of the mixer 120-2) is called a time division shared signal line 180-2.
- the control signal generation circuit 140A supplies control signals to the time division multiplexing unit 110, the time division separation units 130-1 and 130-2, and the residual charge initialization unit 160. Specifically, the control signal generation circuit 140A generates control signals for SW1, SW2, and SWc. Then, the control signal generation circuit 140A supplies SW1 and SW2 to the time division multiplexing unit 110 and the time division separation units 130-1 and 130-2. In addition, the control signal generation circuit 140A supplies SWc to the residual charge initialization unit 160. The control signal generation circuit 140A generates a local signal LO p and supplies it to the mixers 120-1 and 120-2.
- FIG. 4 is a diagram illustrating the control signals SW1, SW2, and SWc supplied from the control signal generation circuit 140A. Details of SW1, SW2, and SWc will be described later.
- control signal generation circuit 140A generates a local signal LO p . Then, the control signal generation circuit 140A supplies the local signal LO p to the mixers 120-1 and 120-2.
- the time division multiplexing unit 110 generates a single time division multiplexed signal by time division multiplexing the high frequency signals of the first and second branches according to SW1 and SW2. Specifically, the time division multiplexing unit 110 outputs the high-frequency signal of the first branch to the mixer 120-1 and the reverse phase signal generation unit 150 during the period in which SW1 is active. In addition, the time division multiplexing unit 110 outputs the second branch high-frequency signal to the mixer 120-1 and the reverse phase signal generation unit 150 during a period in which SW 2 is active. Note that the time division multiplexing unit 110 outputs nothing to the mixer 120-1 and the anti-phase signal generation unit 150 during a period in which neither SW1 nor SW2 is active (ie, a period in which SWc is active).
- the reverse phase signal generation unit 150 inverts the phase of the time division multiplexed signal, generates a reverse phase time division multiplexed signal, and outputs the generated signal to the mixer 120-2.
- the mixers 120-1 and 120-2 perform frequency conversion (down-conversion) on the time-division multiplexed signal using the local signal LO p , and the base-band time-division multiplexed signal (baseband) Signal). Specifically, the mixer 120-1 down-converts the positive-phase time division multiplexed signal to generate a positive-phase baseband signal. Further, the mixer 120-2 down-converts the reverse phase time division multiplexed signal to generate a reverse phase baseband signal.
- the positive-phase baseband signal is output to the time division separation unit 130-1 via the time division shared signal line 180-1.
- the negative-phase baseband signal is output to the time division separation unit 130-2 via the time division shared signal line 180-2.
- the time division separation units 130-1 and 130-2 have output terminals 131 and 132. Then, the time division separation units 130-1 and 130-2 separate the baseband signal into the first and second branches according to SW1 and SW2. Specifically, the time division separation units 130-1 and 130-2 output the baseband signal to the output terminal 131 during the period when SW1 is active. Further, the time division separation units 130-1 and 130-2 output the baseband signal to the output terminal 132 during the period in which SW2 is active. As described above, the time division demultiplexing units 130-1 and 130-2 demultiplex the time division multiplexed signal into the first and second branches at the same branch switching speed as the time division multiplexing unit 110.
- the residual charge initialization unit 160 initializes the charge remaining in the parasitic capacitance of the time division receiver 100A.
- the time division shared signal lines 170-1 and 170-2, the mixers 120-1 and 120-2, and the time division shared signal lines 180-1 and 180-2 are shared by the first and second branches.
- the in the following, the time division shared signal lines 170-1 and 170-2, the mixers 120-1 and 120-2, and the time division shared signal lines 180-1 and 180-2, which are shared by the first and second branches, are This is referred to as a division / use part.
- the time division shared signal lines 170-1 and 170-2, the mixers 120-1 and 120-2, and the time division shared signal lines 180-1 and 180-2 all have frequency characteristics. .
- the LO (Local) frequency used when the mixers 120-1 and 120-2 down-convert and the branch switching speed are greatly different.
- the LO frequency is about 2 GHz, while the branch switching speed is about 100 MHz. That is, in the time division receiver 100A, the mixers 120-1 and 120-2 are simply considered as elements for frequency shifting from the first frequency to the second frequency. Since the branch switching speed is extremely slow compared to the LO frequency, it is considered that the frequency characteristics in the mixers 120-1 and 120-2 need not be considered.
- the parasitic capacitance in the mixers 120-1 and 120-2 need not be taken into consideration.
- the frequency of the signals of the first and second branches passing through the time division shared signal lines 170-1 and 170-2 is high, the frequency characteristics are considered in the same manner as the mixers 120-1 and 120-2. It is thought that it is not necessary to do.
- the down-converted baseband signal passes through the time division shared signal lines 180-1 and 180-2.
- the frequency of the baseband signal is a low frequency, for example, about 5 MHz. Therefore, since the frequency of the baseband signal is close to the branch switching speed as compared with the frequency of the high-frequency signal, it is considered that the frequency characteristics in the time division shared signal lines 180-1 and 180-2 need to be considered. Therefore, it is considered that parasitic capacitance is generated in the time division shared signal lines 180-1 and 180-2.
- FIG. 5 is a diagram conceptually showing the parasitic capacitance generated in the time division shared signal lines 180-1 and 180-2.
- parasitic capacitances 190-1 and 190-2 are parasitic capacitances generated in the time division shared signal lines 180-1 and 180-2.
- signal components before branch switching remain.
- the time division receiver 100A connects the residual charge initialization unit 160 to the time division shared signal lines 180-1 and 180-2 (output paths of the mixers 120-1 and 120-2). It was.
- the residual charge initialization unit 160 initializes the charge remaining in the parasitic capacitors 190-1 and 190-2 (hereinafter referred to as residual charge).
- FIG. 6 is a diagram showing an internal configuration and connection of the residual charge initialization unit 160.
- the residual charge initialization unit 160 includes a switch 161.
- connection destinations of the switch 161 one is connected to the output path of the mixer 120-1 of the positive phase circuit, and the other is connected to the output path of the mixer 120-2 of the negative phase circuit.
- the switch 161 is turned ON / OFF according to SWc, whereby the normal phase circuit and the negative phase circuit are turned on or off. Specifically, during a period in which SWc is active, the switch 161 is turned on, and the normal phase circuit and the negative phase circuit become conductive. Further, during a period in which SWc is inactive, the switch 161 is turned OFF, and the normal phase circuit and the negative phase circuit are rendered non-conductive.
- control signal output from the control signal generation circuit 140A will be described with reference to FIG.
- SW1 is a control signal for the time division multiplexing unit 110 and the time division separation units 130-1 and 130-2 to select the first branch.
- SW2 is a control signal for the time division multiplexing unit 110 and the time division separation units 130-1 and 130-2 to select the second branch.
- SW1 and SW2 for switching the first and second branches are the same control signals in the time division multiplexing unit 110 and the time division separation units 130-1 and 130-2.
- the speeds of SW1 and SW2 are higher than the symbol rate.
- SW1 and SW2 are not active at the same time, and there is a period during which both SW1 and SW2 are inactive.
- the period in which both SW1 and SW2 are inactive is a period in which the time division multiplexed signal is no signal.
- the period in which both SW1 and SW2 are inactive and the time division multiplexed signal is no signal (hereinafter referred to as “no signal period”) is the active period of SWc.
- the residual charge initialization unit 160 initializes the charges (residual charges) charged in the parasitic capacitors 190-1 and 190-2 during the SWc active period, that is, the no-signal period.
- the SWc active period should be allocated the time required to initialize this residual charge. However, a large amount of charge moves to the parasitic capacitance in the early stage when charging is started. Therefore, the initialization of the residual charge has an effect of reducing the leakage between the branches even when the residual charge is initialized and reduced only for a period shorter than the period in which the residual charge is actually charged. Therefore, the active period of SWc may be shorter than the time required to fully initialize the residual charge.
- the active period of SWc is a period in which both SW1 and SW2 are inactive (no signal period)
- the active period of SW1 or SW2 becomes shorter.
- shortening the active period of SW1 or SW2 becomes a factor of deteriorating the pass gain characteristic of the signal of the branch whose active period is shortened.
- shortening the active period of SWc makes it impossible to sufficiently initialize the residual charge and deteriorates the inter-branch leakage characteristics. Therefore, the active period of SWc needs to be determined in consideration of a trade-off between the pass gain characteristic and the inter-branch leak characteristic.
- FIG. 7 is a diagram showing charges (residual charges) generally charged in the parasitic capacitances of the positive phase circuit and the negative phase circuit of the differential system.
- the residual charges in the positive phase circuit and the negative phase circuit have symmetry. Therefore, when the positive phase circuit and the negative phase circuit are conducted, the residual charges of the positive phase circuit and the negative phase circuit are canceled out.
- FIG. 8 is a diagram showing charges (residual charges) charged in the parasitic capacitances 190-1 and 190-2 of the time division receiver 100A in the present embodiment.
- the residual charge initialization unit 160 initializes the residual charge during the period when SWc is active. Specifically, the switch 161 is turned on during a period in which SWc is active, and the normal phase circuit and the negative phase circuit are conducted (short between differentials). As a result, the charges (residual charges) charged in the parasitic capacitors 190-1 and 190-2 are canceled and the residual charges are initialized.
- the active period of SWc is provided between the active period of SW1 and the active period of SW2. Then, a differential short-circuit is performed during the active period of SWc.
- the time division receiver 100A allows the signals after branch switching to be performed after the charges (residual charges) charged in the parasitic capacitors 190-1 and 190-2 are initialized. It will pass 180-2. Therefore, the time division receiver 100A can avoid mixing the signal after the branch switching and the signal before the branch switching, and can reduce the leakage between the branches. As a result, the time division receiver 100A can suppress the degradation of the MIMO reception characteristics.
- FIG. 9 is a diagram showing charges (residual charges) charged in the parasitic capacitances of the normal phase circuit and the reverse phase circuit of the time division receiver 100 of FIG. That is, FIG. 9 shows an example when the residual charge is not initialized.
- the solid line indicates the residual charge before and after branch switching of the time division receiver 100.
- the dotted line indicates the residual charge after branch switching in the case of an ideal time division receiver in which the time division shared portion of the time division receiver 100 does not have frequency characteristics.
- the signal of the second branch is input while the signal component of the first branch remains in the parasitic capacitance. Therefore, as shown by the solid line in FIG. 9, it can be seen that the residual charge is large after branch switching, and the signal components of the first and second branches are mixed.
- the time division receiver 100A according to the present embodiment can reduce the inter-branch leak and can suppress the degradation of the MIMO reception characteristics.
- the residual charge initialization unit 160 initializes the residual charge generated in the path through which the time division multiplexed signal passes every time the branch is switched. Specifically, the time division receiver 100A cancels the residual charges generated in the path through which the time division multiplexed signal passes between the differentials in the differential system.
- the switch 161 connects the output path of the mixer 120-1 and the output path of the mixer 120-2 in the active period of SWc, that is, the no-signal period.
- the time division receiver 100A cancels the charge remaining in the parasitic capacitor 190-1 of the positive phase circuit and the charge remaining in the parasitic capacitor 190-2 of the negative phase circuit.
- the residual charge initialization unit 160 initializes the charge remaining when the first branch signal passes through the parasitic capacitance generated in the output path before the second branch signal passes through. Thereby, the time division receiver 100A can reduce the leakage between branches.
- a positive phase circuit and a negative phase circuit basically have symmetry, but they do not necessarily have strictly perfect symmetry. Therefore, the time division receiver 100A is not always able to completely initialize the residual charge. However, even when the normal phase circuit and the reverse phase circuit do not have complete symmetry, the time division receiver 100A can obtain the effect of reducing the leakage between branches with a very simple configuration.
- FIG. 10 is a block diagram showing another configuration of the time division receiver according to the present embodiment.
- the time division receiver 100A of FIG. 3 includes a reverse phase signal generation unit 150 at the subsequent stage of the time division multiplexing unit 110.
- the time division receiver 100B of FIG. 10 includes anti-phase signal generation units 150-1 and 150-2 before the time division multiplexing units 110-1 and 110-2.
- the operations of the time division multiplexing units 110-1 and 110-2 and the antiphase signal generation units 150-1 and 150-2 are the same as those of the time division multiplexing unit 110 and the antiphase signal generation unit 150, respectively. Is omitted.
- FIG. 11 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 100C in FIG. 11 has a configuration in which the control signal generation circuit 140B is provided instead of the control signal generation circuit 140A, and the reverse phase signal generation unit 150 is deleted from the time division receiver 100A in FIG. take.
- control signal generation circuit 140B Similar to the control signal generation circuit 140A, the control signal generation circuit 140B generates control signals for SW1, SW2, and SWc, and a local signal LO p . Furthermore, the control signal generation circuit 140B generates a local signal LO N obtained by inverting the phase of the local signal LO p, and supplies the local signal LO N to the mixer 120-2. As a result, a reverse-phase baseband signal is output from the mixer 120-2.
- FIG. 12 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 100D in FIG. 12 adopts a configuration in which the anti-phase signal generation units 150-1 and 150-2 are deleted from the time division receiver 100B in FIG.
- the time division receiver 100D of FIG. 12 is a configuration example in the case where a normal phase signal of the first and second branches and a negative phase signal of the first and second branches are respectively input.
- FIG. 13 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 100E of FIG. 13 has a control signal generation circuit 140B instead of the control signal generation circuit 140A, and has anti-phase signal generation units 150-1 and 150- in contrast to the time division receiver 100B of FIG.
- the configuration in which 2 is deleted is adopted.
- the control signal generation circuit 140B supplies the local signal LO N obtained by inverting the phase of the local signal LO p to the mixer 120-2. As a result, a reverse-phase baseband signal is output from the mixer 120-2.
- the present invention is applied to the time division receiver 100 in which the high-frequency circuit that is also used in time division is configured by a mixer.
- the configuration of the time division receiver 100 to which the present invention is applicable is not limited to this.
- a similar effect can be obtained by providing the residual charge initialization unit 160 in the receiver.
- FIG. 14 is a block diagram showing a configuration of a time division receiver according to the embodiment of the present invention.
- the time division receiver 200 in FIG. 14 includes residual charge initialization units 210-1 and 210-2 in place of the residual charge initialization unit 160 with respect to the time division receiver 100A in FIG.
- FIG. 15 is a diagram conceptually showing the parasitic capacitance generated in the time division shared signal lines 180-1 and 180-2.
- parasitic capacitances 190-1 and 190-2 are parasitic capacitances generated in the time division shared signal lines 180-1 and 180-2.
- signal components before branch switching remain.
- FIG. 16 is a diagram showing an internal configuration and connection of the residual charge initialization unit 210-1 (210-2) according to the present embodiment.
- the residual charge initialization unit 210-1 (210-2) according to the present embodiment includes a charge applying unit (voltage source) 211 and a switch 161.
- the switch 161 is turned on while the SWc is active, whereby the normal phase (reverse phase) circuit and the charge applying unit 211 are conducted. Similarly to the first embodiment, the switch 161 is turned off during a period in which SWc is inactive, whereby the normal phase (reverse phase) circuit and the charge providing unit 211 become non-conductive.
- the charge applying unit 211 supplies electric charge to the parasitic capacitance 190-1 (190-2) when conducting, and sets the electric charge of the parasitic capacitance 190-1 (190-2) to the reference charge level. In this way, the residual charge initialization unit 210-1 (210-2) initializes the charge charged in the parasitic capacitance 190-1 (190-2).
- the residual charge initialization unit 210-1 includes the charge applying unit 211 and the switch 161.
- the switch 161 controls connection or disconnection between the charge applying unit 211 and the output path of the mixer 120-1 (120-2) every time the branch is switched. Specifically, the switch 161 connects the charge applying unit 211 and the output path of the mixer 120-1 (120-2) during the SWc active period, that is, the no-signal period.
- the charge applying unit 211 supplies charges to the parasitic capacitance 190-1 (190-2) when conducting. In this way, in the residual charge initialization unit 210-1 (210-2), the second branch signal passes the charge remaining when the first branch signal passes through the parasitic capacitance generated in the output path. Initialize before. Thereby, the time division receiver 200 can reduce the leakage between branches.
- the time division receiver 200 is more accurate than the time division receivers 100A and 100B according to the first embodiment. Inter-branch leakage can be reduced.
- this embodiment can be applied not only to a differential system but also to a non-differential system.
- the charge imparting unit 211 that can supply charges stably is prepared, a higher inter-branch leakage mitigation performance can be obtained compared to the first embodiment, but the circuit impact Is big.
- FIG. 17 is a block diagram showing a configuration of a time division receiver to which the present invention is applied.
- a time division receiver 300 in FIG. 17 is a time division receiver in which a high frequency circuit is configured by a DSM.
- the time division receiver 300 includes a time division multiplexing unit 110, a time division separation unit 130, a TA (Transconductance Amplifier) 310, a sampler 320, a history capacitor unit 330, an SCF (Switched Capacity Filter) 340. , A buffer capacitor unit 350, and a control signal generation circuit 360.
- TA Transconductance Amplifier
- SCF Switchched Capacity Filter
- the control signal generation circuit 360 supplies control signals to the time division multiplexing unit 110, the time division separation unit 130, the history capacitor unit 330, the SCF 340, and the buffer capacitor unit 350.
- control signal generation circuit 360 generates control signals for SW11, SW12, SW21, SW22, and S0 to S3. Then, the control signal generation circuit 360 supplies SW11 and SW12 to the time division multiplexing unit 110 and the history capacitor unit 330. Further, the control signal generation circuit 360 supplies SW21 and SW22 to the buffer capacitor unit 350 and the time division separation unit 130. Further, the control signal generation circuit 360 supplies S0 to S3 to the SCF 340.
- FIG. 18 is a diagram showing the control signals SW11, SW12, SW21, SW22, S0 to S3 supplied from the control signal generation circuit 360. Details of these control signals will be described later.
- control signal generation circuit 360 generates a local signal LO p . Then, the control signal generation circuit 360 supplies the local signal LO p to the sampler 320.
- TA 310 converts the time-division multiplexed signal from a voltage signal to a current signal, and outputs it to the sampler 320 as an analog RF current signal.
- the sampler 320 is composed of, for example, an FET (Field Effect Transistor), samples an analog RF current signal using a local signal LO p , and performs frequency conversion (down-conversion).
- FET Field Effect Transistor
- the signals output from the TA 310 and the sampler 320 are current signals, and the current signals are output to the time division separation unit 130. In the subsequent processing, this current signal is also operated.
- the history capacitor unit 330 includes switches 331 and 333 and Ch (history capacitors) 332 and 334.
- the switches 331 and 333 are turned ON / OFF according to SW11 and SW12, respectively. Specifically, the switch 331 is turned on while the SW11 is active and turned off when the SW11 is inactive. In addition, the switch 333 is turned on when the SW 12 is active and turned off when the SW 12 is inactive.
- Ch332 is a history capacity for the first branch
- Ch334 is a history capacity for the second branch.
- the Ch 332 for the first branch and the Ch 334 for the second branch are prepared in the output path of the sampler 320. These capacitors are controlled to be connected to or disconnected from the output path of the sampler 320 by the switches 331 and 333.
- the SCF 340 repeatedly charges and discharges the rotate capacitor, which will be described later, according to S0 to S3, filters the current signal output from the sampler 320, and outputs the filtered signal to the time division separation unit 130.
- the detailed configuration of the SCF 340 will be described later.
- the buffer capacitor unit 350 includes switches 351 and 353 and Cb (buffer capacitors) 352 and 354.
- Switches 351 and 353 are turned ON / OFF according to SW21 and SW22, respectively. Specifically, the switch 351 is turned on when the SW 21 is active and turned off when the SW 21 is inactive. In addition, the switch 353 is turned on when the SW 22 is active and turned off when the SW 22 is inactive.
- Cb 352 is a buffer capacity for the first branch
- Cb 354 is a buffer capacity for the second branch.
- the Cb 352 for the first branch and the Cb 354 for the second branch are prepared in the output path of the SCF 340. These capacitors are controlled to be connected to or disconnected from the output path of the SCF 340 by the switches 351 and 353.
- FIG. 19 is a diagram illustrating an example of a detailed configuration inside the SCF 340 of FIG.
- the SCF 340 is divided into four paths between input and output.
- the path 1 includes switches 410, 412, 413, 414, and Cr (rotate capacitor) 411.
- the path 2 includes switches 420, 422, 423, 424, and Cr 421.
- the path 3 includes switches 430, 432, 433, 434, and Cr 431.
- the path 4 includes switches 440, 442, 443, 444, and Cr 441.
- the switches 410, 420, 430, and 440 are switches for input control.
- the switches 412, 422, 432, and 442 are discharge switches.
- the switches 413, 423, 433, and 443 are precharge voltage supply switches.
- the switches 414, 424, 434, 444 are output control switches.
- the SCF 340 has exactly the same configuration for four paths. Each switch is controlled by S0 to S3 supplied from the control signal generation circuit 360.
- the switch 413 is turned on, and the precharge voltage is supplied to the Cr 411 as an initial charge.
- the switch 414 is turned on, and charge sharing is performed between Cr 411 and the buffer capacitor unit 350 subsequent to the SCF 340.
- the process of shifting these four states by one state is performed on the remaining three paths.
- charge sharing is performed between Ch in the history capacitor unit 330 and Cr in the SCF 340, and further between Cr in the SCF 340 and Cb in the buffer capacitor unit 350.
- the SCF 340 forms a second-order IIR (Infinite Impulse Response) filter.
- SW 11 and SW 12 are control signals supplied to the time division multiplexing unit 110 and the switches 331 and 333 of the history capacitor unit 330.
- SW21 and SW22 are control signals supplied to the time division separation unit 130 and the switches 351 and 333 of the buffer capacitor unit 350.
- the first branch In the active period of SW11 and SW21, the first branch is selected, and in the active period of SW12 and SW22, the second branch is selected.
- the reason why SW21 and SW22 are delayed by one time cycle with respect to SW11 and SW12 is that the input signal is delayed by one time cycle in SCF340.
- the configuration of the time division receiver 300 to which the present invention is applied has been described above.
- parasitic capacitance is generated in the output path of the sampler 320 (the input path of the SCF 340) and the output path of the SCF 340. Therefore, in the time division receiver 300, the signal component before the branch switching is affected by the charge (residual charge) generated by remaining in these parasitic capacitances, and leakage between branches occurs. Therefore, in this embodiment, a time division receiver that can reduce inter-branch leakage when the high-frequency circuit is configured by DSM will be described.
- FIG. 20 is a block diagram showing a configuration of a time division receiver 300A according to the present embodiment.
- the same components as those in FIG. 17 are denoted by the same reference numerals as those in FIG.
- the time division receiver 300A includes a time division multiplexing unit 110, a TA 310, samplers 320-1, 320-2, a negative phase signal generation unit 150, a history capacitor unit 330-1, 330-2, an SCF 340-1, 340-2, buffer capacitor units 350-1 and 350-2, residual charge initialization units 370-1 and 370-2, a control signal generation circuit 360A, and time division separation units 130-1 and 130-2.
- the sampler 320-1, the history capacitor unit 330-1, the SCF 340-1, and the buffer capacitor unit 350-1 process the positive phase signal in the differential system.
- the sampler 320-2, the history capacitor unit 330-2, the SCF 340-2, and the buffer capacitor unit 350-2 process a reverse phase signal in the differential system.
- processing units that process normal phase signals are collectively referred to as a normal phase circuit, and processing units that process reverse phase signals are collectively referred to as a negative phase circuit.
- the path between the sampler 320-1 and the SCF 340-1 (the input path of the SCF 340-1) is referred to as a time division shared signal line 390-1.
- the path between the sampler 320-2 and the SCF 340-2 (the input path of the SCF 340-2) is referred to as a time division shared signal line 390-2.
- the path between the SCF 340-1 and the time division separation unit 130-1 (the output path of the SCF 340-1) is referred to as a time division shared signal line 390-3.
- a path between the SCF 340-2 and the time division separation unit 130-2 (an output path of the SCF 340-2) is referred to as a time division shared signal line 390-4. Parasitic capacitance is generated in these time division shared signal lines 390-1, 390-2, 390-3, and 390-4.
- the control signal generation circuit 360A includes a time division multiplexing unit 110, time division separation units 130-1 and 130-2, history capacitor units 330-1 and 330-2, SCFs 340-1 and 340-2, and a buffer capacitor unit 350-1. 350-2, and a residual charge initialization unit 370-1 and 370-2 are supplied with a control signal.
- the control signal generation circuit 360A generates SW11, SW12, SW21, SW22, SWc1, SWc2, and S0 to S3. Then, the control signal generation circuit 360A supplies SW11 and SW12 to the time division multiplexing unit 110 and the history capacitor units 330-1 and 330-2. In addition, the control signal generation circuit 360A supplies SW21 and SW22 to the buffer capacitor units 350-1 and 350-2 and the time division separation units 130-1 and 130-2. Further, the control signal generation circuit 360A supplies SWc1 to the residual charge initialization unit 370-1. Further, the control signal generation circuit 360A supplies SWc2 to the residual charge initialization unit 370-2. The control signal generation circuit 360A supplies S0 to S3 to the SCFs 340-1 and 340-2.
- FIG. 21 is a diagram showing control signals of SW11, SW12, SW21, SW22, SWc1, SWc2, and S0 to S3 supplied from the control signal generation circuit 360A. Details of these control signals will be described later.
- control signal generation circuit 360A generates a local signal LO p . Then, the control signal generation circuit 360A supplies the local signal LO p to the samplers 320-1 and 320-2.
- the anti-phase signal generation unit 150 inverts the phase of the current signal output from the TA 310, generates an anti-phase time division multiplexed signal, and outputs it to the sampler 320-2.
- the samplers 320-1 and 320-1 use the local signal LO p to sample the analog RF current signal and perform frequency conversion (down-conversion).
- the history capacitor units 330-1 and 330-2 include switches 331 and 333 and Ch 332 and 334, respectively.
- the switches 331 and 333 switch connection or disconnection between the output path of the samplers 320-1 and 320-2 and the Ch 332 for the first branch or the Ch 334 for the second branch according to S11 and S12.
- SCF340-1 and 340-2 adopt the same configuration as SCF340. Then, SCF 340-1 repeats charging and discharging of the rotating capacitor according to S 0 to S 3, filters the positive phase current signal, and outputs the filtered signal to time division separation section 130-1. . Further, SCF 340-2 repeats charging and discharging of the rotating capacitor in accordance with S0 to S3, performs a filtering process on the current signal of the opposite phase, and outputs the filtered signal to time division separation unit 130-2 .
- the buffer capacitor units 350-1 and 350-2 include switches 351 and 353 and Cb 352 and 354.
- the switches 351 and 353 switch connection or disconnection between the output path of the SCFs 340-1 and 340-2 and the Cb 352 for the first branch or the Cb 354 for the second branch according to the SW 21 and SW 22.
- the time division demultiplexing units 130-1 and 130-2 convert the time division multiplexed signals (baseband signals) in the baseband band to the first and second branches according to SW21 and SW22. To separate. Specifically, the time division separation units 130-1 and 130-2 output the baseband signal to the output terminal 131 during the period when the SW 21 is active. In addition, the time division separation units 130-1 and 130-2 output a baseband signal to the output terminal 132 while the SW 22 is active.
- the residual charge initialization units 370-1 and 370-2 initialize the charge remaining in the parasitic capacitance of the time division receiver 300A.
- FIG. 22 is a diagram conceptually showing the parasitic capacitance generated in the time division receiver 300A.
- parasitic capacitances 380-1, 380-2, 380-3, and 380-4 are parasitic capacitances generated in the time division receiver 300A.
- signal components before branch switching remain.
- the residual charge initialization units 370-1 and 370-2 are provided in the front and rear stages of the SCFs 340-1 and 340-2.
- the internal configuration of the residual charge initialization units 370-1 and 370-2 is the same as that of the residual charge initialization unit 160, and thus illustration and description thereof are omitted.
- the residual charge initialization unit 370-1 initializes the charges (residual charges) charged in the parasitic capacitors 380-1 and 380-2 generated before the SCFs 340-1 and 340-2. (Offset). Also, the residual charge initialization unit 370-2 initializes (cancels) the charges (residual charges) charged in the parasitic capacitors 380-3 and 380-4 generated at the subsequent stage of the SCFs 340-1 and 340-2. I made it.
- control signals output from the control signal generation circuit 360A will be described with reference to FIG.
- SW11 and SW12 are control signals supplied to the time division multiplexing unit 110 and the switches 331 and 333 of the history capacitor unit 330.
- SW21 and SW22 are control signals supplied to the time division separation unit 130 and the switches 351 and 333 of the buffer capacitor unit 350.
- SWc1 and SWc2 are control signals for controlling the switch 161 of the residual charge initialization units 370-1 and 370-2. During the period in which SWc1 and SWc2 are active, the switch 161 of the residual charge initialization units 370-1 and 370-2 is turned on, and the positive phase circuit and the negative phase circuit are conducted (short between differentials). As a result, the charges (residual charges) charged in the parasitic capacitances of the positive phase circuit and the negative phase circuit are canceled and the residual charges are initialized.
- control signal (see FIG. 21) used in the present embodiment differs from the control signal in FIG. 18 in the following points.
- an inactive period is provided between the active period of SW11 and the active period of SW12, and between the active period of SW21 and the active period of SW22.
- there is no inactive period between the active period of SW11 and the active period of SW12, and between the active period of SW21 and the active period of SW22.
- SWc1 is active only during the inactive period of SW11 and SW12.
- SWc2 is active only during a period when SW21 and SW22 are inactive. Note that the active periods of SWc1 and SWc2 are determined in consideration of the trade-off between the pass gain characteristic and the inter-branch leak characteristic, as described in the first embodiment.
- the time division receiver 300A has the residual charge initialization units 370-1 and 370-2 in the front stage and the rear stage of the SCF 340-1, respectively, is shown, but the present invention is not limited to this. Even when the time division receiver 300A has one of the residual charge initialization units, the effect of reducing inter-branch leakage can be obtained.
- the residual charge initialization unit 370-1 is connected to the path between the sampler 320-1 and the SCF 340-1 and the path between the sampler 320-2 and the SCF 340-2. Then, the residual charge initialization unit 370-1 connects these paths during a period when SWc1 is active (no signal period).
- the residual charge initialization unit 370-2 is connected to a path between the SCF 340-1 and the time division separation unit 130-1 and a path between the SCF 340-2 and the time division separation unit 130-2.
- the residual charge initializing unit 370-2 connects these paths during a period when SWc2 is active (no-signal period).
- the residual charge initialization units 370-1 and 370-2 transfer the charge remaining when the first branch signal passes through the second branch to the parasitic capacitance generated in the path through which the time division multiplexed signal passes. Initialize before the signal passes.
- the time division receiver 300A can reduce inter-branch leakage.
- FIG. 23 is a block diagram showing another configuration of the time division receiver according to the present embodiment.
- the time division receiver 300 ⁇ / b> A in FIG. 20 includes a reverse phase signal generation unit 150 subsequent to the time division multiplexing unit 110.
- the time division receiver 300B of FIG. 23 includes anti-phase signal generation units 150-1 and 150-2 before the time division multiplexing units 110-1 and 110-2.
- the operations of the time division multiplexing units 110-1 and 110-2 and the antiphase signal generation units 150-1 and 150-2 are the same as those of the time division multiplexing unit 110 and the antiphase signal generation unit 150, respectively. Therefore, explanation is omitted.
- operations of TAs 310-1 and 310-2 are the same as those of TA 310, and thus description thereof is omitted.
- the residual charge initialization unit 370-1 is connected to a path between the sampler 320-1 and the SCF 340-1 and a path between the sampler 320-2 and the SCF 340-2. . Then, the residual charge initialization unit 370-1 connects these paths during a period when SWc1 is active (no signal period).
- the residual charge initialization unit 370-2 is connected to a path between the SCF 340-1 and the time division separation unit 130-1 and a path between the SCF 340-2 and the time division separation unit 130-2.
- the residual charge initializing unit 370-2 connects these paths during a period when SWc2 is active (no-signal period).
- the residual charge initialization units 370-1 and 370-2 transfer the charge remaining when the first branch signal passes through the second branch to the parasitic capacitance generated in the path through which the time division multiplexed signal passes. Initialize before the signal passes. As a result, the time division receiver 300B can reduce the inter-branch leak.
- FIG. 24 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- components common to those in FIG. 20 are denoted by the same reference numerals as those in FIG.
- the time division receiver 300C in FIG. 24 has a configuration in which the control signal generation circuit 360B is provided instead of the control signal generation circuit 360A and the reverse phase signal generation unit 150 is deleted from the time division receiver 300A in FIG. take.
- control signal generation circuit 360B Similarly to the control signal generation circuit 360A, the control signal generation circuit 360B generates control signals for SW11, SW12, SW21, SW22, SWc1, SWc2, and S0 to S3, and a local signal LO p . Furthermore, the control signal generation circuit 360B generates a local signal LO N obtained by inverting the phase of the local signal LO p, and supplies the local signal LO N sampler 320-2. As a result, an antiphase baseband signal is output from the sampler 320-2.
- FIG. 25 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 300D in FIG. 25 adopts a configuration in which the anti-phase signal generation units 150-1 and 150-2 are deleted from the time division receiver 300B in FIG.
- the time division receiver 300D in FIG. 25 is a configuration example in the case where the normal phase signals of the first and second branches and the negative phase signals of the first and second branches are respectively input.
- FIG. 26 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 300E in FIG. 26 has a control signal generation circuit 360B instead of the control signal generation circuit 360A in contrast to the time division receiver 300B in FIG. 23, and the reverse phase signal generation units 150-1 and 150- The configuration in which 2 is deleted is adopted.
- the control signal generation circuit 360B supplies the local signal LO N obtained by inverting the phase of the local signal LO p to the sampler 320-2. As a result, an antiphase baseband signal is output from the sampler 320-2.
- FIG. 27 is a block diagram showing a configuration of time division receiver 500 according to the present embodiment.
- the same components as those in FIG. 20 are denoted by the same reference numerals as those in FIG.
- the time division receiver 500 of FIG. 27 is different from the time division receiver 300A of FIG. 20 in that the residual charge initialization units 510-1, 510-2 are replaced with the residual charge initialization units 370-1, 370-2. 520-1 and 520-2.
- Residual charge initialization units 510-1, 510-2, 520-1, and 520-2 have the same configuration as that of residual charge initialization units 210-1 and 210-2 (see FIG. 16). It has a granting unit 211.
- the switch 161 is turned on while SWc1 is active, whereby the normal phase (reverse phase) circuit and the charge applying unit 211 are conducted. Further, in the residual charge initialization unit 510-1 (510-2), the switch 161 is turned off while the SWc1 is inactive, whereby the normal phase (reverse phase) circuit and the charge applying unit 211 are non-conductive. It becomes.
- the switch 161 is turned on while SWc2 is active, whereby the normal phase (reverse phase) circuit and the charge applying unit 211 are conducted. Further, in the residual charge initialization unit 520-1 (520-2), the switch 161 is turned off while the SWc2 is inactive, whereby the normal phase (reverse phase) circuit and the charge providing unit 211 are non-conductive. It becomes.
- the charge applying unit 211 of the residual charge initializing units 510-1, 510-2, 520-1, and 520-2 supplies charges to the parasitic capacitance when conducting, and sets the charge of the parasitic capacitance to the reference charge level. To do. In this way, the residual charge initialization unit 510-1 (510-2) initializes the residual charge generated in the output paths of the samplers 320-1 and 320-2. Residual charge initialization unit 520-1 (520-2) initializes the residual charge generated in the output path of SCF 340-1 (340-2).
- the residual charge initialization unit 510-1 is connected to the path between the sampler 320-1 and the SCF 340-1.
- the residual charge initialization unit 510-1 connects the charge applying unit 211 and the path during a period in which SWc1 is active (no-signal period).
- Residual charge initialization unit 520-1 is connected to a path between SCF 340-1 and time division unit 130-1.
- the residual charge initialization unit 520-1 connects the charge applying unit 211 and the path during a period in which SWc2 is active (no-signal period).
- Residual charge initialization unit 510-2 is connected to a path between sampler 320-2 and SCF 340-2.
- the residual charge initialization unit 510-2 connects the charge applying unit 211 and the path during a period in which SWc1 is active (no-signal period). Residual charge initialization unit 520-2 is connected to a path between SCF 340-2 and time division unit 130-2. The residual charge initializing unit 520-2 connects the charge applying unit 211 and the path during a period when SWc2 is active (no-signal period). In this way, the residual charge initialization units 510-1, 510-2, 520-1, and 520-2 pass through the parasitic capacitance generated in the path through which the time division multiplexed signal passes when the first branch signal passes. The remaining charge is initialized before the second branch signal passes. As a result, the time division receiver 500 can reduce inter-branch leakage.
- the charge applying unit 211 is a voltage source that can stably supply charges
- the time division receiver 500 is more accurate between branches than the time division receiver 300A according to the third embodiment. Leakage can be mitigated.
- this embodiment can be applied not only to a differential system but also to a non-differential system.
- the charge imparting unit 211 that can supply charges stably is prepared, a higher inter-branch leakage mitigation performance can be obtained compared to the third embodiment, but the circuit impact Is big.
- FIG. 28 is a block diagram showing a configuration of a time division receiver to which the present invention is applied.
- components common to those in FIG. 17 are denoted by the same reference numerals and description thereof is omitted.
- the time division receiver 600 of FIG. 28 has a buffer capacitor unit 610 instead of the buffer capacitor unit 350 with respect to the time division receiver 300 of FIG.
- the time division receiver 600 includes a time division multiplexing unit 110, a time division separation unit 130, a TA 310, a sampler 320, a history capacitor unit 330, an SCF 340, a buffer capacitor unit 610, and a control signal generation circuit 360.
- the buffer capacitor unit 610 includes Cb 611 and 612.
- the buffer capacitor unit 350 includes Cb 352 and 354 and switches 351 and 353. That is, the buffer capacitor unit 610 has fewer parts than the buffer capacitor unit 350 because the switches 351 and 353 are not provided. Therefore, the time division receiver 600 can reduce the circuit scale as compared with the time division receiver 300.
- Cb611 is connected to Cr in SCF340 during the active period of SW21.
- Cb 612 is connected to Cr in the SCF 340 during the active period of the SW 22.
- IIR filter processing is performed on the first and second branches, respectively.
- time division receiver 600A according to the embodiment of the present invention will be described.
- FIG. 29 is a block diagram showing a configuration of a time division receiver 600A according to the present embodiment.
- components common to those in FIG. 28 are denoted by the same reference numerals as those in FIG. 28, and description thereof is omitted.
- the time division receiver 600A includes a time division multiplexing unit 110, a TA 310, samplers 320-1, 320-2, a reverse phase signal generation unit 150, a history capacitor unit 330-1, 330-2, an SCF 340-1, 340-2, residual charge initialization units 370-1 and 370-2, a control signal generation circuit 360A, time division separation units 130-1 and 130-2, and buffer capacitor units 610-1 and 610-2. Note that the configuration and operation of the buffer capacitor units 610-1 and 610-2 are the same as those of the buffer capacitor unit 610, and thus description thereof is omitted.
- the time division receiver 300A In the time division receiver 300A, no signal is output to the output terminals 131 and 132 during the inactive period of SW21 or SW22 (that is, the active period of SWc2) (zero padding). Therefore, in the time division receiver 300A, a period in which the output terminal 131 and the output terminal 132 do not output any signal occurs. As a result, the time division receiver 300A outputs a loopback signal generated at intervals of the branch switching speed.
- the time division receiver 600A In the time division receiver 600A, during the inactive period of SW21 or SW22 (that is, the active period of SWc2), no signal is output to the output terminals 131 and 132 as in the time division receiver 300B. However, Cb 611 and 612 connected to the output terminals 131 and 132 respectively hold the baseband signals of the immediately preceding first and second branches. Therefore, in the time division receiver 600A, signals are output from the buffer capacitor units 610-1 and 610-2 even during the inactive period of SW21 or SW22 (that is, the active period of SWc2). As a result, the time division receiver 600A can suppress the return signal.
- FIG. 30 is a diagram showing the spectrum of the desired signal and the folded signal.
- FIG. 30A is a diagram illustrating a spectrum of a desired signal and a return signal of the time division receiver 300A.
- FIG. 30B is a diagram illustrating a spectrum of a desired signal and a folded signal of the time division receiver 600A.
- the time division receiver 600A has a smaller aliased signal spectrum based on the desired signal spectrum than the time division receiver 300A.
- the time division receiver 600A can suppress the return signal included in the output signal, compared to the time division receiver 300A. Therefore, the time division receiver 600A can relax the required characteristics of the filter necessary for the subsequent stage of the time division receiver 600A in order to remove the return signal.
- the residual charge initialization unit 370-1 is connected to the path between the sampler 320-1 and the SCF 340-1 and the path between the sampler 320-2 and the SCF 340-2. Then, the residual charge initialization unit 370-1 connects these paths during a period when SWc1 is active (no signal period).
- the residual charge initialization unit 370-2 is connected to a path between the SCF 340-1 and the time division separation unit 130-1 and a path between the SCF 340-2 and the time division separation unit 130-2.
- the residual charge initializing unit 370-2 connects these paths during a period when SWc2 is active (no-signal period).
- the residual charge initialization units 370-1 and 370-2 transfer the charge remaining when the first branch signal passes through the second branch to the parasitic capacitance generated in the path through which the time division multiplexed signal passes. Initialize before the signal passes.
- the time division receiver 600A can reduce inter-branch leakage.
- FIG. 31 is a block diagram showing a configuration of another time division receiver according to the present embodiment.
- the time division receiver 600B includes anti-phase signal generation units 150-1 and 150-2, time division multiplexing units 110-1 and 110-2, TA 310-1 and 310-2, and samplers 320-1 and 320. -2, history capacitor unit 330-1, 330-2, SCF 340-1, 340-2, residual charge initialization unit 370-1, 370-2, control signal generation circuit 360A, time division separation unit 130-1, 130 -2 and buffer capacitor portions 610-1 and 610-2.
- the residual charge initialization unit 370-1 is connected to a path between the sampler 320-1 and the SCF 340-1 and a path between the sampler 320-2 and the SCF 340-2. . Then, the residual charge initialization unit 370-1 connects these paths during a period when SWc1 is active (no signal period).
- the residual charge initialization unit 370-2 is connected to a path between the SCF 340-1 and the time division separation unit 130-1 and a path between the SCF 340-2 and the time division separation unit 130-2.
- the residual charge initializing unit 370-2 connects these paths during a period when SWc2 is active (no-signal period).
- the residual charge initialization units 370-1 and 370-2 transfer the charge remaining when the first branch signal passes through the second branch to the parasitic capacitance generated in the path through which the time division multiplexed signal passes. Initialize before the signal passes. As a result, the time division receiver 600B can reduce the inter-branch leak.
- FIG. 32 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 600C of FIG. 32 has a configuration in which the control signal generation circuit 360B is provided instead of the control signal generation circuit 360A and the reverse phase signal generation unit 150 is deleted from the time division receiver 600A of FIG. take.
- the control signal generation circuit 360B supplies the local signal LO N obtained by inverting the phase of the local signal LO p to the sampler 320-2. As a result, an antiphase baseband signal is output from the sampler 320-2.
- FIG. 33 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 600D of FIG. 33 adopts a configuration in which the anti-phase signal generation units 150-1 and 150-2 are deleted from the time division receiver 600B of FIG.
- the time division receiver 600D of FIG. 33 is a configuration example in the case where a normal phase signal of the first and second branches and a negative phase signal of the first and second branches are respectively input.
- FIG. 34 is a block diagram showing still another configuration of the time division receiver according to the present embodiment.
- the time division receiver 600E in FIG. 34 has a control signal generation circuit 360B instead of the control signal generation circuit 360A in contrast to the time division receiver 600B in FIG. 31, and has anti-phase signal generation units 150-1 and 150-.
- the configuration in which 2 is deleted is adopted.
- the control signal generation circuit 360B supplies the local signal LO N obtained by inverting the phase of the local signal LO p to the sampler 320-2. As a result, an antiphase baseband signal is output from the sampler 320-2.
- FIG. 35 is a block diagram showing a configuration of still another time division receiver according to the present embodiment.
- the time division receiver 600F includes a time division multiplexing unit 110, a TA 310, samplers 320-1, 320-2, a negative phase signal generation unit 150, a history capacitor unit 330-1, 330-2, an SCF 340-1, 340-2, residual charge initialization units 510-1, 510-2, 520-1, 520-2, control signal generation circuit 360A, time division separation units 130-1, 130-2, and buffer capacitor unit 610- 1, 610-2.
- the residual charge initialization unit 510-1 is connected to a path between the sampler 320-1 and the SCF 340-1.
- the residual charge initialization unit 510-1 connects the charge applying unit 211 and the path during a period in which SWc1 is active (no-signal period).
- Residual charge initialization unit 520-1 is connected to a path between SCF 340-1 and time division unit 130-1.
- the residual charge initialization unit 520-1 connects the charge applying unit 211 and the path during a period in which SWc2 is active (no-signal period).
- Residual charge initialization unit 510-2 is connected to a path between sampler 320-2 and SCF 340-2.
- the residual charge initialization unit 510-2 connects the charge applying unit 211 and the path during a period in which SWc1 is active (no-signal period). Residual charge initialization unit 520-2 is connected to a path between SCF 340-2 and time division unit 130-2. The residual charge initializing unit 520-2 connects the charge applying unit 211 and the path during a period when SWc2 is active (no-signal period). In this way, the residual charge initialization units 510-1, 510-2, 520-1, and 520-2 pass through the parasitic capacitance generated in the path through which the time division multiplexed signal passes when the first branch signal passes. The remaining charge is initialized before the second branch signal passes. As a result, the time division receiver 600F can reduce the inter-branch leak.
- the time division receivers 600B, 600C, 600D, 600E, and 600F are provided with a buffer capacitor unit 610 at the subsequent stage of the time division separation units 130-1 and 130-2, similarly to the time division receiver 600A. Therefore, the time division receiver 600C can relax the characteristics required for the subsequent filter.
- FIG. 36 is a diagram illustrating an example of each control signal when the number of branches is three. Even when the number of branches is 3, the time division multiplexing unit generates a time division multiplexing signal having no signal period between the branches, and the residual charge initialization unit initializes the residual charge in the no signal period. You just have to do it.
- the time division receiver and the time division reception method according to the present invention are useful as a receiver in a MIMO system that needs to receive high-frequency signals of a plurality of branches at the same time.
- Time division receivers 110, 110-1 , 110-2 Time division multiplexing unit 111, 112 Input terminal 120, 120-1, 120-2 Mixer 130, 130-1, 130-2 Time division separation unit 131, 132 Output terminal 140, 140A, 140B, 360, 360A 360B
- Control signal generation circuit 150, 150-1, 150-2 Reverse phase signal generation unit 160, 210-1, 210-2, 370-1, 370-2, 510-1, 510-2, 520-1, 520-2
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Abstract
Description
図1は、本発明を適用する時分割受信機の構成を示すブロック図である。なお、図1の時分割受信機100は、第1ブランチ及び第2ブランチを1系統に時分割多重する、ブランチ数が2の構成を採る。
図14は、本発明の実施の形態に係る時分割受信機の構成を示すブロック図である。なお、図14において、図3と共通する構成部分には、図3と同一の符号を付して説明を省略する。図14の時分割受信機200は、図3の時分割受信機100Aに対して、残留電荷初期化部160に代えて、残留電荷初期化部210-1、210-2を有する。
実施の形態1、2では、高周波回路がミキサにより構成される時分割受信機に対して、本発明を適用する場合について説明した。本実施の形態では、高周波回路がDSMから構成される時分割受信機に、本発明を適用する場合について説明する。
図27は、本実施の形態に係る時分割受信機500の構成を示すブロック図である。なお、図27において、図20と共通する構成部分には、図20と同一の符号を付して説明を省略する。図27の時分割受信機500は、図20の時分割受信機300Aに対して、残留電荷初期化部370-1、370-2に代えて、残留電荷初期化部510-1、510-2、520-1、520-2を有する。
図28は、本発明を適用する時分割受信機の構成を示すブロック図である。なお、図28において、図17と共通する構成部分については、同一の符号を付して説明を省略する。図28の時分割受信機600は、図17の時分割受信機300に対して、バッファキャパシタ部350に代えてバッファキャパシタ部610を有する。
110,110-1,110-2 時分割多重部
111,112 入力端子
120,120-1,120-2 ミキサ
130,130-1,130-2 時分割分離部
131,132 出力端子
140,140A,140B,360,360A,360B 制御信号生成回路
150,150-1,150-2 逆相信号生成部
160,210-1,210-2,370-1,370-2,510-1,510-2,520-1,520-2 残留電荷初期化部
161,331,333,351,353,410,412,413,414,420,422,423,424,430,432,433,434,440,442,443,444 スイッチ
170-1,170-2,180-1,180-2,390-1,390-2、390-3,390-4 時分割兼用信号ライン
190-1,190-2,380-1,380-2、380-3,380-4 寄生容量
211 電荷付与部
310,310-1,310-2 TA
320,320-1,320-2 サンプラ
330,330-1,330-2 ヒストリキャパシタ部
340,340-1,340-2 SCF
350,350-1,350-2,510-1,510-2,610-1,610-2 バッファキャパシタ部
332,334 Ch
352,354,611,612 Cb
411,421,431,441 Cr
Claims (7)
- 複数のブランチ信号が時分割多重された時分割多重信号をダウンコンバートするミキサと、
前記ミキサでダウンコンバートされた前記時分割多重信号を各ブランチ信号に分離する分離部と、
前記ミキサと前記分離部との間の経路に発生する寄生容量に、第1ブランチ信号が通過した時に残留する電荷を、第2ブランチ信号が通過する前に初期化する初期化部と、
を具備する時分割受信機。 - 前記第1ブランチ信号と前記第2ブランチ信号との間に無信号期間を有する前記時分割多重信号を生成する生成部を、更に具備し、
前記初期化部は、前記無信号期間に、前記電荷を初期化する、
請求項1に記載の時分割受信機。 - 前記無信号期間は、前記第1ブランチ信号又は前記第2ブランチ信号の通過ゲイン特性及び受信特性に基づいて、決定される、
請求項1に記載の時分割受信機。 - 前記ミキサは、差動システムの正相信号を処理する第1ミキサと、前記差動システムの逆相信号を処理する第2ミキサとを具備し、
前記初期化部は、前記無信号期間に、前記第1ミキサの出力経路と前記第2ミキサの出力経路とを接続するスイッチを具備する、
請求項2に記載の時分割受信機。 - 前記初期化部は、電圧源と、前記無信号期間に、前記電圧源と前記ミキサの出力経路とを接続するスイッチを具備する、
請求項2に記載の時分割受信機。 - 前記ミキサは、サンプラ及びスイッチドキャパシタフィルタを有するダイレクトサンプリングミキサであり、
前記初期化部は、前記サンプラと前記スイッチドキャパシタフィルタとの間の経路、又は、前記スイッチドキャパシタフィルタと前記分離部との間の経路のうち、少なくとも一方の経路に発生する寄生容量に、前記第1ブランチ信号が通過した時に残留する電荷を、前記第2ブランチ信号が通過する前に初期化する、
請求項1に記載の時分割受信機。 - 複数のブランチ信号が時分割多重された時分割多重信号をダウンコンバートし、
ダウンコンバートされた前記時分割多重信号を各ブランチ信号に分離し、
ダウンコンバートされた前記時分割多重信号が通過する経路に発生する寄生容量に、第1ブランチ信号が通過した時に残留する電荷を、第2ブランチ信号が通過する前に初期化する、
時分割受信方法。
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US7519135B2 (en) * | 2001-08-15 | 2009-04-14 | Texas Instruments Incorporated | Direct radio frequency (RF) sampling with recursive filtering method |
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