WO2012068845A1

WO2012068845A1 - Method and system for time synchronization

Info

Publication number: WO2012068845A1
Application number: PCT/CN2011/074301
Authority: WO
Inventors: 罗丽; 彭勇; 傅小明; 唐雄
Original assignee: 中兴通讯股份有限公司
Priority date: 2010-11-26
Filing date: 2011-05-19
Publication date: 2012-05-31
Also published as: CN102006157B; CN102006157A

Abstract

The present invention discloses a method and system for time synchronization. The method includes: a master device notifies its own physical network port rate information to a slave device; after obtaining the physical network port rate of the master device, the slave device compares the physical network port rate with its own physical network port rate; if they are different, the slave device performs compensation for an average line transmission delay obtained by calculation, otherwise, the slave device does not perform compensation. By applying the technical solutions of the present invention, the problem that asymmetrical delays caused by inconsistent master and slave physical network port rates result in asynchronous phases can be solved in a delay request response mechanism.

Description

Method and system for time synchronization

Technical field

The present invention relates to the field of clock synchronization, and in particular, to a method and system for time synchronization.

Background technique

In the communication system, with the continuous development of data services and multimedia services, IP-based packet network transmission data has been the mainstream of development. At this time, on the one hand, new services and new applications impose higher requirements on the synchronization of the network, and on the other hand, traditional time division multiplexing

(Time Division Multiplexing, TDM) service compatibility, etc. require packet networks to provide high quality synchronization and timing performance.

The Precision Time Synchronization Protocol (1588-2008) is a timing mechanism for overcoming the lack of real-time Ethernet. Its emergence has brought us hope. Its main principle is to all the network. The node performs time synchronization, and the clock of all nodes in the network is periodically synchronized and corrected by an accurate time source.

IEEE 1588 PTP is an Ethernet clock synchronization protocol that implements master-slave synchronization by synchronizing messages. The PTP standard protocol can be carried over Ethernet 802.3, UDP/IPv4, and UDP/IPv6. The format of the 802.3 frame structure is shown in Table 1.

Table 1 preamble SFD Des MAC Sour MAC Data /Load FCS

7 bytes 1 byte 6 bytes 6 bytes 2 bytes 46-1500 bytes 4 bytes

The IEEE 1588v2 system is a master-slave synchronization system. During the synchronization process of the system, the master clock sends PTP time information according to a predetermined time interval, and the clock port receives the timestamp information sent by the master clock port, and the system calculates the master according to the time. The line time delay and the master-slave time difference are used, and the time difference is used to adjust the local time so that the slave time is kept at the same frequency and phase as the master time. With The body scheme is shown in Figure 1. The master sends a Sync message and records the time tl. When the slave device (Slave) receives the Sync message, it records t2. The slave learns tl based on the Follow_up message sent by the master. The slave device initiates a Delay_Req message and records the time t3. After receiving the Delay-Req message, the master device records the time t4 and fills in the Delay_Resp message. The slave learns t4 based on the Delay_Resp message sent by the master. In Figure 1, tl and t2 are the timestamps for sending and receiving Sync messages, that is, t1 is the time when the Sync message is sent out to the master device, and t2 is the time when the Sync message arrives at the slave device. T3 and t4 are the transmission and reception timestamps of the Delay-Req message respectively, that is, t3 is the time when the Delay-Req message is sent out from the device, and t4 is the time when the Delay-Req message is sent to the master device.

Average line transmission delay

Mean_path_delay = [(t2 - tl) + (t4 - 13)]/2 = [(t2 - 13) + (t4 - tl)]/2 (

1 )

The difference between the time of the slave device and the time of the master device is

Offset=[(tl - 12) + (t4 - 13)]/2 (Equation 2) By the above two equations, the slave device's time can be synchronized to the master device.

Synchronous device vendors are currently trying to replace the Global Positioning System (GPS) clock source with the IEEE1588 network clock, but the IEEE1588-2008 release still has some problems. Summary of the invention

The existing IEEE 1588-2008 standard does not explicitly describe whether the primary and secondary physical network ports are rate matched. If the rate of the primary and secondary physical network ports is inconsistent, the delay time from the master to the slave is different from the delay time from the master to the slave. Time synchronization error, resulting in phase asymmetry in synchronization.

The technical problem to be solved by the present invention is to provide a method and system for time synchronization, which solves the problem that the time between the master and the slave is inconsistent due to the inconsistent physical rate of the time stamp interface.

In order to solve the above problems, the present invention provides a method for time synchronization, including: The master device notifies the slave device of its physical network port rate information.

After the device learns the physical network port rate of the master device, it compares it with its own physical network port rate. If it is not the same, it compensates the calculated average line transmission delay. Otherwise, no compensation is performed.

Preferably, the above method has the following characteristics:

The step of the master device notifying the slave device of the physical network port rate includes:

The master device sends a notification packet to the slave device, where the notification packet carries its own physical network port rate information.

Preferably, the above method has the following characteristics:

Before the master device sends the notification packet to the slave device, the master device writes its own physical network port rate information into the reserved byte between the domain number of the notification packet and the identifier field.

Preferably, the above method has the following characteristics:

In the physical network port rate information, 0001 indicates the physical network port rate of 10M, 0010 indicates the 100M physical network port rate, 0100 indicates the 1000M physical network port rate, and 1000 indicates the 10000M physical network port rate.

Preferably, the above method has the following characteristics:

The slave device compensates the clock offset by subtracting the delay error from the calculated average line transmission delay, where

The delay error is: N _匪一一tiy = ( ₊ J ₂ ) x 8 x ^^ ₊ J ₃ x 8 x ^^

J represents the entire frame length except the frame preamble and the check bit, J ₂ represents the check bit length, ^ represents the frame preamble length, Sm represents the time at which the physical network port of the master device forwards each bit of data, and Ss represents the physical network port of the slave device. The time to forward each bit of data.

In order to solve the above problems, the present invention provides a time synchronization system including a master device and one or more slave devices.

The master device is configured to: notify the slave device of the physical network port rate information;

The slave device is set to: After the physical network port rate of the master device is learned, the physical network port rate is For comparison, if not the same, the calculated average line transmission delay is compensated, otherwise, no compensation is performed.

Preferably, the above system has the following characteristics:

The master device is further configured to: notify the slave device by sending the notification message to the slave device, and the notification packet carries the rate information of the physical network port of the device.

Preferably, the above system has the following characteristics:

The master device is further configured to: write the physical network port rate information of the notification message into the reserved byte between the domain number of the notification message and the identifier field before sending the notification message to the slave device.

Preferably, the above system has the following characteristics:

The slave device is further configured to: compensate the clock offset by subtracting a delay error from the calculated average line transmission delay, where

The delay error is: N _匪一一tiy = ( ₊ J ₂ ) x 8 x ^^ ₊ J ₃ x 8 x ^^

^ indicates the entire frame length except the frame preamble and check digit, J ₂ indicates the check bit length, ^ indicates the frame preamble length, Sm indicates the time at which the physical network port of the master device forwards each bit of data, and Ss indicates the physical network port of the slave device. The time to forward each bit of data.

With the technical solution of the present invention, the delay asymmetry caused by the inconsistent rate of the primary and secondary physical network ports can be solved in the delay request response mechanism, resulting in phase unsynchronization.

BRIEF abstract

Figure 1 is a schematic diagram of a delay request response mechanism;

2 is a schematic diagram of networking; Fig. 3 is a flow chart showing an application example of the present invention. Preferred embodiment of the invention

First, analyze the problems that arise in the prior art:

In the networking mode shown in Figure 2, if the physical interface rate between the master device and the slave device does not match, the asymmetric delay problem will occur. For Figure 2, we analyze under the following conditions:

1. The line transmission delays in both directions are equal;

2. The intermediate unknown network (cloud network) has the same delay;

3. Time stamping between the preamble and the destination MAC;

In order to analyze the problem, we also make the following assumptions:

(1) Using the UDP/IPv4/Ethemet header, including the check digit, the entire packet length is 86 bits;

(2) The message frame is completely read into the buffer by the switch and then started to be forwarded;

(3) The frame leading is 8 bits;

(4) The check digit is 4 bits;

(5) The physical network port rate of the master device is Gigabit Ethernet;

(6) The physical network port rate of the slave device is 100 Mbps Ethernet;

In the direction from the master device to the slave device, the delay of the event message is:

_{t2-tl = (L l +} L 2 \ ytes x ltslbyte x GE nslbit + D PSN + (L 3) bytes x ltslbyte x FE mlbit ( Formula 3) wherein, A represents a frame preamble (pre-amble) and other checking The entire frame length outside the bit (FCS); J ₂ represents the length of the check bit ( FCS );

J ₃ represents the length of the frame preamble (re-amble);

GE„ _s/blt indicates the time when the 1000M physical network port forwards each bit of data;

FE _m/bit indicates the time when the 100M physical network port forwards data per bit.

D _PSN represents unknown time delay through the packet network;

In the direction from the device to the master device, the delay of the event message is: T4-t3 = {L _x + L ₂ ) _bytes x _Usjbyte x FE _nsjbu + D _PSN + (L ₃ ) _bytes x _ltslhyte x GE _nsjbu (Formula 4) where A, ₂ , L GE _nslM , FE _mlbtt , D layer and Equation 3 represents the same.

The average line transmission delay is as follows:

[(t2-tl) + (t4-t3)] (Equation ₅₎

N Substituting equations (3) and (4) into equation (5) is:

_ (L _{1 +} L ₂ + L ₃ ) xSx(GE + FE) _{ns (} , ,

― 十”尸, ^U , The above calculation results are based on the symmetry of the delay between the master and the slave, that is,

(t2-tl)=(t4-t3) (;

In fact, the two are not equal.

Equation 3 Subtraction 6 Calculation Master to Slave and Slave to Master delay error is:

N _{meanPathDelayA} „ _try = (A + ₂ ) X 8 X ^GE ^ ^FE + ₃ χ 8 x ^FE ^ ^GE (Equation 8) Equation 6 Subtraction 4 calculates the delay error from Master to Slave and Slave to Master: r _ _(J τ o GE― FE FE― GE ( - Q

For a 1000M physical network port, the time required to transmit one bit of data is Ins. For a 100M physical network port, the time required to transmit one bit of data is 10 ns. Substituting 8 or 9 can be obtained,

N匪一— =(86 + = -2952ns (Formula 10)

Theoretically, for the case where the 1000M physical network port does not match the 100M physical network port rate, resulting in an error of -2.92us, this error will be mistaken for the deviation between the master and the slave. After adjustment, it will cause different problems between the master and the slave.

In order to prove the correctness of this theory, the following experiments were performed: the primary device is the 1000M physical network port rate, and the secondary device is the 100M physical network port rate, which is subjected to the primary switching and the nine-level switching respectively. The experimental results are shown in the table below. It can be seen from Table 2 that the increase of the number of switching stages has no effect on the asymmetry, which is caused by the rate mismatch between the primary and secondary physical network ports. Table 2

Explanation: "-" indicates that the phase of the slave is ahead of the master. The same problem exists in whether the PTP packet is carried on Ethernet 802.3 or on UDP/IPv4 and UDP/IPv6. As long as the rate of the physical network interface between the master and the slave is inconsistent, the delay time from the master to the slave is different from the delay time from the master to the slave, resulting in the phase out synchronization between the master and the slave after the synchronization.

The invention proposes to solve the problem of delay asymmetry caused by the inconsistent rate of the physical network port between the master and the slave. The method is as follows: The master device informs the slave device of the physical network port rate information of the master device; after the slave device learns the rate of the physical network port of the master device, compares the rate with the physical network port of the master device, and if not, the calculated average route The transmission delay is compensated, otherwise, no compensation is performed.

Specifically, the master device may send an Announce message to the slave device, where the notification packet carries its own physical network port rate information.

The physical network port rate information may be located in a reserved byte between the domainNumber and the flag field, that is, the master device sends the notification message to the slave device before the master device sends the notification message to the slave device. The physical network port rate information can be written into the reserved byte between the domainNumber and the flagField of the notification message.

The slave device compensates the clock offset by subtracting the delay error from the calculated average line transmission delay, where The delay error is: N匪一— = ( ₊ J ₂ ) x 8 x ^^ ₊ J ₃ x 8 x ^^

11)

Correspondingly, the time synchronization system of the embodiment of the present invention includes a master device and one or more slave devices, wherein

The master device notifies the slave device of the physical network port rate information while implementing the function of the master device;

After the device performs the function of its master device, it learns the rate of the physical network port of the master device through the Announce packet and compares it with the rate of its physical network port. If not, the calculated average line transmission delay is performed. Compensation, otherwise, no compensation will be made.

The master device may be further configured to notify the slave device of the physical network port rate information by sending the notification message to the slave device, where the notification message carries its own physical network port rate information.

The master device is further configured to write the physical network port rate information of the notification message into the reserved byte between the domain number of the notification message and the domain identifier before sending the notification message to the slave device.

The slave device may be further configured to compensate the clock offset by subtracting a delay error from the calculated average line transmission delay, where

The delay error is: N Liyi — =

The present invention is further illustrated by an application example in which the rate of the physical network port of the primary device is increased in the Announce message header. The model for time synchronization using 1588 is shown in Figure 2. There may be multiple switches, routers, etc. in the middle.

As shown in Figure 3, this example includes the following steps:

Step 301: The master device writes its own physical network port rate information into the reserved bytes between the domainNumber and the flagField of the Announce message, where 0001 indicates 10M, 0010 indicates 100M, 0100 indicates 1000M, and 1000 indicates 10000M;

For the original Announce message header, see Table 3. The new Announce message header of this example can be found in Table 4.

Step 302: The master device sends the Announce text to the slave device.

Step 303: After receiving the Announce message, the slave device parses the physical network port rate of the master device.

Step 304: The slave device compares the rate of the physical network port of the master device with the rate of the physical network port of the slave device. If they are the same, the device does not perform compensation. If not, the length of the packet is parsed. The calculated value is compensated.

According to the above steps, it can be ensured that the rate of the physical network port between the master and the slave is inconsistent, and the phase asymmetry after synchronization due to line asymmetry is not generated.

Table 3: Announce message header of the prior art

Bits (bits) Octets offset

7 6 5 4 3 2 1 0 (number of bytes) (offset) transportSpecific 1 0 1 1 1 0

(transmission characteristics)

Reserved (reserved) versionPTP (version) 1 1 messageLength (2) domainNumber (domain number) 1 4

Reserved 1 5 flagField 2 6 correctionField 8 8 Reserved 4 16 sourcePortldentity 10 20 sequencelD (Serial 'J number) 2 30 controlField 1 32 logMessagelnterval 1 33

Table 4 Announce 4 of this application example

One of ordinary skill in the art will appreciate that all or a portion of the above steps may be performed by a program to instruct the associated hardware, such as a read only memory, a magnetic disk, or an optical disk. Optionally, all or part of the steps of the foregoing embodiments may also be implemented by using one or more integrated circuits. Accordingly, each module/unit in the foregoing embodiment may be used. The form of hardware implementation can also be implemented in the form of software function modules. The invention is not limited to any specific form of combination of hardware and software.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Industrial applicability

Claims

Claim

1. A method of time synchronization, comprising:

The master device notifies the slave device of its physical network port rate information.

2. The method of claim 1 wherein

3. The method of claim 2, wherein

Before the master device sends the notification message to the slave device, the master device writes its own physical network port rate information into the reserved byte between the domain number of the notification message and the identifier field.

4. The method according to any one of claims 1 to 3, wherein

The method according to any one of claims 1 to 3, wherein

The delay error is: N draw one - _try = ( ₊ J ₂ ) x8x^* ₊ x8x^^

J, indicates the entire frame length except for the frame preamble and check digit, J ₂ indicates the check bit length, ^ indicates the frame preamble length, Sm indicates the time when the physical network port of the master device forwards each bit of data, and Ss indicates the physical network of the slave device. The time at which the port forwards each bit of data.

A time synchronization system, comprising: a master device and one or more slave devices, wherein the master device is configured to: notify the slave device of the physical network port rate information; The slave device is set to: After learning the physical network port rate of the master device, compare it with its own physical network port rate. If they are not the same, compensate the calculated average line transmission delay. Otherwise, no compensation is performed.

7. The system of claim 6 wherein

8. The system of claim 7, wherein

The master device is further configured to: write the physical network port rate information of the local network port to the reserved byte between the domain number and the identifier field of the notification message before sending the notification message to the slave device.

9. The system according to any one of claims 6 to 8, wherein

10. The system according to any one of claims 6 to 8, wherein

The slave device is further configured to: compensate the clock deviation by subtracting the calculated average line transmission delay from the delay error, wherein the delay error is: N draw one - _try = ( ₊ J ₂ )x8x^* ₊ x8x^^