WO2012008121A1 - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
WO2012008121A1
WO2012008121A1 PCT/JP2011/003855 JP2011003855W WO2012008121A1 WO 2012008121 A1 WO2012008121 A1 WO 2012008121A1 JP 2011003855 W JP2011003855 W JP 2011003855W WO 2012008121 A1 WO2012008121 A1 WO 2012008121A1
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WO
WIPO (PCT)
Prior art keywords
adhesive
recess
semiconductor element
mounting substrate
semiconductor device
Prior art date
Application number
PCT/JP2011/003855
Other languages
French (fr)
Japanese (ja)
Inventor
恭子 藤井
Original Assignee
パナソニック株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by パナソニック株式会社 filed Critical パナソニック株式会社
Publication of WO2012008121A1 publication Critical patent/WO2012008121A1/en

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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/562—Protection against mechanical damage
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B3/00—Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • B81B3/0064—Constitution or structural means for improving or controlling the physical properties of a device
    • B81B3/0067—Mechanical properties
    • B81B3/0072—For controlling internal stress or strain in moving or flexible elements, e.g. stress compensating layers
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
    • B81B7/0032—Packages or encapsulation
    • B81B7/0045—Packages or encapsulation for reducing stress inside of the package structure
    • B81B7/0048—Packages or encapsulation for reducing stress inside of the package structure between the MEMS die and the substrate
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Definitions

  • the present invention relates to a semiconductor device having a structure of a mounting substrate that can reduce stress on a semiconductor element having a fragile structure, for example, a conversion element with a diaphragm or a thin semiconductor element having a thickness of 100 ⁇ m or less. .
  • a conversion element with a diaphragm or a semiconductor element having a fragile structure represented by a thin semiconductor element having a thickness of 100 ⁇ m or less is likely to be distorted due to stress at the time of mounting, and thus a target characteristic cannot be obtained.
  • the diaphragm is deformed by the stress on the element and the sensitivity is deteriorated.
  • the element is deformed by stress, so that the threshold voltage and the amount of quiescent current of the transistor are changed and the standard is not satisfied.
  • the semiconductor element is broken. This stress is generated by a difference in thermal expansion coefficient between the mounting substrate and the semiconductor element.
  • Conventionally, a measure has been taken to absorb the stress with an adhesive between the mounting substrate and the semiconductor element.
  • Patent Document 1 discloses a structure of a MEMS microphone that includes a MEMS (Micro Electro Mechanical Systems) chip that converts a sound signal into an electrical signal, a substrate to which the MEMS chip is bonded, and a shield case that covers the MEMS chip. Yes.
  • the junction between the MEMS chip and the substrate has a structure as shown in FIG.
  • FIG. 8 is a structural cross-sectional view of a conventional semiconductor device.
  • a conversion element 101 with a diaphragm is fixed to a mounting substrate 102 with an adhesive 103, and an electrode pad 104 of the conversion element 101 and an electrode land 105 of the mounting substrate 102 Are connected by a wire 106.
  • the adhesive surface of the element that is, the pedestal that supports the diaphragm
  • the adhesive must be drawn in accordance with the width of the frame.
  • it is necessary to draw an adhesive on the bonding surface of the element or the substrate surface to which the element is bonded using a nozzle having an inner diameter adjusted to the width of the frame but as the miniaturization progresses, the frame Therefore, it is necessary to reduce the inner diameter of the nozzle correspondingly.
  • the inner diameter of the nozzle is reduced, the high-viscosity adhesive is likely to be clogged with the nozzle, and there is a problem that it is difficult to draw finely.
  • the present invention has been made in view of the above problems, and even when a nozzle with a small inner diameter is used, the adhesive is not easily clogged, and even when a low-viscosity adhesive is used to suppress the bleed width, It is an object of the present invention to provide a semiconductor device having a structure in which the adhesive can sufficiently absorb stress.
  • a semiconductor device includes a mounting substrate, a metal layer formed on a surface of the mounting substrate, a first recess formed on the metal layer.
  • the adhesive can be retained in the first recess, and the viscosity of the adhesive is not increased.
  • the volume of the adhesive can be increased. For this reason, there are no side effects such as an increase in the bleed width when the viscosity of the adhesive is increased and a rise in the adhesive on the semiconductor element, and it is not necessary to increase the board mounting area as a countermeasure.
  • At least one or more electrode lands formed by exposing a part of the metal layer on the surface of the mounting substrate from the insulating layer, and at least one or more electrode pads on the outer periphery of the upper surface of the first semiconductor element.
  • the electrode land and the electrode pad may be electrically connected.
  • the bonding surface of the first semiconductor element is flat, and the adhesive thickness between the first semiconductor element and the mounting substrate in the region of the first recess is the first recess. It is preferable that the thickness is larger than the adhesive thickness between the first semiconductor element and the mounting substrate outside the region.
  • the adhesive in the first recessed region as compared with the amount of the adhesive when the first semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
  • the bottom surface of the first recess may be constituted by the metal layer.
  • the metal layer is a material conventionally formed on the mounting substrate, the semiconductor layer device can be manufactured without increasing the number of steps and the manufacturing cost only by changing the layout at the time of manufacturing the substrate. .
  • the metal layer may include a second recess formed continuously with the first recess in the thickness direction, and the adhesive may be filled in the region of the second recess. .
  • the thickness of the adhesive can be further increased as compared with the case where the recess is formed only in the insulating layer without forming the recess in the metal layer. As a result, a larger thermal stress absorption effect can be obtained, and the characteristic variation can be further reduced.
  • the adhesive thickness between the first semiconductor element and the mounting substrate in the first concave portion and the second concave portion is determined by the areas of the first concave portion and the second concave portion. It is preferable that the thickness is larger than the adhesive thickness between the first semiconductor element and the mounting substrate outside.
  • the adhesive is further secured in the first and second recessed regions. can do. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
  • the bottom surface of the second recess may be made of a core material or a prepreg, and the side wall of the second recess may be made of the metal layer, the insulating layer, or both.
  • the core material, the prepreg, and the insulating layer are materials that conventionally constitute a mounting board. Therefore, the number of processes and manufacturing costs can be reduced by simply changing the layout at the time of board production without adding a new material.
  • the semiconductor device can be manufactured without increasing
  • the uppermost surface of the mounting substrate is formed immediately below the connection surface of the first semiconductor element so as to support the first semiconductor element in parallel with the mounting substrate. Also good.
  • a semiconductor device includes a mounting substrate, a metal layer formed on a surface of the mounting substrate and having a third recess, an adhesive filled in the third recess, and the metal
  • the adhesive is also filled in the periphery of the bonding surface of the first semiconductor element.
  • the third recess is provided on a part of the surface of the mounting substrate that is bonded to the first semiconductor element via the adhesive, so that the bleed width can be increased even when a low-viscosity adhesive is used.
  • the capacity of the adhesive that is narrow and can sufficiently absorb stress can be secured. Therefore, it is possible to obtain a miniaturizable MEMS microphone device that can sufficiently absorb the thermal stress applied to the first semiconductor element and has little characteristic variation with respect to secondary mounting and temperature.
  • the adhesive thickness between the first semiconductor element and the mounting substrate in the region of the third recess is equal to the first semiconductor element and the mounting outside the region of the third recess. It is preferable that the thickness is larger than the adhesive thickness between the substrate.
  • the adhesive in the third recessed region as compared with the amount of the adhesive when the first semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
  • an electronic component that is fixed to the surface of the mounting substrate via the adhesive may be further provided.
  • the insulating layer has a plurality of fourth recesses, and the adhesive is filled in the plurality of fourth recess regions and in the periphery of the bonding surface of the electronic component. It may be.
  • the bottom surface of the fourth recess may be made of a core material or a prepreg, and the side wall of the fourth recess may be made of the metal layer.
  • the core material, the prepreg, and the insulating layer are materials that conventionally constitute a mounting board. Therefore, the number of processes and manufacturing costs can be reduced by simply changing the layout at the time of board production without adding a new material.
  • the semiconductor device can be manufactured without increasing
  • At least one or more electrode lands may be provided on the upper surface of the electronic component, and the electrode lands and the electrode pads of the first semiconductor element may be electrically connected.
  • the electronic component may be a second semiconductor element.
  • the bonding surface of the second semiconductor element is flat, and the adhesive thickness between the second semiconductor element and the mounting substrate in the area of the fourth recess is the fourth recess. It is preferable that the thickness is larger than the adhesive thickness between the second semiconductor element and the mounting substrate outside the area.
  • the adhesive in the fourth recessed region as compared with the amount of the adhesive when the second semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
  • the thickness of the second semiconductor element may be 100 ⁇ m or less.
  • the semiconductor element having a fragile structure is a thin semiconductor element having a thickness of 100 ⁇ m or less
  • the concave portion is provided on the mounting substrate. Therefore, even when a low-viscosity adhesive that suppresses the bleed width is used, The amount of adhesive can be increased by the volume and thickness, and the stress applied to the semiconductor element can be sufficiently absorbed based on the difference in the thermal expansion coefficient between the mounting substrate and the semiconductor element, and the threshold voltage and quiescent current amount The fluctuation of the can be reduced. In addition, it is possible to prevent the semiconductor element from being broken due to stress during mounting.
  • the electronic component may be an amplifying element.
  • the mounting board preferably contains a glass epoxy resin.
  • Glass epoxy resin has a large difference in thermal expansion coefficient from that of semiconductor elements. If a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. In addition, the difference in coefficient of thermal expansion between the ceramic substrate and the resin substrate for secondary mounting is increased, and there is a risk of causing problems such as peeling of the semiconductor device. By providing a recess in a part of the bonding surface between the semiconductor element and the mounting substrate, the stress can be reduced even if an inexpensive glass epoxy resin is used, and problems due to the stress in the secondary mounting can be avoided.
  • the first semiconductor element is preferably a microphone element with a diaphragm.
  • the semiconductor element having a fragile structure is a conversion element with a diaphragm
  • a concave portion is provided in a part of the bonding surface between the conversion element and the mounting substrate, so that even when an adhesive having a low viscosity is used.
  • the volume and thickness of the agent can be ensured and thermal stress can be absorbed. For this reason, even if the width of the Si frame is reduced with the miniaturization of the apparatus, the adhesive can be applied with a nozzle having a narrow inner diameter corresponding to the width of the frame.
  • the insulating layer may be a solder resist.
  • solder resist is a material that conventionally constitutes a mounting substrate, it is possible to manufacture a semiconductor layer device without increasing the number of steps and the manufacturing cost by simply changing the layout at the time of substrate manufacture. .
  • the semiconductor layer device of the present invention it is possible to increase the volume of the adhesive without increasing the viscosity of the adhesive by providing the recess in a part of the adhesive surface between the semiconductor element having a fragile structure and the mounting substrate. . Therefore, the stress generated between the semiconductor element and the mounting substrate is alleviated without causing side effects such as an increase in bleed width when the viscosity of the adhesive is increased and a rise of the adhesive on the semiconductor element. . Further, it is not necessary to increase the board mounting area for the stress relaxation countermeasure.
  • FIG. 1A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 1 of the present invention.
  • FIG. 1B is a plan view of a semiconductor device including the first semiconductor element according to Embodiment 1 of the present invention.
  • FIG. 2 is a graph showing the characteristic variation of the diaphragm of the semiconductor device according to the first embodiment.
  • FIG. 3A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 2 of the present invention.
  • FIG. 3B is a plan perspective view of the semiconductor device including the first semiconductor element according to Embodiment 2 of the present invention.
  • FIG. 4A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 3 of the present invention.
  • FIG. 4B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 3 of the present invention.
  • FIG. 5A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 4 of the present invention.
  • FIG. 5B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 4 of the present invention.
  • FIG. 6A is a structural cross-sectional view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention.
  • FIG. 6B is a perspective plan view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention.
  • FIG. 7A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 6 of the present invention.
  • FIG. 7B is a structural cross-sectional view of a semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention.
  • FIG. 7C is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention.
  • FIG. 8 is a structural cross-sectional view of a conventional semiconductor device.
  • FIG. 1A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 1 of the present invention.
  • a semiconductor device 50 shown in the figure represents a structure of a conversion element portion of a MEMS (Micro Electro Mechanical Systems) microphone, and includes a conversion element 1, a mounting substrate 3, an adhesive 4, and a wire 7. .
  • MEMS Micro Electro Mechanical Systems
  • the conversion element 1 with a diaphragm which is a MEMS microphone element, is a first semiconductor element including an Si frame 2 that supports the diaphragm and an electrode pad 5.
  • the mounting substrate 3 made of glass epoxy resin is a substrate including an electrode land 6, a solder resist 9 that is an insulating layer, a recess 10 that is a first recess, and a Cu layer 11 that is a metal layer.
  • the Si frame 2 is formed on the outer periphery of the diaphragm to reinforce the diaphragm, and is fixed to the mounting substrate 3 with an adhesive 4.
  • the electrode pad 5 and the electrode land 6 of the mounting substrate 3 are connected by a wire 7.
  • a MEMS microphone having a size of about 2 mm ⁇ 3 mm has been developed.
  • the width 8 of the Si frame 2 supporting the diaphragm is reduced to about 100 ⁇ m, and the distance between the electrode pad 5 and the electrode land 6 is reduced to 400 ⁇ m. .
  • a solder resist 9 is formed on the mounting surface on the mounting substrate 3 on which the conversion element 1 is mounted. A part of the bonding surface of the conversion element 1 is solder resist using a general photolithography technique. A recess 10 from which 9 is removed is formed. A Cu layer 11, which is a wiring material for the mounting substrate 3, is disposed at the bottom of the recess 10. The height of the recess 10 is equal to the film thickness of the solder resist 9, and is about 25 ⁇ m, for example.
  • solder resist 9 which is at least a part of the uppermost surface of the mounting substrate 3, is formed immediately below the connection surface of the conversion element 1 so as to support the conversion element 1 in parallel with the mounting substrate 3.
  • FIG. 1B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 1 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element and the recess 10 provided in the mounting substrate 3. 1A described above is a cross-sectional view taken along the line XX ′ of FIG. 1B.
  • the width of the recess 10 is narrower than the width 8 of the Si frame 2.
  • the adhesive 4 is drawn on the recess 10 along the recess 10 of the mounting substrate 3.
  • the adhesive 4 is, for example, an epoxy acrylate adhesive having a viscosity of 9500 cp and a thixo ratio of 4.5, and is drawn with a nozzle having an inner diameter of 100 ⁇ m. Then, the Si frame 2 of the conversion element 1 is bonded to the adhesive 4 drawn on the recess 10.
  • the Si frame 2 Since the width of the recess 10 provided on the mounting substrate 3 is narrower than the width 8 of the Si frame 2, the Si frame 2 is bonded above the surface of the solder resist 9.
  • the adhesive 4 is filled in the recess 10.
  • the adhesive 4 is formed on the solder resist 9 by protruding the width of the recess 10 by pressing the Si frame 2. Therefore, the thickness of the adhesive 4 on the solder resist 9 is, for example, about 8 ⁇ m, but the thickness of the adhesive 4 in the recess 10 is increased by 25 ⁇ m, which is the thickness of the solder resist 9. About 32 ⁇ m.
  • the concave portion 10 is formed on a part of the surface of the mounting substrate 3 and the adhesive surface with the conversion element 1 via the adhesive 4, and the adhesive 4 is formed on at least a part of the concave portion 10. Filled.
  • a sufficient volume of the adhesive 4 can be secured in the adhesion region of the Si frame 2, and the stress due to the difference in thermal expansion coefficient between the mounting substrate 3 and the conversion element 1 can be sufficiently absorbed. . Further, the bleed width 12 of the adhesive 4 at this time can be suppressed to 100 ⁇ m or less.
  • FIG. 2 is a graph showing the characteristic variation of the diaphragm of the semiconductor device according to the first embodiment.
  • the MEMS microphone device converts the diaphragm vibration depending on the sound frequency into an electric signal, and this diaphragm has a resonance frequency.
  • the resonance frequency is low when the sensitivity of the diaphragm is good.
  • the conversion element 1 is mounted on the mounting substrate 3, the conversion element 1 is deformed due to thermal stress from the mounting substrate 3 and the resonance frequency is increased.
  • the horizontal axis represents the thickness of the adhesive 4 when the conversion element 1 is mounted on the mounting substrate 3, and the vertical axis represents the rate of increase (%) in the resonance frequency due to mounting.
  • the thicker the adhesive film thickness the smaller the variation rate of the resonance frequency.
  • those with recesses ⁇ in FIG. 2 can suppress the fluctuation rate to 30% or less compared to those with no recesses and the same amount of adhesive applied ( ⁇ R in FIG. 2). it can.
  • ⁇ R in FIG. 2 the concave portion 10 on the surface of the mounting substrate 3 and part of the adhesion surface with the conversion element 1, it is possible to sufficiently absorb the stress to the MEMS microphone element, and to perform secondary mounting and temperature.
  • the adhesive has a narrow bleed width and can sufficiently absorb stress even when a low viscosity adhesive is used. Capacity and thickness can be secured. Therefore, there are no side effects such as an increase in bleed width when the viscosity of the adhesive is increased and a rise in the adhesive on the semiconductor element, and it is not necessary to increase the board mounting area.
  • glass epoxy resin is used as the mounting substrate 3.
  • the glass epoxy resin has a large difference in thermal expansion coefficient from that of a semiconductor element such as the conversion element 1.
  • a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. Further, the difference in thermal expansion coefficient between the ceramic substrate and the resin substrate for secondary mounting becomes large, and there is a risk of causing problems such as peeling of the semiconductor device including the ceramic substrate.
  • the stress can be reduced even if an inexpensive glass epoxy resin is used. It is possible to avoid problems caused by
  • the volume of the adhesive 4 is secured even when a fragile semiconductor element such as the conversion element 1 with a diaphragm is mounted.
  • thermal stress can be absorbed.
  • the adhesive can be applied with a nozzle having a narrow inner diameter corresponding to the width.
  • a Cu layer 11 that is a wiring material of the substrate is disposed at the bottom of the recess 10. Since the solder resist 9 and the Cu layer 11 used for the mounting substrate 3 are materials constituting the conventional mounting substrate, the concave portion 10 can be formed without increasing the number of processes and the cost only by changing the layout at the time of manufacturing the substrate. It becomes possible to do.
  • the bottom of the recess 10 may be the core material or prepreg of the mounting substrate 3.
  • the side wall of the recess 10 may be the Cu layer 11 which is a wiring material, the solder resist 9 or both. These materials are materials that constitute a conventional substrate, and the concave portion 10 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate.
  • the side wall of the recessed part 10 is comprised with both the Cu layer 11 and the soldering resist 9, a deeper recessed part can be formed and adhesive agent thickness can be increased.
  • FIG. 3A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 2 of the present invention.
  • the semiconductor device 51 shown in the figure represents the structure of the conversion element portion of the MEMS microphone, and includes the conversion element 21, the mounting substrate 23, and the adhesive 4.
  • the conversion element 1 with a diaphragm is a first semiconductor element including a Si frame 2 that supports the diaphragm.
  • the mounting substrate 23 made of glass epoxy resin is a substrate that includes a recess 30 that is a third recess and a Cu layer 24 that is a metal layer.
  • the Si frame 2 is fixed to the mounting substrate 23 via the adhesive 4.
  • the width 8 of the Si frame 2 that is the base of the conversion element 21 used in the present embodiment is 100 ⁇ m.
  • a Cu layer 24 which is a wiring material having a film thickness of 20 ⁇ m is formed on the mounting surface of the mounting substrate 23.
  • FIG. 3B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 2 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element and the recess 30 provided in the mounting substrate 23. 3A described above is a cross-sectional view taken along line YY ′ of FIG. 3B.
  • the Cu layer 24 is formed from the outer peripheral portion of the mounting substrate 23 to the inside of 50 ⁇ m from the outer periphery of the Si frame 2. Therefore, the recess 30 is formed with a depth of 20 ⁇ m over an unformed region of the Cu layer 24, that is, an inner region from the inner side of the Si frame 2 by 50 ⁇ m. Since the patterning of the Cu layer 24 is performed simultaneously with the formation of the wiring of the mounting substrate 23, the recess 30 can be formed without increasing the number of steps.
  • the bottom of the recess 30 is a core material of the mounting substrate 23.
  • the silicone adhesive 4 having a viscosity of 10000 cp is drawn on the recess 30.
  • the Si frame 2 Since the outer periphery of the recess 30 provided on the mounting substrate 23 is smaller than the outer periphery of the Si frame 2, the Si frame 2 is bonded above the surface of the Cu layer 24 that is the wiring material of the mounting substrate 23.
  • the adhesive 4 is filled in the recess 30.
  • the adhesive 4 is formed on the Cu layer 24 by protruding the outer periphery of the recess 30 by pressure bonding of the Si frame 2. Therefore, the thickness of the adhesive 4 on the Cu layer 24 is 10 ⁇ m, for example, and about 30 ⁇ m in the recess 30.
  • the bleed width 12 at this time is 50 ⁇ m. That is, the recess 30 is formed on a part of the surface of the mounting substrate 23 and the adhesive element 4 via the adhesive 4, and the adhesive 4 is formed on at least a part of the recess 30. Filled.
  • the bleed width is narrow even when a low-viscosity adhesive is used by providing a recess on a part of the surface of the mounting substrate 23 and the adhesive element 4 via the adhesive 4.
  • capacitance of the adhesive agent which can absorb stress enough can be ensured. Therefore, it is possible to obtain a MEMS microphone device that can sufficiently absorb the thermal stress applied to the conversion element 21 and has a small characteristic variation with respect to secondary mounting and temperature, and that can be miniaturized.
  • a glass epoxy resin is used as the mounting substrate 23.
  • the glass epoxy resin has a large difference in thermal expansion coefficient from that of a semiconductor element such as the conversion element 21.
  • a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. Further, the difference in thermal expansion coefficient between the ceramic substrate and the resin substrate for secondary mounting becomes large, and there is a risk of causing problems such as peeling of the semiconductor device including the ceramic substrate.
  • the stress can be reduced even if an inexpensive glass epoxy resin is used. It is possible to avoid problems caused by
  • the bottom of the recess 30 is the core material of the substrate. Since the Cu layer 24 used for the mounting substrate 23 is a material that constitutes a conventional mounting substrate, it is possible to form the recesses 30 without increasing the number of processes and the cost only by changing the layout at the time of manufacturing the substrate. It becomes.
  • the bottom of the recess 30 may be a prepreg.
  • the Cu layer 24 which is a wiring material, a solder resist, or both may be sufficient as the side wall of the recessed part 30.
  • FIG. These materials are materials that constitute a conventional substrate, and the concave portion 30 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate.
  • the side wall of the recessed part 30 is comprised with both the Cu layer 24 and a soldering resist, a deeper recessed part can be formed and adhesive agent thickness can be increased.
  • FIG. 4A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 3 of the present invention.
  • the semiconductor device 52 shown in the figure represents the structure of the conversion element portion of the MEMS microphone, and includes the conversion element 21, the mounting substrate 33, and the adhesive 4.
  • the conversion element 21 with a diaphragm is a first semiconductor element including the Si frame 2 that supports the diaphragm.
  • the mounting substrate 33 is a substrate that includes a recess 40 that is a third recess and a Cu layer 24 that is a metal layer.
  • the semiconductor device 52 according to the present embodiment is different from the semiconductor device 51 according to the second embodiment in that a sound hole 25 is provided in the mounting substrate 33.
  • a description will be given focusing on differences from the second embodiment.
  • a sound hole 25 for collecting sound is formed in the center of the mounting substrate 33.
  • the Si frame 2 is fixed to the mounting substrate 33 via the adhesive 4.
  • the width 8 of the Si frame 2 that is the base of the conversion element 21 used in the present embodiment is 100 ⁇ m.
  • a Cu layer 24 which is a wiring material having a film thickness of 20 ⁇ m is formed on the mounting surface of the mounting substrate 33.
  • FIG. 4B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 3 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element, the recess 40 provided in the mounting substrate 33, and the sound hole 25. 4A described above is a cross-sectional view taken along the line ZZ ′ of FIG. 4B.
  • the Cu layer 24 is formed from the outer peripheral portion of the mounting substrate 23 to the inside of 50 ⁇ m from the outer periphery of the Si frame 2. Therefore, the recess 40 is formed at a depth of 20 ⁇ m over a region where the Cu layer 24 is not formed, that is, an inner region from the inner periphery of the Si frame 2 that is 50 ⁇ m from the inner side and where no sound hole 25 is provided. Yes. Since the patterning of the Cu layer 24 is performed simultaneously with the formation of the wiring of the mounting substrate 33, the recess 40 can be formed without increasing the number of steps.
  • the bottom of the recess 40 is a core material of the mounting substrate 33.
  • an epoxy acrylate adhesive 4 having a viscosity of 9500 cp and a thixo ratio of 4.5 is drawn on the recess 40 using a dispense nozzle having an inner diameter of 100 ⁇ m.
  • a bleed of the adhesive 4 having a narrow width is formed on the outer wall side 14 of the Si frame 2.
  • the recess 40 is filled with the adhesive 4 on the inner wall side 15 of the Si frame 2, the spreading of the adhesive 4 into the sound hole 25 is stopped by the surface tension.
  • the thickness of the adhesive 4 is, for example, 10 ⁇ m on the Cu layer 24, and the recess 40 is about 30 ⁇ m thick by 20 ⁇ m, which is the wiring film thickness, and the thermal stress is sufficiently absorbed with a narrow bleed width.
  • the recess 40 is formed on a part of the surface of the mounting substrate 33 and the adhesive element 4 via the adhesive 4, and the adhesive 4 is formed on at least a part of the recess 40. Filled.
  • a glass epoxy resin is used as the mounting substrate 33.
  • the glass epoxy resin has a large difference in thermal expansion coefficient from that of a semiconductor element such as the conversion element 21.
  • a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. Further, the difference in thermal expansion coefficient between the ceramic substrate and the resin substrate for secondary mounting becomes large, and there is a risk of causing problems such as peeling of the semiconductor device including the ceramic substrate.
  • the stress can be reduced even if an inexpensive glass epoxy resin is used. It is possible to avoid problems caused by
  • the volume of the adhesive 4 is secured even when a fragile semiconductor element such as the conversion element 21 with a diaphragm is mounted.
  • thermal stress can be absorbed.
  • the adhesive can be applied with a nozzle having a narrow inner diameter corresponding to the width.
  • the bottom of the recess 40 is the core material of the substrate. Further, since the Cu layer 24 used for the mounting substrate 33 is a material constituting the conventional mounting substrate, the recess 40 can be formed without increasing the number of steps and the cost only by changing the layout at the time of manufacturing the substrate. Is possible.
  • the bottom of the recess 40 may be a prepreg.
  • the sidewall of the recess 40 may be the Cu layer 24 that is a wiring material, the solder resist, or both. These materials are materials constituting the conventional substrate, and the recess 40 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate.
  • the side wall of the recessed part 40 is comprised with both the Cu layer 24 and a soldering resist, a deeper recessed part can be formed and adhesive agent thickness can be increased.
  • FIG. 5A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 4 of the present invention.
  • the conversion element 1 which is a MEMS microphone element with a diaphragm and the amplifier element 16 having a thickness of 100 ⁇ m for amplifying a signal from the conversion element 1 are fixed to the mounting substrate 43 made of glass epoxy resin through the adhesive 4.
  • the mounting substrate 43 made of glass epoxy resin through the adhesive 4.
  • the electrode pad 5 of the conversion element 1 and the electrode land 6 of the mounting substrate 43 are connected by a wire 7.
  • the amplifier element 16 is fixed at a distance of 400 ⁇ m from the conversion element 1, and each electrode is connected by a wire 17.
  • FIG. 5B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 4 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element, the amplifier element 16, and the recess 10 provided in the mounting substrate 43 and the grooves 18 that are a plurality of fourth recesses. Further, FIG. 5A described above is a cross-sectional view taken along the line VV ′ of FIG. 5B.
  • the width of the Si frame 2 that is the base of the conversion element 1 used in the present embodiment is 100 ⁇ m, but by patterning the solder resist 9 on the mounting surface of the mounting substrate 43 by screen printing technology, the width is 75 ⁇ m, A recess 10 having a depth of 25 ⁇ m is provided.
  • a plurality of grooves 18 are formed on the mounting surface of the amplifier element 16 by patterning the solder resist 9 into a 75 ⁇ m line and space.
  • the adhesive 4 is drawn on the recess 10 along the recess 10 of the mounting substrate 43, and is drawn on the groove 18 along the plurality of grooves 18.
  • the adhesive 4 is, for example, an epoxy acrylate adhesive having a viscosity of 9500 cp and a thixo ratio of 4.5, and is filled using a dispense nozzle having an inner diameter of 100 ⁇ m.
  • the thickness of the adhesive 4 in the recess 10 and the groove 18 is about 30 ⁇ m, respectively, and the thermal stress is absorbed while the bleed width 12 is suppressed. Can do. Therefore, it is possible to obtain a MEMS microphone device that can be miniaturized with little characteristic variation with respect to secondary mounting and temperature, and in which the amplifier element 16 is not destroyed.
  • the amplifier element 16 may be an electronic component that can be fixed to the mounting substrate via the adhesive 4, and may be, for example, a second semiconductor element.
  • the bonding surface of the second semiconductor element is flat, and the thickness of the adhesive 4 between the second semiconductor element and the mounting substrate 43 in the region of the groove 18 is the second thickness outside the region of the groove 18. It is larger than the adhesive thickness between the semiconductor element and the mounting substrate 43.
  • the volume and thickness of the adhesive 4 can be increased without increasing the viscosity of the adhesive 4, and the stress due to the difference in thermal expansion coefficient between the second semiconductor element and the mounting substrate 43 can be reduced.
  • FIG. 6A is a structural cross-sectional view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention.
  • the semiconductor device 54 shown in the figure represents the structure of the conversion element portion of the MEMS microphone, and includes the conversion element 1, the mounting substrate 63, and the adhesive 4.
  • the conversion element 1 with a diaphragm is a first semiconductor element including a Si frame 2 that supports the diaphragm.
  • the mounting substrate 63 made of glass epoxy resin is a substrate including the recess 20, the Cu layer 11, and the solder resist 9.
  • a description will be given focusing on differences from the first embodiment.
  • the Si frame 2 is fixed to the mounting substrate 63 via the adhesive 4.
  • FIG. 6B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm, and the recess 20 provided on the mounting substrate 63 and the width 8 of the Si frame 2. 6A is a cross-sectional view taken along the line XX ′ of FIG. 6B.
  • the width of the Si frame 2 which is the base of the conversion element 1 is 100 ⁇ m, and the first concave portion having a width of 75 ⁇ m and a depth of 25 ⁇ m is formed by patterning the solder resist 9 on the mounting surface of the mounting substrate 63 by screen printing technology.
  • a recess 20A is provided.
  • the Cu layer 11 which is the lower layer of the solder resist 9 is patterned to form the recess 20B which is the second recess having a width of 150 ⁇ m.
  • the recess 20 ⁇ / b> B is a lower part of the recess 20 ⁇ / b> A and is continuously formed in the thickness direction of the solder resist 9 and the Cu layer 11.
  • solder resist 9 that is at least a part of the uppermost surface of the mounting substrate 63 is formed so as to support the conversion element 1 in parallel with the mounting substrate 63 immediately below the connection surface of the conversion element 1.
  • the thickness of the adhesive 4 can be further increased as compared with the case where the concave portion is formed only in the solder resist 9 without forming the concave portion in the Cu layer 11, and can be about 50 ⁇ m. .
  • a larger thermal stress absorption effect can be obtained, and the characteristic variation can be further reduced.
  • the bottom of the recess 20 may be a core material or a prepreg of the mounting substrate 63. Further, the sidewall of the recess 20 may be the Cu layer 11 that is a wiring material, the solder resist 9, or both. These materials are materials that constitute a conventional substrate, and the recess 20 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate.
  • FIG. 7A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 6 of the present invention.
  • FIG. 7B is a structural cross-sectional view of the semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention.
  • FIG. 7C is a perspective plan view of a semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone, and the recess 60 provided on the mounting substrate 73 and the width 8 of the Si frame 2.
  • 7A is a cross-sectional view taken along X1-X1 ′ in FIG. 7C
  • FIG. 7B is a cross-sectional view taken along X2-X2 ′ in FIG. 7C.
  • the width of the Si frame 2 that is the base of the conversion element 1 is 100 ⁇ m, and the solder resist 9 is patterned on the mounting surface of the mounting substrate 73 by the screen printing technique.
  • a recess 60A which is a first recess having a depth of 25 ⁇ m, is provided.
  • the Cu layer 11 which is the lower layer of the solder resist 9 is patterned, and the concave portion 60B which is the second concave portion is formed as in the fifth embodiment.
  • the recess 60B is a lower part of the recess 60A, and is continuously formed in the thickness direction of the solder resist 9 and the Cu layer 11.
  • a projecting portion made of the solder resist 9 is left in the region connecting the inner side and the outer side of the mounting region of the conversion element 1.
  • the structure of the protruding portion is a structure that supports the conversion element 1. With this structure, even if the width of the recess 60 is set to exceed the width 8 of the Si frame 2 of the conversion element 1, the conversion element 1 falls into the recess 60 as shown in the sectional view of FIG. There is no. Further, by making the width of the recess 60 wider than the width 8 of the Si frame 2, it is possible to increase the distance between the solder resist 9, which is a structure of the mounting substrate 73, and the conversion element 1. Can be obtained.
  • the semiconductor device according to the present invention is not limited to the first to sixth embodiments.
  • the present invention is particularly useful for a MEMS microphone having a conversion element with a diaphragm and a semiconductor device having a thin semiconductor element having a thickness of 100 ⁇ m or less, and a small semiconductor having a fragile structure and a stress-sensitive semiconductor element. Ideal for use in equipment.

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Abstract

Provided is a semiconductor device having a structure with which even when an adhesive with a low viscosity is used in order that the adhesive hardly causes clogging even when a nozzle having a small inner diameter is used and in order to suppress a bleeding width, the adhesive can sufficiently absorb the stress. The semiconductor device comprises a mounting board (3) and a conversion device (1) having a fragile structure, fixed on the surface of the mounting board (3) through an adhesive (4). In the surface of the mounting board (3), a recess (10) is formed at a part of a plane to which the conversion device (1) is bonded through the adhesive (4). The adhesive (4) is filled in at least a part of the recess (10).

Description

半導体装置Semiconductor device
　本発明は、脆弱な構造を持つ半導体素子、例えば、ダイアフラム付きの変換素子や、厚さ１００μｍ以下の薄い半導体素子において、実装時に素子への応力を低減できる実装基板の構造を備えた半導体装置に関する。 The present invention relates to a semiconductor device having a structure of a mounting substrate that can reduce stress on a semiconductor element having a fragile structure, for example, a conversion element with a diaphragm or a thin semiconductor element having a thickness of 100 μm or less. .
　ダイアフラム付きの変換素子や、厚さ１００μｍ以下の薄い半導体素子に代表される脆弱な構造を持つ半導体素子は、実装時の応力によって素子がひずみ易く、このために狙いの特性が得られないという課題がある。例えば、ダイアフラムつきの変換素子においては、素子への応力によってダイアフラムが変形し感度が劣化する。また、厚さ１００μｍ以下の薄い半導体素子においては、応力により素子が変形することでトランジスタの閾値電圧や静止電流量が変化し規格を満たさなくなり、ひどい場合には半導体素子が割れてしまう。この応力は、実装基板と上記半導体素子との熱膨張係数が違うことによって発生する。従来は、実装基板と上記半導体素子との間の接着剤で、上記応力を吸収させるという対策がとられている。 A conversion element with a diaphragm or a semiconductor element having a fragile structure represented by a thin semiconductor element having a thickness of 100 μm or less is likely to be distorted due to stress at the time of mounting, and thus a target characteristic cannot be obtained. There is. For example, in a conversion element with a diaphragm, the diaphragm is deformed by the stress on the element and the sensitivity is deteriorated. Further, in a thin semiconductor element having a thickness of 100 μm or less, the element is deformed by stress, so that the threshold voltage and the amount of quiescent current of the transistor are changed and the standard is not satisfied. In a severe case, the semiconductor element is broken. This stress is generated by a difference in thermal expansion coefficient between the mounting substrate and the semiconductor element. Conventionally, a measure has been taken to absorb the stress with an adhesive between the mounting substrate and the semiconductor element.
　半導体素子を実装する方法の一つとして、熱硬化型の樹脂を用いて基板に接着する方法がある。特許文献１には、音信号を電気信号に変換するＭＥＭＳ（Ｍｉｃｒｏ　Ｅｌｅｃｔｒｏ　Ｍｅｃｈａｎｉｃａｌ　Ｓｙｓｔｅｍｓ）チップと当該ＭＥＭＳチップが接合された基板と、ＭＥＭＳチップを覆うシールドケースとを備えるＭＥＭＳマイクロフォンの構造が開示されている。特許文献１に記載されたＭＥＭＳマイクロフォンに代表される従来のＭＥＭＳパッケージにおいては、ＭＥＭＳチップと基板との接合部は、図６に示されるような構造をとる。 As one method for mounting a semiconductor element, there is a method of bonding to a substrate using a thermosetting resin. Patent Document 1 discloses a structure of a MEMS microphone that includes a MEMS (Micro Electro Mechanical Systems) chip that converts a sound signal into an electrical signal, a substrate to which the MEMS chip is bonded, and a shield case that covers the MEMS chip. Yes. In the conventional MEMS package represented by the MEMS microphone described in Patent Document 1, the junction between the MEMS chip and the substrate has a structure as shown in FIG.
　図８は、従来の半導体装置の構造断面図である。同図に記載された半導体装置１００では、ダイアフラム付きの変換素子１０１が、実装基板１０２に接着剤１０３を介して固着されており、変換素子１０１の電極パッド１０４と実装基板１０２の電極ランド１０５とはワイヤ１０６で接続されている。 FIG. 8 is a structural cross-sectional view of a conventional semiconductor device. In the semiconductor device 100 shown in the figure, a conversion element 101 with a diaphragm is fixed to a mounting substrate 102 with an adhesive 103, and an electrode pad 104 of the conversion element 101 and an electrode land 105 of the mounting substrate 102 Are connected by a wire 106.
　このとき、変換素子１０１と実装基板１０２との熱膨張係数の差に基づき、変換素子１０１に応力が加わり素子の特性が変化するという問題がある。変換素子１０１への応力を低減するためには、接着剤１０３の（１）粘度を高く（固形分の含有比を上げる）し、（２）チクソ比を高くし（流れにくくし）、（３）膜厚を厚くして体積を増加させることにより、接着剤１０３で応力を吸収させる対策が一般的にとられている。 At this time, there is a problem in that stress is applied to the conversion element 101 and the characteristics of the element change based on the difference in thermal expansion coefficient between the conversion element 101 and the mounting substrate 102. In order to reduce the stress to the conversion element 101, (1) increase the viscosity (increase the solid content ratio) of the adhesive 103, (2) increase the thixo ratio (make it difficult to flow), (3 A measure is generally taken to absorb the stress with the adhesive 103 by increasing the volume by increasing the film thickness.
特開２００８－１９９３５３号公報JP 2008-199353 A
　しかしながら、ダイアフラム付きの変換素子のように、素子の接着面、つまりダイアフラムを支える台座が枠状になっている場合は、この枠の幅に合わせて接着剤を描画しなくてはならない。このとき、上記枠の幅程度に調整された内径を有するノズルを使用して、接着剤を素子の接着面または素子を接着する基板面に描画する必要があるが、小型化が進行するにつれ枠の幅が狭くなるので、これに対応してノズルの内径を小さくする必要がある。ノズル内径を小さくすると、高粘度の接着剤はノズルの目詰まりが生じ易く、細く描画するのが困難になるという課題が生じる。 However, when the adhesive surface of the element, that is, the pedestal that supports the diaphragm has a frame shape like a conversion element with a diaphragm, the adhesive must be drawn in accordance with the width of the frame. At this time, it is necessary to draw an adhesive on the bonding surface of the element or the substrate surface to which the element is bonded using a nozzle having an inner diameter adjusted to the width of the frame, but as the miniaturization progresses, the frame Therefore, it is necessary to reduce the inner diameter of the nozzle correspondingly. When the inner diameter of the nozzle is reduced, the high-viscosity adhesive is likely to be clogged with the nozzle, and there is a problem that it is difficult to draw finely.
　また、厚さ１００μｍ以下の薄い半導体素子においても、接着剤を厚く塗布するために粘度が高く、チクソ比の高い接着剤を使用することが好ましいが、接着剤は素子の底部全面に広がりにくくなる。これを解消するため、接着剤の量を増やすことにより、接着剤を厚くすることができ素子底部全面に拡げることは可能となるが、同時にブリード幅１０７も広がる。このため、素子と実装基板との電極ランドを離して配置しなくてはならなくなり、パッケージの小型化が難しくなるという課題が生じる。 Further, even in a thin semiconductor element having a thickness of 100 μm or less, it is preferable to use an adhesive having a high viscosity and a high thixotropy in order to apply the adhesive thickly, but the adhesive is difficult to spread over the entire bottom of the element. . In order to solve this problem, by increasing the amount of the adhesive, it is possible to increase the thickness of the adhesive and to spread the entire surface of the element bottom, but at the same time, the bleed width 107 also increases. For this reason, the electrode lands of the element and the mounting substrate must be arranged apart from each other, which causes a problem that it is difficult to reduce the size of the package.
　本発明は、上記課題に鑑みてなされたものであり、内径の小さいノズルを使った場合でも接着剤が目詰まりしにくく、また、ブリード幅を抑えるため低粘度の接着剤を用いた場合でも、当該接着剤が十分に応力を吸収できる構造を備えた半導体装置を提供することを目的とする。 The present invention has been made in view of the above problems, and even when a nozzle with a small inner diameter is used, the adhesive is not easily clogged, and even when a low-viscosity adhesive is used to suppress the bleed width, It is an object of the present invention to provide a semiconductor device having a structure in which the adhesive can sufficiently absorb stress.
　上記の課題を解決するために、本発明の一態様に係る半導体装置は、実装基板と、前記実装基板の表面に形成された金属層と、前記金属層上に形成され、第１の凹部を有する絶縁層と、前記第１の凹部に充填された接着剤と、前記絶縁層上に、前記接着剤を介して固定された第１の半導体素子とを備え、前記第１の凹部は、前記第１の半導体素子の接着面の直下に、かつ、前記第１の半導体素子の接着面の少なくとも一部に設けられ、前記第１の半導体素子の接着面の周縁にも前記接着剤が充填されていることを特徴とする。 In order to solve the above problems, a semiconductor device according to one embodiment of the present invention includes a mounting substrate, a metal layer formed on a surface of the mounting substrate, a first recess formed on the metal layer. An insulating layer, an adhesive filled in the first recess, and a first semiconductor element fixed on the insulating layer via the adhesive, wherein the first recess Provided immediately below the bonding surface of the first semiconductor element and at least a part of the bonding surface of the first semiconductor element, and the periphery of the bonding surface of the first semiconductor element is also filled with the adhesive. It is characterized by.
　これにより、脆弱な構造を持つ半導体素子と実装基板の接着面の一部に第１の凹部を設けることで、接着剤を第１の凹部に留めることができ、接着剤の粘度を上げることなく接着剤の体積を増やすことができる。このため接着剤の粘度を上げた場合のブリード幅の増大や半導体素子への接着剤の這い上がりといった副作用がなく、対策のために基板実装面積を増加させる必要もなくなる。 Thus, by providing the first recess in a part of the bonding surface between the semiconductor element having a fragile structure and the mounting substrate, the adhesive can be retained in the first recess, and the viscosity of the adhesive is not increased. The volume of the adhesive can be increased. For this reason, there are no side effects such as an increase in the bleed width when the viscosity of the adhesive is increased and a rise in the adhesive on the semiconductor element, and it is not necessary to increase the board mounting area as a countermeasure.
　また、前記実装基板の表面に前記金属層の一部が前記絶縁層から露出してなる少なくとも１つ以上の電極ランドと、前記第１の半導体素子の上面外周に少なくとも１つ以上の電極パッドとを備え、前記電極ランドと前記電極パッドとは、電気的に接続されていてもよい。 Also, at least one or more electrode lands formed by exposing a part of the metal layer on the surface of the mounting substrate from the insulating layer, and at least one or more electrode pads on the outer periphery of the upper surface of the first semiconductor element. The electrode land and the electrode pad may be electrically connected.
　また、前記第１の半導体素子の接着面は平坦であり、前記第１の凹部の領域内での前記第１の半導体素子と前記実装基板との間の接着剤厚みは、前記第１の凹部の領域外での前記第１の半導体素子と前記実装基板との間の接着剤厚みより大きいことが好ましい。 The bonding surface of the first semiconductor element is flat, and the adhesive thickness between the first semiconductor element and the mounting substrate in the region of the first recess is the first recess. It is preferable that the thickness is larger than the adhesive thickness between the first semiconductor element and the mounting substrate outside the region.
　これにより、平坦な接着面を有する第１の半導体素子と平坦な表面を有する実装基板とが接着される場合の接着剤の量に比べ、第１の凹部領域にさらに接着剤を確保することができる。よって、接着剤の粘度を上げることなく接着剤の体積及び厚みを増やすことができ、半導体素子と実装基板との熱膨張係数の差による応力を低減することができる。 Accordingly, it is possible to further secure the adhesive in the first recessed region as compared with the amount of the adhesive when the first semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
　また、前記第１の凹部の底面は、前記金属層で構成されていてもよい。 Further, the bottom surface of the first recess may be constituted by the metal layer.
　これにより、金属層は、従来実装基板上に形成されている材料であるので、基板作製時のレイアウトを変更するだけで、工程数及び製造コストを増やすことなく半導体層装置を製造することができる。 Thereby, since the metal layer is a material conventionally formed on the mounting substrate, the semiconductor layer device can be manufactured without increasing the number of steps and the manufacturing cost only by changing the layout at the time of manufacturing the substrate. .
　また、前記金属層は、前記第１の凹部と厚み方向に連続的に形成された第２の凹部を備え、前記第２の凹部の領域内にも、前記接着剤が充填されていてもよい。 The metal layer may include a second recess formed continuously with the first recess in the thickness direction, and the adhesive may be filled in the region of the second recess. .
　これにより、金属層に凹部を形成せず絶縁層のみに凹部を形成した場合と比較して、接着剤の厚みをさらに増すことができる。これにより、さらに大きな熱応力吸収効果を得ることができ、より特性変動を小さくすることが出来る。 Thereby, the thickness of the adhesive can be further increased as compared with the case where the recess is formed only in the insulating layer without forming the recess in the metal layer. As a result, a larger thermal stress absorption effect can be obtained, and the characteristic variation can be further reduced.
　また、前記第１の凹部および前記第２の凹部の領域内での前記第１の半導体素子と前記実装基板との間の接着剤厚みは、前記第１の凹部および前記第２の凹部の領域外での前記第１の半導体素子と前記実装基板との間の接着剤厚みより大きいことが好ましい。 The adhesive thickness between the first semiconductor element and the mounting substrate in the first concave portion and the second concave portion is determined by the areas of the first concave portion and the second concave portion. It is preferable that the thickness is larger than the adhesive thickness between the first semiconductor element and the mounting substrate outside.
　これにより、平坦な接着面を有する第１の半導体素子と平坦な表面を有する実装基板とが接着される場合の接着剤の量に比べ、第１及び第２の凹部領域にさらに接着剤を確保することができる。よって、接着剤の粘度を上げることなく接着剤の体積及び厚みを増やすことができ、半導体素子と実装基板との熱膨張係数の差による応力を低減することができる。 Thereby, compared with the amount of the adhesive when the first semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded, the adhesive is further secured in the first and second recessed regions. can do. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
　また、前記第２の凹部の底面は、コア材またはプリプレグで構成され、前記第２の凹部の側壁は、前記金属層、前記絶縁層、またはその両方で構成されていてもよい。 Further, the bottom surface of the second recess may be made of a core material or a prepreg, and the side wall of the second recess may be made of the metal layer, the insulating layer, or both.
　これにより、コア材、プリプレグ、及び絶縁層は、従来実装基板を構成している材料であるので、新たな材料を付加せずとも基板作製時のレイアウトを変更するだけで、工程数及び製造コストを増やすことなく半導体装置を製造することができる。 As a result, the core material, the prepreg, and the insulating layer are materials that conventionally constitute a mounting board. Therefore, the number of processes and manufacturing costs can be reduced by simply changing the layout at the time of board production without adding a new material. The semiconductor device can be manufactured without increasing
　また、前記実装基板の最上面の少なくとも一部は、前記第１の半導体素子の接続面の直下に、前記第１の半導体素子を前記実装基板に対して平行に支持する配置で形成されていてもよい。 Further, at least a part of the uppermost surface of the mounting substrate is formed immediately below the connection surface of the first semiconductor element so as to support the first semiconductor element in parallel with the mounting substrate. Also good.
　また、本発明の一態様に係る半導体装置は、実装基板と、前記実装基板の表面に形成され第３の凹部を有する金属層と、前記第３の凹部に充填された接着剤と、前記金属層上に、前記接着剤を介して固定された第１の半導体素子とを備え、前記第３の凹部領域の外周は、前記第１の半導体素子の外周よりも小さい領域に形成されており、前記第１の半導体素子の接着面の周縁にも前記接着剤が充填されていることを特徴とする。 In addition, a semiconductor device according to one embodiment of the present invention includes a mounting substrate, a metal layer formed on a surface of the mounting substrate and having a third recess, an adhesive filled in the third recess, and the metal A first semiconductor element fixed on the layer via the adhesive, and the outer periphery of the third recessed region is formed in a region smaller than the outer periphery of the first semiconductor element; The adhesive is also filled in the periphery of the bonding surface of the first semiconductor element.
　これにより、実装基板の表面であって、接着剤を介した第１の半導体素子との接着面の一部に第３の凹部を設けることで、低粘度の接着剤を用いてもブリード幅が狭く、かつ、十分応力を吸収できる接着剤の容量を確保することができる。よって、第１の半導体素子への熱応力を十分吸収することができ、二次実装や温度に対し特性変動の少ない、小型化可能なＭＥＭＳマイクロフォン装置を得ることができる。 As a result, the third recess is provided on a part of the surface of the mounting substrate that is bonded to the first semiconductor element via the adhesive, so that the bleed width can be increased even when a low-viscosity adhesive is used. The capacity of the adhesive that is narrow and can sufficiently absorb stress can be secured. Therefore, it is possible to obtain a miniaturizable MEMS microphone device that can sufficiently absorb the thermal stress applied to the first semiconductor element and has little characteristic variation with respect to secondary mounting and temperature.
　また、前記第３の凹部の領域内での前記第１の半導体素子と前記実装基板との間の接着剤厚みは、前記第３の凹部の領域外での前記第１の半導体素子と前記実装基板との間の接着剤厚みより大きいことが好ましい。 Further, the adhesive thickness between the first semiconductor element and the mounting substrate in the region of the third recess is equal to the first semiconductor element and the mounting outside the region of the third recess. It is preferable that the thickness is larger than the adhesive thickness between the substrate.
　これにより、平坦な接着面を有する第１の半導体素子と平坦な表面を有する実装基板とが接着される場合の接着剤の量に比べ、第３の凹部領域にさらに接着剤を確保することができる。よって、接着剤の粘度を上げることなく接着剤の体積及び厚みを増やすことができ、半導体素子と実装基板との熱膨張係数の差による応力を低減することができる。 Thereby, it is possible to further secure the adhesive in the third recessed region as compared with the amount of the adhesive when the first semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
　また、さらに、前記実装基板の表面に、前記接着剤を介して固定される電子部品を備えてもよい。 Furthermore, an electronic component that is fixed to the surface of the mounting substrate via the adhesive may be further provided.
　また、前記電子部品の直下において、前記絶縁層は複数の第４の凹部を有し、前記複数の第４の凹部領域内および前記電子部品の接着面の周縁には、前記接着剤が充填されていてもよい。 In addition, immediately below the electronic component, the insulating layer has a plurality of fourth recesses, and the adhesive is filled in the plurality of fourth recess regions and in the periphery of the bonding surface of the electronic component. It may be.
　また、前記第４の凹部の底面は、コア材またはプリプレグで構成され、前記第４の凹部の側壁は、前記金属層で構成されていてもよい。 Further, the bottom surface of the fourth recess may be made of a core material or a prepreg, and the side wall of the fourth recess may be made of the metal layer.
　これにより、コア材、プリプレグ、及び絶縁層は、従来実装基板を構成している材料であるので、新たな材料を付加せずとも基板作製時のレイアウトを変更するだけで、工程数及び製造コストを増やすことなく半導体装置を製造することができる。 As a result, the core material, the prepreg, and the insulating layer are materials that conventionally constitute a mounting board. Therefore, the number of processes and manufacturing costs can be reduced by simply changing the layout at the time of board production without adding a new material. The semiconductor device can be manufactured without increasing
　また、前記電子部品の上面に、少なくとも１つ以上の電極ランドを備え、前記電極ランドと前記第１の半導体素子の電極パッドとは、電気的に接続されていてもよい。 Further, at least one or more electrode lands may be provided on the upper surface of the electronic component, and the electrode lands and the electrode pads of the first semiconductor element may be electrically connected.
　また、前記電子部品は、第２の半導体素子であってもよい。 The electronic component may be a second semiconductor element.
　また、前記第２の半導体素子の接着面は平坦であり、前記第４の凹部の領域内での前記第２の半導体素子と前記実装基板との間の接着剤厚みは、前記第４の凹部の領域外での前記第２の半導体素子と前記実装基板との間の接着剤厚みより大きいことが好ましい。 The bonding surface of the second semiconductor element is flat, and the adhesive thickness between the second semiconductor element and the mounting substrate in the area of the fourth recess is the fourth recess. It is preferable that the thickness is larger than the adhesive thickness between the second semiconductor element and the mounting substrate outside the area.
　これにより、平坦な接着面を有する第２の半導体素子と平坦な表面を有する実装基板とが接着される場合の接着剤の量に比べ、第４の凹部領域にさらに接着剤を確保することができる。よって、接着剤の粘度を上げることなく接着剤の体積及び厚みを増やすことができ、半導体素子と実装基板との熱膨張係数の差による応力を低減することができる。 Thereby, it is possible to further secure the adhesive in the fourth recessed region as compared with the amount of the adhesive when the second semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive can be increased without increasing the viscosity of the adhesive, and the stress due to the difference in thermal expansion coefficient between the semiconductor element and the mounting substrate can be reduced.
　また、前記第２の半導体素子の厚さは、１００μｍ以下であってもよい。 In addition, the thickness of the second semiconductor element may be 100 μm or less.
　これにより、脆弱な構造を持つ半導体素子が、厚さ１００μｍ以下の薄い半導体素子である場合、実装基板に凹部を設けたため、ブリード幅を抑えた粘性の低い接着剤を用いた場合でも、凹部の体積及び厚みだけ接着剤の量を増加させることができ、実装基板と半導体素子の熱膨張係数の差に基づいて半導体素子にかかる応力を十分吸収することが可能になり、閾値電圧や静止電流量の変動の少なくすることができる。また実装時の応力による半導体素子の破壊を防ぐことができる。 Accordingly, when the semiconductor element having a fragile structure is a thin semiconductor element having a thickness of 100 μm or less, the concave portion is provided on the mounting substrate. Therefore, even when a low-viscosity adhesive that suppresses the bleed width is used, The amount of adhesive can be increased by the volume and thickness, and the stress applied to the semiconductor element can be sufficiently absorbed based on the difference in the thermal expansion coefficient between the mounting substrate and the semiconductor element, and the threshold voltage and quiescent current amount The fluctuation of the can be reduced. In addition, it is possible to prevent the semiconductor element from being broken due to stress during mounting.
　また、前記電子部品は、増幅素子であってもよい。 The electronic component may be an amplifying element.
　また、前記実装基板は、ガラスエポキシ樹脂を含むことが好ましい。 The mounting board preferably contains a glass epoxy resin.
　ガラスエポキシ樹脂は半導体素子との熱膨張係数の差が大きい。セラミック基板を用いれば半導体素子との熱膨張係数の差は小さくできるがコストは増大する。また、セラミック基板と二次実装用の樹脂基板との熱膨張係数の差が大きくなり半導体装置が剥がれるなどの不具合を招く恐れがある。半導体素子と実装基板の接着面の一部に凹部を設けることにより、安価なガラスエポキシ樹脂を用いても応力を低減することができ、二次実装での応力による不具合も回避することができる。 Glass epoxy resin has a large difference in thermal expansion coefficient from that of semiconductor elements. If a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. In addition, the difference in coefficient of thermal expansion between the ceramic substrate and the resin substrate for secondary mounting is increased, and there is a risk of causing problems such as peeling of the semiconductor device. By providing a recess in a part of the bonding surface between the semiconductor element and the mounting substrate, the stress can be reduced even if an inexpensive glass epoxy resin is used, and problems due to the stress in the secondary mounting can be avoided.
　また、前記第１の半導体素子は、ダイアフラム付きのマイクロフォン素子であることが好ましい。 The first semiconductor element is preferably a microphone element with a diaphragm.
　これにより、脆弱な構造を持つ半導体素子が、ダイアフラム付きの変換素子である場合、変換素子と実装基板の接着面の一部に凹部を設けることにより、粘度の低い接着剤を使用した場合でも接着剤の体積及び厚みを確保し、熱応力を吸収することができる。このため装置の小型化に伴いＳｉ枠の幅が細くなっても枠の幅にあわせた内径の細いノズルで接着剤を塗布することが可能となる。 As a result, when the semiconductor element having a fragile structure is a conversion element with a diaphragm, a concave portion is provided in a part of the bonding surface between the conversion element and the mounting substrate, so that even when an adhesive having a low viscosity is used. The volume and thickness of the agent can be ensured and thermal stress can be absorbed. For this reason, even if the width of the Si frame is reduced with the miniaturization of the apparatus, the adhesive can be applied with a nozzle having a narrow inner diameter corresponding to the width of the frame.
　また、前記絶縁層は、ソルダーレジストであってもよい。 Further, the insulating layer may be a solder resist.
　これにより、ソルダーレジストとは、従来実装基板を構成している材料であるので、基板作製時のレイアウトを変更するだけで、工程数及び製造コストを増やすことなく半導体層装置を製造することができる。 Thus, since the solder resist is a material that conventionally constitutes a mounting substrate, it is possible to manufacture a semiconductor layer device without increasing the number of steps and the manufacturing cost by simply changing the layout at the time of substrate manufacture. .
　本発明の半導体層装置によれば、脆弱な構造を持つ半導体素子と実装基板の接着面の一部に凹部を設けることで、接着剤の粘度を上げることなく接着剤の体積を増やすことができる。よって、接着剤の粘度を上げた場合のブリード幅の増大や上記半導体素子への接着剤の這い上がりといった副作用が発生することなく上記半導体素子と実装基板との間に発生する応力が緩和される。また、上記応力緩和対策のために基板実装面積を増加させる必要もなくなる。 According to the semiconductor layer device of the present invention, it is possible to increase the volume of the adhesive without increasing the viscosity of the adhesive by providing the recess in a part of the adhesive surface between the semiconductor element having a fragile structure and the mounting substrate. . Therefore, the stress generated between the semiconductor element and the mounting substrate is alleviated without causing side effects such as an increase in bleed width when the viscosity of the adhesive is increased and a rise of the adhesive on the semiconductor element. . Further, it is not necessary to increase the board mounting area for the stress relaxation countermeasure.
図１Ａは、本発明の実施の形態１に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 1A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 1 of the present invention. 図１Ｂは、本発明の実施の形態１に係る第１の半導体素子を備える半導体装置の平面図である。FIG. 1B is a plan view of a semiconductor device including the first semiconductor element according to Embodiment 1 of the present invention. 図２は、実施の形態１に係る半導体装置の有するダイアフラムの特性変動を表すグラフである。FIG. 2 is a graph showing the characteristic variation of the diaphragm of the semiconductor device according to the first embodiment. 図３Ａは、本発明の実施の形態２に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 3A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 2 of the present invention. 図３Ｂは、本発明の実施の形態２に係る第１の半導体素子を備える半導体装置の平面透視図である。FIG. 3B is a plan perspective view of the semiconductor device including the first semiconductor element according to Embodiment 2 of the present invention. 図４Ａは、本発明の実施の形態３に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 4A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 3 of the present invention. 図４Ｂは、本発明の実施の形態３に係る第１の半導体素子を備える半導体装置の平面透視図である。FIG. 4B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 3 of the present invention. 図５Ａは、本発明の実施の形態４に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 5A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 4 of the present invention. 図５Ｂは、本発明の実施の形態４に係る第１の半導体素子を備える半導体装置の平面透視図である。FIG. 5B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 4 of the present invention. 図６Ａは、本発明の実施の形態５に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 6A is a structural cross-sectional view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention. 図６Ｂは、本発明の実施の形態５に係る第１の半導体素子を備える半導体装置の平面透視図である。FIG. 6B is a perspective plan view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention. 図７Ａは、本発明の実施の形態６に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 7A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 6 of the present invention. 図７Ｂは、本発明の実施の形態６に係る第１の半導体素子を備える半導体装置の構造断面図である。FIG. 7B is a structural cross-sectional view of a semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention. 図７Ｃは、本発明の実施の形態６に係る第１の半導体素子を備える半導体装置の平面透視図である。FIG. 7C is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention. 図８は、従来の半導体装置の構造断面図である。FIG. 8 is a structural cross-sectional view of a conventional semiconductor device.
　以下、本発明に係る半導体装置の好適な実施の形態を、図面を参照して説明する。 Hereinafter, a preferred embodiment of a semiconductor device according to the present invention will be described with reference to the drawings.
　（実施の形態１）
　図１Ａは、本発明の実施の形態１に係る第１の半導体素子を備える半導体装置の構造断面図である。同図に記載された半導体装置５０は、ＭＥＭＳ（Ｍｉｃｒｏ　Ｅｌｅｃｔｒｏ　Ｍｅｃｈａｎｉｃａｌ　Ｓｙｓｔｅｍｓ）マイクロフォンの変換素子部の構造を表しており、変換素子１と、実装基板３と、接着剤４と、ワイヤ７とを備える。 (Embodiment 1)
FIG. 1A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 1 of the present invention. A semiconductor device 50 shown in the figure represents a structure of a conversion element portion of a MEMS (Micro Electro Mechanical Systems) microphone, and includes a conversion element 1, a mounting substrate 3, an adhesive 4, and a wire 7. .
　ＭＥＭＳマイク素子であるダイアフラム付きの変換素子１は、ダイアフラムを支えるＳｉ枠２と、電極パッド５とを備える第１の半導体素子である。ガラスエポキシ樹脂製の実装基板３は、電極ランド６と、絶縁層であるソルダーレジスト９と、第１の凹部である凹部１０と、金属層であるＣｕ層１１とを備える基板である。 The conversion element 1 with a diaphragm, which is a MEMS microphone element, is a first semiconductor element including an Si frame 2 that supports the diaphragm and an electrode pad 5. The mounting substrate 3 made of glass epoxy resin is a substrate including an electrode land 6, a solder resist 9 that is an insulating layer, a recess 10 that is a first recess, and a Cu layer 11 that is a metal layer.
　Ｓｉ枠２は、ダイアフラムを補強するため当該ダイアフラムの外周部に形成され、接着剤４を介して実装基板３に固着されている。また、電極パッド５と実装基板３の電極ランド６とは、ワイヤ７で接続されている。 The Si frame 2 is formed on the outer periphery of the diaphragm to reinforce the diaphragm, and is fixed to the mounting substrate 3 with an adhesive 4. The electrode pad 5 and the electrode land 6 of the mounting substrate 3 are connected by a wire 7.
　現在、ＭＥＭＳマイクロフォンの小型化は、約２ｍｍ×３ｍｍのものが開発されており、ダイアフラムを支えるＳｉ枠２の幅８は約１００μm、電極パッド５と電極ランド６の距離は４００μｍまで狭められている。 Currently, a MEMS microphone having a size of about 2 mm × 3 mm has been developed. The width 8 of the Si frame 2 supporting the diaphragm is reduced to about 100 μm, and the distance between the electrode pad 5 and the electrode land 6 is reduced to 400 μm. .
　変換素子１が実装される実装基板３上の実装面には、ソルダーレジスト９が形成されており、変換素子１の接着面の一部には、一般的なフォトリソグラフィー技術を用いて、ソルダーレジスト９が除去された凹部１０が形成されている。凹部１０の底部には実装基板３の配線材料であるＣｕ層１１が配置されている。凹部１０の高さはソルダーレジスト９の膜厚と等しく、例えば、約２５μmである。 A solder resist 9 is formed on the mounting surface on the mounting substrate 3 on which the conversion element 1 is mounted. A part of the bonding surface of the conversion element 1 is solder resist using a general photolithography technique. A recess 10 from which 9 is removed is formed. A Cu layer 11, which is a wiring material for the mounting substrate 3, is disposed at the bottom of the recess 10. The height of the recess 10 is equal to the film thickness of the solder resist 9, and is about 25 μm, for example.
　つまり、実装基板３の最上面の少なくとも一部であるソルダーレジスト９は、変換素子１の接続面の直下に、変換素子１を実装基板３に対して平行に支持する配置で形成されている。 That is, the solder resist 9, which is at least a part of the uppermost surface of the mounting substrate 3, is formed immediately below the connection surface of the conversion element 1 so as to support the conversion element 1 in parallel with the mounting substrate 3.
　図１Ｂは、本発明の実施の形態１に係る第１の半導体素子を備える半導体装置の平面透視図である。具体的には、ＭＥＭＳマイク素子のダイアフラムを支えるＳｉ枠２と、実装基板３に設けられた凹部１０とを示す平面図である。また、上述した図１Ａは、図１ＢのＸ－Ｘ'の断面図である。 FIG. 1B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 1 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element and the recess 10 provided in the mounting substrate 3. 1A described above is a cross-sectional view taken along the line XX ′ of FIG. 1B.
　凹部１０の幅は、Ｓｉ枠２の幅８より狭くなっている。接着剤４は、実装基板３の凹部１０に沿って凹部１０上に描画される。このとき接着剤４は、例えば、粘度９５００ｃｐ、チクソ比４．５のエポキシアクリレート系接着剤であり、内径１００μｍのノズルで描画される。そして、変換素子１のＳｉ枠２が、凹部１０上に描画された接着剤４に接着される。 The width of the recess 10 is narrower than the width 8 of the Si frame 2. The adhesive 4 is drawn on the recess 10 along the recess 10 of the mounting substrate 3. At this time, the adhesive 4 is, for example, an epoxy acrylate adhesive having a viscosity of 9500 cp and a thixo ratio of 4.5, and is drawn with a nozzle having an inner diameter of 100 μm. Then, the Si frame 2 of the conversion element 1 is bonded to the adhesive 4 drawn on the recess 10.
　実装基板３上に設けられた凹部１０の幅はＳｉ枠２の幅８より狭いため、Ｓｉ枠２はソルダーレジスト９の表面より上で接着される。接着剤４は凹部１０に満たされており、一方、Ｓｉ枠２の圧着により、凹部１０の幅をはみ出してソルダーレジスト９上にも形成されている。よって、ソルダーレジスト９上での接着剤４の厚さは、例えば、約８μｍであるが、凹部１０内での接着剤４の膜厚は、ソルダーレジスト９の膜厚分である２５μｍだけ厚くなり、約３２μｍとなる。つまり、実装基板３の表面であって、接着剤４を介した変換素子１との接着面の一部に、凹部１０が形成されており、凹部１０の少なくとも一部には、接着剤４が充填されている。 Since the width of the recess 10 provided on the mounting substrate 3 is narrower than the width 8 of the Si frame 2, the Si frame 2 is bonded above the surface of the solder resist 9. The adhesive 4 is filled in the recess 10. On the other hand, the adhesive 4 is formed on the solder resist 9 by protruding the width of the recess 10 by pressing the Si frame 2. Therefore, the thickness of the adhesive 4 on the solder resist 9 is, for example, about 8 μm, but the thickness of the adhesive 4 in the recess 10 is increased by 25 μm, which is the thickness of the solder resist 9. About 32 μm. In other words, the concave portion 10 is formed on a part of the surface of the mounting substrate 3 and the adhesive surface with the conversion element 1 via the adhesive 4, and the adhesive 4 is formed on at least a part of the concave portion 10. Filled.
　この凹部１０が設けられたことにより、Ｓｉ枠２の接着領域において接着剤４の体積を十分確保することができ、実装基板３と変換素子１との熱膨張係数の差による応力を十分吸収できる。また、このときの接着剤４のブリード幅１２を、１００μｍ以下に抑えることができる。 By providing the recess 10, a sufficient volume of the adhesive 4 can be secured in the adhesion region of the Si frame 2, and the stress due to the difference in thermal expansion coefficient between the mounting substrate 3 and the conversion element 1 can be sufficiently absorbed. . Further, the bleed width 12 of the adhesive 4 at this time can be suppressed to 100 μm or less.
　図２は、実施の形態１に係る半導体装置の有するダイアフラムの特性変動を表すグラフである。ＭＥＭＳマイクロフォン装置は、音の周波数に依存したダイアフラムの振動を電気信号に変換しているが、このダイアフラムは共振周波数を有する。ダイアフラムの感度が良い状態では共振周波数は低い。しかし、変換素子１を実装基板３へ実装すると、実装基板３からの熱応力などにより、変換素子１が変形し、共振周波数が上昇する。感度の良いマイクロフォン装置を得るには、実装での共振周波数の上昇を抑えることが大事である。 FIG. 2 is a graph showing the characteristic variation of the diaphragm of the semiconductor device according to the first embodiment. The MEMS microphone device converts the diaphragm vibration depending on the sound frequency into an electric signal, and this diaphragm has a resonance frequency. The resonance frequency is low when the sensitivity of the diaphragm is good. However, when the conversion element 1 is mounted on the mounting substrate 3, the conversion element 1 is deformed due to thermal stress from the mounting substrate 3 and the resonance frequency is increased. In order to obtain a microphone device with good sensitivity, it is important to suppress an increase in resonance frequency during mounting.
　図２では、横軸は、変換素子１を実装基板３に実装する場合の接着剤４の厚みを表し、縦軸は、実装による共振周波数の上昇割合（％）を表している。図２からわかるように、接着剤膜厚が厚いほど、共振周波数の変動率が小さくなる。また、凹部を設けたもの（図２の○）は、凹部を設けず同量の接着剤を塗布したもの（図２の●Ｒ）と比較して、変動率を３割以下に抑えることができる。このように、実装基板３の表面であって変換素子１との接着面の一部に凹部１０を設けることで、ＭＥＭＳマイクロフォン素子への応力を十分吸収することができ、二次実装や温度に対し特性変動の少ない、小型化可能なＭＥＭＳマイクロフォン装置を得ることができる。 2, the horizontal axis represents the thickness of the adhesive 4 when the conversion element 1 is mounted on the mounting substrate 3, and the vertical axis represents the rate of increase (%) in the resonance frequency due to mounting. As can be seen from FIG. 2, the thicker the adhesive film thickness, the smaller the variation rate of the resonance frequency. In addition, those with recesses (◯ in FIG. 2) can suppress the fluctuation rate to 30% or less compared to those with no recesses and the same amount of adhesive applied (● R in FIG. 2). it can. Thus, by providing the concave portion 10 on the surface of the mounting substrate 3 and part of the adhesion surface with the conversion element 1, it is possible to sufficiently absorb the stress to the MEMS microphone element, and to perform secondary mounting and temperature. On the other hand, it is possible to obtain a MEMS microphone device that can be miniaturized with little characteristic variation.
　以上のように、変換素子１と実装基板３との接着面の一部に凹部１０を設けることで、低粘度の接着剤を用いてもブリード幅が狭く、かつ、十分応力を吸収できる接着剤の容量及び厚みを確保することができる。よって、接着剤の粘度を上げた場合のブリード幅の増大や半導体素子への接着剤の這い上がりといった副作用がなく、基板実装面積を増加させる必要もなくなる。 As described above, by providing the recess 10 in a part of the bonding surface between the conversion element 1 and the mounting substrate 3, the adhesive has a narrow bleed width and can sufficiently absorb stress even when a low viscosity adhesive is used. Capacity and thickness can be secured. Therefore, there are no side effects such as an increase in bleed width when the viscosity of the adhesive is increased and a rise in the adhesive on the semiconductor element, and it is not necessary to increase the board mounting area.
　また、本実施の形態では、実装基板３としてガラスエポキシ樹脂を用いている。ガラスエポキシ樹脂は、変換素子１などの半導体素子との熱膨張係数の差が大きい。これに対し、セラミック基板を用いれば半導体素子との熱膨張係数の差は小さくできるがコストは増大する。さらに、セラミック基板と二次実装用の樹脂基板との熱膨張係数の差が大きくなりセラミック基板を含む半導体装置が剥がれるなどの不具合を招く恐れがある。 Further, in the present embodiment, glass epoxy resin is used as the mounting substrate 3. The glass epoxy resin has a large difference in thermal expansion coefficient from that of a semiconductor element such as the conversion element 1. On the other hand, if a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. Further, the difference in thermal expansion coefficient between the ceramic substrate and the resin substrate for secondary mounting becomes large, and there is a risk of causing problems such as peeling of the semiconductor device including the ceramic substrate.
　本実施の形態のように、半導体素子と実装基板の接着面の一部に凹部１０を設けることにより、安価なガラスエポキシ樹脂を用いても応力を低減することができ、二次実装での応力による不具合も回避することができる。 By providing the recess 10 in a part of the bonding surface between the semiconductor element and the mounting substrate as in this embodiment, the stress can be reduced even if an inexpensive glass epoxy resin is used. It is possible to avoid problems caused by
　また、変換素子１と実装基板３との接着面の一部に凹部１０を設けることで、ダイアフラム付きの変換素子１のような脆弱な半導体素子を実装する場合でも、接着剤４の体積を確保し、熱応力を吸収することができる。このため装置の小型化に伴いＳｉ枠２の幅が細くなっても当該幅にあわせた内径の細いノズルで接着剤を塗布することが可能となる。 Further, by providing a recess 10 in a part of the bonding surface between the conversion element 1 and the mounting substrate 3, the volume of the adhesive 4 is secured even when a fragile semiconductor element such as the conversion element 1 with a diaphragm is mounted. In addition, thermal stress can be absorbed. For this reason, even if the width of the Si frame 2 is reduced with the miniaturization of the apparatus, the adhesive can be applied with a nozzle having a narrow inner diameter corresponding to the width.
　また、本実施の形態では、凹部１０の底部には、基板の配線材料であるＣｕ層１１が配置されている。実装基板３に使用されたソルダーレジスト９及びＣｕ層１１は、従来実装基板を構成する材料であるので、基板作製時のレイアウトを変更するだけで、工程数及びコストを増やすことなく凹部１０を形成することが可能となる。 Further, in the present embodiment, a Cu layer 11 that is a wiring material of the substrate is disposed at the bottom of the recess 10. Since the solder resist 9 and the Cu layer 11 used for the mounting substrate 3 are materials constituting the conventional mounting substrate, the concave portion 10 can be formed without increasing the number of processes and the cost only by changing the layout at the time of manufacturing the substrate. It becomes possible to do.
　なお、凹部１０の底部は、実装基板３のコア材またはプリプレグであってもよい。また、凹部１０の側壁は、配線材料であるＣｕ層１１、ソルダーレジスト９またはその両方であってもよい。これらの材料は従来基板を構成している材料であり、基板作製時のレイアウトを変更すれば工程数及びコストを増やすことなく凹部１０を形成することができる。また、凹部１０の側壁をＣｕ層１１及びソルダーレジスト９の両方で構成した場合は、より深い凹部を形成することができ、接着剤厚みを増加させることができる。 Note that the bottom of the recess 10 may be the core material or prepreg of the mounting substrate 3. Further, the side wall of the recess 10 may be the Cu layer 11 which is a wiring material, the solder resist 9 or both. These materials are materials that constitute a conventional substrate, and the concave portion 10 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate. Moreover, when the side wall of the recessed part 10 is comprised with both the Cu layer 11 and the soldering resist 9, a deeper recessed part can be formed and adhesive agent thickness can be increased.
　（実施の形態２）
　図３Ａは、本発明の実施の形態２に係る第１の半導体素子を備える半導体装置の構造断面図である。同図に記載された半導体装置５１は、ＭＥＭＳマイクロフォンの変換素子部の構造を表しており、変換素子２１と、実装基板２３と、接着剤４とを備える。 (Embodiment 2)
FIG. 3A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 2 of the present invention. The semiconductor device 51 shown in the figure represents the structure of the conversion element portion of the MEMS microphone, and includes the conversion element 21, the mounting substrate 23, and the adhesive 4.
　ダイアフラム付きの変換素子１は、ダイアフラムを支えるＳｉ枠２を備える第１の半導体素子である。ガラスエポキシ樹脂製の実装基板２３は、第３の凹部である凹部３０と、金属層であるＣｕ層２４とを備える基板である。以下、実施の形態１と異なる点を中心に説明する。 The conversion element 1 with a diaphragm is a first semiconductor element including a Si frame 2 that supports the diaphragm. The mounting substrate 23 made of glass epoxy resin is a substrate that includes a recess 30 that is a third recess and a Cu layer 24 that is a metal layer. Hereinafter, a description will be given focusing on differences from the first embodiment.
　Ｓｉ枠２は、接着剤４を介して実装基板２３に固着されている。本実施の形態で用いた変換素子２１の台座であるＳｉ枠２の幅８は、１００μｍである。これに対し、実装基板２３の実装面には、膜厚２０μｍの配線材料であるＣｕ層２４が形成されている。 The Si frame 2 is fixed to the mounting substrate 23 via the adhesive 4. The width 8 of the Si frame 2 that is the base of the conversion element 21 used in the present embodiment is 100 μm. On the other hand, a Cu layer 24 which is a wiring material having a film thickness of 20 μm is formed on the mounting surface of the mounting substrate 23.
　図３Ｂは、本発明の実施の形態２に係る第１の半導体素子を備える半導体装置の平面透視図である。具体的には、ＭＥＭＳマイク素子のダイアフラムを支えるＳｉ枠２と実装基板２３に設けられた凹部３０とを示す平面図である。また、上述した図３Ａは、図３ＢのＹ－Ｙ'の断面図である。 FIG. 3B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 2 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element and the recess 30 provided in the mounting substrate 23. 3A described above is a cross-sectional view taken along line YY ′ of FIG. 3B.
　Ｃｕ層２４は、実装基板２３の外周部から、Ｓｉ枠２の外周より５０μｍ内側まで形成されている。よって、凹部３０は、Ｃｕ層２４の未形成領域、つまり、Ｓｉ枠２の外周より５０μｍ内側からの内側領域にわたり、深さ２０μｍで形成されている。このＣｕ層２４のパターニングは、実装基板２３の配線形成と同時に実施されるため、工程を増やさず凹部３０の形成が可能である。 The Cu layer 24 is formed from the outer peripheral portion of the mounting substrate 23 to the inside of 50 μm from the outer periphery of the Si frame 2. Therefore, the recess 30 is formed with a depth of 20 μm over an unformed region of the Cu layer 24, that is, an inner region from the inner side of the Si frame 2 by 50 μm. Since the patterning of the Cu layer 24 is performed simultaneously with the formation of the wiring of the mounting substrate 23, the recess 30 can be formed without increasing the number of steps.
　凹部３０の底部は実装基板２３のコア材である。この凹部３０へ、例えば、粘度１００００ｃｐのシリコーン系の接着剤４が描画される。 The bottom of the recess 30 is a core material of the mounting substrate 23. For example, the silicone adhesive 4 having a viscosity of 10000 cp is drawn on the recess 30.
　実装基板２３上に設けられた凹部３０の外周はＳｉ枠２の外周より小さいため、Ｓｉ枠２は、実装基板２３の配線材料であるＣｕ層２４の表面より上で接着される。接着剤４は凹部３０に満たされており、一方、Ｓｉ枠２の圧着により、凹部３０の外周をはみ出してＣｕ層２４上にも形成されている。よって、Ｃｕ層２４上での接着剤４の厚さは、例えば、１０μｍとなり、凹部３０では約３０μｍとなる。このときのブリード幅１２は５０μｍとなる。つまり、実装基板２３の表面であって、接着剤４を介した変換素子２１との接着面の一部に、凹部３０が形成されており、凹部３０の少なくとも一部には、接着剤４が充填されている。 Since the outer periphery of the recess 30 provided on the mounting substrate 23 is smaller than the outer periphery of the Si frame 2, the Si frame 2 is bonded above the surface of the Cu layer 24 that is the wiring material of the mounting substrate 23. The adhesive 4 is filled in the recess 30. On the other hand, the adhesive 4 is formed on the Cu layer 24 by protruding the outer periphery of the recess 30 by pressure bonding of the Si frame 2. Therefore, the thickness of the adhesive 4 on the Cu layer 24 is 10 μm, for example, and about 30 μm in the recess 30. The bleed width 12 at this time is 50 μm. That is, the recess 30 is formed on a part of the surface of the mounting substrate 23 and the adhesive element 4 via the adhesive 4, and the adhesive 4 is formed on at least a part of the recess 30. Filled.
　以上のように、実装基板２３の表面であって、接着剤４を介した変換素子２１との接着面の一部に凹部を設けることで、低粘度の接着剤を用いてもブリード幅が狭く、かつ、十分応力を吸収できる接着剤の容量を確保することができる。よって、変換素子２１への熱応力を十分吸収することができ、二次実装や温度に対し特性変動の少ない、小型化可能なＭＥＭＳマイクロフォン装置を得ることができる。 As described above, the bleed width is narrow even when a low-viscosity adhesive is used by providing a recess on a part of the surface of the mounting substrate 23 and the adhesive element 4 via the adhesive 4. And the capacity | capacitance of the adhesive agent which can absorb stress enough can be ensured. Therefore, it is possible to obtain a MEMS microphone device that can sufficiently absorb the thermal stress applied to the conversion element 21 and has a small characteristic variation with respect to secondary mounting and temperature, and that can be miniaturized.
　また、本実施の形態では、実装基板２３としてガラスエポキシ樹脂を用いている。ガラスエポキシ樹脂は、変換素子２１などの半導体素子との熱膨張係数の差が大きい。これに対し、セラミック基板を用いれば半導体素子との熱膨張係数の差は小さくできるがコストは増大する。さらに、セラミック基板と二次実装用の樹脂基板との熱膨張係数の差が大きくなりセラミック基板を含む半導体装置が剥がれるなどの不具合を招く恐れがある。 In the present embodiment, a glass epoxy resin is used as the mounting substrate 23. The glass epoxy resin has a large difference in thermal expansion coefficient from that of a semiconductor element such as the conversion element 21. On the other hand, if a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. Further, the difference in thermal expansion coefficient between the ceramic substrate and the resin substrate for secondary mounting becomes large, and there is a risk of causing problems such as peeling of the semiconductor device including the ceramic substrate.
　本実施の形態のように、半導体素子と実装基板の接着面の一部に凹部３０を設けることにより、安価なガラスエポキシ樹脂を用いても応力を低減することができ、二次実装での応力による不具合も回避することができる。 By providing the recess 30 in a part of the bonding surface between the semiconductor element and the mounting substrate as in the present embodiment, the stress can be reduced even if an inexpensive glass epoxy resin is used. It is possible to avoid problems caused by
　また、本実施の形態では、凹部３０の底部は基板のコア材料となっている。実装基板２３に使用されたＣｕ層２４は、従来実装基板を構成する材料であるので、基板作製時のレイアウトを変更するだけで、工程数及びコストを増やすことなく凹部３０を形成することが可能となる。 In the present embodiment, the bottom of the recess 30 is the core material of the substrate. Since the Cu layer 24 used for the mounting substrate 23 is a material that constitutes a conventional mounting substrate, it is possible to form the recesses 30 without increasing the number of processes and the cost only by changing the layout at the time of manufacturing the substrate. It becomes.
　なお、凹部３０の底部は、プリプレグであってもよい。また、凹部３０の側壁は、配線材料であるＣｕ層２４、ソルダーレジストまたはその両方であってもよい。これらの材料は従来基板を構成している材料であり、基板作製時のレイアウトを変更すれば工程数及びコストを増やすことなく凹部３０を形成することができる。また、凹部３０の側壁をＣｕ層２４及びソルダーレジストの両方で構成した場合は、より深い凹部を形成することができ、接着剤厚みを増加させることができる。 Note that the bottom of the recess 30 may be a prepreg. Moreover, the Cu layer 24 which is a wiring material, a solder resist, or both may be sufficient as the side wall of the recessed part 30. FIG. These materials are materials that constitute a conventional substrate, and the concave portion 30 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate. Moreover, when the side wall of the recessed part 30 is comprised with both the Cu layer 24 and a soldering resist, a deeper recessed part can be formed and adhesive agent thickness can be increased.
　（実施の形態３）
　図４Ａは、本発明の実施の形態３に係る第１の半導体素子を備える半導体装置の構造断面図である。同図に記載された半導体装置５２は、ＭＥＭＳマイクロフォンの変換素子部の構造を表しており、変換素子２１と、実装基板３３と、接着剤４とを備える。 (Embodiment 3)
FIG. 4A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 3 of the present invention. The semiconductor device 52 shown in the figure represents the structure of the conversion element portion of the MEMS microphone, and includes the conversion element 21, the mounting substrate 33, and the adhesive 4.
　ダイアフラム付きの変換素子２１は、ダイアフラムを支えるＳｉ枠２を備える第１の半導体素子である。実装基板３３は、第３の凹部である凹部４０と、金属層であるＣｕ層２４とを備える基板である。本実施の形態に係る半導体装置５２は、実施の形態２に係る半導体装置５１と比較して、実装基板３３に音孔２５が設けられている点が異なる。以下、実施の形態２と異なる点を中心に説明する。 The conversion element 21 with a diaphragm is a first semiconductor element including the Si frame 2 that supports the diaphragm. The mounting substrate 33 is a substrate that includes a recess 40 that is a third recess and a Cu layer 24 that is a metal layer. The semiconductor device 52 according to the present embodiment is different from the semiconductor device 51 according to the second embodiment in that a sound hole 25 is provided in the mounting substrate 33. Hereinafter, a description will be given focusing on differences from the second embodiment.
　実装基板３３の基板中央には、集音するための音孔２５が開口されている。 A sound hole 25 for collecting sound is formed in the center of the mounting substrate 33.
　Ｓｉ枠２は、接着剤４を介して実装基板３３に固着されている。本実施の形態で用いた変換素子２１の台座であるＳｉ枠２の幅８は、１００μｍである。これに対し、実装基板３３の実装面には、膜厚２０μｍの配線材料であるＣｕ層２４が形成されている。 The Si frame 2 is fixed to the mounting substrate 33 via the adhesive 4. The width 8 of the Si frame 2 that is the base of the conversion element 21 used in the present embodiment is 100 μm. On the other hand, a Cu layer 24 which is a wiring material having a film thickness of 20 μm is formed on the mounting surface of the mounting substrate 33.
　図４Ｂは、本発明の実施の形態３に係る第１の半導体素子を備える半導体装置の平面透視図である。具体的には、ＭＥＭＳマイク素子のダイアフラムを支えるＳｉ枠２と、実装基板３３に設けられた凹部４０と、音孔２５とを示す平面図である。また、上述した図４Ａは、図４ＢのＺ－Ｚ'の断面図である。 FIG. 4B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 3 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element, the recess 40 provided in the mounting substrate 33, and the sound hole 25. 4A described above is a cross-sectional view taken along the line ZZ ′ of FIG. 4B.
　Ｃｕ層２４は、実装基板２３の外周部から、Ｓｉ枠２の外周より５０μｍ内側まで形成されている。よって、凹部４０は、Ｃｕ層２４の未形成領域、つまり、Ｓｉ枠２の外周より５０μｍ内側からの内側領域であって、音孔２５が設けられていない領域にわたり、深さ２０μｍで形成されている。このＣｕ層２４のパターニングは、実装基板３３の配線形成と同時に実施されるため、工程を増やさず凹部４０の形成が可能である。 The Cu layer 24 is formed from the outer peripheral portion of the mounting substrate 23 to the inside of 50 μm from the outer periphery of the Si frame 2. Therefore, the recess 40 is formed at a depth of 20 μm over a region where the Cu layer 24 is not formed, that is, an inner region from the inner periphery of the Si frame 2 that is 50 μm from the inner side and where no sound hole 25 is provided. Yes. Since the patterning of the Cu layer 24 is performed simultaneously with the formation of the wiring of the mounting substrate 33, the recess 40 can be formed without increasing the number of steps.
　凹部４０の底部は実装基板３３のコア材である。この凹部４０へ、例えば、粘度９５００ｃｐ、チクソ比４．５のエポキシアクリレート系の接着剤４が、内径１００μmのディスペンスノズルを用いて描画される。このとき、Ｓｉ枠２の外壁側１４には、幅の狭い接着剤４のブリードが形成される。一方、Ｓｉ枠２の内壁側１５には、凹部４０が接着剤４で満たされた後、表面張力により音孔２５内への接着剤４の拡がりが止まる。変換素子２１の実装後、接着剤４の膜厚は、例えばＣｕ層２４上では１０μmとなり、凹部４０では配線膜厚である２０μmだけ厚い３０μm程度となり、狭いブリード幅で熱応力を十分吸収させることができる。つまり、実装基板３３の表面であって、接着剤４を介した変換素子２１との接着面の一部に、凹部４０が形成されており、凹部４０の少なくとも一部には、接着剤４が充填されている。 The bottom of the recess 40 is a core material of the mounting substrate 33. For example, an epoxy acrylate adhesive 4 having a viscosity of 9500 cp and a thixo ratio of 4.5 is drawn on the recess 40 using a dispense nozzle having an inner diameter of 100 μm. At this time, a bleed of the adhesive 4 having a narrow width is formed on the outer wall side 14 of the Si frame 2. On the other hand, after the recess 40 is filled with the adhesive 4 on the inner wall side 15 of the Si frame 2, the spreading of the adhesive 4 into the sound hole 25 is stopped by the surface tension. After the conversion element 21 is mounted, the thickness of the adhesive 4 is, for example, 10 μm on the Cu layer 24, and the recess 40 is about 30 μm thick by 20 μm, which is the wiring film thickness, and the thermal stress is sufficiently absorbed with a narrow bleed width. Can do. That is, the recess 40 is formed on a part of the surface of the mounting substrate 33 and the adhesive element 4 via the adhesive 4, and the adhesive 4 is formed on at least a part of the recess 40. Filled.
　また、本実施の形態では、実装基板３３としてガラスエポキシ樹脂を用いている。ガラスエポキシ樹脂は、変換素子２１などの半導体素子との熱膨張係数の差が大きい。これに対し、セラミック基板を用いれば半導体素子との熱膨張係数の差は小さくできるがコストは増大する。さらに、セラミック基板と二次実装用の樹脂基板との熱膨張係数の差が大きくなりセラミック基板を含む半導体装置が剥がれるなどの不具合を招く恐れがある。 In the present embodiment, a glass epoxy resin is used as the mounting substrate 33. The glass epoxy resin has a large difference in thermal expansion coefficient from that of a semiconductor element such as the conversion element 21. On the other hand, if a ceramic substrate is used, the difference in thermal expansion coefficient from the semiconductor element can be reduced, but the cost increases. Further, the difference in thermal expansion coefficient between the ceramic substrate and the resin substrate for secondary mounting becomes large, and there is a risk of causing problems such as peeling of the semiconductor device including the ceramic substrate.
　本実施の形態のように、半導体素子と実装基板の接着面の一部に凹部４０を設けることにより、安価なガラスエポキシ樹脂を用いても応力を低減することができ、二次実装での応力による不具合も回避することができる。 By providing the recess 40 in a part of the bonding surface between the semiconductor element and the mounting substrate as in the present embodiment, the stress can be reduced even if an inexpensive glass epoxy resin is used. It is possible to avoid problems caused by
　また、変換素子２１と実装基板３３との接着面の一部に凹部４０を設けることで、ダイアフラム付きの変換素子２１のような脆弱な半導体素子を実装する場合でも、接着剤４の体積を確保し、熱応力を吸収することができる。このため装置の小型化に伴いＳｉ枠２の幅が細くなっても当該幅にあわせた内径の細いノズルで接着剤を塗布することが可能となる。 Further, by providing the recess 40 in a part of the bonding surface between the conversion element 21 and the mounting substrate 33, the volume of the adhesive 4 is secured even when a fragile semiconductor element such as the conversion element 21 with a diaphragm is mounted. In addition, thermal stress can be absorbed. For this reason, even if the width of the Si frame 2 is reduced with the miniaturization of the apparatus, the adhesive can be applied with a nozzle having a narrow inner diameter corresponding to the width.
　また、本実施の形態では、凹部４０の底部は、基板のコア材料となっている。また、実装基板３３に使用されたＣｕ層２４は、従来実装基板を構成する材料であるので、基板作製時のレイアウトを変更するだけで、工程数及びコストを増やすことなく凹部４０を形成することが可能となる。 In the present embodiment, the bottom of the recess 40 is the core material of the substrate. Further, since the Cu layer 24 used for the mounting substrate 33 is a material constituting the conventional mounting substrate, the recess 40 can be formed without increasing the number of steps and the cost only by changing the layout at the time of manufacturing the substrate. Is possible.
　なお、凹部４０の底部は、プリプレグであってもよい。また、凹部４０の側壁は、配線材料であるＣｕ層２４、ソルダーレジストまたはその両方であってもよい。これらの材料は従来基板を構成している材料であり、基板作製時のレイアウトを変更すれば工程数及びコストを増やすことなく凹部４０を形成することができる。また、凹部４０の側壁をＣｕ層２４及びソルダーレジストの両方で構成した場合は、より深い凹部を形成することができ、接着剤厚みを増加させることができる。 Note that the bottom of the recess 40 may be a prepreg. Further, the sidewall of the recess 40 may be the Cu layer 24 that is a wiring material, the solder resist, or both. These materials are materials constituting the conventional substrate, and the recess 40 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate. Moreover, when the side wall of the recessed part 40 is comprised with both the Cu layer 24 and a soldering resist, a deeper recessed part can be formed and adhesive agent thickness can be increased.
　（実施の形態４）
　図５Ａは、本発明の実施の形態４に係る第１の半導体素子を備える半導体装置の構造断面図である。ダイアフラム付きのＭＥＭＳマイクロフォン素子である変換素子１、および、変換素子１からの信号を増幅させるための厚さ１００μｍのアンプ素子１６がガラスエポキシ樹脂製の実装基板４３に、接着剤４を介して固着されている。 (Embodiment 4)
FIG. 5A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 4 of the present invention. The conversion element 1 which is a MEMS microphone element with a diaphragm and the amplifier element 16 having a thickness of 100 μm for amplifying a signal from the conversion element 1 are fixed to the mounting substrate 43 made of glass epoxy resin through the adhesive 4. Has been.
　変換素子１の電極パッド５と実装基板４３の電極ランド６とは、ワイヤ７で接続されている。アンプ素子１６は、変換素子１から４００μｍ離間して固着されており、それぞれの電極はワイヤ１７で接続されている。 The electrode pad 5 of the conversion element 1 and the electrode land 6 of the mounting substrate 43 are connected by a wire 7. The amplifier element 16 is fixed at a distance of 400 μm from the conversion element 1, and each electrode is connected by a wire 17.
　図５Ｂは、本発明の実施の形態４に係る第１の半導体素子を備える半導体装置の平面透視図である。具体的には、ＭＥＭＳマイク素子のダイアフラムを支えるＳｉ枠２と、アンプ素子１６と、実装基板４３に設けられた凹部１０及び複数の第４の凹部である溝１８とを示す平面図である。また、上述した図５Ａは、図５ＢのＶ－Ｖ'の断面図である。 FIG. 5B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 4 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone element, the amplifier element 16, and the recess 10 provided in the mounting substrate 43 and the grooves 18 that are a plurality of fourth recesses. Further, FIG. 5A described above is a cross-sectional view taken along the line VV ′ of FIG. 5B.
　本実施の形態で用いた変換素子１の台座であるＳｉ枠２の幅は１００μｍであるが、実装基板４３の実装面にはソルダーレジスト９を、スクリーン印刷技術によりパターニングすることにより、幅７５μｍ、深さ２５μｍの凹部１０が設けられている。 The width of the Si frame 2 that is the base of the conversion element 1 used in the present embodiment is 100 μm, but by patterning the solder resist 9 on the mounting surface of the mounting substrate 43 by screen printing technology, the width is 75 μm, A recess 10 having a depth of 25 μm is provided.
　一方、アンプ素子１６の実装面には、ソルダーレジスト９を７５μｍのラインアンドスペースにパターニングすることにより、複数の溝１８が形成されている。接着剤４は、実装基板４３の凹部１０に沿って、凹部１０上に描画され、また、複数の溝１８に沿って溝１８上に描画される。このとき、接着剤４は、例えば、粘度９５００ｃｐ、チクソ比４．５のエポキシアクリレート系接着剤であり、内径１００μmのディスペンスノズルを用いて充填される。この後に変換素子１、および、アンプ素子１６が実装されると、それぞれ凹部１０及び溝１８での接着剤４の厚みは、約３０μｍとなり、ブリード幅１２が抑制されつつ、熱応力を吸収させることができる。よって、二次実装や温度に対し特性変動が少なく、アンプ素子１６も破壊されない、小型化可能なＭＥＭＳマイクロフォン装置を得ることができる。 On the other hand, a plurality of grooves 18 are formed on the mounting surface of the amplifier element 16 by patterning the solder resist 9 into a 75 μm line and space. The adhesive 4 is drawn on the recess 10 along the recess 10 of the mounting substrate 43, and is drawn on the groove 18 along the plurality of grooves 18. At this time, the adhesive 4 is, for example, an epoxy acrylate adhesive having a viscosity of 9500 cp and a thixo ratio of 4.5, and is filled using a dispense nozzle having an inner diameter of 100 μm. After that, when the conversion element 1 and the amplifier element 16 are mounted, the thickness of the adhesive 4 in the recess 10 and the groove 18 is about 30 μm, respectively, and the thermal stress is absorbed while the bleed width 12 is suppressed. Can do. Therefore, it is possible to obtain a MEMS microphone device that can be miniaturized with little characteristic variation with respect to secondary mounting and temperature, and in which the amplifier element 16 is not destroyed.
　なお、アンプ素子１６は、接着剤４を介して実装基板に固定され得る電子部品であればよく、例えば、第２の半導体素子であってもよい。第２の半導体素子の接着面は平坦であり、溝１８の領域内での第２の半導体素子と実装基板４３との間の接着剤４の厚みは、溝１８の領域外での第２の半導体素子と実装基板４３との間の接着剤厚みより大きい。 The amplifier element 16 may be an electronic component that can be fixed to the mounting substrate via the adhesive 4, and may be, for example, a second semiconductor element. The bonding surface of the second semiconductor element is flat, and the thickness of the adhesive 4 between the second semiconductor element and the mounting substrate 43 in the region of the groove 18 is the second thickness outside the region of the groove 18. It is larger than the adhesive thickness between the semiconductor element and the mounting substrate 43.
　これにより、平坦な接着面を有する第２の半導体素子と平坦な表面を有する実装基板とが接着される場合の接着剤４の量に比べ、溝１８の領域にさらに接着剤を確保することができる。よって、接着剤４の粘度を上げることなく接着剤４の体積及び厚みを増やすことができ、第２の半導体素子と実装基板４３との熱膨張係数の差による応力を低減することができる。 Accordingly, it is possible to secure more adhesive in the region of the groove 18 as compared with the amount of the adhesive 4 when the second semiconductor element having the flat adhesive surface and the mounting substrate having the flat surface are bonded. it can. Therefore, the volume and thickness of the adhesive 4 can be increased without increasing the viscosity of the adhesive 4, and the stress due to the difference in thermal expansion coefficient between the second semiconductor element and the mounting substrate 43 can be reduced.
　（実施の形態５）
　図６Ａは、本発明の実施の形態５に係る第１の半導体素子を備える半導体装置の構造断面図である。同図に記載された半導体装置５４は、ＭＥＭＳマイクロフォンの変換素子部の構造を表しており、変換素子１と、実装基板６３と、接着剤４とを備える。 (Embodiment 5)
FIG. 6A is a structural cross-sectional view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention. The semiconductor device 54 shown in the figure represents the structure of the conversion element portion of the MEMS microphone, and includes the conversion element 1, the mounting substrate 63, and the adhesive 4.
　ダイアフラム付きの変換素子１は、ダイアフラムを支えるＳｉ枠２を備える第１の半導体素子である。ガラスエポキシ樹脂製の実装基板６３は、凹部２０と、Ｃｕ層１１と、ソルダーレジスト９とを備える基板である。以下、実施の形態１と異なる点を中心に説明する。 The conversion element 1 with a diaphragm is a first semiconductor element including a Si frame 2 that supports the diaphragm. The mounting substrate 63 made of glass epoxy resin is a substrate including the recess 20, the Cu layer 11, and the solder resist 9. Hereinafter, a description will be given focusing on differences from the first embodiment.
　Ｓｉ枠２は、接着剤４を介して実装基板６３に固着されている。 The Si frame 2 is fixed to the mounting substrate 63 via the adhesive 4.
　図６Ｂは、本発明の実施の形態５に係る第１の半導体素子を備える半導体装置の平面透視図である。具体的には、ダイアフラムを支えるＳｉ枠２と、実装基板６３に設けられた凹部２０及びＳｉ枠２の幅８とを示す平面図である。また、図６Ａは、図６ＢのＸ－Ｘ'の断面図である。 FIG. 6B is a plan perspective view of a semiconductor device including the first semiconductor element according to Embodiment 5 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm, and the recess 20 provided on the mounting substrate 63 and the width 8 of the Si frame 2. 6A is a cross-sectional view taken along the line XX ′ of FIG. 6B.
　変換素子１の台座であるＳｉ枠２の幅は１００μｍであり、実装基板６３の実装面のソルダーレジスト９がスクリーン印刷技術によりパターニングされていることにより、幅７５μｍ、深さ２５μｍの第１の凹部である凹部２０Ａが設けられている。さらに、本実施の形態では、ソルダーレジスト９の下層であるＣｕ層１１がパターニングされて幅１５０μｍの第２の凹部である凹部２０Ｂが形成されている。凹部２０Ｂは、凹部２０Ａの下部であって、ソルダーレジスト９及びＣｕ層１１の厚み方向に連続的に形成されている。 The width of the Si frame 2 which is the base of the conversion element 1 is 100 μm, and the first concave portion having a width of 75 μm and a depth of 25 μm is formed by patterning the solder resist 9 on the mounting surface of the mounting substrate 63 by screen printing technology. A recess 20A is provided. Further, in the present embodiment, the Cu layer 11 which is the lower layer of the solder resist 9 is patterned to form the recess 20B which is the second recess having a width of 150 μm. The recess 20 </ b> B is a lower part of the recess 20 </ b> A and is continuously formed in the thickness direction of the solder resist 9 and the Cu layer 11.
　つまり、実装基板６３の最上面の少なくとも一部であるソルダーレジスト９は、変換素子１の接続面の直下に、変換素子１を実装基板６３に対して平行に支持する配置で形成されている。 That is, the solder resist 9 that is at least a part of the uppermost surface of the mounting substrate 63 is formed so as to support the conversion element 1 in parallel with the mounting substrate 63 immediately below the connection surface of the conversion element 1.
　上記構造とすることにより、Ｃｕ層１１に凹部を形成せずソルダーレジスト９のみに凹部を形成した場合と比較して、接着剤４の厚みをさらに増すことができ、約５０μｍとすることが出来る。これにより、さらに大きな熱応力吸収効果を得ることができ、より特性変動を小さくすることが出来る。 By adopting the above structure, the thickness of the adhesive 4 can be further increased as compared with the case where the concave portion is formed only in the solder resist 9 without forming the concave portion in the Cu layer 11, and can be about 50 μm. . As a result, a larger thermal stress absorption effect can be obtained, and the characteristic variation can be further reduced.
　なお、凹部２０の底部は、実装基板６３のコア材またはプリプレグであってもよい。また、凹部２０の側壁は、配線材料であるＣｕ層１１、ソルダーレジスト９またはその両方であってもよい。これらの材料は従来基板を構成している材料であり、基板作製時のレイアウトを変更すれば工程数及びコストを増やすことなく凹部２０を形成することができる。 Note that the bottom of the recess 20 may be a core material or a prepreg of the mounting substrate 63. Further, the sidewall of the recess 20 may be the Cu layer 11 that is a wiring material, the solder resist 9, or both. These materials are materials that constitute a conventional substrate, and the recess 20 can be formed without increasing the number of steps and the cost by changing the layout at the time of manufacturing the substrate.
　（実施の形態６）
　図７Ａは、本発明の実施の形態６に係る第１の半導体素子を備える半導体装置の構造断面図である。また、図７Ｂは、本発明の実施の形態６に係る第１の半導体素子を備える半導体装置の構造断面図である。また、図７Ｃは、本発明の実施の形態６に係る第１の半導体素子を備える半導体装置の平面透視図である。具体的には、ＭＥＭＳマイクロフォンのダイアフラムを支えるＳｉ枠２と、実装基板７３に設けられた凹部６０及びＳｉ枠２の幅８とを示す平面図である。また、図７Ａは、図７ＣのＸ１－Ｘ１'における断面図であり、図７Ｂは、図７ＣのＸ２－Ｘ２'における断面図である。 (Embodiment 6)
FIG. 7A is a structural cross-sectional view of a semiconductor device including a first semiconductor element according to Embodiment 6 of the present invention. FIG. 7B is a structural cross-sectional view of the semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention. FIG. 7C is a perspective plan view of a semiconductor device including the first semiconductor element according to Embodiment 6 of the present invention. Specifically, it is a plan view showing the Si frame 2 that supports the diaphragm of the MEMS microphone, and the recess 60 provided on the mounting substrate 73 and the width 8 of the Si frame 2. 7A is a cross-sectional view taken along X1-X1 ′ in FIG. 7C, and FIG. 7B is a cross-sectional view taken along X2-X2 ′ in FIG. 7C.
　本実施の形態においても、変換素子１の台座であるＳｉ枠２の幅は１００μｍであり、実装基板７３の実装面にはソルダーレジスト９がスクリーン印刷技術によりパターニングされていることにより、幅１５０μｍ、深さ２５μｍの第１の凹部である凹部６０Ａが設けられている。さらに、ソルダーレジスト９の下層であるのＣｕ層１１がパターニングされており、実施の形態５と同様に、第２の凹部である凹部６０Ｂが形成されている。凹部６０Ｂは、凹部６０Ａの下部であって、ソルダーレジスト９及びＣｕ層１１の厚み方向に連続的に形成されている。 Also in the present embodiment, the width of the Si frame 2 that is the base of the conversion element 1 is 100 μm, and the solder resist 9 is patterned on the mounting surface of the mounting substrate 73 by the screen printing technique. A recess 60A, which is a first recess having a depth of 25 μm, is provided. Further, the Cu layer 11 which is the lower layer of the solder resist 9 is patterned, and the concave portion 60B which is the second concave portion is formed as in the fifth embodiment. The recess 60B is a lower part of the recess 60A, and is continuously formed in the thickness direction of the solder resist 9 and the Cu layer 11.
　本実施の形態においては、図７Ｃに示すように変換素子１の搭載領域の内側と外側とを繋ぐ領域に、ソルダーレジスト９からなる突起部分が残されている構造になっている。この突起部分の構造が変換素子１を支える構造となっている。この構造により、凹部６０の幅を、変換素子１のＳｉ枠２の幅８を超える大きさに設定しても、図７Ｂの断面図に示すように変換素子１が凹部６０の中に落ち込むことがない。また凹部６０の幅をＳｉ枠２の幅８よりも広くすることによって実装基板７３の構造体であるソルダーレジスト９と変換素子１との距離をとることが可能となり、さらに大きな熱応力吸収効果を得ることが出来る。 In the present embodiment, as shown in FIG. 7C, a projecting portion made of the solder resist 9 is left in the region connecting the inner side and the outer side of the mounting region of the conversion element 1. The structure of the protruding portion is a structure that supports the conversion element 1. With this structure, even if the width of the recess 60 is set to exceed the width 8 of the Si frame 2 of the conversion element 1, the conversion element 1 falls into the recess 60 as shown in the sectional view of FIG. There is no. Further, by making the width of the recess 60 wider than the width 8 of the Si frame 2, it is possible to increase the distance between the solder resist 9, which is a structure of the mounting substrate 73, and the conversion element 1. Can be obtained.
　以上、実施の形態１～６について説明してきたが、本発明に係る半導体装置は、実施の形態１～６に限定されるものではない。実施の形態１～６における任意の構成要素を組み合わせて実現される別の実施の形態や、実施の形態１～６に対して本発明の主旨を逸脱しない範囲で当業者が思いつく各種変形を施して得られる変形例や、本発明に係る半導体装置を内蔵した各種機器も本発明に含まれる。 Although the first to sixth embodiments have been described above, the semiconductor device according to the present invention is not limited to the first to sixth embodiments. Other embodiments realized by combining arbitrary components in the first to sixth embodiments and various modifications conceivable by those skilled in the art without departing from the gist of the present invention to the first to sixth embodiments. Modifications obtained in this manner and various devices incorporating the semiconductor device according to the present invention are also included in the present invention.
　本発明は、特に、ダイアフラム付きの変換素子を有するＭＥＭＳマイクロフォンや、厚さ１００μm以下の薄い半導体素子を有する半導体装置に有用であり、脆弱な構造を持ち、応力に敏感な半導体素子を有する小型半導体装置に用いるのに最適である。 The present invention is particularly useful for a MEMS microphone having a conversion element with a diaphragm and a semiconductor device having a thin semiconductor element having a thickness of 100 μm or less, and a small semiconductor having a fragile structure and a stress-sensitive semiconductor element. Ideal for use in equipment.
　１、２１、１０１　　変換素子
　２　　Ｓi枠
　３、２３、３３、４３、６３、７３、１０２　　実装基板
　４、１０３　　接着剤
　５、１０４　　電極パッド
　６、１０５　　電極ランド
　７、１７、１０６　　ワイヤ
　８　　幅
　９　　ソルダーレジスト
　１０、２０、２０Ａ、２０Ｂ、３０、４０、６０、６０Ａ、６０Ｂ　　凹部
　１１、２４　　Ｃｕ層
　１２、１０７　　ブリード幅
　１４　　外壁側
　１５　　内壁側
　１６　　アンプ素子
　１８　　溝
　２５　　音孔
　５０、５１、５２、５３、５４、５５、１００　　半導体装置 1, 21, 101 Conversion element 2 Si frame 3, 23, 33, 43, 63, 73, 102 Mounting substrate 4, 103 Adhesive 5, 104 Electrode pad 6, 105 Electrode land 7, 17, 106 Wire 8 Width 9 Solder Resist 10, 20, 20A, 20B, 30, 40, 60, 60A, 60B Recess 11, 24 Cu layer 12, 107 Bleed width 14 Outer wall side 15 Inner wall side 16 Amplifier element 18 Groove 25 Sound hole 50, 51, 52, 53 , 54, 55, 100 Semiconductor device

Claims (21)

  1. 　実装基板と、
    　前記実装基板の表面に形成された金属層と、
    　前記金属層上に形成され、第１の凹部を有する絶縁層と、
    　前記第１の凹部に充填された接着剤と、
    　前記絶縁層上に、前記接着剤を介して固定された第１の半導体素子とを備え、
    　前記第１の凹部は、前記第１の半導体素子の接着面の直下に、かつ、前記第１の半導体素子の接着面の少なくとも一部に設けられ、
    　前記第１の半導体素子の接着面の周縁にも前記接着剤が充填されている
    　半導体装置。     A mounting board;
    A metal layer formed on the surface of the mounting substrate;
    An insulating layer formed on the metal layer and having a first recess;
    An adhesive filled in the first recess;
    A first semiconductor element fixed on the insulating layer via the adhesive;
    The first recess is provided immediately below the adhesion surface of the first semiconductor element and at least part of the adhesion surface of the first semiconductor element,
    A semiconductor device in which a peripheral edge of an adhesive surface of the first semiconductor element is also filled with the adhesive.
  2. 　前記実装基板の表面に前記金属層の一部が前記絶縁層から露出してなる少なくとも１つ以上の電極ランドと、
    　前記第１の半導体素子の上面外周に少なくとも１つ以上の電極パッドとを備え、
    　前記電極ランドと前記電極パッドとは、電気的に接続されている
    　請求項１に記載の半導体装置。     At least one electrode land in which a part of the metal layer is exposed from the insulating layer on the surface of the mounting substrate;
    Comprising at least one electrode pad on the outer periphery of the upper surface of the first semiconductor element;
    The semiconductor device according to claim 1, wherein the electrode land and the electrode pad are electrically connected.
  3. 　前記第１の半導体素子の接着面は平坦であり、
    　前記第１の凹部の領域内での前記第１の半導体素子と前記実装基板との間の接着剤厚みは、前記第１の凹部の領域外での前記第１の半導体素子と前記実装基板との間の接着剤厚みより大きい
    　請求項１または２に記載の半導体装置。     The bonding surface of the first semiconductor element is flat,
    The adhesive thickness between the first semiconductor element and the mounting substrate in the region of the first recess is such that the first semiconductor element and the mounting substrate outside the region of the first recess. The semiconductor device according to claim 1, wherein the thickness of the adhesive is greater than the thickness of the adhesive.
  4. 　前記第１の凹部の底面は、前記金属層で構成されている
    　請求項１～３のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 3, wherein a bottom surface of the first recess is formed of the metal layer.
  5. 　前記金属層は、前記第１の凹部と厚み方向に連続的に形成された第２の凹部を備え、
    　前記第２の凹部の領域内にも、前記接着剤が充填されている
    　請求項１～３のいずれか１項に記載の半導体装置。     The metal layer includes a second recess formed continuously in the thickness direction with the first recess,
    The semiconductor device according to any one of claims 1 to 3, wherein the adhesive is also filled in a region of the second recess.
  6. 　前記第１の凹部および前記第２の凹部の領域内での前記第１の半導体素子と前記実装基板との間の接着剤厚みは、前記第１の凹部および前記第２の凹部の領域外での前記第１の半導体素子と前記実装基板との間の接着剤厚みより大きい
    　請求項５に記載の半導体装置。     The thickness of the adhesive between the first semiconductor element and the mounting substrate in the region of the first recess and the second recess is outside the region of the first recess and the second recess. The semiconductor device according to claim 5, wherein the thickness is larger than an adhesive thickness between the first semiconductor element and the mounting substrate.
  7. 　前記第２の凹部の底面は、コア材またはプリプレグで構成され、
    　前記第２の凹部の側壁は、前記金属層、前記絶縁層、またはその両方で構成されている
    　請求項５または６に記載の半導体装置。     The bottom surface of the second recess is composed of a core material or a prepreg,
    The semiconductor device according to claim 5, wherein a side wall of the second recess is configured by the metal layer, the insulating layer, or both.
  8. 　前記実装基板の最上面の少なくとも一部は、前記第１の半導体素子の接続面の直下に、前記第１の半導体素子を前記実装基板に対して平行に支持する配置で形成されている
    　請求項１または２に記載の半導体装置。     The at least part of the uppermost surface of the mounting substrate is formed in an arrangement for supporting the first semiconductor element in parallel to the mounting substrate immediately below the connection surface of the first semiconductor element. 3. The semiconductor device according to 1 or 2.
  9. 　実装基板と、
    　前記実装基板の表面に形成され第３の凹部を有する金属層と、
    　前記第３の凹部に充填された接着剤と、
    　前記金属層上に、前記接着剤を介して固定された第１の半導体素子とを備え、
    　前記第３の凹部領域の外周は、前記第１の半導体素子の外周よりも小さい領域に形成されており、
    　前記第１の半導体素子の接着面の周縁にも前記接着剤が充填されている
    　半導体装置。     A mounting board;
    A metal layer formed on the surface of the mounting substrate and having a third recess;
    An adhesive filled in the third recess;
    A first semiconductor element fixed on the metal layer via the adhesive;
    The outer periphery of the third recessed region is formed in a region smaller than the outer periphery of the first semiconductor element,
    A semiconductor device in which a peripheral edge of an adhesive surface of the first semiconductor element is also filled with the adhesive.
  10. 　前記第３の凹部の領域内での前記第１の半導体素子と前記実装基板との間の接着剤厚みは、前記第３の凹部の領域外での前記第１の半導体素子と前記実装基板との間の接着剤厚みより大きい
    　請求項９に記載の半導体装置。     The thickness of the adhesive between the first semiconductor element and the mounting substrate in the region of the third recess is equal to the first semiconductor element and the mounting substrate outside the region of the third recess. The semiconductor device according to claim 9, wherein the thickness is larger than an adhesive thickness between.
  11. 　さらに、前記実装基板の表面に、前記接着剤を介して固定される電子部品を備える
    　請求項１～１０のいずれか１項に記載の半導体装置。     11. The semiconductor device according to claim 1, further comprising an electronic component fixed to the surface of the mounting substrate via the adhesive.
  12. 　前記電子部品の直下において、
    　前記絶縁層は複数の第４の凹部を有し、
    　前記複数の第４の凹部領域内および前記電子部品の接着面の周縁には、前記接着剤が充填されている
    　請求項１１に記載の半導体装置。     Immediately below the electronic component,
    The insulating layer has a plurality of fourth recesses;
    The semiconductor device according to claim 11, wherein the adhesive is filled in the plurality of fourth recessed regions and in the periphery of the bonding surface of the electronic component.
  13. 　前記第４の凹部の底面は、コア材またはプリプレグで構成され、
    　前記第４の凹部の側壁は、前記金属層で構成されている
    　請求項１２に記載の半導体装置。     The bottom surface of the fourth recess is composed of a core material or a prepreg,
    The semiconductor device according to claim 12, wherein a side wall of the fourth recess is configured by the metal layer.
  14. 　前記電子部品の上面に、少なくとも１つ以上の電極ランドを備え、
    　前記電極ランドと前記第１の半導体素子の電極パッドとは、電気的に接続されている
    　請求項１１または１２に記載の半導体装置。     At least one electrode land is provided on the upper surface of the electronic component,
    The semiconductor device according to claim 11, wherein the electrode land and the electrode pad of the first semiconductor element are electrically connected.
  15. 　前記電子部品は、第２の半導体素子である
    　請求項１１～１３のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 11 to 13, wherein the electronic component is a second semiconductor element.
  16. 　前記第２の半導体素子の接着面は平坦であり、
    　前記第４の凹部の領域内での前記第２の半導体素子と前記実装基板との間の接着剤厚みは、前記第４の凹部の領域外での前記第２の半導体素子と前記実装基板との間の接着剤厚みより大きい
    　請求項１５に記載の半導体装置。     The bonding surface of the second semiconductor element is flat,
    The adhesive thickness between the second semiconductor element and the mounting substrate in the region of the fourth recess is such that the second semiconductor element and the mounting substrate outside the region of the fourth recess. The semiconductor device according to claim 15, wherein the thickness is larger than an adhesive thickness between.
  17. 　前記第２の半導体素子の厚さは、１００μｍ以下である
    　請求項１５または１６に記載の半導体装置。     17. The semiconductor device according to claim 15, wherein a thickness of the second semiconductor element is 100 μm or less.
  18. 　前記電子部品は、増幅素子である
    　請求項１１～１４のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 11 to 14, wherein the electronic component is an amplifying element.
  19. 　前記実装基板は、ガラスエポキシ樹脂を含む
    　請求項１～１８のいずれか１項に記載の半導体装置。     The semiconductor device according to claim 1, wherein the mounting substrate includes a glass epoxy resin.
  20. 　前記第１の半導体素子は、ダイアフラム付きのマイクロフォン素子である
    　請求項１～１９のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 19, wherein the first semiconductor element is a microphone element with a diaphragm.
  21. 　前記絶縁層は、ソルダーレジストである
    　請求項１～２０のいずれか１項に記載の半導体装置。
     
          The semiconductor device according to any one of claims 1 to 20, wherein the insulating layer is a solder resist.

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Publication number Priority date Publication date Assignee Title
JP2003051511A (en) * 2001-08-03 2003-02-21 Hitachi Ltd Semiconductor device and method of manufacturing it

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003051511A (en) * 2001-08-03 2003-02-21 Hitachi Ltd Semiconductor device and method of manufacturing it

Cited By (1)

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Publication number Priority date Publication date Assignee Title
TWI726463B (en) * 2018-10-30 2021-05-01 精材科技股份有限公司 Chip package and power module

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