WO2012005185A1 - Method of producing light-emitting diodes, cutting method, and light-emitting diode - Google Patents

Method of producing light-emitting diodes, cutting method, and light-emitting diode Download PDF

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Publication number
WO2012005185A1
WO2012005185A1 PCT/JP2011/065176 JP2011065176W WO2012005185A1 WO 2012005185 A1 WO2012005185 A1 WO 2012005185A1 JP 2011065176 W JP2011065176 W JP 2011065176W WO 2012005185 A1 WO2012005185 A1 WO 2012005185A1
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metal
layer
emitting diode
light emitting
compound semiconductor
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PCT/JP2011/065176
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French (fr)
Japanese (ja)
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篤 松村
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昭和電工株式会社
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0093Wafer bonding; Removal of the growth substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/641Heat extraction or cooling elements characterized by the materials

Definitions

  • the present invention relates to a light emitting diode manufacturing method, a cutting method, and a light emitting diode, and more particularly to a light emitting diode manufacturing method, a cutting method, and a light emitting diode using a metal substrate as a substrate.
  • a high-power light-emitting diode an abbreviation: LED
  • a light - emitting layer made of aluminum gallium arsenide compositional formula Al X Ga 1-X As; 0 ⁇ X ⁇ 1
  • Compound semiconductor LEDs are known.
  • a high-intensity light-emitting diode (English abbreviation: LED) that emits red, orange, yellow, or yellow-green visible light
  • aluminum phosphide gallium, indium (composition formula (Al X Ga 1-X ) Y In 1-Y
  • LED high-intensity light-emitting diode
  • a compound semiconductor LED having a light emitting layer composed of P; 0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1) is known.
  • a substrate material such as gallium arsenide (GaAs) that is optically opaque to light emitted from the light emitting layer and that is not mechanically strong has been used as a substrate for these LEDs.
  • GaAs gallium arsenide
  • the degree of freedom of a substrate that can be applied as a support layer has increased, and the application of a metal substrate having great advantages such as cost, mechanical strength, and heat dissipation has been proposed.
  • a high-power light-emitting diode that needs to emit light at a high current has a larger amount of heat generation than a conventional one, and ensuring heat dissipation is a problem. Since the metal substrate can efficiently release the heat generated from the light emitting part (compound semiconductor layer) to the outside of the light emitting diode, bonding the metal substrate to the compound semiconductor layer increases the output of the light emitting diode and increases the lifetime. It is useful for conversion.
  • a light emitting diode using a metal substrate is disclosed in, for example, Patent Document 8 and Patent Document 9.
  • a wafer obtained by bonding a metal substrate to a compound semiconductor layer having a light emitting layer is formed into a chip by blade dicing, laser dicing, or the like.
  • blade dicing is performed by pressing a disk-shaped cutting blade rotating at high speed on a substrate.
  • Laser dicing is performed by irradiating a substrate with a laser, absorbing the laser energy, and melting and evaporating (ablating) the cut portion with heat energy generated.
  • a metal substrate in which dissimilar metals for example, Mo and Cu
  • they are bonded in a state having different extension widths corresponding to the thermal expansion coefficient of each metal at the time of bonding.
  • the metal substrate is composed of three metal layers of the first to third metal layers
  • the first metal layer is cut in the second metal layer when the first metal layer is cut by laser dicing (laser cutting).
  • laser dicing laser cutting
  • the interfacial stress is released on the surface on the metal layer side
  • the interfacial stress remains on the surface on the third metal layer side, so that the balance of stress is lost during cutting, and the metal substrate is distorted.
  • the dicing line is shifted from the intended position, the chip division property is deteriorated, and the light emitting diode chip becomes an abnormal shape.
  • debris generated at the time of cutting becomes a problem.
  • debris is a by-product generated by irradiation with a laser beam, and is obtained by adhering a melted material or scattered material of an irradiated material around the cut portion (material surface or cut surface). .
  • the reliability of the light emitting diode may be lowered, for example, a short circuit occurs due to contact with the side surface of the compound semiconductor layer constituting the light emitting part.
  • An object of the present invention is to provide a method for manufacturing a light emitting diode, a cutting method, and a light emitting diode.
  • the present invention provides the following means in order to solve the above problems.
  • (1) In a method for manufacturing a chip-shaped light emitting diode by irradiating a laser on a wafer, Etching a portion of a compound semiconductor layer on a planned cutting line of a wafer comprising a metal substrate composed of a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate; Removing the portion of the plurality of metal layers on the line to be cut of at least one layer opposite to the laser irradiation surface by etching, and removing the metal layer in plan view. And a step of cutting the metal substrate by irradiating a laser along the formed portion.
  • the “scheduled cutting line” indicates a position to be cut on the wafer, and a line formed by actually performing some processing on the substrate or the like is also subjected to actual processing. Virtual lines that are not included are also included.
  • the “part on the planned cutting line” means a part including the “scheduled cutting line” in plan view.
  • a plurality of metal layers are, for example, two adjacent metal layers formed in two stages, and those made of the same metal material are a single metal layer and a single metal layer. In this case, at least the adjacent metal layers are made of different kinds of metal materials.
  • a method for producing a light-emitting diode according to item (1) which is characterized in that (3)
  • the plurality of metal layers include a material having a thermal expansion coefficient larger than that of the compound semiconductor layer and a material having a thermal expansion coefficient smaller than that of the compound semiconductor layer.
  • the material having a thermal expansion coefficient larger than that of the compound semiconductor layer is any one of aluminum, copper, silver, gold, nickel, titanium, or an alloy thereof.
  • any one of (1) to (4) above wherein the material having a thermal expansion coefficient smaller than that of the compound semiconductor layer is any one of molybdenum, tungsten, chromium, or an alloy thereof.
  • a method for producing a light-emitting diode according to claim 1. (6) The method for manufacturing a light-emitting diode according to any one of (1) to (5), wherein the plurality of metal layers are three metal layers. (7) The method for manufacturing a light-emitting diode according to (6) above, wherein, of the three metal layers, two metal layers sandwiching one metal layer are made of the same metal material.
  • the metal substrate including a plurality of metal layers, a light emitting diode that includes a compound semiconductor layer including a light emitting layer formed on the metal substrate, the side surface of the metal substrate, the thickness of the metal substrate
  • the wet etching surface and the laser cutting surface arranged side by side in the vertical direction, and among the plurality of metal layers, at least one side surface of at least one metal layer on the compound semiconductor layer side and at least one layer on the opposite side of the compound semiconductor layer
  • the plurality of metal layers are three metal layers, the side surfaces of the two metal layers sandwiching one metal layer are formed by a wet etching surface, and the side surfaces of the one metal layer are formed by a laser cut surface.
  • the step of removing at least one portion of the plurality of metal layers on the cutting line on the opposite side of the laser irradiation surface by etching, and the metal in plan view And a step of cutting the metal substrate by irradiating a laser along the removed portion of the layer, so that the portion on the cutting line of the metal layer on the side opposite to the side irradiated with the laser by etching is previously
  • the degree to which the balance of stress is lost during laser cutting can be further reduced.
  • the degree of stress balance in the metal substrate during laser cutting is reduced.
  • the degree to which the metal substrate is distorted can be reduced, the degree to which the dicing line is displaced from the intended position can be reduced, and the chip can be divided. It can be maintained well, and the light emitting diode chip can be prevented from becoming an abnormal shape.
  • the degree to which the dicing line deviates from the intended position can be reduced.
  • the thickness of the metal substrate to be laser cut is reduced by removing the portion of the metal layer on the planned cutting line by etching, so that the amount of heat generated during laser cutting is reduced, and the metal substrate due to heat generation is reduced. Expansion can be suppressed, and as a result, fluctuations in the pitch width of dicing can be reduced, and it is possible to prevent the shape of the back surface side of the light-emitting diode chip from changing due to heat.
  • the metal substrate is composed of a plurality of metal layers, etching can be performed for each metal layer using the etching selectivity, and the etching depth of the metal substrate can be easily controlled. Furthermore, instead of laser cutting the entire metal layer, the amount of metal to be laser cut is reduced by removing a part by etching, so the amount of debris generated during laser cutting is reduced and the light emitting layer is reduced. It is possible to prevent a short circuit due to contact with the side surface of the compound semiconductor layer. Further, debris can be prevented from adhering to the front surface and the back surface of the metal substrate, or the amount of adhesion can be reduced, so that appearance defects can be reduced, and wire bonding defects and die bonding defects can be reduced.
  • the step of removing before the step of cutting the metal substrate, at least one layer of the laser irradiation surface side of the plurality of metal layers, a portion of the cutting line by etching Since the portion on the planned cutting line of the metal layer on the laser irradiation side is previously removed by etching, the amount of the metal substrate to be laser cut is reduced, and the amount of debris generated is reduced. be able to. Further, by this arrangement, when the laser irradiation surface is a compound semiconductor layer side containing the light-emitting layer, the metal layer of the surface side is etched, the position of the metal substrate laser cutting is started becomes far from the compound semiconductor layer. As a result, the debris does not reach the compound semiconductor layer and can be prevented from being short-circuited, and the yield can be improved.
  • the plurality of metal layers are made of a material having a thermal expansion coefficient larger than that of the compound semiconductor layer and a material having a thermal expansion coefficient smaller than that of the compound semiconductor layer.
  • the interface generated between the compound semiconductor layer and the metal substrate As a result, one of the interfacial stresses existing on the compound semiconductor layer side and the opposite side of the compound semiconductor layer of the metal substrate is first released during laser cutting. Distortion of the metal substrate can be reduced by as.
  • a configuration in which a plurality of metal layers are formed as a three-layer metal layer, so that the metal layer on the side opposite to the laser-irradiated surface is removed by etching and the dicing line shift or The fluctuation of the dicing pitch width can be reduced.
  • the amount of generated debris can be reduced only by etching and removing the metal layer on the laser irradiation surface side, and the debris can be prevented from adhering to the compound semiconductor layer and short-circuiting, thereby improving the yield. .
  • a plurality of metal layers are made into three metal layers, and two metal layers sandwiching one metal layer among the three metal layers are made of the same metal material.
  • two metal layers sandwiching one metal layer can be etched using the same etchant, which is economical and simple, and the two metal layers are simultaneously removed by etching. Can also reduce the process time.
  • the plurality of metal layers is a three-layer metal layer, and among the three metal layers, the two metal layers sandwiching one metal layer are made of copper, Since the metal layer of one layer is made of molybdenum, the mechanical strength of molybdenum is strong. Therefore, even if the metal layer made of copper is etched deeply, the stability of the metal substrate can be maintained.
  • the opposite side of the at least one layer of the laser irradiation surface of the plurality of metal layers, a portion on the line to cut, removing by etching is the removal of the metal layer
  • cutting the metal substrate by irradiating a laser along the portion, so that the portion on the cutting line of the metal layer on the side opposite to the laser irradiation side by etching is removed in advance to remove the metal layer.
  • the interfacial stress between the metal layer and the adjacent metal layer is released in advance to reduce the degree of stress balance in the metal substrate during laser cutting, and as a result, the degree to which the metal substrate is distorted can be reduced, resulting in the expected dicing line.
  • the degree of deviation from the position can be reduced, the splitting property of the chip can be maintained well, and the light emitting diode chip can be prevented from having an abnormal shape.
  • laser cutting is performed by aligning several interfacial stresses among the multiple interfacial stresses, the degree to which the dicing line deviates from the intended position is reduced. can do.
  • the thickness of the metal substrate to be laser cut is reduced by removing the portion of the metal layer on the planned cutting line by etching, so that the amount of heat generated during laser cutting is reduced, and the metal substrate due to heat generation is reduced. Expansion can be suppressed.
  • the metal substrate is composed of a plurality of metal layers, etching can be performed for each metal layer using the etching selectivity, and the etching depth of the metal substrate can be easily controlled.
  • a portion of the cutting line further comprising the step of removing by etching as configuration, since the previously removed cut portion on the line side of the metal layer to laser radiation by etching, can be the amount of the metal substrate to be laser cutting is reduced, to reduce the debris amount produced.
  • the metal layer on the surface side is etched, so the position of the metal substrate where laser cutting is started Becomes far from the compound semiconductor layer. As a result, the debris does not reach the compound semiconductor layer and can be prevented from being short-circuited, and the yield can be improved.
  • the light emitting diode according to the present invention is a light emitting diode comprising a metal substrate composed of a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate, wherein the side surface of the metal substrate is A wet etching surface and a laser cutting surface arranged side by side in the thickness direction of the metal substrate, and of the plurality of metal layers, the side surface of at least one metal layer on the compound semiconductor layer side and the opposite side of the compound semiconductor layer
  • the side surface of at least one of the metal layers consists of a wet-etched surface, and by-products generated by laser irradiation are deposited only on the side surfaces of the metal substrate, so that debris adheres to the front and back surfaces of the metal substrate. The appearance is improved compared to conventional light emitting diodes.
  • FIG. 1 is a diagram illustrating an example of a light emitting diode according to an embodiment of the present invention.
  • a light emitting diode (LED) 1 according to an embodiment of the present invention includes a metal substrate 5 composed of a plurality of metal layers 21A, 22 and 21B, and a light emitting layer 2 formed on the metal substrate 5.
  • a light-emitting diode 1 having a compound semiconductor layer 3 including a side surface 5aa of a metal substrate 5 includes a wet etching surface and a laser cutting surface arranged side by side in the thickness direction of the metal substrate 5, and a plurality of metals Among the layers, the side surface 21Ba of at least one metal layer from the side far from the compound semiconductor layer is a wet etching surface, and the side surface 22a of the metal layer and the side surface 21Aa of the metal layer near the compound semiconductor layer are laser cutting surfaces. The by-products generated by laser irradiation are attached only to the side surface 5aa of the metal substrate 5.
  • the side surface 21Aa of the metal layer far from the compound semiconductor layer may be a wet etching surface.
  • the compound semiconductor layer 3 is a stacked structure of compound semiconductors including the light emitting layer 2 and is an epitaxial stacked structure formed by stacking a plurality of epitaxially grown layers.
  • the AlGaInP layer is a layer made of a material represented by the general formula (Al X Ga 1-X ) Y In 1-YP (0 ⁇ X ⁇ 1, 0 ⁇ Y ⁇ 1). This composition is determined according to the emission wavelength of the light emitting diode.
  • the composition of the constituent material is determined in accordance with the emission wavelength of the light emitting diode.
  • the compound semiconductor layer 3 is a compound semiconductor of either n-type or p-type conductivity, and a pn junction is formed inside.
  • the polarity of the surface of the compound semiconductor layer 3 may be either p-type or n-type.
  • the compound semiconductor layer 3 includes, for example, a contact layer 12c, a cladding layer 10a, a light emitting layer 2, a cladding layer 10b, and a GaP layer 13.
  • the contact layer 12c is a layer for reducing the contact resistance of the ohmic electrode, and is made of, for example, Si-doped n-type GaAs, having a carrier concentration of 1 ⁇ 10 18 cm ⁇ 3 and a layer thickness of 0.1. 05 ⁇ m.
  • the clad layer 10a is made of, for example, n-type Al 0.5 In 0.5 P doped with Si, has a carrier concentration of 3 ⁇ 10 18 cm ⁇ 3 , and a layer thickness of 0.5 ⁇ m.
  • the light emitting layer 2 includes, for example, 10 pairs of undoped (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P / (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P. It consists of a laminated structure and the layer thickness is 0.2 ⁇ m.
  • the light emitting layer 2 has a structure such as a double hetero structure (Double Hetero: DH), a single quantum well structure (Single Quantum Well: SQW), or a multiple quantum well structure (Multi Quantum Well: MQW).
  • the double heterostructure is a structure in which carriers responsible for radiative recombination can be confined.
  • the quantum well structure has a well layer and two barrier layers sandwiching the well layer.
  • the SQW has one well layer and the MQW has two or more well layers.
  • a method for forming the compound semiconductor layer 3 an MOCVD method or the like can be used.
  • an MQW structure As the light emitting layer 2, it is preferable to use an MQW structure as the light emitting layer 2.
  • the clad layer 10b is made of, for example, p-type Al 0.5 In 0.5 P doped with Mg, has a carrier concentration of 8 ⁇ 10 17 cm ⁇ 3 , and a layer thickness of 0.5 ⁇ m.
  • the GaP layer 13 is, for example, a p-type GaP layer doped with Mg, and has a carrier concentration of 5 ⁇ 10 18 cm ⁇ 3 and a layer thickness of 2 ⁇ m.
  • the configuration of the compound semiconductor layer 3 is not limited to the structure described above.
  • a current diffusion layer for planarly diffusing the element driving current in the entire compound semiconductor layer 3 or the element driving current flowing therethrough.
  • a current blocking layer or a current confinement layer for limiting the region may be provided.
  • the first electrode 6 and the second electrode 8 are each ohmic electrode, their shape and arrangement, as long as it can uniformly diffuse current to the compound semiconductor layer 3 is not particularly limited.
  • a circular or rectangular electrode can be used when viewed from above, and the electrodes can be arranged as a single electrode or a plurality of electrodes can be arranged in a grid.
  • the material of the first electrode 6 when an n-type compound semiconductor is used as the contact layer 12c, for example, AuGe, AuGeNi, AuSi or the like can be used, and a p-type compound semiconductor is used as the contact layer 12c.
  • AuBe, AuZn, or the like when used, for example, AuBe, AuZn, or the like can be used. Further, Au or the like can be further laminated thereon to prevent oxidation and improve wire bonding.
  • the material of the second electrode 8 when an n-type compound semiconductor is used as the GaP layer 13, for example, AuGe, AuGeNi, AuSi or the like can be used, and a p-type compound semiconductor is used as the GaP layer 13.
  • AuBe, AuZn, or the like when used, for example, AuBe, AuZn, or the like can be used.
  • the reflective structure 4 is formed on the surface 3 b of the compound semiconductor layer 3 on the reflective structure 4 side so as to cover the second electrode 8.
  • the reflective structure 4 is formed by laminating a metal film 15 and a transparent conductive film 14.
  • the metal film 15 is made of a metal such as copper, silver, gold, or aluminum, or an alloy thereof. These materials have high light reflectivity, and the light reflectivity from the reflective structure 4 can be 90% or more.
  • the metal film 15 the light from the light emitting layer 2 is reflected by the metal film 15 in the front direction f, and the light extraction efficiency in the front direction f can be improved. Thereby, the brightness of the light emitting diode can be further increased.
  • the metal film 15 preferably has a laminated structure made of Ag, a Ni / Ti barrier layer, and an Au-based eutectic metal (connecting metal) from the transparent conductive film 14 side.
  • the connecting metal formed on the surface 15b of the metal film 15 opposite to the compound semiconductor layer 3 is a metal having a low electrical resistance and melting at a low temperature.
  • the metal substrate can be connected without applying thermal stress to the compound semiconductor layer 3.
  • an Au-based eutectic metal that is chemically stable and has a low melting point is used.
  • the Au-based eutectic metal include a eutectic composition (Au-based eutectic metal) of an alloy such as AuSn, AuGe, and AuSi.
  • connection metal a metal such as titanium, chromium, or tungsten to the connection metal.
  • metals such as titanium, chromium, and tungsten can function as barrier metals, and impurities contained in the metal substrate can be prevented from diffusing to the metal film 15 side and reacting.
  • the transparent conductive film 14 is composed of an ITO film, an IZO film, or the like.
  • the reflective structure 4 may be composed of only the metal film 15.
  • a so-called cold mirror using a difference in refractive index of a transparent material for example, a multilayer film of titanium oxide film, silicon oxide film, white alumina, AlN May be combined with the metal film 15.
  • the metal substrate 5 is composed of a plurality of metal layers. A bonding surface 5a of the metal substrate 5 is bonded to a surface 15b on the opposite side of the compound semiconductor layer 3 of the metal film 15 constituting the reflective structure 4.
  • the thickness of the metal substrate 5 is preferably 50 ⁇ m or more and 150 ⁇ m or less. When the thickness of the metal substrate 5 is thicker than 150 ⁇ m, the manufacturing cost of the light emitting diode increases, which is not preferable. In addition, when the thickness of the metal substrate 5 is less than 50 ⁇ m, cracking, hooking, warping, etc. easily occur during handling, which may reduce the manufacturing yield.
  • first metal layer 21 and the second metal layer 22 are alternately laminated.
  • the total number of first metal layers 21 and second metal layers 22 per metal substrate is preferably 3 to 9 layers, more preferably 3 to 5 layers.
  • the thermal expansion in the thickness direction becomes unbalanced, warpage of the metal substrate 5 is generated.
  • the layer thickness of the second metal layer 22 Each needs to be thin.
  • the number of first metal layers 21 and second metal layers 22 is an odd number in total.
  • the two metal layers sandwiching one metal layer are preferably made of the same metal material.
  • the portion corresponding to the line to be cut can be removed by wet etching using the same etchant between the two metal layers sandwiched.
  • the first metal layer 21 (21A, 21B) is made of a material having a coefficient of thermal expansion larger than that of the compound semiconductor layer 3 at least when a material having a smaller coefficient of thermal expansion than that of the compound semiconductor layer 3 is used as the second metal layer. It is preferable.
  • the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, thus suppressing warpage and cracking of the metal substrate when joining the compound semiconductor layer and the metal substrate. This is because the manufacturing yield of light emitting diodes can be improved.
  • the first metal layer 21 (21A, 21B) is made of at least a material having a smaller thermal expansion coefficient than the compound semiconductor layer 3. It is preferable to become.
  • the thickness of the first metal layer 21 is preferably 5 ⁇ m or more and 50 ⁇ m or less, and more preferably 5 ⁇ m or more and 20 ⁇ m or less.
  • the thickness of the first metal layer 21 and the thickness of the second metal layer 21 may be different.
  • the thicknesses of the respective layers may be different from each other.
  • the bonding surface 5a of the metal substrate 5 is preferably formed of Ni / Au film from the metal substrate 5 side.
  • the Ni film and Au film can be formed by plating. Thereby, a joining process can be performed simply.
  • As the auxiliary bonding film Au, AuSn, or the like can be used.
  • the method of bonding the metal substrate 5 to the compound semiconductor layer 3 is not limited to the method described above, and known techniques such as diffusion bonding, an adhesive, and a room temperature bonding method can also be applied.
  • the total thickness of the first metal layer 21 is preferably 5% to 50%, more preferably 10% to 30%, and more preferably 15% to 25% of the thickness of the metal substrate 5. More preferably, it is as follows. If the total thickness of the first metal layer 21 is less than 5% of the thickness of the metal substrate 5, the effect of the thermal expansion coefficient is higher the first metal layer 21 is reduced, the heat sink function is lowered. Conversely, when the thickness of the first metal layer 21 exceeds 50% of the thickness of the metal substrate 5, cracking of the metal substrate 5 due to heat when the metal substrate 5 is connected to the compound semiconductor layer 3 is suppressed. Can not.
  • the total thickness of copper is preferably 5% to 40% of the thickness of the metal substrate 5, and is preferably 10% to 30%. It is more preferable that it is 15% or more and 25% or less.
  • the thickness of the first metal layer 21 is preferably 5 ⁇ m or more and 30 ⁇ m or less, and more preferably 5 ⁇ m or more and 20 ⁇ m or less.
  • the second metal layer 22 is made of a material whose thermal expansion coefficient is smaller than that of the compound semiconductor layer 3 when a material having a larger thermal expansion coefficient than that of the compound semiconductor layer 3 is used as the first metal layer. Is preferred.
  • the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, thus suppressing warpage and cracking of the metal substrate when joining the compound semiconductor layer and the metal substrate. This is because the manufacturing yield of light emitting diodes can be improved. Therefore, when a material having a smaller thermal expansion coefficient than that of the compound semiconductor layer 3 is used as the first metal layer, the second metal layer 22 is made of a material whose thermal expansion coefficient is larger than that of the compound semiconductor layer 3. It is preferable.
  • thermo expansion coefficient about 5.3 ppm / K
  • tungsten as the second metal layer 22
  • Thermal expansion coefficient 4.3 ppm / K
  • alloys thereof are preferably used.
  • the light emitting diode 1 is a light emitting diode 1 in which a metal substrate 5 is bonded to a compound semiconductor layer 3 including a light emitting layer 2, and the metal substrate 5 includes a first metal layer 21 and a second metal layer 5.
  • the first metal layer 21 has a larger coefficient of thermal expansion than the material of the compound semiconductor layer 3, and the second metal layer 22 has a coefficient of thermal expansion of the compound semiconductor layer 3. If a structure made of a material smaller than the above material is employed, heat dissipation is excellent, cracking of the substrate during bonding can be suppressed, and high voltage can be applied to emit light with high luminance.
  • the material of the second metal layer 22 is a material having a thermal expansion coefficient that is within ⁇ 1.5 ppm / K of the thermal expansion coefficient of the compound semiconductor layer 3.
  • it is excellent in heat dissipation, can suppress cracking of the substrates during bonding, and can emit light with high brightness by applying a high voltage.
  • the substrate when the first metal layer 21 adopts a configuration made of aluminum, copper, silver, gold, nickel, or an alloy thereof, the substrate is excellent in heat dissipation and bonded. Can be suppressed, and high voltage can be applied to emit light with high brightness.
  • the second metal layer 22 is made of molybdenum, tungsten, chromium, or an alloy thereof as the light-emitting diode 1 according to an embodiment of the present invention, the heat dissipation is excellent, and cracking of the substrate during bonding is suppressed. It is possible to emit light with high luminance by applying a high voltage.
  • the first metal layer 21 is made of copper
  • the second metal layer 22 is made of molybdenum
  • the first metal layer 21 and the second metal layer 22 are layers. Adopting a configuration in which the number of layers is 3 or more and 9 or less, it is excellent in heat dissipation, can suppress the cracking of the substrate during bonding, and can emit light with high luminance by applying a high voltage it can.
  • a method of manufacturing a light emitting diode includes a step of manufacturing a wafer including a metal substrate including a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate; the cut portion on the line of said compound semiconductor layer, and removing by etching at least one layer of the opposite side of the laser irradiation surface of the plurality of metal layers, a portion on the line to cut, etched away And a step of irradiating a laser along the removed portion of the metal layer in plan view to cut the metal substrate.
  • the manufacturing process of a metal substrate is demonstrated.
  • a first metal layer having a thermal expansion coefficient larger than the material of the compound semiconductor layer 3 and a second metal layer having a thermal expansion coefficient smaller than the material of the compound semiconductor layer 3 are adopted and hot pressed. Form.
  • first metal plates 21 and one substantially flat plate-like second metal plate 22 are prepared.
  • 10 ⁇ m thick Cu is used as the first metal plate 21, and 75 ⁇ m thick Mo is used as the second metal plate 22.
  • the second metal plate 22 is inserted between the two first metal plates 21, and these are stacked.
  • substrate is arrange
  • the first metal layer 21 is Cu
  • the second metal layer 22 is Mo
  • the three layers of Cu (10 ⁇ m) / Mo (75 ⁇ m) / Cu (10 ⁇ m) are used.
  • a metal substrate 5 is formed.
  • the metal substrate 5 has a thermal expansion coefficient of 5.7 ppm / K and a thermal conductivity of 220 W / m ⁇ K.
  • the surface after cutting according to the size of the bonding surface of the compound semiconductor layer 3, the surface may be mirror-finished. Further, a bonding auxiliary film may be formed on the bonding surface 5a of the metal substrate 5 in order to stabilize electrical contact.
  • the bonding auxiliary film gold, platinum, nickel, or the like can be used. For example, after depositing 2 ⁇ m of nickel on the bonding surface 5a of the metal substrate 5 by plating, 1 ⁇ m of gold is deposited on the nickel. Furthermore, a eutectic metal such as die bonding AuSn may be formed instead of the auxiliary bonding film. Thereby, a joining process can be simplified.
  • a plurality of epitaxial layers are grown on the one surface 11 a of the semiconductor substrate 11 to form an epitaxial multilayer 17.
  • the semiconductor substrate 11 is a substrate for forming an epitaxial layered body 17 and is, for example, a Si-doped n-type GaAs single crystal substrate in which one surface 11a is inclined by 15 ° from the (100) plane.
  • a gallium arsenide (GaAs) single crystal substrate can be used as the substrate on which the epitaxial multilayer 17 is formed.
  • a metal organic chemical vapor deposition (MOCVD) method As a method for forming the compound semiconductor layer 3, a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy (MBE) method, or a liquid phase epitaxy (Liquid Phase EpiLex) method is used. Etc. can be used.
  • MOCVD metal organic chemical vapor deposition
  • MBE molecular beam epitaxy
  • Liquid Phase EpiLex Liquid Phase EpiLex
  • Each layer is epitaxially grown using Note that biscyclopentadiethynylmagnesium ((C 5 H 5 ) 2 Mg) is used as a Mg doping material. Further, disilane (Si 2 H 6 ) is used as a Si doping raw material. Further, phosphine (PH 3 ) or arsine (AsH 3 ) is used as a raw material for the group V constituent element.
  • the p-type GaP layer 13 is grown at 750 ° C., for example, and the other epitaxial growth layers are grown at 730 ° C., for example.
  • a buffer layer 12 a made of n-type GaAs doped with Si is formed on one surface 11 a of the semiconductor substrate 11.
  • the buffer layer 12a for example, n-type GaAs doped with Si is used, the carrier concentration is 2 ⁇ 10 18 cm ⁇ 3 , and the layer thickness is 0.2 ⁇ m.
  • an etching stop layer 12b made of Si-doped n-type (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P is formed on the buffer layer 12a.
  • Etch stop layer 12b at the time of the semiconductor substrate etched away until the cladding layer and the luminescent layer is a layer for preventing are etched, for example, the Si-doped (Al 0.5 Ga 0.5) 0 It consists .5 In 0.5 P, the thickness and 0.5 [mu] m.
  • a contact layer 12c made of Si-doped n-type GaAs is formed on the etching stop layer 12b.
  • a cladding layer 10a made of n-type Al 0.5 In 0.5 P doped with Si is formed on the contact layer 12c.
  • undoped (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P / (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P 10 is formed on the cladding layer 10a.
  • a light emitting layer 2 having a pair of laminated structures is formed.
  • a clad layer 10b made of p-type Al 0.5 In 0.5 P doped with Mg is formed on the light emitting layer 2.
  • a Mg-doped p-type GaP layer 13 is formed on the cladding layer 10b.
  • the surface 13a opposite to the semiconductor substrate 11 of the p-type GaP layer 13 is mirror-polished to a depth of 1 ⁇ m from the surface to make the surface roughness within 0.18 nm, for example.
  • a second electrode (ohmic electrode) 8 is formed on the surface 13 a opposite to the semiconductor substrate 11 of the p-type GaP layer 13.
  • the second electrode 8 is formed by laminating Au having a thickness of 0.2 ⁇ m on AuBe having a thickness of 0.4 ⁇ m.
  • the second electrode 8 has a circular shape of 20 ⁇ m ⁇ when viewed in plan, and is formed at intervals of 60 ⁇ m.
  • a transparent conductive film 14 made of an ITO film is formed so as to cover the surface 13 a opposite to the semiconductor substrate 11 of the p-type GaP layer 13 and the second electrode 8.
  • a heat treatment at 450 ° C. is performed to form an ohmic contact between the second electrode 8 and the transparent conductive film 14.
  • a metal film 15 was formed by forming a film made of nickel (Ni) / titanium (Ti) to a thickness of 0.5 ⁇ m and a film made of gold (Au) to a thickness of 1 ⁇ m. Thereby, the reflective structure 4 including the metal film 15 and the transparent conductive film 14 is formed.
  • etching stop layer 12b is selectively removed with a hydrochloric acid-based etchant. Thereby, the compound semiconductor layer 3 having the light emitting layer 2 is formed.
  • a conductive film for an electrode is formed on the surface 3a of the compound semiconductor layer 3 opposite to the reflective structure 4 by using a vacuum deposition method.
  • a metal layer structure made of AuGe / Ni / Au can be used as the electrode conductive film.
  • AuGe Ga mass ratio 12%) is formed to a thickness of 0.15 ⁇ m
  • Ni is then formed to a thickness of 0.05 ⁇ m
  • Au is further formed to a thickness of 1 ⁇ m.
  • the electrode conductive film is patterned into a circular shape in plan view, for example, and a light emitting diode wafer is produced as an n-type ohmic electrode (first electrode) 6. To do.
  • a mixed solution of ammonia water (NH 4 OH) / hydrogen peroxide (H 2 O 2 ) / pure water (H 2 0) in the contact layer 12c for example, a mixed solution of ammonia water (NH 4 OH) / hydrogen peroxide (H 2 O 2 ) / pure water (H 2 0) in the contact layer 12c.
  • NH 4 OH ammonia water
  • H 2 O 2 hydrogen peroxide
  • pure water H 2 0
  • each metal of the n-type ohmic electrode (first electrode) 6 is alloyed by performing a heat treatment at 420 ° C. for 3 minutes, for example. Thereby, the resistance of the n-type ohmic electrode (first electrode) 6 can be reduced.
  • a resist is applied on the compound semiconductor layer 3 of the wafer of light emitting diodes, and a resist pattern 31 including a line pattern to be cut having a width of about 60 ⁇ m is formed by photolithography, for example.
  • the removal width of the compound semiconductor layer determines the removal width of the subsequent metal layer. Accordingly, the removal width of the compound semiconductor layer is preferably wider than the cutting width by the laser in order to reduce the amount of debris generated during the subsequent laser cutting. For example, when laser cutting is performed by laser irradiation from the front surface, the width is preferably about 40 ⁇ m wider than the laser cutting width. Further, when laser cutting is performed by laser irradiation from the back surface, the cutting width by the laser is preferably about 20 ⁇ m wide.
  • the wafer is immersed in a hydrofluoric acid-based liquid, for example, a solution obtained by adding water to hydrogen difluoride 2-3%, ammonium fluoride 0.05-0.1%, A portion of the Ti layer 34 located below the removed portion is removed by etching (see reference numeral 34A).
  • a hydrofluoric acid-based liquid for example, a solution obtained by adding water to hydrogen difluoride 2-3%, ammonium fluoride 0.05-0.1%
  • a portion of the Ti layer 34 located below the removed portion is removed by etching (see reference numeral 34A).
  • an Au-based etching solution for example, a cyan-based etching solution, and portions of the Au layers 35 and 36 located below the removed portion are etched and removed (see reference numerals 35A and 36A).
  • the wafer is immersed in a ferric chloride solution whose etching rate for Ni and Cu is higher than that for Mo and Ni and Cu can be selectively etched, and the removed portions of the Ni layer 37 and the Cu layer 21A are removed.
  • the portion located below is removed by etching until the Mo layer 22 is exposed (see reference numerals 37A and 21AA).
  • a resist is applied on the Au / Ni layer formed on the metal substrate 5 on the back surface of the light emitting diode wafer, and includes a line pattern to be cut having a width of about 40 ⁇ m, for example, by photolithography.
  • a resist pattern 41 is formed.
  • the wafer is immersed in an Au-based etching solution, for example, a cyan-based etching solution, and the portion of the Au layer 42 located below the removed portion is etched and removed ( Part indicated by reference numeral 42A).
  • an Au-based etching solution for example, a cyan-based etching solution
  • the wafer is immersed in a ferric chloride solution in which the etching rate for Ni and Cu is higher than the etching rate for Mo and Ni and Cu can be selectively etched.
  • a portion of 21B located below the removed portion is removed by etching until the Mo layer is exposed (portions indicated by reference numerals 43A and 21BB).
  • the back surface Cu layer on the cutting scheduled line is removed by the above procedure.
  • the compound semiconductor layer removal step, the front surface Cu layer removal step, and the back surface Cu layer removal step are all preferably performed.
  • the compound semiconductor layer removal step and the back surface Cu layer removal step are performed. Even if it only performs, the bad influence of the heat generated at the time of laser cutting can be reduced.
  • laser irradiation is performed from the back surface, even if only the compound semiconductor layer removal step and the front Cu layer removal step are performed, the adverse effect of heat generated during laser cutting can be reduced.
  • the compound semiconductor layer removal step, the front surface metal layer removal step, and the back surface metal layer removal step may be performed in this order, or the compound after the back surface metal layer removal step is performed first.
  • You may perform a semiconductor layer removal process and a front surface metal layer removal process in order.
  • it can also carry out in order of a compound semiconductor layer removal process, a back surface metal layer removal process, and a front surface metal layer removal process.
  • the back surface metal layer removing step and the front surface metal layer removing step can be performed simultaneously.
  • laser irradiation is performed from the front surface, it is convenient and preferable to perform the back surface metal layer removing step, the compound semiconductor layer removing step, and the front surface metal layer removing step in this order.
  • the laser irradiation is performed from the back surface, it is convenient and preferable to perform the compound semiconductor layer removal step, the front surface metal layer removal step, and the back surface metal layer removal step in this order.
  • the metal layer is cut by irradiating a laser along the portion where the metal layer on the line to be cut on the back surface is removed to cut the metal substrate.
  • the laser cutting conditions may be those used in the LED element manufacturing process.
  • the metal substrate can be cut under conditions where the laser wavelength is 355 nm and the feed rate is 20 mm / sec.
  • Laser scanning of laser dicing may be performed in multiple times. At that time, dicing may be performed by changing the thickness of the laser beam.
  • the laser cut surface of the metal substrate is then preferably Au plated.
  • FIG. 11 is a schematic cross-sectional view showing an example of a light-emitting diode lamp according to an embodiment of the present invention.
  • a light emitting diode lamp 50 according to an embodiment of the present invention is mounted on a package substrate 55, two electrode terminals 53, 54 formed on the package substrate 55, and the electrode terminal 54.
  • the light-emitting diode 1 includes a transparent resin (sealing resin) 51 made of silicon or the like formed so as to cover the light-emitting diode 1.
  • the light-emitting diode 1 includes the compound semiconductor layer 3, the reflective structure 4, the metal substrate 5, the first electrode 6, and the second electrode 8, and is arranged so that the metal substrate 5 is connected to the electrode terminal 53. Has been.
  • the first electrode 6 and the electrode terminal 54 are wire bonded.
  • the voltage applied to the electrode terminals 53 and 54 is applied to the compound semiconductor layer 3 through the first electrode 6 and the second electrode 8, and the light emitting layer included in the compound semiconductor layer 3 emits light. The emitted light is extracted in the front direction f.
  • the package substrate 55 has a thermal resistance of 10 ° C./W or less. Thereby, even when 1 W or more of electric power is applied to the light emitting layer 2 to emit light, the light emitting layer 2 can function as a heat sink, and the heat dissipation of the light emitting diode 1 can be further enhanced.
  • the shape of the package substrate is not limited to this, and a package substrate having another shape may be used. Also in LED lamp products using package substrates of other shapes, sufficient heat dissipation can be ensured, so that a light-emitting diode lamp with high output and high brightness can be obtained.
  • the light emitting layer has a laminated structure of 10 pairs of (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P / (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P. 3 ⁇ m thick, GaP layer 2 ⁇ m, reflective structure Ag layer 0.7 ⁇ m, Ni / Ti barrier layer 0.5 ⁇ m, Au layer 1 ⁇ m, metal substrate Cu layer 10 ⁇ m / Mo layer 75 ⁇ m / Cu layer 10 ⁇ m A wafer having a Ni layer of 2 ⁇ m and an Au layer of 1 ⁇ m formed in order on both sides of the layer structure was produced.
  • the Cu layer on the front surface side of the metal substrate was removed by etching to form a groove having a width of 60 ⁇ m.
  • the Cu layer on the back surface side of the metal substrate was removed by etching to form a groove having a width of 40 ⁇ m.
  • the Mo layer of the metal substrate was laser-cut from the front surface of the wafer under the conditions of a laser wavelength of 355 nm and a feed rate of 20 mm / sec.
  • the chip-shaped light emitting diode thus fabricated was observed with a laser microscope.
  • the debris was attached to the side surface of the Cu layer on the front surface side and the side surface of the Cu layer on the back surface side of the metal substrate, but the Cu layer on the front surface side and the Cu layer on the back surface side were exposed. No debris adhering to the surface was observed.
  • the present invention is particularly applicable to a manufacturing method, a cutting method, and an industry using a light emitting diode using a metal substrate as a substrate.

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  • Manufacturing & Machinery (AREA)
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Abstract

Disclosed are a method for producing light-emitting diodes and a cutting method with which defects such as dicing line misalignments caused by heat generated during laser cutting of a metal substrate can be prevented, and with which adverse effects due to debris produced during cutting can be reduced. Also disclosed is a light-emitting diode. The method for producing light-emitting diodes comprises: a step for manufacturing a wafer provided with a metal substrate comprising a plurality of metal layers, and a compound semiconductor layer containing a light-emitting layer formed on said metal substrate; a step for removing part of the compound semiconductor layer on the intended cutting line by etching; a step for removing part of at least one of the plurality of metal layers on the opposite side to the laser irradiation surface on the intended cutting line by etching; and a step for cutting the metal substrate by irradiating a laser along the part removed from the metal layer in a plan view.

Description

発光ダイオードの製造方法、切断方法及び発光ダイオードLight emitting diode manufacturing method, cutting method, and light emitting diode
 本発明は、発光ダイオードの製造方法、切断方法及び発光ダイオードに関し、特に金属基板を基板に用いた発光ダイオードの製造方法、切断方法及び発光ダイオードに関するものである。
 本願は、2010年7月9日に、日本に出願された特願2010-156722号に基づき優先権を主張し、その内容をここに援用する。
The present invention relates to a light emitting diode manufacturing method, a cutting method, and a light emitting diode, and more particularly to a light emitting diode manufacturing method, a cutting method, and a light emitting diode using a metal substrate as a substrate.
This application claims priority on July 9, 2010 based on Japanese Patent Application No. 2010-156722 filed in Japan, the contents of which are incorporated herein by reference.
 従来、赤色、赤外の光を発する高出力発光ダイオード(英略称:LED)として、砒化アルミニウム・ガリウム(組成式AlGa1-XAs;0≦X≦1)からなる発光層を備えた化合物半導体LEDが知られている。一方、赤色、橙色、黄色或いは黄緑色の可視光を発する高輝度発光ダイオード(英略称:LED)として、燐化アルミニウム・ガリウム・インジウム(組成式(AlGa1-XIn1-YP;0≦X≦1,0<Y≦1)からなる発光層を備えた化合物半導体LEDが知られている。これらのLEDの基板として、一般に、発光層から出射される発光に対し光学的に不透明であり、また機械的にもそれ程強度のない砒化ガリウム(GaAs)等の基板材料が用いられてきた。 Conventionally, as a high-power light-emitting diode (an abbreviation: LED) that emits red and infrared light, a light - emitting layer made of aluminum gallium arsenide (compositional formula Al X Ga 1-X As; 0 ≦ X ≦ 1) is provided. Compound semiconductor LEDs are known. On the other hand, as a high-intensity light-emitting diode (English abbreviation: LED) that emits red, orange, yellow, or yellow-green visible light, aluminum phosphide, gallium, indium (composition formula (Al X Ga 1-X ) Y In 1-Y A compound semiconductor LED having a light emitting layer composed of P; 0 ≦ X ≦ 1, 0 <Y ≦ 1) is known. In general, a substrate material such as gallium arsenide (GaAs) that is optically opaque to light emitted from the light emitting layer and that is not mechanically strong has been used as a substrate for these LEDs.
 このため、最近では、より高輝度のLEDを得るために、また、更なる素子の機械的強度、放熱性の向上を目的として、発光光に対して不透明な基板材料を除去して、然る後、発光光を透過または反射し、尚且つ機械強度、放熱性に優れる材料からなる支持体層(基板)を改めて接合させて、接合型LEDを構成する技術が開示されている(例えば、特許文献1~7参照)。 Therefore, recently, in order to obtain a brighter LED, and to further improve the mechanical strength and heat dissipation of the element, the substrate material opaque to the emitted light is removed. Subsequently, a technique for constructing a junction-type LED by re-joining a support layer (substrate) made of a material that transmits or reflects emitted light and is excellent in mechanical strength and heat dissipation is disclosed (for example, a patent). Reference 1-7).
 基板接合技術の開発により、支持体層として適用できる基板の自由度が増え、コスト面、機械強度、放熱性など大きなメリットを有する金属基板の適用が提案されている。
 特に、高電流で光らせる必要がある高出力用の発光ダイオードは、従来のものに比べて発熱量が多く、放熱性の確保が課題となっている。金属基板は発光部(化合物半導体層)からの発熱を発光ダイオードの外部へ効率的に放出することができるので、化合物半導体層に金属基板を接合させることは、発光ダイオードの高出力化、長寿命化に有用である。
With the development of substrate bonding technology, the degree of freedom of a substrate that can be applied as a support layer has increased, and the application of a metal substrate having great advantages such as cost, mechanical strength, and heat dissipation has been proposed.
In particular, a high-power light-emitting diode that needs to emit light at a high current has a larger amount of heat generation than a conventional one, and ensuring heat dissipation is a problem. Since the metal substrate can efficiently release the heat generated from the light emitting part (compound semiconductor layer) to the outside of the light emitting diode, bonding the metal substrate to the compound semiconductor layer increases the output of the light emitting diode and increases the lifetime. It is useful for conversion.
 金属基板を用いた発光ダイオードは例えば、特許文献8及び特許文献9に開示されている。 A light emitting diode using a metal substrate is disclosed in, for example, Patent Document 8 and Patent Document 9.
 発光層を有する化合物半導体層に金属基板を接合したウェハはブレードダイシングやレーザーダイシング等によりチップ化される。
 ここで、ブレードダイシングは基板に高速回転する円盤状の切削ブレードを押し当てて切断するものである。
 また、レーザーダイシングは基板にレーザーを照射し、そのレーザーエネルギーを吸収させて発生した熱エネルギーによって切断部を溶融、蒸散(アブレーション)させて切断を行うものである。
A wafer obtained by bonding a metal substrate to a compound semiconductor layer having a light emitting layer is formed into a chip by blade dicing, laser dicing, or the like.
Here, blade dicing is performed by pressing a disk-shaped cutting blade rotating at high speed on a substrate.
Laser dicing is performed by irradiating a substrate with a laser, absorbing the laser energy, and melting and evaporating (ablating) the cut portion with heat energy generated.
特開2001-339100号公報JP 2001-339100 A 特開平6-302857号公報JP-A-6-302857 特開2002-246640号公報JP 2002-246640 A 特許第2588849号公報Japanese Patent No. 2588849 特開2001-57441号公報JP 2001-57441 A 特開2007-81010号公報JP 2007-81010 A 特開2006-32952号公報JP 2006-32952 A 特開2005-236303号公報JP 2005-236303 A 特開2006-13499号公報JP 2006-13499 A
 しかしながら、ブレードダイシングによる金属基板の切断では、ブレードに目詰まりが生ずるやすいため、切断が容易でないという問題がある。また、切断面に欠け(チッピング)やクラックが発生し、これが回路領域に影響を及ぼすという問題もある。さらにまた、切削ブレードの幅が大きくかつチッピングがあるために、切断予定ラインの幅を大きく取る必要があり、回路領域として有効に使用できる面積の割合が低下するという問題もある。 However, in the cutting of the metal substrate by blade dicing, there is a problem that the cutting is not easy because the blade is easily clogged. There is also a problem that chipping or cracking occurs on the cut surface, which affects the circuit area. Furthermore, since the width of the cutting blade is large and there is chipping, it is necessary to increase the width of the line to be cut, and there is a problem that the ratio of the area that can be effectively used as a circuit region is reduced.
 他方、レーザーダイシングによる金属基板の切断では、切断時に発生する熱の影響が問題になる。 On the other hand, when cutting metal substrates by laser dicing, the effect of heat generated during cutting becomes a problem.
 具体的には、異種の金属(例えば、MoとCu)を接合させた金属基板では、接合時にそれぞれの金属の熱膨張係数に対応して異なる延び幅を有する状態で接合されるため、常温においてはその界面に応力を有する状態となっている。金属基板が例えば、第1から第3の金属層の3層の金属層からなる場合、レーザーダイシング(レーザー切断)により第1の金属層が切断された際、第2の金属層において第1の金属層側の面は界面応力が開放されているが、第3の金属層側の面は界面応力が残ったままであるため、切断中に応力の釣り合いが崩れ、金属基板が歪んでしまう。この結果、ダイシングラインが所期の位置からずれたり、チップの分割性が悪くなったり、また、発光ダイオードチップが異常な形状になったりする問題が発生する。 Specifically, in a metal substrate in which dissimilar metals (for example, Mo and Cu) are bonded, they are bonded in a state having different extension widths corresponding to the thermal expansion coefficient of each metal at the time of bonding. Has a stress at its interface. For example, when the metal substrate is composed of three metal layers of the first to third metal layers, the first metal layer is cut in the second metal layer when the first metal layer is cut by laser dicing (laser cutting). Although the interfacial stress is released on the surface on the metal layer side, the interfacial stress remains on the surface on the third metal layer side, so that the balance of stress is lost during cutting, and the metal substrate is distorted. As a result, there arises a problem that the dicing line is shifted from the intended position, the chip division property is deteriorated, and the light emitting diode chip becomes an abnormal shape.
 また、発熱により金属基板が膨張してしまい、ダイシングのピッチ幅が不正確になってしまうという問題がある。すなわち、基板が膨張した状態で切断され、切断後に常温になり元のサイズに戻ると、ピッチ幅が切断時と異なってしまう。厚い金属基板ほど発熱量が大きくなるため、この問題は大きくなる。 Also, there is a problem that the metal substrate expands due to heat generation and the pitch width of dicing becomes inaccurate. That is, when the substrate is cut in an expanded state, and after returning to the normal size after cutting, the pitch width is different from that at the time of cutting. This problem is exacerbated because a thicker metal substrate generates more heat.
 さらには、熱の影響で発光ダイオードチップの裏面側の形状が変わると、ダイボンディングに影響を与えるという問題がある。 Furthermore, there is a problem in that die bonding is affected if the shape of the back side of the light emitting diode chip changes due to heat.
 また、レーザーダイシングによる金属基板の切断では、切断時に生成するデブリも問題になる。
 ここで、デブリとは、レーザービームの照射により生成される副次生成物であって、被照射材料の溶融物や飛散物等が切断部周辺(材料表面や切断面)に付着したものである。
Further, in the cutting of the metal substrate by laser dicing, debris generated at the time of cutting becomes a problem.
Here, debris is a by-product generated by irradiation with a laser beam, and is obtained by adhering a melted material or scattered material of an irradiated material around the cut portion (material surface or cut surface). .
 デブリは発光ダイオードの外観不良となるだけではなく、デブリがおもて面側に付いた場合はワイヤボンディング不良の原因になるし、また、裏面側に付いた場合にはダイボンディング不良の原因となる。 Debris not only causes the appearance of light-emitting diodes to deteriorate, but if debris attaches to the front side, it causes wire bonding failure, and if it attaches to the back side, it causes die bonding failure. Become.
 また、このようなデブリが発光部側に多く発生すると、発光部を構成する化合物半導体層の側面に接触してショートする等、発光ダイオードの信頼性の低下を招いたりする。 Further, when such debris is frequently generated on the light emitting part side, the reliability of the light emitting diode may be lowered, for example, a short circuit occurs due to contact with the side surface of the compound semiconductor layer constituting the light emitting part.
 かかる問題を回避するために、切断部の切りしろを多くとることが考えられるが、この場合、1枚のウェハから製造できる発光ダイオードの数が減少してしまう。 In order to avoid such a problem, it is conceivable to increase the margin of the cut portion, but in this case, the number of light emitting diodes that can be manufactured from one wafer is reduced.
 本発明は、上記事情を鑑みてなされたものであり、レーザーダイシングによる金属基板の切断時に発生する熱に起因したダイシングラインのずれ等の不都合を防止できると共に、切断時に生成するデブリによる悪影響を低減できる発光ダイオードの製造方法、切断方法及び発光ダイオードを提供することを目的とする。 The present invention has been made in view of the above circumstances, and can prevent inconveniences such as deviation of a dicing line due to heat generated during cutting of a metal substrate by laser dicing, and reduce adverse effects due to debris generated during cutting. An object of the present invention is to provide a method for manufacturing a light emitting diode, a cutting method, and a light emitting diode.
 本発明は、上記課題を解決するため、以下の手段を提供する。
 (1)ウェハにレーザーを照射してチップ状の発光ダイオードを製造する方法において、
 複数の金属層からなる金属基板と、該金属基板上に形成された発光層を含む化合物半導体層とを備えたウェハを作製する工程と、前記化合物半導体層の切断予定ライン上の部分を、エッチングによって除去する工程と、前記複数の金属層のうちレーザー照射面の反対側の少なくとも一層の、前記切断予定ライン上の部分を、エッチングによって除去する工程と、平面視して前記金属層の前記除去された部分に沿って、レーザーを照射して前記金属基板を切断する工程と、を有することを特徴とする発光ダイオードの製造方法。
 ここで、「切断予定ライン」とは、ウェハにおいて切断する予定の位置を示すものであって、基板等の上に実際に何らかの加工が施されて形成されたラインも、実際の加工は施されていない仮想的なラインも含むものとする。
 また、「切断予定ライン上の部分」とは、平面視して「切断予定ライン」を含む部分を意味する。
 また、「複数の金属層」とは、例えば2段階で形成された隣接する2つの金属層であって同じ金属材料からなるものは単一材料の金属層であって一層の金属層であるから、少なくとも隣接する金属層は異種の金属材料からなるものを意味する。
(2)前記金属基板を切断する工程の前に、前記複数の金属層のうち前記レーザー照射面側の少なくとも一層の、前記切断予定ライン上の部分をエッチングによって除去する工程をさらに備えたことを特徴とする前項(1)に記載の発光ダイオードの製造方法。
(3)前記複数の金属層は、前記化合物半導体層の熱膨張係数より大きい熱膨張係数を有する材料と前記化合物半導体層の熱膨張係数より小さい熱膨張係数を有する材料を含むことを特徴とする前項(1)又は(2)のいずれかに記載の発光ダイオードの製造方法。
(4)前記化合物半導体層の熱膨張係数より大きい熱膨張係数を有する材料が、アルミニウム、銅、銀、金、ニッケル、チタンまたはこれらの合金のいずれかからなることを特徴とする前項(1)から(3)のいずれか一項に記載の発光ダイオードの製造方法。
(5)前記化合物半導体層の熱膨張係数より小さい熱膨張係数を有する材料が、モリブデン、タングステン、クロムまたはこれらの合金のいずれかからなることを特徴とする前項(1)から(4)のいずれか一項に記載の発光ダイオードの製造方法。
(6)前記複数の金属層は三層の金属層であることを特徴とする前項(1)から(5)のいずれか一項に記載の発光ダイオードの製造方法。
(7)前記三層の金属層のうち、一層の金属層を挟む二層の金属層は同じ金属材料からなることを特徴とする前項(6)に記載の発光ダイオードの製造方法。
(8)前記一層の金属層はモリブデンからなり、前記二層の金属層は銅からなることを特徴とする前項(7)に記載の発光ダイオードの製造方法。
(9)前記三層の金属層のうち、一層の金属層を挟む二層の金属層をエッチングによって除去し、前記一層の金属層をレーザーによって切断することを特徴とする前項(6)から(8)のいずれか一項に記載の発光ダイオードの製造方法。
(10)前記発光層は、AlGaInP層またはAlGaAs層を含むことを特徴とする前項(1)から(9)のいずれか一項に記載の発光ダイオードの製造方法。
 (11)前記化合物半導体層と前記金属基板との間に反射構造体を備えることを特徴とする前項(1)から(10)のいずれか一項に記載の発光ダイオードの製造方法。
 (12)複数の金属層からなる金属基板と、該金属基板上に形成された化合物半導体層とを備えたウェハにレーザーを照射してチップ状の発光ダイオードに切断する方法において、
前記化合物半導体層の切断予定ライン上の部分を、エッチングによって除去する工程と、前記複数の金属層のうちレーザー照射面の反対側の少なくとも一層の、前記切断予定ライン上の部分を、エッチングによって除去する工程と、平面視して前記金属層の前記除去された部分に沿って、レーザーを照射して前記金属基板を切断する工程と、を有することを特徴とする切断方法。
(13)前記金属基板を切断する工程の前に、前記複数の金属層のうち前記レーザー照射面側の少なくとも一層の、前記切断予定ライン上の部分をエッチングによって除去する工程をさらに備えたことを特徴とする前項(12)に記載の切断方法。
(14)前項(1)から(13)のいずれか一項に記載の発光ダイオードの製造方法によって製造された発光ダイオード。
(15)複数の金属層からなる金属基板と、該金属基板上に形成された発光層を含む化合物半導体層とを備えた発光ダイオードであって、前記金属基板の側面は、該金属基板の厚さ方向に並んで配置する湿式エッチング面とレーザー切断面とからなり、複数の金属層のうち、前記化合物半導体層側の少なくとも一層の金属層の側面と前記化合物半導体層の反対側の少なくとも一層の金属層の側面とは湿式エッチング面からなり、レーザー照射による副次生成物は前記金属基板の側面にのみ付着していることを特徴とする発光ダイオード。
(16)前記複数の金属層は三層の金属層であり、一層の金属層を挟む二層の金属層の側面は湿式エッチング面からなり、前記一層の金属層の側面はレーザー切断面からなることを特徴とする前項(15)に記載の発光ダイオード。
(17)前記一層の金属層はモリブデンからなり、前記二層の金属層は銅からなることを特徴とする前項(16)に記載の発光ダイオード。
The present invention provides the following means in order to solve the above problems.
(1) In a method for manufacturing a chip-shaped light emitting diode by irradiating a laser on a wafer,
Etching a portion of a compound semiconductor layer on a planned cutting line of a wafer comprising a metal substrate composed of a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate; Removing the portion of the plurality of metal layers on the line to be cut of at least one layer opposite to the laser irradiation surface by etching, and removing the metal layer in plan view. And a step of cutting the metal substrate by irradiating a laser along the formed portion.
Here, the “scheduled cutting line” indicates a position to be cut on the wafer, and a line formed by actually performing some processing on the substrate or the like is also subjected to actual processing. Virtual lines that are not included are also included.
Further, the “part on the planned cutting line” means a part including the “scheduled cutting line” in plan view.
In addition, “a plurality of metal layers” are, for example, two adjacent metal layers formed in two stages, and those made of the same metal material are a single metal layer and a single metal layer. In this case, at least the adjacent metal layers are made of different kinds of metal materials.
(2) prior to the step of cutting the metal substrate, at least one layer of the laser irradiation surface side of the plurality of metal layers, that the portion on the cutting line further comprising the step of removing by etching A method for producing a light-emitting diode according to item (1), which is characterized in that
(3) The plurality of metal layers include a material having a thermal expansion coefficient larger than that of the compound semiconductor layer and a material having a thermal expansion coefficient smaller than that of the compound semiconductor layer. The method for producing a light-emitting diode according to any one of (1) and (2).
(4) The item (1) above, wherein the material having a thermal expansion coefficient larger than that of the compound semiconductor layer is any one of aluminum, copper, silver, gold, nickel, titanium, or an alloy thereof. The manufacturing method of the light emitting diode as described in any one of (3).
(5) Any one of (1) to (4) above, wherein the material having a thermal expansion coefficient smaller than that of the compound semiconductor layer is any one of molybdenum, tungsten, chromium, or an alloy thereof. A method for producing a light-emitting diode according to claim 1.
(6) The method for manufacturing a light-emitting diode according to any one of (1) to (5), wherein the plurality of metal layers are three metal layers.
(7) The method for manufacturing a light-emitting diode according to (6) above, wherein, of the three metal layers, two metal layers sandwiching one metal layer are made of the same metal material.
(8) The method for manufacturing a light-emitting diode according to (7), wherein the one metal layer is made of molybdenum, and the two metal layers are made of copper.
(9) From the preceding paragraph (6), wherein two metal layers sandwiching one metal layer are removed by etching out of the three metal layers, and the one metal layer is cut by a laser. The manufacturing method of the light emitting diode as described in any one of 8).
(10) The method for manufacturing a light-emitting diode according to any one of (1) to (9), wherein the light-emitting layer includes an AlGaInP layer or an AlGaAs layer.
(11) The method for producing a light-emitting diode according to any one of (1) to (10), wherein a reflective structure is provided between the compound semiconductor layer and the metal substrate.
(12) In a method of cutting a chip-shaped light emitting diode by irradiating a laser on a wafer comprising a metal substrate composed of a plurality of metal layers and a compound semiconductor layer formed on the metal substrate,
The cut portion on the line of said compound semiconductor layer, and removing by etching at least one layer of the opposite side of the laser irradiation surface of the plurality of metal layers, a portion on the line to cut, etched away And cutting the metal substrate by irradiating a laser along the removed portion of the metal layer in plan view.
(13) before the step of cutting the metal substrate, at least one layer of the laser irradiation surface side of the plurality of metal layers, that the portion on the cutting line further comprising the step of removing by etching The cutting method according to item (12), wherein the cutting method is characterized.
(14) A light-emitting diode manufactured by the method for manufacturing a light-emitting diode according to any one of (1) to (13).
(15) and the metal substrate including a plurality of metal layers, a light emitting diode that includes a compound semiconductor layer including a light emitting layer formed on the metal substrate, the side surface of the metal substrate, the thickness of the metal substrate The wet etching surface and the laser cutting surface arranged side by side in the vertical direction, and among the plurality of metal layers, at least one side surface of at least one metal layer on the compound semiconductor layer side and at least one layer on the opposite side of the compound semiconductor layer The light emitting diode according to claim 1, wherein the side surface of the metal layer is a wet-etched surface, and a by-product generated by laser irradiation adheres only to the side surface of the metal substrate.
(16) The plurality of metal layers are three metal layers, the side surfaces of the two metal layers sandwiching one metal layer are formed by a wet etching surface, and the side surfaces of the one metal layer are formed by a laser cut surface. The light-emitting diode according to item (15), wherein
(17) The light emitting diode according to (16), wherein the one metal layer is made of molybdenum, and the two metal layers are made of copper.
 本発明に係る発光ダイオードの製造方法によれば、複数の金属層のうちレーザー照射面の反対側の少なくとも一層の切断予定ライン上の部分を、エッチングによって除去する工程と、平面視してその金属層の除去された部分に沿って、レーザーを照射して金属基板を切断する工程と、を備えた構成なので、エッチングによってレーザー照射する側の反対側の金属層の切断予定ライン上の部分を予め除去してその金属層と隣接する金属層の界面応力を予め開放しており、レーザー切断中に金属基板内の応力の釣り合いが崩れる程度を低減できる。エッチングによる機械的強度の低下を考慮する必要はあるが、エッチングする金属層の数を多くすると、レーザー切断中に応力の釣り合いが崩れる程度をより低減できる。エッチングせずに残す金属層の機械的強度が大きいほど(例えば、モリブデン)、多くの数の金属層のエッチングが可能となる。
 そして、レーザー切断中に金属基板内の応力の釣り合いが崩れる程度が低減される結果、金属基板が歪む程度を低減でき、ダイシングラインが所期の位置からずれる程度を低減でき、チップの分割性を良好に維持することができ、発光ダイオードチップが異常な形状になることを防止できる。
 また、複数存在する界面の応力のうちいくつかの界面応力を開放した状態で位置合わせしてレーザー切断を行うことになるので、この点からもダイシングラインが所期の位置からずれる程度を低減できる。
 さらに、エッチングよってその金属層の切断予定ライン上の部分を除去することによって、レーザー切断する金属基板の厚みを薄くしているので、レーザー切断中に発生する熱量が低下し、発熱による金属基板の膨張を抑制でき、この結果、ダイシングのピッチ幅のぶれを低減できると共に、熱の影響で発光ダイオードチップの裏面側の形状が変わるのを防止できる。
 さらには、金属基板を複数の金属層からなる構成なので、エッチング選択性を利用して金属層ごとにエッチングすることが可能となり、金属基板のエッチング深さの制御が容易になる。
 さらにまた、全ての金属層をレーザー切断するのではなく、一部をエッチングによって除去することでレーザー切断する金属の量が少なくなるので、レーザー切断時に生成されるデブリ量が低減し、発光層を含む化合物半導体層の側面に接触してショートするのを防止できる。また、金属基板のおもて面及び裏面にデブリが付着するのを防止でき、もしくは、付着量を低減できるので、外観不良を低減できると共に、ワイヤボンディング不良やダイボンディング不良が低減できる。
According to the method for manufacturing a light-emitting diode according to the present invention, the step of removing at least one portion of the plurality of metal layers on the cutting line on the opposite side of the laser irradiation surface by etching, and the metal in plan view And a step of cutting the metal substrate by irradiating a laser along the removed portion of the layer, so that the portion on the cutting line of the metal layer on the side opposite to the side irradiated with the laser by etching is previously By removing the interface stress between the metal layer adjacent to the metal layer in advance, it is possible to reduce the degree to which the balance of stress in the metal substrate is lost during laser cutting. Although it is necessary to consider a decrease in mechanical strength due to etching, if the number of metal layers to be etched is increased, the degree to which the balance of stress is lost during laser cutting can be further reduced. The higher the mechanical strength of the metal layer left unetched (eg, molybdenum), the more metal layers can be etched.
As a result, the degree of stress balance in the metal substrate during laser cutting is reduced. As a result, the degree to which the metal substrate is distorted can be reduced, the degree to which the dicing line is displaced from the intended position can be reduced, and the chip can be divided. It can be maintained well, and the light emitting diode chip can be prevented from becoming an abnormal shape.
In addition, since laser cutting is performed by aligning several interfacial stresses among a plurality of interfacial stresses, the degree to which the dicing line deviates from the intended position can be reduced. .
Furthermore, the thickness of the metal substrate to be laser cut is reduced by removing the portion of the metal layer on the planned cutting line by etching, so that the amount of heat generated during laser cutting is reduced, and the metal substrate due to heat generation is reduced. Expansion can be suppressed, and as a result, fluctuations in the pitch width of dicing can be reduced, and it is possible to prevent the shape of the back surface side of the light-emitting diode chip from changing due to heat.
Furthermore, since the metal substrate is composed of a plurality of metal layers, etching can be performed for each metal layer using the etching selectivity, and the etching depth of the metal substrate can be easily controlled.
Furthermore, instead of laser cutting the entire metal layer, the amount of metal to be laser cut is reduced by removing a part by etching, so the amount of debris generated during laser cutting is reduced and the light emitting layer is reduced. It is possible to prevent a short circuit due to contact with the side surface of the compound semiconductor layer. Further, debris can be prevented from adhering to the front surface and the back surface of the metal substrate, or the amount of adhesion can be reduced, so that appearance defects can be reduced, and wire bonding defects and die bonding defects can be reduced.
 本発明に係る発光ダイオードの製造方法によれば、金属基板を切断する工程の前に、複数の金属層のうちレーザー照射面側の少なくとも一層の、切断予定ライン上の部分をエッチングによって除去する工程をさらに備えた構成として、エッチングによってレーザー照射する側の金属層の切断予定ライン上の部分を予め除去しているので、レーザー切断する金属基板の量が少なくなり、生成されるデブリ量を低減することができる。
 また、この構成とすることにより、レーザー照射面が発光層を含む化合物半導体層側である場合には、その面側の金属層がエッチングされているので、レーザー切断が開始される金属基板の位置が化合物半導体層から遠くなる。その結果、デブリが化合物半導体層にまで届かなくなり、ショートするのを防止でき、歩留まりを向上させることができる。
According to the manufacturing method of a light-emitting diode according to the present invention, the step of removing before the step of cutting the metal substrate, at least one layer of the laser irradiation surface side of the plurality of metal layers, a portion of the cutting line by etching Since the portion on the planned cutting line of the metal layer on the laser irradiation side is previously removed by etching, the amount of the metal substrate to be laser cut is reduced, and the amount of debris generated is reduced. be able to.
Further, by this arrangement, when the laser irradiation surface is a compound semiconductor layer side containing the light-emitting layer, the metal layer of the surface side is etched, the position of the metal substrate laser cutting is started Becomes far from the compound semiconductor layer. As a result, the debris does not reach the compound semiconductor layer and can be prevented from being short-circuited, and the yield can be improved.
 本発明に係る発光ダイオードの製造方法によれば、複数の金属層を、化合物半導体層の熱膨張係数より大きい熱膨張係数を有する材料と化合物半導体層の熱膨張係数より小さい熱膨張係数を有する材料を含む構成とすることにより、金属基板全体としての熱膨張係数(温度上昇に対して実際に現れる金属基板の長さ・体積が膨張する割合)は化合物半導体層の熱膨張係数に近いものとなるため、化合物半導体層と金属基板とを接合する際の、金属基板の熱膨張量と化合物半導体層の熱膨張量との差が低減するので、化合物半導体層と金属基板との間に生成する界面応力が低減し、その結果、金属基板の化合物半導体層側と化合物半導体層の反対側とにそれぞれ存在する界面応力のうち、レーザー切断時に、一方の界面応力が先に開放されることによる金属基板の歪みが低減される。 According to the light emitting diode manufacturing method of the present invention, the plurality of metal layers are made of a material having a thermal expansion coefficient larger than that of the compound semiconductor layer and a material having a thermal expansion coefficient smaller than that of the compound semiconductor layer. By adopting a configuration including the thermal expansion coefficient of the entire metal substrate (the ratio of the length and volume of the metal substrate that actually appears with respect to the temperature rise) is close to the thermal expansion coefficient of the compound semiconductor layer. Therefore, since the difference between the thermal expansion amount of the metal substrate and the thermal expansion amount of the compound semiconductor layer when bonding the compound semiconductor layer and the metal substrate is reduced, the interface generated between the compound semiconductor layer and the metal substrate As a result, one of the interfacial stresses existing on the compound semiconductor layer side and the opposite side of the compound semiconductor layer of the metal substrate is first released during laser cutting. Distortion of the metal substrate can be reduced by as.
 本発明に係る発光ダイオードの製造方法によれば、複数の金属層を三層の金属層とする構成により、レーザー照射面の反対側の金属層を一層エッチング除去するだけで、ダイシングラインのずれやダイシングピッチ幅のぶれを低減することができる。また、レーザー照射面側の金属層を一層エッチング除去するだけで、生成されるデブリ量を低減すると共に、デブリが化合物半導体層に付着してショートするのを防止でき、歩留まりを向上させることができる。 According to the method for manufacturing a light-emitting diode according to the present invention, a configuration in which a plurality of metal layers are formed as a three-layer metal layer, so that the metal layer on the side opposite to the laser-irradiated surface is removed by etching and the dicing line shift or The fluctuation of the dicing pitch width can be reduced. In addition, the amount of generated debris can be reduced only by etching and removing the metal layer on the laser irradiation surface side, and the debris can be prevented from adhering to the compound semiconductor layer and short-circuiting, thereby improving the yield. .
 本発明に係る発光ダイオードの製造方法によれば、複数の金属層を三層の金属層とし、三層の金属層のうち、一層の金属層を挟む二層の金属層は同じ金属材料からなる構成とすることにより、一層の金属層を挟む二層の金属層を同じエッチャントを用いてエッチングを行うことができるので経済的でかつ簡便であり、また、二層の金属層を同時にエッチング除去することもできるので工程時間を短縮できる。 According to the method for manufacturing a light emitting diode according to the present invention, a plurality of metal layers are made into three metal layers, and two metal layers sandwiching one metal layer among the three metal layers are made of the same metal material. By adopting a structure, two metal layers sandwiching one metal layer can be etched using the same etchant, which is economical and simple, and the two metal layers are simultaneously removed by etching. Can also reduce the process time.
 本発明に係る発光ダイオードの製造方法によれば、複数の金属層を三層の金属層とし、三層の金属層のうち、一層の金属層を挟む二層の金属層は銅からなり、前記一層の金属層はモリブデンからなる構成とすることにより、モリブデンの機械的強度が強いので、銅からなる金属層を深くエッチングしても、金属基板の安定性は維持できる。 According to the method for manufacturing a light-emitting diode according to the present invention, the plurality of metal layers is a three-layer metal layer, and among the three metal layers, the two metal layers sandwiching one metal layer are made of copper, Since the metal layer of one layer is made of molybdenum, the mechanical strength of molybdenum is strong. Therefore, even if the metal layer made of copper is etched deeply, the stability of the metal substrate can be maintained.
 本発明に係る切断方法によれば、複数の金属層のうちレーザー照射面の反対側の少なくとも一層の、前記切断予定ライン上の部分を、エッチングによって除去する工程と、金属層のその除去された部分に沿って、レーザーを照射して金属基板を切断する工程と、を有する構成なので、エッチングによってレーザー照射する側の反対側の金属層の切断予定ライン上の部分を予め除去してその金属層と隣接する金属層の界面応力を予め開放しており、レーザー切断中に金属基板内の応力の釣り合いが崩れる程度を低減でき、その結果、金属基板が歪む程度を低減でき、ダイシングラインが所期の位置からずれる程度を低減でき、チップの分割性を良好に維持することができ、発光ダイオードチップが異常な形状になることを防止できる。
 また、複数存在する界面の界面応力のうちいくつかの界面応力を開放した状態で位置合わせしてレーザー切断を行うことになるので、この点からもダイシングラインが所期の位置からずれる程度を低減することができる。
 さらに、エッチングよってその金属層の切断予定ライン上の部分を除去することによって、レーザー切断する金属基板の厚みを薄くしているので、レーザー切断中に発生する熱量が低下し、発熱による金属基板の膨張を抑制でき、この結果、ダイシングのピッチ幅のぶれを低減することができると共に、熱の影響で発光ダイオードチップの裏面側の形状が変わるのを防止することができる。
 さらにまた、金属基板を複数の金属層からなる構成なので、エッチング選択性を利用して金属層ごとにエッチングすることが可能となり、金属基板のエッチング深さの制御が容易になる。
According to the cutting method according to the present invention, the opposite side of the at least one layer of the laser irradiation surface of the plurality of metal layers, a portion on the line to cut, removing by etching, is the removal of the metal layer And cutting the metal substrate by irradiating a laser along the portion, so that the portion on the cutting line of the metal layer on the side opposite to the laser irradiation side by etching is removed in advance to remove the metal layer. The interfacial stress between the metal layer and the adjacent metal layer is released in advance to reduce the degree of stress balance in the metal substrate during laser cutting, and as a result, the degree to which the metal substrate is distorted can be reduced, resulting in the expected dicing line. The degree of deviation from the position can be reduced, the splitting property of the chip can be maintained well, and the light emitting diode chip can be prevented from having an abnormal shape.
In addition, since laser cutting is performed by aligning several interfacial stresses among the multiple interfacial stresses, the degree to which the dicing line deviates from the intended position is reduced. can do.
Furthermore, the thickness of the metal substrate to be laser cut is reduced by removing the portion of the metal layer on the planned cutting line by etching, so that the amount of heat generated during laser cutting is reduced, and the metal substrate due to heat generation is reduced. Expansion can be suppressed. As a result, fluctuations in the pitch width of dicing can be reduced, and changes in the shape of the back surface side of the light-emitting diode chip due to the influence of heat can be prevented.
Furthermore, since the metal substrate is composed of a plurality of metal layers, etching can be performed for each metal layer using the etching selectivity, and the etching depth of the metal substrate can be easily controlled.
 本発明に係る切断方法によれば、金属基板を切断する工程の前に、複数の金属層のうちレーザー照射面の少なくとも一層の、切断予定ライン上の部分をエッチングによって除去する工程をさらに備えた構成として、エッチングによってレーザー照射する側の金属層の切断予定ライン上の部分を予め除去しているので、レーザー切断する金属基板の量が少なくなり、生成されるデブリ量を低減することができる。
 また、この構成とすることにより、レーザー照射面が発光層を含む化合物半導体層側である場合には、その面側の金属層がエッチングされているので、レーザー切断が開始される金属基板の位置が化合物半導体層から遠くなる。その結果、デブリが化合物半導体層にまで届かなくなり、ショートするのを防止でき、歩留まりを向上させることができる。
According to the cutting method according to the present invention, before the step of cutting the metal substrate, at least one layer of the laser irradiation surface of the plurality of metal layers, a portion of the cutting line further comprising the step of removing by etching as configuration, since the previously removed cut portion on the line side of the metal layer to laser radiation by etching, can be the amount of the metal substrate to be laser cutting is reduced, to reduce the debris amount produced.
Also, with this configuration, when the laser irradiation surface is on the side of the compound semiconductor layer including the light emitting layer, the metal layer on the surface side is etched, so the position of the metal substrate where laser cutting is started Becomes far from the compound semiconductor layer. As a result, the debris does not reach the compound semiconductor layer and can be prevented from being short-circuited, and the yield can be improved.
 本発明に係る発光ダイオードによれば、複数の金属層からなる金属基板と、該金属基板上に形成された発光層を含む化合物半導体層とを備えた発光ダイオードであって、金属基板の側面は、該金属基板の厚さ方向に並んで配置する湿式エッチング面とレーザー切断面とからなり、複数の金属層のうち、化合物半導体層側の少なくとも一層の金属層の側面と化合物半導体層の反対側の少なくとも一層の金属層の側面とは湿式エッチング面からなり、レーザー照射による副次生成物は金属基板の側面にのみ堆積している構成なので、金属基板のおもて面および裏面にデブリが付着しておらず、従来の発光ダイオードに比べて外観が改善している。 The light emitting diode according to the present invention is a light emitting diode comprising a metal substrate composed of a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate, wherein the side surface of the metal substrate is A wet etching surface and a laser cutting surface arranged side by side in the thickness direction of the metal substrate, and of the plurality of metal layers, the side surface of at least one metal layer on the compound semiconductor layer side and the opposite side of the compound semiconductor layer The side surface of at least one of the metal layers consists of a wet-etched surface, and by-products generated by laser irradiation are deposited only on the side surfaces of the metal substrate, so that debris adheres to the front and back surfaces of the metal substrate. The appearance is improved compared to conventional light emitting diodes.
本発明の実施形態である発光ダイオードの一例を示す断面図である。It is sectional drawing which shows an example of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードに用いる金属基板の製造工程の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing process of the metal substrate used for the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードに用いる金属基板の製造工程の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing process of the metal substrate used for the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードの製造方法の一例を示す工程断面図である。It is process sectional drawing which shows an example of the manufacturing method of the light emitting diode which is embodiment of this invention. 本発明の実施形態である発光ダイオードを備えた発光ダイオードランプの一例を示す断面図である。It is sectional drawing which shows an example of the light emitting diode lamp provided with the light emitting diode which is embodiment of this invention.
 以下、本発明を適用した一実施形態である発光ダイオードの製造方法、切断方法及び発光ダイオードについて図面を用いて詳細に説明する。なお、以下の説明で用いる図面は、特徴をわかりやすくするために、便宜上特徴となる部分を拡大して示している場合があり、各構成要素の寸法比率などが実際と同じであるとは限らない。また、具体的に示した材料や寸法等の条件は例示に過ぎない。また、同一部材には同一符号を付し説明を省略又は簡略化する。また、同一部材には適宜、同一符号を付し又は符号を省略し、説明を省略又は簡略化する。 Hereinafter, a light emitting diode manufacturing method, a cutting method, and a light emitting diode according to an embodiment to which the present invention is applied will be described in detail with reference to the drawings. In addition, in the drawings used in the following description, in order to make the features easy to understand, there are cases where the portions that become the features are enlarged for the sake of convenience, and the dimensional ratios of the respective components are not always the same as the actual ones. Absent. Moreover, the specific conditions such as materials and dimensions are merely examples. Moreover, the same code | symbol is attached | subjected to the same member and description is abbreviate | omitted or simplified. Further, the same members are appropriately given the same reference numerals or omitted, and the description thereof is omitted or simplified.
(第1の実施形態)
[発光ダイオード]
 図1は、本発明の実施形態である発光ダイオードの一例を示す図である。
 図1に示すように、本発明の実施形態である発光ダイオード(LED)1は、複数の金属層21A、22、21Bからなる金属基板5と、金属基板5上に形成された発光層2を含む化合物半導体層3とを備えた発光ダイオード1であって、金属基板5の側面5aaは、金属基板5の厚さ方向に並んで配置する湿式エッチング面とレーザー切断面とからなり、複数の金属層のうち、化合物半導体層に遠い側から少なくとも一層の金属層の側面21Baは湿式エッチング面からなり、金属層の側面22a及び化合物半導体層に近い側の金属層の側面21Aaはレーザー切断面からなり、レーザー照射による副次生成物は金属基板5の側面5aaにのみ付着している。
 化合物半導体層に遠い側の金属層の側面21Aaは湿式エッチング面からなってもよい。
(First embodiment)
[Light emitting diode]
FIG. 1 is a diagram illustrating an example of a light emitting diode according to an embodiment of the present invention.
As shown in FIG. 1, a light emitting diode (LED) 1 according to an embodiment of the present invention includes a metal substrate 5 composed of a plurality of metal layers 21A, 22 and 21B, and a light emitting layer 2 formed on the metal substrate 5. A light-emitting diode 1 having a compound semiconductor layer 3 including a side surface 5aa of a metal substrate 5 includes a wet etching surface and a laser cutting surface arranged side by side in the thickness direction of the metal substrate 5, and a plurality of metals Among the layers, the side surface 21Ba of at least one metal layer from the side far from the compound semiconductor layer is a wet etching surface, and the side surface 22a of the metal layer and the side surface 21Aa of the metal layer near the compound semiconductor layer are laser cutting surfaces. The by-products generated by laser irradiation are attached only to the side surface 5aa of the metal substrate 5.
The side surface 21Aa of the metal layer far from the compound semiconductor layer may be a wet etching surface.
<化合物半導体層>
 化合物半導体層3は、発光層2を含む化合物半導体の積層構造体であって、複数のエピタキシャル成長させた層を積層してなるエピタキシャル積層構造体である。
 化合物半導体層3としては、例えば、発光効率が高く、基板接合技術が確立されているAlGaInP層またはAlGaAs層などを利用できる。AlGaInP層は、一般式(AlGa1-XIn1-YP(0≦X≦1,0<Y≦1)で表される材料からなる層である。この組成は、発光ダイオードの発光波長に応じて、決定される。赤および赤外発光の発光ダイオードを作製する際に用いられるAlGaAs層の場合も同様に、構成材料の組成は発光ダイオードの発光波長に応じて決定される。
 化合物半導体層3は、n型またはp型の何れか一の伝導型の化合物半導体であり、内部でpn接合が形成される。なお、化合物半導体層3の表面の極性はp型、n型のどちらでもよい。
<Compound semiconductor layer>
The compound semiconductor layer 3 is a stacked structure of compound semiconductors including the light emitting layer 2 and is an epitaxial stacked structure formed by stacking a plurality of epitaxially grown layers.
As the compound semiconductor layer 3, for example, an AlGaInP layer or an AlGaAs layer, which has high light emission efficiency and has established a substrate bonding technique, can be used. The AlGaInP layer is a layer made of a material represented by the general formula (Al X Ga 1-X ) Y In 1-YP (0 ≦ X ≦ 1, 0 <Y ≦ 1). This composition is determined according to the emission wavelength of the light emitting diode. Similarly, in the case of an AlGaAs layer used when manufacturing red and infrared light emitting diodes, the composition of the constituent material is determined in accordance with the emission wavelength of the light emitting diode.
The compound semiconductor layer 3 is a compound semiconductor of either n-type or p-type conductivity, and a pn junction is formed inside. The polarity of the surface of the compound semiconductor layer 3 may be either p-type or n-type.
 図1に示すように、化合物半導体層3は、例えば、コンタクト層12cと、クラッド層10aと、発光層2と、クラッド層10bと、GaP層13とからなる。 As shown in FIG. 1, the compound semiconductor layer 3 includes, for example, a contact layer 12c, a cladding layer 10a, a light emitting layer 2, a cladding layer 10b, and a GaP layer 13.
 コンタクト層12cは、オーミック(Ohmic)電極の接触抵抗を下げるための層であり、例えば、Siドープしたn型のGaAsからなり、キャリア濃度を1×1018cm-3とし、層厚を0.05μmとする。 The contact layer 12c is a layer for reducing the contact resistance of the ohmic electrode, and is made of, for example, Si-doped n-type GaAs, having a carrier concentration of 1 × 10 18 cm −3 and a layer thickness of 0.1. 05 μm.
 クラッド層10aは、例えば、Siをドープしたn型のAl0.5In0.5Pからなり、キャリア濃度を3×1018cm-3とし、層厚を0.5μmとする。 The clad layer 10a is made of, for example, n-type Al 0.5 In 0.5 P doped with Si, has a carrier concentration of 3 × 10 18 cm −3 , and a layer thickness of 0.5 μm.
 発光層2は、例えば、アンドープの(Al0.2Ga0.80.5In0.5P/(Al0.7Ga0.30.5In0.5Pの10対の積層構造からなり、層厚を0.2μmとする。
 発光層2は、ダブルへテロ構造(Double Hetero:DH)、単一量子井戸構造(Single Quantum Well:SQW)または多重量子井戸構造(Multi Quantum Well:MQW)などの構造を有する。ここで、ダブルへテロ構造は、放射再結合を担うキャリアを閉じ込められる構造である。また、量子井戸構造は、井戸層と、前記井戸層を挟む2つの障壁層を有する構造であって、SQWは井戸層が1つのものであり、MQWは井戸層が2以上のものである。化合物半導体層3の形成方法としては、MOCVD法などを用いることができる。
 発光層2から単色性に優れる発光を得るためには、発光層2としてMQW構造を用いることが好ましい。
The light emitting layer 2 includes, for example, 10 pairs of undoped (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P / (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P. It consists of a laminated structure and the layer thickness is 0.2 μm.
The light emitting layer 2 has a structure such as a double hetero structure (Double Hetero: DH), a single quantum well structure (Single Quantum Well: SQW), or a multiple quantum well structure (Multi Quantum Well: MQW). Here, the double heterostructure is a structure in which carriers responsible for radiative recombination can be confined. The quantum well structure has a well layer and two barrier layers sandwiching the well layer. The SQW has one well layer and the MQW has two or more well layers. As a method for forming the compound semiconductor layer 3, an MOCVD method or the like can be used.
In order to obtain light emission excellent in monochromaticity from the light emitting layer 2, it is preferable to use an MQW structure as the light emitting layer 2.
 クラッド層10bは、例えば、Mgをドープしたp型のAl0.5In0.5Pからなり、キャリア濃度を8×1017cm-3とし、層厚を0.5μmとする。 The clad layer 10b is made of, for example, p-type Al 0.5 In 0.5 P doped with Mg, has a carrier concentration of 8 × 10 17 cm −3 , and a layer thickness of 0.5 μm.
 GaP層13は、例えば、Mgをドープしたp型GaP層であり、キャリア濃度を5×1018cm-3とし、層厚を2μmとする。  The GaP layer 13 is, for example, a p-type GaP layer doped with Mg, and has a carrier concentration of 5 × 10 18 cm −3 and a layer thickness of 2 μm.
 化合物半導体層3の構成は、上記に記載した構造に限られるものではなく、例えば、素子駆動電流を化合物半導体層3の全般に平面的に拡散させる電流拡散層や、素子駆動電流の通流する領域を制限するための電流阻止層または電流狭窄層などを有していてもよい。 The configuration of the compound semiconductor layer 3 is not limited to the structure described above. For example, a current diffusion layer for planarly diffusing the element driving current in the entire compound semiconductor layer 3 or the element driving current flowing therethrough. A current blocking layer or a current confinement layer for limiting the region may be provided.
<第1の電極、第2の電極>
 第1の電極6および第2の電極8はそれぞれオーミック電極であり、それらの形状および配置は、化合物半導体層3に電流を均一に拡散させるものであればよく、特に限定されない。例えば、平面視したときに円状または矩形状の電極を用いることができ、一個の電極として配置することも、複数の電極を格子状に配置することもできる。
<First electrode, second electrode>
The first electrode 6 and the second electrode 8 are each ohmic electrode, their shape and arrangement, as long as it can uniformly diffuse current to the compound semiconductor layer 3 is not particularly limited. For example, a circular or rectangular electrode can be used when viewed from above, and the electrodes can be arranged as a single electrode or a plurality of electrodes can be arranged in a grid.
 第1の電極6の材料としては、コンタクト層12cとしてn型の化合物半導体を用いた場合には、例えば、AuGe、AuGeNi、AuSiなどを用いることができ、コンタクト層12cとしてp型の化合物半導体を用いた場合には、例えば、AuBe、AuZnなどを用いることができる。
 また、更にその上にAuなどを積層して、酸化を防止させるとともに、ワイヤボンディングを向上させることができる。
As the material of the first electrode 6, when an n-type compound semiconductor is used as the contact layer 12c, for example, AuGe, AuGeNi, AuSi or the like can be used, and a p-type compound semiconductor is used as the contact layer 12c. When used, for example, AuBe, AuZn, or the like can be used.
Further, Au or the like can be further laminated thereon to prevent oxidation and improve wire bonding.
 第2の電極8の材料としては、GaP層13としてn型の化合物半導体を用いた場合には、例えば、AuGe、AuGeNi、AuSiなどを用いることができ、GaP層13としてp型の化合物半導体を用いた場合には、例えば、AuBe、AuZnなどを用いることができる。 As the material of the second electrode 8, when an n-type compound semiconductor is used as the GaP layer 13, for example, AuGe, AuGeNi, AuSi or the like can be used, and a p-type compound semiconductor is used as the GaP layer 13. When used, for example, AuBe, AuZn, or the like can be used.
<反射構造体>
 図1に示すように、化合物半導体層3の反射構造体4側の面3bには、第2の電極8を覆うように反射構造体4が形成されている。反射構造体4は、金属膜15と透明導電膜14とが積層されてなる。
<Reflection structure>
As shown in FIG. 1, the reflective structure 4 is formed on the surface 3 b of the compound semiconductor layer 3 on the reflective structure 4 side so as to cover the second electrode 8. The reflective structure 4 is formed by laminating a metal film 15 and a transparent conductive film 14.
 金属膜15は、銅、銀、金、アルミニウムなどの金属およびそれらの合金などにより構成されている。これらの材料は光反射率が高く、反射構造体4からの光反射率を90%以上とすることができる。金属膜15を形成することにより、発光層2からの光を金属膜15で正面方向fへ反射させて、正面方向fでの光取り出し効率を向上させることができる。これにより、発光ダイオードをより高輝度化できる。 The metal film 15 is made of a metal such as copper, silver, gold, or aluminum, or an alloy thereof. These materials have high light reflectivity, and the light reflectivity from the reflective structure 4 can be 90% or more. By forming the metal film 15, the light from the light emitting layer 2 is reflected by the metal film 15 in the front direction f, and the light extraction efficiency in the front direction f can be improved. Thereby, the brightness of the light emitting diode can be further increased.
 金属膜15は、透明導電膜14側からAg、Ni/Tiバリヤ層、Au系の共晶金属(接続用金属)からなる積層構造が好ましい。
 金属膜15の化合物半導体層3と反対側の面15bに形成された前記接続用金属は、電気抵抗が低く、低温で溶融する金属である。前記接続用金属を用いることにより、化合物半導体層3に熱ストレスを与えることなく、金属基板を接続できる。
 接続用金属としては、化学的に安定で、融点の低いAu系の共晶金属などを用いられる。前記Au系の共晶金属としては、例えば、AuSn、AuGe、AuSiなどの合金の共晶組成(Au系の共晶金属)を挙げることができる。
 また、接続用金属には、チタン、クロム、タングステンなどの金属を添加することが好ましい。これにより、チタン、クロム、タングステンなどの金属がバリヤ金属として機能して、金属基板に含まれる不純物などが金属膜15側に拡散して、反応することを抑制できる。
The metal film 15 preferably has a laminated structure made of Ag, a Ni / Ti barrier layer, and an Au-based eutectic metal (connecting metal) from the transparent conductive film 14 side.
The connecting metal formed on the surface 15b of the metal film 15 opposite to the compound semiconductor layer 3 is a metal having a low electrical resistance and melting at a low temperature. By using the connecting metal, the metal substrate can be connected without applying thermal stress to the compound semiconductor layer 3.
As the connection metal, an Au-based eutectic metal that is chemically stable and has a low melting point is used. Examples of the Au-based eutectic metal include a eutectic composition (Au-based eutectic metal) of an alloy such as AuSn, AuGe, and AuSi.
Further, it is preferable to add a metal such as titanium, chromium, or tungsten to the connection metal. Thereby, metals such as titanium, chromium, and tungsten can function as barrier metals, and impurities contained in the metal substrate can be prevented from diffusing to the metal film 15 side and reacting.
 透明導電膜14は、ITO膜、IZO膜などにより構成されている。なお、反射構造体4は、金属膜15だけで構成してもよい。
 また、透明導電膜14の代わりに、または、透明導電膜14とともに、透明な材料の屈折率差を利用したいわゆるコールドミラー、例えば、酸化チタン膜、酸化ケイ素膜の多層膜や白色のアルミナ、AlNを用いて、金属膜15に組み合わせてもよい。
The transparent conductive film 14 is composed of an ITO film, an IZO film, or the like. Note that the reflective structure 4 may be composed of only the metal film 15.
Further, instead of or together with the transparent conductive film 14, a so-called cold mirror using a difference in refractive index of a transparent material, for example, a multilayer film of titanium oxide film, silicon oxide film, white alumina, AlN May be combined with the metal film 15.
<金属基板>
 金属基板5は複数の金属層からなる。
 反射構造体4を構成する金属膜15の化合物半導体層3と反対側の面15bに、金属基板5の接合面5aが接合されている。
 金属基板5の厚さは、50μm以上150μm以下とすることが好ましい。
 金属基板5の厚さが150μmより厚い場合には、発光ダイオードの製造コストが上昇して好ましくない。また、金属基板5の厚さが50μmより薄い場合には、ハンドリング時に割れ、かけ、反りなどが容易に生じて、製造歩留まりを低下させるおそれが発生する。
<Metal substrate>
The metal substrate 5 is composed of a plurality of metal layers.
A bonding surface 5a of the metal substrate 5 is bonded to a surface 15b on the opposite side of the compound semiconductor layer 3 of the metal film 15 constituting the reflective structure 4.
The thickness of the metal substrate 5 is preferably 50 μm or more and 150 μm or less.
When the thickness of the metal substrate 5 is thicker than 150 μm, the manufacturing cost of the light emitting diode increases, which is not preferable. In addition, when the thickness of the metal substrate 5 is less than 50 μm, cracking, hooking, warping, etc. easily occur during handling, which may reduce the manufacturing yield.
 複数の金属層の構成としては、2種類の金属層すなわち、第1の金属層21と第2の金属層22とが交互に積層されてなるものが好ましい。
 金属基板1枚あたりの第1の金属層21と第2の金属層22の層数は、合わせて3~9層とすることが好ましく、3~5層とすることがより好ましい。
 第1の金属層21と第2の金属層22の層数を合わせて2層とした場合には、厚さ方向での熱膨張が不均衡となり、金属基板5の反りが発生する。逆に、第1の金属層21と第2の金属層22の層数を合わせて9層より多くした場合には、第1の金属層21と第2の金属層22の層の厚さをそれぞれ薄くする必要が生じる。第1の金属層21または第2の金属層22からなる単層基板を層の厚さを薄くして作製することは困難であり、各層の厚さを不均一にして、発光ダイオードの特性をばらつかせるおそれが発生する。さらに、前記単層基板の製造が困難であることから、発光ダイオードの製造コストを悪化させるおそれも生じる。
As the configuration of the plurality of metal layers, two types of metal layers, that is, a structure in which the first metal layer 21 and the second metal layer 22 are alternately laminated are preferable.
The total number of first metal layers 21 and second metal layers 22 per metal substrate is preferably 3 to 9 layers, more preferably 3 to 5 layers.
When the first metal layer 21 and the two layers fit the number of layers of the second metal layer 22, the thermal expansion in the thickness direction becomes unbalanced, warpage of the metal substrate 5 is generated. Conversely, when more than the first metal layer 21 and 9 layers combined number of layers of the second metal layer 22 includes a first metal layer 21 the layer thickness of the second metal layer 22 Each needs to be thin. It is difficult to manufacture a single-layer substrate made of the first metal layer 21 or the second metal layer 22 with a thin layer thickness. The thickness of each layer is not uniform, and the characteristics of the light-emitting diode are improved. There is a risk of dispersal. Furthermore, since it is difficult to manufacture the single-layer substrate, the manufacturing cost of the light emitting diode may be deteriorated.
 第1の金属層21と第2の金属層22の層数は、合わせて奇数とすることがより好ましい。
 特に3層として、一層の金属層を挟む二層の金属層は同じ金属材料からなるものとすることが好ましい。この場合、挟む二層の金属層を同じエッチャントを用いて湿式エッチングで切断予定ラインに相当する部分を除去することができる。
More preferably, the number of first metal layers 21 and second metal layers 22 is an odd number in total.
In particular, as the three layers, the two metal layers sandwiching one metal layer are preferably made of the same metal material. In this case, the portion corresponding to the line to be cut can be removed by wet etching using the same etchant between the two metal layers sandwiched.
<第1の金属層>
 第1の金属層21(21A、21B)は、第2の金属層として化合物半導体層3より熱膨張係数が小さい材料を用いる場合には、少なくとも化合物半導体層3より熱膨張係数が大きい材料からなることが好ましい。この構成とすることにより、金属基板全体としての熱膨張係数が化合物半導体層の熱膨張係数に近いものとなるため、化合物半導体層と金属基板とを接合する際の金属基板の反りや割れを抑制することができ、発光ダイオードの製造歩留まりを向上させることができるからである。従って、第2の金属層として化合物半導体層3より熱膨張係数が大きい材料を用いる場合には、第1の金属層21(21A、21B)は少なくとも化合物半導体層3より熱膨張係数が小さい材料からなることが好ましい。
<First metal layer>
The first metal layer 21 (21A, 21B) is made of a material having a coefficient of thermal expansion larger than that of the compound semiconductor layer 3 at least when a material having a smaller coefficient of thermal expansion than that of the compound semiconductor layer 3 is used as the second metal layer. It is preferable. By adopting this configuration, the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, thus suppressing warpage and cracking of the metal substrate when joining the compound semiconductor layer and the metal substrate. This is because the manufacturing yield of light emitting diodes can be improved. Therefore, when a material having a larger thermal expansion coefficient than the compound semiconductor layer 3 is used as the second metal layer, the first metal layer 21 (21A, 21B) is made of at least a material having a smaller thermal expansion coefficient than the compound semiconductor layer 3. It is preferable to become.
 第1の金属層21としては、例えば、銀(熱膨張係数=18.9ppm/K)、銅(熱膨張係数=16.5ppm/K)、金(熱膨張係数=14.2ppm/K)、アルミニウム(熱膨張係数=23.1ppm/K)、ニッケル(熱膨張係数=13.4ppm/K)およびこれらの合金などを用いることが好ましい。
 第1の金属層21の厚みは、5μm以上50μm以下とすることが好ましく、5μm以上20μm以下とすることがより好ましい。
 なお、第1の金属層21の厚みと第2の金属層21の厚みとは異なっていてもよい。さらに、金属基板5が複数の第1の金属層21と第2の金属層22により形成される場合に、各層の厚みはそれぞれ異なっていてもよい。
Examples of the first metal layer 21 include silver (thermal expansion coefficient = 18.9 ppm / K), copper (thermal expansion coefficient = 16.5 ppm / K), gold (thermal expansion coefficient = 14.2 ppm / K), Aluminum (thermal expansion coefficient = 23.1 ppm / K), nickel (thermal expansion coefficient = 13.4 ppm / K), alloys thereof, and the like are preferably used.
The thickness of the first metal layer 21 is preferably 5 μm or more and 50 μm or less, and more preferably 5 μm or more and 20 μm or less.
The thickness of the first metal layer 21 and the thickness of the second metal layer 21 may be different. Furthermore, when the metal substrate 5 is formed of the plurality of first metal layers 21 and the second metal layers 22, the thicknesses of the respective layers may be different from each other.
 金属基板5の接合面5a及び反対側の面5bに、電気的接触を安定化させる接合補助膜、または、ダイボンド用の共晶金属を形成するのが好ましい。
 反射構造体の金属膜15の接続用金属としてAu系の共晶金属を用いる場合には、金属基板5の接合面5aに、金属基板5側からNi/Au膜を形成するのが好ましい。このNi膜及びAu膜はメッキにより形成することができる。
 これにより、接合工程を簡便に行うことができる。前記接合補助膜としては、Au、AuSnなどを用いることができる。
It is preferable to form a bonding auxiliary film for stabilizing electrical contact or a eutectic metal for die bonding on the bonding surface 5 a and the opposite surface 5 b of the metal substrate 5.
In the case of using the Au-based eutectic metal as the connection for the metal of the metal film 15 of the reflector structure, the bonding surface 5a of the metal substrate 5 is preferably formed of Ni / Au film from the metal substrate 5 side. The Ni film and Au film can be formed by plating.
Thereby, a joining process can be performed simply. As the auxiliary bonding film, Au, AuSn, or the like can be used.
 なお、化合物半導体層3に金属基板5を接合する方法は、上記に記載した方法に限られるものではなく、例えば、拡散接合、接着剤、常温接合方法など公知の技術を適用することもできる。 Note that the method of bonding the metal substrate 5 to the compound semiconductor layer 3 is not limited to the method described above, and known techniques such as diffusion bonding, an adhesive, and a room temperature bonding method can also be applied.
 第1の金属層21の合計の厚さは、金属基板5の厚さの5%以上50%以下であることが好ましく、10%以上30%以下であることがより好ましく、15%以上25%以下であることが更に好ましい。第1の金属層21の合計の厚さが金属基板5の厚さの5%未満の場合は、熱膨張係数が高い第1の金属層21の効果が小さくなり、ヒートシンク機能が低下する。逆に、第1の金属層21の厚さが金属基板5の厚さの50%を超える場合は、金属基板5を化合物半導体層3と接続させたときの熱による金属基板5の割れを抑制できない。つまり、第1の金属層21と化合物半導体層3との間の大きな熱膨張係数の差により、熱による金属基板5の割れを発生させて、接合不良発生を招く場合が生じる。
 特に、第1の金属層21として銅を用いた場合には、銅の合計の厚さが、金属基板5の厚さの5%以上40%以下であることが好ましく、10%以上30%以下であることがより好ましく、15%以上25%以下であることが更に好ましい。
 第1の金属層21の厚みは、5μm以上30μm以下とすることが好ましく、5μm以上20μm以下とすることがより好ましい。
The total thickness of the first metal layer 21 is preferably 5% to 50%, more preferably 10% to 30%, and more preferably 15% to 25% of the thickness of the metal substrate 5. More preferably, it is as follows. If the total thickness of the first metal layer 21 is less than 5% of the thickness of the metal substrate 5, the effect of the thermal expansion coefficient is higher the first metal layer 21 is reduced, the heat sink function is lowered. Conversely, when the thickness of the first metal layer 21 exceeds 50% of the thickness of the metal substrate 5, cracking of the metal substrate 5 due to heat when the metal substrate 5 is connected to the compound semiconductor layer 3 is suppressed. Can not. That is, a large difference in thermal expansion coefficient between the first metal layer 21 and the compound semiconductor layer 3 may cause cracks in the metal substrate 5 due to heat, resulting in a bonding failure.
In particular, when copper is used for the first metal layer 21, the total thickness of copper is preferably 5% to 40% of the thickness of the metal substrate 5, and is preferably 10% to 30%. It is more preferable that it is 15% or more and 25% or less.
The thickness of the first metal layer 21 is preferably 5 μm or more and 30 μm or less, and more preferably 5 μm or more and 20 μm or less.
<第2の金属層>
 第2の金属層22は、第1の金属層として化合物半導体層3より熱膨張係数が大きい材料を用いる場合には、その熱膨張係数が化合物半導体層3の熱膨張係数より小さい材料からなることが好ましい。この構成とすることにより、金属基板全体としての熱膨張係数が化合物半導体層の熱膨張係数に近いものとなるため、化合物半導体層と金属基板とを接合する際の金属基板の反りや割れを抑制することができ、発光ダイオードの製造歩留まりを向上させることができるからである。従って、第1の金属層として化合物半導体層3より熱膨張係数が小さい材料を用いる場合には、第2の金属層22はその熱膨張係数が化合物半導体層3の熱膨張係数より大きい材料からなることが好ましい。
<Second metal layer>
The second metal layer 22 is made of a material whose thermal expansion coefficient is smaller than that of the compound semiconductor layer 3 when a material having a larger thermal expansion coefficient than that of the compound semiconductor layer 3 is used as the first metal layer. Is preferred. By adopting this configuration, the thermal expansion coefficient of the entire metal substrate is close to the thermal expansion coefficient of the compound semiconductor layer, thus suppressing warpage and cracking of the metal substrate when joining the compound semiconductor layer and the metal substrate. This is because the manufacturing yield of light emitting diodes can be improved. Therefore, when a material having a smaller thermal expansion coefficient than that of the compound semiconductor layer 3 is used as the first metal layer, the second metal layer 22 is made of a material whose thermal expansion coefficient is larger than that of the compound semiconductor layer 3. It is preferable.
 例えば、化合物半導体層3としてAlGaInP層(熱膨張係数=約5.3ppm/K)を用いた場合には、第2の金属層22としてモリブデン(熱膨張係数=5.1ppm/K)、タングステン(熱膨張係数=4.3ppm/K)、クロム(熱膨張係数=4.9ppm/K)およびこれらの合金などを用いることが好ましい。 For example, when an AlGaInP layer (thermal expansion coefficient = about 5.3 ppm / K) is used as the compound semiconductor layer 3, molybdenum (thermal expansion coefficient = 5.1 ppm / K), tungsten (as the second metal layer 22). Thermal expansion coefficient = 4.3 ppm / K), chromium (thermal expansion coefficient = 4.9 ppm / K), and alloys thereof are preferably used.
 本発明の一実施形態の発光ダイオード1として、発光層2を含む化合物半導体層3に金属基板5が接合された発光ダイオード1であって、金属基板5は、第1の金属層21と第2の金属層22とが交互に積層されてなり、第1の金属層21は、熱膨張係数が化合物半導体層3の材料より大きく、第2の金属層22は、熱膨張係数が化合物半導体層3の材料より小さい材料からなる構成を採用すると、放熱性に優れ、接合の際の基板の割れを抑制でき、高電圧を印加して、高輝度で発光させることができる。 The light emitting diode 1 according to an embodiment of the present invention is a light emitting diode 1 in which a metal substrate 5 is bonded to a compound semiconductor layer 3 including a light emitting layer 2, and the metal substrate 5 includes a first metal layer 21 and a second metal layer 5. The first metal layer 21 has a larger coefficient of thermal expansion than the material of the compound semiconductor layer 3, and the second metal layer 22 has a coefficient of thermal expansion of the compound semiconductor layer 3. If a structure made of a material smaller than the above material is employed, heat dissipation is excellent, cracking of the substrate during bonding can be suppressed, and high voltage can be applied to emit light with high luminance.
 本発明の一実施形態の発光ダイオード1として、第2の金属層22の材料が、化合物半導体層3の熱膨張係数の±1.5ppm/K以内となる熱膨張係数を有する材料である構成を採用すると、放熱性に優れ、接合の際の基板の割れを抑制でき、高電圧を印加して、高輝度で発光させることができる。 As the light-emitting diode 1 according to an embodiment of the present invention, a configuration in which the material of the second metal layer 22 is a material having a thermal expansion coefficient that is within ± 1.5 ppm / K of the thermal expansion coefficient of the compound semiconductor layer 3. When employed, it is excellent in heat dissipation, can suppress cracking of the substrates during bonding, and can emit light with high brightness by applying a high voltage.
 本発明の一実施形態の発光ダイオード1として、第1の金属層21が、アルミニウム、銅、銀、金、ニッケルまたはこれらの合金からなる構成を採用すると、放熱性に優れ、接合の際の基板の割れを抑制でき、高電圧を印加して、高輝度で発光させることができる。 As the light-emitting diode 1 according to an embodiment of the present invention, when the first metal layer 21 adopts a configuration made of aluminum, copper, silver, gold, nickel, or an alloy thereof, the substrate is excellent in heat dissipation and bonded. Can be suppressed, and high voltage can be applied to emit light with high brightness.
 本発明の一実施形態の発光ダイオード1として、第2の金属層22が、モリブデン、タングステン、クロムまたはこれらの合金からなる構成を採用すると、放熱性に優れ、接合の際の基板の割れを抑制でき、高電圧を印加して、高輝度で発光させることができる。 When the second metal layer 22 is made of molybdenum, tungsten, chromium, or an alloy thereof as the light-emitting diode 1 according to an embodiment of the present invention, the heat dissipation is excellent, and cracking of the substrate during bonding is suppressed. It is possible to emit light with high luminance by applying a high voltage.
 本発明の一実施形態の発光ダイオード1として、第1の金属層21が銅からなり、第2の金属層22がモリブデンからなり、第1の金属層21と第2の金属層22との層の数が合わせて3層以上9層以下とされている構成を採用すると、放熱性に優れ、接合の際の基板の割れを抑制でき、高電圧を印加して、高輝度で発光させることができる。 As the light emitting diode 1 according to the embodiment of the present invention, the first metal layer 21 is made of copper, the second metal layer 22 is made of molybdenum, and the first metal layer 21 and the second metal layer 22 are layers. Adopting a configuration in which the number of layers is 3 or more and 9 or less, it is excellent in heat dissipation, can suppress the cracking of the substrate during bonding, and can emit light with high luminance by applying a high voltage it can.
[発光ダイオードの製造方法]
 次に、本発明の実施形態である発光ダイオードの製造方法について説明する。
 本発明の実施形態である発光ダイオードの製造方法は、複数の金属層からなる金属基板と、該金属基板上に形成された発光層を含む化合物半導体層とを備えたウェハを作製する工程と、前記化合物半導体層の切断予定ライン上の部分を、エッチングによって除去する工程と、前記複数の金属層のうちレーザー照射面の反対側の少なくとも一層の、前記切断予定ライン上の部分を、エッチングによって除去する工程と、平面視して前記金属層の前記除去された部分に沿って、レーザーを照射して前記金属基板を切断する工程と、を有する。
 まず、金属基板の製造工程について説明する。
[Method for manufacturing light-emitting diode]
Next, the manufacturing method of the light emitting diode which is embodiment of this invention is demonstrated.
A method of manufacturing a light emitting diode according to an embodiment of the present invention includes a step of manufacturing a wafer including a metal substrate including a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate; the cut portion on the line of said compound semiconductor layer, and removing by etching at least one layer of the opposite side of the laser irradiation surface of the plurality of metal layers, a portion on the line to cut, etched away And a step of irradiating a laser along the removed portion of the metal layer in plan view to cut the metal substrate.
First, the manufacturing process of a metal substrate is demonstrated.
<金属基板の製造工程>
 金属基板5として、熱膨張係数が化合物半導体層3の材料より大きい第1の金属層と、熱膨張係数が化合物半導体層3の材料より小さい第2の金属層とを採用して、ホットプレスして形成する。
<Manufacturing process of metal substrate>
As the metal substrate 5, a first metal layer having a thermal expansion coefficient larger than the material of the compound semiconductor layer 3 and a second metal layer having a thermal expansion coefficient smaller than the material of the compound semiconductor layer 3 are adopted and hot pressed. Form.
 まず、2枚の略平板状の第1の金属板21と、1枚の略平板状の第2の金属板22を用意する。例えば、第1の金属板21としては厚さ10μmのCu、第2の金属板22としては厚さ75μmのMoを用いる。
 次に、図2Aに示すように、前記2枚の第1の金属板21の間に前記第2の金属板22を挿入してこれらを重ねて配置する。
First, two substantially flat plate-like first metal plates 21 and one substantially flat plate-like second metal plate 22 are prepared. For example, 10 μm thick Cu is used as the first metal plate 21, and 75 μm thick Mo is used as the second metal plate 22.
Next, as shown in FIG. 2A, the second metal plate 22 is inserted between the two first metal plates 21, and these are stacked.
 次に、所定の加圧装置に前記基板を配置して、高温下で、第1の金属板21と第2の金属板22に矢印の方向に荷重をかける。これにより、図2Bに示すように、第1の金属層21がCuであり、第2の金属層22がMoであり、Cu(10μm)/Mo(75μm)/Cu(10μm)の3層からなる金属基板5を形成する。
 金属基板5は、例えば、熱膨張係数が5.7ppm/Kとなり、熱伝導率は220W/m・Kとなる。
Next, the said board | substrate is arrange | positioned to a predetermined pressurization apparatus, and a load is applied to the 1st metal plate 21 and the 2nd metal plate 22 in the direction of the arrow under high temperature. Thus, as shown in FIG. 2B, the first metal layer 21 is Cu, the second metal layer 22 is Mo, and the three layers of Cu (10 μm) / Mo (75 μm) / Cu (10 μm) are used. A metal substrate 5 is formed.
For example, the metal substrate 5 has a thermal expansion coefficient of 5.7 ppm / K and a thermal conductivity of 220 W / m · K.
 なお、この後、化合物半導体層3の接合面の大きさに合わせて切断した後、表面を鏡面加工してもよい。
 また、金属基板5の接合面5aに、電気的接触を安定化させるため接合補助膜を形成してもよい。前記接合補助膜としては、金、白金、ニッケルなどを用いることができる。例えば、メッキにより、金属基板5の接合面5a上にニッケルを2μm成膜した後、前記ニッケル上に金を1μm成膜する。
 さらにまた、前記接合補助膜の代わりに、ダイボンド用のAuSn等の共晶金属を形成してもよい。これにより、接合工程を簡便にすることができる。
After that, after cutting according to the size of the bonding surface of the compound semiconductor layer 3, the surface may be mirror-finished.
Further, a bonding auxiliary film may be formed on the bonding surface 5a of the metal substrate 5 in order to stabilize electrical contact. As the bonding auxiliary film, gold, platinum, nickel, or the like can be used. For example, after depositing 2 μm of nickel on the bonding surface 5a of the metal substrate 5 by plating, 1 μm of gold is deposited on the nickel.
Furthermore, a eutectic metal such as die bonding AuSn may be formed instead of the auxiliary bonding film. Thereby, a joining process can be simplified.
<化合物半導体層および第2の電極形成工程>
 まず、図3に示すように、半導体基板11の一面11a上に、複数のエピタキシャル層を成長させてエピタキシャル積層体17を形成する。
 半導体基板11は、エピタキシャル積層体17形成用基板であり、例えば、一面11aが(100)面から15°傾けた面とされた、Siドープしたn型のGaAs単結晶基板である。このように、エピタキシャル積層体17としてAlGaInP層またはAlGaAs層を用いる場合、エピタキシャル積層体17を形成する基板として、砒化ガリウム(GaAs)単結晶基板を用いることができる。
<Compound semiconductor layer and second electrode formation step>
First, as shown in FIG. 3, a plurality of epitaxial layers are grown on the one surface 11 a of the semiconductor substrate 11 to form an epitaxial multilayer 17.
The semiconductor substrate 11 is a substrate for forming an epitaxial layered body 17 and is, for example, a Si-doped n-type GaAs single crystal substrate in which one surface 11a is inclined by 15 ° from the (100) plane. As described above, when an AlGaInP layer or an AlGaAs layer is used as the epitaxial multilayer 17, a gallium arsenide (GaAs) single crystal substrate can be used as the substrate on which the epitaxial multilayer 17 is formed.
 化合物半導体層3の形成方法としては、有機金属化学気相成長(Metal Organic Chemical Vapor Deposition:MOCVD)法、分子線エピタキシャル(Molecular Beam Epitaxicy:MBE)法や液相エピタキシャル(Liquid Phase Epitaxicy:LPE)法などを用いることができる。 As a method for forming the compound semiconductor layer 3, a metal organic chemical vapor deposition (MOCVD) method, a molecular beam epitaxy (MBE) method, or a liquid phase epitaxy (Liquid Phase EpiLex) method is used. Etc. can be used.
 本実施形態では、トリメチルアルミニウム((CHAl)、トリメチルガリウム((CHGa)及びトリメチルインジウム((CHIn)をIII族構成元素の原料に用いた減圧MOCVD法を用いて、各層をエピタキシャル成長させる。
 なお、Mgのドーピング原料にはビスシクロペンタジエチニルマグネシウム((CMg)を用いる。また、Siのドーピング原料にはジシラン(Si)を用いる。また、V族構成元素の原料としては、ホスフィン(PH)又はアルシン(AsH)を用いる。
 なお、p型のGaP層13は、例えば、750°Cで成長させ、その他のエピタキシャル成長層は、例えば、730°Cで成長させる。
In the present embodiment, the low pressure MOCVD method using trimethylaluminum ((CH 3 ) 3 Al), trimethylgallium ((CH 3 ) 3 Ga), and trimethylindium ((CH 3 ) 3 In) as group III constituent elements. Each layer is epitaxially grown using
Note that biscyclopentadiethynylmagnesium ((C 5 H 5 ) 2 Mg) is used as a Mg doping material. Further, disilane (Si 2 H 6 ) is used as a Si doping raw material. Further, phosphine (PH 3 ) or arsine (AsH 3 ) is used as a raw material for the group V constituent element.
The p-type GaP layer 13 is grown at 750 ° C., for example, and the other epitaxial growth layers are grown at 730 ° C., for example.
 具体的には、まず、半導体基板11の一面11a上に、Siをドープしたn型のGaAsからなる緩衝層12aを成膜する。緩衝層12aとしては、例えば、Siをドープしたn型のGaAsを用い、キャリア濃度を2×1018cm-3とし、層厚を0.2μmとする。
 次に、緩衝層12a上に、Siドープしたn型の(Al0.5Ga0.50.5In0.5Pからなるエッチングストップ層12bを成膜する。
 エッチングストップ層12bは、半導体基板をエッチング除去する際、クラッド層および発光層までがエッチングされてしまうことを防ぐための層であり、例えば、Siドープの(Al0.5Ga0.50.5In0.5Pからなり、層厚を0.5μmとする。
 次に、エッチングストップ層12b上に、Siドープしたn型のGaAsからなるコンタクト層12cを成膜する。
 次に、コンタクト層12c上に、Siをドープしたn型のAl0.5In0.5Pからなるクラッド層10aを成膜する。 
 次に、クラッド層10a上に、アンドープの(Al0.2Ga0.80.5In0.5P/(Al0.7Ga0.30.5In0.5Pの10対の積層構造からなる発光層2を成膜する。
 次に、発光層2上に、Mgをドープしたp型のAl0.5In0.5Pからなるクラッド層10bを成膜する。
 次に、クラッド層10b上に、Mgドープしたp型のGaP層13を成膜する。
Specifically, first, a buffer layer 12 a made of n-type GaAs doped with Si is formed on one surface 11 a of the semiconductor substrate 11. As the buffer layer 12a, for example, n-type GaAs doped with Si is used, the carrier concentration is 2 × 10 18 cm −3 , and the layer thickness is 0.2 μm.
Next, an etching stop layer 12b made of Si-doped n-type (Al 0.5 Ga 0.5 ) 0.5 In 0.5 P is formed on the buffer layer 12a.
Etch stop layer 12b, at the time of the semiconductor substrate etched away until the cladding layer and the luminescent layer is a layer for preventing are etched, for example, the Si-doped (Al 0.5 Ga 0.5) 0 It consists .5 In 0.5 P, the thickness and 0.5 [mu] m.
Next, a contact layer 12c made of Si-doped n-type GaAs is formed on the etching stop layer 12b.
Next, a cladding layer 10a made of n-type Al 0.5 In 0.5 P doped with Si is formed on the contact layer 12c.
Next, undoped (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P / (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P 10 is formed on the cladding layer 10a. A light emitting layer 2 having a pair of laminated structures is formed.
Next, a clad layer 10b made of p-type Al 0.5 In 0.5 P doped with Mg is formed on the light emitting layer 2.
Next, a Mg-doped p-type GaP layer 13 is formed on the cladding layer 10b.
 次に、p型のGaP層13の半導体基板11と反対側の面13aを、表面から1μmの深さに至るまで鏡面研磨して、表面の粗さを、例えば、0.18nm以内とする。
 次に、図4に示すように、p型のGaP層13の半導体基板11と反対側の面13a上に第2の電極(オーミック電極)8を形成する。第2の電極8は、例えば、0.4μmの厚さのAuBe上に0.2μmの厚さのAuが積層されてなる。第2の電極8は、例えば、平面視したときに20μmφの円形状であり、60μmの間隔で形成される。
Next, the surface 13a opposite to the semiconductor substrate 11 of the p-type GaP layer 13 is mirror-polished to a depth of 1 μm from the surface to make the surface roughness within 0.18 nm, for example.
Next, as shown in FIG. 4, a second electrode (ohmic electrode) 8 is formed on the surface 13 a opposite to the semiconductor substrate 11 of the p-type GaP layer 13. For example, the second electrode 8 is formed by laminating Au having a thickness of 0.2 μm on AuBe having a thickness of 0.4 μm. For example, the second electrode 8 has a circular shape of 20 μmφ when viewed in plan, and is formed at intervals of 60 μm.
<反射構造体形成工程>
 次に、図5に示すように、p型のGaP層13の半導体基板11と反対側の面13aおよび第2の電極8を覆うようにITO膜からなる透明導電膜14を形成する。次に、450℃の熱処理を施して、第2の電極8と透明導電膜14との間にオーミックコンタクトを形成する。
<Reflection structure forming process>
Next, as shown in FIG. 5, a transparent conductive film 14 made of an ITO film is formed so as to cover the surface 13 a opposite to the semiconductor substrate 11 of the p-type GaP layer 13 and the second electrode 8. Next, a heat treatment at 450 ° C. is performed to form an ohmic contact between the second electrode 8 and the transparent conductive film 14.
 次に、図6に示すように、透明導電膜14のエピタキシャル積層体17と反対側の面14aに、蒸着法を用いて、銀(Ag)合金からなる膜を0.7μm成膜した後、ニッケル(Ni)/チタン(Ti)からなる膜を0.5μm、金(Au)からなる膜を1μm成膜して、金属膜15とした。
 これにより、金属膜15と透明導電膜14とからなる反射構造体4が形成される。
Next, as shown in FIG. 6, after a film made of a silver (Ag) alloy is formed on the surface 14 a of the transparent conductive film 14 on the side opposite to the epitaxial laminate 17 by a vapor deposition method, A metal film 15 was formed by forming a film made of nickel (Ni) / titanium (Ti) to a thickness of 0.5 μm and a film made of gold (Au) to a thickness of 1 μm.
Thereby, the reflective structure 4 including the metal film 15 and the transparent conductive film 14 is formed.
<金属基板接合工程>
 次に、図7に示すように、反射構造体4とエピタキシャル積層体17とを形成した半導体基板11と、前記金属基板の製造工程で形成した金属基板5と、を減圧装置内に搬入して、反射構造体4の接合面4aと金属基板5の接合面5aとが対向して重ねあわされるように配置する。
 次に、前記減圧装置内を3×10-5Paまで排気した後、半導体基板11と金属基板5とを400℃に加熱した状態で、500kgの荷重を印加して反射構造体4の接合面4aと金属基板5の接合面5aと接合して、接合構造体18を形成する。
<Metal substrate bonding process>
Next, as shown in FIG. 7, the semiconductor substrate 11 on which the reflective structure 4 and the epitaxial laminate 17 are formed, and the metal substrate 5 formed in the manufacturing process of the metal substrate are carried into a decompression device. The joining surface 4a of the reflective structure 4 and the joining surface 5a of the metal substrate 5 are arranged so as to be opposed to each other.
Next, after evacuating the decompression device to 3 × 10 −5 Pa, a load of 500 kg is applied in a state where the semiconductor substrate 11 and the metal substrate 5 are heated to 400 ° C. 4a and the joining surface 5a of the metal substrate 5 are joined to form a joined structure 18.
<半導体基板および緩衝層除去工程>
 次に、図8に示すように、接合構造体18から、半導体基板11及び緩衝層12aをアンモニア系エッチャントにより選択的に除去する。
<Semiconductor substrate and buffer layer removal step>
Next, as shown in FIG. 8, the semiconductor substrate 11 and the buffer layer 12a are selectively removed from the bonding structure 18 with an ammonia-based etchant.
<エッチングストップ層除去工程>
 次に、エッチングストップ層12bを塩酸系エッチャントにより選択的に除去する。これにより、発光層2を有する化合物半導体層3が形成される。
<Etching stop layer removal process>
Next, the etching stop layer 12b is selectively removed with a hydrochloric acid-based etchant. Thereby, the compound semiconductor layer 3 having the light emitting layer 2 is formed.
<第1の電極形成工程>
 次に、真空蒸着法を用いて、化合物半導体層3の反射構造体4と反対側の面3aに電極用導電膜を成膜する。前記電極用導電膜としては、例えば、AuGe/Ni/Auからなる金属層構造を用いることができる。例えば、AuGe(Ge質量比12%)を0.15μmの厚さで成膜した後、Niを0.05μmの厚さで成膜し、さらにAuを1μmの厚さで成膜する。
 次に、一般的なフォトリソグラフィー手段を利用して、前記電極用導電膜を例えば、平面視円形状にパターニングして、n型オーミック電極(第1の電極)6として、発光ダイオードのウェハを作製する。
<First electrode forming step>
Next, a conductive film for an electrode is formed on the surface 3a of the compound semiconductor layer 3 opposite to the reflective structure 4 by using a vacuum deposition method. For example, a metal layer structure made of AuGe / Ni / Au can be used as the electrode conductive film. For example, AuGe (Ge mass ratio 12%) is formed to a thickness of 0.15 μm, Ni is then formed to a thickness of 0.05 μm, and Au is further formed to a thickness of 1 μm.
Next, by using a general photolithography means, the electrode conductive film is patterned into a circular shape in plan view, for example, and a light emitting diode wafer is produced as an n-type ohmic electrode (first electrode) 6. To do.
 上記第1の電極形成工程のパターニングで用いたマスクを用いて、コンタクト層12cのうち、例えば、アンモニア水(NH4OH)/過酸化水素(H22)/純水(H20)混合液により、n型オーミック電極(第1の電極)6の下以外の部分をエッチングで除去する。これにより、n型オーミック電極(第1の電極)6とコンタクト層12cの平面形状は図1に示すように、実質的に同一の形状となる。 Using the mask used in the patterning in the first electrode formation step, for example, a mixed solution of ammonia water (NH 4 OH) / hydrogen peroxide (H 2 O 2 ) / pure water (H 2 0) in the contact layer 12c. Thus, the portion other than under the n-type ohmic electrode (first electrode) 6 is removed by etching. As a result, the planar shapes of the n-type ohmic electrode (first electrode) 6 and the contact layer 12c are substantially the same as shown in FIG.
 なお、この後、例えば、420°Cで3分間熱処理を行って、n型オーミック電極(第1の電極)6の各金属を合金化することが好ましい。これにより、n型オーミック電極(第1の電極)6を低抵抗化することができる。 After this, it is preferable to alloy each metal of the n-type ohmic electrode (first electrode) 6 by performing a heat treatment at 420 ° C. for 3 minutes, for example. Thereby, the resistance of the n-type ohmic electrode (first electrode) 6 can be reduced.
 図9A~図9Cを参照して、化合物半導体層及びおもて面金属層の切断予定ライン上の部分を除去する工程(おもて面エッチング工程)について説明する。 With reference to FIGS. 9A to 9C, a process of removing portions of the compound semiconductor layer and the front metal layer on the planned cutting line (front surface etching process) will be described.
<化合物半導体層除去工程>
 まず、図9Aに示すように、発光ダイオードのウェハの化合物半導体層3上にレジストを塗布し、フォトリソグラフィーによって、例えば、幅60μm程度の切断予定ラインパターンを含むレジストパターン31を形成する。
<Compound semiconductor layer removal step>
First, as shown in FIG. 9A, a resist is applied on the compound semiconductor layer 3 of the wafer of light emitting diodes, and a resist pattern 31 including a line pattern to be cut having a width of about 60 μm is formed by photolithography, for example.
 次いで、露出されている化合物半導体層の切断予定ライン上の部分をエッチングによって除去する(符号3A参照)。
 化合物半導体層の除去幅はこの後の金属層の除去幅を決める。従って、化合物半導体層の除去幅は、この後のレーザー切断時に生成されるデブリ量を低減するために、レーザーによる切断幅より広い幅であるのが好ましい。例えば、おもて面からレーザー照射してレーザー切断を行う場合はレーザーによる切断幅より40μm程度広いのが好ましい。また、裏面からレーザー照射してレーザー切断を行う場合はレーザーによる切断幅は20μm程度広いのが好ましい。
Next, the exposed portion of the compound semiconductor layer on the line to be cut is removed by etching (see reference numeral 3A).
The removal width of the compound semiconductor layer determines the removal width of the subsequent metal layer. Accordingly, the removal width of the compound semiconductor layer is preferably wider than the cutting width by the laser in order to reduce the amount of debris generated during the subsequent laser cutting. For example, when laser cutting is performed by laser irradiation from the front surface, the width is preferably about 40 μm wider than the laser cutting width. Further, when laser cutting is performed by laser irradiation from the back surface, the cutting width by the laser is preferably about 20 μm wide.
<おもて面金属層除去工程>
 次いで、図9Bに示すように、そのウェハを塩化第二鉄液に浸漬して、ITO層14とNi層33の、化合物半導体層の除去した部分の下方に位置する部分をエッチングして除去する(符号14A、33A参照)。
<Front surface metal layer removal process>
Next, as shown in FIG. 9B, the wafer is immersed in ferric chloride solution, and the portions of the ITO layer 14 and the Ni layer 33 located below the portion where the compound semiconductor layer is removed are etched and removed. (Refer to reference numerals 14A and 33A).
 次いで、図9Cに示すように、ウェハをフッ酸系液、例えば、水素二フッ化アンモニウム2~3%、フッ化アンモニウム0.05~0.1%に水を加えた溶液に浸漬して、Ti層34の、上記除去した部分の下方に位置する部分をエッチングして除去する(符号34A参照)。
 次いで、ウェハをAu系エッチング液、例えば、シアン系のエッチング液に浸漬して、Au層35、36の、上記除去した部分の下方に位置する部分をエッチングして除去する(符号35A、36A参照)。
 次いで、ウェハを、Ni、Cuに対するエッチング速度がMoに対するエッチング速度より高くNi、Cuを選択的にエッチングできる塩化第二鉄液に浸漬して、Ni層37及びCu層21Aの、上記除去した部分の下方に位置する部分をMo層22が露出するまでエッチングして除去する(符号37A、21AA参照)。
 以上の手順によって、切断予定ライン上の化合物半導体層及びおもて面金属層を除去することができる。
Next, as shown in FIG. 9C, the wafer is immersed in a hydrofluoric acid-based liquid, for example, a solution obtained by adding water to hydrogen difluoride 2-3%, ammonium fluoride 0.05-0.1%, A portion of the Ti layer 34 located below the removed portion is removed by etching (see reference numeral 34A).
Next, the wafer is immersed in an Au-based etching solution, for example, a cyan-based etching solution, and portions of the Au layers 35 and 36 located below the removed portion are etched and removed (see reference numerals 35A and 36A). ).
Next, the wafer is immersed in a ferric chloride solution whose etching rate for Ni and Cu is higher than that for Mo and Ni and Cu can be selectively etched, and the removed portions of the Ni layer 37 and the Cu layer 21A are removed. The portion located below is removed by etching until the Mo layer 22 is exposed (see reference numerals 37A and 21AA).
By the above procedure, the compound semiconductor layer and the front metal layer on the cutting line can be removed.
<裏面金属層除去工程>(裏面エッチング工程)
 図10A~図10Cを参照して、裏面金属層の切断予定ライン上の部分を除去する工程について説明する。
<Back side metal layer removal step> (Back side etching step)
With reference to FIGS. 10A to 10C, a process of removing a portion of the back surface metal layer on the planned cutting line will be described.
 まず、図10Aに示すように、発光ダイオードのウェハ裏面の金属基板5上に形成されたAu/Ni層上にレジストを塗布し、フォトリソグラフィーによって、例えば、幅40μm程度の切断予定ラインパターンを含むレジストパターン41を形成する。 First, as shown in FIG. 10A, a resist is applied on the Au / Ni layer formed on the metal substrate 5 on the back surface of the light emitting diode wafer, and includes a line pattern to be cut having a width of about 40 μm, for example, by photolithography. A resist pattern 41 is formed.
 次いで、図10Bに示すように、ウェハをAu系エッチング液、例えば、シアン系のエッチング液に浸漬して、Au層42の、上記除去した部分の下方に位置する部分をエッチングして除去する(符号42Aで示した部分)。 Next, as shown in FIG. 10B, the wafer is immersed in an Au-based etching solution, for example, a cyan-based etching solution, and the portion of the Au layer 42 located below the removed portion is etched and removed ( Part indicated by reference numeral 42A).
 次いで、図10Cに示すように、ウェハを、Ni、Cuに対するエッチング速度がMoに対するエッチング速度より高くNi、Cuを選択的にエッチングできる塩化第二鉄液に浸漬して、Ni層43及びCu層21Bの、上記除去した部分の下方に位置する部分をMo層が露出するまでエッチングして除去する(符号43A、21BBで示した部分)。
 以上の手順によって、切断予定ライン上の裏面Cu層を除去する。
Next, as shown in FIG. 10C, the wafer is immersed in a ferric chloride solution in which the etching rate for Ni and Cu is higher than the etching rate for Mo and Ni and Cu can be selectively etched. A portion of 21B located below the removed portion is removed by etching until the Mo layer is exposed (portions indicated by reference numerals 43A and 21BB).
The back surface Cu layer on the cutting scheduled line is removed by the above procedure.
 化合物半導体層除去工程、おもて面Cu層除去工程、裏面Cu層除去工程はすべて行うのが好ましいが、レーザー照射をおもて面から行う場合は化合物半導体層除去工程及び裏面Cu層除去工程だけを行っても、レーザー切断時に発生する熱の悪影響を低減できる。
同様に、レーザー照射を裏面から行う場合は化合物半導体層除去工程及びおもて面Cu層除去工程だけを行っても、レーザー切断時に発生する熱の悪影響を低減できる。
The compound semiconductor layer removal step, the front surface Cu layer removal step, and the back surface Cu layer removal step are all preferably performed. However, when laser irradiation is performed from the front surface, the compound semiconductor layer removal step and the back surface Cu layer removal step are performed. Even if it only performs, the bad influence of the heat generated at the time of laser cutting can be reduced.
Similarly, when laser irradiation is performed from the back surface, even if only the compound semiconductor layer removal step and the front Cu layer removal step are performed, the adverse effect of heat generated during laser cutting can be reduced.
 すべての除去工程を行う場合、化合物半導体層除去工程、おもて面金属層除去工程、裏面金属層除去工程はこの順で行ってもよいし、裏面金属層除去工程を先に行ってから化合物半導体層除去工程、おもて面金属層除去工程を順に行ってもよい。また、化合物半導体層除去工程、裏面金属層除去工程、おもて面金属層除去工程の順で行うこともできる。裏面金属層除去工程及びおもて面金属層除去工程については同時に行うこともできる。
 但し、レーザー照射をおもて面から行う場合は、裏面金属層除去工程、化合物半導体層除去工程、おもて面金属層除去工程の順に行うのが簡便で好ましい。他方、レーザー照射を裏面から行う場合は、化合物半導体層除去工程、おもて面金属層除去工程、裏面金属層除去工程の順に行うのが簡便で好ましい。
When performing all the removal steps, the compound semiconductor layer removal step, the front surface metal layer removal step, and the back surface metal layer removal step may be performed in this order, or the compound after the back surface metal layer removal step is performed first. You may perform a semiconductor layer removal process and a front surface metal layer removal process in order. Moreover, it can also carry out in order of a compound semiconductor layer removal process, a back surface metal layer removal process, and a front surface metal layer removal process. The back surface metal layer removing step and the front surface metal layer removing step can be performed simultaneously.
However, when laser irradiation is performed from the front surface, it is convenient and preferable to perform the back surface metal layer removing step, the compound semiconductor layer removing step, and the front surface metal layer removing step in this order. On the other hand, when the laser irradiation is performed from the back surface, it is convenient and preferable to perform the compound semiconductor layer removal step, the front surface metal layer removal step, and the back surface metal layer removal step in this order.
<レーザーダイシング工程>
 例えば、すべての除去工程を行った後に、裏面の切断予定ライン上の金属層を除去した部分に沿って、レーザーを照射してMo層を切り込んで金属基板を切断する。
<Laser dicing process>
For example, after all the removing steps are performed, the metal layer is cut by irradiating a laser along the portion where the metal layer on the line to be cut on the back surface is removed to cut the metal substrate.
 レーザーによる切断条件としてはLED素子製造プロセスで使用される条件でよい。
例えば、レーザー波長を355nmとし、送り速度を20mm/secとした条件で金属基板を切断することができる。
The laser cutting conditions may be those used in the LED element manufacturing process.
For example, the metal substrate can be cut under conditions where the laser wavelength is 355 nm and the feed rate is 20 mm / sec.
 レーザーダイシングのレーザー走査は複数回に分けて行ってもよい。その際、レーザービームの太さを変えてダイシングしてもよい。 Laser scanning of laser dicing may be performed in multiple times. At that time, dicing may be performed by changing the thickness of the laser beam.
 金属基板のレーザー切断面はその後、Auめっきするのが好ましい。 The laser cut surface of the metal substrate is then preferably Au plated.
<発光ダイオードランプ> 
 本発明の実施形態である発光ダイオードを備えた発光ダイオードランプについて説明する。
 図11は、本発明の実施形態である発光ダイオードランプの一例を示す断面模式図である。図11に示すように、本発明の実施形態である発光ダイオードランプ50は、パッケージ基板55と、パッケージ基板55上に形成された2つの電極端子53、54と、電極端子54上に搭載された発光ダイオード1と、発光ダイオード1を覆うように形成されたシリコンなどからなる透明樹脂(封止樹脂)51と、を有している。
 発光ダイオード1は、化合物半導体層3と反射構造部4と金属基板5と第1の電極6と第2の電極8を有しており、金属基板5が電極端子53と接続されるように配置されている。また、第1の電極6と電極端子54とはワイヤボンディングされている。電極端子53、54に印加された電圧が、第1の電極6と第2の電極8を介して化合物半導体層3に印加され、化合物半導体層3に含まれる発光層が発光する。発光された光は、正面方向fに取り出される。
<Light emitting diode lamp>
A light-emitting diode lamp including a light-emitting diode according to an embodiment of the present invention will be described.
FIG. 11 is a schematic cross-sectional view showing an example of a light-emitting diode lamp according to an embodiment of the present invention. As shown in FIG. 11, a light emitting diode lamp 50 according to an embodiment of the present invention is mounted on a package substrate 55, two electrode terminals 53, 54 formed on the package substrate 55, and the electrode terminal 54. The light-emitting diode 1 includes a transparent resin (sealing resin) 51 made of silicon or the like formed so as to cover the light-emitting diode 1.
The light-emitting diode 1 includes the compound semiconductor layer 3, the reflective structure 4, the metal substrate 5, the first electrode 6, and the second electrode 8, and is arranged so that the metal substrate 5 is connected to the electrode terminal 53. Has been. The first electrode 6 and the electrode terminal 54 are wire bonded. The voltage applied to the electrode terminals 53 and 54 is applied to the compound semiconductor layer 3 through the first electrode 6 and the second electrode 8, and the light emitting layer included in the compound semiconductor layer 3 emits light. The emitted light is extracted in the front direction f.
 パッケージ基板55は、その熱抵抗が10℃/W以下とされている。これにより、発光層2に1W以上の電力を加えて発光させたときでも、ヒートシンクとして機能させることができ、発光ダイオード1の放熱性をより高めることができる。
 なお、パッケージ基板の形状は、これに限定されず、他の形状のパッケージ基板を用いてもよい。他の形状のパッケージ基板を用いたLEDランプ製品においても、放熱性を十分確保できるので、高出力、高輝度の発光ダイオードランプとすることができる。
The package substrate 55 has a thermal resistance of 10 ° C./W or less. Thereby, even when 1 W or more of electric power is applied to the light emitting layer 2 to emit light, the light emitting layer 2 can function as a heat sink, and the heat dissipation of the light emitting diode 1 can be further enhanced.
The shape of the package substrate is not limited to this, and a package substrate having another shape may be used. Also in LED lamp products using package substrates of other shapes, sufficient heat dissipation can be ensured, so that a light-emitting diode lamp with high output and high brightness can be obtained.
 まず、発光層として(Al0.2Ga0.80.5In0.5P/(Al0.7Ga0.30.5In0.5Pの10対の積層構造からなるもので厚さ4μm、GaP層が2μm、反射構造体がAg層0.7μm、Ni/Tiバリヤ層0.5μm、Au層1μm、金属基板がCu層10μm/Mo層75μm/Cu層10μmの三層構造の両側にNi層2μm、Au層1μmを順に形成したウェハを作製した。 First, the light emitting layer has a laminated structure of 10 pairs of (Al 0.2 Ga 0.8 ) 0.5 In 0.5 P / (Al 0.7 Ga 0.3 ) 0.5 In 0.5 P. 3 μm thick, GaP layer 2 μm, reflective structure Ag layer 0.7 μm, Ni / Ti barrier layer 0.5 μm, Au layer 1 μm, metal substrate Cu layer 10 μm / Mo layer 75 μm / Cu layer 10 μm A wafer having a Ni layer of 2 μm and an Au layer of 1 μm formed in order on both sides of the layer structure was produced.
 このウェハのおもて面について、金属基板のおもて面側のCu層までをエッチングによって除去して、幅60μmの溝を形成した。また、裏面については金属基板の裏面側のCu層をエッチングによって除去して、幅40μmの溝を形成した。
 次いで、ウェハのおもて面から、レーザー波長355nm、送り速度20mm/secの条件で金属基板のMo層をレーザー切断した。
On the front surface of this wafer, the Cu layer on the front surface side of the metal substrate was removed by etching to form a groove having a width of 60 μm. On the back surface, the Cu layer on the back surface side of the metal substrate was removed by etching to form a groove having a width of 40 μm.
Next, the Mo layer of the metal substrate was laser-cut from the front surface of the wafer under the conditions of a laser wavelength of 355 nm and a feed rate of 20 mm / sec.
 こうして作製したチップ状の発光ダイオードについてレーザー顕微鏡で観察した。
 デブリは、金属基板のおもて面側のCu層の側面及び裏面側のCu層の側面には付着していたが、おもて面側のCu層及び裏面側のCu層の露出している表面に付着しているデブリは観察されなかった。
The chip-shaped light emitting diode thus fabricated was observed with a laser microscope.
The debris was attached to the side surface of the Cu layer on the front surface side and the side surface of the Cu layer on the back surface side of the metal substrate, but the Cu layer on the front surface side and the Cu layer on the back surface side were exposed. No debris adhering to the surface was observed.
 本発明は、特に金属基板を基板に用いた発光ダイオードの製造方法、切断方法及び発光ダイオードを利用する産業において利用可能性がある。 The present invention is particularly applicable to a manufacturing method, a cutting method, and an industry using a light emitting diode using a metal substrate as a substrate.
 1 発光ダイオード(発光ダイオードチップ)
 2 発光層
 3 化合物半導体層
 4 反射構造体
 5 金属基板
 14 透明導電膜
 15 金属接合膜
 21(21A、21B) 第1の金属層
 22 第2の金属層
 50 発光ダイオードランプ
 55 金属基板
1 Light-emitting diode (light-emitting diode chip)
DESCRIPTION OF SYMBOLS 2 Light emitting layer 3 Compound semiconductor layer 4 Reflective structure 5 Metal substrate 14 Transparent conductive film 15 Metal bonding film 21 (21A, 21B) 1st metal layer 22 2nd metal layer 50 Light emitting diode lamp 55 Metal substrate

Claims (17)

  1.  ウェハにレーザーを照射してチップ状の発光ダイオードを製造する方法において、
     複数の金属層からなる金属基板と、該金属基板上に形成された発光層を含む化合物半導体層とを備えたウェハを作製する工程と、
     前記化合物半導体層の切断予定ライン上の部分を、エッチングによって除去する工程と、
     前記複数の金属層のうちレーザー照射面の反対側の少なくとも一層の、前記切断予定ライン上の部分を、エッチングによって除去する工程と、
     平面視して前記金属層の前記除去された部分に沿って、レーザーを照射して前記金属基板を切断する工程と、
     を有することを特徴とする発光ダイオードの製造方法。
    In a method of manufacturing a chip-like light emitting diode by irradiating a laser on a wafer,
    Producing a wafer comprising a metal substrate composed of a plurality of metal layers, and a compound semiconductor layer including a light emitting layer formed on the metal substrate;
    Removing the portion of the compound semiconductor layer on the line to be cut by etching;
    A step of removing at least one layer on the opposite side of the laser irradiation surface of the plurality of metal layers on the line to be cut by etching;
    Irradiating a laser along the removed portion of the metal layer in plan view to cut the metal substrate;
    A method for producing a light emitting diode, comprising:
  2.  前記金属基板を切断する工程の前に、前記複数の金属層のうち前記レーザー照射面側の少なくとも一層の、前記切断予定ライン上の部分をエッチングによって除去する工程をさらに備えたことを特徴とする請求項1に記載の発光ダイオードの製造方法。 Before the step of cutting the metal substrate, the method further comprises the step of removing at least one layer on the laser irradiation surface side of the plurality of metal layers on the planned cutting line by etching. The manufacturing method of the light emitting diode of Claim 1.
  3.  前記複数の金属層は、前記化合物半導体層の熱膨張係数より大きい熱膨張係数を有する材料と前記化合物半導体層の熱膨張係数より小さい熱膨張係数を有する材料を含むことを特徴とする請求項1又は2に記載の発光ダイオードの製造方法。 The plurality of metal layers includes a material having a thermal expansion coefficient larger than that of the compound semiconductor layer and a material having a thermal expansion coefficient smaller than that of the compound semiconductor layer. Or the manufacturing method of the light emitting diode of 2.
  4.  前記化合物半導体層の熱膨張係数より大きい熱膨張係数を有する材料が、アルミニウム、銅、銀、金、ニッケル、チタンまたはこれらの合金のいずれかからなることを特徴とする請求項3に記載の発光ダイオードの製造方法。 The light emission according to claim 3, wherein the material having a thermal expansion coefficient larger than that of the compound semiconductor layer is made of any of aluminum, copper, silver, gold, nickel, titanium, or an alloy thereof. Diode manufacturing method.
  5.  前記化合物半導体層の熱膨張係数より小さい熱膨張係数を有する材料が、モリブデン、タングステン、クロムまたはこれらの合金のいずれかからなることを特徴とする請求項3に記載の発光ダイオードの製造方法。 4. The method for manufacturing a light-emitting diode according to claim 3, wherein the material having a thermal expansion coefficient smaller than that of the compound semiconductor layer is made of molybdenum, tungsten, chromium, or an alloy thereof.
  6.  前記複数の金属層は三層の金属層であることを特徴とする請求項1又は2に記載の発光ダイオードの製造方法。 The method of manufacturing a light emitting diode according to claim 1 or 2, wherein the plurality of metal layers are three metal layers.
  7.  前記三層の金属層のうち、一層の金属層を挟む二層の金属層は同じ金属材料からなることを特徴とする請求項6に記載の発光ダイオードの製造方法。 The method of manufacturing a light emitting diode according to claim 6, wherein, of the three metal layers, two metal layers sandwiching one metal layer are made of the same metal material.
  8.  前記一層の金属層はモリブデンからなり、前記二層の金属層は銅からなることを特徴とする請求項7に記載の発光ダイオードの製造方法。 The method of manufacturing a light emitting diode according to claim 7, wherein the one metal layer is made of molybdenum, and the two metal layers are made of copper.
  9.  前記三層の金属層のうち、一層の金属層を挟む二層の金属層をエッチングによって除去し、前記一層の金属層をレーザーによって切断することを特徴とする請求項6に記載の発光ダイオードの製造方法。 7. The light-emitting diode according to claim 6, wherein, of the three metal layers, two metal layers sandwiching one metal layer are removed by etching, and the one metal layer is cut by a laser. Production method.
  10.  前記発光層は、AlGaInP層またはAlGaAs層を含むことを特徴とする請求項1又は2に記載の発光ダイオードの製造方法。 3. The method of manufacturing a light emitting diode according to claim 1, wherein the light emitting layer includes an AlGaInP layer or an AlGaAs layer.
  11.  前記化合物半導体層と前記金属基板との間に反射構造体を備えることを特徴とする請求項1又は2に記載の発光ダイオードの製造方法。 The method for producing a light-emitting diode according to claim 1, wherein a reflective structure is provided between the compound semiconductor layer and the metal substrate.
  12.  複数の金属層からなる金属基板と、該金属基板上に形成された化合物半導体層とを備えたウェハにレーザーを照射してチップ状の発光ダイオードに切断する方法において、
     前記化合物半導体層の切断予定ライン上の部分を、エッチングによって除去する工程と、
     前記複数の金属層のうちレーザー照射面の反対側の少なくとも一層の、前記切断予定ライン上の部分を、エッチングによって除去する工程と、
     平面視して前記金属層の前記除去された部分に沿って、レーザーを照射して前記金属基板を切断する工程と、
    を有することを特徴とする切断方法。
    In a method of cutting a chip-shaped light emitting diode by irradiating a laser on a wafer including a metal substrate composed of a plurality of metal layers and a compound semiconductor layer formed on the metal substrate,
    Removing the portion of the compound semiconductor layer on the line to be cut by etching;
    A step of removing at least one layer on the opposite side of the laser irradiation surface of the plurality of metal layers on the line to be cut by etching;
    Irradiating a laser along the removed portion of the metal layer in plan view to cut the metal substrate;
    The cutting method characterized by having.
  13.  前記金属基板を切断する工程の前に、前記複数の金属層のうち前記レーザー照射面側の少なくとも一層の、前記切断予定ライン上の部分をエッチングによって除去する工程をさらに備えたことを特徴とする請求項12に記載の切断方法。 Before the step of cutting the metal substrate, the method further comprises the step of removing at least one layer on the laser irradiation surface side of the plurality of metal layers on the planned cutting line by etching. The cutting method according to claim 12.
  14.  請求項1又は2に記載の発光ダイオードの製造方法によって製造された発光ダイオード。 A light-emitting diode manufactured by the method for manufacturing a light-emitting diode according to claim 1.
  15.  複数の金属層からなる金属基板と、該金属基板上に形成された発光層を含む化合物半導体層とを備えた発光ダイオードであって、
     前記金属基板の側面は、該金属基板の厚さ方向に並んで配置する湿式エッチング面とレーザー切断面とからなり、
     複数の金属層のうち、前記化合物半導体層側の少なくとも一層の金属層の側面と前記化合物半導体層の反対側の少なくとも一層の金属層の側面とは湿式エッチング面からなり、
     レーザー照射による副次生成物は前記金属基板の側面にのみ付着していることを特徴とする発光ダイオード。
    A light emitting diode comprising a metal substrate comprising a plurality of metal layers and a compound semiconductor layer including a light emitting layer formed on the metal substrate,
    The side surface of the metal substrate consists of a wet etching surface and a laser cutting surface arranged side by side in the thickness direction of the metal substrate,
    Of the plurality of metal layers, the side surface of at least one metal layer on the side of the compound semiconductor layer and the side surface of at least one metal layer on the opposite side of the compound semiconductor layer are wet etching surfaces,
    A by-product produced by laser irradiation adheres only to the side surface of the metal substrate.
  16.  前記複数の金属層は三層の金属層であり、一層の金属層を挟む二層の金属層の側面は前記湿式エッチング面からなり、前記一層の金属層の側面は前記レーザー切断面からなることを特徴とする請求項15に記載の発光ダイオード。 The plurality of metal layers are three metal layers, the side surfaces of the two metal layers sandwiching one metal layer are the wet etched surface, and the side surfaces of the one metal layer are the laser cut surfaces. The light emitting diode according to claim 15.
  17.  前記一層の金属層はモリブデンからなり、前記二層の金属層は銅からなることを特徴とする請求項16に記載の発光ダイオード。 The light emitting diode according to claim 16, wherein the one metal layer is made of molybdenum, and the two metal layers are made of copper.
PCT/JP2011/065176 2010-07-09 2011-07-01 Method of producing light-emitting diodes, cutting method, and light-emitting diode WO2012005185A1 (en)

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