WO2011157049A1 - 半双工fm/chirp调制/解调方法及装置 - Google Patents

半双工fm/chirp调制/解调方法及装置 Download PDF

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Publication number
WO2011157049A1
WO2011157049A1 PCT/CN2011/000529 CN2011000529W WO2011157049A1 WO 2011157049 A1 WO2011157049 A1 WO 2011157049A1 CN 2011000529 W CN2011000529 W CN 2011000529W WO 2011157049 A1 WO2011157049 A1 WO 2011157049A1
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Prior art keywords
demodulation
modulation
carrier
chirp
circuit
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PCT/CN2011/000529
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English (en)
French (fr)
Inventor
周运伟
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Zhou Yunwei
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Publication of WO2011157049A1 publication Critical patent/WO2011157049A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/10Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B2001/6912Spread spectrum techniques using chirp

Definitions

  • the invention relates to a half-duplex FM/Chirp modulation/demodulation method and an implementation device thereof, and belongs to the field of communications. Background technique
  • the half-duplex mode refers to the communication mode in which the receiver can send and receive, but the transceiver does not work at the same time.
  • a typical communication device operating in a half-duplex mode is a walkie-talkie; in a walkie-talkie with FM modulation, the half-duplex FM modulator/demodulator fits well with the PTT (Push To Talk) mode of operation of the walkie-talkie.
  • Chirp modulation also known as sweep frequency modulation, is a kind of spread spectrum modulation method which is formed by controlling the frequency of a sinusoidal carrier to be monotonously changed according to a specific law with time. It still belongs to the frequency modulation type; Chirp modulation is based on the frequency sweep period.
  • the Chirp-modulated modulated carrier is also referred to as a Chirp pulse carrier.
  • the Chirp pulse carrier has a spread spectrum anti-interference characteristic similar to that of a direct sequence (DS) spread-spectrum modulated carrier, and has an approximately rectangular power spectrum shape when swept linearly.
  • DS direct sequence
  • Chirp modulation is mainly used in chirped pulse compression radar, and can also be communicated by modulating the amplitude of the Chirp pulse carrier, the sweep law, and the carrier phase at the beginning of the sweep period.
  • SAW surface acoustic wave
  • a Chirp pulse carrier whose carrier frequency is continuously changed is referred to as a C-Chirp pulse carrier, and a Chirp pulse carrier whose carrier frequency is stepped is referred to as an S-Chirp pulse carrier.
  • the S-Chirp pulse carrier is easy to generate by digital frequency synthesis technology, which is convenient for obtaining a variety of S-Chirp pulse carriers with different frequency sweeping rules, and can also conveniently sweep the frequency parameter. Make adjustments.
  • FM/Chirp modulation is a composite frequency modulation method formed by second frequency modulation (FM) of a Chirp pulse carrier.
  • the modulated carrier generated by FM/Chirp modulation is also called FM/Chirp modulated carrier.
  • FM/Chirp modulation can be divided into FM/C-Chirp and FM/S-Chirp according to the type of Chirp pulse carrier used.
  • FM/Chirp modulation can be divided into analog linearity according to the type of secondary frequency modulation.
  • FM/C-Chirp analog linear FM/S-Chirp, FFSK/C-Chirp, FFSK/S-Chirp> 4FSK/C-Chirp, 4FSK/S-Chirp> GMSK/C-Chirp, GMSK/S-Chirp, etc.
  • Chirp-word alone means C-Chirp and S-Chirp
  • FM-word alone means the analog or digital frequency modulation method that may be used.
  • the first type of modulation method is to mix the FM modulated carrier with the Chirp pulse carrier, and extract the sum or difference frequency component in the mixed output as the communication signal.
  • the FM/Chirp has a modulated carrier;
  • the second type of modulation method uses a direct digital synthesis (DDS) circuit to directly generate an FM/S-Chirp modulated carrier used as a communication signal by controlling the variation of its frequency tuning word.
  • DDS direct digital synthesis
  • the demodulation process of the FM/Chirp modulation method uses a local Chirp pulse carrier and the received FM/Chirp modulated carrier to perform correlation despreading, and the FM demodulation process is used to recover the to-be-modulated from the relevant despreading result.
  • the FM/Chirp modulated carrier is still a constant-envelope frequency-modulated carrier, which can share the same Class C RF power amplifier with the FM modulated modulated carrier, and can also (partially) follow the FM modulation modulator and solution.
  • Tuner, so FM/Chirp modulation facilitates simultaneous compatibility with FM modulation in three aspects: modulator, demodulator and RF power amplifier.
  • the FM/Chirp modulation method is applied to a communication device operating in a half-duplex mode such as a walkie-talkie, the corresponding FM/Chirp modulation/demodulator operating in a half-duplex mode is also required.
  • a first problem to be solved by the present invention is to provide a half-duplex FM/Chirp modulation/demodulation method for implementing modulation and demodulation in an FM/Chirp modulation mode in a half-duplex manner;
  • Two problems are to provide four half-duplex FM/Chirp modulation/demodulators and three half-duplex FM/S-Chirp modulation/demodulators according to the above-described half-duplex FM/Chirp modulation/demodulation method. To meet different application needs.
  • a half-duplex FM/Chirp modulation/demodulation method is first provided, and then four half-duplex FM/Chirp modulation/demodulation according to the half-duplex FM/Chirp modulation/demodulation method is provided. And three half-duplex FM/S-Chirp modulation/demodulators, and further explain the working process and application of the half-duplex FM/Chirp modulation/demodulation method and its implementation device by corresponding embodiments .
  • a half-duplex FM/Chirp modulation/demodulation method the content of which is: Chi a Chirp pulse carrier generating circuit with two working modes of modulation mode and demodulation mode; in modulation mode, by generating Chirp pulse carrier
  • the modulation of the circuit output is modulated and preprocessed with the basic Chirp pulse carrier to obtain the primary frequency modulated carrier required for modulation, and the primary frequency modulated carrier is subjected to secondary frequency modulation with the baseband signal to be modulated and the obtained FM/Chirp modulated carrier is obtained.
  • the local Chirp pulse carrier required for demodulation is obtained by demodulating and pre-processing the base Chirp pulse carrier for demodulation output of the Chirp pulse carrier generation circuit, and the local Chirp pulse carrier is received and received.
  • the FM/Chirp modulated carrier is mixed, and the sum or difference frequency component in the mixed output is extracted as a correlation despreading result, and the frequency demodulation method of the frequency modulation method corresponding to the secondary frequency modulation is adopted, from In the correlation despreading result, the demodulation recovers the restored sample of the baseband signal to be modulated.
  • the modulation preprocessing has three basic types of amplitude matching, frequency doubling, and spectrum shifting, and a composite type formed by combining the three basic types; similarly, demodulation The preprocessing also has three basic types of amplitude matching, frequency doubling and spectrum shifting, and a composite type formed by combining the three basic types.
  • the demodulation of the Chirp pulse carrier generating circuit is demodulated and preprocessed with the basic Chirp pulse carrier, and the amplitude, sweeping frequency and starting position of the sweep period of the local Chirp pulse carrier are obtained.
  • Meet FM/Chirp demodulation requirements If the Chirp pulse carrier output from the Chirp pulse carrier generation circuit degenerates into a sine wave, the modulation/demodulation method is also compatible with half-duplex FM modulation/demodulation.
  • the simplest form of the modulation pre-processing and demodulation pre-processing is to provide the Chirp pulse carrier whose amplitude of the output of the Chirp pulse carrier generating circuit meets the requirements to the modulation and respectively.
  • the chirp 3 ⁇ 4 is provided by the Chirp pulse-carrying generating circuit to the corresponding pre-processing or pre-processing circuit by switching; in order to simplify the composition of the half-duplex FM/Chirp modulation/demodulation device,
  • the demodulation pre-processing can be combined with the pre-processing process or the pre-processing circuit of the common part of the modulation pre-processing, or the modulation pre-processing and modulation process can be used together to implement the demodulation pre-processing, using the characteristics that modulation and demodulation do not perform at the same time.
  • modulation pre-processing and demodulation pre-processing multiple types of half-duplex FM/Chirp modulation/demodulators can be constructed.
  • the working process is as follows:
  • the Chirp pulse carrier generating circuit (21) is selected to operate in the modulation mode or the demodulation mode, and the switching output port of the single-pole double-throw switching circuit (22) is selected; in the modulation mode, The modulated Chirp pulse carrier generated by the Chirp pulse carrier generating circuit (21) passes through the switching output of the single-pole double-throw switching circuit (22) as one input of the modulation mixer (24), and the FM modulation circuit (23) baseband to be modulated The FM modulated carrier obtained by FM modulation of the signal is used as the other input of the modulation mixer (24), and the modulation bandpass filter (25) extracts the sum or difference frequency from the output of the modulation mixer (24).
  • the component is used as the transmission intermediate frequency signal; in the demodulation mode, the Chirp pulse carrier generation circuit (21) generates the demodulation base Chirp pulse carrier through the switching output of the single-pole double-throw switching circuit (22) as an input to the demodulation mixer ( 26)
  • the local Chirp pulse carrier receiving the intermediate frequency signal as the other input of the demodulation mixer (24), demodulating the bandpass filter (27) from the solution
  • the sum or difference frequency component is extracted from the output of the mixer (26) as a correlation despreading result, and the FM demodulator (28) demodulates and recovers from the correlated despreading result output by the demodulation bandpass filter (27).
  • the modulation pre-processing and demodulation pre-processing are in the simplest form, that is, the Chirp pulse carrier outputted by the Chirp pulse carrier generating circuit is passed through a single-pole double-throw switching circuit (22).
  • the switching output is used as the primary frequency modulated carrier required for modulation and the amplitude required for demodulation, the sweep law, and the local Chirp pulse carrier that meets the FM/Chirp demodulation requirements.
  • the modulation preprocessing and demodulation preprocessing in the process share the amplitude matching process).
  • the Chirp pulse carrier output from the Chirp pulse carrier generating circuit (21) degenerates into a sinusoidal carrier
  • the half-duplex FM/Chirp modulator/demodulator degenerates into a half-duplex FM modulator/demodulator.
  • a half-duplex FM/Chirp modulation/demodulator implemented according to the aforementioned half-duplex FM/Chirp modulation/demodulation method, by Chirp pulse carrier generating circuit (31), FM modulation circuit (32), modulation mixer (33), a modulation band pass filter (34), a single-pole double-throw switching circuit (35), a demodulation mixer (36), a demodulation band-pass filter (37), and an FM demodulator (38).
  • the working process is as follows - according to the high/low state of the transceiver control signal, the Chirp pulse carrier generating circuit (31) is selected to operate in the modulation mode or the demodulation mode, and the switching output port of the single-pole double-throw switching circuit (35) is selected at the same time; Modulation mode , lrnp pulse-borne ⁇ ⁇ (31) generated modulation Chirp pulse carrier as an input signal of the modulation mixer (33), FM modulation circuit (32) FM modulation obtained by FM modulation of the baseband signal to be modulated The modulated carrier is used as the other input signal of the modulation mixer (33), and the modulation bandpass filter (34) extracts the sum or difference frequency component from the output of the modulation mixer (33) and switches through single-pole double-throw switching.
  • Modulation mode lrnp pulse-borne ⁇ ⁇ (31) generated modulation Chirp pulse carrier as an input signal of the modulation mixer (33), FM modulation circuit (32) FM modulation obtained by FM modulation of the baseband signal
  • the switching output of the circuit (35) is used as the transmission intermediate frequency signal; in the demodulation mode, the Chirp pulse carrier generating circuit (31) generates the demodulation base Chirp pulse carrier as one input of the modulation mixer (33), and the FM modulation circuit (32) outputting a fixed frequency sinusoidal carrier as the other input of the modulation mixer (33), and the modulation bandpass filter (34) extracts the sum or difference frequency component from the output of the modulation mixer (33). And the switching output of the single-pole double-throw switching circuit (35) is used as a local Chirp pulse carrier input to the demodulation mixer (36), and the intermediate frequency signal is received as another input of the demodulation mixer (36), and demodulated.
  • the pass filter (37) extracts the sum or difference frequency component from the output of the demodulation mixer (36) as a correlation despread result, and the FM demodulator (38) outputs the demodulation bandpass filter (37). In the correlation despreading result, the demodulation recovers the restored sample of the baseband signal to be modulated.
  • the simplest form of modulation preprocessing is adopted, that is, the Chirp pulse carrier generated by the Chirp pulse carrier generating circuit (31) satisfies the required Chirp pulse carrier directly as a primary frequency modulated carrier (That is, the amplitude matching); and the demodulation preprocessing is a combination of the spectrum shifting process used in the modulation preprocessing and modulation processing to generate the amplitude required for demodulation, the sweeping law, and the starting position of the sweeping period all satisfy the FM/ Chirp demodulates the required local Chirp pulse carrier.
  • the Chirp pulse carrier output from the Chirp pulse carrier generating circuit (31) degenerates into a sinusoidal carrier
  • the half-duplex FM/Chirp modulator/demodulator degenerates into a half-duplex FM modulator/demodulator.
  • a half-duplex FM/Chirp modulation/demodulator implemented according to the aforementioned half-duplex FM/Chirp modulation/demodulation method, by Chirp pulse carrier generating circuit (41), FM modulation circuit (42), modulation mixer (43), modulation bandpass filter (44), frequency multiplication and spectrum shifting circuit (45), single pole double throw switching circuit (46), demodulation mixer (47), demodulation bandpass filter (48) It is composed of an FM demodulator (49).
  • the working process is as follows:
  • the Chirp pulse carrier generation circuit (41) is selected to operate in the modulation mode or the demodulation mode, and the switching output port of the single-pole double-throw switching circuit (46) is selected; in the modulation mode, The Chirp pulse carrier generating circuit (41) generates a modulation Chirp pulse carrier as an input of the modulation mixer (43), and the FM modulation circuit (42) uses the FM modulated carrier obtained by FM modulation of the baseband signal to be modulated as Another input of the modulation mixer (43), the modulation bandpass filter (44) extracts the sum or difference frequency component from the output of the modulation mixer (43) and outputs it to the frequency multiplication and spectrum shifting circuit (45) The output of the frequency multiplication and spectrum shifting circuit (45) passes through the switching output of the single-pole double-throw switching circuit (35) as the transmitting intermediate frequency signal; in the demodulation mode, the demodulation basis generated by the Chirp pulse carrier generating circuit (41) The Chirp pulse carrier is
  • the path input, modulation bandpass filter (44) extracts the sum or difference frequency component from the output of the modulation mixer (43) and inputs it to the frequency multiplication and spectrum shifting circuit (45), the frequency multiplication and spectrum shifting circuit ( The output of 45) passes through the switching output of the single-pole double-throw switching circuit (46) as a local Chirp pulse carrier input to the demodulation mixer (47), and receives the intermediate frequency signal as another input of the demodulation mixer (47).
  • the simplest form of modulation preprocessing is adopted, that is, the Chirp pulse carrier generated by the Chirp pulse carrier generating circuit (41) satisfies the required Chirp pulse carrier as a primary frequency modulated carrier (That is, the amplitude matching); and the demodulation preprocessing is a combination of modulation preprocessing, spectrum shifting in the modulation processing, and frequency multiplication and spectrum shift processing in the frequency multiplication and spectrum shifting circuit (45) to generate demodulation.
  • the amplitude, sweep frequency, and start of the sweep period all satisfy the local Chirp pulse carrier required for FM/Chirp demodulation.
  • the Chirp pulse carrier output from the Chirp pulse carrier generation circuit (41) degenerates into a sinusoidal carrier
  • the half-duplex FM/Chirp modulator/demodulator degenerates into a half-duplex FM modulator/demodulator.
  • the working process is as follows:
  • the Chirp pulse carrier generating circuit (51) is selected to operate in the modulation mode or the demodulation mode, and the switching output port of the single-pole double-throw switching circuit (52) is selected; in the modulation mode, The modulated Chirp pulse carrier generated by the Chirp pulse carrier generating circuit (51) passes through the switching output of the single-pole double-throw switching circuit (52) as one input of the modulation mixer (54), and the FM modulation circuit (53) baseband to be modulated
  • the FM self-adjusting carrier obtained by FM modulation is used as the other input of the modulation mixer (54), and the modulation bandpass filter (55) extracts the sum or difference frequency from the output of the modulation mixer (54).
  • the component is used as the transmission intermediate frequency signal; in the demodulation mode, the demodulation base Chirp pulse carrier generated by the Chirp pulse carrier generation circuit (51) is switched to the demodulation frequency multiplier by the switching of the single-pole double-throw switching circuit (52) (56)
  • the output of the demodulation multiplier (56) is input to the local Chirp pulse carrier of the demodulation mixer (57), and the intermediate frequency signal is received as a demodulation mixing
  • the demodulation bandpass filter (58) extracts the sum or difference frequency component from the output of the demodulation mixer (57) as a correlation despread result, FM demodulator (59)
  • the demodulation recovers the restored samples of the baseband signal to be modulated from the correlated despreading results output by the demodulation bandpass filter (58).
  • the Chirp pulse carrier generating circuit (51) outputs a Chirp pulse carrier whose amplitude meets the requirements through a single-pole double-throw switching circuit ( 52) switching as a primary frequency modulated carrier (ie amplitude matching) at the time of modulation; and demodulation preprocessing is a combination of modulation preprocessing and frequency doubling processing in the frequency multiplying circuit (56) to generate demodulation
  • the amplitude, sweep frequency, and start of the sweep period all satisfy the local Chirp pulse carrier required for FM/Chirp demodulation.
  • the Chirp pulse carrier output from the Chirp pulse carrier generating circuit (51) degenerates into a sinusoidal carrier
  • the half-duplex FM/Chirp modulator/demodulator degenerates into a half-duplex FM modulator/demodulator.
  • a half-duplex FM/S-Chirp modulator/demodulator implemented according to the aforementioned half-duplex FM/Chirp modulation/demodulation method, by an adder (61), a DDS circuit (62), and a DAC circuit (63) Single-pole double-throw switching circuit (64), The hatching, frequency, incubator and source (66) and FM demodulator (67) are composed.
  • the selection adder (61) operates in the modulation mode or the demodulation mode, and simultaneously selects the switching output port of the single-pole double-throw switching circuit (64);
  • the adder (61) outputs a modulation frequency tuning word (F7 F r ), which is the frequency tuning intermediate value (layer ⁇ ) in the modulation mode, and the sweep frequency in the modulation mode.
  • the tuning word iFTW t) and the frequency modulation frequency tuning word FTWar (tj) are added together; the DDS circuit (62) generates a corresponding amplitude value of the modulation carrier waveform according to the modulation frequency tuning word FTWj output by the adder (61).
  • the sequence, DAC circuit (63) generates a corresponding FM/S-Chirp modulated carrier according to the amplitude sequence of the modulation carrier waveform outputted by the DDS circuit (62), and the transmitted FM/S-Chirp of the DAC circuit (63) outputs
  • the switched output of the modulated carrier through the single-pole double-throw switching circuit (64) is used as the transmission intermediate frequency signal; in the demodulation mode, the adder (61) outputs the demodulation frequency tuning word (/ ⁇ ⁇ ), the demodulation frequency tuning word FTW R) mode by a demodulator
  • the intermediate frequency tuning value (FTW 0R, swept frequency tuning word in the demodulation mode FTW ⁇ (th value of the frequency modulation and frequency tuning word FTW n a fixed value) is obtained by adding; the DDS circuit (62) generating a corresponding amplitude value sequence of the demodulation carrier waveform according to the demodulation frequency tuning word (FTWR) output from the adder (61), and the DAC circuit
  • the amplitude value sequence of the carrier waveform generates a corresponding demodulation base carrier, and the demodulation base carrier output by the DAC circuit (63) is switched to the demodulation mixer via the switching output of the single-pole double-throw switching circuit (64).
  • the local Chirp carrier, the receive intermediate frequency is used as the other input of the demodulation mixer (65), and the demodulation bandpass filter (66) extracts the sum or frequency from the output of the demodulation mixer (65)
  • the FM demodulator (67) demodulates and recovers the restored samples of the baseband signal to be modulated from the correlated despreading results output by the demodulation bandpass filter (66).
  • the primary frequency modulation carrier generation and secondary frequency modulation processes are common to the adder (61), the DDS circuit (62), and the DAC circuit (63).
  • the modulation preprocessing is the most simplified (dark with amplitude matching processing), and the demodulation preprocessing is to generate the amplitude, sweep frequency and sweep cycle start required for demodulation in a special modulation state.
  • Local Chirp pulse carriers that meet the FM/Chirp demodulation requirements.
  • the adder (61) selects the corresponding sweep frequency tuning word (FTW (t), frequency tuning intermediate value (FTW 0 ) and frequency modulation frequency tuning word (FTW a). (tj);
  • the half-duplex FM/S-Chirp modulation is performed when the sweep frequency tuning word FTW ( ) in the modulation mode and the sweep frequency tuning word (FTW P s (tj) in the demodulation mode are equal to 0)
  • the demodulator is degraded into a half-duplex FM modulator/demodulator.
  • the single-pole double-throw switching circuit (74), the demodulation multiplier (75), the demodulation mixer (76), the demodulation bandpass filter (77), and the FM demodulator (78) are formed.
  • the working process is as follows:
  • the selection adder (71) operates in the modulation mode or the demodulation mode, and simultaneously selects the switching output port of the single-pole double-throw switching circuit (74); in the modulation mode, adds (71) outputs a modulation frequency tuning word FTW T , the modulation frequency tuning word (FTW T ) is tuned by the frequency in the modulation mode I.
  • frequency modulation frequency tuning word (FTW QT (t is obtained by adding; DDS circuit (72) is modulated according to the output of the adder (71) Frequency tuning word (generating the amplitude sequence of the corresponding modulation carrier waveform, the DAC circuit (73) generates a corresponding transmission FM/S-Chirp according to the amplitude value sequence of the modulation carrier waveform output by the DDS circuit (72) The carrier, the DAC circuit (73) outputs the output FM/S-Chirp modulated carrier through the switching output of the single-pole double-throw switching circuit (74) as the transmitting intermediate frequency signal; in the demodulation mode, the adder (71) outputs the demodulated Frequency tuning word
  • the demodulation frequency tuning word FTW R is the frequency tuning intermediate value FTJV 0R in the demodulation mode, the sweep frequency tuning word FTW ⁇ in the demodulation mode (t and the frequency modulation frequency taking a fixed value
  • the tuning word (FTW QR ) is obtained by adding; the DDS circuit (72) generates a corresponding amplitude value sequence of the demodulation carrier waveform according to the demodulation frequency tuning word (F1W R ) output by the adder (71), the DAC
  • the circuit (73) generates a corresponding demodulation base carrier according to the amplitude value sequence of the demodulation carrier waveform outputted by the DDS circuit (72), and the demodulation base carrier output by the DAC circuit (73) passes through the single-pole double-throw switching circuit ( 74) Switching the output to the demodulation multiplier (75), the output of the demodulation multiplier (75) is input to the local Chirp carrier of the demodulation mixer (76), and the intermediate frequency signal is received as
  • the primary frequency modulated carrier generation and secondary frequency modulation processes are common to the adder (71), the DDS circuit (72), and the DAC circuit (73).
  • the modulation preprocessing is the most simplified (dark with amplitude matching processing), and the demodulation preprocessing is required to generate demodulation by a combination of a special modulation state and frequency multiplier processing of the frequency multiplier (75).
  • the amplitude, sweep frequency, and start of the sweep period all satisfy the local Chirp pulse carrier required for FM/Chirp demodulation.
  • the adder (71) selects the corresponding swept frequency tuning word FTW (t)), the frequency tuning intermediate value FTW 0 and the frequency modulation frequency tuning word (FTWn (tj);
  • the sweep frequency tuning word iFTW ⁇ ) in the modulation mode and the sweep frequency tuning word FTW ⁇ (tj) in the demodulation mode are both equal to 0, the half-duplex FM/S-Chirp modulator/demodulator Degenerate into a half-duplex FM modulator/demodulator.
  • a half-duplex FM/S-Chirp modulation/demodulator implemented according to the aforementioned half-duplex FM/Chirp modulation/demodulation method which is composed of an adder (81), a DDS circuit (82), and a DAC circuit (83)
  • the multiplier and spectrum shifting circuit (84), the single-pole double-throw switching circuit (85), the demodulation mixer (86), the demodulation bandpass filter (87), and the FM demodulator (88) are formed.
  • the working process is as follows:
  • the selection adder (81) operates in the modulation mode or the demodulation mode, and simultaneously selects the switching output port of the single-pole double-throw switching circuit (85); in the modulation mode, adds (81) Output modulation frequency tuning word (F7W T ), the modulation frequency tuning word (F7 F r ) is the frequency tuning intermediate value FTW 0 in the modulation mode, and the sweep frequency tuning word in the modulation mode (H ⁇ r ( t), the frequency modulation frequency tuning word ⁇ FTW QT (tj) is obtained by adding; the DDS circuit (82) is based on the modulation frequency of the adder (81) to tune the word FTW T > to generate a corresponding modulation carrier waveform
  • the amplitude value sequence, the DAC circuit (83) generates a corresponding transmission FM/S-Chirp according to the amplitude value sequence of the modulation carrier waveform output by the DDS circuit (82).
  • the amplitude value sequence of the carrier waveform is called to generate a corresponding baseband for demodulation, and the baseband for demodulation output by the DAC circuit (83) is used as an input signal of the frequency multiplication and spectrum shifting circuit (84), and the frequency multiplication and spectrum shifting circuit
  • the output of (84) is switched by the single-pole double-throw switching circuit (85).
  • the intermediate frequency signal is received as the other input of the demodulation mixer (86), and the demodulation bandpass filter (87) is used from the demodulation mixer (86).
  • the sum or difference frequency component is extracted as the correlation despreading result, and the FM demodulator (88) demodulates and recovers the baseband signal to be modulated from the correlated despreading result outputted by the demodulation bandpass filter (87) Restore the sample.
  • the primary frequency modulated carrier generation and secondary frequency modulation processes are common to the adder (81), the DDS circuit (82), and the DAC circuit (83).
  • the modulation preprocessing is the most simplified (dark with amplitude matching processing)
  • the demodulation preprocessing is a combination of frequency modulation and spectrum shift processing in a special modulation state and frequency multiplication and spectrum shifting circuit (84).
  • the adder (81) selects the corresponding swept frequency tuning word (FTW, frequency tuning intermediate value (F7W 0 ) and frequency modulation frequency tuning word (FTW. (t), ', half-duplex FM/S-Chirp modulation/solution when the sweep frequency tuning word ⁇ ⁇ in modulation mode (tj and the sweep frequency tuning word iFTW ⁇ (tj) in demodulation mode are both equal to 0
  • the modulator degenerates into a half-duplex FM modulator/demodulator.
  • the half-duplex FM/Chirp modulation/demodulation method provided by the invention fully utilizes the characteristics of the half-duplex communication mode, realizes FM/Chirp modulation/demodulation by sharing a Chirp pulse carrier generation circuit, and is compatible with the implementation.
  • Half-duplex FM modulation/demodulation; multiple implementation devices constructed according to the half-duplex FM/Chirp modulation/demodulation method provided in the present invention can meet a variety of different application requirements, and are compatible with FM modulation and Used in FM/Chirp modulated half-duplex communication equipment.
  • FIG. 1 shows an implementation model of a half-duplex FM/Chirp modulation/demodulation method provided by the present invention.
  • 11 is Chirp pulse carrier generation circuit
  • 12 is single-pole double-throw switching circuit
  • 13 is modulation pre-processing circuit
  • 14 is secondary frequency modulation circuit
  • 15 is demodulation pre-processing circuit
  • 16 is demodulation mixer
  • 17 It is a bandpass filter
  • 18 is a frequency demodulator.
  • Figure 2 shows the first half-duplex FM/Chirp modulation/demodulator provided simultaneously in the present invention.
  • 21 is Chirp pulse carrier generation circuit
  • 22 is single-pole double-throw switching circuit
  • 23 is FM modulation circuit
  • 24 is modulation mixer
  • 25 is modulation band-pass filter
  • 26 is demodulation mixer
  • 27 is solution Bandpass filter
  • 28 is FM ⁇ adjust the benefits.
  • Figure 3 shows a second half-duplex FM/Chirp modulator/demodulator provided simultaneously in the present invention.
  • 31 is the Chirp pulse carrier generation circuit
  • 32 is the FM modulation circuit
  • 33 is the modulation mixer
  • 34 is the modulation bandpass filter
  • 35 is the single-pole double-throw switching circuit
  • 36 is the demodulation mixer
  • 37 is the solution The bandpass filter
  • 38 is the FM demodulator.
  • Figure 4 shows a third half-duplex FM/Chirp modulator/demodulator provided simultaneously in the present invention.
  • 41 is Chirp pulse carrier generation circuit
  • 42 is FM modulation circuit
  • 43 is modulation mixer
  • 44 is modulation bandpass filter
  • 45 is frequency multiplication and spectrum shifting circuit
  • 46 is single pole double throw switching circuit
  • 47 is Demodulation mixer
  • 48 is a demodulation bandpass filter
  • 49 is an FM demodulator.
  • Figure 5 shows a fourth half-duplex FM/Chirp modulator/demodulator provided simultaneously in the present invention.
  • 51 is Chirp pulse carrier generation circuit
  • 52 is single-pole double-throw switching circuit
  • 53 is FM modulation circuit
  • 54 is modulation mixer
  • 55 is modulation band-pass filter
  • 56 is demodulation frequency multiplier
  • 57 is solution The mixer is tuned
  • 58 is a demodulation bandpass filter
  • 59 is an FM demodulator.
  • Figure 6 shows the first half-duplex FM/S-Chirp modulator/demodulator provided simultaneously in the present invention.
  • 61 is an adder
  • 62 is a DDS circuit
  • 63 is a DAC circuit
  • 64 is a single-pole double-throw switching circuit
  • 65 is a demodulation mixer
  • 66 is a demodulation band-pass filter
  • 67 is an FM demodulator.
  • Figure 7 shows a second half-duplex FM/S-Chirp modulator/demodulator provided simultaneously in the present invention.
  • 71 is the adder
  • 72 is the DDS circuit
  • 73 is the DAC circuit
  • 74 is the single-pole double-throw switching circuit
  • 75 is the demodulation frequency multiplier
  • 76 is the demodulation mixer
  • 77 is the demodulation band-pass filter
  • 78 is an FM demodulator.
  • Figure 8 shows a third half-duplex FM/S-Chirp modulator/demodulator provided simultaneously in the present invention.
  • 81 is the adder
  • 82 is the DDS circuit
  • 83 is the DAC circuit
  • 84 is the frequency multiplication and spectrum shifting circuit
  • 85 is the single pole double throw switching circuit
  • 86 is the demodulation mixer
  • 87 is the demodulation bandpass filtering
  • 88 is an FM demodulator.
  • This embodiment is for explaining the implementation process of the half-duplex FM/Chirp modulation/demodulation method provided by the present invention.
  • the implementation process of the half-duplex FM/Chirp modulation/demodulation method is as follows:
  • the Chirp pulse carrier generation circuit (11) is selected to operate in the modulation mode or the demodulation mode, and the switching output port of the single-pole double-throw switching circuit (12) is selected; in the modulation mode, The modulated Chirp pulse carrier generated by the Chirp pulse carrier generating circuit (11) is outputted to the modulation pre-processing circuit (13) through the switching of the single-pole double-throw switching circuit (12), and the secondary frequency modulation circuit (14) transmits the baseband signal to be modulated.
  • the Chirp pulse carrier is generated.
  • the demodulation base Chirp pulse carrier generated by the circuit (11) is outputted to the demodulation preprocessing circuit (15) through the switching of the single-pole double-throw switching circuit (12), and the demodulation pre-processing circuit (15) outputs the amplitude required for demodulation.
  • the local frequency Chirp pulse carrier that meets the FM/Chirp demodulation requirements, the sweep frequency and the start of the sweep period, and the demodulation mixer (16) will demodulate Local Chirp pulse carrier (15) and an output processing circuit receiving Mr ivi/ ⁇ ⁇ ⁇ » ⁇ 3 ⁇ 43 ⁇ 4, ⁇ U7 Extracts the sum or difference frequency component from the output of the fresh mixer (16) as the relevant despreading result, frequency solution
  • the modulator (18) demodulates and recovers the restored samples of the baseband signal to be modulated from the correlated despreading results output by the bandpass filter (17).
  • the signal generation and processing in this embodiment can be implemented by an actual hardware circuit or by a combination of a software algorithm and hardware.
  • This embodiment is for explaining the implementation process of the first half-duplex FM/Chirp modulator/demodulator provided by the present invention, and adopts a half-duplex FM/Chirp modulation/demodulator as shown in FIG. 2.
  • the implementation process is as described in the foregoing section, and the description of the modulator/demodulator is not repeated here.
  • the half-duplex FM/Chirp modulation/demodulator works in the modulation mode when the demodulation part of the circuit does not work, and the modulation part of the circuit does not work when operating in the demodulation mode, and the modulation pre-processing and demodulation pre- The processing is also the most simplified (amplitude matching), so it has the characteristics of low power consumption and simple composition.
  • the half-duplex FM/Chirp modulator/demodulator if the Chirp pulse carrier generating circuit (21) employs a DDS circuit, the half-duplex FM/Chirp modulator/demodulator is particularly suitable for transmitting intermediate frequency and The frequency of the receiving intermediate frequency is low but the transmitting intermediate frequency is significantly higher than the receiving intermediate frequency.
  • the transmission intermediate frequency signal with a center frequency of 30MHz can be obtained by extracting the sum frequency component in the mixed output during the secondary frequency modulation process, and the local carrier with the center frequency of 10.245MHz is used for demodulation mixing.
  • the center frequency of the relevant despreading result is 455 KHz, which is convenient for compatibility with the existing half-duplex communication equipment of the narrowband FM system using the 25K/12.5 KHZ carrier channel bandwidth and the 455 KHz demodulation intermediate frequency.
  • This embodiment is for explaining the implementation process of the second half-duplex FM/Chirp modulation/demodulator provided by the present invention, and adopts a half-duplex FM/Chirp modulation/demodulator as shown in FIG.
  • the implementation process is as described in the foregoing section, and the description of the modulator/demodulator is not repeated here.
  • the half-duplex FM/Chirp modulation/demodulator although basically the same as the second half-duplex FM/Chirp modulation/demodulator, has the most simplified modulation preprocessing (amplitude matching), and works in demodulation mode.
  • the circuit of the modulation section still needs to work, so its composition is simple, but the power consumption during demodulation is greater than that of the first half-duplex FM/Chirp modulator/demodulator.
  • the half-duplex FM/Chirp modulation/demodulator since the center frequency of the transmission intermediate frequency and the local carrier for demodulation can be improved by using the mixing extraction and frequency components in the modulation process, the half-duplex FM/Chirp modulation/ The demodulator is adapted to be used when the frequency of the transmit intermediate frequency is high and the center frequency is not much different.
  • the center frequency of the Chirp pulse carrier output by the Chirp pulse carrier generating circuit (31) is 10 MHz
  • the center frequency of the FM modulated carrier output by the FM modulation circuit (32) is 20 MHz, and the modulation is performed in the secondary frequency modulation process.
  • This embodiment is used to explain the implementation process of the third half-duplex FM/Chirp modulation/demodulator provided by the present invention.
  • 7K j 1 ⁇ 4u corpse / r not tj thousand ⁇ ⁇ FM / ⁇ ⁇ adjust the city / hatch adjustment benefits.
  • the head of the military is now 3: The description of the modulator/demodulator is also not repeated here.
  • the half-duplex FM/Chirp modulation/demodulator adds a frequency doubling and spectrum shifting circuit (45) to the second half-duplex FM/Chirp modulation/demodulator, and the modulation preprocessing is simplified (amplitude) Matching), the circuit of the modulation part still needs to work when working in demodulation mode, so its composition is more complicated, and the power consumption during demodulation will be better than that of the first and second half-duplex FM/Chirp modulation/demodulators.
  • the power consumption during demodulation is large.
  • the frequency offset and the spectrum shifting can be performed by the frequency multiplication and spectrum shift processing in the frequency multiplication and spectrum shifting circuit (45), it is suitable for transmitting and receiving.
  • the frequency of the IF is high or the carrier channel bandwidth is large.
  • the center frequency of the Chirp pulse carrier output by the Chirp pulse carrier generating circuit (41) is 10 MHz
  • the center frequency of the FM modulated carrier output by the FM modulation circuit (42) is 15 MHz, and the modulation is performed in the secondary frequency modulation process.
  • the center frequency of the sum frequency component in the mixed output at around 25 MHz, after 3 times the frequency, the frequency offset is extended by 3 times, the center frequency is also increased by 3 times, and after the spectrum shifting, the center frequency can be supported at 150-500 MHz.
  • the transmit intermediate frequency and the receive intermediate frequency since the frequency multiplication and spectrum shifting circuit (45) can also implement spectrum shifting at different positions according to the needs of modulation and demodulation, the half-duplex FM/Chirp modulation/demodulator is also suitable for transmitting and receiving intermediate frequency frequencies. Use when the height is high and the center frequency is large.
  • This embodiment is for explaining the implementation process of the fourth half-duplex FM/Chirp modulator/demodulator provided by the present invention, and adopts a half-duplex FM/Chirp modulation/demodulator as shown in FIG.
  • the implementation process is as described in the foregoing section, and the description of the modulator/demodulator is not repeated here.
  • the half-duplex FM/Chirp modulation/demodulator works in the modulation mode when the demodulation part of the circuit does not work, and the circuit of the modulation part does not work when operating in the demodulation mode, and the modulation preprocessing is simplified (ie, the amplitude Matching), the demodulation preprocessing is also relatively simple, so it also has the characteristics of low power consumption and simple composition. If the Chirp pulse carrier generating circuit (51) employs a DDS circuit, the half-duplex FM/Chirp modulation/demodulator is particularly suitable for both the transmitting intermediate frequency and the receiving intermediate frequency, but the receiving intermediate frequency and the transmitting intermediate frequency are present. Use in case of large differences.
  • the transmission intermediate frequency is 35MHz and the reception intermediate frequency is 45MHz, it is difficult to share the same modulation band pass filter (55); if the Chirp pulse carrier generation circuit (51) outputs the Chirp pulse carrier, the center frequency is about 15MHz, and FM modulation The center frequency of the FM modulated carrier outputted by the circuit (53) is 20 MHz, and the transmission intermediate frequency signal with a center frequency of 35 MHz can be obtained by extracting the sum frequency component in the mixed output during the secondary frequency modulation process.
  • the local Chirp pulse carrier with the center frequency of 44.545MHz or 45.455MHz is obtained by the triple frequency processing of the demodulation frequency multiplier (56), and the center frequency of the relevant despreading result is 455KHz, which is convenient to implement.
  • the existing half-duplex communication equipment of the narrowband FM system adopting the 25K/12.5KHZ carrier channel bandwidth and the 455KHz demodulation intermediate frequency is compatible.
  • This embodiment is for explaining the implementation process of the first half-duplex FM/S-Chirp modulator/demodulator provided by the present invention, and adopts a half-duplex FM/S-Chirp modulation/demodulator as shown in FIG. .
  • the implementation process is as described in the foregoing section for the modulator/demodulator and will not be repeated here.
  • the half-duplex FM/S-Chirp modulation/demodulator works in modulation mode, primary frequency modulation and secondary frequency ⁇ ⁇ ,"
  • the local carrier required for demodulation is generated in a special secondary frequency modulation state, and the demodulation preprocessing is also the most simplified, so the power consumption is lower than the first type.
  • the half-duplex FM/Chirp modulation/demodulator is smaller and its composition is simpler than the first half-duplex FM/Chirp modulation/demodulator.
  • the S-Chirp pulse carrier is generated by the DDS circuit (62), it is suitable for use in the case where the frequencies of the intermediate frequency and the received intermediate frequency are both low, and it is convenient to adapt to the case where there is a large difference between the received intermediate frequency and the transmitted intermediate frequency.
  • DDS circuit (62) directly outputs the transmission intermediate frequency with the center frequency around 10MHz in the modulation mode.
  • the local carrier with the center frequency around 6MHz can support 6.5.
  • This embodiment is for explaining the implementation process of the second half-duplex FM/S-Chirp modulator/demodulator provided by the present invention, and adopts the half-duplex FM/S-Chirp modulation/demodulator as shown in FIG. .
  • the implementation process is as described in the foregoing section for the modulator/demodulator and will not be repeated here.
  • the half-duplex FM/S-Chirp modulation/demodulator works in the modulation mode, and the primary frequency modulation and the secondary frequency modulation are simultaneously implemented and share the same circuit, and the modulation preprocessing is simplified (the amplitude matching processing is dark in the modulation process).
  • the local carrier required for demodulation is generated in a special secondary frequency modulation state, and the demodulation preprocessing is simplified; the power consumption during modulation and the first half-duplex FM/S- The Chirp modulation/demodulator is the same, and the power consumption during demodulation is greater than that of the first half-duplex FM/S-Chirp modulator/demodulator, and its composition is also simple.
  • the DDS circuit (72) outputs a carrier with a center frequency of about 10 MHz, directly supports a transmission intermediate frequency of about 10 MHz, and supports a receiving intermediate frequency of about 20 MHz or 30 MHz by 2 or 3 times.
  • This embodiment is for explaining the implementation process of the third half-duplex FM/S-Chirp modulator/demodulator provided by the present invention, and adopts the half-duplex FM/S-Chirp modulation/demodulator as shown in FIG. .
  • the implementation process is as described in the foregoing section for the modulator/demodulator and will not be repeated here.
  • the half-duplex FM/Chirp modulation/demodulator adds a frequency doubling and spectrum shifting circuit (84) to the second half-duplex FM/S-Chirp modulation/demodulator, and the modulation preprocessing is simplified ( In the modulation process, the amplitude matching is implicitly included.
  • the circuit of the modulation part still needs to work. Therefore, the composition is complicated, and the power consumption during demodulation is higher than that of the first and second half-duplex FM/ The power consumption of the S-Chirp modulator/demodulator is large.
  • the frequency offset and the spectrum shift can be extended by the frequency multiplication and spectrum shift processing in the frequency multiplication and spectrum shift circuit (84), it is suitable for Used when the frequency of the transmit/receive intermediate frequency is high or the carrier channel bandwidth is large.
  • the center frequency of the carrier output by the DDS circuit (82) is about 10MHz. After 3 times of frequency, the frequency offset is extended by 3 times, the center frequency is also increased by 3 times, and after the spectrum shift, the center frequency is supported at 150-500MHZ.
  • the transmit intermediate frequency and the receive intermediate frequency is supported at 150-500MHZ.
  • the half-duplex FM/S-Chirp modulation/demodulator is also suitable for transmitting and receiving intermediate frequencies. Use when the frequency is high and the center frequency is large.

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Description

半双工 FM/Chirp调制 /解调方法及装置 技术领域
本发明涉及一种半双工 FM/Chirp调制 /解调方法及其实现装置, 属于通信领域。 背景技术
半双工方式是指能收亦能发, 但收发不同时工作的通信工作方式。 以半双工方式 工作的典型通信设备是对讲机; 在采用 FM调制的对讲机中, 半双工 FM调制 /解调器 正好与对讲机所采用的 PTT (Push To Talk) 工作方式相适应。
Chirp调制又称扫频调制,是通过控制正弦载波的频率随时间按特定规律作大范围 单调变化而形成的一种扩频调制方式,仍属于频率调制类型; Chirp调制是以扫频周期 为时间长度单元重复进行的, 经 Chirp调制后的己调载波也被称作 Chirp脉冲载波。 Chirp 脉冲载波具有与直接序列 (DS) 扩频调制载波类似的扩频抗干扰特性, 按线性 规律扫频时还具有近似矩形的功率谱形状。 Chirp调制主要应用于线性调频脉冲压缩雷 达中, 也可以通过对 Chirp脉冲载波的幅度、 扫频规律、 扫频周期初始处的载波相位 等参数的调制来进行通信。受限于 Chirp脉冲载波产生和解调所采用声表面波(SAW) 器件的物理结构, 传统的 Chirp调制难以满足通信中对扫频规律的数量要求。
近年来, 随着数字频率合成 (DDS) 技术的成熟, 可以方便地产生载波频率步进 式(Stepping)变化的 Chirp脉冲载波。 为了便于区分, 将载波频率连续(Continuous) 变化的 Chirp脉冲载波称作 C-Chirp脉冲载波, 将载波频率步进式 (Stepping) 变化的 Chirp脉冲载波称作 S-Chirp脉冲载波。与传统的 C-Chirp脉冲载波相比, S-Chirp脉冲 载波便于采用数字频率合成技术来产生, 便于获得多种具有不同扫频规律的 S-Chirp 脉冲载波, 还可以方便地对扫频规律参数进行调整。
FM/Chirp调制是一种通过对 Chirp脉冲载波进行二次频率调制(FM)而形成的复 合频率调制方式,按 FM/Chirp调制方式产生的已调载波也被称作 FM/Chirp已调载波。 根据所使用 Chirp脉冲载波类型的不同, 可以将 FM/Chirp调制分成 FM/C-Chirp和 FM/S-Chirp两大类; 根据二次频率调制类型的不同, FM/Chirp调制还可分成模拟线性 FM/C-Chirp, 模拟线性 FM/S-Chirp、 FFSK/C-Chirp, FFSK/S-Chirp> 4FSK/C-Chirp、 4FSK/S-Chirp> GMSK/C-Chirp、 GMSK/S-Chirp 等多个子类。 为了避免含义的混淆, 在后续的描述中, 单独使用 Chirp—词时意指 C-Chirp和 S-Chirp, 单独使用 FM—词 时意指可能使用的模拟或数字频率调制方式。
FM/Chirp调制方式的调制过程有两类实现方法: 第一类调制方法是将 FM已调载 波与 Chirp脉冲载波进行混频, 提取混频输出中的和频或差频分量作为用作通信信号 的 FM/Chirp已调载波; 第二类调制方法是采用一个直接数字合成(DDS) 电路, 通过 控制其频率调谐字的变化规律来直接产生用作通信信号的 FM/S-Chirp 己调载波。 FM/Chirp调制方式的解调过程是采用一路本地 Chirp脉冲载波与接收到的 FM/Chirp 已调载波进行混频来实现相关解扩, 采用 FM解调处理从相关解扩结果中恢复出待调 制基带信号的还原样本。 仕 M/ urp调市 !J干, 作刃一次频卒调制载汲便用的 Chirp脉沖载波的扫频带宽 为 0时, FM/Chirp调制就退化成了 FM调制, 因此 FM/Chirp调制便于兼容实现 FM 调制。 FM/Chirp已调载波仍是恒包络的频率调制载波, 可以与 FM调制的已调载波共 用相同的 C类射频功率放大器, 加之还可以 (部份地) 沿用 FM调制方式的调制器和 解调器, 因此 FM/Chirp调制便于实现与 FM调制方式在调制器、解调器和射频功率放 大器这 3个方面的同时兼容。
如果将 FM/Chirp 调制方式应用于如对讲机之类的以半双工方式工作的通信设备 中, 也需要使用相应的按半双工方式工作的 FM/Chirp调制 /解调器。
发明内容
本发明要解决的第一个问题是提供一种半双工 FM/Chirp调制 /解调方法, 用于以 半双工方式实现 FM/Chirp调制方式的调制和解调;本发明要解决的第二个问题是提供 根据上述半双工 FM/Chirp调制 /解调方法实现四种半双工 FM/Chirp调制 /解调器和三种 半双工 FM/S-Chirp调制 /解调器, 用于满足不同的应用需求。
为了解决上述问题, 先提供一种半双工 FM/Chirp调制 /解调方法, 然后提供根据 该半双工 FM/Chirp调制 /解调方法实现的四种半双工 FM/Chirp调制 /解调器和三种半双 工 FM/S-Chirp调制 /解调器,并通过相应的实施例对该半双工 FM/Chirp调制 /解调方法 及其实现装置的工作过程及用途作进一步的说明。
(一)半双工 FM/Chirp调制 /解调方法
一种半双工 FM/Chirp调制 /解调方法, 其内容是: 釆用一个有调制模式和解调模 式两种工作模式的 Chirp脉冲载波产生电路;在调制模式下,通过对 Chirp脉冲载波产 生电路输出的调制用基础 Chirp脉冲载波进行调制预处理来获得调制所需的一次频率 调制载波, 用待调制基带信号对一次频率调制载波进行二次频率调制并将所获得的 FM/Chirp己调载波作为通信信号; 在解调模式下, 通过对 Chirp脉冲载波产生电路输 出的解调用基础 Chirp脉冲载波的解调预处理来获得解调所需的本地 Chirp脉冲载波, 将本地 Chirp脉冲载波与接收到的 FM/Chirp已调载波进行混频,提取混频输出中的和 频或差频分量作为相关解扩结果, 采用与二次频率调制所对应类型的频率调制方式的 频率解调处理, 从相关解扩结果中解调恢复出待调制基带信号的还原样本。
在上述半双工 FM/Chirp调制 /解调方法中, 调制预处理有幅度匹配、 倍频和频谱 搬移三种基本类型和由这三种基本类型组合而形成的复合类型; 类似的, 解调预处理 也有幅度匹配、 倍频和频谱搬移三种基本类型和由这三种基本类型组合而形成的复合 类型。 为了实现 FM/Chirp解调, 将 Chirp脉冲载波产生电路输出的解调用基础 Chirp 脉冲载波进行解调预处理, 所获得的本地 Chirp脉冲载波的幅度、 扫频规律和扫频周 期起始位置应满足 FM/Chirp解调要求。 如果 Chirp脉冲载波产生电路输出的 Chirp脉 冲载波退化为正弦波, 则该调制 /解调方法也可兼容实现半双工 FM调制 /解调。
在上述半双工 FM/Chirp调制 /解调方法中, 调制预处理和解调预处理的最简形式 是将 Chirp脉冲载波产生电路输出的幅度满足要求的 Chirp脉冲载波通过切换分别提供 给调制和解调使用(即共用或分别使用幅度匹配处理); 调制预处理和解调预处理的复 泶形 ¾是将 Chirp脉 载汲产生电路湔出的 Chirp脉冲载波通过切换分别提供给相应的 预处理过程或预处理电路; 为了简化半双工 FM/Chirp调制 /解调实现装置的组成, 可 以利用调制和解调不同时进行的特点, 解调预处理可以与调制预处理共用部份的预处 理过程或预处理电路, 或组合使用调制预处理和调制处理来实现解调预处理。
根据调制预处理和解调预处理实现方式的不同, 可以构建多种类型的半双工 FM/Chirp调制 /解调器。
(二)第一种半双工 FM/Chirp调制 /解调器
一种根据上述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/Chirp调制 /解调 器, 由 Chirp脉冲载波产生电路(21 )、 单刀双掷切换电路(22)、 FM调制电路 (23 )、 调制混频器 (24)、 调制带通滤波器 (25 )、 解调混频器 (26)、 解调带通滤波器 (27) 和 FM解调器 (28) 组成。 其工作过程如下:
根据收发控制信号的高 /低电平状态, 选择 Chirp脉冲载波产生电路 (21 ) 工作于 调制模式或解调模式, 同时选择单刀双掷切换电路 (22) 的切换输出端口; 在调制模 式下, Chirp脉冲载波产生电路(21 )产生的调制用基础 Chirp脉冲载波经过单刀双掷 切换电路 (22) 的切换输出作为调制混频器 (24) 的一路输入, FM 调制电路 (23 ) 将待调制基带信号进行 FM调制所获得的 FM已调载波作为调制混频器 (24) 的另一 路输入, 调制带通滤波器 (25 ) 从调制混频器 (24) 的输出中提取出和频或差频分量 作为发送中频信号; 在解调模式下, Chirp脉冲载波产生电路(21 )产生的解调用基础 Chirp脉冲载波经单刀双掷切换电路(22 )的切换输出作为输入至解调混频器(26)的 本地 Chirp脉冲载波, 接收中频信号作为解调混频器 (24) 的另一路输入, 解调带通 滤波器(27)从解调混频器(26)的输出中提取出和频或差频分量作为相关解扩结果, FM解调器 (28) 从解调带通滤波器 (27) 输出的相关解扩结果中解调恢复出待调制 基带信号的还原样本。
在该半双工 FM/Chirp调制 /解调器中, 其调制预处理和解调预处理采用的是最简 形式,即将 Chirp脉冲载波产生电路输出的 Chirp脉冲载波通过单刀双掷切换电路 (22) 的切换输出分别作为调制时所需的一次频率调制载波和解调时所需的幅度、 扫频规律 以及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波(在此过程中 调制预处理和解调预处理共用了幅度匹配处理)。 当 Chirp脉冲载波产生电路(21 )输 出的 Chirp脉冲载波退化为正弦载波时,该半双工 FM/Chirp调制 /解调器就退化成半双 工 FM调制 /解调器。
(三)第二种半双工 FM/Chirp调制 /解调器
一种根据前述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/Chirp调制 /解调 器, 由 Chirp脉冲载波产生电路 (31 )、 FM调制电路 (32)、 调制混频器 (33 )、 调制 带通滤波器(34)、 单刀双掷切换电路(35 )、解调混频器(36)、 解调带通滤波器(37) 和 FM解调器 (38) 组成。 其工作过程如下- 根据收发控制信号的高 /低电平状态, 选择 Chirp脉冲载波产生电路 (31 ) 工作于 调制模式或解调模式, 同时选择单刀双掷切换电路 (35 ) 的切换输出端口; 在调制模 , lrnp脉 载汲严 电蹐(31 )产生的调制用基础 Chirp脉冲载波作为调制混频 器 (33 ) 的一路输入信号, FM调制电路 (32) 将待调制基带信号进行 FM调制所获 得的 FM已调载波作为调制混频器 (33 ) 的另一路输入信号, 调制带通滤波器 (34) 从调制混频器 (33 ) 的输出中提取出和频或差频分量并经过单刀双掷切换电路 (35 ) 的切换输出作为发送中频信号; 在解调模式下, Chirp脉冲载波产生电路(31 )产生的 解调用基础 Chirp脉冲载波作为调制混频器(33 ) 的一路输入, FM调制电路(32 )输 出一路固定频率的正弦载波作为调制混频器(33 )的另一路输入,调制带通滤波器(34) 从调制混频器 (33 ) 的输出中提取出和频或差频分量并经过单刀双掷切换电路 (35 ) 的切换输出作为输入至解调混频器 (36) 的本地 Chirp脉冲载波, 接收中频信号作为 解调混频器 (36) 的另一路输入, 解调带通滤波器 (37) 从解调混频器 (36) 的输出 中提取出和频或差频分量作为相关解扩结果, FM解调器(38)从解调带通滤波器(37) 输出的相关解扩结果中解调恢复出待调制基带信号的还原样本。
在该半双工 FM/Chirp调制 /解调器中, 采用了最简形式的调制预处理, 即将 Chirp 脉冲载波产生电路 (31 ) 输出的幅度满足要求的 Chirp脉冲载波直接作为一次频率调 制载波(即幅度匹配); 而解调预处理则是组合使用了调制预处理和调制处理过程中的 频谱搬移处理来产生解调所需的幅度、 扫频规律以及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波。 当 Chirp脉冲载波产生电路 (31 ) 输出的 Chirp 脉冲载波退化为正弦载波时, 该半双工 FM/Chirp 调制 /解调器就退化成半双工 FM调制 /解调器。
(四) 第三种半双工 FM/Chirp调制 /解调器
一种根据前述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/Chirp调制 /解调 器, 由 Chirp脉冲载波产生电路 (41 )、 FM调制电路 (42)、 调制混频器 (43 )、 调制 带通滤波器(44)、 倍频与频谱搬移电路(45 )、 单刀双掷切换电路(46)、 解调混频器 (47)、 解调带通滤波器 (48) 和 FM解调器 (49) 组成。 其工作过程如下:
根据收发控制信号的高 /低电平状态, 选择 Chirp脉冲载波产生电路 (41 ) 工作于 调制模式或解调模式, 同时选择单刀双掷切换电路 (46) 的切换输出端口; 在调制模 式下, Chirp脉冲载波产生电路(41 )产生的调制用基础 Chirp脉冲载波作为调制混频 器 (43 ) 的一路输入, FM调制电路 (42) 将待调制基带信号进行 FM调制所获得的 FM 已调载波作为调制混频器 (43 ) 的另一路输入, 调制带通滤波器 (44) 从调制混 频器(43 )的输出中提取出和频或差频分量并输出至倍频与频谱搬移电路(45 ), 倍频 与频谱搬移电路 (45 ) 的输出经过单刀双掷切换电路 (35 ) 的切换输出作为发送中频 信号; 在解调模式下, Chirp脉冲载波产生电路(41 )产生的解调用基础 Chirp脉冲载 波作为调制混频器 (43 ) 的一路输入, FM调制电路 (42) 输出一路固定频率的正弦 载波作为调制混频器(43 ) 的另一路输入, 调制带通滤波器(44)从调制混频器(43 ) 的输出中提取出和频或差频分量并输入至倍频与频谱搬移电路(45 ),倍频与频谱搬移 电路(45 )的输出经过单刀双掷切换电路(46)的切换输出作为输入至解调混频器(47) 的本地 Chirp脉冲载波, 接收中频信号作为解调混频器 (47) 的另一路输入, 解调带 、奴 ^ mvsim ^ 4 / tr、j柳 ffi屮 j¾耿出和频 差频分重作为相夫解扩结 果, FM解调器 (49) 从解调带通滤波器 (48) 输出的相关解扩结果中解调恢复出待 调制基带信号的还原样本。
在该半双工 FM/Chirp调制 /解调器中, 采用了最简形式的调制预处理, 即将 Chirp 脉冲载波产生电路 (41 ) 输出的幅度满足要求的 Chirp脉冲载波直接作为一次频率调 制载波(即幅度匹配); 而解调预处理则是组合使用了调制预处理、调制处理中的频谱 搬移以及倍频与频谱搬移电路(45 )中的倍频与频谱搬移处理来产生解调所需的幅度、 扫频规律以及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波。当 Chirp 脉冲载波产生电路 (41 ) 输出的 Chirp 脉冲载波退化为正弦载波时, 该半双工 FM/Chirp调制 /解调器就退化成半双工 FM调制 /解调器。
(五)第四种半双工 FM/Chirp调制 /解调器
一种根据前述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/Chirp调制 /解调 器, 由 Chirp脉冲载波产生电路(51 )、 单刀双掷切换电路(52)、 FM调制电路(53 )、 调制混频器 (54)、 调制带通滤波器 (55 )、 解调倍频器 (56)、 解调混频器 (57)、 解 调带通滤波器 (58) 和 FM解调器 (59) 组成。 其工作过程如下:
根据收发控制信号的高 /低电平状态, 选择 Chirp脉冲载波产生电路 (51 ) 工作于 调制模式或解调模式, 同时选择单刀双掷切换电路 (52) 的切换输出端口; 在调制模 式下, Chirp脉冲载波产生电路(51 )产生的调制用基础 Chirp脉冲载波经过单刀双掷 切换电路 (52) 的切换输出作为调制混频器 (54 ) 的一路输入, FM 调制电路 (53 ) 将待调制基带信号进行 FM调制所获得的 FM己调载波作为调制混频器 (54) 的另一 路输入, 调制带通滤波器 (55 ) 从调制混频器 (54) 的输出中提取出和频或差频分量 作为发送中频信号; 在解调模式下, Chirp脉冲载波产生电路(51 )产生的解调用基础 Chirp脉冲载波经过单刀双掷切换电路 (52) 的切换输出至解调倍频器 (56), 解调倍 频器 (56) 的输出作为输入至解调混频器 (57) 的本地 Chirp脉冲载波, 接收中频信 号作为解调混频器 (57) 的另一路输入, 解调带通滤波器 (58 ) 从解调混频器 (57) 的输出中提取出和频或差频分量作为相关解扩结果, FM解调器 (59) 从解调带通滤 波器 (58) 输出的相关解扩结果中解调恢复出待调制基带信号的还原样本。
在该半双工 FM/Chirp调制 /解调器中, 采用了最简形式的调制预处理, 即将 Chirp 脉冲载波产生电路 (51 ) 输出的幅度满足要求的 Chirp脉冲载波通过单刀双掷切换电 路(52)的切换作为调制时的一次频率调制载波(即幅度匹配); 而解调预处理则是组 合使用了调制预处理与倍频电路 (56) 中的倍频处理来产生解调所需的幅度、 扫频规 律以及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波。 当 Chirp 脉冲载波产生电路(51 )输出的 Chirp脉冲载波退化为正弦载波时,该半双工 FM/Chirp 调制 /解调器就退化成半双工 FM调制 /解调器。
(六)第一种半双工 FM/S-Chirp调制 /解调器
一种根据前述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/S-Chirp调制 /解调 器, 由相加器 (61 )、 DDS 电路 (62)、 DAC 电路 (63 )、 单刀双掷切换电路 (64)、 孵调泯频益 孵调 通源汲器(66)和 FM解调器(67)组成。 其工作过程如下: 根据收发控制信号的高 /低电平状态, 选择相加器(61)工作于调制模式或解调模 式, 同时选择单刀双掷切换电路(64) 的切换输出端口; 在调制模式下, 相加器(61) 输出调制频率调谐字 (F7 Fr), 该调制频率调谐字 (F7 Tr) 由调制模式下的频率调谐 中间值 (層 οτ)、 调制模式下的扫频频率调谐字 iFTW t) 、 频率调制频率调谐字 FTWar (tj) 相加而获得; DDS电路 (62) 根据相加器 (61) 输出的调制频率调谐 字 FTWj 产生相应的调制用载波波形的幅度取值序列, DAC电路 (63) 根据 DDS 电路(62)输出的调制用载波波形的幅度取值序列产生相应的发送 FM/S-Chirp已调载 波, DAC电路 (63) 输出的发送 FM/S-Chirp已调载波经单刀双掷切换电路 (64) 的 切换输出作为发送中频信号;在解调模式下,相加器 (61 )输出解调频率调谐字 (/^ Γ ), 该解调频率调谐字 FTWR) 由解调模式下的频率调谐中间值 (FTW0R 、 解调模式下 的扫频频率调谐字 FTW^ (th和取值为某一固定值的频率调制频率调谐字 FTWn ,)进行相加而获得; DDS电路(62)根据相加器(61)输出的解调频率调谐字 (FTWR) 产生相应的解调用载波波形的幅度取值序列, DAC电路 (63) 根据 DDS电路 (62) 输出的解调用载波波形的幅度取值序列产生相应的解调用基础载波, DAC电路 (63) 输出的解调用基础载波经单刀双掷切换电路 (64) 的切换输出作为输入至解调混频器
(65) 的本地 Chirp载波, 接收中频作为解调混频器 (65) 的另一路输入, 解调带通 滤波器(66)从解调混频器(65)的输出中提取出和频或差频分量作为相关解扩结果, FM解调器 (67) 从解调带通滤波器 (66) 输出的相关解扩结果中解调恢复出待调制 基带信号的还原样本。
在该半双工 FM/S-Chirp调制 /解调器中, 一次频率调制载波产生和二次频率调制 过程是在相加器(61)、 DDS电路(62)和 DAC电路(63)的共同作用下同时进行的, 其调制预处理最简化(暗含有幅度匹配处理),其解调预处理则是在特殊的调制状态下 产生解调所需的幅度、扫频规律以及扫频周期起始位置均满足 FM/Chirp解调要求的本 地 Chirp脉冲载波。 根据收发控制信号的高 /低电平状态, 相加器 (61) 选择相应的扫 频频率调谐字 (FTW (t)、、 频率调谐中间值 (FTW0)和频率调制频率调谐字 (FTW a (tj); 当调制模式下的扫频频率调谐字 FTW ( ) 和解调模式下的扫频频率调 谐字 (FTWPs (tj) 均等于 0时, 该半双工 FM/S-Chirp调制 /解调器就退化成半双工 FM调制 /解调器。
(七)第二种半双工 FM/S-Chirp调制 /解调器
一种根据前述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/S-Chirp调制 /解调 器, 由相加器 (71)、 DDS 电路 (72)、 DAC 电路 (73)、 单刀双掷切换电路 (74)、 解调倍频器 (75)、 解调混频器 (76)、 解调带通滤波器 (77) 和 FM解调器 (78) 组 成。 其工作过程如下:
根据收发控制信号的高 /低电平状态, 选择相加器(71)工作于调制模式或解调模 式, 同时选择单刀双掷切换电路(74)的切换输出端口; 在调制模式下, 相加器(71) 输出调制频率调谐字 FTWT , 该调制频率调谐字 (FTWT) 由调制模式下的频率调谐 I。J诅 调市 U悮 A rtJW¾¾频竿调 1 子 、ππμΤ U J)、 频率调制频率调谐字 (FTWQT (t 进行相加而获得; DDS 电路 (72) 根据相加器 (71) 输出的调制频率 调谐字 ( 产生相应的调制用载波波形的幅度取值序列, DAC 电路 (73) 根据 DDS 电路 (72) 输出的调制用载波波形的幅度取值序列产生相应的发送 FM/S-Chirp 已调载波, DAC电路(73)输出的发送 FM/S-Chirp已调载波经单刀双掷切换电路(74) 的切换输出作为发送中频信号;在解调模式下,相加器(71)输出解调频率调谐字
R), 该解调频率调谐字 FTW R 由解调模式下的频率调谐中间值 FTJV0R 、 解调模 式下的扫频频率调谐字 FTW^ (t 和取值为某一固定值的频率调制频率调谐字 (FTWQR) 进行相加而获得; DDS电路 (72) 根据相加器 (71) 输出的解调频率调谐 字 (F1WR) 产生相应的解调用载波波形的幅度取值序列, DAC电路 (73) 根据 DDS 电路 (72) 输出的解调用载波波形的幅度取值序列产生相应的解调用基础载波, DAC 电路 (73) 输出的解调用基础载波经单刀双掷切换电路 (74) 切换输出至解调倍频器 (75), 解调倍频器 (75) 的输出作为输入至解调混频器 (76) 的本地 Chirp载波, 接 收中频信号作为解调混频器 (76) 的另一路输入, 解调带通滤波器 (77) 从解调混频 器 (76) 的输出中提取出和频或差频分量作为相关解扩结果, FM 解调器 (78) 从解 调带通滤波器 (77) 输出的相关解扩结果中解调恢复出待调制基带信号的还原样本。
在该半双工 FM/S-Chirp调制 /解调器中, 一次频率调制载波产生与二次频率调制 过程是在相加器(71)、 DDS电路(72)和 DAC电路(73)的共同作用下同时进行的, 调制预处理最简化(暗含有幅度匹配处理),解调预处理则是通过特殊的调制状态和倍 频器 (75) 的倍频处理的组合来产生解调所需的幅度、 扫频规律以及扫频周期起始位 置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波。根据收发控制信号的高 /低电平状 态, 相加器(71)选择相应的扫频频率调谐字 FTW (t))、 频率调谐中间值 FTW0 和频率调制频率调谐字 (FTWn (tj); 当调制模式下的扫频频率调谐字 iFTW^ )、 和解调模式下的扫频频率调谐字 FTW^ (tj)均等于 0时, 该半双工 FM/S-Chirp调 制 /解调器就退化成半双工 FM调制 /解调器。
(八)第三种半双工 FM/S-Chirp调制 /解调器
一种根据前述半双工 FM/Chirp调制 /解调方法实现的半双工 FM/S-Chirp调制 /解调 器, 由相加器 (81)、 DDS电路 (82)、 DAC电路 (83)、 倍频与频谱搬移电路 (84)、 单刀双掷切换电路(85)、解调混频器(86)、解调带通滤波器(87)和 FM解调器(88) 组成。 其工作过程如下:
根据收发控制信号的高 /低电平状态, 选择相加器(81)工作于调制模式或解调模 式, 同时选择单刀双掷切换电路(85)的切换输出端口; 在调制模式下, 相加器(81) 输出调制频率调谐字 (F7WT), 该调制频率调谐字 (F7 Fr) 由调制模式下的频率调谐 中间值 FTW0 、 调制模式下的扫频频率调谐字 ( H^r (t)、、 频率调制频率调谐字 {FTWQT (tj) 进行相加而获得; DDS 电路 (82) 根据相加器 (81) 输出的调制频率 调谐字 FTWT> 产生相应的调制用载波波形的幅度取值序列, DAC 电路 (83) 根据 DDS 电路 (82) 输出的调制用载波波形的幅度取值序列产生相应的发送 FM/S-Chirp cm t, UAiJ ¾i¾ - (.83 椰 ffitra及达 FM/S-Unrp ti调皲汲作刃怙频与频 i晋搬栘电 路 (84) 的输入信号, 倍频与频谱搬移电路 (84) 的输出经单刀双掷切换电路 (85) 的切换输出作为发送中频信号; 在解调模式下, 相加器 (81) 输出解调频率调谐字 FTWR), 该解调频率调谐字 iFTWR 由解调模式下的频率调谐中间值 (FTW0R)、解 调模式下的扫频频率调谐字 FTJV^ (t 和取值为某一固定值的频率调制频率调谐字 FJWQR) 进行相加而获得; DDS电路 (82) 根据相加器 (81) 输出的解调频率调谐 字 FTWR) 产生相应的解调用载波波形的幅度取值序列, DAC电路 (83) 根据 DDS 电路 (82) 输出的解调用载波波形的幅度取值序列产生相应的解调用基础载波, DAC 电路 (83) 输出的解调用基础载波作为倍频与频谱搬移电路 (84) 的输入信号, 倍频 与频谱搬移电路 (84) 的输出经单刀双掷切换电路 (85) 的切换输出作为输入至解调 混频器 (86) 的本地 Chirp载波, 接收中频信号作为解调混频器 (86) 的另一路输入, 解调带通滤波器 (87) 从解调混频器 (86) 的输出中提取出和频或差频分量作为相关 解扩结果, FM解调器 (88) 从解调带通滤波器 (87) 输出的相关解扩结果中解调恢 复出待调制基带信号的还原样本。
在该半双工 FM/S-Chirp调制 /解调器中, 一次频率调制载波产生与二次频率调制 过程是在相加器(81)、 DDS电路(82)和 DAC电路(83)的共同作用下同时进行的, 调制预处理最简化(暗含有幅度匹配处理),解调预处理则是通过特殊的调制状态和倍 频与频谱搬移电路 (84) 中的倍频与频谱搬移处理的组合来产生解调所需的幅度、 扫 频规律以及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波。根据 收发控制信号的高 /低电平状态,相加器(81 )选择相应的扫频频率调谐字 (FTW 、 频率调谐中间值 (F7W0) 和频率调制频率调谐字 (FTW。 ( t )、', 当调制模式下的扫频 频率调谐字 ^Ύ μΓ (tj 和解调模式下的扫频频率调谐字 iFTW^ (tj) 均等于 0 时, 该半双工 FM/S-Chirp调制 /解调器就退化成半双工 FM调制 /解调器。
(九)有益效果
本发明所提供的半双工 FM/Chirp调制 /解调方法, 充分利用了半双工通信方式的 特点,通过共用一个 Chirp脉冲载波产生电路来实现 FM/Chirp调制 /解调,还能兼容实 现半双工 FM调制 /解调; 本发明中同时提供的根据该半双工 FM/Chirp调制 /解调方法 构建的多种实现装置, 能满足多种不同的应用需求, 便于在兼容 FM调制和 FM/Chirp 调制的半双工通信设备中使用。
附图说明
、 图 1所示为本发明提供的半双工 FM/Chirp调制 /解调方法一种实现模型。 其中, 11 为 Chirp脉冲载波产生电路, 12为单刀双掷切换电路, 13是调制预处理电路, 14 是二次频率调制电路, 15是解调预处理电路, 16是解调混频器, 17是带通滤波器, 18是频率解调器。
图 2所示为本发明中同时提供的第一种半双工 FM/Chirp调制 /解调器。 其中, 21 为 Chirp脉冲载波产生电路, 22是单刀双掷切换电路, 23是 FM调制电路, 24是调制 混频器、 25是调制带通滤波器, 26是解调混频器, 27是解调带通滤波器, 28是 FM 胛调益。
图 3所示为本发明中同时提供的第二种半双工 FM/Chirp调制 /解调器。 其中, 31 是 Chirp脉冲载波产生电路, 32是 FM调制电路, 33是调制混频器, 34是调制带通滤 波器, 35是单刀双掷切换电路, 36是解调混频器, 37是解调带通滤波器, 38是 FM 解调器。
图 4所示为本发明中同时提供的第三种半双工 FM/Chirp调制 /解调器。 其中, 41 是 Chirp脉冲载波产生电路, 42是 FM调制电路, 43是调制混频器, 44是调制带通滤 波器, 45是倍频与频谱搬移电路, 46是单刀双掷切换电路, 47是解调混频器, 48是 解调带通滤波器, 49是 FM解调器。
图 5所示为本发明中同时提供的第四种半双工 FM/Chirp调制 /解调器。 其中, 51 是 Chirp脉冲载波产生电路, 52是单刀双掷切换电路, 53是 FM调制电路, 54是调制 混频器, 55是调制带通滤波器, 56是解调倍频器, 57是解调混频器, 58是解调带通 滤波器, 59是 FM解调器。
图 6所示为本发明中同时提供的第一种半双工 FM/S-Chirp调制 /解调器。 其中, 61是相加器, 62是 DDS电路, 63是 DAC电路, 64是单刀双掷切换电路, 65是解调 混频器, 66是解调带通滤波器, 67是 FM解调器。
图 7所示为本发明中同时提供的第二种半双工 FM/S-Chirp调制 /解调器。 其中, 71是相加器, 72是 DDS电路, 73是 DAC电路, 74是单刀双掷切换电路, 75是解调 倍频器, 76是解调混频器, 77是解调带通滤波器, 78是 FM解调器。
图 8所示为本发明中同时提供的第三种半双工 FM/S-Chirp调制 /解调器。 其中, 81是相加器, 82是 DDS电路, 83是 DAC电路, 84是倍频与频谱搬移电路, 85是单 刀双掷切换电路, 86是解调混频器, 87是解调带通滤波器, 88是 FM解调器。
具体实施方式
实施例 1
本实施例用于说明本发明提供的半双工 FM/Chirp调制 /解调方法的实现过程。 以 图 1所示的实现模型为例, 该半双工 FM/Chirp调制 /解调方法的实现过程如下:
根据收发控制信号的高 /低电平状态, 选择 Chirp脉冲载波产生电路 (11 ) 工作于 调制模式或解调模式, 同时选择单刀双掷切换电路 (12) 的切换输出端口; 在调制模 式下, Chirp脉冲载波产生电路(11 )产生的调制用基础 Chirp脉冲载波经过单刀双掷 切换电路(12) 的切换输出至调制预处理电路(13 ), 二次频率调制电路(14)将待调 制基带信号对调制预处理电路 (Π ) 输出的幅度满足要求的一次频率调制载波进行二 次频率调制, 并将所获得的 FM/Chirp 已调载波作为发送中频信号; 在解调模式下, Chirp脉冲载波产生电路(11 )产生的解调用基础 Chirp脉冲载波经过单刀双掷切换电 路(12) 的切换输出至解调预处理电路(15 ), 解调预处理电路(15 )输出解调所需的 幅度、扫频规律以及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载 波, 解调混频器 (16) 将解调预处理电路 (15 ) 输出的本地 Chirp脉冲载波与接收到 m r ivi/υηΐ 匚调软奴 ^ κμ^Η » 进仃 ί¾¾, 市通 汲益 U7 从鮮调混频器 ( 16) 的输出中提取出和频或差频分量作为相关解扩结果, 频率解调器 (18) 从带通滤波器 ( 17) 输出的相关解扩结果中解调恢复出待调制基带信号的还原样本。
本实施例中的信号产生和处理过程, 既可由实际的硬件电路来实现, 也可由软件 算法与硬件相结合来实现。
实施例 2
本实施例用于说明本发明提供的第一种半双工 FM/Chirp调制 /解调器的实现过程, 采用如图 2所示的半双工 FM/Chirp调制 /解调器。 其实现过程如前述部份中对该调制 / 解调器的有关描述, 在此不再重复。
该半双工 FM/Chirp调制 /解调器, 工作于调制模式时解调部份的电路不用工作, 工作于解调模式时调制部份的电路也不用工作, 同时调制预处理和解调预处理也最简 化(幅度匹配), 因此具有功耗小, 组成简单的特点。 在该半双工 FM/Chirp调制 /解调 器中, 如果 Chirp脉冲载波产生电路(21 )采用的是 DDS电路, 则该半双工 FM/Chirp 调制 /解调器特别适于在发送中频和接收中频的频率均较低但发送中频明显高于接收 中频的情况下使用。 例如: 发送中频在 30MHz, 接收中频为 10.7MHz时, 如果 Chirp 脉冲载波产生电路 (21 ) 输出的 Chirp脉冲载波的中心频率为 10MHz, 而 FM调制电 路(23 )输出的 FM已调载波的中心频率为 20MHz, 则调制时在二次频率调制过程中 通过提取混频输出中的和频分量就可获得中心频率为 30MHz的发送中频信号,而解调 混频时采用中心频率为 10.245MHz 的本地载波, 则相关解扩结果的中心频率为 455KHz,这样就便于实现与现有的采用 25K/12.5KHZ载波信道带宽和 455KHz解调中 频的窄带 FM制式的半双工通信装备的兼容。
实施例 3
本实施例用于说明本发明提供的第二种半双工 FM/Chirp调制 /解调器的实现过程, 采用如图 3所示的半双工 FM/Chirp调制 /解调器。 其实现过程如前述部份中对该调制 / 解调器的有关描述, 在此不再重复。
该半双工 FM/Chirp调制 /解调器,虽然与第二种半双工 FM/Chirp调制 /解调器的组 成基本相同, 调制预处理最简化(幅度匹配), 工作于解调模式时调制部份的电路仍需 工作, 因此其组成简单, 但解调时的功耗会比第一种半双工 FM/Chirp调制 /解调器解 调时的功耗大。 在该半双工 FM/Chirp调制 /解调器中, 由于可以利用调制过程中混频 提取和频分量来实现提高发送中频和解调用本地载波的中心频率, 因此该半双工 FM/Chirp调制 /解调器适于在发收中频的频率较高且中心频率相差不大的情况下使用。 例如: Chirp脉冲载波产生电路 (31 ) 输出的 Chirp脉冲载波的中心频率为 10MHz, 而 FM调制电路 (32 )输出的 FM已调载波的中心频率为 20MHz, 则调制时在二次频 率调制过程中通过提取混频输出中的和频分量的中心频率在 30MHz左右,这样就能支 持使用 30MHz左右的发送中频和接收中频。
实施例 4
本实施例用于说明本发明提供的第三种半双工 FM/Chirp调制 /解调器的实现过程, 7K j ¼u 尸/r不 t j千 ^丄 FM/υ ΐ 调市/孵调益。 兵头现 ?3:桎卯 Ιΰ还邯份甲对该调制 / 解调器的有关描述, 在此不再重复。
该半双工 FM/Chirp调制 /解调器,在第二种半双工 FM/Chirp调制 /解调器的基础上 加入了倍频与频谱搬移电路 (45 ), 调制预处理最简化 (幅度匹配), 工作于解调模式 时调制部份的电路仍需工作, 因此其组成较复杂, 解调时的功耗会比第一种和第二种 半双工 FM/Chirp调制 /解调器解调时的功耗大。 在该半双工 FM/Chirp调制 /解调器中, 由于可以利用倍频与频谱搬移电路 (45 ) 中的倍频和频谱搬移处理来扩展频偏和实现 频谱搬移, 因此适于在发收中频的频率高或载波信道带宽较大时使用。 例如: Chirp 脉冲载波产生电路 (41 ) 输出的 Chirp脉冲载波的中心频率为 10MHz, 而 FM调制电 路(42)输出的 FM已调载波的中心频率为 15MHz, 则调制时在二次频率调制过程中 通过提取混频输出中的和频分量的中心频率在 25MHz左右,经过 3倍频之后将频偏扩 展 3倍,中心频率也提高 3倍,再经过频谱搬移之后就可以支持中心频率在 150-500MHZ 的发送中频和接收中频。 此外, 由于倍频与频谱搬移电路 (45 ) 还可以根据调制和解 调的需要实现不同位置的频谱搬移, 因此该半双工 FM/Chirp调制 /解调器也适于在发 收中频的频率高且中心频率相差较大时使用。
实施例 5
本实施例用于说明本发明提供的第四种半双工 FM/Chirp调制 /解调器的实现过程, 采用如图 5所示的半双工 FM/Chirp调制 /解调器。 其实现过程如前述部份中对该调制 / 解调器的有关描述, 在此不再重复。
该半双工 FM/Chirp调制 /解调器, 工作于调制模式时解调部份的电路不用工作, 工作于解调模式时调制部份的电路也不用工作, 调制预处理最简化(即幅度匹配), 解 调预处理也较简单, 因此也具有功耗较小, 组成较简单的特点。 如果 Chirp脉冲载波 产生电路(51 )采用的是 DDS电路, 则该半双工 FM/Chirp调制 /解调器特别适于在发 送中频和接收中频的频率均较高但接收中频与发送中频又存在较大差异的情况下使 用。 例如: 发送中频为 35MHz, 接收中频为 45MHz时, 难以共用同一个调制带通滤 波器 (55 ); 如果 Chirp脉冲载波产生电路 (51 ) 输出的 Chirp脉冲载波的中心频率为 15MHz左右, 而 FM调制电路(53 )输出的 FM已调载波的中心频率为 20MHz, 则调 制时在二次频率调制过程中通过提取混频输出中的和频分量就可获得中心频率为 35MHz的发送中频信号, 而解调混频时通过解调倍频器(56) 的三倍频处理后获得中 心频率为 44.545MHz或 45.455MHz的本地 Chirp脉冲载波,则相关解扩结果的中心频 率为 455KHz, 这样就便于实现与现有的采用 25K/12.5KHZ载波信道带宽和 455KHz 解调中频的窄带 FM制式的半双工通信装备的兼容。
实施例 6
本实施例用于说明本发明提供的第一种半双工 FM/S-Chirp 调制 /解调器的实现过 程, 采用如图 6所示的半双工 FM/S-Chirp调制 /解调器。 其实现过程如前述部份中对 该调制 /解调器的有关描述, 在此不再重复。
该半双工 FM/S-Chirp 调制 /解调器, 工作于调制模式时, 一次频率调制和二次频 竿调帀,」|«¾ ¾¾丑^/¾ 一¾]¾,
Figure imgf000014_0001
(^调市 宝干暗 处 理); 工作于解调模式时在特殊的二次频率调制状态下产生解调所需的本地载波,解调 预处理也最简化, 因此其功耗比第一种半双工 FM/Chirp调制 /解调器更小, 其组成也 比第一种半双工 FM/Chirp调制 /解调器更简单。 由于 S-Chirp脉冲载波产生采用的是 DDS 电路 (62), 因此适于发送中频和接收中频的频率均较低的情况下使用, 且便于 适应接收中频与发送中频存在较大差异的情况。 例如: DDS电路(62)在调制模式下 直接输出中心频率在 10MHz左右的发送中频,在解调模式下(假设 FM解调的中频为 455KHz) 输出中心频率在 6MHz左右的本地载波就可支持 6.5MHz左右的接收中频。
实施例 7
本实施例用于说明本发明提供的第二种半双工 FM/S-Chirp 调制 /解调器的实现过 程, 采用如图 7所示的半双工 FM/S-Chirp调制 /解调器。 其实现过程如前述部份中对 该调制 /解调器的有关描述, 在此不再重复。
该半双工 FM/S-Chirp调制 /解调器, 工作于调制模式时, 一次频率调制和二次频 率调制同时实现且共用同一电路, 调制预处理最简化 (调制过程中暗含有幅度匹配处 理); 工作于解调模式时, 在特殊的二次频率调制状态下产生解调所需的本地载波, 解 调预处理较简化; 调制时的功耗与第一种半双工 FM/S-Chirp调制 /解调器的相同, 其 解调时的功耗会大于第一种半双工 FM/S-Chirp调制 /解调器解调时的功耗, 其组成也 较简单。 由于 S-Chirp脉冲载波产生采用的是 DDS电路 (72 ), 解调预处理中采用了 倍频, 因此便于适应发送中频较低且接收中频明显高于发送中频的情况。 例如: 利用 DDS电路(72)输出中心频率在 10MHz左右的载波, 直接支持 10MHz左右的发送中 频, 并通过 2或 3倍频支持 20MHz或 30MHz左右的接收中频。
实施例 8
本实施例用于说明本发明提供的第三种半双工 FM/S-Chirp 调制 /解调器的实现过 程, 采用如图 8所示的半双工 FM/S-Chirp调制 /解调器。 其实现过程如前述部份中对 该调制 /解调器的有关描述, 在此不再重复。
该半双工 FM/Chirp调制 /解调器在第二种半双工 FM/S-Chirp调制 /解调器的基础上 加入了倍频与频谱搬移电路(84), 调制预处理最简化(调制过程中暗含有幅度匹配), 工作于解调模式时调制部份的电路仍需工作, 因此其组成较复杂, 解调时的功耗会比 第一种和第二种半双工 FM/S-Chirp 调制 /解调器解调时的功耗大。 在该半双工 FM/S-Chirp调制 /解调器中, 由于可以利用倍频与频谱搬移电路(84)中的倍频和频谱 搬移处理来扩展频偏和实现频谱搬移, 因此适于在发收中频的频率高或载波信道带宽 较大时使用。 例如: DDS 电路 (82) 输出的载波的中心频率为 10MHz左右, 经过 3 倍频之后将频偏扩展 3倍, 中心频率也提高 3倍, 再经过频谱搬移后就可支持中心频 率在 150-500MHZ的发送中频和接收中频。 此外, 由于倍频与频谱搬移电路 (84) 还 可以根据调制和解调的需要实现不同位置的频谱搬移,因此该半双工 FM/S-Chirp调制 /解调器也适于在发收中频的频率高且中心频率相差较大时使用。

Claims

1. 一种半双工 FM/Chirp调制 /解调方法, 其内容是: 采用一个有调制模式和解 调模式两种工作模式的载波产生电路; 在调制模式下, 通过对载波产生电路输出的载 波进行调制预处理来获得调制所需的调制用基础载波, 用待调制基带信号对调制用基 础载波进行频率调制并将所获得的已调载波作为通信信号; 在解调模式下, 通过对载 波产生电路输出的载波进行解调预处理来获得解调所需的本地载波, 将本地载波与接 收到的己调载波进行混频, 采用待调制基带信号对调制用基础载波进行频率调制时所 对应类型的频率调制方式的频率解调处理, 从混频输出中的和频或差频分量中解调恢 复出待调制基带信号的还原样本; 其特征在于:
所述载波产生电路, 为 Chirp脉冲载波产生电路; 所述载波产生电路输出的载波, 为 Chirp脉冲载波;
所述调制预处理, 有幅度匹配、 倍频和频谱搬移三种基本类型以及由这三种基本 类型组合而形成的复合类型; 所述解调预处理, 也有幅度匹配、 倍频和频谱搬移三种 基本类型以及由这三种基本类型组合而形成的复合类型; 所述调制预处理与解调预处 理, 可以分别使用不同的预处理, 或共用部份的预处理, 或组合使用调制预处理和调 制处理来实现解调预处理;
所述调制用基础载波, 为作为一次频率调制载波使用的 Chirp脉冲载波; 所述已 调载波, 为 FM/Chirp已调载波;
所述解调所需的本地载波, 为幅度、 扫频规律和扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波;
所述混频输出中的和频或差频分量, 为 FM/Chirp解调过程中的相关解扩结果。
2. —种根据权利要求 1所述的半双工 FM/Chirp调制 /解调方法实现的半双工
FM/Chirp调制 /解调器, 由载波产生电路 (21 )、 单刀双掷切换电路 (22)、 FM调制 电路 (23 )、 调制混频器 (24)、 调制带通滤波器 (25 )、 解调混频器 (26)、 解调带通 滤波器 (27) 和 FM解调器 (28) 组成; 根据收发控制信号的高 /低电平状态, 选择载 波产生电路 (21 ) 工作于调制模式或解调模式, 同时选择单刀双掷切换电路 (22) 的 切换输出端口; 在调制模式下, 载波产生电路 (21 ) 输出调制用基础载波并经过单刀 双掷切换电路 (22) 的切换输出至调制混频器 (24), FM调制电路 (23 ) 将待调制基 带信号对正弦载波进行 FM调制获得 FM已调载波, 调制混频器 (24) 将单刀双掷切 换电路 (22) 输出的调制用基础载波与 FM调制电路 (23 ) 输出的 FM已调载波进行 混频, 调制带通滤波器 (25 ) 从调制混频器 (24) 的输出中提取出和频或差频分量作 为发送中频信号; 在解调模式下, 载波产生电路 (21 ) 输出解调所需的本地载波并经 过单刀双掷切换电路 (22) 的切换输出至解调混频器(26), 解调混频器(26)将单刀 双掷切换电路(22 )输出的本地载波与接收中频信号进行混频, 解调带通滤波器(27 ) 从解调混频器 (26) 的输出中提取出和频或差频分量, FM解调器 (28) 从解调带通 滤波器 (27) 的输出中解调恢复出待调制基带信号的还原样本; 其特征在于:
所述载波产生电路 (21 ), 为 Chirp脉冲载波产生电路; 尸 T还调制用巷础载汲,为作为一次频军调制载波使用的幅度满足调制要求的 Chirp 脉冲载波; 所述发送中频信号, 为 FM/Chirp已调载波;
所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波;
所述接收中频信号, 为接收到的 FM/Chirp已调载波;
所述解调带通滤波器 (27) 的输出, 为 FM/Chirp解调过程中的相关解扩结果。
3. 一种根据权利要求 1 所述的半双工 FM/Chirp调制 /解调方法实现的半双工
FM/Chirp调制 /解调器,由载波产生电路(31 )、FM调制电路(32)、调制混频器(33 )、 调制带通滤波器(34)、 单刀双掷切换电路(35 )、 解调混频器(36)、 解调带通滤波器 (37) 和 FM解调器 (38) 组成; 根据收发控制信号的高 /低电平状态, 选择载波产生 电路 (31 ) 工作于调制模式或解调模式, 同时选择单刀双掷切换电路 (35 ) 的切换输 出端口; 在调制模式下, 载波产生电路(31 )输出调制用基础载波, FM调制电路(32) 将待调制基带信号对正弦载波进行 FM调制获得 FM已调载波, 调制混频器 (33 ) 将 载波产生电路 (31 ) 输出的调制用基础载波与 FM调制电路 (32) 输出的 FM己调载 波进行混频, 调制带通滤波器 (34) 从调制混频器 (33 ) 的输出中提取出和频或差频 分量并经过单刀双掷切换电路 (35 ) 的切换输出作为发送中频信号; 在解调模式下, 载波产生电路 (31 ) 输出解调用基础载波, FM 调制电路 (32) 输出某一固定频率的 正弦载波, 调制混频器 (33 ) 将载波产生电路 (31 ) 输出的解调用基础载波与 FM调 制电路 (32) 输出的正弦载波进行混频, 调制带通滤波器 (34) 从调制混频器 (33 ) 的输出中提取出和频或差频分量并经过单刀双掷切换电路 (35 ) 的切换输出作为解调 所需的本地载波, 解调混频器 (36 ) 将单刀双掷切换电路 (35 ) 输出的本地载波与接 收中频信号进行混频, 解调带通滤波器 (37) 从解调混频器 (36) 的输出中提取出和 频或差频分量, FM解调器 (38) 从解调带通滤波器 (37) 的输出中解调恢复出待调 制基带信号的还原样本; 其特征在于:
所述载波产生电路 (31 ), 为 Chirp脉冲载波产生电路;
所述调制用基础载波,为作为一次频率调制载波使用的幅度满足调制要求的 Chirp 脉冲载波; 所述发送中频信号, 为 FM/Chirp已调载波;
所述解调用基础载波, 为 Chirp脉冲载波; 所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波;
所述接收中频信号, 为接收到的 FM/Chirp已调载波;
所述解调带通滤波器 (37) 的输出, 为 FM/Chirp解调过程中的相关解扩结果。
4. 一种根据权利要求 1 所述的半双工 FM/Chirp调制 /解调方法实现的半双工
FM/Chirp调制 /解调器,由载波产生电路(41 )、 FM调制电路(42)、调制混频器(43 )、 调制带通滤波器(44)、 倍频与频谱搬移电路(45 )、 单刀双掷切换电路(46)、 解调混 频器 (47 )、 解调带通滤波器(48)和 FM解调器(49) 组成; 根据收发控制信号的高 /低电平状态, 选择载波产生电路 (41 ) 工作于调制模式或解调模式, 同时选择单刀双 掷切秧电蹐 46 的切换输出端口; 在调制模式下, 载波产生电路 (41 ) 输出调制用 基础载波, FM调制电路(42)将待调制基带信号对正弦载波进行 FM调制获得 FM已 调载波, 调制混频器 (43 ) 将载波产生电路 (41 ) 输出的调制用基础载波与 FM调制 电路(42)输出的 FM己调载波进行混频, 调制带通滤波器(44)从调制混频器(43 ) 的输出中提取出和频或差频分量并输出至倍频与频谱搬移电路(45 ),倍频与频谱搬移 电路 (45 ) 的输出经过单刀双掷切换电路 (46) 的切换输出作为发送中频信号; 在解 调模式下, 载波产生电路 (41 ) 输出解调用基础载波, FM 调制电路 (42) 输出某一 固定频率的正弦载波, 调制混频器 (43 ) 将载波产生电路 (41 ) 输出的解调用基础载 波与 FM调制电路 (42 ) 的正弦载波进行混频, 调制带通滤波器 (44) 从调制混频器 (43 )的输出中提取出和频或差频分量并输出至倍频与频谱搬移电路(45 ), 倍频与频 谱搬移电路 (45 ) 的输出经过单刀双掷切换电路 (46) 的切换输出作为解调所需的本 地载波, 解调混频器 (47) 将单刀双掷切换电路 (46) 输出的本地载波与接收中频信 号进行混频, 解调带通滤波器 (48) 从解调混频器 (47) 的输出中提取出和频或差频 分量, FM 解调器 (49) 从解调带通滤波器 (48) 的输出中解调恢复出待调制基带信 号的还原样本; 其特征在于:
所述载波产生电路 (41 ), 为 Chirp脉冲载波产生电路;
所述调制用基础载波,为作为一次频率调制载波使用的幅度满足调制要求的 Chirp 脉冲载波; 所述发送中频信号, 为 FM/Chirp己调载波;
所述解调用基础载波, 为 Chirp脉冲载波; 所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波;
所述接收中频信号, 为接收到的 FM/Chirp已调载波;
所述解调带通滤波器 (48) 的输出, 为 FM/Chirp解调过程中的相关解扩结果。
5. 一种根据权利要求 1 所述的半双工 FM/Chirp调制 /解调方法实现的半双工
FM/Chirp调制 /解调器, 由载波产生电路 (51 )、 单刀双掷切换电路 (52)、 FM调制 电路 (53 )、 调制混频器 (54)、 调制带通滤波器 (55 )、 解调倍频器 (56)、 解调混频 器 (57)、 解调带通滤波器 (58) 和 FM解调器 (59) 组成; 根据收发控制信号的高 / 低电平状态, 选择载波产生电路 (51 ) 工作于调制模式或解调模式, 同时选择单刀双 掷切换电路 (52) 的切换输出端口; 在调制模式下, 载波产生电路 (51 ) 输出调制用 基础载波并经过单刀双掷切换电路 (52) 的切换输出至调制混频器 (54), FM调制电 路 (53 ) 将待调制基带信号对正弦载波进行 FM调制获得 FM已调载波, 调制混频器 (54) 将单刀双掷切换电路 (52) 输出的调制用基础载波与 FM调制电路 (53 ) 输出 的 FM已调载波进行混频, 调制带通滤波器 (55 ) 从调制混频器 (54) 的输出中提取 出和频或差频分量作为发送中频信号; 在解调模式下, 载波产生电路 (51 ) 输出解调 用基础载波并经过单刀双掷切换电路(52)的切换输出至解调倍频器(56), 解调倍频 器 (56) 将单刀双掷切换电路 (52) 输出的解调用基础载波的倍频结果作为解调所需 的本地载波输出至解调混频器(57), 解调混频器(57)将解调倍频器(56)输出的本 地载汲与接収中频信号进行混频, 解调带通滤波器 (58 ) 从解调混频器 (57 ) 的输出 中提取出和频或差频分量, FM解调器 (59) 从解调带通滤波器 (58 ) 的输出中解调 恢复出待调制基带信号的还原样本; 其特征在于:
所述载波产生电路 (51 ), 为 Chirp脉冲载波产生电路;
所述调制用基础载波,为作为一次频率调制载波使用的幅度满足调制要求的 Chirp 脉冲载波; 所述发送中频信号, 为 FM/Chirp已调载波;
所述解调用基础载波, 为 Chirp脉冲载波; 所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/Chirp解调要求的本地 Chirp脉冲载波;
所述接收中频信号, 为接收到的 FM/Chirp己调载波;
所述解调带通滤波器 (58 ) 的输出, 为 FM/Chirp解调过程中的相关解扩结果。
6. 一种根据权利要求 1 所述的半双工 FM/Chirp调制 /解调方法实现的半双工
FM/S-Chirp调制 /解调器, 由相加器 (61 )、 DDS电路 (62)、 DAC电路 (63 )、 单刀 双掷切换电路 (64)、 解调混频器 (65 )、 解调带通滤波器 (66 ) 和 FM解调器 (67) 组成; 根据收发控制信号的高 /低电平状态, 选择相加器 (61 ) 工作于调制模式或解调 模式, 同时选择单刀双掷切换电路 (64) 的切换输出端口; 在调制模式下, DDS电路 (62)根据相加器(61 )输出的调制频率调谐字 FTWT 产生相应的调制用载波波形 的幅度取值序列, DAC电路 (63 ) 根据 DDS电路 (62 ) 输出的调制用载波波形的幅 度取值序列产生相应的发送已调载波, DAC电路(63 )输出的发送已调载波经单刀双 掷切换电路(64 ) 的切换输出作为发送中频信号; 在解调模式下, DDS电路 (62 ) 根 据相加器(61 )输出的解调频率调谐字 (F7WR)产生相应的解调用载波波形的幅度取 值序列, DAC电路 (63 ) 根据 DDS电路 (62) 输出的解调用载波波形的幅度取值序 列产生相应的解调用基础载波, DAC电路(63 )输出的解调用基础载波经单刀双掷切 换电路 (64) 的切换输出作为解调所需的本地载波, 解调混频器 (65 ) 将单刀双掷切 换电路 (64) 输出的本地载波与接收中频信号进行混频, 解调带通滤波器 (66) 从解 调混频器 (65 ) 的输出中提取出和频或差频分量, FM 解调器 (67 ) 从解调带通滤波 器 (66) 的输出中解调恢复出待调制基带信号的还原样本; 其特征在于:
所述相加器 (61 ) 输出的调制频率调谐字 (FTWT), 由调制模式下的频率调谐中 间值 FTW0T)、 调制模式下的扫频频率调谐字 (FHF^ (t D 和频率调制频率调谐字 (FTWQT (t 进行相加而获得;
所述发送已调载波, 为 FM/S-Chirp已调载波; 所述发送中频信号, 为 FM/S-Chirp 已调载波;
所述相加器 (61 ) 输出的解调频率调谐字 FTWR , 由解调模式下的频率调谐中 间值 (FTW0R )、 解调模式下的扫频频率调谐字 (t 和取值为某一固定值的 频率调制频率调谐字 (FTW R) 进行相加而获得;
所述解调用基础载波, 为 S-Chirp脉冲载波; 所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/S-Chirp解调要求的本地 S-Chirp脉冲载波; /T^ISH ^Ig^', 刀伎叹到 hJWi! Jhirp 调载汲;
所述解调带通滤波器 (66) 的输出, 为 FM/S-Chirp解调过程中的相关解扩结果。
7. —种根据权利要求 1所述的半双工 FM/Chirp调制 /解调方法实现的半双工 FM/S-Chirp调制 /解调器, 由相加器 (71)、 DDS电路 (72)、 DAC电路 (73)、 单刀 双掷切换电路(74)、 解调倍频器(75)、 解调混频器(76)、 解调带通滤波器(77)和 FM解调器 (78) 组成; 根据收发控制信号的高 /低电平状态, 选择相加器 (71) 工作 于调制模式或解调模式, 同时选择单刀双掷切换电路 (74) 的切换输出端口; 在调制 模式下, DDS 电路 (72) 根据相加器 (71) 输出的调制频率调谐字 FJWT 产生相 应的调制用载波波形的幅度取值序列, DAC电路 (73) 根据 DDS电路 (72) 输出的 调制用载波波形的幅度取值序列产生相应的发送己调载波, DAC电路(73)输出的发 送已调载波经单刀双掷切换电路(74)的切换输出作为发送中频信号; 在解调模式下, DDS 电路 (72) 根据相加器 (71) 输出的解调频率调谐字 FTWR) 产生相应的解调 用载波波形的幅度取值序列, DAC电路 (73) 根据 DDS电路 (72) 输出的解调用载 波波形的幅度取值序列产生相应的解调用基础载波并经过单刀双掷切换电路 (74) 的 切换输出至解调倍频器(75), 解调倍频器(75)对单刀双掷切换电路(74)输出的解 调用基础载波进行倍频, 解调倍频器(75)输出的倍频结果作为解调所需的本地载波, 解调混频器 (76) 将解调倍频器 (75) 输出的本地载波与接收中频信号进行混频, 解 调带通滤波器 (77) 从解调混频器 (76) 的输出中提取出和频或差频分量, FM 解调 器 (78) 从解调带通滤波器 (77) 的输出中解调恢复出待调制基带信号的还原样本; 其特征在于- 所述相加器 (71) 输出的调制频率调谐字 ( 7^ ), 由调制模式下的频率调谐中 间值 (FTW0T)、 调制模式下的扫频频率调谐字 FTWpT '(t) 和频率调制频率调谐字 CFTWQT (t 进行相加而获得;
所述发送已调载波, 为 FM/S-Chirp已调载波; 所述发送中频信号, 为 FM/S-Chirp 已调载波;
所述相加器 (71) 输出的解调频率调谐字 (FTWR), 由解调模式下的频率调谐中 间值 (FTW0R 、 解调模式下的扫频频率调谐字 FTW (t 和取值为某一固定值的 频率调制频率调谐字 (βΤίνΩ 进行相加而获得;
所述解调用基础载波, 为 S-Chirp脉冲载波; 所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/S-Chirp解调要求的本地 S-Chirp脉冲载波; 所述接收中频信号, 为接收到的 FM/S-Chirp已调载波;
所述解调带通滤波器 (77) 的输出, 为 FM/S-Chirp解调过程中的相关解扩结果。
8. 一种根据权利要求 1所述的半双工 FM/Chirp调制 /解调方法实现的半双工 FM/S-Chirp调制 /解调器, 由相加器 (81)、 DDS电路 (82)、 DAC电路 (83)、 倍频 与频谱搬移电路(84)、 单刀双掷切换电路(85)、 解调混频器(86)、 解调带通滤波器
(87)和 FM解调器(88)组成;根据收发控制信号的高 /低电平状态,选择相加器(81.) 丄忭卞调制悮 ¾ 解调模式, 问时选择单刀双掷切换电路 (85) 的切换输出端口; 在 调制模式下, DDS 电路 (82) 根据相加器 (81) 输出的调制频率调谐字 (F7TFr) 产 生相应的调制用载波波形的幅度取值序列, DAC电路 (83) 根据 DDS电路 (82) 输 出的调制用载波波形的幅度取值序列产生相应的调制用基础载波, DAC电路(83)输 出的调制用基础载波作为倍频与频谱搬移电路 (84) 的输入信号, 倍频与频谱搬移电 路 (84) 输出的调制用基础载波的倍频与频谱搬移结果经单刀双掷切换电路 (85) 的 切换输出作为发送中频信号; 在解调模式下, DDS电路 (82) 根据相加器 (81)输出 的解调频率调谐字 (FTWR) 产生相应的解调用载波波形的幅度取值序列, DAC 电路 (83)根据 DDS电路(82)输出的解调用载波波形的幅度取值序列产生相应的解调用 基础载波, DAC电路 (83)输出的解调用基础载波作为倍频与频谱搬移电路(84) 的 输入信号, 倍频与频谱搬移电路 (84) 输出的解调用基础载波的倍频与频谱搬移结果 经单刀双掷切换电路 (85) 的切换输出作为解调所需的本地载波, 解调混频器 (86) 将单刀双掷切换电路 (85) 输出的本地载波与接收中频信号进行混频, 解调带通滤波 器 (87) 从解调混频器 (86) 的输出中提取出和频或差频分量, FM解调器 (88) 从 解调带通滤波器(87)的输出中解调恢复出待调制基带信号的还原样本; 其特征在于: 所述相加器 (81) 输出的调制频率调谐字 (FTW , 由调制模式下的频率调谐中 间值 (FT^ )、 调制模式下的扫频频率调谐字 FTW^ (t 和频率调制频率调谐字 (FTWQT (t 进行相加而获得;
所述调制用基础载波,为 FM/S-Chirp已调载波;所述发送中频信号,为 FM/S-Chirp 已调载波;
所述相加器 (81) 输出的解调频率调谐字 FTWR , 由解调模式下的频率调谐中 间值 (FTW0R)、 解调模式下的扫频频率调谐字 F!W^ (t)) 和取值为某一固定值的 频率调制频率调谐字 (FTWQR) 进行相加而获得;
所述解调用基础载波, 为 S-Chirp脉冲载波; 所述解调所需的本地载波, 为幅度、 扫频规律及扫频周期起始位置均满足 FM/S-Chirp解调要求的本地 S-Chirp脉冲载波; 所述接收中频信号, 为接收到的 FM/S-Chirp已调载波;
所述解调带通滤波器 (87) 的输出, 为 FM/S-Chirp解调过程中的相关解扩结果。
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