WO2011147286A1 - 板上芯片发光二极管结构 - Google Patents

板上芯片发光二极管结构 Download PDF

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Publication number
WO2011147286A1
WO2011147286A1 PCT/CN2011/074472 CN2011074472W WO2011147286A1 WO 2011147286 A1 WO2011147286 A1 WO 2011147286A1 CN 2011074472 W CN2011074472 W CN 2011074472W WO 2011147286 A1 WO2011147286 A1 WO 2011147286A1
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Prior art keywords
layer
chip
nano
light
led chip
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PCT/CN2011/074472
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English (en)
French (fr)
Inventor
陈烱勋
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方方
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Priority to EP11786058.5A priority Critical patent/EP2579344A1/en
Priority to US13/700,249 priority patent/US20130069099A1/en
Publication of WO2011147286A1 publication Critical patent/WO2011147286A1/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64Heat extraction or cooling elements
    • H01L33/641Heat extraction or cooling elements characterized by the materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Definitions

  • the utility model relates to a light-emitting diode structure, in particular to a structure with a chip on board. Background technique
  • LEDs light-emitting diodes
  • a typical prior art LED structure includes an LED chip, a sapphire substrate, a silver paste, a support, a base substrate, a plurality of connecting wires, an encapsulant, and a heat dissipating aluminum substrate.
  • the LED chip is formed on the sapphire substrate, and the sapphire substrate including the LED chip is bonded to the holder by the silver paste, and the base substrate carries the holder.
  • the LED chip is connected to the bracket by a connecting wire, and the LED chip is covered with the encapsulant.
  • the bracket has an extension structure for contacting the heat dissipation aluminum substrate under the base substrate through the base substrate, thereby transferring heat generated by the LED chip to the heat dissipation aluminum substrate by heat conduction.
  • the main purpose of the utility model is to provide a chip-on-chip LED structure, which comprises a ceramic substrate, a heat radiation heat dissipation film, an LED chip, an adhesive thermal conductive layer, a circuit layer, a plurality of connecting lines, a nano glaze layer, a fluorescent glue and an encapsulant.
  • the chip-on-board (COB) structure for placing the LED chip on the ceramic substrate is realized.
  • the heat radiation heat dissipating film is placed on the ceramic substrate, and the LED chip is bonded to the heat radiation heat dissipating film by using a thermal conductive layer.
  • the nano-glaze layer surrounds the heat radiation heat-dissipating film to provide electrical isolation protection.
  • the circuit layer is on the nanoglaze layer and has a circuit pattern and is connected to the LED chip via the connection line.
  • the fluorescent glue is coated on the LED chip to provide fluorescence, and the encapsulant covers the circuit layer, the connecting line, the nanoglaze layer and the fluorescent glue.
  • the circuit layer can be coated on the nano glaze layer by coating, and then formed by baking. Therefore, the circuit layer comprises an adhesive thermal conductive layer instead of a common copper or copper alloy, thereby facilitating the use of the coating process. To make the desired circuit pattern, No need to use the lithography process.
  • FIG. 1 is a schematic view showing the structure of a chip-on-board LED according to the present invention. detailed description
  • the chip-on-board light emitting diode (COB LED) structure 1 of the present invention includes a ceramic substrate 10 , a heat radiation heat dissipation film 20 , an LED chip 30 , a thermal conductive layer 40 , a circuit layer 50 , and a plurality of
  • the connection line 60, the nano glaze layer 70, the fluorescent glue 80, and the encapsulant 90 are used to implement a chip-on-board (COB) structure in which the LED chip 30 is placed on the ceramic substrate 10.
  • the ceramic substrate 10 has electrical insulating properties and is composed of a ceramic material, which may include one of alumina, aluminum nitride, zirconium oxide, and calcium fluoride.
  • the heat radiation heat dissipation film 20 is formed on the ceramic substrate 10, and the heat radiation heat dissipation film 20 is mainly composed of a combination of metal and nonmetal, and the composition contains at least silver, copper, tin, aluminum, titanium, iron and bismuth. And an oxide or a nitride or a mineral acid compound comprising at least one of boron and carbon, for example, a titanium strontium halide.
  • the heat radiation heat dissipating film 20 has a microstructure of a crystal, wherein the size of the crystal may be between several micrometers and several nanometers. It is believed that the crystal body can generate a specific crystal oscillation, thereby radiating a high efficiency heat radiation spectrum, such as The spectrum of the infrared or far infrared range propagates downward, as shown by the thermal radiation R in the figure.
  • the LED chip 30 is formed on a sapphire substrate (displayed in the figure), and may include at least an N-type semiconductor layer, a semiconductor light-emitting layer, and a P-type semiconductor layer which are sequentially stacked.
  • the N-type semiconductor layer may be N-type GaN (nitrogen).
  • the semiconductor luminescent layer may comprise gallium nitride or indium gallium nitride
  • the p-type semiconductor layer may be a P-type GaN layer, wherein the P-type GaN layer and the N-type GaN layer are electrically connected to the outside by electrical connection lines, respectively
  • the positive and negative terminals of the power source (not shown) are used to turn on the LED chip 30, that is, forward bias, so that the semiconductor light-emitting layer generates a composite action of electron hole pairs to emit light.
  • the adhesive thermal conductive layer 40 is used to connect the LED chip 30 to the heat radiation heat dissipating film 20, wherein the thermal conductive layer 40 is used for sticking silver or tin glue, or a copper-tin alloy or a gold-tin alloy for co-gold.
  • the circuit layer 50 is disposed on the nano glaze layer 70, has a circuit pattern, and may be formed of a conductive material.
  • the adhesive thermal conductive layer 40 may be coated on the nano glaze layer 70 by a coating method and then baked to form an adhesive thermal conductive layer. 40 circuit patterns.
  • the connecting wire 60 is used to connect the LED chip 30 to the circuit layer 50, that is, the positive electrode and the negative electrode of the LED chip 30 are respectively connected to the positive and negative terminals of the circuit layer 50 via the connecting wire 60, thereby providing a point for the point. The power of the LED chip 30 is illuminated.
  • the nano glaze layer 70 has electrical insulation properties and is located on the heat radiation heat dissipation film 20 and surrounds the LED chip 30 and the heat radiation heat dissipation film 20 to provide electrical isolation protection.
  • the nano glaze layer 70 may be formed by sintering of nanoparticles, and the nanoparticles may include one of alumina, aluminum nitride, zirconium oxide, and calcium fluoride.
  • a fluorescent gel 80 is coated on the LED chip 30 to provide a fluorescent effect, which converts the original light emitted by the LED chip 30 into an output light having an appropriate color temperature, such as converting ultraviolet light into bluish or reddish visible light.
  • the encapsulant 90 has high light transmittance and electrical insulation, and covers the circuit layer 50, the connecting wire 60, the nano glaze layer 70 and the fluorescent glue 80.
  • the encapsulant 90 may be composed of a material including silica gel or epoxy.
  • the COB LED structure of the present invention may further comprise a light-hooking layer 95 composed of a highly transparent material and having an atomized surface, that is, a matte surface, for deflecting the traveling direction of the light emitted by the LED chip 30. Produces a more uniform output light.
  • the surface roughness Ra of the hook layer 95 is between about 10 and 2,000.
  • the utility model is characterized in that the ceramic substrate is used as the carrier plate, and the nano glaze layer is used as the interlayer insulating layer between adjacent circuit layers, so that the electrical characteristics of the overall LED structure are improved, and the temperature resistance range is further improved. At the same time, reduce the complexity of the LED structure, increase the yield and reliability of the product.
  • circuit layer can be coated on the nano glaze layer by coating, and then formed by baking, so that the circuit layer comprises an adhesive thermal layer instead of ordinary copper or Copper alloys make it easy to use the coating process to create the desired circuit pattern without the need for a lithography process.
  • the heat radiation heat dissipation film can generate high-efficiency heat radiation, thereby quickly removing heat generated by the LED chip, thereby reducing the operating temperature of the LED chip, improving the luminous efficacy of the LED chip and prolonging the service life. limit.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Led Device Packages (AREA)

Description

板上芯片发光二极管结构 技术领域
本实用新型涉及一种发光二极管结构, 尤其是具有板上芯片的结构。 背景技术
近年来, 随着环保、 节能及减碳的世界风潮的逐渐盛行, 发光二极管 (LED)因具有高发 光效率而成为取代一般发光源的最重要选项之一。
一般现有技术的 LED结构包括 LED芯片、 蓝宝石基板、 银胶、 支架、 底座基板、 多个 连接线、 封装胶及散热铝基板。 LED芯片在蓝宝石基板上形成, 利用银胶将包含 LED芯片 的蓝宝石基板连结至支架上, 底座基板承载支架。 利用连接线连接 LED芯片至支架, 且以 封装胶包覆 LED芯片。 支架具延伸体结构, 用以贯穿底座基板而与底座基板底下的散热铝 基板接触, 藉以将 LED芯片所产生的热量以热传导方式传播至散热铝基板。
随着高功率 LED的应用需求, 比如高亮度照明或大尺寸显示器用背光模块, 必须加大 散热铝基板的表面积, 因而使得整体 LED结构的重量及体积增加, 而变得非常笨重, 不利 于使用。 此外, 支架也常常造成产品良率的降低, 以额外的增加成本。 因此, 需要一种不需 支架及散热铝基板且具高效率散热以直接安置发光二极管于陶瓷基板上的发光二极管结构, 以解决上述现有技术的问题。 实用新型内容
本实用新型的主要目的在于提供一种板上芯片发光二极管结构,包括陶瓷基板、热辐射 散热薄膜、 LED 芯片、 黏着导热层、 电路层、 多个连接线、 纳米釉层、 荧光胶及封装胶, 藉以实现将 LED芯片安置在陶瓷基板上的板上芯片 (Chip-On-Board, COB)结构。
热辐射散热薄膜位于陶瓷基板上, LED 芯片利用薪着导热层而连结至热辐射散热薄膜 上。纳米釉层包围住热辐射散热薄膜, 藉以提供电隔绝的保护隔离作用。 电路层位于纳米釉 层上且具有电路图案, 并经所述连接线以连接至 LED芯片。荧光胶涂布在 LED芯片上以提 供荧光作用, 而封装胶包覆住电路层、 所述连接线、 纳米釉层及荧光胶。
电路层可利用涂布方式将黏着导热层涂布在纳米釉层上,再经烘烤后而形成, 因此电路 层包含黏着导热层,而非一般的铜或铜合金,藉以方便利用涂布制程以制作所需的电路图案, 而不需使用微影制程。 附图说明
图 1为依据本实用新型所述板上芯片发光二极管结构的示意图。 具体实施方式
以下配合说明书附图对本实用新型的实施方式做更详细的说明,以使本领域技术人员在 研读本说明书后能据以实施。
参阅图 1, 为本实用新型所述板上芯片发光二极管结构的示意图。 如图 1所示, 本实用 新型所述的板上芯片发光二极管 (COB LED)结构 1包括陶瓷基板 10、 热辐射散热薄膜 20、 LED芯片 30、 薪着导热层 40、 电路层 50、 多个连接线 60、 纳米釉层 70、 荧光胶 80及封装 胶 90, 藉以实现将 LED芯片 30安置在陶瓷基板 10上的板上芯片 (COB)结构。
陶瓷基板 10具电气绝缘特性且由陶瓷材料构成, 该陶瓷材料可包括氧化铝、 氮化铝、 氧化锆及氟化钙的其中之一。
热辐射散热薄膜 20形成于陶瓷基板 10上, 且热辐射散热薄膜 20主要是包含金属与非 金属的组合物, 且该组合物包含银、铜、锡、铝、钛、铁及锑的至少其中之一, 以及包含硼、 碳的至少其中之一的氧化物或氮化物或无机酸机化物, 例如, 钛锑卤化物。此外, 热辐射散 热薄膜 20具有结晶体的显微结构, 其中结晶体的大小可为数微米至数纳米之间, 据信, 该 结晶体可产生特定的晶体振荡,藉以辐射出高效率的热辐射光谱, 比如红外线或远红外线范 围的光谱, 进而向下传播, 如图中的热辐射 R所示。
LED芯片 30是在蓝宝石基板 (图中位显示)上形成, 并至少可包括依序堆栈的 N型半导 体层、 半导体发光层、 P型半导体层, 比如 N型半导体层可为 N型 GaN (氮化镓)层, 半导 体发光层可包含氮化镓或氮化铟镓, P型半导体层可为 P型 GaN层, 其中 P型 GaN层及 N 型 GaN层分别藉电气连接线而电气连接至外部电源 (图中未显示)的正电端及负电端, 藉以 导通 LED芯片 30, 亦即顺向偏压, 而使得半导体发光层产生电子电洞对的复合作用以发射 光线。
黏着导热层 40用以连结 LED芯片 30至热辐射散热薄膜 20上, 其中薪着导热层 40用 以黏着的银胶或锡胶, 或是用以共金的铜锡合金或金锡合金。
电路层 50位于纳米釉层 70上, 具有电路图案, 且可由导电材料构成, 比如可利用涂布 方式将黏着导热层 40涂布于纳米釉层 70上再经烘烤后而形成具黏着导热层 40的电路图案。 所述连接线 60用以连接 LED芯片 30至电路层 50, 亦即将 LED芯片 30的正极及负极 经所述连接线 60分别连接至电路层 50的正电端及负电端, 藉以提供用于点亮 LED芯片 30 的电力。
纳米釉层 70具电气绝缘特性,位于热辐射散热薄膜 20上, 并包围住 LED芯片 30及热 辐射散热薄膜 20, 藉以提供电隔绝的保护隔离作用。 纳米釉层 70可由纳米颗粒经烧结而形 成, 且纳米颗粒可包括氧化铝、 氮化铝、 氧化锆及氟化钙的其中之一。
荧光胶 80涂布在 LED芯片 30上以提供荧光作用, 可使 LED芯片 30所发射的原始光 线转换成具适当色温的输出光线, 比如将紫外光转换成偏蓝或偏红的可见光。
封装胶 90具高透光性及电气绝缘性, 且包覆住电路层 50、 所述连接线 60、 纳米釉层 70及荧光胶 80。 封装胶 90可由包括硅胶或环氧树脂的材料构成。
本实用新型所述的 COB LED结构可进一步包括勾光层 95,由高透光性材料构成且具有 雾化的表面,亦即雾面,用以偏折 LED芯片 30所发射的光线的行进方向而产生更加均勾的 输出光线。 通常, 勾光层 95的表面粗糙度 Ra约为 10至 2000之间。
本实用新型的特点在于,利用陶瓷基板当作承载板,且纳米釉层当作相邻电路层之间的 层间绝缘层, 使得整体 LED结构的电气特性获得改善, 且耐温范围也进一步提高, 同时降 低 LED结构的复杂度, 增加产品的良率及可靠度。
本实用新型的另一特点在于, 电路层可利用涂布方式将黏着导热层涂布在纳米釉层上, 再经烘烤后而形成, 因此电路层包含黏着导热层, 而非一般的铜或铜合金, 藉以方便利用涂 布制程以制作所需的电路图案, 而不需使用微影制程。
本实用新型的再一特点在于, 热辐射散热薄膜可产生高效率的热辐射, 藉以快速移除 LED芯片所产生的热量, 因而降低 LED芯片的操作温度, 提高 LED芯片的发光效能及延 长使用寿限。
以上所述仅为用以解释本实用新型的较佳实施例,并非企图据以对本实用新型做任何形 式上的限制, 因此, 凡有在相同的创作精神下所作有关本实用新型的任何修饰或变更, 皆仍 应包括在本实用新型意图保护的范畴。

Claims

权利要求
1. 一种板上芯片发光二极管结构, 其特征在于, 包括:
一陶瓷基板, 具电气绝缘特性且由陶瓷材料构成;
一热辐射散热薄膜, 形成于该陶瓷基板上, 具热辐射散热功能;
一发光二极管芯片, 是在蓝宝石基板上形成;
一黏着导热层, 连结该发光二极管芯片至该热辐射散热薄膜上;
一纳米釉层,具电气绝缘特性,由纳米颗粒经烧结而形成,并包围住该热辐射散热薄膜; 一电路层, 位于该纳米釉层上, 且具有一电路图案, 并可由导电材料构成, 利用涂布方 式将薪着导热层涂布在该纳米釉层上经烘烤后而形成具薪着导热层的电路图案;
多个连接线, 用以连接该发光二极管芯片至该电路层; 以及
一荧光胶, 涂布在该发光二极管芯片上以提供荧光作用; 以及
一封装胶, 具高透光性及电气绝缘性, 且包覆住该电路层、 所述连接线、 该纳米釉层及 该荧光胶。
2. 如权利要求 1所述板上芯片发光二极管结构, 其特征在于, 该陶瓷材料包括氧化铝、 氮化铝、 氧化锆及氟化钙的其中之一。
3. 如权利要求 1所述板上芯片发光二极管结构, 其特征在于, 该 LED芯片至少包括依 序堆栈的 N型半导体层、半导体发光层、 P型半导体层, 该半导体发光层在顺向偏压下经电 子电洞对的复合作用而产生光线。
4. 如权利要求 1所述板上芯片发光二极管结构, 其特征在于, 该电路层的电路图案利 用涂布方式将薪着导热层涂布在该纳米釉层上经烘烤后而形成。
5. 如权利要求 1所述板上芯片发光二极管结构, 其特征在于, 该纳米釉层的纳米颗粒 包括氧化铝、 氮化铝、 氧化锆及氟化钙的其中之一。
6. 如权利要求 1所述板上芯片发光二极管结构, 其特征在于, 该封装胶由包括硅胶或 环氧树脂的材料所构成。
7. 如权利要求 1所述板上芯片发光二极管结构, 其特征在于, 进一步包括一勾光层, 该勾光层由高透光性材料构成且具有雾化表面, 该勾光层的雾化表面具有表面粗糙度 Ra为 10至 2000之间。
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