WO2011132340A1 - Method for producing low reflection substrate, method for manufacturing photovoltaic device, and photovoltaic device - Google Patents

Method for producing low reflection substrate, method for manufacturing photovoltaic device, and photovoltaic device Download PDF

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Publication number
WO2011132340A1
WO2011132340A1 PCT/JP2010/069618 JP2010069618W WO2011132340A1 WO 2011132340 A1 WO2011132340 A1 WO 2011132340A1 JP 2010069618 W JP2010069618 W JP 2010069618W WO 2011132340 A1 WO2011132340 A1 WO 2011132340A1
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Prior art keywords
substrate
etching
manufacturing
diffusion layer
film
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PCT/JP2010/069618
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French (fr)
Japanese (ja)
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秀一 檜座
松野 繁
邦彦 西村
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三菱電機株式会社
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Priority to JP2012511512A priority Critical patent/JP5430751B2/en
Publication of WO2011132340A1 publication Critical patent/WO2011132340A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0236Special surface textures
    • H01L31/02363Special surface textures of the semiconductor body itself, e.g. textured active layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Definitions

  • the present invention relates to a method for manufacturing a low reflection substrate, a method for manufacturing a photovoltaic device, and a photovoltaic device.
  • the texture processing is processing for intentionally forming fine irregularities having dimensions of several tens of nm to several tens of ⁇ m on the substrate surface.
  • a thin film layer (protective film) serving as a mask formed on the entire surface of the substrate is partially provided with an opening by a method such as sandblasting, and then the etching solution is used.
  • a technique for forming a recess in a substrate portion corresponding to a mask opening by dipping has been disclosed (see, for example, Patent Document 1).
  • a texture on a silicon substrate when the substrate is a single crystal substrate, anisotropy using the crystal orientation by an aqueous alkali solution such as sodium hydroxide or potassium hydroxide having a crystal orientation dependency on the etching rate. Etching is widely used. For example, when this anisotropic etching is performed on the (100) silicon substrate surface, a pyramidal texture with the (111) plane exposed is formed on the substrate surface.
  • the present invention has been made in view of the above, and a method for manufacturing a low-reflection substrate, a method for manufacturing a photovoltaic device, and a higher method capable of reducing the reflection of the substrate by shorter-time anisotropic etching
  • An object is to obtain a photovoltaic device having photoelectric conversion efficiency.
  • the present invention includes a step of forming a high concentration impurity diffusion layer on a main surface of a (100) single crystal silicon substrate, and a resistance to the high concentration impurity diffusion layer.
  • a step of forming an etchable film a step of subjecting the etch resistant film to a sandblasting process to form an opening penetrating the etch resistant film and reaching the high-concentration impurity diffusion layer; and Using the formed etching resistant film as a protective mask, performing an anisotropic etching using an alkaline aqueous solution with which the etching resistant film has resistance through the opening, and the etching resistance after the etching And a step of removing the film.
  • the anisotropic etching rate of silicon by the alkaline aqueous solution can be increased, and etching for uniformly forming the texture on the entire surface of the substrate. There is an effect that the time can be shortened.
  • FIG. 1 is a cross-sectional view showing a p-type single crystal silicon substrate whose surface has been subjected to low reflection by the substrate roughening method according to the first embodiment of the present invention.
  • FIGS. 2-1 is sectional drawing explaining the process of the manufacturing method of the low reflection board
  • FIG. 2-2 is a cross-sectional view for explaining a process of the method for manufacturing the low reflection substrate according to the first and second embodiments of the present invention.
  • FIG. 2-3 is a cross-sectional view for explaining a process of the method for manufacturing the low-reflection substrate according to the first embodiment of the present invention.
  • FIGS. 2-1 is sectional drawing explaining the process of the manufacturing method of the low reflection board
  • FIG. 2-2 is a cross-sectional view for explaining a process of the method for manufacturing the low reflection substrate according to the first and second embodiments of the present invention.
  • FIG. 2-3 is a
  • FIGS. 2-5 are cross-sectional views for explaining a process of the method for manufacturing the low-reflection substrate according to the first embodiment of the present invention.
  • FIG. 3A is a top view of the photovoltaic device manufactured by using the low reflection substrate manufactured by the method of manufacturing the low reflection substrate according to the first embodiment of the present invention.
  • FIG. 3-2 is a cross-sectional view of the photovoltaic device manufactured using the low reflection substrate manufactured by the low reflection substrate manufacturing method according to the first embodiment of the present invention.
  • FIGS. 4-1 is sectional drawing explaining the process of the manufacturing method of the low reflection board
  • FIG. 4-2 is a top view for explaining a process of the method for manufacturing the low-reflection substrate according to the second embodiment of the present invention.
  • FIGS. 4-3 is sectional drawing explaining the process of the manufacturing method of the low reflection board
  • FIGS. FIGS. 4-4 is sectional drawing explaining the process of the manufacturing method of the low reflection board
  • FIGS. FIGS. 4-5 is sectional drawing explaining the process of the manufacturing method of the low reflection board
  • FIG. 5A is a top view of the photovoltaic device manufactured using the low-reflection substrate manufactured by the low-reflection substrate manufacturing method according to the second embodiment of the present invention.
  • FIG. 5A is a top view of the photovoltaic device manufactured using the low-reflection substrate manufactured by the low-reflection substrate manufacturing method according to the second embodiment of the present invention.
  • FIG. 5B is a cross-sectional view of the photovoltaic device manufactured using the low reflection substrate manufactured by the method of manufacturing the low reflection substrate according to the second embodiment of the present invention.
  • FIG. 6 is a diagram comparing the effect of reducing the substrate reflection according to the first embodiment of the present invention with the comparative example in terms of the reflectance at a wavelength of 628 nm and the weight difference before and after etching.
  • Embodiments of a low reflection substrate manufacturing method, a photovoltaic device manufacturing method, and a photovoltaic device according to the present invention will be described below in detail with reference to the drawings.
  • this invention is not limited by this embodiment, In the range which does not deviate from the summary, it can change suitably.
  • the material of the substrate and the use of the substrate with low reflection are not particularly limited, but as an example, low reflection of a (100) single crystal silicon substrate will be described.
  • the substrate will be described as being used for manufacturing a single crystal silicon solar cell.
  • the scale of each member may be different from the actual for easy understanding, and the same applies to the drawings.
  • FIG. 1 shows a p-type single crystal silicon substrate 1 (a solar cell substrate that is a photovoltaic device) that has been subjected to low surface reflection by the substrate manufacturing method according to the present embodiment.
  • 1 is a cross-sectional view showing a substrate 1).
  • textured recesses 5 having pyramidal irregularities with an average pitch between holes of about 1 to 10 ⁇ m are formed substantially uniformly on the substrate surface.
  • the manufacturing method of the low reflection substrate according to the first embodiment includes a first step of forming a protective film on the surface of the substrate, and a first step of forming a partial opening in the protective film by subjecting the protective film to a blasting process. Two steps, a third step of etching the surface of the substrate on which the protective film is formed using the protective film having an opening as a mask, under a condition that the protective film is resistant, and a fourth step of removing the protective film Including.
  • FIGS. 2-1 to 2-5 are cross-sectional views for explaining the steps of the manufacturing method of the low reflection substrate according to the first embodiment.
  • the manufacturing method of the low reflection substrate according to the first embodiment will be described with reference to these drawings.
  • a high concentration is applied to the surface of one surface side of a p-type single crystal silicon substrate 1a (hereinafter referred to as substrate 1a) which is a target for reducing the reflection of the substrate surface.
  • substrate 1a a p-type single crystal silicon substrate 1a
  • An n-type diffusion layer 2 is formed.
  • the substrate 1a in the present embodiment is a (100) single crystal silicon substrate that is widely used for consumer solar cells.
  • damage during slicing is removed by wet etching using an acid or alkali solution.
  • the thickness of the substrate 1a after removing the damage is 200 ⁇ m and the dimensions are 156 mm ⁇ 156 mm.
  • substrate 1a is not limited to this, It can change suitably.
  • the high-concentration n-type diffusion layer 2 is formed by introducing the substrate 1a into a thermal oxidation furnace and heating it in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorus glass on the surface of the substrate 1a. Formed by diffusing phosphorus inside.
  • the diffusion temperature is set to 840 ° C., for example. After forming the diffusion layer, it is immersed in a hydrofluoric acid solution to remove the phosphorus glass layer.
  • the surface of the substrate 1a on which the high-concentration n-type diffusion layer 2 that is a target for reducing the reflection of the substrate surface is formed as a protective film on the surface to be described later.
  • a film 3 having etching resistance (hereinafter referred to as an etching resistant film) 3 is formed.
  • the etching resistant film 3 is a 100 nm thick silicon thermal oxide film (hereinafter referred to as SiO 2 film) formed by thermal oxidation.
  • SiO 2 film silicon thermal oxide film
  • SiN silicon nitride film
  • SiON silicon oxynitride film
  • SiON film amorphous silicon film formed by the plasma CVD method as the etching resistant film 3
  • pedia-Si diamond-like carbon film or the like may be used.
  • fine hole processing is performed on the etching resistant film 3 as shown in FIG. That is, a plurality of fine openings 4 are opened in the etching resistant film 3 by sandblasting.
  • the fine opening 4 formed here penetrates the etching resistant film 3 and reaches the high concentration n-type diffusion layer 2.
  • alumina abrasive grains are used as abrasive grains for blast processing.
  • the inventors of the present application searched for the most suitable abrasive for opening an opening in the SiO 2 film that is the etching resistant film 3 without causing cracks in the substrate, and as a result of repeated research, the alumina abrasive grains were the most suitable. It came to the knowledge that it was suitable.
  • the abrasive grains for the blasting treatment are not limited to this, and other abrasive grains other than the alumina abrasive grains may be used as long as the fine openings 4 can be opened in the etching resistant film 3.
  • an alkali is applied to one surface of the substrate 1a on which the high-concentration n-type diffusion layer 2 is formed on the side on which the etching resistance film 3 is formed, using the etching resistance film 3 subjected to micro-hole processing as a mask.
  • An anisotropic etching with an aqueous solution is performed to form a textured recess 5 through the fine opening 4 as shown in FIG. 2-4.
  • an alkaline aqueous solution used for etching for example, a sodium hydroxide aqueous solution is used.
  • the concentration of the aqueous alkaline solution is 1 weight percent, and the temperature is 80 ° C.
  • an additive such as isopropyl alcohol may be added to the alkaline aqueous solution.
  • the concentration and temperature of the alkaline aqueous solution can be appropriately changed according to the required etching amount and time.
  • the textured recess 5 is exposed by removing the etching resistant film 3.
  • a hydrofluoric acid aqueous solution can be used to remove the etching resistant film 3.
  • a texture structure having a fine pattern of, for example, about 10 ⁇ m can be formed on the surface of the substrate 1a.
  • the p-type single crystal silicon substrate in which the substrate surface has been subjected to low reflection through the above steps is the substrate 1 in FIG.
  • the photoluminescence shown in the top view of FIG. 3-1 and the cross-sectional view of FIG. 3-2 is used.
  • a process for manufacturing the power device 10 will be described.
  • the process demonstrated here is the same as the manufacturing process of the photovoltaic apparatus using a general single crystal silicon substrate, the process in the middle is not illustrated in particular.
  • the substrate 1 that has been subjected to the process of the fifth step is put into a thermal oxidation furnace and heated in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorous glass on the surface of the substrate 1. Then, phosphorus is diffused to form an n-type diffusion layer 11a in the surface layer of the substrate 1 (FIG. 3-2).
  • the diffusion temperature is 840 ° C., for example.
  • a SiN film is formed on the n-type diffusion layer 11a as the antireflection film 12 by plasma CVD.
  • the antireflection film 12 is formed in a region excluding the formation region of the light receiving surface side electrode 13 to be formed later (FIG. 3-2).
  • the film thickness and refractive index of the antireflection film 12 are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked. Further, the antireflection film 12 may be formed by a different film forming method such as a sputtering method.
  • the light-receiving surface side electrode 13 includes a bus electrode 13a and a grid electrode 13b of the photovoltaic device 10 (FIG. 3-1), and FIG. 3-2 shows a cross-sectional view in a cross section perpendicular to the longitudinal direction of the grid electrode 13b. Yes. As described above, the photovoltaic device 10 shown in FIGS. 3-1 and 3-2 is manufactured.
  • the photovoltaic device 10 includes a semiconductor substrate 1 having an n-type diffusion layer 11a on a substrate surface layer, an antireflection film 12 and a light receiving surface side electrode 13 formed on a light receiving surface side (front surface) of the semiconductor substrate 1,
  • a photovoltaic device of 15 cm ⁇ is provided that includes a back electrode 14 formed on a surface (back surface) opposite to the light receiving surface.
  • the reflectance characteristics of the substrate 1 were evaluated with a spectrophotometer at the time when the low reflection of the substrate 1 was performed. Of these, the reflectance at a wavelength of 628 nm and the weight difference before and after etching are shown in FIG.
  • the first and second steps were not carried out, but the second and subsequent steps were carried out to produce a concavo-convex substrate.
  • the alkali anisotropic etching time in the fourth step is the same as the alkali anisotropic etching time in the substrate 1 subjected to low reflection by the substrate manufacturing method according to the first embodiment.
  • the light reflection characteristics of the substrate of the comparative example were evaluated with a spectrophotometer. Of these, the reflectance at a wavelength of 628 nm and the weight difference before and after etching are also shown in FIG.
  • the weight difference before and after the etching is compared with the substrate 1 that has been roughened by the roughening method of the substrate according to the first embodiment, even though the etching time is the same.
  • a difference of about 1.8 times occurs with the substrate of the example, which shows that the etching of silicon progressed at a higher etching rate by using the substrate roughening method according to this example.
  • the reflectance at a wavelength of 628 nm is 19.1% in the substrate of the comparative example, whereas the surface is roughened by the method of roughening the substrate according to the first embodiment.
  • the substrate 1 it can be suppressed to 13.9%.
  • the substrate 1 roughened by the substrate roughening method according to the first embodiment has a non-etched flat region remaining on the surface even when alkali anisotropic etching is performed for the same time. It was a little, and it turned out that the better reflectance suppression effect is exhibited.
  • the etching reaction of silicon with an aqueous alkali solution occurs when hydroxide ions present in the aqueous solution act on the silicon substrate surface.
  • anisotropic etching in which the (111) plane having the highest atomic density is exposed occurs in the silicon crystal having a diamond structure.
  • the silicon crystal having a diamond structure anisotropic etching in which the (111) plane having the highest atomic density is exposed occurs.
  • the silicon crystal contains more impurities and defects than a region with a low doping concentration. For this reason, the lattice arrangement of silicon tends to be disturbed as compared with a region where high concentration doping is not performed. This tendency is particularly remarkable on the outermost surface where the impurity density is high.
  • etching anisotropy that is, an etching rate difference due to the crystal structure is less likely to occur, and the etching progress of silicon is somewhat isotropic. proceed.
  • Layer The etching of the outermost part proceeds somewhat close to isotropic. Therefore, an undercut occurs in a very thin region below the etching resistant film 3 simultaneously with the alkali immersion.
  • the silicon (111) spatially limited by the undercut region is formed.
  • Anisotropic etching proceeds so that the surface is exposed. Therefore, in the method for manufacturing the low reflection substrate according to the present embodiment, the region of the high-concentration n-type diffusion layer 2 is etched by alkali, not the etching rate of the (111) plane in the p-type single crystal silicon substrate 1a. As a result, anisotropic etching controlled by the lateral spreading speed of the undercut region is generated.
  • the high-concentration n-type diffusion layer 2 does not exist below the etching resistant film 3 (protective film), and the lattice state is maintained from directly below the protective film.
  • the etching resistant film 3 protective film
  • the lattice state is maintained from directly below the protective film.
  • the ratio of the lateral spread rate of the undercut region formed by etching of the high-concentration n-type doped region and the lateral spread rate by etching of the silicon (111) surface not subjected to high-concentration doping is the concentration of the alkaline aqueous solution used for etching.
  • the result that the lateral spread of the former proceeds about 2-8 times faster can be obtained. It was.
  • the etching rate of silicon obtained by the manufacturing method of the low reflection substrate according to the present embodiment is higher than the etching rate of silicon obtained by the comparative example, and the texture on the entire surface of the substrate in a shorter time. It is thought that the formation was possible.
  • the high concentration n-type diffusion layer 2 is formed in the lower layer of the etching resistant film 3 in the first step. This makes it possible to increase the etching rate of the (111) plane in alkali anisotropic etching, that is, to increase the etching speed, and to form uniform irregularities in the plane in a shorter time. become.
  • the reflectance of the substrate surface can be suppressed even in a short anisotropic etching process.
  • the lateral spreading etching rate from the opening is increased compared to the case without a diffusion layer even in the case of using a highly anisotropic alkaline solution, and the time is reduced.
  • a uniform texture can be formed on the entire surface of the substrate by this anisotropic etching process.
  • the photovoltaic device 10 using the substrate 1 whose surface has been subjected to low reflection by the substrate manufacturing method according to the first embodiment. Therefore, the surface light reflection loss on the substrate surface on the light incident side is greatly reduced. Therefore, the photoelectric conversion efficiency can be improved, and a photovoltaic device having higher photoelectric conversion efficiency can be manufactured.
  • FIG. FIGS. 4-1 to 4-5 are a cross-sectional view and a top view for explaining the steps of the manufacturing method of the low reflection substrate according to the second embodiment.
  • the substrate roughening method according to the second embodiment will be described below with reference to these drawings.
  • the same members as those shown in FIGS. 2-1 to 2-5 are denoted by the same reference numerals, and detailed description thereof is omitted.
  • the first step is the same as the first step of the manufacturing method of the low reflection substrate according to the first embodiment.
  • a high-concentration n-type diffusion layer 2 is formed on the surface of one side of the crystalline silicon substrate 1a (hereinafter referred to as the substrate 1a).
  • the high-concentration n-type diffusion layer 2 is formed by putting the substrate 1a into a thermal oxidation furnace and heating it in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorus glass on the surface of the substrate 1a. Forms by diffusing phosphorus.
  • the diffusion temperature is set to 840 ° C., for example. After forming the diffusion layer, it is immersed in a hydrofluoric acid solution to remove the phosphorus glass layer.
  • the second step is the same as the second step of the manufacturing method of the low-reflection substrate according to the first embodiment, and as shown in FIG.
  • An etching resistant film 3 having etching resistance to etching described later is formed as a protective film on the surface on one side of the substrate 1a on which the layer 2 is formed.
  • the surface of the substrate 1a that has completed the second step has resistance to the subsequent sandblasting process.
  • a blast-resistant protective film 21 is partially formed.
  • 4A is a cross-sectional view of the substrate 1a to be subjected to low reflection
  • FIG. 4-2 is a top view of the substrate 1a.
  • the blast resistant protective film 21 includes a blast resistant protective film 21a for a bus electrode part and a blast resistant protective film 21b for a grid electrode part.
  • a sectional view in a section perpendicular to the longitudinal direction of the film 21b is shown.
  • the blast resistant protective film 21 for example, a polyurethane resin having a film thickness of 100 ⁇ m formed by a screen printing method is used.
  • the thickness and material of the blast resistant protective film 21 may be different from each other as long as the underlying etching resistant film 3 can be protected from blasting.
  • the formation method of the blast-resistant protective film 21 is not limited to the screen printing method, and may be formed by different means such as a gravure printing method and an ink jet method.
  • a sand blast process is performed on the substrate 1a after the completion of the third process, and a fine hole process is performed on the etching resistant film 3. That is, a plurality of fine openings 4 are opened in the etching resistant film 3 by blast processing.
  • the blast-resistant protective film 21 is used as a mask at the portion where the blast-resistant protective film 21 is formed in the third step, and processing of the etching-resistant film 3 is hindered.
  • a fine opening 4 is formed so as to penetrate the high resistance n-type diffusion layer 2.
  • the etching-resistant film 3 on which micro-hole processing has been performed is used as a mask on one surface of the substrate 1a on the side where the etching-resistant film 3 is formed.
  • anisotropic etching with an aqueous alkali solution is performed to form a textured recess 5 through the fine opening 4 as shown in FIG. 4-4.
  • the alkaline aqueous solution used for etching for example, a sodium hydroxide aqueous solution is used.
  • the concentration of the aqueous alkaline solution is 1 weight percent, and the temperature is 80 ° C.
  • an additive such as isopropyl alcohol may be added to the alkaline aqueous solution.
  • the concentration and temperature of the alkaline aqueous solution can be appropriately changed according to the required etching amount and time. At this time, since the etching resistant film 3 in which the fine openings 4 are not formed remains in the portion where the blast resistant protective film 21 is formed in the third step, the texture recess 5 is not formed.
  • the texture recess 5 is exposed by removing the etching resistant film 3.
  • a hydrofluoric acid aqueous solution can be used to remove the etching resistant film 3.
  • a texture structure having a fine pattern of about 10 ⁇ m, for example, is formed on the surface of the substrate 1a other than the portion where the blast resistant protective film 21 is formed in the third step.
  • a p-type single crystal silicon substrate in which the substrate surface has been subjected to low reflection through the above steps is referred to as a substrate 1 '.
  • the region where the blast resistant protective film 21 is formed in the third step is a flat region 22 where the high concentration n-type diffusion layer 2 formed in the first step is exposed on the surface.
  • the substrate 1 ′ after the processing in the sixth step is put into a thermal oxidation furnace and heated in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorus glass on the surface of the substrate 1 ′.
  • Phosphorus is diffused into 1 ′ to form a low-concentration n-type diffusion layer 31b in the surface layer of the substrate 1 ′ (FIG. 5-2).
  • the diffusion temperature is 800 ° C., for example.
  • the high-concentration n-type diffusion layer 31a already formed in the flat region 22 already has a high-concentration impurity dopant, the high-concentration n-type diffusion layer 31a is subjected to the low-concentration diffusion process in this step.
  • the sheet resistance value of is equal to or less than that before the process.
  • an SiN film is formed on the low-concentration n-type diffusion layer 31 b by the plasma CVD method as the antireflection film 12.
  • the antireflection film 12 is formed in a region excluding the formation region of the light receiving surface side electrode 13 to be formed later (FIG. 5-2).
  • the film thickness and refractive index of the antireflection film 12 are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked. Further, the antireflection film 12 may be formed by a different film forming method such as a sputtering method.
  • a paste mixed with silver is printed by screen printing on the flat region 22 which is a non-textured region of the light receiving surface of the substrate 1 ′, and the paste mixed with aluminum is screened on the entire back surface of the substrate 1 ′.
  • a baking process is performed to form the light receiving surface side electrode 13 and the back surface electrode 14. Firing is performed at 760 ° C. in an air atmosphere, for example.
  • the light-receiving surface side electrode 13 includes the bus electrode 13a and the grid electrode 13b of the photovoltaic device 20 (FIG. 5-1), and the bus electrode portion of the flat region 22 where the high-concentration n-type diffusion layer 2 is exposed on the surface, respectively. It is formed immediately above the flat region and the grid electrode portion flat region.
  • FIG. 5-2 shows a cross-sectional view in a cross section perpendicular to the longitudinal direction of the grid electrode 13b. As described above, the photovoltaic device 20 shown in FIGS. 5A and 5B is manufactured.
  • the photovoltaic device 20 is formed on a semiconductor substrate 1 ′ having a high-concentration n-type diffusion layer 31a and a low-concentration n-type diffusion layer 31b on the surface of the substrate, and a light-receiving surface side surface of the semiconductor substrate 1 ′.
  • the photovoltaic device of 15 cm ⁇ is provided with the antireflection film 12, the light receiving surface side electrode 13, and the back surface electrode 14 formed on the surface (back surface) opposite to the light receiving surface.
  • the high-concentration n-type diffusion layer 2 is formed in the lower layer of the etching resistant film 3 in the first step. This makes it possible to increase the etching rate of the (111) plane in alkali anisotropic etching, that is, to increase the etching speed, and to form uniform irregularities in the plane in a shorter time. become.
  • the reflectance of the substrate surface can be suppressed even in a short anisotropic etching process.
  • the anti-blast protective film 21 in advance on the light receiving surface side electrode corresponding portion of the photovoltaic device, the high concentration n-type diffusion layer 2 on the electrode corresponding portion, that is, It is possible to leave the high concentration n-type diffusion layer 31a.
  • the photovoltaic device 20 using the substrate 1 ′ having the substrate surface reduced in reflection using the substrate manufacturing method according to the second embodiment described above is used. Since the power device is manufactured, the surface light reflection loss on the substrate surface on the light incident side is greatly reduced. Therefore, the photoelectric conversion efficiency can be improved. Further, since the high-concentration n-type diffusion layer 31a having a low sheet resistance is formed in advance on the portion corresponding to the light receiving surface side electrode, it is possible to improve electrical contact, that is, contact resistance.
  • a low concentration n-type diffusion layer 31b is formed in the light receiving surface region other than the portion corresponding to the light receiving surface side electrode, and recombination of surplus minority carriers generated by light incidence can be suppressed. Due to the above effects, a photovoltaic device having high photoelectric conversion efficiency can be manufactured.
  • the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention in the implementation stage.
  • the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent requirements. For example, even if some constituent elements are deleted from all the constituent elements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and is described in the column of the effect of the invention. When an effect is obtained, a configuration in which this configuration requirement is deleted can be extracted as an invention.
  • the constituent elements over different embodiments may be appropriately combined.
  • the method for manufacturing a low-reflection substrate, the method for manufacturing a photovoltaic device, and the photovoltaic device according to the present invention are useful for texture processing for improving photoelectric conversion efficiency. It is suitable for shortening the battery manufacturing time and improving the performance of solar cells.

Abstract

A method for producing a low reflection substrate according to one embodiment of the present invention comprises: a step wherein a high concentration impurity diffusion layer (2) is formed on a main surface of a (100) single crystal silicon substrate (1a); a step wherein an etching-resistant film (3) is formed on the high concentration impurity diffusion layer (2); a step wherein the etching-resistant film (3) is subjected to a sandblasting process so that an opening (4), which penetrates through the etching-resistant film (3) and reaches the high concentration impurity diffusion layer (2), is formed; a step wherein anisotropic etching is carried out via the opening (4) using an aqueous alkaline solution to which the etching-resistant film (3) is resistant, while having the etching-resistant film (3) provided with the opening (4) serve as a protective mask; and a step wherein the etching-resistant film (3) is removed after the etching.

Description

低反射基板の製造方法、光起電力装置の製造方法、および光起電力装置Low reflective substrate manufacturing method, photovoltaic device manufacturing method, and photovoltaic device
 本発明は、低反射基板の製造方法、光起電力装置の製造方法、および光起電力装置に関する。 The present invention relates to a method for manufacturing a low reflection substrate, a method for manufacturing a photovoltaic device, and a photovoltaic device.
 太陽電池等の光電変換装置の性能向上には、太陽電池を構成する基板内部に太陽光を効率良く取り込むことが重要である。このため、光入射側の基板表面にテクスチャ加工を施し、基板表面で一度反射した光を再度基板表面に入射させることで、より多くの太陽光を基板内部に取り込み、光電変換効率の向上を図っている。ここでテクスチャ加工とは、基板表面に意図的に数十nm~数十μmの寸法の微細凹凸を形成する加工のことである。 In order to improve the performance of photoelectric conversion devices such as solar cells, it is important to efficiently incorporate sunlight into the substrate constituting the solar cell. For this reason, texture processing is performed on the substrate surface on the light incident side, and light once reflected on the substrate surface is incident again on the substrate surface, so that more sunlight is taken into the substrate and the photoelectric conversion efficiency is improved. ing. Here, the texture processing is processing for intentionally forming fine irregularities having dimensions of several tens of nm to several tens of μm on the substrate surface.
 基板に所望の形状を有するテクスチャを形成する手法として、基板表面全面へ形成したマスクとなる薄膜層(保護膜)に、サンドブラスト加工などの手法で部分的に開口部を設けたのち、エッチング溶液に浸漬することで、マスク開口部に相当する基板部に凹部を形成する技術が開示されている(例えば、特許文献1参照)。 As a method of forming a texture having a desired shape on the substrate, a thin film layer (protective film) serving as a mask formed on the entire surface of the substrate is partially provided with an opening by a method such as sandblasting, and then the etching solution is used. A technique for forming a recess in a substrate portion corresponding to a mask opening by dipping has been disclosed (see, for example, Patent Document 1).
特開2004-287372号公報JP 2004-287372 A
 シリコン基板へテクスチャ形成を行う方法として、基板が単結晶基板の場合には、エッチング速度に結晶方位依存性を有する水酸化ナトリウムや水酸化カリウム等のアルカリ水溶液による、結晶方位を利用した異方性エッチングが広く用いられる。例えば、(100)シリコン基板表面に対してこの異方性エッチングを行うと、(111)面が露出したピラミッド状のテクスチャが基板表面に形成される。 As a method of forming a texture on a silicon substrate, when the substrate is a single crystal substrate, anisotropy using the crystal orientation by an aqueous alkali solution such as sodium hydroxide or potassium hydroxide having a crystal orientation dependency on the etching rate. Etching is widely used. For example, when this anisotropic etching is performed on the (100) silicon substrate surface, a pyramidal texture with the (111) plane exposed is formed on the substrate surface.
 しかし、部分的開口部を設けた保護膜を有する(100)単結晶シリコン基板を、このようなアルカリ水溶液を用いて異方性エッチングを行った場合、(111)面のエッチング速度は非常に遅いため、保護膜の部分開口部から横方向への凹部広がり速度が遅い。そのため、基板全面に均一にテクスチャを形成し、低反射化を図るためには長時間の異方性エッチング処理と、長時間の異方性エッチングに耐える膜厚を有する保護膜が必要であった。 However, when the (100) single crystal silicon substrate having a protective film provided with a partial opening is anisotropically etched using such an alkaline aqueous solution, the etching rate of the (111) plane is very slow. For this reason, the concave portion spreading speed in the lateral direction from the partial opening of the protective film is slow. Therefore, in order to form a uniform texture on the entire surface of the substrate and reduce reflection, a long-time anisotropic etching process and a protective film having a film thickness that can withstand long-time anisotropic etching are required. .
 本発明は、上記に鑑みてなされたものであって、より短時間の異方性エッチングで基板の低反射化が可能な低反射基板の製造方法、光起電力装置の製造方法、及びより高い光電変換効率を有する光起電力装置を得ることを目的とする。 The present invention has been made in view of the above, and a method for manufacturing a low-reflection substrate, a method for manufacturing a photovoltaic device, and a higher method capable of reducing the reflection of the substrate by shorter-time anisotropic etching An object is to obtain a photovoltaic device having photoelectric conversion efficiency.
 上述した課題を解決し、目的を達成するために、本発明は、(100)単結晶シリコン基板の主表面に高濃度不純物拡散層を形成する工程と、前記高濃度不純物拡散層の上に耐エッチング性膜を形成する工程と、前記耐エッチング性膜に対してサンドブラスト加工処理を施して当該耐エッチング性膜を貫通して前記高濃度不純物拡散層に達する開口を形成する工程と、前記開口が形成された前記耐エッチング性膜を保護マスクとして、当該開口を介して当該耐エッチング性膜が耐性を有するアルカリ水溶液を用いた異方性エッチングを行う工程と、前記エッチングの後に、前記耐エッチング性膜を除去する工程と、を含むことを特徴とする。 In order to solve the above-described problems and achieve the object, the present invention includes a step of forming a high concentration impurity diffusion layer on a main surface of a (100) single crystal silicon substrate, and a resistance to the high concentration impurity diffusion layer. A step of forming an etchable film, a step of subjecting the etch resistant film to a sandblasting process to form an opening penetrating the etch resistant film and reaching the high-concentration impurity diffusion layer; and Using the formed etching resistant film as a protective mask, performing an anisotropic etching using an alkaline aqueous solution with which the etching resistant film has resistance through the opening, and the etching resistance after the etching And a step of removing the film.
 本発明によれば、保護膜直下の基板表面に高濃度拡散層が存在するため、アルカリ水溶液によるシリコンの異方性エッチングレートを高めることができ、基板全面へ均一にテクスチャを形成するためのエッチング時間を短縮できるという効果を奏する。 According to the present invention, since a high-concentration diffusion layer exists on the substrate surface directly under the protective film, the anisotropic etching rate of silicon by the alkaline aqueous solution can be increased, and etching for uniformly forming the texture on the entire surface of the substrate. There is an effect that the time can be shortened.
図1は、本発明の実施の形態1にかかる基板の粗面化方法により表面の低反射化が施されたp型単結晶シリコン基板を示す断面図である。FIG. 1 is a cross-sectional view showing a p-type single crystal silicon substrate whose surface has been subjected to low reflection by the substrate roughening method according to the first embodiment of the present invention. 図2-1は、本発明の実施の形態1および2にかかる低反射基板の作製方法の工程を説明する断面図である。FIGS. 2-1 is sectional drawing explaining the process of the manufacturing method of the low reflection board | substrate concerning Embodiment 1 and 2 of this invention. 図2-2は、本発明の実施の形態1および2にかかる低反射基板の作製方法の工程を説明する断面図である。FIG. 2-2 is a cross-sectional view for explaining a process of the method for manufacturing the low reflection substrate according to the first and second embodiments of the present invention. 図2-3は、本発明の実施の形態1にかかる低反射基板の作製方法の工程を説明する断面図である。FIG. 2-3 is a cross-sectional view for explaining a process of the method for manufacturing the low-reflection substrate according to the first embodiment of the present invention. 図2-4は、本発明の実施の形態1にかかる低反射基板の作製方法の工程を説明する断面図である。FIGS. 2-4 is sectional drawing explaining the process of the manufacturing method of the low reflection board | substrate concerning Embodiment 1 of this invention. FIGS. 図2-5は、本発明の実施の形態1にかかる低反射基板の作製方法の工程を説明する断面図である。2-5 are cross-sectional views for explaining a process of the method for manufacturing the low-reflection substrate according to the first embodiment of the present invention. 図3-1は、本発明の実施の形態1にかかる低反射基板の製造方法により製造した低反射基板を用いて製造した光起電力装置の上面図である。FIG. 3A is a top view of the photovoltaic device manufactured by using the low reflection substrate manufactured by the method of manufacturing the low reflection substrate according to the first embodiment of the present invention. 図3-2は、本発明の実施の形態1にかかる低反射基板の製造方法により製造した低反射基板を用いて製造した光起電力装置の断面図である。FIG. 3-2 is a cross-sectional view of the photovoltaic device manufactured using the low reflection substrate manufactured by the low reflection substrate manufacturing method according to the first embodiment of the present invention. 図4-1は、本発明の実施の形態2にかかる低反射基板の作製方法の工程を説明する断面図である。FIGS. 4-1 is sectional drawing explaining the process of the manufacturing method of the low reflection board | substrate concerning Embodiment 2 of this invention. FIGS. 図4-2は、本発明の実施の形態2にかかる低反射基板の作製方法の工程を説明する上面図である。FIG. 4-2 is a top view for explaining a process of the method for manufacturing the low-reflection substrate according to the second embodiment of the present invention. 図4-3は、本発明の実施の形態2にかかる低反射基板の作製方法の工程を説明する断面図である。FIGS. 4-3 is sectional drawing explaining the process of the manufacturing method of the low reflection board | substrate concerning Embodiment 2 of this invention. FIGS. 図4-4は、本発明の実施の形態2にかかる低反射基板の作製方法の工程を説明する断面図である。FIGS. 4-4 is sectional drawing explaining the process of the manufacturing method of the low reflection board | substrate concerning Embodiment 2 of this invention. FIGS. 図4-5は、本発明の実施の形態2にかかる低反射基板の作製方法の工程を説明する断面図である。FIGS. 4-5 is sectional drawing explaining the process of the manufacturing method of the low reflection board | substrate concerning Embodiment 2 of this invention. 図5-1は、本発明の実施の形態2にかかる低反射基板の製造方法により製造した低反射基板を用いて製造した光起電力装置の上面図である。FIG. 5A is a top view of the photovoltaic device manufactured using the low-reflection substrate manufactured by the low-reflection substrate manufacturing method according to the second embodiment of the present invention. 図5-2は、本発明の実施の形態2にかかる低反射基板の製造方法により製造した低反射基板を用いて製造した光起電力装置の断面図である。FIG. 5B is a cross-sectional view of the photovoltaic device manufactured using the low reflection substrate manufactured by the method of manufacturing the low reflection substrate according to the second embodiment of the present invention. 図6は、本発明の実施の形態1にかかる基板の低反射化の効果を波長628nmにおける反射率およびエッチング前後での重量差で比較例と比べた図である。FIG. 6 is a diagram comparing the effect of reducing the substrate reflection according to the first embodiment of the present invention with the comparative example in terms of the reflectance at a wavelength of 628 nm and the weight difference before and after etching.
 以下に、本発明にかかる低反射基板の製造方法、光起電力装置の製造方法、および光起電力装置の実施の形態を図面に基づいて詳細に説明する。なお、この実施の形態によりこの発明が限定されるものではなく、その要旨を逸脱しない範囲において適宜変更可能である。 Embodiments of a low reflection substrate manufacturing method, a photovoltaic device manufacturing method, and a photovoltaic device according to the present invention will be described below in detail with reference to the drawings. In addition, this invention is not limited by this embodiment, In the range which does not deviate from the summary, it can change suitably.
 また、以下に説明する実施の形態において基板の材質、および低反射化された基板の用途は特に限定しないが、一例として(100)単結晶シリコン基板の低反射化について説明する。また基板の用途として、単結晶シリコン太陽電池を製造するために用いるものとして説明する。また、以下に示す図面においては、理解の容易のため各部材の縮尺が実際と異なる場合があり、各図面間においても同様である。 In the embodiment described below, the material of the substrate and the use of the substrate with low reflection are not particularly limited, but as an example, low reflection of a (100) single crystal silicon substrate will be described. In addition, the substrate will be described as being used for manufacturing a single crystal silicon solar cell. Further, in the drawings shown below, the scale of each member may be different from the actual for easy understanding, and the same applies to the drawings.
実施の形態1.
 図1は、本実施の形態にかかる基板の製造方法により表面の低反射化が施された基板であって、光起電力装置である太陽電池用の基板であるp型単結晶シリコン基板1(以下、基板1と称する)を示す断面図である。この基板1には、穴間平均ピッチが約1-10μm程度のピラミッド状凹凸を有するテクスチャ凹部5が基板表面に略均一に形成されている。
Embodiment 1 FIG.
FIG. 1 shows a p-type single crystal silicon substrate 1 (a solar cell substrate that is a photovoltaic device) that has been subjected to low surface reflection by the substrate manufacturing method according to the present embodiment. 1 is a cross-sectional view showing a substrate 1). In this substrate 1, textured recesses 5 having pyramidal irregularities with an average pitch between holes of about 1 to 10 μm are formed substantially uniformly on the substrate surface.
 つぎに、このような基板1を形成するための実施の形態1にかかる低反射基板の製造方法について説明する。実施の形態1にかかる低反射基板の製造方法は、基板の表面に保護膜を形成する第1工程と、保護膜に対してブラスト加工処理を施して保護膜に部分的な開口を形成する第2工程と、開口が形成された保護膜をマスクとして基板における保護膜が形成された面に対して保護膜が耐性を有する条件でエッチングを施す第3工程と、保護膜を除去する第4工程とを含む。 Next, a method for manufacturing the low reflection substrate according to the first embodiment for forming such a substrate 1 will be described. The manufacturing method of the low reflection substrate according to the first embodiment includes a first step of forming a protective film on the surface of the substrate, and a first step of forming a partial opening in the protective film by subjecting the protective film to a blasting process. Two steps, a third step of etching the surface of the substrate on which the protective film is formed using the protective film having an opening as a mask, under a condition that the protective film is resistant, and a fourth step of removing the protective film Including.
 図2-1~図2-5は、実施の形態1にかかる低反射基板の製造方法の工程を説明するための断面図である。以下、これらの図面を参照して実施の形態1にかかる低反射基板の製造方法を説明する。 FIGS. 2-1 to 2-5 are cross-sectional views for explaining the steps of the manufacturing method of the low reflection substrate according to the first embodiment. Hereinafter, the manufacturing method of the low reflection substrate according to the first embodiment will be described with reference to these drawings.
 まず、第1工程では、図2-1に示すように基板表面の低反射化を行う対象であるp型単結晶シリコン基板1a(以下、基板1aと称する)の一面側の表面に、高濃度n型拡散層2を形成する。 First, in the first step, as shown in FIG. 2-1, a high concentration is applied to the surface of one surface side of a p-type single crystal silicon substrate 1a (hereinafter referred to as substrate 1a) which is a target for reducing the reflection of the substrate surface. An n-type diffusion layer 2 is formed.
 本実施の形態における基板1aは、民生用太陽電池向けとして多く使用されている(100)単結晶シリコン基板である。これは、シリコンインゴットからマルチワイヤーソーでスライスした後に、酸またはアルカリ溶液を用いたウェットエッチングでスライス時のダメージを除去したものである。例えばダメージ除去後の基板1aの厚みは200μm、寸法は156mm×156mmとされる。なお、基板1aの寸法はこれに限定されるものではなく、適宜変更可能である。 The substrate 1a in the present embodiment is a (100) single crystal silicon substrate that is widely used for consumer solar cells. In this method, after slicing from a silicon ingot with a multi-wire saw, damage during slicing is removed by wet etching using an acid or alkali solution. For example, the thickness of the substrate 1a after removing the damage is 200 μm and the dimensions are 156 mm × 156 mm. In addition, the dimension of the board | substrate 1a is not limited to this, It can change suitably.
 また、高濃度n型拡散層2は、基板1aを熱酸化炉へ投入し、オキシ塩化リン(POCl)蒸気の存在下で加熱して基板1aの表面にリンガラスを形成したのち、基板1a中にリンを拡散させ形成する。拡散温度は、例えば840℃とされる。拡散層形成後、フッ酸溶液に浸漬し、リンガラス層は除去する。 The high-concentration n-type diffusion layer 2 is formed by introducing the substrate 1a into a thermal oxidation furnace and heating it in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorus glass on the surface of the substrate 1a. Formed by diffusing phosphorus inside. The diffusion temperature is set to 840 ° C., for example. After forming the diffusion layer, it is immersed in a hydrofluoric acid solution to remove the phosphorus glass layer.
 第2工程では、図2-2に示すように基板表面の低反射化を行う対象である高濃度n型拡散層2を形成した基板1aの一面側の表面に、保護膜として、後述するエッチングに対してエッチング耐性を有する膜(以下、耐エッチング性膜と称する)3を形成する。 In the second step, as described in FIG. 2B, the surface of the substrate 1a on which the high-concentration n-type diffusion layer 2 that is a target for reducing the reflection of the substrate surface is formed as a protective film on the surface to be described later. A film 3 having etching resistance (hereinafter referred to as an etching resistant film) 3 is formed.
 耐エッチング性膜3は、熱酸化により形成された膜厚100nmのシリコン熱酸化膜(以下、SiO膜と称する)である。ここでは、耐エッチング性膜3としてSiO膜を用いたが、耐エッチング性膜3としてプラズマCVD法により成膜された窒化シリコン膜(SiN)、酸化窒化シリコン膜(SiON)、アモルファスシリコン膜(а-Si)、ダイアモンドライクカーボン膜等を用いても良い。 The etching resistant film 3 is a 100 nm thick silicon thermal oxide film (hereinafter referred to as SiO 2 film) formed by thermal oxidation. Here, although the SiO 2 film is used as the etching resistant film 3, the silicon nitride film (SiN), silicon oxynitride film (SiON), and amorphous silicon film (SiON film) formed by the plasma CVD method as the etching resistant film 3 are used. а-Si), diamond-like carbon film or the like may be used.
 第3工程では、図2-3に示すように耐エッチング性膜3に対して微細穴加工を施す。すなわち、サンドブラスト加工処理により耐エッチング性膜3に複数の微細開口4を開ける。ここで形成された微細開口4は、耐エッチング性膜3を貫通して高濃度n型拡散層2まで達している。 In the third step, fine hole processing is performed on the etching resistant film 3 as shown in FIG. That is, a plurality of fine openings 4 are opened in the etching resistant film 3 by sandblasting. The fine opening 4 formed here penetrates the etching resistant film 3 and reaches the high concentration n-type diffusion layer 2.
 このときのブラスト加工処理の砥粒としては、アルミナ砥粒を使用する。本願発明者らは、基板にクラックを発生させることなく耐エッチング性膜3であるSiO膜に開口を開けるのに最も適した砥粒を探求し、研究を重ねた結果、アルミナ砥粒が最も適しているとの知見に至った。しかしながら、ブラスト加工処理の砥粒はこれに限定されるものではなく、耐エッチング性膜3に微細開口4を開けることができれば、アルミナ砥粒以外の他の砥粒を用いてもかまわない。 At this time, alumina abrasive grains are used as abrasive grains for blast processing. The inventors of the present application searched for the most suitable abrasive for opening an opening in the SiO 2 film that is the etching resistant film 3 without causing cracks in the substrate, and as a result of repeated research, the alumina abrasive grains were the most suitable. It came to the knowledge that it was suitable. However, the abrasive grains for the blasting treatment are not limited to this, and other abrasive grains other than the alumina abrasive grains may be used as long as the fine openings 4 can be opened in the etching resistant film 3.
 第4工程では、微細穴加工が施された耐エッチング性膜3をマスクとして、高濃度n型拡散層2を形成した基板1aの耐エッチング性膜3が形成された側の一面に対してアルカリ水溶液による異方性エッチングを施し、図2-4に示すように微細開口4を介してテクスチャ凹部5を形成する。 In the fourth step, an alkali is applied to one surface of the substrate 1a on which the high-concentration n-type diffusion layer 2 is formed on the side on which the etching resistance film 3 is formed, using the etching resistance film 3 subjected to micro-hole processing as a mask. An anisotropic etching with an aqueous solution is performed to form a textured recess 5 through the fine opening 4 as shown in FIG. 2-4.
 エッチングに用いるアルカリ水溶液としては、例えば水酸化ナトリウム水溶液を用いる。アルカリ水溶液の濃度は1重量パーセント、温度は80℃である。また、アルカリ水溶液にイソプロピルアルコール等の添加材を添加してもよい。ここで、アルカリ水溶液の濃度及び温度は必要とするエッチング量、時間に応じて適宜変更可能である。 As an alkaline aqueous solution used for etching, for example, a sodium hydroxide aqueous solution is used. The concentration of the aqueous alkaline solution is 1 weight percent, and the temperature is 80 ° C. Further, an additive such as isopropyl alcohol may be added to the alkaline aqueous solution. Here, the concentration and temperature of the alkaline aqueous solution can be appropriately changed according to the required etching amount and time.
 第5工程では、耐エッチング性膜3を除去することで、テクスチャ凹部5を表出させる。耐エッチング性膜3の除去には、例えばフッ酸水溶液を使用することができる。これにより図2-5に示すように、例えば10μm程度の微細なパターンを有するテクスチャ構造を基板1aの表面に形成することができる。上記工程を経ることにより基板表面の低反射化がなされたp型単結晶シリコン基板が、図1の基板1である。 In the fifth step, the textured recess 5 is exposed by removing the etching resistant film 3. For example, a hydrofluoric acid aqueous solution can be used to remove the etching resistant film 3. As a result, as shown in FIG. 2-5, a texture structure having a fine pattern of, for example, about 10 μm can be formed on the surface of the substrate 1a. The p-type single crystal silicon substrate in which the substrate surface has been subjected to low reflection through the above steps is the substrate 1 in FIG.
 次に、上述した低反射基板の製造方法を用いて基板表面にテクスチャ構造を形成した基板1を使用して、図3-1の上面図、及び図3-2の断面図に示される光起電力装置10を製造するための工程を説明する。なお、ここで説明する工程は、一般的な単結晶シリコン基板を用いた光起電力装置の製造工程と同様であるため、途中の工程は特に図示しない。 Next, using the substrate 1 having a textured structure formed on the substrate surface using the above-described method for manufacturing a low-reflection substrate, the photoluminescence shown in the top view of FIG. 3-1 and the cross-sectional view of FIG. 3-2 is used. A process for manufacturing the power device 10 will be described. In addition, since the process demonstrated here is the same as the manufacturing process of the photovoltaic apparatus using a general single crystal silicon substrate, the process in the middle is not illustrated in particular.
 上記の第5工程の処理が完了した基板1を熱酸化炉へ投入し、オキシ塩化リン(POCl)蒸気の存在下で加熱して基板1の表面にリンガラスを形成することで基板1中にリンを拡散させ、基板1の表層にn型拡散層11aを形成する(図3-2)。拡散温度は、例えば840℃とする。 The substrate 1 that has been subjected to the process of the fifth step is put into a thermal oxidation furnace and heated in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorous glass on the surface of the substrate 1. Then, phosphorus is diffused to form an n-type diffusion layer 11a in the surface layer of the substrate 1 (FIG. 3-2). The diffusion temperature is 840 ° C., for example.
 次に、フッ酸溶液中で基板1のリンガラス層を除去した後、反射防止膜12としてプラズマCVD法によりSiN膜をn型拡散層11a上に形成する。反射防止膜12は、この後形成する受光面側電極13の形成領域を除いた領域に形成する(図3-2)。反射防止膜12の膜厚および屈折率は、光反射を最も抑制する値に設定する。なお、屈折率の異なる2層以上の膜を積層してもよい。また、反射防止膜12は、スパッタリング法など、異なる成膜方法により形成しても良い。 Next, after removing the phosphor glass layer of the substrate 1 in a hydrofluoric acid solution, a SiN film is formed on the n-type diffusion layer 11a as the antireflection film 12 by plasma CVD. The antireflection film 12 is formed in a region excluding the formation region of the light receiving surface side electrode 13 to be formed later (FIG. 3-2). The film thickness and refractive index of the antireflection film 12 are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked. Further, the antireflection film 12 may be formed by a different film forming method such as a sputtering method.
 次に、基板1の受光面に銀の混入したペーストを櫛形にスクリーン印刷にて印刷し、基板1の裏面にアルミニウムの混入したペーストを全面にスクリーン印刷にて印刷した後、焼成処理を実施して受光面側電極13と裏面電極14とを形成する。焼成は大気雰囲気中において例えば760℃で実施する。受光面側電極13は、光起電力装置10のバス電極13aおよびグリッド電極13bを含み(図3-1)、図3-2はグリッド電極13bの長手方向に垂直な断面における断面図を示している。以上のようにして、図3-1及び図3-2に示す光起電力装置10が作製される。 Next, a paste mixed with silver is printed on the light-receiving surface of the substrate 1 in a comb shape by screen printing, and a paste mixed with aluminum is printed on the entire back surface of the substrate 1 by screen printing, and then a baking process is performed. Thus, the light receiving surface side electrode 13 and the back surface electrode 14 are formed. Firing is performed at 760 ° C. in an air atmosphere, for example. The light-receiving surface side electrode 13 includes a bus electrode 13a and a grid electrode 13b of the photovoltaic device 10 (FIG. 3-1), and FIG. 3-2 shows a cross-sectional view in a cross section perpendicular to the longitudinal direction of the grid electrode 13b. Yes. As described above, the photovoltaic device 10 shown in FIGS. 3-1 and 3-2 is manufactured.
 光起電力装置10は、基板表層にn型拡散層11aを有する半導体基板1と、半導体基板1の受光面側の面(表面)に形成された反射防止膜12及び受光面側電極13と、受光面と反対側の面(裏面)に形成された裏面電極14とを備えた、15cm□の光起電力装置を構成している。 The photovoltaic device 10 includes a semiconductor substrate 1 having an n-type diffusion layer 11a on a substrate surface layer, an antireflection film 12 and a light receiving surface side electrode 13 formed on a light receiving surface side (front surface) of the semiconductor substrate 1, A photovoltaic device of 15 cm □ is provided that includes a back electrode 14 formed on a surface (back surface) opposite to the light receiving surface.
 上記の工程を経て作製した光起電力装置10の性能を評価した結果について説明する。光起電力装置10の作製に当たって、基板1の低反射化を実施した時点で基板1の反射率特性を、分光光度計で評価した。そのうち波長628nmにおける反射率およびエッチング前後での重量差を図6に示す。 The results of evaluating the performance of the photovoltaic device 10 manufactured through the above steps will be described. In producing the photovoltaic device 10, the reflectance characteristics of the substrate 1 were evaluated with a spectrophotometer at the time when the low reflection of the substrate 1 was performed. Of these, the reflectance at a wavelength of 628 nm and the weight difference before and after etching are shown in FIG.
 比較例として、上記第1工程を実施せずに、上記第2工程以降の工程を実施し、凹凸基板を作製した。この際、第4工程におけるアルカリ異方性エッチングの時間は、実施の形態1にかかる基板の製造方法により低反射化を施した基板1におけるアルカリ異方性エッチング時間と同一時間にて実施している。比較例の基板の光反射特性を分光光度計で評価した。そのうち波長628nmにおける反射率およびエッチング前後での重量差を図6に併せて示す。 As a comparative example, the first and second steps were not carried out, but the second and subsequent steps were carried out to produce a concavo-convex substrate. At this time, the alkali anisotropic etching time in the fourth step is the same as the alkali anisotropic etching time in the substrate 1 subjected to low reflection by the substrate manufacturing method according to the first embodiment. Yes. The light reflection characteristics of the substrate of the comparative example were evaluated with a spectrophotometer. Of these, the reflectance at a wavelength of 628 nm and the weight difference before and after etching are also shown in FIG.
 図6からわかるように、エッチング前後での重量差は、同一のエッチング時間であるにもかかわらず、実施の形態1にかかる基板の粗面化法により粗面化を実施した基板1と、比較例の基板とでは約1.8倍の差が生じており、本実施例にかかる基板の粗面化方法を用いることで、より高いエッチング速度でシリコンのエッチングが進行したことを示している。 As can be seen from FIG. 6, the weight difference before and after the etching is compared with the substrate 1 that has been roughened by the roughening method of the substrate according to the first embodiment, even though the etching time is the same. A difference of about 1.8 times occurs with the substrate of the example, which shows that the etching of silicon progressed at a higher etching rate by using the substrate roughening method according to this example.
 また、図6からわかるように、波長628nmにおける反射率は、比較例の基板では19.1%であるのに対して、実施の形態1にかかる基板の粗面化方法により粗面化を実施した基板1では13.9%まで抑制できている。これにより、実施の形態1にかかる基板の粗面化方法により粗面化を施した基板1は、同一時間のアルカリ異方性エッチングを施した場合でも、表面への非エッチング平坦領域の残留が僅かであり、より良好な反射率抑制効果を発揮していることがわかった。 As can be seen from FIG. 6, the reflectance at a wavelength of 628 nm is 19.1% in the substrate of the comparative example, whereas the surface is roughened by the method of roughening the substrate according to the first embodiment. In the case of the substrate 1, it can be suppressed to 13.9%. As a result, the substrate 1 roughened by the substrate roughening method according to the first embodiment has a non-etched flat region remaining on the surface even when alkali anisotropic etching is performed for the same time. It was a little, and it turned out that the better reflectance suppression effect is exhibited.
 本実施の形態にかかる低反射基板の製造方法にて、比較例に比べて速いエッチング速度でシリコンエッチングが進行したことは次のように説明可能である。 It can be explained as follows that the silicon etching progressed at a higher etching rate than the comparative example in the manufacturing method of the low reflection substrate according to the present embodiment.
 一般的にアルカリ水溶液によるシリコンのエッチング反応は、水溶液中に存在する水酸化イオンがシリコン基板表面へ作用することで生じる。この際、ダイヤモンド構造を有するシリコン結晶において、原子密度が最も高い(111)面が露出した異方性エッチングが生じる。一方、形成した高濃度n型拡散層には過剰な不純物ドーピングが施されているため、ドーピング濃度が低い領域に比べてシリコン結晶中に不純物や欠陥が多く含まれる。そのため、高濃度ドーピングを実施していない領域に比べてシリコンの格子配列が乱れている傾向にある。その傾向は特に不純物存在密度が高い最表面で顕著である。このような格子配列が乱れたシリコンをアルカリ水溶液に浸漬した場合、エッチングの異方性、すなわち結晶構造に起因したエッチングレート差が生じにくくなり、シリコンのエッチング進行はやや等方性に近い形で進行する。 Generally, the etching reaction of silicon with an aqueous alkali solution occurs when hydroxide ions present in the aqueous solution act on the silicon substrate surface. At this time, in the silicon crystal having a diamond structure, anisotropic etching in which the (111) plane having the highest atomic density is exposed occurs. On the other hand, since the formed high-concentration n-type diffusion layer is excessively doped with impurities, the silicon crystal contains more impurities and defects than a region with a low doping concentration. For this reason, the lattice arrangement of silicon tends to be disturbed as compared with a region where high concentration doping is not performed. This tendency is particularly remarkable on the outermost surface where the impurity density is high. When silicon with such a disordered lattice arrangement is immersed in an aqueous alkali solution, etching anisotropy, that is, an etching rate difference due to the crystal structure is less likely to occur, and the etching progress of silicon is somewhat isotropic. proceed.
 上記理由により、本実施の形態にかかる低反射基板の製造方法においては、部分的に微細開口4を施した耐エッチング性膜3からなるマスクの直下に存在する高濃度n型拡散層2(ドーピング層)最表部のエッチングがやや等方性に近く進行する。そのため、アルカリ浸漬と同時に耐エッチング性膜3の下部の非常に薄い領域においてアンダーカットを生じる。引き続いて、高濃度n型拡散層2(ドーピング層)の下部に存在する非高濃度ドーピング領域であるp型単結晶シリコン基板1aにおいて、上記アンダーカット領域によって空間的に制限されたシリコンの(111)面が露出するように異方性エッチングが進行する。したがって、本実施の形態にかかる低反射基板の製造方法においては、p型単結晶シリコン基板1aにおける(111)面のエッチング速度ではなく、高濃度n型拡散層2の領域がアルカリによってエッチングされることにより生じるアンダーカット領域の横広がり速度で律速された異方性エッチングが生じる。 For the above reason, in the method for manufacturing a low-reflection substrate according to the present embodiment, the high-concentration n-type diffusion layer 2 (doping) that exists directly under the mask made of the etching-resistant film 3 partially provided with the fine openings 4. Layer) The etching of the outermost part proceeds somewhat close to isotropic. Therefore, an undercut occurs in a very thin region below the etching resistant film 3 simultaneously with the alkali immersion. Subsequently, in the p-type single crystal silicon substrate 1a, which is a non-high-concentration doping region existing under the high-concentration n-type diffusion layer 2 (doping layer), the silicon (111) spatially limited by the undercut region is formed. ) Anisotropic etching proceeds so that the surface is exposed. Therefore, in the method for manufacturing the low reflection substrate according to the present embodiment, the region of the high-concentration n-type diffusion layer 2 is etched by alkali, not the etching rate of the (111) plane in the p-type single crystal silicon substrate 1a. As a result, anisotropic etching controlled by the lateral spreading speed of the undercut region is generated.
 一方、上記比較例においては、耐エッチング性膜3(保護膜)の下部に高濃度n型拡散層2が存在せず、保護膜直下から格子状態が保たれている。このような試料をアルカリ水溶液に浸漬した場合、耐エッチング性膜3の下部に高濃度n型拡散を施した領域がないため、アンダーカットは形成されにくく、耐エッチング性膜3に施した部分的開口領域で空間的に制限された(111)面が露出する。また、その先の時間帯においては、エッチング進行が高濃度ドーピングを実施していないシリコン(111)面のエッチングによる横広がり速度に律速される。 On the other hand, in the comparative example, the high-concentration n-type diffusion layer 2 does not exist below the etching resistant film 3 (protective film), and the lattice state is maintained from directly below the protective film. When such a sample is immersed in an alkaline aqueous solution, there is no region subjected to high-concentration n-type diffusion below the etching-resistant film 3, so that an undercut is difficult to form, and a partial coating applied to the etching-resistant film 3. The (111) plane that is spatially limited in the opening region is exposed. Further, in the subsequent time zone, the etching progress is limited by the lateral spreading speed due to the etching of the silicon (111) surface not subjected to high concentration doping.
 高濃度n型ドーピング領域のエッチングにより形成されるアンダーカット領域の横広がり速度と、高濃度ドーピングを施していないシリコン(111)面のエッチングによる横広がり速度の比率は、エッチングに用いるアルカリ水溶液の濃度や温度、あるいは高濃度n型ドーピング領域のドーピング濃度に左右されると考えられるが、本願発明者らの研究によれば、前者の横広がりのほうが2-8倍程度早く進行する結果が得られた。かかる理由により、本実施の形態にかかる低反射基板の製造方法により得られたシリコンのエッチング速度は、比較例により得られたシリコンのエッチング速度に比べて高く、より短時間で基板全面へのテクスチャ形成が可能であったものと考えられる。 The ratio of the lateral spread rate of the undercut region formed by etching of the high-concentration n-type doped region and the lateral spread rate by etching of the silicon (111) surface not subjected to high-concentration doping is the concentration of the alkaline aqueous solution used for etching. However, according to the research conducted by the inventors of the present invention, the result that the lateral spread of the former proceeds about 2-8 times faster can be obtained. It was. For this reason, the etching rate of silicon obtained by the manufacturing method of the low reflection substrate according to the present embodiment is higher than the etching rate of silicon obtained by the comparative example, and the texture on the entire surface of the substrate in a shorter time. It is thought that the formation was possible.
 上述したように、実施の形態1にかかる基板の製造方法によれば、耐エッチング性膜3の下層に、上記第1工程において高濃度n型拡散層2を形成する。これにより、アルカリ異方性エッチングにおける、(111)面のエッチングレートを比較的大きくとること、即ちエッチングの高速化が可能となり、面内に均一な凹凸をより短時間で形成することができるようになる。 As described above, according to the method for manufacturing a substrate according to the first embodiment, the high concentration n-type diffusion layer 2 is formed in the lower layer of the etching resistant film 3 in the first step. This makes it possible to increase the etching rate of the (111) plane in alkali anisotropic etching, that is, to increase the etching speed, and to form uniform irregularities in the plane in a shorter time. become.
 その結果、短時間の異方性エッチング処理でも基板表面の反射率を抑制することが可能となる。 As a result, the reflectance of the substrate surface can be suppressed even in a short anisotropic etching process.
 保護膜の下部に拡散層が存在することで、異方性の強いアルカリ溶液を使用した状況下においても、拡散層がない場合に比べて開口部からの横広がりエッチングレートを増加させ、短時間の異方性エッチング処理で基板全面に均一なテクスチャを形成することが可能となる。 Due to the presence of the diffusion layer under the protective film, the lateral spreading etching rate from the opening is increased compared to the case without a diffusion layer even in the case of using a highly anisotropic alkaline solution, and the time is reduced. A uniform texture can be formed on the entire surface of the substrate by this anisotropic etching process.
 また、基板全面へのテクスチャ形成に必要なアルカリ異方性エッチング時間が短縮されることから、耐エッチング性膜3の必要膜厚を減少させる効果もある。 Also, since the alkali anisotropic etching time required for texture formation on the entire surface of the substrate is shortened, there is an effect of reducing the required film thickness of the etching resistant film 3.
 また、実施の形態1にかかる光起電力装置10の製造方法によれば、上記の実施の形態1にかかる基板の製造方法により表面の低反射化を施した基板1を用いて光起電力装置を作製するため、光入射側の基板表面における表面光反射損失が大幅に低減される。従って、光電変換効率の向上が図られ、より高い光電変換効率を有する光起電力装置を製造することが可能となる。 In addition, according to the method for manufacturing the photovoltaic device 10 according to the first embodiment, the photovoltaic device using the substrate 1 whose surface has been subjected to low reflection by the substrate manufacturing method according to the first embodiment. Therefore, the surface light reflection loss on the substrate surface on the light incident side is greatly reduced. Therefore, the photoelectric conversion efficiency can be improved, and a photovoltaic device having higher photoelectric conversion efficiency can be manufactured.
実施の形態2.
 図4-1~図4-5は、実施の形態2にかかる低反射基板の製造方法の工程を説明するための断面図および上面図である。以下、これらの図面を参照して実施の形態2にかかる基板の粗面化方法を説明する。なお、図2-1~図2-5に示した部材と同じ部材については、同じ符号を付すことで詳細な説明は省略する。
Embodiment 2. FIG.
FIGS. 4-1 to 4-5 are a cross-sectional view and a top view for explaining the steps of the manufacturing method of the low reflection substrate according to the second embodiment. The substrate roughening method according to the second embodiment will be described below with reference to these drawings. The same members as those shown in FIGS. 2-1 to 2-5 are denoted by the same reference numerals, and detailed description thereof is omitted.
 まず、第1工程は、実施の形態1にかかる低反射基板の製造方法の第1工程と同様であり、図2-1に示すように基板表面の低反射化を行う対象であるp型単結晶シリコン基板1a(以下、基板1aと称する)の一面側の表面に、高濃度n型拡散層2を形成する。 First, the first step is the same as the first step of the manufacturing method of the low reflection substrate according to the first embodiment. As shown in FIG. A high-concentration n-type diffusion layer 2 is formed on the surface of one side of the crystalline silicon substrate 1a (hereinafter referred to as the substrate 1a).
 高濃度n型拡散層2は、基板1aを熱酸化炉へ投入し、オキシ塩化リン(POCl)蒸気の存在下で加熱して基板1aの表面にリンガラスを形成したのち、基板1a中にリンを拡散させ形成する。拡散温度は、例えば840℃とされる。拡散層形成後、フッ酸溶液に浸漬し、リンガラス層は除去する。 The high-concentration n-type diffusion layer 2 is formed by putting the substrate 1a into a thermal oxidation furnace and heating it in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorus glass on the surface of the substrate 1a. Forms by diffusing phosphorus. The diffusion temperature is set to 840 ° C., for example. After forming the diffusion layer, it is immersed in a hydrofluoric acid solution to remove the phosphorus glass layer.
 第2工程は、実施の形態1にかかる低反射基板の製造方法の第2工程と同様であり、図2-2に示すように基板表面の低反射化を行う対象である高濃度n型拡散層2を形成した基板1aの一面側の表面に、保護膜として、後述するエッチングに対してエッチング耐性を有する耐エッチング性膜3を形成する。 The second step is the same as the second step of the manufacturing method of the low-reflection substrate according to the first embodiment, and as shown in FIG. An etching resistant film 3 having etching resistance to etching described later is formed as a protective film on the surface on one side of the substrate 1a on which the layer 2 is formed.
 第3工程では、図4-1の断面図、及び図4-2の上面図に示すように、第2工程が完了した基板1aの表面に、この後の工程であるサンドブラスト加工に対する耐性を有する耐ブラスト保護膜21を部分的に形成する。図4-1は低反射化を施す対象の基板1aの断面図、図4-2は基板1aの上面図である。耐ブラスト保護膜21は、図4-2に示すようにバス電極部用耐ブラスト保護膜21aと、グリッド電極部用耐ブラスト保護膜21bとを含み、図4-1はグリッド電極部耐ブラスト保護膜21bの長手方向に垂直な断面における断面図を示している。 In the third step, as shown in the cross-sectional view of FIG. 4A and the top view of FIG. 4B, the surface of the substrate 1a that has completed the second step has resistance to the subsequent sandblasting process. A blast-resistant protective film 21 is partially formed. 4A is a cross-sectional view of the substrate 1a to be subjected to low reflection, and FIG. 4-2 is a top view of the substrate 1a. As shown in FIG. 4B, the blast resistant protective film 21 includes a blast resistant protective film 21a for a bus electrode part and a blast resistant protective film 21b for a grid electrode part. A sectional view in a section perpendicular to the longitudinal direction of the film 21b is shown.
 耐ブラスト保護膜21は、例えばスクリーン印刷法により形成した膜厚100μmのポリウレタン樹脂を用いる。耐ブラスト保護膜21の膜厚や材質は、下地の耐エッチング性膜3をブラスト加工から保護することができれば、異なる材質や膜厚でもよい。また、耐ブラスト保護膜21の形成手法はスクリーン印刷法に限らず、グラビア印刷法、インクジェット法など異なる手段で形成してもよい。 For the blast resistant protective film 21, for example, a polyurethane resin having a film thickness of 100 μm formed by a screen printing method is used. The thickness and material of the blast resistant protective film 21 may be different from each other as long as the underlying etching resistant film 3 can be protected from blasting. Moreover, the formation method of the blast-resistant protective film 21 is not limited to the screen printing method, and may be formed by different means such as a gravure printing method and an ink jet method.
 第4工程では、図4-3に示すように、上記の第3工程が完了した基板1a上からサンドブラスト加工を施し、耐エッチング性膜3に対して微細穴加工を施す。すなわち、ブラスト加工処理により耐エッチング性膜3に複数の微細開口4を開ける。この際、第3工程において耐ブラスト保護膜21を形成した個所については耐ブラスト保護膜21がマスクとなり、耐エッチング性膜3に対する加工が妨げられる。上に耐ブラスト保護膜21が形成されていない耐エッチング性膜3には、これを貫通して高濃度n型拡散層2まで達する微細開口4が形成される。 In the fourth step, as shown in FIG. 4-3, a sand blast process is performed on the substrate 1a after the completion of the third process, and a fine hole process is performed on the etching resistant film 3. That is, a plurality of fine openings 4 are opened in the etching resistant film 3 by blast processing. At this time, the blast-resistant protective film 21 is used as a mask at the portion where the blast-resistant protective film 21 is formed in the third step, and processing of the etching-resistant film 3 is hindered. In the etching resistant film 3 on which the blast protective film 21 is not formed, a fine opening 4 is formed so as to penetrate the high resistance n-type diffusion layer 2.
 第5工程では、薬剤処理により耐ブラスト保護膜21を除去したのち、微細穴加工が施された耐エッチング性膜3をマスクとして、基板1aの耐エッチング性膜3が形成された側の一面に対してアルカリ水溶液による異方性エッチングを施し、図4-4に示すように微細開口4を介してテクスチャ凹部5を形成する。エッチングに用いるアルカリ水溶液としては、例えば水酸化ナトリウム水溶液を用いる。アルカリ水溶液の濃度は1重量パーセント、温度は80℃である。また、アルカリ水溶液にイソプロピルアルコール等の添加材を添加してもよい。 In the fifth step, after removing the blast-resistant protective film 21 by chemical treatment, the etching-resistant film 3 on which micro-hole processing has been performed is used as a mask on one surface of the substrate 1a on the side where the etching-resistant film 3 is formed. On the other hand, anisotropic etching with an aqueous alkali solution is performed to form a textured recess 5 through the fine opening 4 as shown in FIG. 4-4. As the alkaline aqueous solution used for etching, for example, a sodium hydroxide aqueous solution is used. The concentration of the aqueous alkaline solution is 1 weight percent, and the temperature is 80 ° C. Further, an additive such as isopropyl alcohol may be added to the alkaline aqueous solution.
 ここで、アルカリ水溶液の濃度及び温度は必要とするエッチング量、時間に応じて適宜変更可能である。この際、第3工程において耐ブラスト保護膜21を形成した部分には、微細開口4が形成されなかった耐エッチング性膜3が残留するので、テクスチャ凹部5は形成されない。 Here, the concentration and temperature of the alkaline aqueous solution can be appropriately changed according to the required etching amount and time. At this time, since the etching resistant film 3 in which the fine openings 4 are not formed remains in the portion where the blast resistant protective film 21 is formed in the third step, the texture recess 5 is not formed.
 第6工程では、耐エッチング性膜3を除去することで、テクスチャ凹部5を表出させる。耐エッチング性膜3の除去には、例えばフッ酸水溶液を使用することができる。これにより図4-5に示すように、基板1a表面のうち、第3工程で耐ブラスト保護膜21を形成した箇所以外の領域に、例えば10μm程度の微細なパターンを有するテクスチャ構造を形成することができる。上記工程を経ることにより基板表面の低反射化がなされたp型単結晶シリコン基板を基板1’とする。また、第3工程において耐ブラスト保護膜21を形成した領域は、第1工程で形成した高濃度n型拡散層2が表面に露出した平坦領域22となっている。 In the sixth step, the texture recess 5 is exposed by removing the etching resistant film 3. For example, a hydrofluoric acid aqueous solution can be used to remove the etching resistant film 3. As a result, as shown in FIG. 4-5, a texture structure having a fine pattern of about 10 μm, for example, is formed on the surface of the substrate 1a other than the portion where the blast resistant protective film 21 is formed in the third step. Can do. A p-type single crystal silicon substrate in which the substrate surface has been subjected to low reflection through the above steps is referred to as a substrate 1 '. The region where the blast resistant protective film 21 is formed in the third step is a flat region 22 where the high concentration n-type diffusion layer 2 formed in the first step is exposed on the surface.
 次に、上述した低反射基板の製造方法を用いて基板表面にテクスチャ構造を形成した基板1’を使用して、図5-1の上面図、及び図5-2の断面図に示される光起電力装置20を製造するための工程を説明する。 Next, the light shown in the top view of FIG. 5-1 and the cross-sectional view of FIG. 5-2 using the substrate 1 ′ having a texture structure formed on the substrate surface by using the above-described method for manufacturing a low reflection substrate. A process for manufacturing the electromotive force device 20 will be described.
 上記の第6工程の処理が完了した基板1’を熱酸化炉へ投入し、オキシ塩化リン(POCl)蒸気の存在下で加熱して基板1’の表面にリンガラスを形成することで基板1’中にリンを拡散させ、基板1’の表層に低濃度n型拡散層31bを形成する(図5-2)。拡散温度は、例えば800℃とする。この際、平坦領域22に形成済みの高濃度n型拡散層31aにおいては、高濃度の不純物ドーパントがすでに存在するため、本工程における低濃度拡散処理を施したのちも高濃度n型拡散層31aのシート抵抗値は本工程処理前と同等以下の値が保持される。 The substrate 1 ′ after the processing in the sixth step is put into a thermal oxidation furnace and heated in the presence of phosphorus oxychloride (POCl 3 ) vapor to form phosphorus glass on the surface of the substrate 1 ′. Phosphorus is diffused into 1 ′ to form a low-concentration n-type diffusion layer 31b in the surface layer of the substrate 1 ′ (FIG. 5-2). The diffusion temperature is 800 ° C., for example. At this time, since the high-concentration n-type diffusion layer 31a already formed in the flat region 22 already has a high-concentration impurity dopant, the high-concentration n-type diffusion layer 31a is subjected to the low-concentration diffusion process in this step. The sheet resistance value of is equal to or less than that before the process.
 次に、フッ酸溶液中で基板1’のリンガラス層を除去した後、反射防止膜12としてプラズマCVD法によりSiN膜を低濃度n型拡散層31b上に形成する。反射防止膜12は、この後形成する受光面側電極13の形成領域を除いた領域に形成する(図5-2)。反射防止膜12の膜厚および屈折率は、光反射を最も抑制する値に設定する。なお、屈折率の異なる2層以上の膜を積層してもよい。また、反射防止膜12は、スパッタリング法など、異なる成膜方法により形成しても良い。 Next, after removing the phosphor glass layer of the substrate 1 ′ in a hydrofluoric acid solution, an SiN film is formed on the low-concentration n-type diffusion layer 31 b by the plasma CVD method as the antireflection film 12. The antireflection film 12 is formed in a region excluding the formation region of the light receiving surface side electrode 13 to be formed later (FIG. 5-2). The film thickness and refractive index of the antireflection film 12 are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked. Further, the antireflection film 12 may be formed by a different film forming method such as a sputtering method.
 次に、基板1’の受光面のうち、テクスチャ非形成領域である平坦領域22に銀の混入したペーストをスクリーン印刷にて印刷し、基板1’の裏面にアルミニウムの混入したペーストを全面にスクリーン印刷にて印刷した後、焼成処理を実施して受光面側電極13と裏面電極14とを形成する。焼成は大気雰囲気中において例えば760℃で実施する。 Next, a paste mixed with silver is printed by screen printing on the flat region 22 which is a non-textured region of the light receiving surface of the substrate 1 ′, and the paste mixed with aluminum is screened on the entire back surface of the substrate 1 ′. After printing by printing, a baking process is performed to form the light receiving surface side electrode 13 and the back surface electrode 14. Firing is performed at 760 ° C. in an air atmosphere, for example.
 受光面側電極13は、光起電力装置20のバス電極13aおよびグリッド電極13bを含み(図5-1)、それぞれ、高濃度n型拡散層2が表面に露出した平坦領域22のバス電極部平坦領域、及びグリッド電極部平坦領域の直上に形成される。図5-2は、グリッド電極13bの長手方向に垂直な断面における断面図を示している。以上のようにして、図5-1及び図5-2に示す光起電力装置20が作製される。 The light-receiving surface side electrode 13 includes the bus electrode 13a and the grid electrode 13b of the photovoltaic device 20 (FIG. 5-1), and the bus electrode portion of the flat region 22 where the high-concentration n-type diffusion layer 2 is exposed on the surface, respectively. It is formed immediately above the flat region and the grid electrode portion flat region. FIG. 5-2 shows a cross-sectional view in a cross section perpendicular to the longitudinal direction of the grid electrode 13b. As described above, the photovoltaic device 20 shown in FIGS. 5A and 5B is manufactured.
 光起電力装置20は、基板表層に高濃度n型拡散層31a及び低濃度n型拡散層31bを有する半導体基板1’と、半導体基板1’の受光面側の面(表面)に形成された反射防止膜12及び受光面側電極13と、受光面と反対側の面(裏面)に形成された裏面電極14とを備えた、15cm□の光起電力装置を構成している。 The photovoltaic device 20 is formed on a semiconductor substrate 1 ′ having a high-concentration n-type diffusion layer 31a and a low-concentration n-type diffusion layer 31b on the surface of the substrate, and a light-receiving surface side surface of the semiconductor substrate 1 ′. The photovoltaic device of 15 cm □ is provided with the antireflection film 12, the light receiving surface side electrode 13, and the back surface electrode 14 formed on the surface (back surface) opposite to the light receiving surface.
 上述したように、実施の形態2にかかる基板の製造方法によれば、耐エッチング性膜3の下層に、上記第1工程において高濃度n型拡散層2を形成する。これにより、アルカリ異方性エッチングにおける、(111)面のエッチングレートを比較的大きくとること、即ちエッチングの高速化が可能となり、面内に均一な凹凸をより短時間で形成することができるようになる。 As described above, according to the method for manufacturing a substrate according to the second embodiment, the high-concentration n-type diffusion layer 2 is formed in the lower layer of the etching resistant film 3 in the first step. This makes it possible to increase the etching rate of the (111) plane in alkali anisotropic etching, that is, to increase the etching speed, and to form uniform irregularities in the plane in a shorter time. become.
 その結果、短時間の異方性エッチング処理でも基板表面の反射率を抑制することが可能となる。また、ブラスト加工による微細孔加工を施す際に、光起電力装置の受光面側電極相当部分にあらかじめ耐ブラスト保護膜21を形成することで、電極相当部分に高濃度n型拡散層2即ち、高濃度n型拡散層31aを残すことが可能である。 As a result, the reflectance of the substrate surface can be suppressed even in a short anisotropic etching process. In addition, when performing micro-hole processing by blast processing, by forming the anti-blast protective film 21 in advance on the light receiving surface side electrode corresponding portion of the photovoltaic device, the high concentration n-type diffusion layer 2 on the electrode corresponding portion, that is, It is possible to leave the high concentration n-type diffusion layer 31a.
 実施の形態2にかかる光起電力装置20の製造方法によれば、上記の実施の形態2にかかる基板の製造方法を用いて基板表面の低反射化を施した基板1’を用いて光起電力装置を作製するため、光入射側の基板表面における表面光反射損失が大幅に低減される。従って、光電変換効率の向上を図ることができる。また、受光面側電極相当部にはあらかじめ低いシート抵抗を有する高濃度n型拡散層31aが形成されているため、電気的接触、即ち接触抵抗の改善が可能である。 According to the method for manufacturing the photovoltaic device 20 according to the second embodiment, the photovoltaic device 20 using the substrate 1 ′ having the substrate surface reduced in reflection using the substrate manufacturing method according to the second embodiment described above is used. Since the power device is manufactured, the surface light reflection loss on the substrate surface on the light incident side is greatly reduced. Therefore, the photoelectric conversion efficiency can be improved. Further, since the high-concentration n-type diffusion layer 31a having a low sheet resistance is formed in advance on the portion corresponding to the light receiving surface side electrode, it is possible to improve electrical contact, that is, contact resistance.
 さらに、受光面側電極相当部以外の受光面領域には低濃度n型拡散層31bが形成されており、光入射により生成された余剰少数キャリアの再結合を抑制可能である。上記の効果により高い光電変換効率を有する光起電力装置を製造することが可能となる。 Furthermore, a low concentration n-type diffusion layer 31b is formed in the light receiving surface region other than the portion corresponding to the light receiving surface side electrode, and recombination of surplus minority carriers generated by light incidence can be suppressed. Due to the above effects, a photovoltaic device having high photoelectric conversion efficiency can be manufactured.
 さらに、本願発明は上記実施の形態に限定されるものではなく、実施段階ではその要旨を逸脱しない範囲で種々に変形することが可能である。また、上記実施の形態には種々の段階の発明が含まれており、開示される複数の構成要件における適宜な組み合わせにより種々の発明が抽出されうる。例えば、実施の形態に示される全構成要件からいくつかの構成要件が削除されても、発明が解決しようとする課題の欄で述べた課題が解決でき、発明の効果の欄で述べられている効果が得られる場合には、この構成要件が削除された構成が発明として抽出されうる。更に、異なる実施の形態にわたる構成要素を適宜組み合わせてもよい。 Furthermore, the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the invention in the implementation stage. Further, the above embodiments include inventions at various stages, and various inventions can be extracted by appropriately combining a plurality of disclosed constituent requirements. For example, even if some constituent elements are deleted from all the constituent elements shown in the embodiment, the problem described in the column of the problem to be solved by the invention can be solved, and is described in the column of the effect of the invention. When an effect is obtained, a configuration in which this configuration requirement is deleted can be extracted as an invention. Furthermore, the constituent elements over different embodiments may be appropriately combined.
 以上のように、本発明にかかる低反射基板の製造方法、光起電力装置の製造方法、および光起電力装置は、光電変換効率の向上を図るためのテクスチャ加工に有用であり、特に、太陽電池の製造時間の短縮および太陽電池の性能向上に適している。 As described above, the method for manufacturing a low-reflection substrate, the method for manufacturing a photovoltaic device, and the photovoltaic device according to the present invention are useful for texture processing for improving photoelectric conversion efficiency. It is suitable for shortening the battery manufacturing time and improving the performance of solar cells.
 1、1’ 低反射化されたp型単結晶シリコン基板
 1a p型単結晶シリコン基板
 2、31a 高濃度n型拡散層
 3 耐エッチング性膜
 4 微細開口
 5 テクスチャ凹部
 10、20 光起電力装置
 11a n型拡散層
 12 反射防止膜
 13 受光面側電極
 13a バス電極
 13b グリッド電極
 14 裏面電極
 21 耐ブラスト保護膜
 21a バス電極部用耐ブラスト保護膜
 21b グリッド電極部用耐ブラスト保護膜
 22 平坦領域
 31b 低濃度n型拡散層
DESCRIPTION OF SYMBOLS 1, 1 'p-type single crystal silicon substrate made low-reflection 1a p-type single crystal silicon substrate 2, 31a High concentration n type diffused layer 3 Etching-resistant film 4 Fine opening 5 Texture recessed part 10, 20 Photovoltaic device 11a N-type diffusion layer 12 Antireflection film 13 Light receiving surface side electrode 13a Bus electrode 13b Grid electrode 14 Back electrode 21 Anti-blast protective film 21a Anti-blast protective film for bus electrode part 21b Anti-blast protective film for grid electrode part 22 Flat region 31b Low Concentration n-type diffusion layer

Claims (7)

  1.  (100)単結晶シリコン基板の主表面に高濃度不純物拡散層を形成する工程と、
     前記高濃度不純物拡散層の上に耐エッチング性膜を形成する工程と、
     前記耐エッチング性膜に対してサンドブラスト加工処理を施して当該耐エッチング性膜を貫通して前記高濃度不純物拡散層に達する開口を形成する工程と、
     前記開口が形成された前記耐エッチング性膜を保護マスクとして、当該開口を介して当該耐エッチング性膜が耐性を有するアルカリ水溶液を用いた異方性エッチングを行う工程と、
     前記エッチングの後に、前記耐エッチング性膜を除去する工程と、
     を含むことを特徴とする低反射基板の製造方法。
    (100) forming a high concentration impurity diffusion layer on the main surface of the single crystal silicon substrate;
    Forming an etching resistant film on the high-concentration impurity diffusion layer;
    Performing a sandblasting treatment on the etching resistant film to form an opening that penetrates the etching resistant film and reaches the high-concentration impurity diffusion layer;
    Performing the anisotropic etching using the aqueous alkali solution having resistance to the etching resistant film through the opening, using the etching resistant film in which the opening is formed as a protective mask;
    Removing the etching resistant film after the etching;
    The manufacturing method of the low-reflection board | substrate characterized by including this.
  2.  前記耐エッチング性膜の形成後、前記サンドブラスト加工処理の前に、当該サンドブラスト加工から当該耐エッチング性膜の一部を保護する耐ブラスト保護膜を形成する工程と、
     前記開口の形成後、前記耐ブラスト保護膜を除去する工程と、
     をさらに含むことを特徴とする請求項1に記載の低反射基板の製造方法。
    Forming a blast-resistant protective film that protects a part of the etching-resistant film from the sandblasting after the formation of the etching-resistant film and before the sandblasting treatment;
    Removing the blast resistant protective film after forming the opening;
    The method for manufacturing a low reflection substrate according to claim 1, further comprising:
  3.  前記単結晶シリコン基板の導電型はp型で、前記高濃度不純物拡散層の導電型はn型である
     ことを特徴とする請求項1または2に記載の低反射基板の製造方法。
    The method for manufacturing a low-reflection substrate according to claim 1 or 2, wherein the conductivity type of the single crystal silicon substrate is p-type, and the conductivity type of the high-concentration impurity diffusion layer is n-type.
  4.  アルミナ砥粒を用いて前記サンドブラスト加工処理を行う
     ことを特徴とする請求項1、2または3に記載の低反射基板の製造方法。
    The said sandblasting process is performed using an alumina abrasive grain. The manufacturing method of the low reflective board | substrate of Claim 1, 2, or 3 characterized by the above-mentioned.
  5.  請求項1~4のいずれか1つに記載の低反射基板の製造方法にて製造した低反射基板を用いて光起電力装置を製造する
     ことを特徴とする光起電力装置の製造方法。
    A photovoltaic device is manufactured using the low-reflection substrate manufactured by the method for manufacturing a low-reflection substrate according to any one of claims 1 to 4. A method for manufacturing a photovoltaic device, comprising:
  6.  請求項2に記載の低反射基板の製造方法にて製造した低反射基板を用いて、
     前記耐ブラスト保護膜を形成した領域下の前記高濃度不純物拡散層の上に受光面側電極を形成して光起電力装置を製造する
     ことを特徴とする光起電力装置の製造方法。
    Using the low reflection substrate manufactured by the low reflection substrate manufacturing method according to claim 2,
    A photovoltaic device is manufactured by forming a light-receiving surface side electrode on the high-concentration impurity diffusion layer under the region where the blast-resistant protective film is formed.
  7.  (100)p型単結晶シリコン基板と、
     前記基板の主表面上の一部に形成されたn型高濃度不純物拡散層と、
     前記n型高濃度不純物拡散層の上に形成された受光面側電極と、
     前記基板の主表面と反対側の裏面に形成された裏面電極と、
     を備え、
     前記主表面上の前記受光面側電極が形成されていない領域には凹凸を有したテキスチャ構造が形成されている
     ことを特徴とする光起電力装置。
    A (100) p-type single crystal silicon substrate;
    An n-type high concentration impurity diffusion layer formed on a part of the main surface of the substrate;
    A light-receiving surface side electrode formed on the n-type high concentration impurity diffusion layer;
    A back electrode formed on the back surface opposite to the main surface of the substrate;
    With
    A photovoltaic device, wherein a texture structure having irregularities is formed in a region where the light receiving surface side electrode is not formed on the main surface.
PCT/JP2010/069618 2010-04-21 2010-11-04 Method for producing low reflection substrate, method for manufacturing photovoltaic device, and photovoltaic device WO2011132340A1 (en)

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