WO2009157052A1 - Method for manufacturing photovoltaic system - Google Patents

Method for manufacturing photovoltaic system Download PDF

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Publication number
WO2009157052A1
WO2009157052A1 PCT/JP2008/061410 JP2008061410W WO2009157052A1 WO 2009157052 A1 WO2009157052 A1 WO 2009157052A1 JP 2008061410 W JP2008061410 W JP 2008061410W WO 2009157052 A1 WO2009157052 A1 WO 2009157052A1
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Prior art keywords
diffusion layer
photovoltaic device
oxide film
forming step
manufacturing
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PCT/JP2008/061410
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French (fr)
Japanese (ja)
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濱本 哲
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三菱電機株式会社
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Priority to PCT/JP2008/061410 priority Critical patent/WO2009157052A1/en
Publication of WO2009157052A1 publication Critical patent/WO2009157052A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868Passivation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a photovoltaic device.
  • an impurity having a conductivity type opposite to that of a semiconductor substrate is diffused on the surface of the substrate to form an impurity diffusion layer (hereinafter referred to as a diffusion layer), and a PN junction is formed. It forms (for example, refer patent document 1).
  • a diffusion layer an impurity diffusion layer
  • PN junction a PN junction
  • the impurity concentration (doping concentration) for determining the conduction level is higher.
  • the diffusion layer also functions as a part of an electrode for efficiently extracting the generated current to an external circuit, it is preferable that the dopant concentration is high from that viewpoint.
  • the crystal quality in a silicon semiconductor shows better characteristics as the concentration of impurities present therein is lower. If the dopant concentration is too high, the crystal quality as a semiconductor is greatly reduced and the recombination rate is increased, so that the photovoltaic power is reduced. Therefore, it is important to set the dopant concentration to an appropriate concentration while balancing these three.
  • a thermal diffusion method is often used for forming a diffusion layer.
  • the thermal diffusion method is a method in which a substance containing the element to be diffused is heated to a high temperature in contact with the substrate surface and penetrated into the solid using dissolution in the solid and movement by thermal vibration.
  • phosphorus (P) diffusion is often used.
  • the thermal diffusion method since the diffusion source is in contact with the surface, the dopant concentration in the outermost surface portion is extremely high, and in many cases, the solid solubility (the upper limit at which the element can be dissolved in the solid) Has reached. Such a portion has extremely poor characteristics as a semiconductor, and is a major factor for reducing the photovoltaic power.
  • the present invention has been made in view of the above, and an object of the present invention is to obtain a method for manufacturing a photovoltaic device capable of removing the outermost surface of a diffusion layer formed on the surface of a semiconductor substrate by a thermal diffusion method with good controllability. To do.
  • a method for manufacturing a photovoltaic device comprises diffusing impurities of a second conductivity type on the light incident surface side of a semiconductor substrate of a first conductivity type.
  • An oxide film forming step of forming an oxide film by oxidizing while containing conductive impurities and an oxide film removing step of removing the oxide film are included.
  • the second conductivity type impurity is dissolved.
  • the outermost surface portion which is included near the limit of the degree of crystallinity and is deteriorated, is oxidized and removed without re-diffusion of the impurity of the second conductivity type.
  • the outermost surface portion of the diffusion layer can be removed easily and with good controllability.
  • the resulting photovoltaic device can convert the captured optical energy into electrical energy with high current-voltage characteristics, improve the output characteristics of the photovoltaic device, and obtain a highly efficient photovoltaic device Has the effect of being able to.
  • FIG. 1-1 is a top view of the photovoltaic device.
  • FIG. 1-2 is a rear view of the photovoltaic device.
  • 1-3 is a cross-sectional view taken along the line AA of FIG. 1-2.
  • FIG. 2-1 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 1).
  • FIG. 2-2 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 2).
  • FIG. 2-3 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 3).
  • FIG. 2-4 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 4).
  • FIG. 2-5 is a perspective view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 5).
  • FIG. 2-6 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 6).
  • FIG. 3-1 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 1).
  • FIG. 1 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 1).
  • FIG. 3-2 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 2).
  • FIG. 3-3 is a sectional view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 3).
  • FIG. 3-4 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (part 4).
  • FIG. 3-5 is a sectional view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 5).
  • FIG. 3-6 is a sectional view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 6).
  • FIG. 4 is a diagram showing the relationship between the thickness of the oxide film and the oxidation treatment time at each heat treatment temperature.
  • FIG. 5 is a diagram showing the diffusion coefficient of phosphorus in silicon.
  • FIG. 6 is a diagram showing the solid solubility of phosphorus in silicon.
  • FIG. 7-1 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 1).
  • FIG. 7-2 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 2).
  • FIG. 1 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 2).
  • FIG. 7-1 is a perspective view
  • FIG. 7-3 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 3).
  • FIG. 7-4 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (part 4).
  • FIG. 7-5 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 5).
  • FIG. 7-6 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 6).
  • FIG. 7-3 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 3).
  • FIG. 7-4 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (part 4).
  • FIG. 7-7 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 7).
  • 7-8 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 8).
  • FIG. FIG. 7-9 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 9).
  • FIG. 7-10 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing the photovoltaic device according to the second embodiment (No. 10).
  • FIG. 10 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing the photovoltaic device according to the second embodiment (No. 10).
  • FIGS. 8-1 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 1).
  • FIG. 8-2 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 2).
  • FIG. 8-3 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (No. 3).
  • FIG. 8-1 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 1).
  • FIG. 8-2 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 2).
  • FIG. 8-3 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (No. 3).
  • FIGS. 8-4 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (part 4).
  • FIG. 8-5 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (No. 5).
  • FIGS. 8-6 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 6).
  • FIGS. 8-7 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 7).
  • FIGS. 8-8 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 8).
  • FIGS. 8-9 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 9).
  • FIGS. 8-10 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 10).
  • FIG. 8-11 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 11).
  • Photovoltaic device 101 P-type silicon substrate 102 N-type diffusion layer 102a Outermost surface portion 102H High-concentration N-type diffusion layer 102L Low-concentration N-type diffusion layer 103 Silicon oxide film 109 Antireflection film 110 P + layer 111 Surface electrode 112 Grid electrode 113 Bus electrode 120 Back surface electrode 121 Back side extraction electrode 122 Back side current collecting electrode 131 Etching-resistant film 140a Texture structure formation region 140b Electrode formation region 141 Opening 142 Recess
  • FIGS. 1-1 to 1-3 are diagrams schematically showing an example of the overall configuration of the photovoltaic device
  • FIG. 1-1 is a top view of the photovoltaic device
  • FIG. 1 is a back view of the electromotive force device
  • FIG. 1-3 is a cross-sectional view taken along the line AA of FIG.
  • the photovoltaic device 100 includes a P-type silicon substrate (hereinafter also simply referred to as a silicon substrate) 101 as a semiconductor substrate, and an N-type impurity on one main surface (light-receiving surface) side of the P-type silicon substrate 101. And a P + layer 110 containing P-type impurities at a higher concentration than the silicon substrate 101 on the surface on the other main surface (back surface) side.
  • the photovoltaic device 100 includes an antireflection film 109 that prevents reflection of incident light on the light receiving surface of the photoelectric conversion layer, and a light receiving surface for locally collecting electricity generated by the photoelectric conversion layer.
  • the grid electrode 112 made of silver or the like provided, the bus electrode 113 made of silver or the like provided almost orthogonally to the grid electrode 112 for taking out the electricity collected by the grid electrode 112, and the photoelectric conversion layer
  • a back side extraction electrode 121 made of aluminum or the like provided on almost the entire back surface of the P-type silicon substrate 101 for the purpose of taking out electricity and reflecting incident light transmitted through the photoelectric conversion layer, and electricity generated in the back side extraction electrode 121
  • a back side collecting electrode 122 made of silver or the like for collecting current.
  • the grid electrode 112 and the bus electrode 113 on the light receiving surface side are combined, hereinafter, also referred to as the surface electrode 111, and the back side extraction electrode 121 and the back side collector electrode 122 on the back side are combined. Then, it is also referred to as a back electrode 120.
  • the photovoltaic device 100 configured in this way, sunlight is applied to the PN junction surface (the junction surface between the P-type silicon substrate 101 and the N-type diffusion layer 102) from the light-receiving surface side of the photovoltaic device 100. And holes and electrons are generated. Due to the electric field in the vicinity of the PN junction surface, the generated electrons move toward the N-type diffusion layer 102 and the holes move toward the P + layer 110. As a result, electrons are excessive in the N-type diffusion layer 102 and holes are excessive in the P + layer 110. As a result, photovoltaic power is generated.
  • This photovoltaic power is generated in a direction in which the PN junction is biased in the forward direction, the front electrode 111 connected to the N-type diffusion layer 102 becomes a negative pole, and the back electrode 120 connected to the P + layer 110 becomes a positive pole. Current flows in the external circuit that does not.
  • FIGS. 2-1 to 2-6 are perspective views schematically showing an example of the processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment.
  • FIGS. 3-1 to 3-6 are It is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic apparatus by this Embodiment 1.
  • a silicon substrate 101 is prepared (FIGS. 2-1 and 3-1). Here, it is assumed that a P-type polycrystalline silicon substrate that is most frequently used for consumer photovoltaic devices is used.
  • the silicon substrate 101 is manufactured by slicing a polycrystalline silicon ingot with a multi-wire saw and removing damage during slicing by wet etching using an acid or alkali solution.
  • the thickness of the silicon substrate 101 after removing the damage is 200 ⁇ m, and the dimensions are 150 mm ⁇ 150 mm.
  • a texture shape is formed simultaneously with or subsequent to the removal of damage. This is to provide an uneven shape on the surface of the silicon substrate 101 as a measure for efficiently absorbing light incident on the silicon substrate 101 inside.
  • the silicon substrate 101 after removing the damage is put into a thermal oxidation furnace, heated in an atmosphere of phosphorus (P) as an N-type impurity, and phosphorus is diffused at a high concentration on the surface of the silicon substrate 101, so that N-type diffusion is performed.
  • the layer 102 is formed (FIGS. 2-2 and 3-2).
  • phosphorus oxychloride (POCl 3 ) is used to form a phosphorus atmosphere and diffuse at 800 to 850 ° C.
  • the N-type diffusion layer 102 is controlled so that the sheet resistance is 30 to 80 ⁇ / ⁇ , preferably 40 to 60 ⁇ / ⁇ .
  • the phosphorus glass layer formed by heating in the presence of phosphorus oxychloride vapor is removed in a hydrofluoric acid solution.
  • the outermost surface portion 102a in the thickness range of about 10 nm from the surface of the N-type diffusion layer 102 has reached the limit or close to the limit of the solid solubility of phosphorus in the silicon substrate 101, and has characteristics as a semiconductor. This is a very bad part.
  • the silicon substrate 101 on which the N-type diffusion layer 102 is formed is put into an oxidation furnace in which a high-concentration ozone atmosphere can be introduced, and the outermost surface portion 102a of the N-type diffusion layer 102 is oxidized by taking in the phosphorus contained therein. (FIGS. 2-3 and 3-3).
  • a silicon oxide film 103 containing phosphorus is formed on the outermost surface of the N-type diffusion layer 102, but the lower portion remains the N-type diffusion layer 102.
  • the silicon thermal oxidation in this high-concentration ozone atmosphere is described in detail in Japanese Patent Application Laid-Open No. 2003-209108.
  • FIG. 4 is a diagram showing the relationship between the thickness of the oxide film and the oxidation treatment time at each heat treatment temperature. As shown in FIG. 4, for example, a thermal oxide film having a thickness of 10 nm can be formed in about 14 minutes at 500 ° C. and in about 9 minutes at 590 ° C.
  • FIG. 5 is a diagram showing the diffusion coefficient of phosphorus in silicon
  • FIG. 6 is a diagram showing the solid solubility of phosphorus in silicon.
  • the outermost surface portion 102a of the N-type diffusion layer 102 is in a state in which phosphorus is contained up to the solid solubility limit as shown in FIG. 6 by the diffusion treatment, but as shown in FIG.
  • the diffusion coefficient of phosphorus decreases rapidly as the temperature is low, and at a temperature of 700 ° C. or lower, preferably 600 ° C. or lower, which extends this graph, phosphorus can hardly move in the silicon crystal. Therefore, the oxidation of the silicon substrate (N-type diffusion layer 102) proceeds in such a manner that phosphorus is taken in along with the oxidation.
  • the outermost surface portion 102a to be removed can be changed to the silicon oxide film 103 while containing phosphorus.
  • the oxidation temperature is 300 to 700 ° C. where the diffusion coefficient of phosphorus is small and an oxidation rate of a certain level or more is obtained, preferably 400 to 600 ° C.
  • the thickness of the silicon oxide film 103 to be formed is 5 to 20 nm, Desirable is controlled in the range of 8 to 15 nm.
  • the silicon oxide film 103 on the outermost surface after oxidation is unnecessary and is removed (FIGS. 2-4 and 3-4).
  • Hydrofluoric acid dissolves the silicon oxide film, but does not dissolve the silicon crystal itself. Therefore, when this hydrofluoric acid is used, the dissolution reaction stops when the silicon oxide film 103 containing phosphorus on the outermost surface is removed, so that only the portion with poor crystallinity to be removed can be removed with good controllability.
  • the antireflection film 109 a SiN film is formed on the cell surface by plasma CVD (Chemical Vapor Deposition) method (FIGS. 2-5 and 3-5).
  • the film thickness and refractive index are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked as the antireflection film 109. Moreover, you may form by different film-forming methods, such as a sputtering method.
  • a paste mixed with aluminum is formed by screen printing on the entire surface of the back surface of the silicon substrate 101 other than the position where the back side collecting electrode 122 is formed, and the paste mixed with silver is formed at a predetermined position (back side collector) on the back surface of the silicon substrate 101.
  • the paste is mixed with silver on the surface of the silicon substrate 101 by the screen printing method.
  • the silicon substrate 101 is baked. For example, the firing process is performed at 760 ° C. in an air atmosphere, and the front electrode 111 is formed on the front surface and the back electrode 120 is formed on the back surface (FIGS. 2-6 and 3-6). At this time, the surface electrode 111 penetrates the antireflection film 109 and contacts the N-type diffusion layer 102 at the joint portion.
  • the N-type diffusion layer 102 can obtain a good resistive junction with the surface electrode 111.
  • aluminum diffuses from the paste mixed with aluminum formed on the back surface into the silicon substrate 101 to form the P + layer 110 having the BSF function on the back surface side of the silicon substrate 101 and used for forming the P + layer 110.
  • the missing aluminum in the paste is formed as the back side extraction electrode 121.
  • the photovoltaic device is manufactured through the above steps.
  • the heat treatment is performed in a high-concentration ozone atmosphere at a temperature of 700 ° C. or less at which phosphorus hardly diffuses. Only the outermost surface of the N-type diffusion layer 102 can be oxidized to form the silicon oxide film 103 containing phosphorus. Further, by etching this silicon oxide film 103 with hydrofluoric acid, only the silicon oxide film 103 can be etched without etching the P-type silicon substrate 101 (N-type diffusion layer 102). This has the effect that the portion of the N-type diffusion layer 102 having the highest phosphorus concentration and poor crystallinity can be removed easily and with good controllability.
  • the photovoltaic device 100 formed in this way has improved crystallinity at the outermost surface portion 102a of the N-type diffusion layer 102, so that a high photovoltaic power can be realized.
  • the output characteristics of the device 100 are improved, and the photovoltaic device 100 having high efficiency can be obtained.
  • the outermost surface portion 102a having poor crystallinity of the N-type diffusion layer 102 is removed, the efficiency is improved, and the photovoltaic device 100 to be manufactured contributes to the extension of the lifetime and the yield by the amount of addition. can do. As a result, the raw material can be reduced.
  • FIG. 7-1 to 7-11 are perspective views schematically showing an example of the processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment.
  • FIGS. 8-1 to 8-11 are FIGS.
  • FIG. 5 is a cross-sectional view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment.
  • FIGS. 7-1 to 8-11 for example, a part of the periphery of one grid electrode 112 of the photovoltaic device 100 of FIG. 1 is shown enlarged.
  • a P-type silicon substrate from which damage has been removed is prepared (FIGS. 7-1 and 8-1). Thereafter, the silicon substrate 101 after removal of the damage is put into a thermal oxidation furnace, heated in an atmosphere of phosphorus as an N-type impurity, and phosphorus is diffused at a high concentration on the surface of the silicon substrate 101, whereby a high-concentration N-type diffusion layer is formed.
  • 102H is formed (FIGS. 7-2 and 8-2).
  • phosphorus oxychloride is used to form a phosphorus atmosphere and diffused at 800 to 850 ° C.
  • the surface sheet resistance of the high concentration N-type diffusion layer 102H is controlled to be 30 to 60 ⁇ / ⁇ .
  • a film 131 having etching resistance (hereinafter referred to as an etching resistant film) 131 is formed on the high-concentration N-type diffusion layer 102H formed on one main surface (FIGS. 7-3 and 8-3).
  • the etching resistant film 131 is a material having resistance when the silicon substrate 101 is textured and etched later, and is a silicon nitride film (hereinafter, referred to as a SiN film), a silicon oxide (SiO 2 , SiO) film, a silicon oxynitride ( An SiON) film, an amorphous silicon ( réelle-Si) film, a diamond-like carbon film, a resin film, or the like can be used.
  • an SiN film having a thickness of 80 nm formed by plasma CVD is used as the etching resistant film 131.
  • the film thickness is 80 nm
  • an appropriate film thickness can be selected from the etching conditions at the time of texture / etching and the removability of the SiN film in the subsequent process.
  • an opening 141 that is a fine hole is formed in the texture structure forming region 140a on the etching resistant film 131 (FIGS. 7-4 and 8-4).
  • the surface of the underlying silicon substrate 101 (high-concentration N-type diffusion layer 102H) is exposed at the opening 141 portion.
  • the opening 141 is not formed in the electrode forming region 140b where the light incident side electrode (surface electrode) of the photovoltaic device 100 is to be formed without forming the texture structure.
  • the opening 141 can be formed by a laser irradiation method, a photolithography method used in a semiconductor process, or the like.
  • the vicinity of the surface of the silicon substrate 101 including the high-concentration N-type diffusion layer 102H is etched through the opening 141 opened in the etching resistant film 131 to form the recess 142 (FIGS. 7-5 and 8-5).
  • a concave portion 142 is formed on the surface of the silicon substrate 101 at the concentric position with the fine opening 141 as the center.
  • a mixed solution of hydrofluoric acid and nitric acid is used as an etching solution.
  • the mixing ratio is hydrofluoric acid 1: nitric acid 20: water 10.
  • the mixing ratio of the etching liquid can be changed to an appropriate mixing ratio depending on the desired etching rate and etching shape.
  • the high concentration N-type diffusion layer 102H in that portion is simultaneously removed. That is, of the surface of the recess 142 formed by this etching, the high concentration N-type diffusion layer 102H is formed on the substrate surface side, but no impurity is introduced in a deeper region.
  • the electrode formation region 140b where the surface electrode 111 is to be formed is in a state where the high-concentration N-type diffusion layer 102H remains. Further, as shown in FIGS. 7-5 and 8-5, the high-concentration N-type diffusion layer 102H can be left also in the portion between the adjacent recesses 142. Thus, the generated current is guided to the surface electrode 111 (grid electrode 112) through a low-resistance current path.
  • the silicon substrate 101 is again put into a thermal oxidation furnace and heated in the presence of phosphorus oxychloride vapor.
  • a low concentration N-type diffusion layer 102L in which phosphorus is diffused at a low concentration is formed on the surface of the recess 142 (FIGS. 7-7 and 8-7).
  • the diffusion temperature at this time is 800 to 850 ° C.
  • the high-concentration N-type diffusion layer 102H remains in the electrode formation region 140b at the time of the etching, the high-concentration N-type diffusion layer 102H remains almost as it is even if the low-concentration diffusion is performed again.
  • the high concentration N type diffusion layer 102H is removed during etching, and the low concentration N type diffusion layer 102L is formed on the surface of the concave portion 142.
  • the surface sheet resistance of the low concentration N-type diffusion layer 102L is controlled to be 60 to 150 ⁇ / ⁇ .
  • the phosphorus glass layer formed by heating in the presence of phosphorus oxychloride vapor is removed in a hydrofluoric acid solution. Thereafter, in this state, ozone oxidation is performed in the same manner as in the first embodiment, and the uppermost surface portions of the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L are oxidized including phosphorus. As a result, a silicon oxide film 103 containing phosphorus is formed on the outermost surfaces of the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L (FIGS. 7-8 and 8-8).
  • a high concentration N-type diffusion layer 102H is mainly provided below the portion where the electrode portion is provided, and a low concentration N-type diffusion layer 102L is provided at other portions. Therefore, as compared with the first embodiment, a structure that can suppress the influence of the outermost surface portion is employed. However, as long as the thermal diffusion method is taken, even the low-concentration N-type diffusion layer 102L contains phosphorus up to the solid solubility limit at the outermost surface portion, and the effect is avoided to some extent. Absent. Therefore, the output characteristics of the photovoltaic device 100 can be sufficiently improved with respect to the photovoltaic device 100 having the structure in which the concave portion 142 is formed as the texture structure.
  • the thickness to be oxidized may be smaller than that in the first embodiment because the structure capable of suppressing the influence of the outermost surface portion is used. Although it depends on the detailed structure including the surface electrode 111 and productivity, it is appropriate to control in the range of 5 to 15 nm.
  • the silicon oxide film 103 containing phosphorus at the outermost surface portions of the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L is removed using hydrofluoric acid to expose the silicon portion (FIG. 7- 9, FIG. 8-9), a SiN film as an antireflection film 109 is formed on the surface of the diffusion layer by a film forming method such as a plasma CVD method (FIGS. 7-10 and 8-10).
  • a paste mixed with aluminum is formed by screen printing on the entire surface of the back surface of the silicon substrate 101 other than the position where the back side collecting electrode 122 is formed, and the paste mixed with silver is formed at a predetermined position (back side collector) on the back surface of the silicon substrate 101.
  • the paste is mixed with silver on the surface of the silicon substrate 101 by the screen printing method.
  • a baking process is performed to form the back electrode 120 (the back side extraction electrode 121 and the back side current collecting electrode 122) and the front surface electrode 111 (the grid electrode 112 and the bus electrode 113).
  • the firing process is performed at 760 ° C. in an air atmosphere.
  • the surface electrode 111 penetrates the antireflection film 109 and contacts the high-concentration N-type diffusion layer 102H at the joint portion.
  • the high-concentration N-type diffusion layer 102H can obtain a good resistive junction with the surface electrode 111.
  • aluminum diffuses from the paste mixed with aluminum formed on the back surface into the silicon substrate 101 to form a P + layer 110 having a BSF function on the back surface side of the silicon substrate 101 and used for forming the P + layer 110.
  • the aluminum in the paste that did not exist becomes the back electrode 120 (FIGS. 7-11 and 8-11).
  • the photovoltaic device 100 is manufactured through the above steps.
  • This second embodiment can also obtain the same effects as those of the first embodiment.
  • the silicon substrate used in the first and second embodiments is a P-type silicon substrate, other than a reverse-conductivity type photovoltaic device or silicon substrate that forms a P-type diffusion layer using an N-type silicon substrate.
  • a photovoltaic device using this semiconductor substrate also has the same effect.
  • a polycrystalline silicon substrate is used as the substrate, it goes without saying that the same effect can be obtained by using a single crystal silicon substrate.
  • the thickness of the substrate is 200 ⁇ m is shown here, a substrate that can be self-supported, for example, thinned to about 50 ⁇ m can be used.
  • substrate was also 150 mm x 150 mm was shown, it cannot be overemphasized that the same effect is acquired even if it is larger or smaller than this.
  • the method for manufacturing a photovoltaic device according to the present invention is useful for a solar cell that generates power using sunlight.

Abstract

In a method for manufacturing a photovoltaic system, the outermost surface of a diffused layer formed on the surface of a semiconductor substrate by a thermal diffusion method is removed with excellent controllability. The manufacturing method includes an N-type diffused layer formation step for forming an N-type diffused layer (102) by diffusing an N-type impurity on the light incident surface side of a P-type silicon substrate (101); a silicon oxide film formation step for forming a silicon oxide film (103) by oxidizing the outermost surface section of the N-type diffused layer (102) at a temperature where the N-type impurity is not diffused while containing the N-type impurity diffused in the outermost surface section; and a silicon oxide film removal step for removing the silicon oxide film (103).

Description

光起電力装置の製造方法Method for manufacturing photovoltaic device
 この発明は、光起電力装置の製造方法に関するものである。 The present invention relates to a method for manufacturing a photovoltaic device.
 一般に、光起電力装置を作製するには、半導体基板の導電型と反対の導電型が得られる不純物を基板表面に拡散させて不純物拡散層(以下、拡散層という)を形成し、PN接合を形成する(たとえば、特許文献1参照)。光起電力装置において、光起電力は各導電型の準位格差に大きく依存する為、その視点からは、導電準位を決定する不純物濃度(ドーパンド濃度)は、それぞれ高い方が好ましい。加えて、拡散層は発生した電流を効率よく外部回路に取り出す為の電極の一部としても機能するので、その視点からも、ドーパンド濃度は高い方がよい。 In general, in order to manufacture a photovoltaic device, an impurity having a conductivity type opposite to that of a semiconductor substrate is diffused on the surface of the substrate to form an impurity diffusion layer (hereinafter referred to as a diffusion layer), and a PN junction is formed. It forms (for example, refer patent document 1). In the photovoltaic device, since the photovoltaic power greatly depends on the level difference of each conductivity type, from the viewpoint, it is preferable that the impurity concentration (doping concentration) for determining the conduction level is higher. In addition, since the diffusion layer also functions as a part of an electrode for efficiently extracting the generated current to an external circuit, it is preferable that the dopant concentration is high from that viewpoint.
 一方、シリコン半導体における結晶品質は、その内部に存在する不純物濃度が低いほど良好な特性を示す。ドーパンド濃度が高すぎると、半導体としての結晶品質が大きく低下し、再結合速度が増加するので、光起電力を低下させてしまう。したがって、ドーパント濃度は、これらの3つのバランスを取りながら、適切な濃度に設定することが重要である。 On the other hand, the crystal quality in a silicon semiconductor shows better characteristics as the concentration of impurities present therein is lower. If the dopant concentration is too high, the crystal quality as a semiconductor is greatly reduced and the recombination rate is increased, so that the photovoltaic power is reduced. Therefore, it is important to set the dopant concentration to an appropriate concentration while balancing these three.
特開平10-70296号公報JP-A-10-70296
 ところで、上記特許文献1にも示されるように、拡散層の形成には熱拡散法がよく用いられる。熱拡散法とは、拡散させたい元素を含む物質が基板表面に接する状態で高温に加熱し、固体内への溶解と熱振動による移動を利用して、固体内部へ浸透させていく方法であり、結晶系シリコン太陽電池の場合には、リン(P)拡散が多く用いられている。熱拡散法は、拡散源が表面に接して行われる関係上、最表面部分のドーパント濃度は極めて高濃度になり、多くの場合は固溶度(その元素が固体中に溶解し得る上限)に達している。このような部分は半導体としての特性が極めて悪く、光起電力を低下させる大きな要因となっている。 By the way, as shown in the above-mentioned Patent Document 1, a thermal diffusion method is often used for forming a diffusion layer. The thermal diffusion method is a method in which a substance containing the element to be diffused is heated to a high temperature in contact with the substrate surface and penetrated into the solid using dissolution in the solid and movement by thermal vibration. In the case of crystalline silicon solar cells, phosphorus (P) diffusion is often used. In the thermal diffusion method, since the diffusion source is in contact with the surface, the dopant concentration in the outermost surface portion is extremely high, and in many cases, the solid solubility (the upper limit at which the element can be dissolved in the solid) Has reached. Such a portion has extremely poor characteristics as a semiconductor, and is a major factor for reducing the photovoltaic power.
 上述のようなドーパント濃度の高い部分の影響を抑え、光起電力を向上させるには、この拡散層の最表面部分を除去することが重要な方法の一つであるが、この最表面の除去すべき部分の厚さは10nm前後と非常に薄いものである。そのため、この薄い部分を広い面積全体に渡って制御性よく除去する方法が求められている。しかし、一般的な方法であるエッチングによる除去では、この薄い部分を広い面積全体に渡って制御性よく除去するのは非常に難しいという問題点があった。また、酸化による除去も挙げられるが、通常の熱酸化は拡散温度と同等以上の高温でおこなわれる為、加熱に伴ってリンが再び移動してしまい、新たな界面もまた非常に高濃度になってしまうという問題点があった。 In order to suppress the influence of the portion having a high dopant concentration as described above and improve the photovoltaic power, it is one of important methods to remove the outermost surface portion of the diffusion layer. The thickness of the portion to be obtained is very thin, around 10 nm. Therefore, there is a demand for a method for removing this thin portion with good controllability over a wide area. However, the removal by etching, which is a general method, has a problem that it is very difficult to remove this thin portion with good controllability over a wide area. Although removal by oxidation is also mentioned, since normal thermal oxidation is performed at a high temperature equal to or higher than the diffusion temperature, phosphorus moves again with heating, and the new interface also has a very high concentration. There was a problem that it was.
 この発明は上記に鑑みてなされたもので、半導体基板の表面に熱拡散法によって形成した拡散層の最表面を制御性よく除去することができる光起電力装置の製造方法を得ることを目的とする。 The present invention has been made in view of the above, and an object of the present invention is to obtain a method for manufacturing a photovoltaic device capable of removing the outermost surface of a diffusion layer formed on the surface of a semiconductor substrate by a thermal diffusion method with good controllability. To do.
 上記目的を達成するため、この発明にかかる光起電力装置の製造方法は、第1の導電型の半導体基板の光の入射面側に第2の導電型の不純物を拡散して、第1の濃度の第1の拡散層を形成する第1の拡散層形成工程と、前記第2の導電型の不純物が拡散しない温度で、前記第1の拡散層の最表面部分に拡散した前記第2の導電型の不純物を含みながら酸化し、酸化膜を形成する酸化膜形成工程と、前記酸化膜を除去する酸化膜除去工程と、を含むことを特徴とする。 In order to achieve the above object, a method for manufacturing a photovoltaic device according to the present invention comprises diffusing impurities of a second conductivity type on the light incident surface side of a semiconductor substrate of a first conductivity type. A first diffusion layer forming step of forming a first diffusion layer having a concentration; and the second diffusion layer diffused into the outermost surface portion of the first diffusion layer at a temperature at which the impurities of the second conductivity type do not diffuse. An oxide film forming step of forming an oxide film by oxidizing while containing conductive impurities and an oxide film removing step of removing the oxide film are included.
 この発明によれば、第1の導電型の半導体基板の光の入射面側に第2の導電型の不純物を含む第1の拡散層を形成した後、第2の導電型の不純物が固溶度限界近くに含まれ、結晶性の悪化している最表面部分を、第2の導電型の不純物を再拡散させないで酸化させて、除去するようにしたので、光起電力を低下させる第1の拡散層の最表面部分を簡便かつ制御性よく除去することができる。その結果得られる光起電力装置は、取り込んだ光エネルギを高い電流電圧特性で電気エネルギに変換することができ、光起電力装置の出力特性が向上し、高効率の光起電力装置を得ることができるという効果を有する。 According to the present invention, after the first diffusion layer containing the second conductivity type impurity is formed on the light incident surface side of the first conductivity type semiconductor substrate, the second conductivity type impurity is dissolved. The outermost surface portion, which is included near the limit of the degree of crystallinity and is deteriorated, is oxidized and removed without re-diffusion of the impurity of the second conductivity type. The outermost surface portion of the diffusion layer can be removed easily and with good controllability. The resulting photovoltaic device can convert the captured optical energy into electrical energy with high current-voltage characteristics, improve the output characteristics of the photovoltaic device, and obtain a highly efficient photovoltaic device Has the effect of being able to.
図1-1は、光起電力装置の上面図である。FIG. 1-1 is a top view of the photovoltaic device. 図1-2は、光起電力装置の裏面図である。FIG. 1-2 is a rear view of the photovoltaic device. 図1-3は、図1-2のA-A断面図である。1-3 is a cross-sectional view taken along the line AA of FIG. 1-2. 図2-1は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図である(その1)。FIG. 2-1 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 1). 図2-2は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図である(その2)。FIG. 2-2 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 2). 図2-3は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図である(その3)。FIG. 2-3 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 3). 図2-4は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図である(その4)。FIG. 2-4 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 4). 図2-5は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図である(その5)。FIG. 2-5 is a perspective view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 5). 図2-6は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図である(その6)。FIG. 2-6 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 6). 図3-1は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その1)。FIG. 3-1 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 1). 図3-2は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その2)。FIG. 3-2 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 2). 図3-3は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その3)。FIG. 3-3 is a sectional view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 3). 図3-4は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その4)。FIG. 3-4 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (part 4). 図3-5は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その5)。FIG. 3-5 is a sectional view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 5). 図3-6は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その6)。FIG. 3-6 is a sectional view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment (No. 6). 図4は、各熱処理温度における酸化膜の厚さと酸化処理時間との間の関係を示す図である。FIG. 4 is a diagram showing the relationship between the thickness of the oxide film and the oxidation treatment time at each heat treatment temperature. 図5は、シリコン中のリンの拡散係数を示す図である。FIG. 5 is a diagram showing the diffusion coefficient of phosphorus in silicon. 図6は、シリコン中のリンの固溶度を示す図である。FIG. 6 is a diagram showing the solid solubility of phosphorus in silicon. 図7-1は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その1)。FIG. 7-1 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 1). 図7-2は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その2)。FIG. 7-2 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 2). 図7-3は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その3)。FIG. 7-3 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 3). 図7-4は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その4)。FIG. 7-4 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (part 4). 図7-5は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その5)。FIG. 7-5 is a perspective view schematically showing one example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 5). 図7-6は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その6)。FIG. 7-6 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 6). 図7-7は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その7)。FIG. 7-7 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 7). 図7-8は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その8)。7-8 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 8). FIG. 図7-9は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その9)。FIG. 7-9 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 9). 図7-10は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その10)。FIG. 7-10 is a perspective view schematically showing one example of a processing procedure of the method for manufacturing the photovoltaic device according to the second embodiment (No. 10). 図7-11は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図である(その11)。FIG. 7-11 is a perspective view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment (No. 11). 図8-1は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その1)。FIGS. 8-1 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 1). 図8-2は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その2)。FIG. 8-2 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 2). 図8-3は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その3)。FIG. 8-3 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (No. 3). 図8-4は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その4)。FIG. 8-4 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (part 4). 図8-5は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その5)。FIG. 8-5 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic apparatus according to the second embodiment (No. 5). 図8-6は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その6)。FIGS. 8-6 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 6). 図8-7は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その7)。FIGS. 8-7 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 7). 図8-8は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その8)。FIGS. 8-8 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 8). 図8-9は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その9)。FIGS. 8-9 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 9). 図8-10は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その10)。FIGS. 8-10 is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic device by this Embodiment 2 (the 10). 図8-11は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である(その11)。FIG. 8-11 is a sectional view schematically showing an example of a processing procedure of the manufacturing method of the photovoltaic device according to the second embodiment (No. 11).
符号の説明Explanation of symbols
100 光起電力装置
101 P型シリコン基板
102 N型拡散層
102a 最表面部分
102H 高濃度N型拡散層
102L 低濃度N型拡散層
103 シリコン酸化膜
109 反射防止膜
110 P+層
111 表面電極
112 グリッド電極
113 バス電極
120 裏面電極
121 裏側取出電極
122 裏側集電電極
131 耐エッチング膜
140a テクスチャ構造形成領域
140b 電極形成領域
141 開口
142 凹部
100 Photovoltaic device 101 P-type silicon substrate 102 N-type diffusion layer 102a Outermost surface portion 102H High-concentration N-type diffusion layer 102L Low-concentration N-type diffusion layer 103 Silicon oxide film 109 Antireflection film 110 P + layer 111 Surface electrode 112 Grid electrode 113 Bus electrode 120 Back surface electrode 121 Back side extraction electrode 122 Back side current collecting electrode 131 Etching-resistant film 140a Texture structure formation region 140b Electrode formation region 141 Opening 142 Recess
 以下に添付図面を参照して、この発明にかかる光起電力装置の製造方法の好適な実施の形態を詳細に説明する。なお、これらの実施の形態によりこの発明が限定されるものではない。また、以下の実施の形態で用いられる光電変換装置の断面図は模式的なものであり、層の厚みと幅との関係や各層の厚みの比率などは現実のものとは異なる。 DETAILED DESCRIPTION Exemplary embodiments of a method for producing a photovoltaic device according to the present invention will be described below in detail with reference to the accompanying drawings. Note that the present invention is not limited to these embodiments. In addition, cross-sectional views of photoelectric conversion devices used in the following embodiments are schematic, and the relationship between layer thickness and width, the ratio of the thickness of each layer, and the like are different from actual ones.
実施の形態1.
 最初に、この発明による実施の形態1の光起電力装置の製造方法について説明する前に、一般的な光起電力装置の全体構成の概要について説明する。図1-1~図1-3は、光起電力装置の全体構成の一例を模式的に示す図であり、図1-1は光起電力装置の上面図であり、図1-2は光起電力装置の裏面図であり、図1-3は図1-2のA-A断面図である。光起電力装置100は、半導体基板としてのP型シリコン基板(以下、単にシリコン基板ともいう)101と、このP型シリコン基板101の一方の主面(受光面)側の表面にN型の不純物を拡散させたN型拡散層102と、他方の主面(裏面)側の表面にシリコン基板101よりも高濃度にP型の不純物を含んだP+層110と、を含む光電変換層を備える。
Embodiment 1 FIG.
First, before describing the manufacturing method of the photovoltaic device according to the first embodiment of the present invention, an outline of the general configuration of a general photovoltaic device will be described. FIGS. 1-1 to 1-3 are diagrams schematically showing an example of the overall configuration of the photovoltaic device, FIG. 1-1 is a top view of the photovoltaic device, and FIG. FIG. 1 is a back view of the electromotive force device, and FIG. 1-3 is a cross-sectional view taken along the line AA of FIG. The photovoltaic device 100 includes a P-type silicon substrate (hereinafter also simply referred to as a silicon substrate) 101 as a semiconductor substrate, and an N-type impurity on one main surface (light-receiving surface) side of the P-type silicon substrate 101. And a P + layer 110 containing P-type impurities at a higher concentration than the silicon substrate 101 on the surface on the other main surface (back surface) side.
 また、光起電力装置100は、光電変換層の受光面への入射光の反射を防止する反射防止膜109と、光電変換層で発電された電気を局所的に集電するために受光面に設けられる銀などからなるグリッド電極112と、グリッド電極112で集電された電気を取り出すためにグリッド電極112にほぼ直交して設けられる銀などからなるバス電極113と、光電変換層で発電された電気の取り出しと光電変換層を透過した入射光の反射を目的としてP型シリコン基板101の裏面のほぼ全面に設けられるアルミニウムなどからなる裏側取出電極121と、この裏側取出電極121に生じた電気を集電する銀などからなる裏側集電電極122と、を備える。なお、受光面側(表面側)のグリッド電極112とバス電極113とを合わせて、以下では、表面電極111ともいい、裏面側の裏側取出電極121と裏側集電電極122とを合わせて、以下では、裏面電極120ともいう。 Further, the photovoltaic device 100 includes an antireflection film 109 that prevents reflection of incident light on the light receiving surface of the photoelectric conversion layer, and a light receiving surface for locally collecting electricity generated by the photoelectric conversion layer. The grid electrode 112 made of silver or the like provided, the bus electrode 113 made of silver or the like provided almost orthogonally to the grid electrode 112 for taking out the electricity collected by the grid electrode 112, and the photoelectric conversion layer A back side extraction electrode 121 made of aluminum or the like provided on almost the entire back surface of the P-type silicon substrate 101 for the purpose of taking out electricity and reflecting incident light transmitted through the photoelectric conversion layer, and electricity generated in the back side extraction electrode 121 And a back side collecting electrode 122 made of silver or the like for collecting current. In addition, the grid electrode 112 and the bus electrode 113 on the light receiving surface side (front surface side) are combined, hereinafter, also referred to as the surface electrode 111, and the back side extraction electrode 121 and the back side collector electrode 122 on the back side are combined. Then, it is also referred to as a back electrode 120.
 このように構成された光起電力装置100では、太陽光が光起電力装置100の受光面側からPN接合面(P型シリコン基板101とN型拡散層102との接合面)に照射されると、ホールと電子が生成する。PN接合面付近の電界によって、生成した電子はN型拡散層102に向かって移動し、ホールはP+層110に向かって移動する。これにより、N型拡散層102に電子が過剰となり、P+層110にホールが過剰となる結果、光起電力が発生する。この光起電力はPN接合を順方向にバイアスする向きに生じ、N型拡散層102に接続した表面電極111がマイナス極となり、P+層110に接続した裏面電極120がプラス極となって、図示しない外部回路に電流が流れる。 In the photovoltaic device 100 configured in this way, sunlight is applied to the PN junction surface (the junction surface between the P-type silicon substrate 101 and the N-type diffusion layer 102) from the light-receiving surface side of the photovoltaic device 100. And holes and electrons are generated. Due to the electric field in the vicinity of the PN junction surface, the generated electrons move toward the N-type diffusion layer 102 and the holes move toward the P + layer 110. As a result, electrons are excessive in the N-type diffusion layer 102 and holes are excessive in the P + layer 110. As a result, photovoltaic power is generated. This photovoltaic power is generated in a direction in which the PN junction is biased in the forward direction, the front electrode 111 connected to the N-type diffusion layer 102 becomes a negative pole, and the back electrode 120 connected to the P + layer 110 becomes a positive pole. Current flows in the external circuit that does not.
 つぎに、このような構造の光起電力装置100の製造方法について説明する。図2-1~図2-6は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す斜視図であり、図3-1~図3-6は、この実施の形態1による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である。なお、これらの図2-1~図3-6では、光起電力装置100の1本のグリッド電極112の周辺の一部を拡大して示している。 Next, a method for manufacturing the photovoltaic device 100 having such a structure will be described. FIGS. 2-1 to 2-6 are perspective views schematically showing an example of the processing procedure of the manufacturing method of the photovoltaic device according to the first embodiment. FIGS. 3-1 to 3-6 are It is sectional drawing which shows typically an example of the process sequence of the manufacturing method of the photovoltaic apparatus by this Embodiment 1. FIG. In these FIGS. 2-1 to 3-6, a part of the periphery of one grid electrode 112 of the photovoltaic device 100 is shown enlarged.
 まず、シリコン基板101を用意する(図2-1、図3-1)。ここでは、民生用光起電力装置向けとして最も多く使用されているP型多結晶シリコン基板を使用するものとする。このシリコン基板101は、多結晶シリコンインゴットからマルチワイヤソーでスライスし、酸またはアルカリ溶液を用いたウェットエッチングでスライス時のダメージを除去して製造する。ダメージ除去後のシリコン基板101の厚みは200μmであり、寸法は150mm×150mmである。 First, a silicon substrate 101 is prepared (FIGS. 2-1 and 3-1). Here, it is assumed that a P-type polycrystalline silicon substrate that is most frequently used for consumer photovoltaic devices is used. The silicon substrate 101 is manufactured by slicing a polycrystalline silicon ingot with a multi-wire saw and removing damage during slicing by wet etching using an acid or alkali solution. The thickness of the silicon substrate 101 after removing the damage is 200 μm, and the dimensions are 150 mm × 150 mm.
 なお、ダメージ除去と同時に、またはそれに続いて、テクスチャ形状を形成する場合も多い。これはシリコン基板101に入射する光を効率的に内部に吸収させる為の方策として、シリコン基板101の表面に凹凸形状を設けるものである。 In many cases, a texture shape is formed simultaneously with or subsequent to the removal of damage. This is to provide an uneven shape on the surface of the silicon substrate 101 as a measure for efficiently absorbing light incident on the silicon substrate 101 inside.
 ついで、ダメージ除去後のシリコン基板101を熱酸化炉へ投入し、N型の不純物としてのリン(P)の雰囲気下で加熱し、シリコン基板101表面にリンを高濃度に拡散させ、N型拡散層102を形成する(図2-2、図3-2)。ここではリン雰囲気の形成にオキシ塩化リン(POCl3)を用いて、800~850℃で拡散させる。また、N型拡散層102は、シート抵抗が30~80Ω/□、望ましくは40~60Ω/□となるように制御する。その後、オキシ塩化リン蒸気の存在下で加熱して生じたリンガラス層をフッ酸溶液中で除去する。なお、このN型拡散層102の表面から10nm前後の厚さの範囲の最表面部分102aは、リンのシリコン基板101への固溶度の限界または限界近くに達しており、半導体としての特性が極めて悪い部分である。 Next, the silicon substrate 101 after removing the damage is put into a thermal oxidation furnace, heated in an atmosphere of phosphorus (P) as an N-type impurity, and phosphorus is diffused at a high concentration on the surface of the silicon substrate 101, so that N-type diffusion is performed. The layer 102 is formed (FIGS. 2-2 and 3-2). Here, phosphorus oxychloride (POCl 3 ) is used to form a phosphorus atmosphere and diffuse at 800 to 850 ° C. The N-type diffusion layer 102 is controlled so that the sheet resistance is 30 to 80 Ω / □, preferably 40 to 60 Ω / □. Thereafter, the phosphorus glass layer formed by heating in the presence of phosphorus oxychloride vapor is removed in a hydrofluoric acid solution. Note that the outermost surface portion 102a in the thickness range of about 10 nm from the surface of the N-type diffusion layer 102 has reached the limit or close to the limit of the solid solubility of phosphorus in the silicon substrate 101, and has characteristics as a semiconductor. This is a very bad part.
 ついで、N型拡散層102を形成したシリコン基板101を、高濃度オゾン雰囲気を導入可能な酸化炉に投入し、N型拡散層102の最表面部分102aを、含有するリンを取り込む形で酸化する(図2-3、図3-3)。これによって、N型拡散層102の最表面にはリンを含むシリコン酸化膜103が形成されるが、その下部はN型拡散層102のままである。なお、この高濃度オゾン雰囲気でのシリコン熱酸化に関しては、特開2003-209108号公報に詳しく記載されている。 Next, the silicon substrate 101 on which the N-type diffusion layer 102 is formed is put into an oxidation furnace in which a high-concentration ozone atmosphere can be introduced, and the outermost surface portion 102a of the N-type diffusion layer 102 is oxidized by taking in the phosphorus contained therein. (FIGS. 2-3 and 3-3). As a result, a silicon oxide film 103 containing phosphorus is formed on the outermost surface of the N-type diffusion layer 102, but the lower portion remains the N-type diffusion layer 102. The silicon thermal oxidation in this high-concentration ozone atmosphere is described in detail in Japanese Patent Application Laid-Open No. 2003-209108.
 高濃度オゾン雰囲気で熱酸化を行うと、一般的な熱酸化法に比べて低温で高速に酸化反応を進めることができる。図4は、各熱処理温度における酸化膜の厚さと酸化処理時間との間の関係を示す図である。この図4に示されるように、たとえば500℃では約14分間、590℃では約9分間で10nmの厚さの熱酸化膜を形成することができる。 ¡When thermal oxidation is performed in a high-concentration ozone atmosphere, the oxidation reaction can proceed at a higher speed at a lower temperature than in general thermal oxidation methods. FIG. 4 is a diagram showing the relationship between the thickness of the oxide film and the oxidation treatment time at each heat treatment temperature. As shown in FIG. 4, for example, a thermal oxide film having a thickness of 10 nm can be formed in about 14 minutes at 500 ° C. and in about 9 minutes at 590 ° C.
 図5は、シリコン中のリンの拡散係数を示す図であり、図6は、シリコン中のリンの固溶度を示す図である。N型拡散層102の最表面部分102aは、拡散処理によって図6のように固溶度限界程度までリンが含まれている状態にあるが、図5に示されるように、シリコン結晶中でのリンの拡散係数は低温であるほど急激に小さくなり、このグラフを延長させた700℃以下、望ましくは600℃以下の温度では、リンはシリコン結晶内を移動することがほとんどできない。したがって、酸化に伴ってリンも取り込まれる形でシリコン基板(N型拡散層102)の酸化が進む。このようにして、除去したい最表面部分102aを、リンを含んだままシリコン酸化膜103に変えることができる。酸化温度は、リンの拡散係数が小さく、かつ一定以上の酸化速度が得られる300~700℃、望ましきは400~600℃で行い、形成するシリコン酸化膜103の厚さは5~20nm、望ましきは8~15nmの範囲で制御するとよい。 FIG. 5 is a diagram showing the diffusion coefficient of phosphorus in silicon, and FIG. 6 is a diagram showing the solid solubility of phosphorus in silicon. The outermost surface portion 102a of the N-type diffusion layer 102 is in a state in which phosphorus is contained up to the solid solubility limit as shown in FIG. 6 by the diffusion treatment, but as shown in FIG. The diffusion coefficient of phosphorus decreases rapidly as the temperature is low, and at a temperature of 700 ° C. or lower, preferably 600 ° C. or lower, which extends this graph, phosphorus can hardly move in the silicon crystal. Therefore, the oxidation of the silicon substrate (N-type diffusion layer 102) proceeds in such a manner that phosphorus is taken in along with the oxidation. In this way, the outermost surface portion 102a to be removed can be changed to the silicon oxide film 103 while containing phosphorus. The oxidation temperature is 300 to 700 ° C. where the diffusion coefficient of phosphorus is small and an oxidation rate of a certain level or more is obtained, preferably 400 to 600 ° C. The thickness of the silicon oxide film 103 to be formed is 5 to 20 nm, Desirable is controlled in the range of 8 to 15 nm.
 その後、酸化した後の最表面部分のシリコン酸化膜103は不要なので除去する(図2-4、図3-4)。フッ酸は、シリコン酸化膜を溶解するが、シリコン結晶自体は溶解しない。したがって、このフッ酸を用いると、最表面のリンを含むシリコン酸化膜103を除去した段階で溶解反応が止まる為、除去したい結晶性の悪い部分のみを制御性よく除去することができる。 Thereafter, the silicon oxide film 103 on the outermost surface after oxidation is unnecessary and is removed (FIGS. 2-4 and 3-4). Hydrofluoric acid dissolves the silicon oxide film, but does not dissolve the silicon crystal itself. Therefore, when this hydrofluoric acid is used, the dissolution reaction stops when the silicon oxide film 103 containing phosphorus on the outermost surface is removed, so that only the portion with poor crystallinity to be removed can be removed with good controllability.
 ついで、反射防止膜109として、プラズマCVD(Chemical Vapor Deposition)法によって、セル表面にSiN膜を形成する(図2-5、図3-5)。膜厚および屈折率は、光反射を最も抑制する値に設定する。なお、反射防止膜109として、屈折率の異なる2層以上の膜を積層してもよい。また、スパッタ法など異なる成膜方法によって形成してもよい。 Next, as the antireflection film 109, a SiN film is formed on the cell surface by plasma CVD (Chemical Vapor Deposition) method (FIGS. 2-5 and 3-5). The film thickness and refractive index are set to values that most suppress light reflection. Note that two or more layers having different refractive indexes may be stacked as the antireflection film 109. Moreover, you may form by different film-forming methods, such as a sputtering method.
 その後、アルミニウムの混入したペーストをシリコン基板101の裏面の裏側集電電極122形成位置以外の全面にスクリーン印刷法で形成し、銀の混入したペーストをシリコン基板101の裏面の所定の位置(裏側集電電極122形成位置)にスクリーン印刷法で形成し、また、銀を混入したペーストをシリコン基板101の表面に櫛形にスクリーン印刷法で形成する。そして、このシリコン基板101の焼成処理を実施する。焼成処理は、たとえば、大気雰囲気中、760℃で実施し、表面には表面電極111が形成され、裏面には裏面電極120が形成される(図2-6、図3-6)。このとき、表面電極111は、接合部分において、反射防止膜109を突き抜けN型拡散層102とコンタクトする。これによって、N型拡散層102は表面電極111と良好な抵抗性接合を得ることができる。また、裏面に形成されたアルミニウムの混入したペーストからアルミニウムがシリコン基板101中に拡散し、シリコン基板101の裏面側にBSF機能を有するP+層110を形成するとともに、P+層110の形成に使用されなかったペースト中のアルミニウムは、裏側取出電極121として形成される。以上の工程によって、光起電力装置が作製される。 Thereafter, a paste mixed with aluminum is formed by screen printing on the entire surface of the back surface of the silicon substrate 101 other than the position where the back side collecting electrode 122 is formed, and the paste mixed with silver is formed at a predetermined position (back side collector) on the back surface of the silicon substrate 101. The paste is mixed with silver on the surface of the silicon substrate 101 by the screen printing method. Then, the silicon substrate 101 is baked. For example, the firing process is performed at 760 ° C. in an air atmosphere, and the front electrode 111 is formed on the front surface and the back electrode 120 is formed on the back surface (FIGS. 2-6 and 3-6). At this time, the surface electrode 111 penetrates the antireflection film 109 and contacts the N-type diffusion layer 102 at the joint portion. As a result, the N-type diffusion layer 102 can obtain a good resistive junction with the surface electrode 111. In addition, aluminum diffuses from the paste mixed with aluminum formed on the back surface into the silicon substrate 101 to form the P + layer 110 having the BSF function on the back surface side of the silicon substrate 101 and used for forming the P + layer 110. The missing aluminum in the paste is formed as the back side extraction electrode 121. The photovoltaic device is manufactured through the above steps.
 この実施の形態1によれば、P型シリコン基板101にN型拡散層102を形成した後、高濃度オゾン雰囲気下で、リンがほとんど拡散しない温度の700℃以下で熱処理を行うようにしたので、N型拡散層102の最表面のみを酸化して、リンを含むシリコン酸化膜103を形成することができる。また、このシリコン酸化膜103をフッ酸でエッチングすることによって、P型シリコン基板101(N型拡散層102)をエッチングせず、シリコン酸化膜103のみをエッチングすることができる。これによって、N型拡散層102のリンの濃度が最も高く結晶性のよくない部分を簡便にかつ制御性よく除去することができるという効果を有する。また、このようにして形成された光起電力装置100は、N型拡散層102の最表面部分102aでの結晶性が改善されるので、高い光起電力を実現することができ、光起電力装置100の出力特性が向上し、高効率の光起電力装置100を得ることができるという効果を有する。 According to the first embodiment, after the N-type diffusion layer 102 is formed on the P-type silicon substrate 101, the heat treatment is performed in a high-concentration ozone atmosphere at a temperature of 700 ° C. or less at which phosphorus hardly diffuses. Only the outermost surface of the N-type diffusion layer 102 can be oxidized to form the silicon oxide film 103 containing phosphorus. Further, by etching this silicon oxide film 103 with hydrofluoric acid, only the silicon oxide film 103 can be etched without etching the P-type silicon substrate 101 (N-type diffusion layer 102). This has the effect that the portion of the N-type diffusion layer 102 having the highest phosphorus concentration and poor crystallinity can be removed easily and with good controllability. In addition, the photovoltaic device 100 formed in this way has improved crystallinity at the outermost surface portion 102a of the N-type diffusion layer 102, so that a high photovoltaic power can be realized. The output characteristics of the device 100 are improved, and the photovoltaic device 100 having high efficiency can be obtained.
 また、N型拡散層102の結晶性の悪い最表面部分102aを除去したので、効率が向上し、製造される光起電力装置100は、その上積みがある分、長寿命化や歩留まり向上に寄与することができる。また、その結果、原材料を削減することができるという効果も有する。 Further, since the outermost surface portion 102a having poor crystallinity of the N-type diffusion layer 102 is removed, the efficiency is improved, and the photovoltaic device 100 to be manufactured contributes to the extension of the lifetime and the yield by the amount of addition. can do. As a result, the raw material can be reduced.
実施の形態2.
 実施の形態1では、拡散層の構造が一様な場合を示したが、この実施の形態2では、拡散層の構造が部分に応じて異なる場合の事例を示す。図7-1~図7-11は、この実施の形態2による光起電力装置の製造法方の処理手順の一例を模式的に示す斜視図であり、図8-1~図8-11は、この実施の形態2による光起電力装置の製造方法の処理手順の一例を模式的に示す断面図である。なお、これらの図7-1~図8-11では、たとえば図1の光起電力装置100の1本のグリッド電極112の周辺の一部を拡大して示している。
Embodiment 2. FIG.
In the first embodiment, the case where the structure of the diffusion layer is uniform is shown. However, in the second embodiment, a case where the structure of the diffusion layer differs depending on the part is shown. FIGS. 7-1 to 7-11 are perspective views schematically showing an example of the processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment. FIGS. 8-1 to 8-11 are FIGS. FIG. 5 is a cross-sectional view schematically showing an example of a processing procedure of the method for manufacturing a photovoltaic device according to the second embodiment. In FIGS. 7-1 to 8-11, for example, a part of the periphery of one grid electrode 112 of the photovoltaic device 100 of FIG. 1 is shown enlarged.
 まず、実施の形態1の場合の図2-1、図3-1の場合と同様に、ダメージを除去したP型シリコン基板を用意する(図7-1、図8-1)。その後、このダメージ除去後のシリコン基板101を熱酸化炉へ投入し、N型の不純物としてリンの雰囲気下で加熱し、シリコン基板101表面にリンを高濃度に拡散させ、高濃度N型拡散層102Hを形成する(図7-2、図8-2)。ここでは、リン雰囲気の形成にオキシ塩化リンを用いて、800~850℃で拡散させる。また、高濃度N型拡散層102Hの表面シート抵抗が30~60Ω/□となるように制御する。 First, similarly to the case of FIGS. 2-1 and 3-1 in the case of the first embodiment, a P-type silicon substrate from which damage has been removed is prepared (FIGS. 7-1 and 8-1). Thereafter, the silicon substrate 101 after removal of the damage is put into a thermal oxidation furnace, heated in an atmosphere of phosphorus as an N-type impurity, and phosphorus is diffused at a high concentration on the surface of the silicon substrate 101, whereby a high-concentration N-type diffusion layer is formed. 102H is formed (FIGS. 7-2 and 8-2). Here, phosphorus oxychloride is used to form a phosphorus atmosphere and diffused at 800 to 850 ° C. Further, the surface sheet resistance of the high concentration N-type diffusion layer 102H is controlled to be 30 to 60Ω / □.
 その後、一方の主面上に形成した高濃度N型拡散層102H上に、耐エッチング性を有する膜(以下、耐エッチング膜という)131を形成する(図7-3、図8-3)。この耐エッチング膜131は、後のシリコン基板101のテクスチャ・エッチング時で耐性を有する材料であり、窒化シリコン膜(以下、SiN膜という)、酸化シリコン(SiO2,SiO)膜、酸化窒化シリコン(SiON)膜、アモルファスシリコン(а-Si)膜、ダイアモンドライクカーボン膜、樹脂膜などを用いることができる。ここでは、耐エッチング膜131として、プラズマCVD法によって形成した膜厚80nmのSiN膜を用いる。なお、膜厚は80nmとしたが、テクスチャ・エッチング時のエッチング条件と、後工程でのSiN膜の除去性から適切な膜厚を選択することができる。 Thereafter, a film 131 having etching resistance (hereinafter referred to as an etching resistant film) 131 is formed on the high-concentration N-type diffusion layer 102H formed on one main surface (FIGS. 7-3 and 8-3). The etching resistant film 131 is a material having resistance when the silicon substrate 101 is textured and etched later, and is a silicon nitride film (hereinafter, referred to as a SiN film), a silicon oxide (SiO 2 , SiO) film, a silicon oxynitride ( An SiON) film, an amorphous silicon (а-Si) film, a diamond-like carbon film, a resin film, or the like can be used. Here, an SiN film having a thickness of 80 nm formed by plasma CVD is used as the etching resistant film 131. Although the film thickness is 80 nm, an appropriate film thickness can be selected from the etching conditions at the time of texture / etching and the removability of the SiN film in the subsequent process.
 ついで、耐エッチング膜131上のテクスチャ構造形成領域140aに、微細孔である開口141を形成する(図7-4、図8-4)。これによって、開口141部分では、下地のシリコン基板101(高濃度N型拡散層102H)の表面が露出する。テクスチャ構造を形成せず、光起電力装置100の光入射側電極(表面電極)を形成しようとする電極形成領域140bには、開口141は形成しない。開口141の形成は、レーザ照射による方法や半導体プロセスで用いられるフォトリソグラフィによる方法などを用いることができる。 Next, an opening 141 that is a fine hole is formed in the texture structure forming region 140a on the etching resistant film 131 (FIGS. 7-4 and 8-4). As a result, the surface of the underlying silicon substrate 101 (high-concentration N-type diffusion layer 102H) is exposed at the opening 141 portion. The opening 141 is not formed in the electrode forming region 140b where the light incident side electrode (surface electrode) of the photovoltaic device 100 is to be formed without forming the texture structure. The opening 141 can be formed by a laser irradiation method, a photolithography method used in a semiconductor process, or the like.
 ついで、耐エッチング膜131に開けた開口141を通して、高濃度N型拡散層102Hを含むシリコン基板101の表面付近をエッチングして、凹部142を形成する(図7-5、図8-5)。このエッチングは、微細な開口141を通してシリコン基板101をエッチングするため、シリコン基板101の表面には微細な開口141を中心として、その同心位置に凹部142が形成される。混酸系のエッチング液によってエッチングを行うと、シリコン基板101表面の結晶面方位に影響されずに均一なテクスチャが形成され、表面反射損失の少ない光起電力装置100を製造できる。ここでは、エッチング液としてフッ酸と硝酸の混合液を用いる。混合比はフッ酸1:硝酸20:水10である。なお、エッチング液の混合比は所望のエッチング速度、エッチング形状により適切な混合比に変更可能である。また、このエッチングによる凹部142の形成に伴って、その部分の高濃度N型拡散層102Hは同時に除去される。つまり、このエッチングによって形成される凹部142の表面のうち、基板表面側では、高濃度N型拡散層102Hが形成されているが、それよりも深い領域では、不純物が導入されていない。一方、表面電極111を形成しようとする電極形成領域140bは高濃度N型拡散層102Hが残った状態となる。さらに、図7-5、図8-5に示されるように、隣り合う凹部142間の部分も、高濃度N型拡散層102Hを残すことができる。これによって、発生した電流を低抵抗な電流パスを通して表面電極111(グリッド電極112)に導くようにしている。 Next, the vicinity of the surface of the silicon substrate 101 including the high-concentration N-type diffusion layer 102H is etched through the opening 141 opened in the etching resistant film 131 to form the recess 142 (FIGS. 7-5 and 8-5). In this etching, since the silicon substrate 101 is etched through the fine opening 141, a concave portion 142 is formed on the surface of the silicon substrate 101 at the concentric position with the fine opening 141 as the center. When etching is performed with a mixed acid etching solution, a uniform texture is formed without being affected by the crystal plane orientation of the surface of the silicon substrate 101, and the photovoltaic device 100 with less surface reflection loss can be manufactured. Here, a mixed solution of hydrofluoric acid and nitric acid is used as an etching solution. The mixing ratio is hydrofluoric acid 1: nitric acid 20: water 10. The mixing ratio of the etching liquid can be changed to an appropriate mixing ratio depending on the desired etching rate and etching shape. Further, along with the formation of the recess 142 by this etching, the high concentration N-type diffusion layer 102H in that portion is simultaneously removed. That is, of the surface of the recess 142 formed by this etching, the high concentration N-type diffusion layer 102H is formed on the substrate surface side, but no impurity is introduced in a deeper region. On the other hand, the electrode formation region 140b where the surface electrode 111 is to be formed is in a state where the high-concentration N-type diffusion layer 102H remains. Further, as shown in FIGS. 7-5 and 8-5, the high-concentration N-type diffusion layer 102H can be left also in the portion between the adjacent recesses 142. Thus, the generated current is guided to the surface electrode 111 (grid electrode 112) through a low-resistance current path.
 ついで、フッ酸などを用いて耐エッチング膜131を除去した後(図7-6、図8-6)、シリコン基板101を熱酸化炉へ再度投入し、オキシ塩化リン蒸気の存在下で加熱して、凹部142の表面にリンを低濃度に拡散させた低濃度N型拡散層102Lを形成する(図7-7、図8-7)。このときの拡散温度は800~850℃とする。ここで、電極形成領域140bには前記エッチング時に高濃度N型拡散層102Hが残っているため、その上から再度低濃度な拡散を行っても高濃度N型拡散層102Hがほぼそのまま残ることになる。一方、テクスチャ構造形成領域140aの凹部142の底部付近では、エッチング時に高濃度N型拡散層102Hが除去されており、凹部142の表面には低濃度N型拡散層102Lが形成される。なお、この拡散処理では、低濃度N型拡散層102Lの表面シート抵抗が60~150Ω/□となるように制御する。 Next, after removing the etching resistant film 131 using hydrofluoric acid or the like (FIGS. 7-6 and 8-6), the silicon substrate 101 is again put into a thermal oxidation furnace and heated in the presence of phosphorus oxychloride vapor. Thus, a low concentration N-type diffusion layer 102L in which phosphorus is diffused at a low concentration is formed on the surface of the recess 142 (FIGS. 7-7 and 8-7). The diffusion temperature at this time is 800 to 850 ° C. Here, since the high-concentration N-type diffusion layer 102H remains in the electrode formation region 140b at the time of the etching, the high-concentration N-type diffusion layer 102H remains almost as it is even if the low-concentration diffusion is performed again. Become. On the other hand, in the vicinity of the bottom of the concave portion 142 of the texture structure forming region 140a, the high concentration N type diffusion layer 102H is removed during etching, and the low concentration N type diffusion layer 102L is formed on the surface of the concave portion 142. In this diffusion treatment, the surface sheet resistance of the low concentration N-type diffusion layer 102L is controlled to be 60 to 150Ω / □.
 高濃度N型拡散層102Hと低濃度N型拡散層102Lを形成した後、オキシ塩化リン蒸気の存在下で加熱してできたリンガラス層を、フッ酸溶液中で除去する。その後、この状態に対して、実施の形態1と同様にオゾン酸化を行い、高濃度N型拡散層102Hと低濃度N型拡散層102Lの最表面部分を、リンを含めて酸化させる。これによって、高濃度N型拡散層102Hと低濃度N型拡散層102Lの最表面には、リンを含むシリコン酸化膜103が形成される(図7-8、図8-8)。 After forming the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L, the phosphorus glass layer formed by heating in the presence of phosphorus oxychloride vapor is removed in a hydrofluoric acid solution. Thereafter, in this state, ozone oxidation is performed in the same manner as in the first embodiment, and the uppermost surface portions of the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L are oxidized including phosphorus. As a result, a silicon oxide film 103 containing phosphorus is formed on the outermost surfaces of the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L (FIGS. 7-8 and 8-8).
 この実施の形態2の拡散層の構造は、主に電極部分が設けられる部分の下部には高濃度N型拡散層102Hを設け、それ以外の個所には低濃度N型拡散層102Lを設けるようにしているので、実施の形態1に比べれば、最表面部分の影響を抑制できる構造にしている。しかし、熱拡散の手法を取る限り、低濃度N型拡散層102Lといえども、最表面部分には固溶度限界程度までリンを含有しており、程度の差はあれ、その影響は避けられない。したがって、このようなテクスチャ構造として凹部142を形成した構造の光起電力装置100に関しても、光起電力装置100の出力特性の改善は十分に得られる。なお、この実施の形態2に関しては、最表面部分の影響を抑制できる構造にしている分、酸化する厚さは、実施の形態1の場合に比して少なくてよい。表面電極111を含めた詳細な構造や生産性にもよるが、5~15nmの範囲で制御するのが適切である。 In the structure of the diffusion layer of the second embodiment, a high concentration N-type diffusion layer 102H is mainly provided below the portion where the electrode portion is provided, and a low concentration N-type diffusion layer 102L is provided at other portions. Therefore, as compared with the first embodiment, a structure that can suppress the influence of the outermost surface portion is employed. However, as long as the thermal diffusion method is taken, even the low-concentration N-type diffusion layer 102L contains phosphorus up to the solid solubility limit at the outermost surface portion, and the effect is avoided to some extent. Absent. Therefore, the output characteristics of the photovoltaic device 100 can be sufficiently improved with respect to the photovoltaic device 100 having the structure in which the concave portion 142 is formed as the texture structure. In the second embodiment, the thickness to be oxidized may be smaller than that in the first embodiment because the structure capable of suppressing the influence of the outermost surface portion is used. Although it depends on the detailed structure including the surface electrode 111 and productivity, it is appropriate to control in the range of 5 to 15 nm.
 ついで、フッ酸を用いて、高濃度N型拡散層102Hと低濃度N型拡散層102Lの最表面部分のリンを含むシリコン酸化膜103を除去し、シリコン部分を露出させた後(図7-9、図8-9)、プラズマCVD法などの成膜法によって、拡散層の表面に反射防止膜109としてのSiN膜を形成する(図7-10、図8-10)。 Next, the silicon oxide film 103 containing phosphorus at the outermost surface portions of the high-concentration N-type diffusion layer 102H and the low-concentration N-type diffusion layer 102L is removed using hydrofluoric acid to expose the silicon portion (FIG. 7- 9, FIG. 8-9), a SiN film as an antireflection film 109 is formed on the surface of the diffusion layer by a film forming method such as a plasma CVD method (FIGS. 7-10 and 8-10).
 その後、アルミニウムの混入したペーストをシリコン基板101の裏面の裏側集電電極122形成位置以外の全面にスクリーン印刷法で形成し、銀の混入したペーストをシリコン基板101の裏面の所定の位置(裏側集電電極122形成位置)にスクリーン印刷法で形成し、また、銀を混入したペーストをシリコン基板101の表面に櫛形にスクリーン印刷法で形成する。そして、焼成処理を実施し、裏面電極120(裏側取出電極121と裏側集電電極122)と表面電極111(グリッド電極112とバス電極113)を形成する。焼成処理は、たとえば、大気雰囲気中、760℃で実施する。このとき、表面電極111は、接合部分において、反射防止膜109を突き抜け高濃度N型拡散層102Hとコンタクトする。これによって、高濃度N型拡散層102Hは表面電極111と良好な抵抗性接合を得ることができる。また、裏面に形成されたアルミニウムの混入したペーストからアルミニウムがシリコン基板101中に拡散し、シリコン基板101の裏面側にBSF機能を有するP+層110を形成するとともに、P+層110の形成に使用されなかったペースト中のアルミニウムは、裏面電極120となる(図7-11、図8-11)。以上の工程によって、光起電力装置100が作製される。 Thereafter, a paste mixed with aluminum is formed by screen printing on the entire surface of the back surface of the silicon substrate 101 other than the position where the back side collecting electrode 122 is formed, and the paste mixed with silver is formed at a predetermined position (back side collector) on the back surface of the silicon substrate 101. The paste is mixed with silver on the surface of the silicon substrate 101 by the screen printing method. Then, a baking process is performed to form the back electrode 120 (the back side extraction electrode 121 and the back side current collecting electrode 122) and the front surface electrode 111 (the grid electrode 112 and the bus electrode 113). For example, the firing process is performed at 760 ° C. in an air atmosphere. At this time, the surface electrode 111 penetrates the antireflection film 109 and contacts the high-concentration N-type diffusion layer 102H at the joint portion. As a result, the high-concentration N-type diffusion layer 102H can obtain a good resistive junction with the surface electrode 111. In addition, aluminum diffuses from the paste mixed with aluminum formed on the back surface into the silicon substrate 101 to form a P + layer 110 having a BSF function on the back surface side of the silicon substrate 101 and used for forming the P + layer 110. The aluminum in the paste that did not exist becomes the back electrode 120 (FIGS. 7-11 and 8-11). The photovoltaic device 100 is manufactured through the above steps.
 この実施の形態2によっても、実施の形態1と同様の効果を得ることができる。 This second embodiment can also obtain the same effects as those of the first embodiment.
 なお、実施の形態1,2において用いたシリコン基板はP型のシリコン基板としたが、N型のシリコン基板を用いてP型拡散層を形成する逆導電型の光起電力装置やシリコン基板以外の半導体基板を用いた光起電力装置においても同様の効果を奏する。また基板として多結晶シリコン基板を用いたが、単結晶シリコン基板を用いても同様の効果があることは言うまでもない。さらに、ここでは基板の厚さが200μmの場合を示したが、自己保持できる、たとえば50μm程度まで薄型化した基板を用いることもできる。また、基板の寸法も150mm×150mmの場合を示したが、これより大きくてもまたは小さくても同様の効果が得られるのは言うまでもない。 Although the silicon substrate used in the first and second embodiments is a P-type silicon substrate, other than a reverse-conductivity type photovoltaic device or silicon substrate that forms a P-type diffusion layer using an N-type silicon substrate. A photovoltaic device using this semiconductor substrate also has the same effect. Although a polycrystalline silicon substrate is used as the substrate, it goes without saying that the same effect can be obtained by using a single crystal silicon substrate. Furthermore, although the case where the thickness of the substrate is 200 μm is shown here, a substrate that can be self-supported, for example, thinned to about 50 μm can be used. Moreover, although the case where the dimension of the board | substrate was also 150 mm x 150 mm was shown, it cannot be overemphasized that the same effect is acquired even if it is larger or smaller than this.
 以上のように、この発明にかかる光起電力装置の製造方法は、太陽光を用いて発電を行う太陽電池に有用である。 As described above, the method for manufacturing a photovoltaic device according to the present invention is useful for a solar cell that generates power using sunlight.

Claims (9)

  1.  第1の導電型の半導体基板の光の入射面側に第2の導電型の不純物を拡散して、第1の濃度の第1の拡散層を形成する第1の拡散層形成工程と、
     前記第2の導電型の不純物が拡散しない温度で、前記第1の拡散層の最表面部分に拡散した前記第2の導電型の不純物を含みながら酸化し、酸化膜を形成する酸化膜形成工程と、
     前記酸化膜を除去する酸化膜除去工程と、
     を含むことを特徴とする光起電力装置の製造方法。
    A first diffusion layer forming step of diffusing impurities of a second conductivity type on the light incident surface side of the first conductivity type semiconductor substrate to form a first diffusion layer having a first concentration;
    An oxide film forming step of forming an oxide film by oxidizing the second conductive type impurity while containing the second conductive type impurity diffused in the outermost surface portion of the first diffusion layer at a temperature at which the second conductive type impurity does not diffuse. When,
    An oxide film removing step for removing the oxide film;
    A method for manufacturing a photovoltaic device, comprising:
  2.  前記第1の拡散層形成工程の後で前記酸化膜形成工程の前に、
     前記第1の拡散層上に前記半導体基板に比して耐エッチング性を有する耐エッチング膜を形成する耐エッチング膜形成工程と、
     前記耐エッチング膜上の所定の位置に微細孔を形成し、前記第1の拡散層を露出させる微細孔形成工程と、
     前記第1の拡散層の露出位置を中心に、前記第1の拡散層と前記半導体基板とをエッチングして凹部を形成する凹部形成工程と、
     前記耐エッチング膜を除去する耐エッチング膜除去工程と、
     前記凹部を形成する面に、前記第1の濃度よりも低い第2の濃度の第2の導電型の不純物を拡散して、第2の拡散層を形成する第2の拡散層形成工程と、
     をさらに含み、
     前記酸化膜形成工程では、前記第1および第2の拡散層の最表面部分に拡散した前記第2の導電型の不純物を含む酸化膜を形成することを特徴とする請求項1に記載の光起電力装置の製造方法。
    After the first diffusion layer forming step and before the oxide film forming step,
    An etching resistant film forming step of forming an etching resistant film having etching resistance compared to the semiconductor substrate on the first diffusion layer;
    Forming a microhole at a predetermined position on the etching-resistant film and exposing the first diffusion layer;
    A recess forming step for forming a recess by etching the first diffusion layer and the semiconductor substrate around the exposed position of the first diffusion layer;
    An etching resistant film removing step of removing the etching resistant film;
    A second diffusion layer forming step of diffusing a second conductivity type impurity having a second concentration lower than the first concentration to form a second diffusion layer on the surface on which the recess is formed;
    Further including
    2. The light according to claim 1, wherein, in the oxide film forming step, an oxide film containing impurities of the second conductivity type diffused in the outermost surface portions of the first and second diffusion layers is formed. A method for manufacturing an electromotive force device.
  3.  前記酸化膜形成工程では、400℃以上600℃以下の温度で、前記第1の拡散層の最表面部分の酸化を行うことを特徴とする請求項1に記載の光起電力装置の製造方法。 The method for manufacturing a photovoltaic device according to claim 1, wherein in the oxide film forming step, the outermost surface portion of the first diffusion layer is oxidized at a temperature of 400 ° C or higher and 600 ° C or lower.
  4.  前記酸化膜形成工程では、400℃以上600℃以下の温度で、前記第1および第2の拡散層の最表面部分の酸化を行うことを特徴とする請求項2に記載の光起電力装置の製造方法。 3. The photovoltaic device according to claim 2, wherein in the oxide film forming step, the outermost surface portions of the first and second diffusion layers are oxidized at a temperature of 400 ° C. or more and 600 ° C. or less. Production method.
  5.  前記酸化膜形成工程では、前記第1の拡散層の最表面部分の酸化を、オゾンを含む雰囲気で行うことを特徴とする請求項1に記載の光起電力装置の製造方法。 The method for manufacturing a photovoltaic device according to claim 1, wherein in the oxide film forming step, the outermost surface portion of the first diffusion layer is oxidized in an atmosphere containing ozone.
  6.  前記酸化膜形成工程では、前記第1の拡散層の表面から5~20nmの厚さの最表面部分を酸化することを特徴とする請求項1に記載の光起電力装置の製造方法。 2. The method of manufacturing a photovoltaic device according to claim 1, wherein, in the oxide film forming step, an outermost surface portion having a thickness of 5 to 20 nm is oxidized from the surface of the first diffusion layer.
  7.  前記酸化膜形成工程では、前記第1および第2の拡散層の表面から5~15nmの厚さの最表面部分を酸化することを特徴とする請求項2に記載の光起電力装置の製造方法。 3. The method of manufacturing a photovoltaic device according to claim 2, wherein in the oxide film forming step, an outermost surface portion having a thickness of 5 to 15 nm is oxidized from the surfaces of the first and second diffusion layers. .
  8.  前記第1の拡散層形成工程で、シート抵抗が30Ω/□以上80Ω/□以下となるように前記第1の拡散層を形成することを特徴とする請求項1に記載の光起電力装置の製造方法。 2. The photovoltaic device according to claim 1, wherein in the first diffusion layer forming step, the first diffusion layer is formed so that a sheet resistance is 30Ω / □ or more and 80Ω / □ or less. Production method.
  9.  前記第1の拡散層形成工程で、シート抵抗が30Ω/□以上60Ω/□以下となるように前記第1の拡散層を形成し、
     前記第2の拡散層形成工程で、シート抵抗が60Ω/□以上150Ω/□以下となるように前記第2の拡散層を形成することを特徴とする請求項2に記載の光起電力装置の製造方法。
    In the first diffusion layer forming step, the first diffusion layer is formed so that the sheet resistance is 30Ω / □ or more and 60Ω / □ or less,
    3. The photovoltaic device according to claim 2, wherein in the second diffusion layer forming step, the second diffusion layer is formed so that a sheet resistance is 60 Ω / □ or more and 150 Ω / □ or less. Production method.
PCT/JP2008/061410 2008-06-23 2008-06-23 Method for manufacturing photovoltaic system WO2009157052A1 (en)

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