KR20130071801A - Solar cell and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A solar cell and a manufacturing method thereof are provided to improve the position matching of a second part and a front electrode by diffusing a second impurity in the front electrode to form the second part with relative high doping concentration. CONSTITUTION: A semiconductor substrate (10) with a first conductive type impurity is prepared. A first part (20a) of an emitter layer (20) is formed on a front side (12) of the semiconductor substrate by doping a second conductive type first impurity. An electrode groove (24a) is formed on the front side of the semiconductor substrate. A front electrode (24) including a second conductive type second impurity is formed in the electrode groove. A second part (20b) of the emitter layer by diffusing the second impurity.

Description

SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME

The present invention relates to a solar cell and a method of manufacturing the same, and more particularly to a solar cell having a emitter layer having a relatively high doping concentration of the portion in contact with the electrode and a method of manufacturing the same.

With the recent depletion of existing energy sources such as oil and coal, interest in alternative energy to replace them is increasing. Among them, solar cells are attracting attention as a next-generation battery that converts solar energy into electric energy.

In such a solar cell, a variety of layers may be laminated and fabricated by etching and patterning them according to a design. In this case, productivity and characteristics of the solar cell may vary greatly according to a process method, a process sequence, and the like. For example, when a laser is used for patterning, a chemical process for reducing damage caused by the laser is added, thereby making the process complicated and damaging the solar cell. As another example, when at least two high temperature diffusion processes or the like are performed to form an emitter layer having a relatively high doping concentration in contact with an electrode, the process becomes complicated and the performance of the semiconductor substrate constituting the solar cell may be degraded. have.

Embodiment of the present invention is to provide a solar cell and a method for manufacturing the same that can improve the productivity and characteristics of the solar cell.

A solar cell manufacturing method according to an embodiment of the present invention comprises the steps of preparing a semiconductor substrate having a first conductivity type impurities; Doping a first impurity of a second conductivity type on a front surface of the semiconductor substrate to form a first portion of the emitter layer; Forming electrode grooves on the front surface of the semiconductor substrate; And diffusing the front electrode including the second impurity of the second conductivity type in the electrode groove and the second impurity to form a second portion of the emitter layer.

A solar cell according to an embodiment of the present invention includes a semiconductor substrate having impurities of a first conductivity type and having electrode grooves on a front surface thereof; An emitter layer formed on the front surface of the semiconductor substrate; A front electrode positioned in the electrode groove and electrically connected to the emitter layer; And a rear electrode formed on the rear surface of the semiconductor substrate. The emitter layer includes a first portion positioned between the front electrodes and a second portion in contact with the front electrodes. The first portion is doped with a first impurity of a second conductivity type, the second portion is doped with a second impurity of the second conductivity type, and the front electrode includes the second impurity.

In the present embodiment, in the process of forming the front electrode, since the second impurity in the front electrode is diffused to form a second part having a relatively high doping concentration, the second part is formed at the periphery of the front electrode. Accordingly, the positional matching between the second portion and the front electrode can be improved to improve the efficiency of the solar cell. It is also possible to simplify the manufacturing process of the emitter layer of the optional emitter structure.

As described above, according to the present exemplary embodiment, productivity may be improved by simplifying the process while improving characteristics such as efficiency of the solar cell.

1 is a cross-sectional view showing a solar cell according to an embodiment of the present invention.
2 is a flowchart illustrating a method of manufacturing a solar cell according to an embodiment of the present invention.
3A to 3J are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention; However, it is needless to say that the present invention is not limited to these embodiments and can be modified into various forms.

In the drawings, the same reference numerals are used for the same or similar parts throughout the specification. In the drawings, the thickness, the width, and the like are enlarged or reduced in order to clarify the description. The thickness, the width, and the like of the present invention are not limited to those shown in the drawings.

Wherever certain parts of the specification are referred to as "comprising ", the description does not exclude other parts and may include other parts, unless specifically stated otherwise. Also, when a portion of a layer, film, region, plate, or the like is referred to as being "on" another portion, it also includes the case where another portion is located in the middle as well as the other portion. When a portion of a layer, film, region, plate, or the like is referred to as being "directly on" another portion, it means that no other portion is located in the middle.

Hereinafter, a solar cell according to an embodiment of the present invention will be described, and then a manufacturing method thereof will be described in detail.

1 is a cross-sectional view showing a solar cell according to an embodiment of the present invention.

Referring to FIG. 1, the solar cell 100 according to the present exemplary embodiment includes a semiconductor substrate 10, an emitter layer 20 positioned on the front surface 12 side of the semiconductor substrate 10, and a rear surface of the semiconductor substrate 10. Located at the rear electric field layer 30 positioned on the side of 14, the antireflection film 22 formed on the front surface 12 of the semiconductor substrate 10, the front electrode 24, and the rear surface 14 of the semiconductor substrate 10. It includes a rear electrode 34. This will be described in more detail as follows.

The semiconductor substrate 10 may include various semiconductor materials. For example, the semiconductor substrate 10 may include silicon doped with a first conductivity type impurity. As silicon, single crystal silicon or polycrystalline silicon may be used, and the first conductivity type impurity may be, for example, n-type. That is, the semiconductor substrate 10 may be formed of single crystal or polycrystalline silicon doped with a Group 5 element such as phosphorus (P), arsenic (As), bismuth (Bi), and antimony (Sb)

When the semiconductor substrate 10 having the n-type impurity is used, the emitter layer 20 having the p-type impurity is formed on the entire surface of the semiconductor substrate 10 to form a pn junction. When light is irradiated to the pn junction, electrons generated by the photoelectric effect move toward the rear surface 14 of the semiconductor substrate 10 and are collected by the rear electrode 34, and holes are formed on the front surface 12 of the semiconductor substrate 10. And collected by the front electrode 24. Thereby, electric energy is generated.

In this case, holes having a slower moving speed than electrons may move to the front surface 12 instead of the rear surface 14 of the semiconductor substrate 10, thereby improving conversion efficiency.

The front surface 12 and the rear surface 14 of the semiconductor substrate 10 may be textured to have irregularities in the form of a pyramid or the like. If unevenness is formed on the front surface 12 of the semiconductor substrate 10 by such texturing and the surface roughness is increased, the reflectance of light incident through the front surface 12 or the like of the semiconductor substrate 10 may be lowered. Therefore, the amount of light reaching the pn junction formed at the interface between the semiconductor substrate 10 and the emitter layer 20 can be increased, thereby minimizing the optical loss.

An emitter layer 20 having a second conductivity type impurity may be formed on the front surface 12 of the semiconductor substrate 10. As described above, when dopants of the conductive type opposite to each other are doped to the substrate 10 and the emitter layer 20, a pn junction is formed at the interface between the substrate 110 and the emitter layer 120.

For example, the emitter layer 20 may be doped with boron (B), aluminum (Al), gallium (Ga), and indium (In), which are Group 3 elements, as p-type impurities. The detailed structure of the emitter layer 20 will be described in detail after the antireflection film 22 and the front electrode 24 are described.

The anti-reflection film 22 and the front electrode 24 are formed on the emitter layer 20 on the front surface 12 of the semiconductor substrate 10. The anti-reflection film 22 reduces the reflectance of light incident on the front surface 12 of the semiconductor substrate 10 and immobilizes defects existing in the surface or bulk of the emitter layer 20.

As such, by decreasing the reflectance of light incident through the front surface 12 of the semiconductor substrate 10, the amount of light reaching the pn junction formed at the interface between the semiconductor substrate 10 and the emitter layer 20 may be increased. Accordingly, the short circuit current Isc of the solar cell 100 can be increased. In addition, the defects in the emitter layer 20 may be immobilized to remove recombination sites of the minority carriers, thereby increasing the open voltage Voc of the solar cell 100. As described above, the conversion voltage of the solar cell 100 may be improved by increasing the open voltage and the short circuit current of the solar cell 100 by the anti-reflection film 22.

The anti-reflection film 22 may be formed of various materials. For example, the antireflection film 22 may be formed of any one single film selected from the group consisting of a silicon nitride film, a silicon nitride film including hydrogen, a silicon oxide film, a silicon oxynitride film, MgF ₂ , ZnS, TiO ₂ and CeO ₂ , And may have a combined multilayer structure.

Electrode grooves (grooves) 24a are formed in the semiconductor substrate 10 and the antireflection film 22, and front electrodes 24 are formed in the electrode grooves 24a. When the front electrode 24 is formed in the groove 24a as described above, when the groove 24a is made fine, the front electrode 24 formed in the groove 24a may also be finely formed. That is, in the present embodiment, the electrode may be formed in a recessed shape to reduce the line width of the front electrode 24, thereby reducing the shading loss and thus improving the photoelectric conversion efficiency.

For example, the front electrode 24 may have finger electrodes that are densely arranged to have a stripe shape in plan view, and a bus bar that connects the finger electrodes in a cross direction. However, the present invention is not limited thereto, and the front electrode 24 may have various planar shapes.

In the present exemplary embodiment, the front electrode 24 may include impurities of the second conductivity type included in the emitter layer 20. More precisely, in the step of firing the front electrode layer (reference numeral 240 of FIG. 3G, hereinafter identical) to form the front electrode 24, the impurity of the second conductivity type included in the front electrode 24 is emitter layer 20. ) Is spread to the formed part. As a result, the peripheral portion of the front electrode 24 may have a higher doping concentration than the other portions.

That is, in this embodiment, the emitter layer 20 is formed adjacent to the anti-reflection film 22 between the front electrodes 24 and doped to the first concentration 20a and the front electrode 24. And a second portion 20b formed in contact with and doped at a second concentration higher than the first concentration.

In this case, the first portion 20a may have a first concentration due to the first impurities diffused by a diffusion process or the like performed before forming the front electrode 24. In addition, the second portion 20b is included in the front electrode 24 to have a second concentration higher than the first concentration by the second impurities diffused when the front electrode 24 is formed. This will be described in more detail later in the manufacturing method of the solar cell 100.

A material suitable for thermal diffusion may be used as the first impurity, and a material suitable for forming the front electrode 24 may be used as the second impurity. Therefore, the first impurity and the second impurity may include materials different from each other. For example, the first impurity includes boron that is frequently used in thermal diffusion, and the second impurity includes aluminum mainly included in the electrode paste. can do. However, the present invention is not limited thereto, and various modifications may be made, including the first impurity and the second impurity.

 As described above, in the present embodiment, the first portion 20a corresponding to the front electrode 24 to which light is incident may reduce the doping concentration to implement a shallow emitter, thereby improving efficiency of the solar cell. . In addition, in the second portion 20b in contact with the front electrode 24, the doping concentration may be increased to reduce the contact resistance with the front electrode 24. That is, the emitter layer 20 of the present embodiment may have a selective emitter structure to maximize the efficiency of the solar cell.

In addition, a back surface field layer 30 including a first conductivity type impurity is formed on the back surface 14 of the semiconductor substrate 10 at a higher doping concentration than the semiconductor substrate 10. The rear electric field layer 30 may contribute to improving efficiency of the solar cell by minimizing rear recombination of electrons and holes. The back surface layer 30 may include phosphorus (P), arsenic (As), bismuth (Bi), antimony (Sb), and the like, and may include, for example, phosphorus (P) which is commonly used as a dopant. .

In addition, a rear electrode 34 is formed on the rear surface 14 of the semiconductor substrate 10. The back electrode 34 is formed on a surface other than the light incident surface, and may have a larger width than the front electrode 24. The back electrode 34 may have various planar shapes.

The back electrode 34 may include various metals having excellent electrical conductivity. For example, the back electrode 34 may include silver (Ag) having excellent electrical conductivity and high reflectance. When silver having high reflectance is used as the back electrode 34, light exiting to the back surface 14 of the semiconductor substrate 10 may be reflected and directed back into the semiconductor substrate 10. Accordingly, the amount of light used can be increased.

A method of manufacturing the solar cell 10 having such a structure will be described in more detail with reference to FIGS. 2 and 3A to 3J. In the following description, detailed descriptions of the parts which have already been described will be omitted and only the parts not described will be described in detail.

2 is a flowchart illustrating a method of manufacturing a solar cell according to an embodiment of the present invention, and FIGS. 3A to 3J are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment of the present invention.

2, in the method of manufacturing a solar cell according to the present embodiment, preparing a semiconductor substrate (ST10), forming a rear electric field layer (ST12), and forming a first portion ( ST14), forming an antireflection film (ST16), forming an electrode groove (ST18), forming a front electrode layer (ST20), forming a rear electrode layer (ST22), firing (ST24), and Isolating (ST26). Each step will be described with reference to Figs. 3A to 3J.

First, as shown in FIG. 3A, in the preparing of the semiconductor substrate (ST10), the semiconductor substrate 10 having the first conductivity type impurities is prepared. The front surface 12 and the rear surface 14 of the semiconductor substrate 10 may have irregularities by texturing. As texturing, wet or dry texturing can be used. The wet texturing can be performed by immersing the semiconductor substrate 10 in the texturing solution, and has a short process time. In dry texturing, the surface of the semiconductor substrate 10 is cut by using a diamond grill or a laser, so that irregularities can be formed uniformly, but the processing time is long and damage to the semiconductor substrate 10 may occur. As described above, the semiconductor substrate 10 can be textured in various ways in the present invention.

Subsequently, as shown in FIG. 3B, in the step ST12 of forming the backside electric field layer, a backside having a higher doping concentration than the semiconductor substrate 10 is doped by doping impurities of the first conductivity type on the backside of the semiconductor substrate 10. The electric field layer 30 is formed.

The back surface layer 30 may be formed by various methods. For example, the back surface field layer 30 may be formed by thermally diffusing a material including impurities of a first conductivity type in a diffusion furnace. For example, a material such as POCl ₃ containing phosphorus may be diffused toward the rear surface 14 of the semiconductor substrate 10 to form the rear surface electric layer 30.

After forming the rear field layer 30, an unnecessary byproduct layer (eg, phosphorous silicate glass (PSG)) may be removed. When removing the byproduct layer, a wetted solution using a hydrofluoric acid (HF) solution may be used. An etching method may be used, but the present invention is not limited thereto.

Subsequently, as shown in FIG. 3C, in the step ST14 of forming the first portion, the first impurity of the second conductivity type is doped into the semiconductor substrate 10 at a first concentration to refer to the emitter layer (see FIG. 1). A first portion 20a of reference numeral 20 (hereinafter equal to) is formed.

The first portion 20a may be formed in various ways. For example, the first portion 20a may be formed by thermally diffusing a material including the first impurity of the second conductivity type in the diffusion furnace. For example, a material such as BBr ₃ including boron may be diffused to form the first portion 20a of the emitter layer 20. The first portion 20a may be doped to a relatively low first concentration to form a shallow emitter. Thus, as an example, the first portion 20a may have a sheet resistance of 70 to 150 Ω / □ (more precisely 90 to 120 Ω / □).

After the first portion 20a is formed, an unnecessary byproduct layer (eg, borosilicate glass (BSG)) may be removed. A wet etching method using a hydrofluoric acid (HF) solution may be used to remove the byproduct layer. May be used, but the present invention is not limited thereto.

Subsequently, as shown in FIG. 3D, in the step ST16 of forming the antireflection film, the antireflection film 22 is formed on the first portion 20a of the emitter layer 20. The anti-reflection film 22 includes, for example, a silicon nitride film, a silicon nitride film including hydrogen, a silicon oxide film, a silicon oxide nitride film, a single film selected from the group consisting of MgF ₂ , ZnS, TiO _2, and CeO ₂ , or two or more films. It can have a combined multilayer structure. The antireflection film 22 may be formed by various methods such as vacuum deposition, chemical vapor deposition, spin coating, screen printing or spray coating.

Subsequently, as shown in FIGS. 3E and 3F, in the step of forming the electrode groove (ST18), the etching is performed on the antireflection film 22 to have the same planar shape as the front electrode (reference numeral 24 of FIG. 3I, hereinafter same). The paste 24b is applied to form the electrode grooves 24a, and then the etching paste 24b is removed.

The etching paste 24b may include various materials capable of etching the anti-reflection film 22 and the semiconductor substrate 10. For example, the etching paste 24b may be a fluorine-based paste. The etching paste 24b may be applied onto the antireflection film 22 by printing or the like, but the present invention is not limited thereto.

By the etching paste 24b, the electrode groove 24a may have a depth of 30 to 50 μm and a width of 20 to 40 μm. However, the present invention is not limited thereto and may be variously modified by the specific structure, material, and the like of the solar cell 10.

After forming the electrode grooves 24a, the etching paste 24b can be easily removed by a water (for example, deionized water, DI water) cleaning process.

Conventionally, a laser or the like has been used to form the electrode grooves 24a, but a separate chemical process has to be performed after the electrode grooves 24a are formed by thermal damage by the laser. That is, a solution such as nitric acid (HNO ₃ ) was used to remove the thermal damage caused by the laser and then perform a cleaning process using water again. On the other hand, since the thermal damage by the laser does not occur in this embodiment, the etching paste 24b may be removed by only the water cleaning process without a separate chemical process, thereby improving productivity.

Subsequently, as shown in FIG. 3G, in forming the front electrode layer (ST20), the front electrode layer 240 including the second impurity of the second conductivity type is formed in the electrode groove 24a. The front electrode layer 240 includes a second conductive type (eg, p-type) second impurity and a metal (eg, aluminum) having excellent electrical properties, and includes a glass frit, a binder, a solvent, and the like. It can be formed by applying. The front electrode layer 240 may be formed in the electrode groove 24a by a printing method or the like.

Subsequently, as shown in FIG. 3H, in the step ST22 of forming the rear electrode layer, the rear electrode layer 340 is formed on the rear surface 14 of the semiconductor substrate 10. The back electrode layer 340 may be formed by applying a paste including a glass frit, a binder, a solvent, and the like together with a metal (eg, silver) having reflective properties and excellent electrical properties. The rear electrode layer 340 may be formed on the rear surface 14 of the semiconductor substrate 10 by a printing method or the like.

Subsequently, as shown in FIG. 3I, in the firing step (ST22), the front electrode 24 and the back electrode (by firing the front electrode layer (reference number 240 of FIG. 3H) and the rear electrode layer (reference numeral 340 of FIG. 3H) 34). At this time, the second impurity of the second conductivity type, which is a material included in the front electrode 24, is diffused into the semiconductor substrate 10. As a result, a second impurity is doped in the peripheral portion contacting the front electrode 24, thereby causing the second concentration of the doped second portion 20b to be higher than the first concentration of the first portion 20a. That is, in the present embodiment, the second impurity is diffused while the front electrode 24 is formed to form the second part 20b together.

As a result, the second portion 20b of the emitter layer 20 may have a sheet resistance of 30 to 70 Ω / □ (more specifically, 40 to 60 Ω / □).

At this time, when the second impurity contained in the front electrode 24 is made of a different material from the first impurity used in the step ST14 of forming the first part, the first part 20a and the second part 20b are used. May contain different impurities. For example, in the present exemplary embodiment, in the forming of the first part (ST14), boron is used to facilitate heat diffusion, and the front electrode 24 considers both electrical conductivity and ease of manufacture of the electrode. Aluminum can be used. Then, the first portion 20a may include boron, and the second portion 20b may include the same aluminum as the front electrode 24.

Subsequently, as shown in FIG. 3J, in the step ST26, the front surface 12 and the rear surface 14 of the semiconductor substrate 10 are isolated. In the drawing, for convenience, the first portion 20a of the emitter layer 20 formed on the side surface of the semiconductor substrate 10 is removed. However, the present invention is not limited thereto. Accordingly, an isolation groove (not shown) is formed in the front surface 12 or the rear surface 14 at the outer portion of the semiconductor substrate 10 to isolate the front surface 12 and the rear surface 14 of the semiconductor substrate 10, or the like. Various variations are possible.

Conventionally, since the front electrode 24 is formed after the emitter layer 20 having the selective emitter structure is formed, the second portion 20b of the emitter layer 20 and the front electrode 24 are precisely aligned. If not, the second part 20b and the front electrode 24 do not come into contact with each other, thereby reducing efficiency. On the other hand, in the present embodiment, since the second part 20b is formed in the process of forming the front electrode 24, that is, in the step of firing to form the front electrode 24, the peripheral part of the front electrode 24 is naturally formed. A second portion 20b having a relatively high second concentration is formed. Therefore, the positional compatibility with the front electrode 24 may be improved, thereby improving efficiency of the solar cell 100.

In addition, since the second part 20b is formed without a separate process in the process of forming the front electrode 24 by the step ST24 of firing, to form the emitter layer 20 of the selective emitter structure 2. The process can be simplified compared to the conventional one which has to perform the doping process.

As described above, according to the present exemplary embodiment, productivity may be improved by simplifying the process while improving characteristics such as efficiency of the solar cell 100.

In the above description, each step may be modified according to necessity, etc., which is also within the scope of the present invention.

That is, the features, structures, effects, and the like described above are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Further, the features, structures, effects, and the like illustrated in the embodiments may be combined or modified in other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

100: Solar cell
10: semiconductor substrate
20: emitter layer
22: Antireflection film
24: front electrode
30: rear electric layer
34: rear electrode

Claims (20)

Preparing a semiconductor substrate having impurities of a first conductivity type;
Doping a first impurity of a second conductivity type on a front surface of the semiconductor substrate to form a first portion of the emitter layer;
Forming electrode grooves on the front surface of the semiconductor substrate; And
Diffusing a front electrode including the second impurity of the second conductivity type and the second impurity in the electrode groove to form a second portion of the emitter layer
Wherein the method comprises the steps of: The method of claim 1,
The method of manufacturing a solar cell, wherein the first impurity and the second impurity include materials different from each other. The method of claim 2,
The first impurity comprises boron (B), the second impurity comprises a aluminum (Al). The method of claim 1,
The semiconductor substrate includes an n-type impurity and the emitter layer comprises a p-type impurity. The method of claim 1,
In the forming of the first portion, the first impurity is diffused by thermal diffusion,
In the step of forming the second portion, a method of manufacturing a solar cell in which the second impurity in the paste is diffused while screen printing a paste containing the second impurity and baking the paste to form the front electrode. The method of claim 1,
Forming an anti-reflection film on the entire surface of the semiconductor substrate between the forming of the first portion and the forming of the second portion. The method of claim 1,
In the step of forming the electrode groove, a method of manufacturing a solar cell by applying an etching paste to the entire surface of the semiconductor substrate to form the electrode groove. The method of claim 7, wherein
And the etching paste is removed by water washing after forming the electrode grooves. The method of claim 1,
And forming a backside electric field layer on the backside of the semiconductor substrate, the backside electric field layer comprising a higher concentration of impurities of the first conductivity type than the semiconductor substrate. 10. The method of claim 9,
In the step of forming the back surface layer is a method of manufacturing a solar cell to diffuse the impurities of the first conductivity type by thermal diffusion method. The method of claim 5,
Forming a rear electrode layer on a rear surface of the semiconductor substrate;
A method of manufacturing a solar cell, wherein the back electrode layer is fired together when the front electrode layer is fired. The method of claim 11,
The front electrode includes aluminum (Al),
The back electrode includes a silver (Ag) manufacturing method of a solar cell. A semiconductor substrate having impurities of a first conductivity type and having electrode grooves on the front surface thereof;
An emitter layer formed on the front surface of the semiconductor substrate;
A front electrode positioned in the electrode groove and electrically connected to the emitter layer; And
A rear electrode formed on a rear surface of the semiconductor substrate
/ RTI >
The emitter layer includes a first portion positioned between the front electrodes and a second portion in contact with the front electrodes,
The first portion is doped with a first impurity of a second conductivity type, the second portion is doped with a second impurity of the second conductivity type,
The front electrode includes the second impurity. The method of claim 13,
And said front electrode comprises aluminum and said second impurity is aluminum. The method of claim 13,
The solar cell comprising a material different from the first impurity and the second impurity. 16. The method of claim 15,
The first impurity comprises boron and the second impurity comprises aluminum. The method of claim 13,
The semiconductor substrate includes an n-type impurity and the emitter layer comprises a p-type impurity. The method of claim 13,
The solar cell further comprises an anti-reflection film formed on the emitter layer. The method of claim 13,
The front electrode comprises aluminum,
The back electrode comprises silver. The method of claim 13,
The solar cell of claim 1, further comprising a rear electric field layer on the rear side of the semiconductor substrate, wherein the first conductivity type impurity is contained at a higher concentration than the semiconductor substrate.

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