WO2011114704A1 - Circuit board - Google Patents

Circuit board Download PDF

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Publication number
WO2011114704A1
WO2011114704A1 PCT/JP2011/001494 JP2011001494W WO2011114704A1 WO 2011114704 A1 WO2011114704 A1 WO 2011114704A1 JP 2011001494 W JP2011001494 W JP 2011001494W WO 2011114704 A1 WO2011114704 A1 WO 2011114704A1
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WO
WIPO (PCT)
Prior art keywords
substrate
circuit board
wiring
conductive member
wiring unit
Prior art date
Application number
PCT/JP2011/001494
Other languages
French (fr)
Japanese (ja)
Inventor
柴田健
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Publication of WO2011114704A1 publication Critical patent/WO2011114704A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0216Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H05K1/0219Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/025Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/142Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0245Lay-out of balanced signal pairs, e.g. differential lines or twisted lines
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09218Conductive traces
    • H05K2201/09236Parallel layout
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/1028Thin metal strips as connectors or conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10371Shields or metal cases
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10409Screws
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10689Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]

Definitions

  • the present invention relates to a circuit board, and more particularly to a circuit board on which a high-speed transmission path is formed.
  • FIG. 1A shows a circuit board (cross section) 100 having a two-layer structure, which is a basic structure of a microstrip line.
  • a ground plane 130 which is a conductive layer is formed on the lower side of the insulating substrate 120, and a signal layer 110 is formed on the upper side.
  • FIG. 1B shows a circuit board (cross section) 200 of a microstrip line having a four-layer structure used for realizing good characteristics.
  • the circuit board 200 has first to third insulating layers 220a to 220c.
  • a ground plane 231 that is a conductive layer is formed below the third insulating layer 220c, and a signal layer 210 is formed above the first insulating layer 220a.
  • Conductive layers 232 and 233 are formed between the first and second insulating layers 220a and 220b and between the second and third insulating layers 220b and 220c, respectively.
  • the circuit board includes a first insulating layer disposed on a conductive layer having a ground potential or the like, a first wiring and a second wiring disposed on the first insulating layer, a first wiring, and the first wiring.
  • a second insulating layer covering the second wiring, an electrode terminal provided on the second insulating layer and electrically connected to the first wiring or the second wiring, the second insulating layer and the first wiring And a conductive pattern provided above the second wiring and including the same layer structure as the electrode terminal (see, for example, Patent Document 1).
  • This circuit board suppresses low cost and crosstalk (noise) between wires.
  • a high-speed digital transmission line is configured with a two-layer substrate, and in this case, the ground plane 130 is separated from the signal layer 110 by about 1.6 mm.
  • the ground plane 130 is separated from the signal layer 110 by about 1.6 mm.
  • it is almost a parallel differential line. For this reason, it is necessary to manufacture the substrate with extremely high variations in the pattern width of the copper foil, resulting in unstable characteristics. As a result, there are cases where it cannot be used for a high-speed digital transmission line for high-resolution signals. Therefore, new technology has been demanded.
  • an object of the present invention is to provide a technique for realizing a high-speed digital transmission line capable of stable signal transmission using an inexpensive substrate.
  • the apparatus relates to a circuit board.
  • the circuit board includes a wiring unit, a conductive member having a conductive layer and grounded to ground, and a ground connection means for connecting the wiring unit and a ground region of the conductive member.
  • a circuit wiring for high-speed digital transmission patterned on one surface of a base substrate, and a dielectric layer having an insulating property formed on the circuit wiring, and the conductive member includes the wiring
  • the unit is fixed so as to face the dielectric layer so as to cover a region where the circuit wiring is formed in the unit.
  • the base substrate of the wiring unit may be a paper phenol resin or a paper polyethylene resin.
  • the conductive member may be a wiring board in which a conductive layer is formed on a base substrate made of paper phenol resin or paper polyethylene resin. Further, the conductive member may have a flexible sheet shape. The conductive member may have a metal plate. The conductive member may be a board shield case. The conductive member may have a chassis structure. The conductive member may be fixed to the wiring unit by an adhesive means. Moreover, the said wiring unit does not need to have a conductive layer in the surface opposite to the surface where the said circuit wiring of the said base base material of the said wiring unit was formed. The total of the thickness of the dielectric layer of the wiring unit and the thickness of the dielectric layer formed on the conductive member may be in the range of 50 to 300 ⁇ m.
  • the ground connection means may include a metal plate-like body that connects the ground region of the wiring unit and the conductive layer of the conductive member. Moreover, you may provide the fixing means which fixes the said wiring unit and the said electroconductive member in the outer side vicinity of the area
  • the wiring unit and the conductive member may be provided with a fixing means for fixing the wiring unit and the conductive member in the vicinity of the outside of the region where the circuit wiring is formed and in the region where the metal plate is provided.
  • a high-speed digital transmission line such as HDMI needs to have an appropriate characteristic impedance secured by a stable multilayer substrate. For this reason, it has been impossible to use a single-sided substrate made of a paper phenolic resin base substrate that has been widely used in low-priced models of liquid crystal televisions and the like.
  • an electronic device having a high-speed digital transmission line such as an HDMI, LVDS, or DDR (Double-Data-Rate) data line is assumed.
  • FIG. 2 is a perspective view of the circuit board 10 according to the present embodiment.
  • FIG. 3 shows mainly the high-speed digital line 30 for the mounting structure (side surface) of the lower substrate 20 which is a wiring unit (first substrate) and the upper substrate 40 which is a conductive member (second substrate). It is the figure which showed the area
  • the direction in which the high-speed digital line 30 extends in a straight line will be referred to as the front-rear direction, and the direction perpendicular to the straight direction of the high-speed digital line 30 will be described as the left-right direction.
  • an HDMI receiver 90 which is a kind of IC circuit is attached to the surface 20 a of the circuit board 10, and the IC pin 91 is connected to the high-speed digital line 30.
  • the circuit board 10 is composed of two substrates, a lower substrate 20 and an upper substrate 40, and the upper substrate 40 is attached so as to cover the high-speed digital line 30 of the lower substrate 20.
  • screws 80 that are fixing means for the lower substrate 20 and the upper substrate 40 are omitted.
  • a metal plate 60 is interposed in the vicinity of the left and right end portions of the upper substrate 40 during the attachment, and the ground planes of the lower substrate 20 and the upper substrate 40 are connected. Detailed structures of the lower substrate 20 and the upper substrate 40 will be described later.
  • восем ⁇ copper foil high-speed digital lines 30 are formed on the lower substrate 20 in a straight line with a predetermined length in the front-rear direction (upper left to lower right in the figure) by a patterning method or the like. Yes.
  • the two high-speed digital lines 30 on both sides are denoted by reference numerals.
  • a plurality of the same constituent elements are appropriately denoted by reference numerals and partly omitted.
  • the upper left end portion (HDMI receiver 90 side) end 31 of the high-speed digital line 30 is connected to eight IC pins 91 extending from the HDMI receiver 90, respectively.
  • the upper substrate 40 is attached to the lower substrate 20 so as to cover a linear portion between the upper left end portion 31 and the lower right end portion 32. It is fixed.
  • the metal plate 60 is interposed in a predetermined region of the upper substrate 40, and the ground connection portion 50 (see FIG. 3) is formed.
  • a rectangular copper plate as the metal plate 60 is disposed on both sides of the upper substrate 40 so as to be sandwiched between the lower substrate 20 and the upper substrate 40.
  • the ground connection unit 50 functions to connect the ground planes of the lower substrate 20 and the upper substrate 40.
  • the metal plate 60 can be replaced with any material having good conductivity other than the copper plate, and an anisotropic conductive material, a conductive adhesive, or the like can be used.
  • the lower substrate 20 and the upper substrate 40 are brought into close contact with each other by fixing screw holes 70 (71, 72, 73) penetrating the lower substrate 20 and the upper substrate 40 with screws 80.
  • the upper substrate 40 is provided with eight upper substrate screw holes 72.
  • the lower substrate 20 is also provided with eight lower substrate screw holes 71 at positions corresponding to the upper substrate screw holes 72.
  • the four lower substrate screw holes 71 and the upper substrate screw hole 72 in the center in the left-right direction are formed just outside in the vicinity where the high-speed digital line 30 is formed.
  • the four lower board screw holes 71 and the upper board screw holes 72 on both the left and right sides coincide with the screw holes 73 provided in the metal plate 60 disposed therebetween.
  • various means may be adopted as fixing means as long as an appropriate fixing state such as fixing with an adhesive can be secured.
  • the screw holes 70 (71, 72, 73) are formed and fixed with the screws 80, so that the upper substrate 40 is fixed with the screws 80 in the vicinity of the outer side of the high-speed digital line 30 as much as possible. It has become.
  • the lower substrate 20 and the upper substrate 40 are in close contact with each other, and the ground plane between the lower substrate 20 and the upper substrate 40 is maintained at a predetermined interval.
  • FIG. 4 is a cross-sectional view of the mounting structure of the lower substrate 20 and the upper substrate 40 in the area A1 in FIG. 4 shows a state before the lower substrate 20 and the upper substrate 40 are fixed, and FIG. 4B shows a state where the lower substrate 20 and the upper substrate 40 are fixed. Further, FIG. 5 shows a cross-sectional structure of a region A2 in FIG. 3, that is, a portion to which the metal plate 60 is attached.
  • the paper phenol substrate 21 and the paper phenol substrate 41 which are base materials of the lower substrate 20 and the upper substrate 40 are formed by impregnating a paper base material with a phenol resin.
  • the lower substrate 20 will be described. On the upper surface of the paper phenol substrate 21 of the lower substrate 20, a wiring structure in which the lower substrate copper foil 22 is patterned in a predetermined region, that is, a high-speed digital line 30 is formed.
  • the pattern width and pattern interval of the high-speed digital line 30 need to be managed appropriately. Specifically, appropriate pattern widths and pattern intervals are set in accordance with the thickness and dielectric constant of a lower substrate resist 23 and an upper substrate resist 43 which will be disposed on the upper side of the high-speed digital line 30. The In particular, it is preferable to consider the thickness and dielectric constant of the lower substrate resist 23 formed immediately above the high-speed digital line 30.
  • a lower substrate resist 23 is further formed with a predetermined thickness on the high-speed digital line 30.
  • the lower substrate resist 23 is an insulating material having a predetermined stable dielectric constant.
  • a material having a predetermined dielectric constant in the range of about 1 to 5 is preferable.
  • PET polyethylene terephthalate
  • dielectric constant 2.9 to 3.0 having similar characteristics (insulating properties, dielectric constant, etc.) can also be used.
  • the thickness of the lower substrate resist 23 is preferably set to 50 to 300 ⁇ m when the thickness of the upper substrate resist 43 of the upper substrate 40 described later is added up.
  • the thickness as a single unit is more preferably 25 ⁇ m or more.
  • the surface of the lower substrate resist 23 is formed to be a flat surface. However, the portion covering the region where the lower substrate copper foil 22 is removed for patterning the high-speed digital line 30 is formed with a recess.
  • the upper substrate 40 has an upper substrate copper foil 42 formed on the lower surface of the paper phenol substrate 41.
  • the upper substrate copper foil 42 functions as a conductive layer for the ground plane.
  • An upper substrate resist 43 is formed in a desired thickness on the surface layer of the upper substrate copper foil 42, that is, below the upper substrate copper foil 42 in the drawing. As described above, the thickness of the upper substrate resist 43 is managed and set together with the thickness of the lower substrate resist 23.
  • the material of the upper substrate resist 43 is an insulating material having a predetermined stable dielectric constant, like the lower substrate resist 23. Polyethylene terephthalate can also be used.
  • the upper substrate resist 43 may be the same material as the lower substrate resist 23 or may be a different material.
  • the screw holes 70 (71 to 73) are omitted.
  • the lower substrate resist 43 of the right end portion of the upper substrate 40 is partially removed, and the upper substrate copper foil 42 is exposed.
  • the lower substrate resist 23 is removed and the lower substrate copper foil 22 is exposed.
  • the exposed lower substrate copper foil 22 is a ground plane of the lower substrate 20.
  • a metal plate 60 is disposed between the exposed portion of the lower substrate copper foil 22 and the exposed portion of the upper substrate copper foil 42, and is fixed with screws 80 as shown in FIG.
  • the thickness of the metal plate 60 is set to be substantially the same as the thickness of the lower substrate resist 23 and the upper substrate resist 43. Thereby, the metal plate 60 is connected and fixed to both the lower substrate copper foil 22 and the upper substrate copper foil 42.
  • FIG. 6 shows a simulation result of whether or not the HDMI high-speed digital line 30 can be formed. It is shown in comparison with a general two-layer paper phenolic resin substrate (the circuit board 100 in FIG. 1A) and the circuit board 10 of the present embodiment. Since the characteristic impedance of the HDMI high-speed digital line 30 is 100 ⁇ , the pattern width W of the high-speed digital line 30 required to realize the characteristic impedance was calculated.
  • the high-speed digital line 30 having a thickness of 0.08 mm
  • the pattern width W was 0.11 mm, which was a designable range, and it was confirmed that good characteristics were obtained.
  • the pattern width W is 0.9 mm and the HDMI connector pitch is 0.5 mm in the example of the condition shown in the figure, so the calculated value is far from the actual value. ing.
  • a microstrip line can be formed by stacking two inexpensive paper phenol substrates, and an appropriate characteristic impedance can be ensured, and a stable high-speed digital line 30 can be provided.
  • the high-speed digital line 30 (high-speed transmission line) can be formed on the same substrate as the circuit conventionally provided on the paper phenol substrate such as a power supply circuit. For this reason, it is possible to mount all circuits conventionally provided on different substrates on the same substrate. As a result, the product cost can be greatly reduced. In addition, management man-hours can be reduced.
  • a single-sided single layer is used as the lower substrate 20.
  • a paper polyethylene resin that may be used for a single-sided substrate may be used as a base substrate material instead of the paper phenol substrates 21 and 41.
  • various materials may be employed for the base substrate. From the viewpoint of the cost of the material itself, paper phenolic resin or paper ethylene resin glass plate is preferable, but from the viewpoint of total procurement cost including the manufacturing process, naturally glass epoxy resin or glass plate may be used. .
  • the rigid substrate is exemplified as the lower substrate 20 that is the first substrate and the upper substrate 40 that is the second substrate.
  • a flexible wiring substrate may be used as the lower substrate 20 and the upper substrate 40.
  • a flexible wiring substrate configured in a card shape (sheet shape) may be employed as the upper substrate 40.
  • the upper substrate 40 may have a seal-like configuration in which an adhesive is applied to a fixed surface with the lower substrate 20 and the coated surface is covered with a protective sheet that can be easily peeled off in the pre-production stage. It is. And at the time of an assembly, the simple manufacturing process of peeling the said protection sheet of the upper board
  • the lower substrate resist 23 and the upper substrate resist 43 may be a single layer or a plurality of layers made of different materials. Further, the lower substrate resist 23 and the upper substrate resist 43 may be fixed by a predetermined adhesive.
  • the upper substrate 40 may be integrated with a part of a cabinet or the like of a display device to be mounted. Further, if a microstrip line can be formed and a stable high-speed digital line 30 with an appropriate characteristic impedance can be realized, a substrate using a so-called plate-like substrate such as the lower substrate 20 and the upper substrate 40 can be realized. Need not be. For example, a conductive member using a highly flexible / flexible member such as cloth or paper may be used. In particular, there is room for selection of various materials for the upper substrate 40 in the case of the above-described sealing configuration.
  • the conductive member is not an independent configuration like the upper substrate 40, and can also be used as a shield plate for various substrates.
  • the function of the shield plate and the function of generating the microstrip line can be realized by forming a shape such that a part of the shield plate is in close contact with the portion where the microstrip line (high-speed digital line 30) is to be generated.
  • the shape of the shield plate a shape in which the shield plate is dented only at a portion where the microstrip line is generated can be considered.
  • the shield plate is usually fixed with screws or the like at the four corners of the substrate, and the ground and shield of the substrate can also be conducted at this portion.
  • the shield plate and the wiring are more preferably equally spaced, it is necessary to continue applying a certain amount of force to the substrate from the shield plate side. In such a case, it is possible to continue to apply such a force by making the shield plate a springy member.
  • the conductive member may have a chassis structure. This is because the chassis structure is normally grounded and can function as a member for generating a micro split line. For example, when fixing a board

Abstract

Disclosed is a technique for producing a high-speed digital transmission line capable of transmitting a signal in a steady manner using a substrate having an inexpensive structure. As illustrated in Fig. 2, a circuit board (10) is composed of two substrates, i.e., a lower substrate (20) and an upper substrate (40) both of which are one-side substrates, wherein the upper substrate (40) is so adapted as to cover a high-speed digital line (30) in the lower substrate (20). In the installation of the lower substrate (20) and the upper substrate (40), a metal sheet (60) is arranged adjacent to both ends of the upper substrate (40) so that ground planes of the lower substrate (20) and the upper substrate (40) are connected to each other.

Description

回路基板Circuit board
 本発明は、回路基板に係り、特に、高速伝送路が形成された回路基板に関する。 The present invention relates to a circuit board, and more particularly to a circuit board on which a high-speed transmission path is formed.
 近年、HDMI(High-Definition Multimedia Interface)、LVDS(Low voltage differential signaling)等の高速伝送路が構成された家電製品が増えてきている。一般に、高速伝送路は、マイクロストリップ線路が容易に構成できる多層基板を用いることで、安定した伝送路が実現されている。図1(a)に、マイクロストリップ線路の基本構造である2層構造の回路基板(断面)100を示す。絶縁基板120の下側には導電層であるグランドプレーン130が形成され、上側には信号層110が形成されている。また、図1(b)に、良好な特性を実現するために用いられる4層構造によるマイクロストリップ線路の回路基板(断面)200を示す。この回路基板200は第1から第3の絶縁層220a~220cを有している。また、第3の絶縁層220cの下側には導電層であるグランドプレーン231が形成され、第1の絶縁層220aの上側には信号層210が形成されている。また、第1及び第2の絶縁層220a、220bの間、及び第2及び第3の絶縁層220b、220cの間には、それぞれ、導電層232、233が形成されている。 In recent years, home appliances in which high-speed transmission paths such as HDMI (High-Definition Multimedia Interface) and LVDS (Low Voltage differential signaling) are configured are increasing. In general, a high-speed transmission line is realized by using a multilayer substrate on which a microstrip line can be easily configured, thereby realizing a stable transmission line. FIG. 1A shows a circuit board (cross section) 100 having a two-layer structure, which is a basic structure of a microstrip line. A ground plane 130 which is a conductive layer is formed on the lower side of the insulating substrate 120, and a signal layer 110 is formed on the upper side. FIG. 1B shows a circuit board (cross section) 200 of a microstrip line having a four-layer structure used for realizing good characteristics. The circuit board 200 has first to third insulating layers 220a to 220c. A ground plane 231 that is a conductive layer is formed below the third insulating layer 220c, and a signal layer 210 is formed above the first insulating layer 220a. Conductive layers 232 and 233 are formed between the first and second insulating layers 220a and 220b and between the second and third insulating layers 220b and 220c, respectively.
 また、マイクロストリップ線路が設けられた回路基板において、低コスト化及び高速伝送時の伝送品位を良好にするために様々な技術が提案されている。例えば、次のような回路基板が開示されている。つまり、この回路基板は、接地電位等となる導電層上に配置された第1の絶縁層と、その上に配置された第1の配線及び第2の配線と、第1の配線及び前記第2の配線を覆う第2の絶縁層と、第2の絶縁層上に設けられ第1の配線または第2の配線と電気的に接続する電極端子と、第2の絶縁層上で且つ第1及び第2の配線との間の上方に設けられ、電極端子と同じ層構成を含む導電パターンと、を有する(例えば、特許文献1参照)。この回路基板によって、低コストと配線間のクロストーク(ノイズ)を抑制している。 In addition, various techniques have been proposed for reducing the cost and improving the transmission quality during high-speed transmission in a circuit board provided with a microstrip line. For example, the following circuit board is disclosed. That is, the circuit board includes a first insulating layer disposed on a conductive layer having a ground potential or the like, a first wiring and a second wiring disposed on the first insulating layer, a first wiring, and the first wiring. A second insulating layer covering the second wiring, an electrode terminal provided on the second insulating layer and electrically connected to the first wiring or the second wiring, the second insulating layer and the first wiring And a conductive pattern provided above the second wiring and including the same layer structure as the electrode terminal (see, for example, Patent Document 1). This circuit board suppresses low cost and crosstalk (noise) between wires.
特開2010-21468号公報JP 2010-21468 A
 ところで、HDMI等の入力/出力端子は、ローコストモデルのテレビでも搭載されることが、一般的になってきている。その結果、従来では想定できないような低コストの構成が求められるようになってきている。一般に、安定した高速デジタル伝送路を形成するためには4層以上の層構成をもつ基板が理想である。しかし、上述のような多層基板を前提とした回路では、どうしてもコスト低減に限界が出てきた。そこで、多層基板と比べ非常に安価な紙フェノール樹脂等を基板材としたローコスト基板の採用への要望が強くなってきた。しかし、図1(a)で示したように、2層基板で高速デジタル伝送路を構成し、実用化されてはいるが、この場合、グランドプレーン130が信号層110から1.6mm程度離れたところにあるため、ほとんど、平行差動線路となってしまう。このため、銅箔のパターン幅のばらつき精度を極めて高くして基板の製造を行う必要があり、不安定な特性となる。その結果、高解像度信号の高速デジタル伝送路には使用できない場合があった。そのため新たな技術が求められていた。 Incidentally, it has become common for input / output terminals such as HDMI to be mounted even on low-cost TVs. As a result, a low-cost configuration that cannot be assumed in the past has been demanded. In general, a substrate having a layer configuration of four or more layers is ideal for forming a stable high-speed digital transmission line. However, in the circuit premised on the multilayer substrate as described above, there has been a limit to cost reduction. Therefore, there has been a strong demand for adopting a low-cost substrate using a paper phenol resin or the like which is very inexpensive as compared with a multilayer substrate. However, as shown in FIG. 1 (a), a high-speed digital transmission line is configured with a two-layer substrate, and in this case, the ground plane 130 is separated from the signal layer 110 by about 1.6 mm. However, it is almost a parallel differential line. For this reason, it is necessary to manufacture the substrate with extremely high variations in the pattern width of the copper foil, resulting in unstable characteristics. As a result, there are cases where it cannot be used for a high-speed digital transmission line for high-resolution signals. Therefore, new technology has been demanded.
 本発明の目的は、上記課題に鑑み、安定した信号伝送が可能な高速デジタル伝送路を安価な構造の基板を用いて実現する技術を提供すものである。 In view of the above problems, an object of the present invention is to provide a technique for realizing a high-speed digital transmission line capable of stable signal transmission using an inexpensive substrate.
 本発明に係る装置は、回路基板に関する。この回路基板は、配線ユニットと、導電層を有しグランドに接地された導電性部材と、前記配線ユニット及び前記導電性部材の接地領域を接続する接地接続手段とを備え、前記配線ユニットは、ベース基材の片方の面上にパターニングされた高速デジタル伝送用の回路配線と、前記回路配線の上に形成された絶縁特性を有する誘電層と、を有し、前記導電性部材は、前記配線ユニットにおける前記回路配線が形成された領域を覆うように、前記誘電層に対向させて固定される。
 また、前記配線ユニットの前記ベース基材は、紙フェノール樹脂又は紙ポリエチレン樹脂であってもよい。
 また、前記導電性部材は、紙フェノール樹脂又は紙ポリエチレン樹脂であるベース基材に導電層が形成されている配線基板であってもよい。
 また、前記導電性部材は、可撓性を有したシート状を呈していてもよい。
 また、前記導電性部材は、金属板を有していてもよい。
 また、前記導電性部材は、基板用シールドケースであってもよい。
 また、前記導電性部材は、筺体のシャーシ構造であってもよい。
 また、前記導電性部材は、前記配線ユニットに、接着手段によって固定されてもよい。
 また、前記配線ユニットは、前記配線ユニットの前記ベース基材の前記回路配線が形成された面とは反対の面において、導電層を有していなくともよい。
 また、前記配線ユニットの前記誘電層の厚さと前記前記導電性部材に形成される誘電層の厚さの合計が、50~300μmの範囲であってもよい。
 また、前記接地接続手段は、前記配線ユニットの接地領域と前記導電性部材の前記導電層とを接続する金属の板状体を有してもよい。
 また、前記配線ユニットと前記導電性部材とを、前記回路配線が形成される領域の外側近傍において固定する固定手段を備えてもよい。
 また、前記配線ユニットと前記導電性部材とを、前記回路配線が形成される領域の外側近傍であって、金属の板状板が設けられる領域において固定する固定手段を備えてもよい。
The apparatus according to the present invention relates to a circuit board. The circuit board includes a wiring unit, a conductive member having a conductive layer and grounded to ground, and a ground connection means for connecting the wiring unit and a ground region of the conductive member. A circuit wiring for high-speed digital transmission patterned on one surface of a base substrate, and a dielectric layer having an insulating property formed on the circuit wiring, and the conductive member includes the wiring The unit is fixed so as to face the dielectric layer so as to cover a region where the circuit wiring is formed in the unit.
The base substrate of the wiring unit may be a paper phenol resin or a paper polyethylene resin.
Further, the conductive member may be a wiring board in which a conductive layer is formed on a base substrate made of paper phenol resin or paper polyethylene resin.
Further, the conductive member may have a flexible sheet shape.
The conductive member may have a metal plate.
The conductive member may be a board shield case.
The conductive member may have a chassis structure.
The conductive member may be fixed to the wiring unit by an adhesive means.
Moreover, the said wiring unit does not need to have a conductive layer in the surface opposite to the surface where the said circuit wiring of the said base base material of the said wiring unit was formed.
The total of the thickness of the dielectric layer of the wiring unit and the thickness of the dielectric layer formed on the conductive member may be in the range of 50 to 300 μm.
The ground connection means may include a metal plate-like body that connects the ground region of the wiring unit and the conductive layer of the conductive member.
Moreover, you may provide the fixing means which fixes the said wiring unit and the said electroconductive member in the outer side vicinity of the area | region in which the said circuit wiring is formed.
The wiring unit and the conductive member may be provided with a fixing means for fixing the wiring unit and the conductive member in the vicinity of the outside of the region where the circuit wiring is formed and in the region where the metal plate is provided.
 本発明によれば、安定した信号伝送が可能な高速デジタル伝送路を安価な構造の基板を用いて実現する技術を提供することができる。 According to the present invention, it is possible to provide a technique for realizing a high-speed digital transmission line capable of stable signal transmission using an inexpensive substrate.
従来技術に係る、マイクロスプリット線路を構成する回路を示した図である。It is the figure which showed the circuit which comprises the micro split line based on a prior art. 本実施形態に係る、回路基板の斜視図である。It is a perspective view of a circuit board concerning this embodiment. 本実施形態に係る、下基板と上基板との取付構造について、主に高速デジタル線路が形成されている領域を模式的に示した図である。It is the figure which showed typically the area | region where the high-speed digital line is mainly formed about the attachment structure of the lower board | substrate based on this embodiment, and an upper board | substrate. 本実施形態に係る、図3のA1の領域に関する下基板と上基板との取付構造を示した断面図である。It is sectional drawing which showed the attachment structure of the lower board | substrate and upper board | substrate regarding the area | region of A1 of FIG. 3 based on this embodiment. 本実施形態に係る、図3のA2の領域に関する下基板、金属板及び上基板の取付構造を示した断面図である。It is sectional drawing which showed the attachment structure of the lower board | substrate, metal plate, and upper board | substrate regarding the area | region of A2 of FIG. 3 based on this embodiment. 本実施形態に係る、インピーダンス特性の検証結果を示す図である。It is a figure which shows the verification result of an impedance characteristic based on this embodiment.
 次に、本発明を実施するための形態を、図面を参照して具体的に説明する。
 上述のように、HDMI等の高速デジタル伝送路は安定した多層基板により、適切な特性インピーダンスが確保されている必要があった。このため、従来、液晶テレビ等における低価格モデルで多用されていた紙フェノール樹脂のベース基板で作られた片面基板を使用できなかった。本実施の形態では、HDMI、LVDS、DDR(Double-Data-Rate)データライン等の高速デジタル伝送路(または「高速デジタル線路」ともいう)を有する電子機器を想定する。
Next, embodiments for carrying out the present invention will be specifically described with reference to the drawings.
As described above, a high-speed digital transmission line such as HDMI needs to have an appropriate characteristic impedance secured by a stable multilayer substrate. For this reason, it has been impossible to use a single-sided substrate made of a paper phenolic resin base substrate that has been widely used in low-priced models of liquid crystal televisions and the like. In the present embodiment, an electronic device having a high-speed digital transmission line (or “high-speed digital line”) such as an HDMI, LVDS, or DDR (Double-Data-Rate) data line is assumed.
 図2は、本実施形態に係る回路基板10の斜視図である。また、図3は、配線ユニット(第1の基板)である下基板20と導電性部材(第2の基板)である上基板40との取付構造(側面)について、主に高速デジタル線路30が形成されている領域を模式的に示した図である。なお、図2の矢印に示すように、便宜的に高速デジタル線路30が直線に延びる方向を前後方向とし、また、高速デジタル線路30の直線方向に対して直角方向を左右方向として説明する。 FIG. 2 is a perspective view of the circuit board 10 according to the present embodiment. Further, FIG. 3 shows mainly the high-speed digital line 30 for the mounting structure (side surface) of the lower substrate 20 which is a wiring unit (first substrate) and the upper substrate 40 which is a conductive member (second substrate). It is the figure which showed the area | region currently formed typically. For convenience, the direction in which the high-speed digital line 30 extends in a straight line will be referred to as the front-rear direction, and the direction perpendicular to the straight direction of the high-speed digital line 30 will be described as the left-right direction.
 図2に示すように、回路基板10の表面20aには、IC回路の一種であるHDMIレシーバ90が取り付けられており、そのICピン91が高速デジタル線路30に接続されている。 As shown in FIG. 2, an HDMI receiver 90 which is a kind of IC circuit is attached to the surface 20 a of the circuit board 10, and the IC pin 91 is connected to the high-speed digital line 30.
 本実施形態では、回路基板10は、下基板20と上基板40との二つの基板から構成されおり、上基板40が下基板20の高速デジタル線路30を覆うようにして取り付けられる。なお、図2では、下基板20と上基板40との固定手段であるビス80を省略している。また、その取り付けの際に、上基板40の左右端部近傍には、金属板60が介装され、下基板20と上基板40のグランドプレーンが接続されるようになっている。下基板20及び上基板40の詳細な構造については後述する。 In this embodiment, the circuit board 10 is composed of two substrates, a lower substrate 20 and an upper substrate 40, and the upper substrate 40 is attached so as to cover the high-speed digital line 30 of the lower substrate 20. In FIG. 2, screws 80 that are fixing means for the lower substrate 20 and the upper substrate 40 are omitted. In addition, a metal plate 60 is interposed in the vicinity of the left and right end portions of the upper substrate 40 during the attachment, and the ground planes of the lower substrate 20 and the upper substrate 40 are connected. Detailed structures of the lower substrate 20 and the upper substrate 40 will be described later.
 図2に示すように、下基板20には、8本の銅箔の高速デジタル線路30が、パターニング手法等によって、前後方向(図示で左上から右下)に直線状に所定長で形成されている。なお、ここでは、両サイドの2本の高速デジタル線路30にのみ符号を付している。また、以降の構成要素の説明において、複数個からなる同一構成要素については、適宜代表部分について符号を付して一部省略している。 As shown in FIG. 2, eight copper foil high-speed digital lines 30 are formed on the lower substrate 20 in a straight line with a predetermined length in the front-rear direction (upper left to lower right in the figure) by a patterning method or the like. Yes. Here, only the two high-speed digital lines 30 on both sides are denoted by reference numerals. Further, in the following description of the constituent elements, a plurality of the same constituent elements are appropriately denoted by reference numerals and partly omitted.
 そして、高速デジタル線路30の左上側(HDMIレシーバ90側)の端部31がそれぞれ、HDMIレシーバ90から延びる8本のICピン91に接続されている。また、図2(b)に示すように、高速デジタル線路30において、左上の端部31と右下の端部32の間の直線状部分を覆うようにして、上基板40が下基板20に固定されている。 And, the upper left end portion (HDMI receiver 90 side) end 31 of the high-speed digital line 30 is connected to eight IC pins 91 extending from the HDMI receiver 90, respectively. 2B, in the high-speed digital line 30, the upper substrate 40 is attached to the lower substrate 20 so as to cover a linear portion between the upper left end portion 31 and the lower right end portion 32. It is fixed.
 上述のように下基板20と上基板40の間には、上基板40の所定の領域に、金属板60が介装され、グランド接続部50(図3参照)が形成されている。具体的には、上基板40の両サイドに、金属板60として長方形の銅板が、下基板20と上基板40が固定されるときにそれに挟まるようにして配置される。このグランド接続部50は、下基板20と上基板40の各グランドプレーンを接続する機能を果たす。この観点から、金属板60として、銅板以外の良好な導電性を有する材料であれば代替することができ、異方性導電材や導電接着剤等を用いることができる。 As described above, between the lower substrate 20 and the upper substrate 40, the metal plate 60 is interposed in a predetermined region of the upper substrate 40, and the ground connection portion 50 (see FIG. 3) is formed. Specifically, a rectangular copper plate as the metal plate 60 is disposed on both sides of the upper substrate 40 so as to be sandwiched between the lower substrate 20 and the upper substrate 40. The ground connection unit 50 functions to connect the ground planes of the lower substrate 20 and the upper substrate 40. From this viewpoint, the metal plate 60 can be replaced with any material having good conductivity other than the copper plate, and an anisotropic conductive material, a conductive adhesive, or the like can be used.
 下基板20と上基板40は、図3に示すように、下基板20と上基板40とを貫通するビス孔70(71、72、73)をビス80で固定することによって、密着される。具体的には、上基板40には、8つの上基板ビス孔72が設けられている。また、下基板20にも、上基板ビス孔72に対応する位置に8つの下基板ビス孔71が設けられている。ここで、左右方向の中央の4つの下基板ビス孔71及び上基板ビス孔72は、ちょうど高速デジタル線路30が形成される近傍外側に形成されている。また、左右両サイドの4つの下基板ビス孔71及び上基板ビス孔72は、それらの間に配置される金属板60に設けられるビス孔73と一致するようになっている。なお、ビス固定の他に、接着剤による固定等、適正な固定状態が確保できれば、固定手段として各種の手段が採用されてもよい。 As shown in FIG. 3, the lower substrate 20 and the upper substrate 40 are brought into close contact with each other by fixing screw holes 70 (71, 72, 73) penetrating the lower substrate 20 and the upper substrate 40 with screws 80. Specifically, the upper substrate 40 is provided with eight upper substrate screw holes 72. The lower substrate 20 is also provided with eight lower substrate screw holes 71 at positions corresponding to the upper substrate screw holes 72. Here, the four lower substrate screw holes 71 and the upper substrate screw hole 72 in the center in the left-right direction are formed just outside in the vicinity where the high-speed digital line 30 is formed. Further, the four lower board screw holes 71 and the upper board screw holes 72 on both the left and right sides coincide with the screw holes 73 provided in the metal plate 60 disposed therebetween. In addition to screw fixing, various means may be adopted as fixing means as long as an appropriate fixing state such as fixing with an adhesive can be secured.
 この様に、ビス孔70(71、72、73)形成してビス80で固定するようにしたので、上基板40は、高速デジタル線路30の外側の極力近傍においてビス80によって固定されるようになっている。その結果、下側基板20と上基板40とが密着し、下基板20と上基板40とのグランドプレーンが所定の間隔に維持される。 In this manner, the screw holes 70 (71, 72, 73) are formed and fixed with the screws 80, so that the upper substrate 40 is fixed with the screws 80 in the vicinity of the outer side of the high-speed digital line 30 as much as possible. It has become. As a result, the lower substrate 20 and the upper substrate 40 are in close contact with each other, and the ground plane between the lower substrate 20 and the upper substrate 40 is maintained at a predetermined interval.
 図4は、図3のA1の領域における、下基板20と上基板40の取付構造の断面図である。なお、図4は、下基板20と上基板40との固定前の状態を示し、図4(b)は、下基板20と上基板40とが固定された状態を示している。さらに、図5は、図3のA2の領域、つまり、金属板60が取り付けられる部分の断面構造を示している。 FIG. 4 is a cross-sectional view of the mounting structure of the lower substrate 20 and the upper substrate 40 in the area A1 in FIG. 4 shows a state before the lower substrate 20 and the upper substrate 40 are fixed, and FIG. 4B shows a state where the lower substrate 20 and the upper substrate 40 are fixed. Further, FIG. 5 shows a cross-sectional structure of a region A2 in FIG. 3, that is, a portion to which the metal plate 60 is attached.
 まず、図4を参照して説明する。下基板20及び上基板40のベース材である紙フェノール基板21及び紙フェノール基板41は、紙基材にフェノール樹脂を含浸させて形成されている。 First, a description will be given with reference to FIG. The paper phenol substrate 21 and the paper phenol substrate 41 which are base materials of the lower substrate 20 and the upper substrate 40 are formed by impregnating a paper base material with a phenol resin.
 下基板20について説明する。下基板20の紙フェノール基板21の上面には、所定の領域に下基板銅箔22がパターニングされた配線構造、つまり高速デジタル線路30が形成されている。この高速デジタル線路30のパターン幅やパターン間隔は適正に管理される必要がある。具体的には、高速デジタル線路30の上側に配置されることになる後述の下基板レジスト23や上基板レジスト43の厚さ及び誘電率に対応して、適切なパターン幅及びパターン間隔が設定される。特に、高速デジタル線路30の直ぐ上に形成される下基板レジスト23の厚さや誘電率を考慮することが好ましい。 The lower substrate 20 will be described. On the upper surface of the paper phenol substrate 21 of the lower substrate 20, a wiring structure in which the lower substrate copper foil 22 is patterned in a predetermined region, that is, a high-speed digital line 30 is formed. The pattern width and pattern interval of the high-speed digital line 30 need to be managed appropriately. Specifically, appropriate pattern widths and pattern intervals are set in accordance with the thickness and dielectric constant of a lower substrate resist 23 and an upper substrate resist 43 which will be disposed on the upper side of the high-speed digital line 30. The In particular, it is preferable to consider the thickness and dielectric constant of the lower substrate resist 23 formed immediately above the high-speed digital line 30.
 高速デジタル線路30の上には、更に下基板レジスト23が所定厚さで形成されている。下基板レジスト23は、所定の安定した誘電率を有した絶縁材である。所定の誘電率は、概ね1~5程度の範囲の材料が好ましい。なお、一般的なレジストの代替として、同様の特性(絶縁性及び誘電率等)を有するポリエチレンテレフタレート(PET;誘電率2.9~3.0)を用いることも出来る。 A lower substrate resist 23 is further formed with a predetermined thickness on the high-speed digital line 30. The lower substrate resist 23 is an insulating material having a predetermined stable dielectric constant. A material having a predetermined dielectric constant in the range of about 1 to 5 is preferable. As an alternative to a general resist, polyethylene terephthalate (PET; dielectric constant 2.9 to 3.0) having similar characteristics (insulating properties, dielectric constant, etc.) can also be used.
 また、下基板レジスト23の厚さは、後述する上基板40の上基板レジスト43の厚さとを合計したときに、50~300μmになるように設定されることが好ましい。単独としての厚さは、25μm以上の厚さが、より好ましい。さらに、下基板レジスト23の表面は、平面になるように形成されている。ただし、高速デジタル線路30のパターニングのために下基板銅箔22が取り除かれている領域を覆う部分は、凹みが形成されている。 The thickness of the lower substrate resist 23 is preferably set to 50 to 300 μm when the thickness of the upper substrate resist 43 of the upper substrate 40 described later is added up. The thickness as a single unit is more preferably 25 μm or more. Further, the surface of the lower substrate resist 23 is formed to be a flat surface. However, the portion covering the region where the lower substrate copper foil 22 is removed for patterning the high-speed digital line 30 is formed with a recess.
 つづいて、上基板40について説明する。上基板40は、紙フェノール基板41の下側の面に、上基板銅箔42が形成されている。この上基板銅箔42は、グランドプレーンの導電層として機能するものである。そして、上基板銅箔42の表層には、つまり、図示では上基板銅箔42の下側には上基板レジスト43が所望の厚さで形成されている。上基板レジスト43の厚さは、上述の通り、下基板レジスト23の厚さとともに管理されて設定される。 Next, the upper substrate 40 will be described. The upper substrate 40 has an upper substrate copper foil 42 formed on the lower surface of the paper phenol substrate 41. The upper substrate copper foil 42 functions as a conductive layer for the ground plane. An upper substrate resist 43 is formed in a desired thickness on the surface layer of the upper substrate copper foil 42, that is, below the upper substrate copper foil 42 in the drawing. As described above, the thickness of the upper substrate resist 43 is managed and set together with the thickness of the lower substrate resist 23.
 上基板レジスト43の材質は、下基板レジスト23と同様に、所定の安定した誘電率を有した絶縁材である。また、ポリエチレンテレフタレートを用いることも出来る。なお、上基板レジスト43は、下基板レジスト23と同じ材質であってもよいし、異なる材質でもよい。 The material of the upper substrate resist 43 is an insulating material having a predetermined stable dielectric constant, like the lower substrate resist 23. Polyethylene terephthalate can also be used. The upper substrate resist 43 may be the same material as the lower substrate resist 23 or may be a different material.
 つぎに、図5を参照して、金属板60が設けられる部分の構造を説明する。なお、ビス孔70(71~73)は省略している。図示のように、上基板40の右端部分の下基板レジスト43が一部取り除かれており、上基板銅箔42が露出している。上基板銅箔42が露出している部分に対向する下基板20の位置では、同様に、下基板レジスト23が取り除かれて、下基板銅箔22が露出している。この露出している下基板銅箔22は、下基板20のグランドプレーンになっている。そして、下基板銅箔22の露出部分と上基板銅箔42の露出部分との間に、金属板60が配置され、図3で示したように、ビス80で固定される。このような構成をとるために、金属板60の厚さは、下基板レジスト23と上基板レジスト43の厚さと略同一に設定される。これによって、金属板60は、下基板銅箔22と上基板銅箔42の両方に接続され固定される。 Next, the structure of the portion where the metal plate 60 is provided will be described with reference to FIG. The screw holes 70 (71 to 73) are omitted. As shown, the lower substrate resist 43 of the right end portion of the upper substrate 40 is partially removed, and the upper substrate copper foil 42 is exposed. Similarly, at the position of the lower substrate 20 facing the portion where the upper substrate copper foil 42 is exposed, the lower substrate resist 23 is removed and the lower substrate copper foil 22 is exposed. The exposed lower substrate copper foil 22 is a ground plane of the lower substrate 20. A metal plate 60 is disposed between the exposed portion of the lower substrate copper foil 22 and the exposed portion of the upper substrate copper foil 42, and is fixed with screws 80 as shown in FIG. In order to adopt such a configuration, the thickness of the metal plate 60 is set to be substantially the same as the thickness of the lower substrate resist 23 and the upper substrate resist 43. Thereby, the metal plate 60 is connected and fixed to both the lower substrate copper foil 22 and the upper substrate copper foil 42.
 図6に、HDMIの高速デジタル線路30を形成することが可能である否かのシミュレーション結果を示す。一般的な2層紙フェノール樹脂基板(図1(a)の回路基板100)と本実施形態の回路基板10と比較して示している。HDMIの高速デジタル線路30の特性インピーダンスは100Ωであることから、その特性インピーダンスを実現するために必要とされる高速デジタル線路30のパターン幅Wを算出した。本実施形態では図示のように、誘電率3.8の紙フェノール基板21の厚さHを0.08mm、レジストの厚さを40μmとしたときに、厚さ0.08mmの高速デジタル線路30の間隔Sを0.23として、インピーダンスが100Ωとなるように計算をしたところ、パターン幅Wは0.11mmとなり、設計可能な範囲であり、良好な特性が得られることが確認できた。一方で、2層紙フェノール樹脂基板では、図示の条件例において、パターン幅Wが0.9mmとなり、HDMIコネクタのピッチが0.5mmであることから、算出した値は現実的な値とはかけ離れている。 FIG. 6 shows a simulation result of whether or not the HDMI high-speed digital line 30 can be formed. It is shown in comparison with a general two-layer paper phenolic resin substrate (the circuit board 100 in FIG. 1A) and the circuit board 10 of the present embodiment. Since the characteristic impedance of the HDMI high-speed digital line 30 is 100Ω, the pattern width W of the high-speed digital line 30 required to realize the characteristic impedance was calculated. In the present embodiment, as shown in the figure, when the thickness H of the paper phenol substrate 21 having a dielectric constant of 3.8 is 0.08 mm and the resist thickness is 40 μm, the high-speed digital line 30 having a thickness of 0.08 mm When the calculation was performed with the interval S being 0.23 and the impedance being 100Ω, the pattern width W was 0.11 mm, which was a designable range, and it was confirmed that good characteristics were obtained. On the other hand, in the two-layer paper phenolic resin substrate, the pattern width W is 0.9 mm and the HDMI connector pitch is 0.5 mm in the example of the condition shown in the figure, so the calculated value is far from the actual value. ing.
 以上の構成により、安価な紙フェノール基板を2枚重ねることにより、マイクロストリップ線路が形成でき、適切な特性インピーダンスを確保し、安定した高速デジタル線路30を提供できる。また、電源回路などの従来から紙フェノール基板に設けられていた回路と同一基板上に高速デジタル線路30(高速伝送路)を形成することができる。このため、従来では別基板上に設けられていた回路を、全て同一基板上に搭載させることが可能となる。この結果、製品コストを大幅に下げることが可能となる。また、管理工数も低減できる。また、高速デジタル線路30のパターンや伝送される信号に応じて、上基板40を適宜設定変更することが容易であり、かつ交換が容易である。したがって、様々な回路に適用ができ、HDMIレシーバ90等の変更があったときに、回路基板10全体を変更することなく、上基板40のみの対応で可能となる。 With the above configuration, a microstrip line can be formed by stacking two inexpensive paper phenol substrates, and an appropriate characteristic impedance can be ensured, and a stable high-speed digital line 30 can be provided. Further, the high-speed digital line 30 (high-speed transmission line) can be formed on the same substrate as the circuit conventionally provided on the paper phenol substrate such as a power supply circuit. For this reason, it is possible to mount all circuits conventionally provided on different substrates on the same substrate. As a result, the product cost can be greatly reduced. In addition, management man-hours can be reduced. Moreover, it is easy to change the setting of the upper substrate 40 according to the pattern of the high-speed digital line 30 and the signal to be transmitted, and the replacement is easy. Therefore, the present invention can be applied to various circuits. When the HDMI receiver 90 or the like is changed, it is possible to deal with only the upper substrate 40 without changing the entire circuit substrate 10.
 以上、本発明を実施形態をもとに説明した。この実施形態は例示であり、それらの各構成要素の組み合わせにいろいろな変形例が可能なこと、またそうした変形例も本発明の範囲にあることは当業者に理解されるところである。 The present invention has been described based on the embodiments. This embodiment is an exemplification, and it will be understood by those skilled in the art that various modifications can be made to combinations of these components, and such modifications are also within the scope of the present invention.
 例えば、上記の実施形態では、下基板20として片面単層を用いた。しかし、図1(a)に示した2層基板に適用することも可能である。上述のように、2層基板で高速デジタル線路を形成した場合、不安定になることがあるので、高速デジタル線路上に上基板40と同様の構造の基板を取り付けることで、安定性を向上させることができる。また、安価な基板材を使用するという観点から、ベース基板の材質として紙フェノール基板21、41の代替として、片面基板に用いられることがある紙ポリエチレン樹脂が用いられてもよい。さらにベース基材には、各種の材料を採用してもよい。材料自体のコスト的な観点では、紙フェノール樹脂や紙エチレン樹脂ガラス板が好ましいが、製造工程を含めた総合的な調達コストの観点から、当然にガラスエポキシ樹脂やガラスプレートが用いられてもよい。 For example, in the above embodiment, a single-sided single layer is used as the lower substrate 20. However, it is also possible to apply to the two-layer substrate shown in FIG. As described above, when a high-speed digital line is formed with a two-layer substrate, it may become unstable. Therefore, by attaching a substrate having the same structure as the upper substrate 40 on the high-speed digital line, stability is improved. be able to. Further, from the viewpoint of using an inexpensive substrate material, a paper polyethylene resin that may be used for a single-sided substrate may be used as a base substrate material instead of the paper phenol substrates 21 and 41. Further, various materials may be employed for the base substrate. From the viewpoint of the cost of the material itself, paper phenolic resin or paper ethylene resin glass plate is preferable, but from the viewpoint of total procurement cost including the manufacturing process, naturally glass epoxy resin or glass plate may be used. .
 さらに、上記実施形態では、第1の基板である下基板20及び第2の基板である上基板40)として、リジット基板について例示したが、これに限る趣旨ではない。下基板20や上基板40として、フレキシブル配線基板が用いられてもよい。特に、上基板40として、フレキシブル配線基板をカード状(シート状)に構成したものが採用されてもよい。その場合、上基板40を、下基板20との固定面に接着剤が塗布されており、かつ製造前段階においてその塗布面を剥離容易な保護シートが覆うといったシール状の構成とすることも可能である。そして組み立て時において、上基板40の前記保護シートを剥離して、下基板20に接着させるといった簡易的な製造工程を実現できる。 Furthermore, in the above-described embodiment, the rigid substrate is exemplified as the lower substrate 20 that is the first substrate and the upper substrate 40 that is the second substrate. However, the present invention is not limited to this. A flexible wiring substrate may be used as the lower substrate 20 and the upper substrate 40. In particular, as the upper substrate 40, a flexible wiring substrate configured in a card shape (sheet shape) may be employed. In that case, the upper substrate 40 may have a seal-like configuration in which an adhesive is applied to a fixed surface with the lower substrate 20 and the coated surface is covered with a protective sheet that can be easily peeled off in the pre-production stage. It is. And at the time of an assembly, the simple manufacturing process of peeling the said protection sheet of the upper board | substrate 40 and making it adhere | attach on the lower board | substrate 20 is realizable.
 また、下基板レジスト23や上基板レジスト43は、単層であってもよいし材質の異なる複数の層から形成されてもよい。また、下基板レジスト23と上基板レジスト43が所定の接着剤によって固定されてもよい。 Further, the lower substrate resist 23 and the upper substrate resist 43 may be a single layer or a plurality of layers made of different materials. Further, the lower substrate resist 23 and the upper substrate resist 43 may be fixed by a predetermined adhesive.
 さらにまた、上基板40が、搭載される表示装置のキャビネット等の一部に一体に構成されてもよい。さらに、マイクロストリップ線路が形成でき、適切な特性インピーダンスを確保した安定した高速デジタル線路30を実現できるのであれば、下基板20や上基板40のように、いわゆる板状の基材を用いた基板である必要はない。例えば、布や紙のような柔軟性・可撓性の高い部材が用いられた導電性部材が用いられてもよい。特に、上基板40については、上述のシール状の構成として場合に、各種の材料の選択の余地がある。 Furthermore, the upper substrate 40 may be integrated with a part of a cabinet or the like of a display device to be mounted. Further, if a microstrip line can be formed and a stable high-speed digital line 30 with an appropriate characteristic impedance can be realized, a substrate using a so-called plate-like substrate such as the lower substrate 20 and the upper substrate 40 can be realized. Need not be. For example, a conductive member using a highly flexible / flexible member such as cloth or paper may be used. In particular, there is room for selection of various materials for the upper substrate 40 in the case of the above-described sealing configuration.
 また、導電性部材は、上基板40のように独立した構成でなく、各種の基板のシールド板と兼用することができる。たとえば、マイクロストリップ線路(高速デジタル線路30)を生成すべき部分にシールド板の一部が密着するような形状にすることによって、シールド板の機能とマイクロストリップ線路を生成する機能を実現できる。その際、シールド板の形状としては、マイクロストリップ線路を生成する部分のみシールド板をへこませるような形状が考えられる。シールド板は通常基板の4隅でビス等によって固定され、基板のグランドとシールドも、この部分で導通することができる。また、シールド板と配線は、均等な間隔がより好ましいため、シールド板側から基板に対して、ある程度の力を加え続ける必要がある。そのような場合、シールド板をばね性のある部材とすることで、そのような力を加え続けることが可能である。 Further, the conductive member is not an independent configuration like the upper substrate 40, and can also be used as a shield plate for various substrates. For example, the function of the shield plate and the function of generating the microstrip line can be realized by forming a shape such that a part of the shield plate is in close contact with the portion where the microstrip line (high-speed digital line 30) is to be generated. At that time, as the shape of the shield plate, a shape in which the shield plate is dented only at a portion where the microstrip line is generated can be considered. The shield plate is usually fixed with screws or the like at the four corners of the substrate, and the ground and shield of the substrate can also be conducted at this portion. Further, since the shield plate and the wiring are more preferably equally spaced, it is necessary to continue applying a certain amount of force to the substrate from the shield plate side. In such a case, it is possible to continue to apply such a force by making the shield plate a springy member.
 また、導電性部材は、筺体のシャーシ構造であってもよい。シャーシ構造は、通常グランドに接地されていることから、マイクロスプリット線路の生成用部材として機能できるからである。たとえば、基板をシャーシに固定する際、マイクロスプリットを生成する部分が、シャーシと密着されてもよい。シャーシに固定する側に部品が存在しない場合、比較的簡単にマイクロスプリットを実現することができる。部品が存在する場合には、シャーシの一部に段差をつけることで対応が可能である。 In addition, the conductive member may have a chassis structure. This is because the chassis structure is normally grounded and can function as a member for generating a micro split line. For example, when fixing a board | substrate to a chassis, the part which produces | generates a micro split may be closely_contact | adhered with a chassis. If there are no parts on the side fixed to the chassis, microsplit can be realized relatively easily. When there is a part, it is possible to deal with it by adding a step to a part of the chassis.
10 回路基板
20 下基板
21 紙フェノール基板
22 下基板銅箔
23 下基板レジスト
30 高速デジタル線路
40 上基板
41 紙フェノール基板
42 上基板銅箔
43 上基板レジスト
60 金属板
70、73 ビス孔
71 下基板ビス孔
72 上基板ビス孔
80 ビス
DESCRIPTION OF SYMBOLS 10 Circuit board 20 Lower board 21 Paper phenol board 22 Lower board copper foil 23 Lower board resist 30 High-speed digital line 40 Upper board 41 Paper phenol board 42 Upper board copper foil 43 Upper board resist 60 Metal plate 70, 73 Screw hole 71 Lower board Screw hole 72 Upper substrate screw hole 80 Screw

Claims (13)

  1.  配線ユニットと、導電層を有しグランドに接地された導電性部材と、前記配線ユニット及び前記導電性部材の接地領域を接続する接地接続手段とを備え、
     前記配線ユニットは、
     ベース基材の片方の面上にパターニングされた高速デジタル伝送用の回路配線と、
     前記回路配線の上に形成された絶縁特性を有する誘電層と、
     を有し、
     前記導電性部材は、前記配線ユニットにおける前記回路配線が形成された領域を覆うように、前記誘電層に対向させて固定される
     ことを特徴とする回路基板。
    A wiring unit, a conductive member having a conductive layer and grounded to ground, and a ground connection means for connecting a ground region of the wiring unit and the conductive member,
    The wiring unit is
    Circuit wiring for high-speed digital transmission patterned on one side of the base substrate,
    A dielectric layer having insulating properties formed on the circuit wiring;
    Have
    The circuit board, wherein the conductive member is fixed to face the dielectric layer so as to cover a region where the circuit wiring is formed in the wiring unit.
  2.  前記配線ユニットの前記ベース基材は、紙フェノール樹脂又は紙ポリエチレン樹脂であることを特徴とする請求項1に記載の回路基板。
    The circuit board according to claim 1, wherein the base substrate of the wiring unit is paper phenol resin or paper polyethylene resin.
  3.  前記導電性部材は、紙フェノール樹脂又は紙ポリエチレン樹脂であるベース基材に導電層が形成されている配線基板であることを特徴とする請求項1または2に記載の回路基板。
    The circuit board according to claim 1, wherein the conductive member is a wiring board in which a conductive layer is formed on a base base material made of paper phenol resin or paper polyethylene resin.
  4.  前記導電性部材は、可撓性を有したシート状を呈していることを特徴とする請求項1または2に記載の回路基板。
    The circuit board according to claim 1, wherein the conductive member has a sheet shape having flexibility.
  5.  前記導電性部材は、金属板を有していることを特徴とする請求項1または2に記載の回路基板。
    The circuit board according to claim 1, wherein the conductive member includes a metal plate.
  6.  前記導電性部材は、基板用シールドケースであることを特徴とする請求項1または2に記載の回路基板。
    The circuit board according to claim 1, wherein the conductive member is a board shielding case.
  7.  前記導電性部材は、筺体のシャーシ構造であることを特徴とする請求項1または2に記載の回路基板。
    The circuit board according to claim 1, wherein the conductive member has a chassis structure of a casing.
  8.  前記導電性部材は、前記配線ユニットに、接着手段によって固定されることを特徴とする請求項1から7のいずれかに記載の回路基板。
    The circuit board according to claim 1, wherein the conductive member is fixed to the wiring unit by an adhesive unit.
  9.  前記配線ユニットは、前記配線ユニットの前記ベース基材の前記回路配線が形成された面とは反対の面において、導電層を有していないことを特徴とする請求項1から8のいずれかに記載の回路基板。
    9. The wiring unit according to claim 1, wherein the wiring unit does not have a conductive layer on a surface opposite to the surface on which the circuit wiring of the base substrate of the wiring unit is formed. Circuit board as described.
  10.  前記配線ユニットの前記誘電層の厚さと前記前記導電性部材に形成される誘電層の厚さの合計が、50~300μmの範囲であることを特徴とする請求項1から9のいずれかに記載の回路基板。
    10. The total thickness of the dielectric layer of the wiring unit and the thickness of the dielectric layer formed on the conductive member is in the range of 50 to 300 μm. Circuit board.
  11.  前記接地接続手段は、前記配線ユニットの接地領域と前記導電性部材の前記導電層とを接続する金属の板状体を有していることを特徴とする請求項1から10のいずれかに記載の回路基板。
    The said ground connection means has a metal plate-shaped body which connects the grounding area | region of the said wiring unit, and the said conductive layer of the said electroconductive member, It is any one of Claim 1 to 10 characterized by the above-mentioned. Circuit board.
  12.  前記配線ユニットと前記導電性部材とを、前記回路配線が形成される領域の外側近傍において固定する固定手段を備えることを特徴とする請求項1から11のいずれかに記載の回路基板。
    The circuit board according to claim 1, further comprising a fixing unit that fixes the wiring unit and the conductive member in the vicinity of an outside of a region where the circuit wiring is formed.
  13.  前記固定手段は、前記配線ユニットと前記導電性部材とを、金属の板状体が設けられる領域において固定することを特徴とする請求項12に記載の回路基板。 The circuit board according to claim 12, wherein the fixing means fixes the wiring unit and the conductive member in a region where a metal plate-like body is provided.
PCT/JP2011/001494 2010-03-16 2011-03-15 Circuit board WO2011114704A1 (en)

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