WO2011100906A3 - Method and apparatus for simulating packet delay variation in current network - Google Patents

Abstract

Embodiments of the invention provide a method and an apparatus for simulating Packet Delay Variation (PDV) in a current network. The method includes: a first clock packet including a first time is transmitted, with the period of t, to a slave clock device, so that the slave clock device returns a second clock packet after receiving the first clock packet, wherein the first time is a difference value between the time for transmitting the first clock packet and a first network delay in the current network, the time when the slave clock device receives the first clock packet is a second time, and the time when the slave clock device transmits the second clock packet is a third time; after the second clock packet is received, a fourth time is transmitted to the slave clock device, so that the slave clock device adjusts, according to the first time, the second time, the third time and the fourth time, the slave clock to synchronize with a master clock, wherein the fourth time is a sum of the time when the second clock packet is received and a second network delay in the current network. The embodiments of the invention achieve simulating the PDV procedure in the current network, can perform a PDV test for the current network in a simulation environment, and achieve the feasibility validation for clock algorithms in the current network.