WO2011091850A1 - Correction d'erreur basée sur un remplacement de bits de bourrage par des bits de contrôle de parité supplémentaires - Google Patents

Correction d'erreur basée sur un remplacement de bits de bourrage par des bits de contrôle de parité supplémentaires Download PDF

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Publication number
WO2011091850A1
WO2011091850A1 PCT/EP2010/051036 EP2010051036W WO2011091850A1 WO 2011091850 A1 WO2011091850 A1 WO 2011091850A1 EP 2010051036 W EP2010051036 W EP 2010051036W WO 2011091850 A1 WO2011091850 A1 WO 2011091850A1
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WIPO (PCT)
Prior art keywords
data
frame
recovery data
recovery
padding
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Application number
PCT/EP2010/051036
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English (en)
Inventor
Imed Bouazizi
Lukasz Kondrad
Moncef Gabbouj
Pekka Heikki Talmola
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Nokia Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Application filed by Nokia Corporation filed Critical Nokia Corporation
Priority to PCT/EP2010/051036 priority Critical patent/WO2011091850A1/fr
Publication of WO2011091850A1 publication Critical patent/WO2011091850A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0064—Concatenated codes
    • H04L1/0065—Serial concatenated codes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location

Definitions

  • This specification relates to enabling error correction of data.
  • an apparatus may include a processing module configured to create a first frame having at least a header, a data portion and padding and a coding module configured to generate first recovery data for forward error correction of at least the data portion, to generate second recovery data for forward error correction of at least the data portion, to include the first recovery data in the first frame and to replace at least some of the padding with the second recovery data.
  • the coding module may be configured to generate the first recovery data and the second recovery data to include recovery data for forward error correction of the header and, optionally, the padding. Alternatively, or additionally, the coding module may be configured to generate the second recovery data to include recovery data for forward error correction of the first recovery data.
  • the coding module may be configured to insert into the header an indication that the frame includes both first recovery data and second recovery data.
  • the apparatus may be configured to create a second frame having a second header, a second data portion and second padding and to generate first recovery data for forward error correction of at least the second data portion, to include the first recovery data in the second frame and the apparatus is arranged to forward the first frame and the second frame for transmission in a data stream to one or more receiving apparatuses.
  • the coding module may be configured to insert into the second header an indication that the second frame does not include second recovery data.
  • Such first and second frames may be used to carry scalable data.
  • the data portion of the first frame includes base layer data and the second data portion includes enhancement layer data.
  • the apparatus may include a frame builder configured to map a plurality of frames onto a transmission frame for transmission in the data stream, wherein the plurality of frames is a plurality of first frames or a plurality of second frames.
  • a frame builder may be configured to include an indication of whether the plurality of frames is a plurality of first frames or a plurality of second frames in a header of the
  • a method may include creating a first frame having a header, data portion and padding, generating first recovery data for forward error correction of at least the data portion, generating second recovery data for forward error correction of at least the data portion, including the first recovery data in the first frame and replacing at least some of the padding with the second recovery data.
  • a computer readable medium may be provided, on which is stored computer readable instructions that, when executed by a processing arrangement, causes the performance of such a method.
  • an apparatus may include a receiver configured to receive at least one data stream and a decoder configured to extract a frame from the at least one data stream, to, if the frame includes both first recovery data for forward error correction of at least a data portion of the frame and second recovery data for forward error correction of at least the data portion, replace the second recovery data from the frame with padding and decode at least the data portion using the first recovery data and the second recovery data and to output the decoded data portion.
  • the decoding of at least the data portion may include decoding the padding and/ or other bits of the frame.
  • the decoder may be configured to, if the frame does not include both first recovery data and second recovery data, decode at least the data portion using first recovery data in the frame, and to output the decoded data portion.
  • the decoder may be configured to compile a parity check matrix based on at least part of the first recovery data wherein, if the frame includes both first recovery data and second recovery data, the parity check matrix is further based on at least part of the second recovery data.
  • the decoder may be configured to, if the frame includes both first recovery data and second recovery data, perform a plurality of iterations, where each iteration includes a first decoding using at least part of the first recovery data to decode at least the data portion and the second recovery data, updating at least the data portion, the first recovery data and the second recovery data according to the results of the first decoding, a second decoding using at least part of the second recovery data are used to decode at least the data portion and updating at least the data portion and the second recovery data according to the results of the second decoding.
  • the decoder may be configured to determine whether the frame includes first and second recovery data. For example, the decoder may be configured to extract an indication of whether the frame includes second recovery data from a header of the frame and/ or, if the frame is one of a plurality of frames in a transmission frame received by the receiver, extract an indication of whether the plurality of forward error correction frames includes second recovery data from a header of the transmission frame. The decoder may be configured to, if the frame does not include both first recovery data and second recovery data, replace padding in the frame with one or more predefined padding values prior to decoding at least the data portion using first recovery data in the frame.
  • a communication system may include such an apparatus, arranged to receive the data stream from another apparatus via a network.
  • a method may include receiving at least one data stream, extracting a frame from the at least one data stream, if the frame includes both first recovery data for forward error correction of at least a data portion of the frame and second recovery data for forward error correction of at least the data portion, replacing the second recovery data with padding and decoding at least the data portion using the first recovery data and the second recovery data and outputting at least the decoded data portion.
  • the decoding of at least the data portion may include decoding the padding
  • a computer readable medium may be provided, on which is stored computer readable instructions that, when executed by a processing arrangement, causes the performance of such methods.
  • an apparatus may include a receiver configured to receive at least one data stream and a decoder configured to extract a frame from the at least one data stream, the frame including at least a data portion, recovery data and padding bits, to modify the frame by replacing the values of the padding bits with one or more predefined padding values and to perform error correction for the modified frame using the recovery data.
  • the decoder may be configured to extract the one or more predefined padding values from a header of the frame and/ or, if the frame is one of a plurality of frames in a transmission frame received by the receiver, to extract the one or more predefined padding values from a header of the transmission frame.
  • a method may include receiving at least one data stream, extracting a frame from the at least one data stream, the frame including at least a data portion, recovery data and padding bits, modifying the frame by replacing the values of the padding bits with one or more predefined padding values and performing error correction for the modified frame using the recovery data.
  • a computer readable medium may also be provided on which is stored computer readable instructions that, when executed by a processing arrangement, causes the performance of such a method.
  • Exemplary embodiments describe computer readable code, optionally stored on a non-transitory computer readable medium, which when executed by computer apparatus causes the computer apparatus to perform described methods.
  • Figure 1 is a simplified schematic overview of a communication system in which exemplary embodiments of the invention can be implemented
  • Figure 2 is a schematic view of broadcasting apparatus according to an embodiment of the invention.
  • Figure 3 is a flowchart of a first example of a method that may be performed by the broadcasting apparatus of Figure 2;
  • Figure 4 depicts an example baseband frame generated by a module in the broadcasting apparatus of Figure 2;
  • Figure 5 depicts an example forward error correction frame generated by a module in the broadcasting apparatus of Figure 2;
  • Figure 6 depicts an example parity check matrix used for generation of additional coding in the method of Figure 3
  • Figure 7 depicts the example forward error correction frame of Figure 5 after the insertion of additional parity check bits
  • Figure 8 is a block diagram of an example receiving apparatus for use in the communication system of Figure 1 ;
  • Figure 9 is a flowchart of a first example of a method performed by the receiving apparatus of Figure 8.
  • Figure 10 depicts an example forward error correction frame following modifications during the method of Figure 9;
  • Figure 11 depicts an example of a structure of a parity check matrix created in the method of Figure 9 when additional coding is in use;
  • Figure 12 depicts an example of a parity check matrix that may be created in the method of Figure 9 when additional coding is in use;
  • Figure 13 is a flowchart of a second example of a method that may be performed by the receiving apparatus of Figure 8;
  • Figure 14 is a flowchart of a second example of a method that may be performed by the broadcasting apparatus of Figure 2;
  • Figure 15 depicts an example baseband frame produced in the method of Figure 14;
  • Figure 16 is a flowchart of a third example of a method that may be performed by the receiving apparatus of Figure 8;
  • Figure 17 depicts an example of a structure of an extended parity check matrix that may be created in the method of Figure 16;
  • Figure 18 depicts an example of an extended parity check matrix that may be created in the method of Figure 16;
  • Figure 19 is a flowchart of a fourth example of a method that may be performed by the receiving apparatus of Figure 8;
  • Figure 20 depicts a header of an example baseband frame that may be produced in the method of Figure 3 or Figure 14;
  • Figure 21 depicts an example physical layer frame that may be produced in the method of Figure 3 or Figure 14;
  • Figure 22 is a flowchart of a third example of a method that may be performed by the broadcasting apparatus of Figure 2;
  • Figure 23 depicts an example of a baseband frame that may be produced in the method of Figure 22;
  • Figure 24 depicts an example of a forward error correction frame that may be produced in the method of Figure 22.
  • Figure 25 is a flowchart of a fifth example of a method that may be performed by the receiving apparatus of Figure 8.
  • FIG. 1 shows a simplified schematic overview of parts of a communication system.
  • the system 1 comprises broadcasting apparatus 2, which receives logical data streams 3, 4, such as audio, video or multimedia clips, software or other data files, from one or more content providers 5, 6.
  • the broadcasting apparatus 2 operates on the data streams and then broadcasts or multicasts the resulting sequences of data packets in a stream 7 via one or more intermediary apparatuses 8, such as a television mast, to one or more receiving apparatuses 9.
  • the receiving apparatuses 9 can then reproduce the data streams for consumption by their users.
  • the stream 7 may include multiple data packet streams that may relate to one or more different services.
  • the stream 7 includes scalable content, such as scalable video and/or audio data.
  • the broadcasting apparatus 2 is arranged to produce two or more streams of data packets 7a, 7b carrying different representations of the same content with different scalable qualities.
  • the receiving apparatuses 9 can receive the stream 7 and decode all of the data packets conveying the content or, alternatively, a subset of those packets that is most suitable for a particular application or for its capabilities. For example, if a first receiving apparatus 9 is a handheld device, such as a smartphone, it may have a display having a limited number of pixels.
  • Such a receiving apparatus 9 may, therefore, decode a subset of received data packets that is sufficient to present video content with a relatively low resolution.
  • a second receiving apparatus 9 such as a desktop computer may have a relatively large screen and may decode a larger subset of the received data packets in order to present the same video content with a higher resolution.
  • the first receiving apparatus 9 may decode a subset of the received data packets sufficient to present the video content with a lower frame rate and/ or with a lower quality than the second receiving apparatus 9. Examples of scalable techniques are provided by the H.264/SVC standard, for scalable video coding (SVC), and the G.718 embedded variable bit rate
  • a stream of base layer data, or core layer data is transmitted, which provides a useable subset of the data packets for presenting content.
  • one or more streams of enhancement layer data 7b are transmitted, which can be combined with the base layer data in order to present the same content with a higher perceptual quality.
  • the stream 7 includes base layer data 7a and enhancement layer data 7b.
  • the sequence may include redundant data packets carrying recovery data, such as forward error correction (FEC) data, which can be used by the receiving
  • apparatuses 6 to reconstruct content from data packets that were not successfully received.
  • the embodiments described herein below will be based on FEC.
  • Other embodiments of the invention may implement another error correction technique based on linear block codes in place of FEC.
  • FIG. 2 is a schematic view of a broadcasting apparatus 2 according to an embodiment of the invention that can be used in the system 1.
  • the broadcasting apparatus 2 comprises a digital broadcasting module 10.
  • an input pre-processor 11 may also be provided but need not form part of the digital broadcasting module 10.
  • the input pre-processor 11 may function as a service splitter, a scheduler or a de-multiplexer and splits an incoming service stream 3 into two separate streams 12, 13, carrying base layer data and enhancement layer data respectively.
  • the digital broadcasting module 10 comprises an input processing module 14, a bit interleaving and coding modulation module 15, a frame builder 16 and a modulator 17.
  • the operation of various components of the digital broadcasting module 10 will be described below, with reference to Figure 3.
  • the below methods and apparatuses are discussed within the context of Digital Video Broadcast Second Generation Terrestrial (DVB-T2), the standard for which is described in ETSI EN 302 755 (version 1.1.1 2009-09). It will be appreciated, however, that the applicability of the methods and apparatuses is not limited to DVB-T2.
  • the described methods and apparatuses may be implemented in other types of digital broadcast or multicast system, such as, but not limited to, DVB Next Generation Handheld (DVB-NGH) and non-DVB systems, including systems that have not yet been standardised.
  • DVD-NGH DVB Next Generation Handheld
  • the digital broadcasting module 10 receives one or more logical data streams 12, 13 from the one or more content providers 5, 6, via the input pre-processing module 11, where provided (step s3.1).
  • Each logical data stream 12, 13 may be carried by a respective physical layer pipe (PLP).
  • PLP physical layer pipe
  • PSI program specific information
  • SI service information
  • a PLP is a fully transparent data pipe which generally enables data of a structure with freely selectable, but PLP-specific, physical parameters to be transported.
  • the capacity and also the service robustness may be adjusted according to particular requirements, depending on the type of receiving apparatus 9 and/ or its usage environment.
  • the input processing module 14 processes the incoming data stream 12, 13 from each PLP separately. It divides the input data stream 3, 4 into data portions.
  • the maximum size of the data portions for a BB frame depends whether or not additional coding is to be applied. If additional coding is to be applied (step s3.2), the stream 3, 4 is divided into data portions with a maximum size ⁇ 4 (step s3.3). If additional coding is to be applied (step s3.3), the stream 3, 4 is divided into data portions with a maximum size B (step s3.4).
  • the difference between the maximum sizes A. and B is the number of bits to be used to carry parity check bits generated by the additional coding process.
  • the input processing module 14 generates one or more baseband (BB) frames by combining a BB header with a respective one of the data portions (step s3.5).
  • the size of the BB frames is fixed for data from each PLP but depends on an error correction code rate to be applied to that frame.
  • separate streams of BB frames are produced for base layer and enhancement layer data from the logical data streams 12, 13 respectively.
  • the BB frame 18 includes the BB header 19, data portion 20 and padding bits 21.
  • the padding 21 may consist of bits set to ' ⁇ '.
  • the number of padding bits 21 is set to a number that is equal to, or greater than, a predetermined number m ldpc ext , to be described herein below.
  • the bit interleaving and coding modulation module 15 processes BB frames 18 produced by the input processing module 11 and generates corresponding FEC frames.
  • an outer coding process (step s3.6) is performed on the BB frame 18, generating parity check bits, that is, outer coding bits, and an inner coding process (step s3.7) is performed on the BB frames 18 and outer coding bits, generating further parity check bits, that is, inner coding bits.
  • the outer coding process (step s3.6) may be based on Bose-Chandhuri- Hocquenghem (BCH) FEC codes and the inner coding process (step s3.7) may be based on Low Density Parity Check (LDPC) FEC codes.
  • BCH FEC codes may be Reed Solomon codes. Reed Solomon codes are a subset of BCH FEC codes that are particularly suitable for use in DVB networks.
  • LDPC codes are linear block codes where a k bit message d v ' s, encoded into a n bit codeword c according to: c— dG (1) where G is a k x n generator matrix and the matrix operations are performed over a Galois Field with order of the field 2 (GF(2)).
  • a sparse binary check matrix (parity check matrix) H is defined as a m x n binary matrix, where m— (n-k), satisfying the following condition:
  • a column in H is associated with a bit of the codeword c and each row corresponds to a parity check.
  • a non-zero element in a row means that the corresponding bit contributes to that parity check.
  • a FEC frame is then generated by the bit interleaving and coding modulation module 15 by appending a number m bch of parity check bits generated by the outer coding and a number m ldpc of parity check bits generated by the inner coding to the BB frame 18, to follow the padding 21 (step s3.8) .
  • Figure 5 depicts an example of a FEC frame 22 output by the bit interleaving and coding modulation module 15.
  • the FEC frame 22 includes the BB frame 15, outer coding parity check bits 23 and inner coding parity check bits 24.
  • the FEC frame 22 has a fixed size.
  • the frame size may be 16200 bits for a "short frame” or 64800 bits for a "long frame”.
  • the frame size will depend on the number of outer coding parity check bits, such as BCH FEC codes in this example, and inner coding parity check bits, such as LDPC FEC codes, which, in turn, depend on the LDPC code rate.
  • Examples of numbers of bits in the BB frame 18, that is, the number k bch of information bits on which the outer BCH coding step is performed, and numbers k lpdc of information bits on which the inner LDPC coding step is performed for various LDPC code rates are noted in Table 1 , where the number k bch includes the number of bits in the BB frame 18, that is, the BB header 19, data portion 20 and padding bits 21 , and the number k lpdc includes the number of bits in the BB frame 18 and the m bch BCH parity check bits 23.
  • bit interleaving and coding module 15 determines whether an additional coding process is to be performed (step s3.9), in addition to the outer and inner coding. For example, additional coding may be required where the data portion includes data requiring a low bit error rate.
  • an additional coding process is then performed (step s3.9), in which a number m ldpc ext additional parity check bits are calculated.
  • Codeword bits on which additional coding process is performed include the BB header 19, the data portion 20 and any remaining padding 21 and may, optionally, include the outer and inner coding bits 23, 24.
  • the additional parity check bits are generated using LDPC codes and the padding bits 21, the m hcb outer parity check bits 23 and m ldpc inner parity check bits 24 are disregarded.
  • Figure 6 depicts an example of a parity matrix lpdc ext for the additional coding process (step s3.8).
  • Each row in the graph corresponds to a parity check, to be represented by a respective additional parity check bit.
  • the columns represent codeword bits, that is, the BB header 19, data portion 20, padding 21 and outer and inner coding parity check bits 23, 24 and the additional parity check bits.
  • a dot on the graph indicates a ⁇ ', meaning that the relevant codeword bit contributes to a parity check.
  • the number of padding bits 21 is equal to, or greater than, m ldpc ext .
  • Figure 7 shows the resulting FEC frame 22', which includes the additional parity check bits 25.
  • the original number of padding bits 21 exceeded the number of additional parity check bits 25.
  • the FEC frame 22' includes both additional parity check bits 25 and a reduced number of padding bits 21.
  • bit interleaving and coding modulation module 15 performs a bit interleaving process on the FEC frames 22, 22' (step s3.12) and passes the FEC frames 22, 22' to the frame builder 16.
  • the frame builder 16 performs frame interleaving (step s3.13) and Orthogonal frequency-division multiplexing (OFDM) symbol mapping operations (step s3.14) and maps the FEC frames 22, 22' onto physical layer frames (step s3.15).
  • the physical layer frames are then modulated by the modulator 17 (step s3.16) and forwarded to an intermediary apparatus 8 for onward transmission to the receiving apparatuses 9 (step s3.17).
  • a FEC frame 22 without additional parity check bits and a FEC frame 22' with additional parity check bits 25 can have the same format, in terms of the positions and, optionally, the lengths of the BB header 19, data portion 20, outer coding bits 23 and inner coding bits 24.
  • This can allow a receiving apparatus 9 to receive the FEC frames 22, 22' regardless of whether it can utilise any additional parity check bits 25. If the receiving apparatus 9 is capable of utilising the additional parity check bits 25, then it can extract them. If the receiving apparatus 9 is not capable of utilising the additional parity check bits 25, it disregards them as padding. In this manner, the same stream 7 may be broadcast or multicast to receiving apparatuses 9 having different capabilities, potentially improving backwards compatibility.
  • the use of bits normally used for padding to carry additional parity check bits 25 may allow such additional coding to be utilised as required, on a frame-by- frame basis.
  • the broadcasting apparatus 2 is arranged to produce scalable transmission data with a first stream 7a of FEC frames 22' carry base layer data and a second stream 7b of FEC frames 22 carry enhancement layer data
  • the first and second streams 7a, 7b may have different requirements.
  • a relatively high bit error rate may be tolerable for the enhancement layer data 7b, compared with the base layer data 7a.
  • the base layer data 7a may be provided with additional coding to facilitate its reception with a relatively low bit error rate while the enhancement layer data stream 7b may be provided without additional coding.
  • FIG 8 depicts an example of a receiving apparatus 9 according to an embodiment of the invention, which includes a controller 26, comprising one or more
  • the receiving apparatus 9 also includes an output 31, including one or more of a display, an audio output and a video output, for presenting decoded data to a user.
  • the receiving apparatus 9 may receive one or more radio frequency signals and output one service stream and one signalling stream.
  • a user may select a service to be decoded by the decoder 29 and presented by the output 31, based on
  • the enhancement layer data may be utilised by the receiving apparatus 9.
  • the receiving apparatus 9 may include features relating to other functionality.
  • the receiving apparatus may be a mobile terminal, a telephone handset, a smartphone or any other similar device, in which case other conventional features of telephone handsets, such as a microphone, a second antenna and a transceiver configured to transmit and receive voice data over a telephone network may be included.
  • other features may be included depending on its required functionality.
  • the apparatus may be part of a TV set or a setup-box or any other similar device.
  • the receiver circuitry 28 receives the broadcast stream 7 from the intermediary apparatus 8 via the antenna 30 and forwards it to the decoder 29.
  • the decoder 29 extracts the FEC frames 22, 22' from the stream (step s9.1) and parses the BB header 19 (step s9.2).
  • the decoder 29 determines whether additional coding has been used (step s9.3).
  • the FEC frame 22, 22' may include an indication that it includes additional parity check bits 25 that is used by the decoder 29 to determine whether additional coding has been used.
  • the decoder 29 may determine whether additional coding has been used by determining whether a particular field within the FEC frame 22, 22' includes additional parity check bits 25, with or without padding 21, or whether that field consists wholly of padding 21, for example, by comparing the content of that field with expecting values for the padding 21.
  • the decoder 29 extracts the additional parity check bits 25 (step s9.4) and modifies the FEC frame 22' by appending a further instance of the additional parity check bits 25' to the end of that frame (step s9.5).
  • the field previously used to convey the additional parity check bits 25 then has its padding restored, by overwriting the additional parity check bits 25 in that field with padding values (step s9.6).
  • the original values of the padding bits 25, if known, may be used in the overwriting operation. Alternatively, in the case of soft- decision decoding, the field may be overwritten with high log likelihood ratio (LLR) values corresponding to the original values.
  • LLR log likelihood ratio
  • a concatenated matrix for the inner and additional coding may be created (step s9.7).
  • a concatenated parity check matrix may be created where the inner and additional coding is based on LDPC FEC codes, as described above.
  • such a concatenated matrix 32 may include the parity check matrix Upc 33 for the inner coding, the parity check matrix Upc ext 34 for the additional coding and a matrix 35 with zero values, which are provided so that the concatenated matrix 32 has the following dimensions:
  • FIG. 12 depicts an example of the concatenated matrix 32.
  • Each row in the graph corresponds to a parity check, represented by a respective additional parity check bit.
  • the columns represent the codeword bits, that is, the BB header 19, data portion 20, restored padding 21 ', outer and inner coding parity check bits 23, 24 and the appended additional parity check bits 25'.
  • a dot on the graph indicates a ⁇ '.
  • a standard parity check matrix Upc 33 is created, based on the inner coding bits 34 (step s9.8).
  • the FEC frame 22" is decoded (step s9.9), using the parity check matrix created in step s9.7 or s9.8.
  • Decoding using the outer coding bits 23 is then performed (step s9.10), and the decoded data portion 20 is output (step s9.11) for one or more of further processing, presentation, such as display and/or audio output, and storage, if required.
  • FIG. 13 is a flowchart depicting a second example of a decoding process that may be performed by the receiving apparatus 9. Referring to Figure 13, steps sl3.1 to sl3.6 correspond to steps s9.1 to s9.6 described above. The process of Figure 13 differs from that of Figure 9 by using an iterative decoding method instead of creating and using a parity check matrix 32, 33.
  • an iteration counter i is set to an initial value, such as 0.
  • the inner coding bits 24 are then used to decode the BB header 19, data portion 20, outer and inner coding bits 23, 24 (step sl3.8).
  • the values of the bits of the BB header 19 and the data portion 20 and the outer and inner coding bits 23, 24 are updated to reflect the results of this decoding operation (step sl3.9).
  • the additional parity check bits 25' are then used to decode the BB header 19, data portion 20 and the additional parity check bits 25 (step s 3. 0) .
  • step sl3.13 the outer and inner coding bits 23, 24 and the additional parity check bits 25' are then updated accordingly (step sl3.11).
  • the iteration counter i is then updated (step sl3.12). Steps sl3.8 to sl3.12 are repeated until the iteration counter b reaches a predetermined value i ma chorus corresponding to the required number of iterations (step sl3.13).
  • the FEC frame 22 is decoded using the inner coding bits 24 (step sl3.14).
  • the FEC frames 22, 22" are then decoded using the outer coding bits 23 (step s 13.15) so that the data in the data portion 20 can be output (step s 3. 6) .
  • steps sl3.1 to sl3.16 are repeated for a next FEC frame 22, 22'.
  • FIG 14 is a flowchart of a second example of a method that may be performed by the broadcasting apparatus 2 of Figure 2 in another embodiment of the invention.
  • a data stream 3, 4 is received (step sl4.1), divided into data portions (step sl4.2) as described above in relation to steps s3.1 to s3.2 of Figure 3.
  • a BB frame is then generated by the input processing module 10 comprising a BB header, a data portion and padding (step sl4.3).
  • the BB frame is then forwarded to the bit interleaving and coding module 15.
  • additional coding is required (step sl4.4), that is, coding in addition to the inner and outer coding that is to be applied to the BB frame
  • an additional coding process is performed on the BB header and data portion (step sl4.5) and some or all of the padding bits in the BB frame are replaced with additional parity check bits produced by that process (step si 4.6).
  • the additional coding process may use LDPC FEC codes as described above.
  • Figure 15 depicts an example of a BB frame 36 produced in this manner, comprising a BB header 19, data portion 20, additional parity check bits 25.
  • the BB frame 36 includes residual padding bits 21 that have not been overwritten by the additional parity check bits 25.
  • Outer coding for example using BCH FEC codes, is performed on the BB header 19 and data portion 20 and, optionally, on the additional parity check bits 25 and any residual padding 21.
  • the resulting outer coding bits 23 are appended to the BB frame 36 (step sl4.8).
  • Inner coding for example, using LDPC FEC codes, is performed on the BB header 19 and data portion 20 and, optionally, on the additional parity check bits 25, any residual padding 21 and the outer coding bits.
  • a FEC frame is created by appending the resulting inner coding bits to the outer coding bits and the BB frame 36 (step sl4.9).
  • the FEC frame generated by the bit interleaving and coding module 15 may have the format of the FEC frame 22' shown in Figure 7, with or without padding bits 21. Where additional coding is not used, the FEC frame may have the format of the FEC frame 22 shown in Figure 5.
  • the same reference numerals 22, 22' will be used to refer to the FEC frames produced by the method of Figure 14.
  • the remaining steps sl4.10 to sl4.15 correspond to steps s3.12 to s3.17 described above in relation to Figure 3.
  • Figure 16 shows an example of a method that may be performed by a receiving apparatus 9 to decode FEC frames 22, 22' generated by the method of Figure 14.
  • a FEC frame 22, 22' is extracted from a received stream 7 (step si 6.1) and its header is parsed (step si 6.2).
  • the receiving apparatus 9 determines whether additional coding has been used (step si 6.3), for example, by using one or more of the methods described above in relation to step s9.3 of Figure 9.
  • an extended parity check matrix is created (step si 6.4) by concatenating matrices for the additional coding and inner coding.
  • Figure 17 depicts an example structure of an extended parity check matrix 37 where the inner and additional coding is based on LDPC FEC codes.
  • the concatenated matrix 37 includes the parity check matrix ldpc 33 for the inner coding, the parity check matrix ldpc ext 34 for the additional coding and a matrix of zero values 35 and has the dimensions ⁇ m ldpc + m ldpc ex x ⁇ k ldpc + m ldp .
  • Figure 18 depicts an example of such an extended parity check matrix.
  • step si 6.5 If additional coding has not been used (step si 6.3), a standard parity check matrix l dpc 33 is created (step si 6.5).
  • the FEC frame 22, 22' is then decoded using the created parity check matrix 33, 37 for the inner coding and any additional decoding (step si 6.6) and then outer decoding is performed (step sl 6.7).
  • step si 6.8 The decoded data from the data portion 20 is then output (step si 6.8). If there are one or more further FEC frames 22, 22' to be decoded (step si 6.9), the decoding process (steps sl 6.1 to sl 6.9) is repeated for the next FEC frame 22, 22'.
  • Figure 19 shows an example of an alternative method that can be used by the receiving apparatus 9 to decode FEC frames 22, 22' encoded using the method of Figure 14, beginning with extracting a FEC frame 22, 22' (step sl9.1), parsing the header of the FEC frame 22, 22' (step si 9.2) and determining whether additional coding has been used (step sl9.3).
  • steps sl9.4, sl9.5 The procedure for decoding FEC frames 22 without additional coding (steps sl9.4, sl9.5) is the same as that described above in relation to Figure 13 (steps sl3.14 & sl3.15).
  • an iteration counter i is set to an initial value, such as 0 (step si 9.6).
  • the inner coding bits 24 are then used to decode the BB header 19, the data portion 20 and, optionally, one or more of the outer coding bits 23, the additional parity check bits 25 and the residual padding (step sl9.7) and the values of the decoded bits are updated (step sl9.8).
  • the additional parity check bits 25 are then used to decode the BB header 19 and the data portion 20 (step sl9.9).
  • the bits of the BB header bits 19 and the data portion bits 20 are then updated with their decoded values (step s 9. 0) .
  • the iteration counter i is then increased by one increment (step sl9.11). Steps sl9.7 to si 9.11 are repeated until the iteration counter i reaches a predetermined value i maggi.
  • step sl9.12 corresponding to the required number of iterations
  • Outer decoding is then performed (step s 9.5) .
  • the decoded data of the data portion 20 of the FEC frame 22' can then be output (step sl9.14).
  • step sl9.15 If there are one or more further FEC frames 22, 22' to be decoded (step sl9.15), the decoding process (steps sl9.1 to sl 9.14) is repeated for the next FEC frame.
  • the FEC frames 22, 22' may include an indication of whether additional coding has been used.
  • the determinations made in steps s9.3, sl3.3, sl 6.3 and sl9.3 in the methods of Figures 9, 13, 16 and 19 respectively may be based on such an indication.
  • FIG. 20 depicts an example of a BB header 19, including the fields 38-43 listed in Table 2.
  • the BB header 19 has format compatible with the DVB- T2 standard, so that 5 bytes from the user packet length (UPL), user packet sync- byte (SYNC) and SYNCD (distance in bits from the beginning of a data field to the start of data) fields 39, 41, 42 are reserved, and the first 4 bits 39a of the UPL field 39 are used to convey an indication of the use of additional coding.
  • UPL user packet length
  • SYNC user packet sync- byte
  • SYNCD distance in bits from the beginning of a data field to the start of data
  • the 4 bits may be divided into two fields.
  • the first bit referred to here as
  • Enable may be a single bit having a value that indicates whether additional coding has been used, as shown in Table 3.
  • the other three bits of the indication 38 may be used to indicate the code rate, as shown in Table 4.
  • Table 4 The other three bits of the indication 38 may be used to indicate the code rate, as shown in Table 4.
  • bits of the UPL field 39 or other fields in the BB header 19 may be used in addition, or instead, of the bits 39a in order to convey information about the use the additional coding.
  • Figure 21 depicts an example physical layer frame 44 that may be compatible with a DVB-T2 system.
  • the physical layer frame 44 of Figure 21 includes a header 45, that has pilot symbols in the form of PI symbols 46 and P2 symbols 47, and a payload 48.
  • the payload 48 includes PLP symbols corresponding to one or more FEC frames 22, 22'.
  • the P2 symbols 47 of the frame header 45 include Layer 1 (LI) pre- signalling 49 and LI post- signalling 50.
  • LI Layer 1
  • the LI post-signalling 50 includes five fields 51 -55, as shown in Figure 21.
  • a dynamic signalling field 52 is used to indicate parameters that may change between the physical layer frames 44 in the stream 7 and includes bits 52a indicating whether or not additional coding has been used.
  • the format of the dynamic signalling field 52 in this example is shown in Table 5. Table 5
  • the first four RESERVED_2 bits 52a are used to convey information about a coding level in the FEC frames 22, 22'.
  • the first of the four bits 52a is used to indicate whether additional coding has been used, in the same manner as shown in Table 3 above.
  • the other three bits are used to indicate a coding rate, in the same manner as shown in Table 4 above.
  • other bits of the RESERVED_2 field or other fields in the dynamic signalling field 52 may be used in addition, or instead, of the bits 52a in order to convey information about the use the additional coding.
  • the frame builder 16 of the broadcasting apparatus 2 is configured to map only FEC frames 22, 22' having the same level of coding on the physical layer frame 44.
  • the payload 48 of the physical layer frame 44 does not include both FEC frames 22 that do not have any additional parity check bits and FEC frames 22' including additional parity check bits 25.
  • Figure 22 depicts a third example of a method that may be performed by the broadcasting apparatus 2 in order to generate FEC frames according to yet another embodiment of the invention.
  • a data stream 3, 4 is received by the broadcasting apparatus 2 (step s22.1) and divided into data portions (step s22.2).
  • the input processing module 14 generates at least one BB frame (step s22.3). As shown in Figure 23, such a BB frame 56, includes a BB header 57, a data portion 58 and padding bits 59.
  • the data portion 58 may be smaller in length than a corresponding data portion in a standard BB frame, for example, a DVB-T2 frame.
  • the number of padding bits 59 may be greater than the number of padding bits in such a standard frame.
  • the BB header 57 may include one or more fields 57a containing an indication of the size of the data portion so that the number of padding bits can be determined by a receiving apparatus 9 and/or one or more values of the padding bits 59.
  • the padding bits 59 may be set to a predefined value that may be known to the receiving apparatuses 9.
  • Outer coding and inner coding are performed by the bit interleaving and coding module 15 and a FEC frame is generated (step s22.6).
  • the FEC frame 60 includes the BB header 57, data portion 58, padding 59, outer coding bits 61 and inner coding bits 62, as described above in relation to steps s3.6, s3.7 and s3.8 of Figure 3.
  • Bit interleaving (step s22.7) and frame interleaving (step s22.8) are performed on the FEC frame 60 by the bit interleaving and coding module 15 and the frame builder 16 respectively.
  • the frame builder 16 then performs OFDM symbol mapping (step s22.9) and maps the FEC frame 60 onto a physical layer frame 44 (step s22.10).
  • the physical layer frame 44 is then modulated (step s22.11) by the modulator 17 and forwarded for onward transmission (step s22.12).
  • FIG 25 is a flowchart of an example method that may be performed by a receiving apparatus 9 to receive frames 60 generated by the method of Figure 22.
  • a FEC frame 60 is extracted from a received stream 7 (step s25.1) and its header is parsed (step s25.2) by the decoder 29.
  • the decoder 29 reinstates the padding bits 59 in the FEC frame 60 (step s25.3), by overwriting the received padding bits 59 with the one or more padding values.
  • the one or more padding values may be indicated in a field 59a of the BB header 59 or values that are otherwise known to the receiving apparatus 9. Such replacement of potentially incorrect padding values with correct values decreases the effective bit error rate of the received FEC frame 60.
  • Data recovery is performed by the decoder 29 using the inner and outer parity check bits 61, 62 (steps s25.4 and s25.5 respectively) and the decoded data from the data portion 58 is output (step s25.6).
  • step s25.7 If there is at least one further FEC frame 60 to be decoded (step s25.7), the process (steps s25.1 to s25.6) is repeated for the next FEC frame 60.
  • the reinstatement of the padding values in step s25.3 may reduce the effective bit error rate for the received FEC frame 60.
  • the method of Figure 25 may permit the correction of errors in data received with a relatively low signal-to- noise ratio, without requiring the inclusion of additional parity check bits.
  • a receiving apparatus 9 may be configured to decode FEC frames 22 using the method of Figure 25 and to decode FEC frames 22' having additional parity check bits 25 using an extended parity check matrix or iterative decoding.
  • any of steps s9.8 in Figure 9, step sl3.14 in Figure 13, step si 6.5 in Figure 16 or step sl9.4 in Figure 19 may be preceded by a step in which the padding 21 is replaced by one or more predefined padding values.
  • Each of the broadcast apparatus 2 and the receiver apparatus 8 described above may be comprised of hardware, such as one or more processors or microprocessors operating under the control of computer programs, optionally stored on one or more memories, such as the memory facility 27 of the receiving apparatus 9 or a similar memory facility 2a in the broadcasting apparatus 2.
  • the digital processing module 10 of the broadcasting apparatus 2 may be implemented by an arrangement of one or more processors running software or by hardware or by a combination of hardware with a processing arrangement executing one or more computer programs.
  • NGH Network Handheld
  • IP Internet Protocol
  • GSE Generic Stream Encapsulation

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Error Detection And Correction (AREA)

Abstract

L'invention porte sur un appareil (2) conçu pour créer une trame (22') à transmettre dans un flux de données (7) par inclusion de premières données de récupération (23, 24), destinées à être utilisées dans une correction d'erreur sans voie de retour, dans la trame (22') et remplacement de certains ou de la totalité des bits de bourrage (21) dans la trame (22') par des secondes données de récupération (25) qui fournissent davantage de données pour une correction d'erreur sans voie de retour. Le flux peut comprendre des trames (22, 22') avec et sans secondes données de récupération, par exemple, afin d'acheminer un contenu multimédia hiérarchique sous la forme de données de couche de base et de données de couche d'amélioration respectivement. L'appareil (2) peut être conçu pour créer une trame (60) avec des premières données de récupération (61, 62), qui peut comprendre un nombre relativement élevé de bits de bourrage (59). Un appareil récepteur (9) peut ensuite remplacer les bits de bourrage (59) dans une trame reçue (60) par des valeurs de bourrage prédéfinies, afin de réduire le taux d'erreur sur les bits effectif, avant de réaliser une correction d'erreur, par exemple, lors du décodage d'une trame (22) sans codage supplémentaire.
PCT/EP2010/051036 2010-01-28 2010-01-28 Correction d'erreur basée sur un remplacement de bits de bourrage par des bits de contrôle de parité supplémentaires WO2011091850A1 (fr)

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