WO2011078516A2 - Production method for a back-surface-field type of heterojunction solar cell - Google Patents
Production method for a back-surface-field type of heterojunction solar cell Download PDFInfo
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- WO2011078516A2 WO2011078516A2 PCT/KR2010/009048 KR2010009048W WO2011078516A2 WO 2011078516 A2 WO2011078516 A2 WO 2011078516A2 KR 2010009048 W KR2010009048 W KR 2010009048W WO 2011078516 A2 WO2011078516 A2 WO 2011078516A2
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 229910021419 crystalline silicon Inorganic materials 0.000 claims abstract description 4
- 239000012535 impurity Substances 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 21
- 150000002500 ions Chemical class 0.000 claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 239000006193 liquid solution Substances 0.000 claims description 4
- 238000007650 screen-printing Methods 0.000 claims description 3
- 238000006243 chemical reaction Methods 0.000 abstract description 7
- 230000015572 biosynthetic process Effects 0.000 abstract 1
- 230000000873 masking effect Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 description 11
- 238000010438 heat treatment Methods 0.000 description 3
- 230000006798 recombination Effects 0.000 description 3
- 238000005215 recombination Methods 0.000 description 3
- 239000000969 carrier Substances 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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Definitions
- the present invention relates to a method for manufacturing a back-field heterojunction solar cell, and more specifically, no mask operation is required in forming the n-doping region and the p-doping region of the back surface, and the heterojunction solar cell and the back-field type
- the present invention relates to a method of manufacturing a back field type heterojunction solar cell that can maximize photoelectric conversion efficiency of a solar cell by integrating a solar cell.
- a solar cell is a key element of photovoltaic power generation that converts sunlight directly into electricity, and is basically a diode composed of a p-n junction.
- photovoltaic power is generated between the pn junctions, and when a load or a system is connected to both ends of the solar cell, current flows to generate power.
- a general solar cell has a structure in which a front electrode and a rear electrode are provided at the front and the rear, respectively.
- the front electrode is provided on the front surface of the light receiving surface, the light receiving area is reduced by the area of the front electrode.
- a rear field type solar cell has been proposed.
- the back-field solar cell is characterized by maximizing the light receiving area of the solar cell by providing a (+) electrode and a (-) electrode on the back of the solar cell.
- the solar cell may be referred to as a diode consisting of a p-n junction, which consists of a junction structure of a p-type semiconductor layer and an n-type semiconductor layer.
- p-type impurity ions are implanted into a p-type substrate to form a p-type semiconductor layer (or vice versa) to implement a p-n junction.
- a semiconductor layer in which impurity ions are inevitably required is required.
- the charge generated by the photoelectric conversion is collected and recombined at interstitial sites or substitutional sites existing in the semiconductor layer of the solar cell during movement, which is caused by the photovoltaic of the solar cell. Adversely affect the conversion efficiency.
- a so-called hetero-junction solar cell having an intrinsic layer between the p-type semiconductor layer and the n-type semiconductor layer has been proposed. The recombination rate can be lowered.
- An object of the present invention is to provide a method for manufacturing a back field heterojunction solar cell that can maximize the photoelectric conversion efficiency of the solar cell by combining the heterojunction solar cell and the back field solar cell.
- Another object of the present invention is to provide a method of manufacturing a back field-type heterojunction solar cell, in which an n-doped region and a p-doped region are formed on the back surface, which does not require a separate mask operation.
- a method of manufacturing a backside field-type heterojunction solar cell comprising: preparing a crystalline silicon substrate of a first conductivity type; And alternatingly forming conductive junction regions.
- the forming of the junction region of the first conductivity type or the junction region of the second conductivity type may include forming the junction region of the first conductivity type or the second conductivity type on the back surface of the substrate corresponding to the junction region of the first conductivity type or the second conductivity type.
- Forming a first conductive type or second conductive type impurity layer by applying a liquid solution containing a conductive type impurity through a screen printing method, and heat treating the substrate to form the first conductive type or the second conductive type And diffusing the impurity ions in the impurity layer into the back surface of the substrate to form a junction region of the first conductivity type or a junction region of the second conductivity type.
- junction region of the first conductivity type and the junction region of the second conductivity type sequentially stacking an intrinsic layer and an amorphous silicon layer of the first conductivity type on the entire surface of the substrate; Forming an antireflection film on the amorphous silicon layer of the type and forming a first conductive electrode and a second conductive electrode on the junction region of the first conductivity type and the junction region of the second conductivity type, respectively. It may include.
- the manufacturing method of the back-field heterojunction solar cell according to the present invention has the following effects.
- the p junction region and the n junction region are formed through heat treatment after application of the p-type and n-type impurity layers, a separate mask operation is not required, thereby simplifying the process.
- both the (+) electrode and the (-) electrode are provided on the rear surface of the solar cell, the light receiving area can be maximized, and the intrinsic layer which is not implanted with impurity ions is provided, thereby minimizing the recombination rate of the carriers. It is possible to improve the photoelectric conversion efficiency of the battery.
- FIG. 1 is a flow chart illustrating a method for manufacturing a back-field heterojunction solar cell according to an embodiment of the present invention.
- FIGS. 2A to 2E are cross-sectional views illustrating a method of manufacturing a backside field heterojunction solar cell according to an embodiment of the present invention.
- FIG. 1 is a flowchart illustrating a method of manufacturing a backside field heterojunction solar cell according to an embodiment of the present invention
- FIGS. 2A to 2E are views illustrating a method of manufacturing a backside field heterojunction solar cell according to an embodiment of the present invention. Process sectional drawing for demonstrating this.
- a crystalline silicon substrate 201 of a first conductivity type for example, an n-type
- a texturing process is performed such that the unevenness 202 is formed on the surface of the substrate 201 (S101).
- the texturing process is for maximizing light absorption, and may be performed using a dry etching method such as wet etching or reactive ion etching.
- a process of forming the p junction region 204 and the n junction region 206 is performed.
- the process of forming the p junction region 204 and the process of forming the n junction region 206 are independently performed sequentially, and the order is irrelevant.
- the p junction region 204 and the n junction region 206 proceed without a separate mask operation.
- a liquid solution containing p-type impurities is screened on the rear surface of the substrate 201 at the region where the p junction region 204 is to be formed. It is applied through a printing method to form a p-type impurity layer 203 (S102). Then, the substrate 201 is heat-treated to diffuse the p-type impurity ions in the p-type impurity layer 203 into the substrate to form the p junction region 204. At this time, the p-type impurity ions diffuse into the substrate 201 and are rearranged and activated by the heat treatment. Next, the p-type impurity layer 203 remaining on the back surface of the substrate 201 is removed.
- n-type impurities are included on the rear surface of the substrate 201 where the n junction region 206 is to be formed.
- the liquid solution is applied through a screen printing method to form an n-type impurity layer 205.
- the substrate 201 is heat-treated to diffuse the p-type impurity ions in the n-type impurity layer 205 into the substrate to form an n junction region 206 (S103).
- S103 n junction region 206
- an intrinsic layer 207 of amorphous silicon material in which impurity ions are not implanted on the entire surface of the substrate 201 as shown in FIG. 2D Laminate the intrinsic layer.
- the intrinsic layer 207 may be formed using plasma enhanced chemical vapor deposition (PECVD).
- an n-type amorphous semiconductor layer 208 (n + a-Si: H) is formed on the intrinsic layer 207.
- the n-type amorphous semiconductor layer 208 may be formed by implanting n-type impurity ions when forming an amorphous silicon layer.
- an anti-reflection film 209 of silicon nitride film material is formed on the n-type amorphous semiconductor layer 208 (S104).
- a buffer layer of silicon oxide may be formed on the n-type amorphous silicon layer before the anti-reflection film 209 is formed. have.
- the p junction region and the n junction region are formed through heat treatment after application of the p-type and n-type impurity layers, a separate mask operation is not required, thereby simplifying the process.
- both the (+) electrode and the (-) electrode are provided on the rear surface of the solar cell, the light receiving area can be maximized, and the intrinsic layer which is not implanted with impurity ions is provided, thereby minimizing the recombination rate of the carriers. It is possible to improve the photoelectric conversion efficiency of the battery.
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Abstract
The present invention relates to a production method for a back-surface-field type of heterojunction solar cell wherein the photoelectric conversion efficiency of solar cells can be maximised by the grafting of a heterojunction type of solar cell and a back-surface-field type of solar cell without any requirement for separate masking work in the formation of a back-surface n-doping region and p-doping region. The production method for a back-surface-field type of heterojunction solar cell according to the present invention comprises the steps of: preparing a crystalline silicon substrate of a first conductivity type; and forming a junction region of the first conductivity type and a junction region of a second conductivity type, disposed alternately inside the back surface of the substrate.
Description
본 발명은 후면전계형 이종접합 태양전지의 제조방법에 관한 것으로서, 보다 상세하게는 후면의 n 도핑영역과 p 도핑영역을 형성함에 있어서 별도의 마스크 작업이 요구되지 않으며, 이종접합형 태양전지와 후면전계형 태양전지를 접목시켜 태양전지의 광전변환효율을 극대화시킬 수 있는 후면전계형 이종접합 태양전지의 제조방법에 관한 것이다.The present invention relates to a method for manufacturing a back-field heterojunction solar cell, and more specifically, no mask operation is required in forming the n-doping region and the p-doping region of the back surface, and the heterojunction solar cell and the back-field type The present invention relates to a method of manufacturing a back field type heterojunction solar cell that can maximize photoelectric conversion efficiency of a solar cell by integrating a solar cell.
태양전지는 태양광을 직접 전기로 변환시키는 태양광 발전의 핵심소자로서, 기본적으로 p-n 접합으로 이루어진 다이오드(diode)라 할 수 있다. 태양광이 태양전지에 의해 전기로 변환되는 과정을 살펴보면, 태양전지의 p-n 접합부에 태양광이 입사되면 전자-정공 쌍이 생성되고, 전기장에 의해 전자는 n층으로, 정공은 p층으로 이동하게 되어 p-n 접합부 사이에 광기전력이 발생되며, 태양전지의 양단에 부하나 시스템을 연결하면 전류가 흐르게 되어 전력을 생산할 수 있게 된다. A solar cell is a key element of photovoltaic power generation that converts sunlight directly into electricity, and is basically a diode composed of a p-n junction. In the process of converting sunlight into electricity by solar cells, when solar light is incident on the pn junction of solar cells, electron-hole pairs are generated, and electrons move to n layers and holes move to p layers by the electric field. Photovoltaic power is generated between the pn junctions, and when a load or a system is connected to both ends of the solar cell, current flows to generate power.
일반적인 태양전지는 전면과 후면에 각각 전면전극과 후면전극이 구비되는 구조를 갖는다. 수광면인 전면에 전면전극이 구비됨에 따라, 전면전극의 면적만큼 수광면적이 줄어들게 된다. 이와 같은 수광면적이 축소되는 문제를 해결하기 위해 후면전계형 태양전지가 제안되었다. 후면전계형 태양전지는 태양전지의 후면 상에 (+)전극과 (-)전극을 구비시켜 태양전지 전면의 수광면적을 극대화하는 것을 특징으로 한다. A general solar cell has a structure in which a front electrode and a rear electrode are provided at the front and the rear, respectively. As the front electrode is provided on the front surface of the light receiving surface, the light receiving area is reduced by the area of the front electrode. In order to solve such a problem that the light receiving area is reduced, a rear field type solar cell has been proposed. The back-field solar cell is characterized by maximizing the light receiving area of the solar cell by providing a (+) electrode and a (-) electrode on the back of the solar cell.
한편, 전술한 바와 같이 태양전지는 p-n 접합으로 이루어진 다이오드라 할 수 있는데, 이는 p형 반도체층과 n형 반도체층의 접합 구조로 이루어진다. 통상, p형 기판에 p형 불순물 이온을 주입하여 p형 반도체층을 형성하여(또는 그 반대) p-n 접합을 구현한다. 이와 같이, 태양전지의 p-n 접합을 구성하기 위해서는 필연적으로 불순물 이온이 주입된 반도체층이 요구된다. On the other hand, as described above, the solar cell may be referred to as a diode consisting of a p-n junction, which consists of a junction structure of a p-type semiconductor layer and an n-type semiconductor layer. Usually, p-type impurity ions are implanted into a p-type substrate to form a p-type semiconductor layer (or vice versa) to implement a p-n junction. As such, in order to form a p-n junction of a solar cell, a semiconductor layer in which impurity ions are inevitably required is required.
그러나, 광전변환에 의해 생성된 전하가 이동 중에 태양전지의 반도체층에 존재하는 침입형 사이트(interstitial sites) 또는 대체형 사이트(substitutional sites)에 포집되어 재결합되는 경우가 발생하며, 이는 태양전지의 광전변환효율에 악영향을 끼친다. 이와 같은 문제를 해결하기 위해, p형 반도체층과 n형 반도체층 사이에 진성층(intrinsic layer)을 구비시키는 이른바, 이종접합형(hetero-junction) 태양전지가 제시되었으며 이를 통해 캐리어(carrier)의 재결합률을 저하시킬 수 있다. However, the charge generated by the photoelectric conversion is collected and recombined at interstitial sites or substitutional sites existing in the semiconductor layer of the solar cell during movement, which is caused by the photovoltaic of the solar cell. Adversely affect the conversion efficiency. In order to solve this problem, a so-called hetero-junction solar cell having an intrinsic layer between the p-type semiconductor layer and the n-type semiconductor layer has been proposed. The recombination rate can be lowered.
본 발명은 이종접합형 태양전지와 후면전계형 태양전지를 접목시켜 태양전지의 광전변환효율을 극대화시킬 수 있는 후면전계형 이종접합 태양전지의 제조방법을 제공하는데 그 목적이 있다. An object of the present invention is to provide a method for manufacturing a back field heterojunction solar cell that can maximize the photoelectric conversion efficiency of the solar cell by combining the heterojunction solar cell and the back field solar cell.
또한, 후면의 n 도핑영역과 p 도핑영역을 형성함에 있어서, 별도의 마스크 작업이 요구되지 않는 후면전계형 이종접합 태양전지의 제조방법을 제공하는데 본 발명의 다른 목적이 있다. Another object of the present invention is to provide a method of manufacturing a back field-type heterojunction solar cell, in which an n-doped region and a p-doped region are formed on the back surface, which does not require a separate mask operation.
상기의 목적을 달성하기 위한 본 발명에 따른 후면전계형 이종접합 태양전지의 제조방법은 제 1 도전형의 결정질 실리콘 기판을 준비하는 단계 및 상기 기판의 후면 내부에 제 1 도전형의 접합영역과 제 2 도전형의 접합영역을 교번하여 배치되도록 형성하는 단계를 포함하여 이루어진다. According to an aspect of the present invention, there is provided a method of manufacturing a backside field-type heterojunction solar cell according to the present invention, the method comprising: preparing a crystalline silicon substrate of a first conductivity type; And alternatingly forming conductive junction regions.
또한, 상기 제 1 도전형의 접합영역 또는 제 2 도전형의 접합영역을 형성하는 단계는, 제 1 도전형 또는 제 2 도전형의 접합영역에 상응하는 기판 후면 상에 제 1 도전형 또는 제 2 도전형의 불순물을 포함하는 액상의 용액을 스크린프린팅 방법을 통해 도포하여 제 1 도전형 또는 제 2 도전형 불순물층을 형성하는 과정과, 상기 기판을 열처리하여 상기 제 1 도전형 또는 제 2 도전형 불순물층 내의 불순물 이온을 기판 후면 내부로 확산하여 제 1 도전형의 접합영역 또는 제 2 도전형의 접합영역을 형성하는 과정을 포함하여 구성되는 것을 특징으로 한다. The forming of the junction region of the first conductivity type or the junction region of the second conductivity type may include forming the junction region of the first conductivity type or the second conductivity type on the back surface of the substrate corresponding to the junction region of the first conductivity type or the second conductivity type. Forming a first conductive type or second conductive type impurity layer by applying a liquid solution containing a conductive type impurity through a screen printing method, and heat treating the substrate to form the first conductive type or the second conductive type And diffusing the impurity ions in the impurity layer into the back surface of the substrate to form a junction region of the first conductivity type or a junction region of the second conductivity type.
제 1 도전형의 접합영역과 제 2 도전형의 접합영역을 형성하는 단계 이후에, 상기 기판 전면 상에 진성층과 제 1 도전형의 비정질 실리콘층을 순차적으로 적층하는 단계와, 상기 제 1 도전형의 비정질 실리콘층 상에 반사방지막을 형성하는 단계 및 상기 제 1 도전형의 접합영역과 제 2 도전형의 접합영역 상에 각각 제 1 도전형 전극과 제 2 도전형 전극을 형성하는 단계를 더 포함할 수 있다.After forming the junction region of the first conductivity type and the junction region of the second conductivity type, sequentially stacking an intrinsic layer and an amorphous silicon layer of the first conductivity type on the entire surface of the substrate; Forming an antireflection film on the amorphous silicon layer of the type and forming a first conductive electrode and a second conductive electrode on the junction region of the first conductivity type and the junction region of the second conductivity type, respectively. It may include.
본 발명에 따른 후면전계형 이종접합 태양전지의 제조방법은 다음과 같은 효과가 있다. The manufacturing method of the back-field heterojunction solar cell according to the present invention has the following effects.
p형 및 n형 불순물층의 도포 후 열처리를 통해 p 접합영역과 n 접합영역을 형성함에 따라, 별도의 마스크 작업이 요구되지 않아 공정을 단순화시킬 수 있게 된다. As the p junction region and the n junction region are formed through heat treatment after application of the p-type and n-type impurity layers, a separate mask operation is not required, thereby simplifying the process.
또한, 태양전지의 후면 상에 (+) 전극과 (-) 전극이 모두 구비됨에 따라 수광면적을 극대화할 수 있으며, 불순물 이온이 주입되지 않은 진성층이 구비됨으로 인해 캐리어의 재결합률을 최소화하여 태양전지의 광전변환효율을 향상시킬 수 있게 된다. In addition, since both the (+) electrode and the (-) electrode are provided on the rear surface of the solar cell, the light receiving area can be maximized, and the intrinsic layer which is not implanted with impurity ions is provided, thereby minimizing the recombination rate of the carriers. It is possible to improve the photoelectric conversion efficiency of the battery.
도 1은 본 발명의 일 실시예에 따른 후면전계형 이종접합 태양전지의 제조방법을 설명하기 위한 순서도.1 is a flow chart illustrating a method for manufacturing a back-field heterojunction solar cell according to an embodiment of the present invention.
도 2a 내지 도 2e는 본 발명의 일 실시예에 따른 후면전계형 이종접합 태양전지의 제조방법을 설명하기 위한 공정 단면도. 2A to 2E are cross-sectional views illustrating a method of manufacturing a backside field heterojunction solar cell according to an embodiment of the present invention.
이하, 도면을 참조하여 본 발명의 일 실시예에 따른 후면전계형 이종접합 태양전지의 제조방법을 설명하기로 한다. 도 1은 본 발명의 일 실시예에 따른 후면전계형 이종접합 태양전지의 제조방법을 설명하기 위한 순서도이고, 도 2a 내지 도 2e는 본 발명의 일 실시예에 따른 후면전계형 이종접합 태양전지의 제조방법을 설명하기 위한 공정 단면도이다. Hereinafter, a method of manufacturing a backside field type heterojunction solar cell according to an embodiment of the present invention will be described with reference to the drawings. 1 is a flowchart illustrating a method of manufacturing a backside field heterojunction solar cell according to an embodiment of the present invention, and FIGS. 2A to 2E are views illustrating a method of manufacturing a backside field heterojunction solar cell according to an embodiment of the present invention. Process sectional drawing for demonstrating this.
도 1 및 도 2a에 도시한 바와 같이 제 1 도전형 예를 들어, n형의 결정질 실리콘 기판(201)을 준비한다. 그런 다음, 상기 기판(201)의 표면에 요철(202)이 형성되도록 텍스쳐링(texturing) 공정을 진행한다(S101). 상기 텍스쳐링 공정은 광흡수를 극대화하기 위한 것이며, 습식 식각 또는 반응성 이온 식각(reactive ion etching) 등의 건식 식각 방법을 이용하여 진행할 수 있다.As shown in Figs. 1 and 2A, a crystalline silicon substrate 201 of a first conductivity type, for example, an n-type, is prepared. Then, a texturing process is performed such that the unevenness 202 is formed on the surface of the substrate 201 (S101). The texturing process is for maximizing light absorption, and may be performed using a dry etching method such as wet etching or reactive ion etching.
이어, p 접합영역(204) 및 n 접합영역(206) 형성공정을 진행한다. 상기 p 접합영역(204) 형성공정과 n 접합영역(206) 형성공정은 독립적으로 순차적으로 진행되며, 그 순서는 무관하다. 또한, 상기 p 접합영역(204) 및 n 접합영역(206)은 별도의 마스크 작업 없이 진행된다. Subsequently, a process of forming the p junction region 204 and the n junction region 206 is performed. The process of forming the p junction region 204 and the process of forming the n junction region 206 are independently performed sequentially, and the order is irrelevant. In addition, the p junction region 204 and the n junction region 206 proceed without a separate mask operation.
p 접합영역(204) 형성공정을 먼저 진행하는 경우, 도 2b에 도시한 바와 같이 p 접합영역(204)이 형성될 부위의 기판(201) 후면 상에 p형 불순물을 포함하는 액상의 용액을 스크린프린팅 방법을 통해 도포하여 p형 불순물층(203)을 형성한다(S102). 그런 다음, 기판(201)을 열처리하여 상기 p형 불순물층(203) 내의 p형 불순물 이온을 기판 내부로 확산시켜 p 접합영역(204)을 형성한다. 이 때, 상기 열처리에 의해 p형 불순물 이온이 기판(201) 내부로 확산됨과 함께 재배열되어 활성화된다. 이어, 기판(201) 후면 상에 잔존하는 p형 불순물층(203)을 제거한다. When the process of forming the p junction region 204 is performed first, as shown in FIG. 2b, a liquid solution containing p-type impurities is screened on the rear surface of the substrate 201 at the region where the p junction region 204 is to be formed. It is applied through a printing method to form a p-type impurity layer 203 (S102). Then, the substrate 201 is heat-treated to diffuse the p-type impurity ions in the p-type impurity layer 203 into the substrate to form the p junction region 204. At this time, the p-type impurity ions diffuse into the substrate 201 and are rearranged and activated by the heat treatment. Next, the p-type impurity layer 203 remaining on the back surface of the substrate 201 is removed.
상기 기판(201) 후면 내부에 p 접합영역(204)이 형성된 상태에서, 도 2c에 도시한 바와 같이 n 접합영역(206)이 형성될 부위의 기판(201) 후면 상에 n형 불순물을 포함하는 액상의 용액을 스크린프린팅 방법을 통해 도포하여 n형 불순물층(205)을 형성한다. 그런 다음, 기판(201)을 열처리하여 상기 n형 불순물층(205) 내의 p형 불순물 이온을 기판 내부로 확산시켜 n 접합영역(206)을 형성한다(S103). 이에 따라, p 접합영역(204)과 n 접합영역(206)이 교번, 배치되는 형태로 형성된다. In the state where the p junction region 204 is formed inside the rear surface of the substrate 201, as shown in FIG. 2C, n-type impurities are included on the rear surface of the substrate 201 where the n junction region 206 is to be formed. The liquid solution is applied through a screen printing method to form an n-type impurity layer 205. Then, the substrate 201 is heat-treated to diffuse the p-type impurity ions in the n-type impurity layer 205 into the substrate to form an n junction region 206 (S103). As a result, the p junction region 204 and the n junction region 206 are formed to be alternately arranged.
상기 p 접합영역(204) 및 n 접합영역(206)이 형성된 상태에서, 도 2d에 도시한 바와 같이 상기 기판(201) 전면 상에 불순물 이온이 주입되지 않은 비정질 실리콘 재질의 진성층(207)(intrinsic layer)을 적층한다. 상기 진성층(207)은 플라즈마 강화 화학기상증착법(PECVD, plasma enhanced chemical vapor deposition) 등을 이용하여 형성할 수 있다. In the state where the p junction region 204 and the n junction region 206 are formed, an intrinsic layer 207 of amorphous silicon material in which impurity ions are not implanted on the entire surface of the substrate 201 as shown in FIG. 2D ( Laminate the intrinsic layer. The intrinsic layer 207 may be formed using plasma enhanced chemical vapor deposition (PECVD).
그런 다음, 상기 진성층(207) 상에 n형 비정질 반도체층(208)(n+ a-Si:H)을 형성한다. 상기 n형 비정질 반도체층(208)은 비정질 실리콘층의 형성시 n형 불순물 이온을 주입하여 형성할 수 있다. 이와 같은 상태에서, 상기 n형 비정질 반도체층(208) 상에 실리콘 질화막 재질의 반사방지막(209)을 형성한다(S104). 이 때, 상기 반사방지막(209)과 n형 비정질 반도체층(208) 사이의 응력을 완화시키기 위해 상기 반사방지막(209) 형성 전에 실리콘 산화막 재질의 버퍼층을 상기 n형 비정질 실리콘층 상에 형성할 수도 있다. Then, an n-type amorphous semiconductor layer 208 (n + a-Si: H) is formed on the intrinsic layer 207. The n-type amorphous semiconductor layer 208 may be formed by implanting n-type impurity ions when forming an amorphous silicon layer. In this state, an anti-reflection film 209 of silicon nitride film material is formed on the n-type amorphous semiconductor layer 208 (S104). In this case, in order to relieve stress between the antireflection film 209 and the n-type amorphous semiconductor layer 208, a buffer layer of silicon oxide may be formed on the n-type amorphous silicon layer before the anti-reflection film 209 is formed. have.
이어, 도 2e에 도시한 바와 같이 상기 p 접합영역(204)과 n 접합영역(206) 상에 각각 p 전극(210)과 n 전극(211)을 형성하면(S105) 본 발명의 일 실시예에 따른 후면전계형 이종접합 태양전지의 제조방법은 완료된다. Subsequently, as shown in FIG. 2E, when the p electrode 210 and the n electrode 211 are formed on the p junction region 204 and the n junction region 206 (S105), according to an embodiment of the present invention. The manufacturing method of the back-field heterojunction solar cell according to this is completed.
p형 및 n형 불순물층의 도포 후 열처리를 통해 p 접합영역과 n 접합영역을 형성함에 따라, 별도의 마스크 작업이 요구되지 않아 공정을 단순화시킬 수 있게 된다. As the p junction region and the n junction region are formed through heat treatment after application of the p-type and n-type impurity layers, a separate mask operation is not required, thereby simplifying the process.
또한, 태양전지의 후면 상에 (+) 전극과 (-) 전극이 모두 구비됨에 따라 수광면적을 극대화할 수 있으며, 불순물 이온이 주입되지 않은 진성층이 구비됨으로 인해 캐리어의 재결합률을 최소화하여 태양전지의 광전변환효율을 향상시킬 수 있게 된다. In addition, since both the (+) electrode and the (-) electrode are provided on the rear surface of the solar cell, the light receiving area can be maximized, and the intrinsic layer which is not implanted with impurity ions is provided, thereby minimizing the recombination rate of the carriers. It is possible to improve the photoelectric conversion efficiency of the battery.
Claims (2)
- 제 1 도전형의 결정질 실리콘 기판을 준비하는 단계; 및Preparing a crystalline silicon substrate of a first conductivity type; And상기 기판의 후면 내부에 제 1 도전형의 접합영역과 제 2 도전형의 접합영역을 교번하여 배치되도록 형성하는 단계를 포함하여 이루어지며, And forming a junction region of a first conductivity type and a junction region of a second conductivity type alternately inside the rear surface of the substrate,상기 제 1 도전형의 접합영역 또는 제 2 도전형의 접합영역을 형성하는 단계는, Forming the junction region of the first conductivity type or the junction region of the second conductivity type,제 1 도전형 또는 제 2 도전형의 접합영역에 상응하는 기판 후면 상에 제 1 도전형 또는 제 2 도전형의 불순물을 포함하는 액상의 용액을 스크린프린팅 방법을 통해 도포하여 제 1 도전형 또는 제 2 도전형 불순물층을 형성하는 과정과, A liquid solution containing impurities of the first conductivity type or the second conductivity type is applied on the back surface of the substrate corresponding to the junction region of the first conductivity type or the second conductivity type by the screen printing method, thereby forming the first conductivity type or the second conductivity type. Forming a conductive impurity layer,상기 기판을 열처리하여 상기 제 1 도전형 또는 제 2 도전형 불순물층 내의 불순물 이온을 기판 후면 내부로 확산하여 제 1 도전형의 접합영역 또는 제 2 도전형의 접합영역을 형성하는 과정을 포함하여 구성되는 것을 특징으로 하는 후면전계형 이종접합 태양전지의 제조방법.And heat-treating the substrate to diffuse impurity ions in the first conductivity type or second conductivity type impurity layer into the back surface of the substrate to form a junction area of a first conductivity type or a junction area of a second conductivity type. Method for manufacturing a back-field heterojunction solar cell, characterized in that.
- 제 1 항에 있어서, 제 1 도전형의 접합영역과 제 2 도전형의 접합영역을 형성하는 단계 이후에, The method of claim 1, wherein after forming the junction region of the first conductivity type and the junction region of the second conductivity type,상기 기판 전면 상에 진성층과 제 1 도전형의 비정질 실리콘층을 순차적으로 적층하는 단계; Sequentially stacking an intrinsic layer and an amorphous silicon layer of a first conductivity type on the entire surface of the substrate;상기 제 1 도전형의 비정질 실리콘층 상에 반사방지막을 형성하는 단계; 및Forming an anti-reflection film on the amorphous silicon layer of the first conductivity type; And상기 제 1 도전형의 접합영역과 제 2 도전형의 접합영역 상에 각각 제 1 도전형 전극과 제 2 도전형 전극을 형성하는 단계를 더 포함하여 이루어지는 것을 특징으로 하는 후면전계형 이종접합 태양전지의 제조방법. And forming a first conductivity type electrode and a second conductivity type electrode on the junction region of the first conductivity type and the junction region of the second conductivity type, respectively. Manufacturing method.
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KR100697439B1 (en) * | 1999-03-11 | 2007-03-20 | 바스프 악티엔게젤샤프트 | Doping pastes for generating P, P + and N, N + bands in semiconductors |
KR100847741B1 (en) * | 2007-02-21 | 2008-07-23 | 고려대학교 산학협력단 | Point-contacted heterojunction silicon solar cell having passivation layer between the interface of p-n junction and method for fabricating the same |
KR20090009224A (en) * | 2006-05-04 | 2009-01-22 | 선파워 코포레이션 | Solar cell having doped semiconductor heterojunction contacts |
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KR100697439B1 (en) * | 1999-03-11 | 2007-03-20 | 바스프 악티엔게젤샤프트 | Doping pastes for generating P, P + and N, N + bands in semiconductors |
KR20090009224A (en) * | 2006-05-04 | 2009-01-22 | 선파워 코포레이션 | Solar cell having doped semiconductor heterojunction contacts |
KR100847741B1 (en) * | 2007-02-21 | 2008-07-23 | 고려대학교 산학협력단 | Point-contacted heterojunction silicon solar cell having passivation layer between the interface of p-n junction and method for fabricating the same |
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