WO2011070693A1 - Solid-state imaging device - Google Patents

Solid-state imaging device Download PDF

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Publication number
WO2011070693A1
WO2011070693A1 PCT/JP2010/005128 JP2010005128W WO2011070693A1 WO 2011070693 A1 WO2011070693 A1 WO 2011070693A1 JP 2010005128 W JP2010005128 W JP 2010005128W WO 2011070693 A1 WO2011070693 A1 WO 2011070693A1
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Prior art keywords
state imaging
solid
imaging device
layer
silicon
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PCT/JP2010/005128
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French (fr)
Japanese (ja)
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森三佳
沖野徹
廣瀬裕
加藤剛久
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パナソニック株式会社
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Publication of WO2011070693A1 publication Critical patent/WO2011070693A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14629—Reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1463—Pixel isolation structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685—Process for coatings or optical elements

Definitions

  • the present disclosure relates to a solid-state imaging device, and more particularly, to a solid-state imaging device that extracts charges from a surface opposite to a light incident surface.
  • MOS-type solid-state imaging devices have attracted attention as a device capable of driving with low power consumption and high-speed imaging.
  • MOS-type solid-state imaging devices are increasingly used in a wide range of fields such as mobile device cameras, in-vehicle cameras, and surveillance cameras.
  • a plurality of pixels including a photoelectric conversion unit made of a photodiode are arranged in an array.
  • Each pixel has an output circuit for extracting charges accumulated in the photoelectric conversion unit.
  • the output circuit includes, for example, a transfer transistor, an amplification transistor, a selection transistor, a reset transistor, and the like.
  • the charge photoelectrically converted in the photoelectric conversion unit is transferred to the floating diffusion layer (floating diffusion) by the transfer transistor.
  • the charge transferred to the floating diffusion layer is amplified by the amplification transistor and transmitted to the output signal line provided for each column via the selection transistor selected by the vertical shift register.
  • the charge transmitted to the output signal line is output to the output terminal via the horizontal shift register.
  • the surplus charge accumulated in the floating diffusion layer is discharged by a reset transistor whose drain region is connected to the power supply line.
  • FIG. 7 shows an example of the configuration of a back-illuminated solid-state imaging device.
  • -Layer) 214 and a p-type silicon layer (p + layer) 212 having a high impurity concentration laminated on the back surface side of p-layer 214 are formed.
  • a pixel isolation region 228 made of a p-type impurity diffusion layer is formed on the surface side of the n ⁇ layer 216.
  • a p-type well region 234 having a low impurity concentration is formed below the pixel isolation region 228.
  • a p-type silicon layer 222 having a high impurity concentration is formed on the front surface side of each light receiving region, and a silicon layer 224 containing n-type impurities is formed on the back surface side of the silicon layer 222.
  • An insulating film 242 that is transparent to incident light such as silicon oxide or silicon nitride is formed on the back side of the p + layer 212 of the semiconductor substrate.
  • a high refractive index transparent layer 244 is formed on the light incident surface side of the insulating film 242.
  • a color filter layer formed by arranging a plurality of color filters 246 in the horizontal direction is formed on the light incident side surface of the high refractive index transparent layer 244.
  • a light shielding member 248 for preventing color mixing (crosstalk) is formed between adjacent color filters 246, and a microlens 252 is formed on the color filter 246.
  • An embedded member 218 made of a light reflective material such as tungsten is formed inside the semiconductor substrate so as to partition adjacent pixels.
  • An insulating film 219 made of silicon oxide or the like is formed between the embedded member 218 and the silicon layer.
  • the conventional back-illuminated solid-state imaging device has the following problems.
  • the embedding member embedded between the pixels is made of a material that reflects light such as metal. Since metal and silicon have different lattice constants, it is difficult to form a single crystal epitaxial layer on the embedded member. For this reason, the silicon layer formed on the embedded member contains many crystal defects. Therefore, since the charge generated in the dark increases, the sensitivity of the solid-state imaging device decreases.
  • the conventional back-illuminated solid-state imaging device has a CCD-type charge reading configuration when reading the charge from the photoelectric conversion unit. For this reason, the light reflecting material cannot be formed on the side of the semiconductor substrate where the readout electrode is formed, and the oblique incident light cannot be completely absorbed. For example, light having a wavelength of 650 nm is absorbed only about 90% by a silicon material having a thickness of 10 ⁇ m. If absorption of obliquely incident light is insufficient, color mixing cannot be reduced. Furthermore, since the metal is embedded in the silicon material, the metal is thermally diffused into the silicon material by heat treatment during the process. This also increases the crystal defects in the silicon layer and increases the charge generated in the dark, resulting in a decrease in sensitivity.
  • the solid-state imaging device is configured to include a separation unit made of a silicon layer.
  • an exemplary solid-state imaging device includes a semiconductor substrate having a light incident surface and a charge detection surface, a plurality of photoelectric conversion units formed on the semiconductor substrate and including a first conductivity type impurity, and between the photoelectric conversion units.
  • a separation portion having a silicon layer embedded in the semiconductor substrate, a color filter formed on the light incident surface side, and an output circuit formed on the charge detection surface side. It consists of crystalline silicon or polycrystalline silicon.
  • the exemplary solid-state imaging device can getter heavy metals such as iron, copper, and nickel contained in the semiconductor substrate to the silicon layer during the process of the solid-state imaging device. Therefore, it is possible to reduce the charge generated in the dark and improve the sensitivity of the solid-state imaging device.
  • the color filter is formed on the light incident surface side and the output circuit is formed on the charge detection surface side, the distance between the color filter and the photoelectric conversion unit can be reduced. Therefore, color mixing due to obliquely incident light can be reduced. Furthermore, long-wavelength light reaching the deep part of the substrate is less likely to enter adjacent pixels when incident obliquely, and color mixing can be reduced.
  • the separation unit may have a side silicon oxide film formed between the silicon layer and the semiconductor substrate.
  • the separation unit may have an upper silicon oxide film formed on the charge detection surface side of the silicon layer, and the upper silicon oxide film may protrude from the charge detection surface.
  • a gate wiring can be formed on the separation portion.
  • the silicon layer may contain phosphorus, boron, or arsenic. With such a configuration, heavy metal gettering can be performed more reliably in the silicon layer.
  • a negative voltage may be applied to the silicon layer.
  • a hole accumulation layer can be formed on the surface of the groove portion that forms the separation portion. For this reason, the charge generated by the interface state due to crystal defects can be reduced, and high sensitivity can be achieved.
  • the position where the concentration of the first conductivity type impurity in the photoelectric conversion unit is maximized may be closer to the light incident surface than the position closest to the light incident surface in the separation unit. With such a configuration, it is possible to further reduce color mixing when light in the visible light region is incident obliquely.
  • the illustrated solid-state imaging device may further include a second conductivity type layer that is formed on the light incident surface and includes impurities of the second conductivity type, and the separation unit may reach the second conductivity type layer from the charge detection surface. .
  • the separation unit may reach the second conductivity type layer from the charge detection surface.
  • solid-state imaging device According to the solid-state imaging device according to the present disclosure, a back-illuminated solid-state imaging device with high sensitivity and reduced color mixing can be realized.
  • FIG. 1 shows a circuit configuration of a solid-state imaging device according to an embodiment.
  • a plurality of pixels 100 including a photoelectric conversion unit 161 made of a photodiode are arranged in a matrix.
  • Each pixel 100 has an output circuit 162 for extracting charges accumulated in the photoelectric conversion unit 161.
  • the output circuit 162 includes a plurality of MOS transistors such as the transfer transistor 103, the amplification transistor 104, the selection transistor 106, and the reset transistor 105.
  • the charge photoelectrically converted by the photoelectric conversion unit 161 is transferred to the floating diffusion layer (floating diffusion) 102 by the transfer transistor 103.
  • the charges transferred to the floating diffusion layer 102 are amplified by the amplification transistor 104 and transmitted to the output signal line 111 provided for each column via the selection transistor 106 selected by the vertical shift register 108.
  • the charge transmitted to the output signal line 111 is output to the output terminal 112 via the horizontal shift register 109. Note that excess charge accumulated in the floating diffusion layer 102 is discharged by the reset transistor 105 whose drain region is connected to the power supply line.
  • FIG. 2 shows a cross-sectional configuration of the pixel 100. In FIG. 2, only three pixels are shown.
  • a semiconductor substrate 151 that is a silicon substrate, photoelectric conversion portions 161 that are n-type diffusion regions are formed in a matrix.
  • the surface of the semiconductor substrate 151 is a charge detection surface 151A, and an output circuit 162 including a plurality of MOS transistors is formed.
  • the back surface of the semiconductor substrate 151 is a light incident surface 151B, on which a plurality of color filters 169, lenses 173, and the like are formed.
  • the output circuit 162 is formed between adjacent photoelectric conversion units 161, and a separation unit 163 is formed between the photoelectric conversion unit 161 and the source / drain regions of the transistors constituting the output circuit 162.
  • An interlayer film 165 is formed on the charge detection surface 151A so as to cover the output circuit 162, and a plurality of wirings 160 are formed in the interlayer film 165.
  • the wiring 160 includes a control line for driving the output circuit 162, an output line for outputting charges, and the like.
  • a separation diffusion layer 164 that is a p-type diffusion layer is formed between adjacent photoelectric conversion portions 161. Thereby, the adjacent photoelectric conversion parts 161 can be electrically separated to reduce color mixing.
  • the color filters 169 are formed corresponding to the photoelectric conversion units 161, respectively.
  • the color filter 169 is a B filter that transmits light with a short wavelength of about 450 nm with high efficiency, an R filter that transmits light with a long wavelength of about 650 nm with high efficiency, and light with an intermediate wavelength of about 550 nm. Including a G filter that transmits light with high efficiency, and forms a Bayer array.
  • An insulating film 166 made of silicon oxide (SiO 2 ), silicon nitride (SiN), or the like is formed between the color filter 169 and the light incident surface 151B.
  • a lens 173 is formed on the color filter 169 with a planarizing layer 172 interposed therebetween.
  • a high-concentration p-type layer 170 in which a high-concentration p-type impurity is diffused from the light incident surface 151B to a certain depth is formed on the light incident surface 151B.
  • the high-concentration p-type layer 170 it is possible to suppress the charge generated in the dark due to crystal defects on the light incident surface 151B from flowing into the photoelectric conversion unit 161, and to reduce noise.
  • a high concentration p-type layer 171 is formed on the charge detection surface 151A. By forming the high-concentration p-type layer 171, it is possible to suppress the charge generated in the dark due to the crystal defect of the charge detection surface 151 ⁇ / b> A from flowing into the photoelectric conversion unit 161 and to reduce noise.
  • a MOS type solid-state imaging device forms a color filter on a multilayer wiring. For this reason, the distance from the substrate surface to the color filter is increased, and it is greatly affected by color mixing due to obliquely incident light.
  • the color filter and the multilayer wiring are formed on different surfaces of the substrate. For this reason, the distance from the substrate surface to the color filter can be reduced. Specifically, the distance from the substrate surface to the color filter, which was conventionally about 4 ⁇ m, can be reduced to about 1 ⁇ m. As a result, the color mixture can be halved.
  • the separation unit 163 in the solid-state imaging device of the present embodiment has a silicon layer 175 made of amorphous silicon or polycrystalline silicon.
  • the silicon layer 175 can be formed by the LPCVD method with excellent embedding properties. For this reason, the aspect ratio of the separation unit 163 can be increased to about 10 to 20. For this reason, the depth of the separation part 163 can be increased, and color mixing due to obliquely incident light can be further reduced.
  • the separating portion 163 is configured such that the silicon layer 175 is formed on the light incident surface 151B side, and the upper SiO 2 film 176 is formed on the charge detection surface 151A side. For this reason, a gate wiring and a gate electrode which are pulse transmission wirings can be formed on the separation portion 163. Therefore, the number of wiring layers can be reduced, and low cost and short TAT (Turn Around Time) can be manufactured.
  • the separation unit 163 in the solid-state imaging device of the present embodiment has a depth from the charge detection surface 151A in a separation groove having a width of 0.2 ⁇ m and a depth from the charge detection surface 151A of about 2.0 ⁇ m.
  • the silicon layer 175 is buried up to a position of about 0.3 ⁇ m, and an upper SiO 2 film 176 made of silicon oxide is formed on the charge detection surface 151A side of the silicon layer 175.
  • the upper SiO 2 film 176 is formed so as to protrude from the charge detection surface 151A by about 50 nm.
  • the position where the concentration of the n-type impurity in the photoelectric conversion unit 161 is maximum is closer to the charge detection surface 151A than the deepest position from the charge detection surface 151A of the separation unit 163.
  • the color mixture characteristic calculated as the ratio of the output value of the pixel provided with the R filter to the output value of the pixel provided with the G filter adjacent to the pixel provided with the R filter is about 0.5%.
  • the depth at which the intensity of light incident on a silicon substrate is halved is about 0.3 ⁇ m when the wavelength is 450 nm, about 0.8 ⁇ m when the wavelength is 550 nm, and the wavelength is 650 nm. In this case, it is about 2.3 ⁇ m. In this way, since long wavelength light reaches a deeper position on the silicon substrate, color mixing due to obliquely incident light is likely to be manifested.
  • the separation part 163 has a side SiO 2 film 177 formed on the bottom and side surfaces of the separation groove. For this reason, crystal defects generated on the side surface of the separation groove can be reduced, and a decrease in sensitivity due to dark generated charges can be suppressed.
  • the side SiO 2 film 177 may have a thickness of about 10 nm.
  • the silicon layer 175 may be set to the ground potential or a negative voltage may be applied to the solid-state imaging device of the present embodiment.
  • a solid-state imaging device having about 300,000 pixels, when the number of pixels having a dark output of 69 mV or more is about 10,000 pixels, the side SiO 2 film 177 can be provided to reduce the number to 1000 pixels or less.
  • a voltage of ⁇ 3 V is applied to the silicon layer 175, a hole accumulation layer having a concentration of about 1 ⁇ 10 18 / cm 3 can be formed on the side wall of the isolation trench. Thereby, the charge generated from the interface state of the crystal defect can be reduced, and the number of pixels whose output in the dark is 69 mV or more can be reduced to 10 pixels or less.
  • the semiconductor substrate 151 may be an SOI substrate.
  • SOI buried oxide
  • BOX buried oxide
  • the number of pixels whose output in the dark is 69 mV or more increases and the characteristics deteriorate.
  • gettering locations are provided in the SOI layer, crystal defects are concentrated at the gettering locations, so that the charge generated by heat increases and the number of pixels whose output in the dark is 69 mV or more increases. Resulting in.
  • the silicon layer 175 is provided in the separation part 163, it is possible to getter the Fe element and the Ni element in a place isolated from the photoelectric conversion part 161. In this case, about 98% can be absorbed from the silicon layer of the SOI substrate. For this reason, in a solid-state imaging device having about 300,000 pixels, it is possible to reduce the number of pixels having a dark output of 69 mV or more to 10 or less.
  • the photoelectric conversion unit 161 may be formed with an implantation energy of 200 keV to 2000 keV, and the impurity concentration may be 1 ⁇ 10 14 / cm 3 to 1 ⁇ 10 17 / cm 3 .
  • the isolation diffusion layer 164 may be formed with an implantation energy of 100 keV to 3000 keV, and the impurity concentration may be 1 ⁇ 10 15 / cm 3 to 1 ⁇ 10 18 / cm 3 .
  • the high-concentration p-type layer 170 and the high-concentration p-type layer 171 may be formed with an implantation energy of 1 keV to 100 keV, and the impurity concentration may be 1 ⁇ 10 17 / cm 3 to 1 ⁇ 10 20 / cm 3 .
  • a part of the photoelectric conversion unit 161 has the same depth from the charge detection surface 151A, and the transfer of the accumulated charge from the photoelectric conversion unit 161 to the floating diffusion unit is photoelectric conversion. This is performed in a shallow portion of the portion 161.
  • a silicon nitride film 189 having a thickness of 10 nm to 200 nm is formed on a charge detection surface 151A of a semiconductor substrate 151 such as an SOI substrate or a silicon substrate by a CVD method.
  • a photolithography method, a dry etching method, or the like is a photolithography method, or the like.
  • the silicon nitride film 189 is used as a hard mask and the width is 0.1 ⁇ m to 0.5 ⁇ m and the depth is formed on the charge detection surface 151A side of the semiconductor substrate 151 by dry etching.
  • a separation groove 174 of 1 ⁇ m to 5 ⁇ m is formed.
  • a side SiO 2 film 177 made of SiO 2 having a thickness of 5 nm to 20 nm is formed on the side surface of the separation groove 174 by a thermal CVD method or the like. Subsequently, after the silicon layer 175 is formed in the separation groove 174 by the CVD method, etch back is performed to remove the upper portion of the separation groove 174 of the side SiO 2 film 177 from about 0.1 ⁇ m to 0.3 ⁇ m. In order to prevent dark charges generated due to crystal defects in the separation groove 174 from flowing into the photoelectric conversion portion 161, a p-type impurity is implanted into the sidewall of the separation groove 174 after the side SiO 2 film 177 is formed. It is preferable.
  • the p-type impurity may be implanted at an implantation energy of 5 to 30 keV and an implantation concentration of 1 ⁇ 10 14 / cm 3 to 1 ⁇ 10 19 / cm 3 .
  • the silicon nitride film 189 is removed by CMP, the silicon nitride film 189 is removed by wet etching. As a result, an isolation portion 163 in which the upper SiO 2 film 176 protrudes about 50 nm on the semiconductor substrate is formed.
  • the photoelectric conversion unit 161, the diffusion layer of the output circuit 162, the high-concentration p-type layer 171, the separation diffusion layer 164, and the like are formed in a desired region by photolithography and ion implantation. Thereafter, a gate oxide film (not shown) is formed by thermal oxidation, and a gate electrode is formed by a CVD method.
  • the interlayer film 165 and the wiring 160 are formed by film formation using a sputtering method and a CVD method and patterning using a photolithography method and a dry etching method.
  • the support substrate 190 may be a silicon substrate or the like. Further, a quartz substrate or the like may be used.
  • the surface opposite to the charge detection surface 151A of the semiconductor substrate 151 is back-ground and wet etched to form a light incident surface 151B where the photoelectric conversion portion 161 is exposed.
  • a high concentration p-type layer 170 is formed on the light incident surface 151B side by ion implantation.
  • the high-concentration p-type layer 170 may be formed by setting the implantation energy to 1 keV to 100 keV and the impurity concentration to 1 ⁇ 10 17 / cm 3 to 1 ⁇ 10 20 / cm 3 .
  • an insulating film 166 having a thickness of 0.05 ⁇ m to 1 ⁇ m is formed on the high-concentration p-type layer 170 by a CVD method, and a color filter 169 is formed by a spin coating method.
  • the color filter 169 may be a Bayer array, for example.
  • a lens 173 is formed through the planarization layer 172 by a spin coating method and a dry etching method.
  • the separation unit 163 only needs to be deeper than the position where the impurity concentration in the photoelectric conversion unit 161 is the highest from the charge detection surface 151A. Therefore, as shown in FIG. 6, the separation part 163 may reach the high concentration p-type layer 170.
  • the thickness of the semiconductor substrate 151 may be 3 ⁇ m
  • the separation groove forming the separation portion 163 may have a width of 0.3 ⁇ m and a depth of 2.8 ⁇ m.
  • the separation unit 163 reaches the high-concentration p-type layer 170, the adjacent photoelectric conversion unit 161 can be physically separated. For this reason, the color mixing characteristics can be further improved.
  • the ratio of the output value of the pixel provided with the R filter to the output value of the pixel provided with the G filter adjacent to the pixel provided with the R filter is finally about 0.01%.
  • the solid-state imaging device can improve sensitivity and reduce color mixing, and is particularly useful as a solid-state imaging device that performs charge extraction from a surface opposite to the light incident surface.

Abstract

Disclosed is a solid-state imaging device comprising a semiconductor substrate (151), multiple photoelectric conversion units (161) that are formed on the semiconductor substrate (151), a separation unit (163), a color filter (169), and an output circuit (162). The semiconductor substrate (151) has a light incident surface and a charge detection surface. The separation unit (163) is formed between the photoelectric conversion units (161), and has a silicon layer (175) that is embedded in the semiconductor substrate (151). The color filter (169) is formed on the light incident surface side, and the output circuit (162) is formed on the charge detection surface side. The silicon layer comprises amorphous silicon or polycrystalline silicon.

Description

固体撮像装置Solid-state imaging device
　本開示は、固体撮像装置に関し、特に電荷の取り出しを光入射面と反対側の面から行う固体撮像装置に関する。 The present disclosure relates to a solid-state imaging device, and more particularly, to a solid-state imaging device that extracts charges from a surface opposite to a light incident surface.
　近年、金属－酸化膜－半導体（ＭＯＳ）型の固体撮像装置が、低消費電力駆動及び高速撮像が可能な装置として注目されている。ＭＯＳ型の固体撮像装置は、携帯機器用カメラ、車載用カメラ及び監視用カメラ等の幅広い分野において利用が進んでいる。 Recently, a metal-oxide-semiconductor (MOS) type solid-state imaging device has attracted attention as a device capable of driving with low power consumption and high-speed imaging. MOS-type solid-state imaging devices are increasingly used in a wide range of fields such as mobile device cameras, in-vehicle cameras, and surveillance cameras.
　一般的なＭＯＳ型の固体撮像装置は、フォトダイオードからなる光電変換部を含む複数の画素がアレイ状に配列されている。各画素は、光電変換部に蓄積された電荷を取り出すための、出力回路を有している。出力回路は、例えば転送トランジスタ、増幅トランジスタ、選択トランジスタ及びリセットトランジスタ等を有している。光電変換部において光電変換された電荷は、転送トランジスタにより浮遊拡散層（フローティングディフュージョン）に転送される。浮遊拡散層に転送された電荷は、増幅トランジスタにより増幅され、垂直シフトレジスタにより選択された選択トランジスタを介して、列ごとに設けられた出力信号線に伝達される。出力信号線に伝達された電荷は、水平シフトレジスタを介して出力端子へ出力される。なお、浮遊拡散層に蓄積された余剰電荷は、ドレイン領域が電源線と接続されたリセットトランジスタにより排出される。 In a general MOS type solid-state imaging device, a plurality of pixels including a photoelectric conversion unit made of a photodiode are arranged in an array. Each pixel has an output circuit for extracting charges accumulated in the photoelectric conversion unit. The output circuit includes, for example, a transfer transistor, an amplification transistor, a selection transistor, a reset transistor, and the like. The charge photoelectrically converted in the photoelectric conversion unit is transferred to the floating diffusion layer (floating diffusion) by the transfer transistor. The charge transferred to the floating diffusion layer is amplified by the amplification transistor and transmitted to the output signal line provided for each column via the selection transistor selected by the vertical shift register. The charge transmitted to the output signal line is output to the output terminal via the horizontal shift register. The surplus charge accumulated in the floating diffusion layer is discharged by a reset transistor whose drain region is connected to the power supply line.
　固体撮像装置の微細化に伴い、出力回路を光が入射する光入射面と反対側の面に形成した裏面照射型の固体撮像装置が検討されている。図７は、裏面照射型の固体撮像装置の構成の一例を示している。図７に示すように、半導体基板に、不純物濃度が低いｎ型のシリコン層（ｎ－層）２１６と、ｎ－層２１６の裏面側に積層した、不純物濃度が低いｐ型のシリコン層（ｐ－層）２１４と、ｐ－層２１４の裏面側に積層した不純物濃度が高いｐ型のシリコン層（ｐ＋層）２１２とが形成されている。また、ｎ－層２１６よりも表面側には、ｐ型の不純物拡散層からなる画素分離領域２２８が形成されている。画素分離領域２２８の下方には、不純物濃度が低いｐ型のウエル領域２３４が形成されている。各受光部領域の表面側には、不純物濃度が高いｐ型のシリコン層２２２が形成され、シリコン層２２２よりも裏面側には、ｎ型の不純物を含むシリコン層２２４が形成されている。半導体基板のｐ＋層２１２の裏面側には、酸化シリコンや窒化シリコン等の入射光に対して透明な絶縁膜２４２が形成されている。絶縁膜２４２の光入射面側には、高屈折率透明層２４４が形成されている。高屈折率透明層２４４の光入射側の面には、複数のカラーフィルタ２４６を水平方向に配列してなるカラーフィルタ層が形成されている。隣接するカラーフィルタ２４６同士の間には、混色（クロストーク）を防止するための遮光部材２４８が形成され、カラーフィルタ２４６上には、マイクロレンズ２５２が形成されている。 With the miniaturization of solid-state imaging devices, back-illuminated solid-state imaging devices in which an output circuit is formed on the surface opposite to the light incident surface on which light enters are being studied. FIG. 7 shows an example of the configuration of a back-illuminated solid-state imaging device. As shown in FIG. 7, an n-type silicon layer (n-layer) 216 with a low impurity concentration and a p-type silicon layer (p-type with a low impurity concentration) stacked on the back side of the n-layer 216 on a semiconductor substrate. -Layer) 214 and a p-type silicon layer (p + layer) 212 having a high impurity concentration laminated on the back surface side of p-layer 214 are formed. A pixel isolation region 228 made of a p-type impurity diffusion layer is formed on the surface side of the n− layer 216. A p-type well region 234 having a low impurity concentration is formed below the pixel isolation region 228. A p-type silicon layer 222 having a high impurity concentration is formed on the front surface side of each light receiving region, and a silicon layer 224 containing n-type impurities is formed on the back surface side of the silicon layer 222. An insulating film 242 that is transparent to incident light such as silicon oxide or silicon nitride is formed on the back side of the p + layer 212 of the semiconductor substrate. A high refractive index transparent layer 244 is formed on the light incident surface side of the insulating film 242. A color filter layer formed by arranging a plurality of color filters 246 in the horizontal direction is formed on the light incident side surface of the high refractive index transparent layer 244. A light shielding member 248 for preventing color mixing (crosstalk) is formed between adjacent color filters 246, and a microlens 252 is formed on the color filter 246.
　半導体基板の内部には、隣り合う画素同士の間を仕切るように、タングステン等の光反射性材料から構成された埋め込み部材２１８が形成されている。埋め込み部材２１８とシリコン層との間には酸化シリコン等からなる絶縁膜２１９が形成されている。埋め込み部材２１８を形成することにより、入射光が入射した画素とは別の位置に設けられた画素の光電変換領域に侵入することを回避でき、混色の発生を防止できる。 An embedded member 218 made of a light reflective material such as tungsten is formed inside the semiconductor substrate so as to partition adjacent pixels. An insulating film 219 made of silicon oxide or the like is formed between the embedded member 218 and the silicon layer. By forming the embedding member 218, it is possible to avoid the entry of incident light into a photoelectric conversion region of a pixel provided at a position different from the pixel on which the incident light is incident, and to prevent color mixing.
特開２００９－８８０３０号公報JP 2009-88030 A
　しかしながら、従来の裏面照射型の固体撮像装置には以下のような問題がある。画素同士の間に埋め込まれた埋め込み部材は、金属等の光を反射する材料からなる。金属とシリコンとは格子定数が異なるため、埋め込み部材の上に単結晶のエピタキシャル層を形成することは困難である。このため、埋め込み部材の上に形成されたシリコン層は結晶欠陥を多く含む。従って、暗時発生電荷が増加するので、固体撮像装置の感度が低下する。 However, the conventional back-illuminated solid-state imaging device has the following problems. The embedding member embedded between the pixels is made of a material that reflects light such as metal. Since metal and silicon have different lattice constants, it is difficult to form a single crystal epitaxial layer on the embedded member. For this reason, the silicon layer formed on the embedded member contains many crystal defects. Therefore, since the charge generated in the dark increases, the sensitivity of the solid-state imaging device decreases.
　また、従来の裏面照射型の固体撮像装置は、光電変換部からの電荷を読み出す際に、ＣＣＤ型の電荷読み出し構成を取っている。このため、半導体基板における読み出し電極を形成する側に、光反射材料を形成することができず、斜め入射光を完全に吸収することができない。例えば、波長が６５０ｎｍの光は、厚さが１０μｍのシリコン材料により９０％程度しか吸収されない。斜め入射光の吸収が不十分となると、混色を低減することができなくなる。さらに、金属をシリコン材料内に埋め込んでいるため、プロセス中の熱処理により、シリコン材料内に金属が熱拡散する。これによっても、シリコン層の結晶欠陥が増加し、暗時発生電荷が増加するので、感度が低下する。 Further, the conventional back-illuminated solid-state imaging device has a CCD-type charge reading configuration when reading the charge from the photoelectric conversion unit. For this reason, the light reflecting material cannot be formed on the side of the semiconductor substrate where the readout electrode is formed, and the oblique incident light cannot be completely absorbed. For example, light having a wavelength of 650 nm is absorbed only about 90% by a silicon material having a thickness of 10 μm. If absorption of obliquely incident light is insufficient, color mixing cannot be reduced. Furthermore, since the metal is embedded in the silicon material, the metal is thermally diffused into the silicon material by heat treatment during the process. This also increases the crystal defects in the silicon layer and increases the charge generated in the dark, resulting in a decrease in sensitivity.
　本開示は、前記の問題を解決し、感度が高く且つ混色を低減した裏面照射型の固体撮像装置を実現できるようにすることを目的とする。 It is an object of the present disclosure to solve the above-described problem and realize a back-illuminated solid-state imaging device with high sensitivity and reduced color mixing.
　前記の目的を達成するため、本開示は固体撮像装置を、シリコン層からなる分離部を備えた構成とする。 In order to achieve the above object, according to the present disclosure, the solid-state imaging device is configured to include a separation unit made of a silicon layer.
　具体的に、例示の固体撮像装置は、光入射面及び電荷検出面を有する半導体基板と、半導体基板に形成され、第１導電型の不純物を含む複数の光電変換部と、光電変換部同士の間に形成され、半導体基板に埋め込まれたシリコン層を有する分離部と、光入射面側に形成されたカラーフィルタと、電荷検出面側に形成された出力回路とを備え、シリコン層は、非晶質シリコン又は多結晶シリコンからなる。 Specifically, an exemplary solid-state imaging device includes a semiconductor substrate having a light incident surface and a charge detection surface, a plurality of photoelectric conversion units formed on the semiconductor substrate and including a first conductivity type impurity, and between the photoelectric conversion units. A separation portion having a silicon layer embedded in the semiconductor substrate, a color filter formed on the light incident surface side, and an output circuit formed on the charge detection surface side. It consists of crystalline silicon or polycrystalline silicon.
　例示の固体撮像装置は、固体撮像装置のプロセス中に半導体基板内に含まれる鉄、銅、ニッケル等の重金属をシリコン層にゲッタリングすることができる。従って、暗時発生電荷を低減し、固体撮像装置の感度を向上させることができる。また、カラーフィルタが光入射面側に形成され、出力回路が電荷検出面側に形成されているため、カラーフィルタと光電変換部との間隔を狭くすることができる。従って、斜め入射光による混色を低減することができる。さらに、基板の深部まで到達する長波長光についても、斜めに入射した場合に隣接する画素へ侵入しにくくなり、混色を低減できる。 The exemplary solid-state imaging device can getter heavy metals such as iron, copper, and nickel contained in the semiconductor substrate to the silicon layer during the process of the solid-state imaging device. Therefore, it is possible to reduce the charge generated in the dark and improve the sensitivity of the solid-state imaging device. In addition, since the color filter is formed on the light incident surface side and the output circuit is formed on the charge detection surface side, the distance between the color filter and the photoelectric conversion unit can be reduced. Therefore, color mixing due to obliquely incident light can be reduced. Furthermore, long-wavelength light reaching the deep part of the substrate is less likely to enter adjacent pixels when incident obliquely, and color mixing can be reduced.
　例示の固体撮像装置において、分離部は、シリコン層と半導体基板との間に形成された側部シリコン酸化膜を有していてもよい。このような構成とすることにより、分離部を形成するための溝部の側面における結晶欠陥を低減することができ、暗時発生電荷を低減して、高感度化することができる。 In the illustrated solid-state imaging device, the separation unit may have a side silicon oxide film formed between the silicon layer and the semiconductor substrate. With such a configuration, crystal defects on the side surface of the groove portion for forming the separation portion can be reduced, and the charge generated in the dark can be reduced to increase the sensitivity.
　例示の固体撮像装置において分離部は、シリコン層よりも電荷検出面側に形成された上部シリコン酸化膜を有し、上部シリコン酸化膜は、電荷検出面から突出していてもよい。このような構成とすることにより、分離部の上にゲート配線を形成することが可能となる。 In the illustrated solid-state imaging device, the separation unit may have an upper silicon oxide film formed on the charge detection surface side of the silicon layer, and the upper silicon oxide film may protrude from the charge detection surface. With such a configuration, a gate wiring can be formed on the separation portion.
　例示の固体撮像装置においてシリコン層は、リン、ホウ素又は砒素を含んでいてもよい。このような構成とすることにより、シリコン層において重金属のゲッタリングをより確実に行うことが可能となる。 In the illustrated solid-state imaging device, the silicon layer may contain phosphorus, boron, or arsenic. With such a configuration, heavy metal gettering can be performed more reliably in the silicon layer.
　例示の固体撮像装置においてシリコン層は、負電圧が印加されていてもよい。このような構成とすることにより、分離部を形成する溝部の表面にホール蓄積層を形成できる。このため、結晶欠陥による界面準位により発生する電荷を低減し、高感度化を行うことができる。 In the illustrated solid-state imaging device, a negative voltage may be applied to the silicon layer. With such a configuration, a hole accumulation layer can be formed on the surface of the groove portion that forms the separation portion. For this reason, the charge generated by the interface state due to crystal defects can be reduced, and high sensitivity can be achieved.
　例示の固体撮像装置において、光電変換部における第１導電型の不純物の濃度が最大となる位置は、分離部における最も光入射面側の位置よりも、光入射面側とすればよい。このような構成とすることにより、可視光領域の光が斜めに入射した場合の混色をより低減することができる。 In the illustrated solid-state imaging device, the position where the concentration of the first conductivity type impurity in the photoelectric conversion unit is maximized may be closer to the light incident surface than the position closest to the light incident surface in the separation unit. With such a configuration, it is possible to further reduce color mixing when light in the visible light region is incident obliquely.
　例示の固体撮像装置は、光入射面に形成され、第２導電型の不純物を含む第２導電型層をさらに備え、分離部は、電荷検出面から第２導電型層に達していてもよい。このような構成とすることにより、可視光領域の光が斜めに入射した場合の混色をより低減することができる。 The illustrated solid-state imaging device may further include a second conductivity type layer that is formed on the light incident surface and includes impurities of the second conductivity type, and the separation unit may reach the second conductivity type layer from the charge detection surface. . With such a configuration, it is possible to further reduce color mixing when light in the visible light region is incident obliquely.
　本開示に係る固体撮像装置によれば、感度が高く且つ混色を低減した裏面照射型の固体撮像装置を実現できる。 According to the solid-state imaging device according to the present disclosure, a back-illuminated solid-state imaging device with high sensitivity and reduced color mixing can be realized.
一実施形態に係る固体撮像装置を示す回路図である。It is a circuit diagram which shows the solid-state imaging device which concerns on one Embodiment. 一実施形態に係る固体撮像装置の画素部分を示す断面図である。It is sectional drawing which shows the pixel part of the solid-state imaging device which concerns on one Embodiment. 一実施形態に係る固体撮像装置の製造方法を工程順に示す断面図である。It is sectional drawing which shows the manufacturing method of the solid-state imaging device which concerns on one Embodiment to process order. 一実施形態に係る固体撮像装置の製造方法を工程順に示す断面図である。It is sectional drawing which shows the manufacturing method of the solid-state imaging device which concerns on one Embodiment to process order. 一実施形態に係る固体撮像装置の製造方法を工程順に示す断面図である。It is sectional drawing which shows the manufacturing method of the solid-state imaging device which concerns on one Embodiment to process order. 一実施形態に係る固体撮像装置の変形例を示す断面図である。It is sectional drawing which shows the modification of the solid-state imaging device which concerns on one Embodiment. 従来例に係る固体撮像装置を示す断面図である。It is sectional drawing which shows the solid-state imaging device which concerns on a prior art example.
　図１は、一実施形態に係る固体撮像装置の回路構成を示している。本実施形態の固体撮像装置は、フォトダイオードからなる光電変換部１６１を含む複数の画素１００が行列状に配列されている。各画素１００は、光電変換部１６１に蓄積された電荷を取り出すための、出力回路１６２を有している。出力回路１６２は、転送トランジスタ１０３、増幅トランジスタ１０４、選択トランジスタ１０６及びリセットトランジスタ１０５等の複数のＭＯＳトランジスタを有している。例えば、光電変換部１６１において光電変換された電荷は、転送トランジスタ１０３により浮遊拡散層（フローティングディフュージョン）１０２に転送される。浮遊拡散層１０２に転送された電荷は、増幅トランジスタ１０４により増幅され、垂直シフトレジスタ１０８により選択された選択トランジスタ１０６を介して、列ごとに設けられた出力信号線１１１に伝達される。出力信号線１１１に伝達された電荷は、水平シフトレジスタ１０９を介して出力端子１１２へ出力される。なお、浮遊拡散層１０２に蓄積された余剰電荷は、ドレイン領域が電源線と接続されたリセットトランジスタ１０５により排出される。 FIG. 1 shows a circuit configuration of a solid-state imaging device according to an embodiment. In the solid-state imaging device of this embodiment, a plurality of pixels 100 including a photoelectric conversion unit 161 made of a photodiode are arranged in a matrix. Each pixel 100 has an output circuit 162 for extracting charges accumulated in the photoelectric conversion unit 161. The output circuit 162 includes a plurality of MOS transistors such as the transfer transistor 103, the amplification transistor 104, the selection transistor 106, and the reset transistor 105. For example, the charge photoelectrically converted by the photoelectric conversion unit 161 is transferred to the floating diffusion layer (floating diffusion) 102 by the transfer transistor 103. The charges transferred to the floating diffusion layer 102 are amplified by the amplification transistor 104 and transmitted to the output signal line 111 provided for each column via the selection transistor 106 selected by the vertical shift register 108. The charge transmitted to the output signal line 111 is output to the output terminal 112 via the horizontal shift register 109. Note that excess charge accumulated in the floating diffusion layer 102 is discharged by the reset transistor 105 whose drain region is connected to the power supply line.
　図２は、画素１００の断面構成を示している。図２においては３画素のみを示している。シリコン基板である半導体基板１５１には、ｎ型の拡散領域である光電変換部１６１が行列状に形成されている。半導体基板１５１の表面は電荷検出面１５１Ａであり、複数のＭＯＳトランジスタを含む出力回路１６２が形成されている。半導体基板１５１の裏面は光入射面１５１Ｂであり、複数のカラーフィルタ１６９及びレンズ１７３等が形成されている。 FIG. 2 shows a cross-sectional configuration of the pixel 100. In FIG. 2, only three pixels are shown. On a semiconductor substrate 151 that is a silicon substrate, photoelectric conversion portions 161 that are n-type diffusion regions are formed in a matrix. The surface of the semiconductor substrate 151 is a charge detection surface 151A, and an output circuit 162 including a plurality of MOS transistors is formed. The back surface of the semiconductor substrate 151 is a light incident surface 151B, on which a plurality of color filters 169, lenses 173, and the like are formed.
　出力回路１６２は、隣接する光電変換部１６１の間に形成され、光電変換部１６１と出力回路１６２を構成するトランジスタのソースドレイン領域との間には、分離部１６３が形成されている。電荷検出面１５１Ａの上には出力回路１６２を覆うように層間膜１６５が形成され、層間膜１６５には複数の配線１６０が形成されている。配線１６０は出力回路１６２を駆動する制御線及び電荷を出力する出力線等を含む。隣接する光電変換部１６１同士の間には、ｐ型の拡散層である分離拡散層１６４が形成されている。これにより、隣接する光電変換部１６１を電気的に分離し、混色を低減することができる。 The output circuit 162 is formed between adjacent photoelectric conversion units 161, and a separation unit 163 is formed between the photoelectric conversion unit 161 and the source / drain regions of the transistors constituting the output circuit 162. An interlayer film 165 is formed on the charge detection surface 151A so as to cover the output circuit 162, and a plurality of wirings 160 are formed in the interlayer film 165. The wiring 160 includes a control line for driving the output circuit 162, an output line for outputting charges, and the like. A separation diffusion layer 164 that is a p-type diffusion layer is formed between adjacent photoelectric conversion portions 161. Thereby, the adjacent photoelectric conversion parts 161 can be electrically separated to reduce color mixing.
　カラーフィルタ１６９は、それぞれ光電変換部１６１に対応して形成されている。カラーフィルタ１６９は、波長４５０ｎｍ程度の短波長の光を高効率で透過するＢフィルタと、波長６５０ｎｍ程度の長波長の光を高効率で透過するＲフィルタと、波長５５０ｎｍ程度の中間波長の光を高効率で透過するＧフィルタとを含み、ベイヤ配列等を構成している。カラーフィルタ１６９と光入射面１５１Ｂとの間には酸化シリコン（ＳｉＯ2）又は窒化シリコン（ＳｉＮ）等からなる絶縁膜１６６が形成されている。カラーフィルタ１６９の上には、平坦化層１７２を介してレンズ１７３が形成されている。 The color filters 169 are formed corresponding to the photoelectric conversion units 161, respectively. The color filter 169 is a B filter that transmits light with a short wavelength of about 450 nm with high efficiency, an R filter that transmits light with a long wavelength of about 650 nm with high efficiency, and light with an intermediate wavelength of about 550 nm. Including a G filter that transmits light with high efficiency, and forms a Bayer array. An insulating film 166 made of silicon oxide (SiO 2 ), silicon nitride (SiN), or the like is formed between the color filter 169 and the light incident surface 151B. A lens 173 is formed on the color filter 169 with a planarizing layer 172 interposed therebetween.
　光入射面１５１Ｂには光入射面１５１Ｂから一定の深さまで高濃度のｐ型不純物を拡散させた高濃度ｐ型層１７０が形成されている。高濃度ｐ型層１７０を形成することにより、光入射面１５１Ｂの結晶欠陥に起因する暗時発生電荷が光電変換部１６１へ流入することを抑え、ノイズを低減できる。電荷検出面１５１Ａには高濃度ｐ型層１７１が形成されている。高濃度ｐ型層１７１を形成することにより、電荷検出面１５１Ａの結晶欠陥に起因する暗時発生電荷が光電変換部１６１へ流入することを抑え、ノイズを低減できる。 A high-concentration p-type layer 170 in which a high-concentration p-type impurity is diffused from the light incident surface 151B to a certain depth is formed on the light incident surface 151B. By forming the high-concentration p-type layer 170, it is possible to suppress the charge generated in the dark due to crystal defects on the light incident surface 151B from flowing into the photoelectric conversion unit 161, and to reduce noise. A high concentration p-type layer 171 is formed on the charge detection surface 151A. By forming the high-concentration p-type layer 171, it is possible to suppress the charge generated in the dark due to the crystal defect of the charge detection surface 151 </ b> A from flowing into the photoelectric conversion unit 161 and to reduce noise.
　一般にＭＯＳ型の固体撮像装置は、多層配線の上にカラーフィルタを形成する。このため、基板面からカラーフィルタまでの距離が大きくなり、斜め入射光による混色の影響を大きく受ける。しかし、本実施形態の固体撮像装置は、カラーフィルタと多層配線とが基板の互いに異なる面に形成されている。このため、基板面からカラーフィルタまでの距離を小さくすることができる。具体的には、従来４μｍ程度であった基板面からカラーフィルタまでの距離を１μｍ程度まで小さくすることができる。これにより混色を半減させることができる。 Generally, a MOS type solid-state imaging device forms a color filter on a multilayer wiring. For this reason, the distance from the substrate surface to the color filter is increased, and it is greatly affected by color mixing due to obliquely incident light. However, in the solid-state imaging device of this embodiment, the color filter and the multilayer wiring are formed on different surfaces of the substrate. For this reason, the distance from the substrate surface to the color filter can be reduced. Specifically, the distance from the substrate surface to the color filter, which was conventionally about 4 μm, can be reduced to about 1 μm. As a result, the color mixture can be halved.
　また、本実施形態の固体撮像装置における分離部１６３は、非晶質シリコン又は多結晶シリコンからなるシリコン層１７５を有している。分離部に酸化膜を埋め込む場合には、分離部のアスペクト比を３以上にすることは困難である。しかし、シリコン層１７５は埋め込み性が優れたＬＰＣＶＤ法により成膜可能である。このため、分離部１６３のアスペクト比を１０～２０程度にまで大きくすることが可能となる。このため、分離部１６３の深さを深くし、斜め入射光による混色をさらに低減することができる。 Further, the separation unit 163 in the solid-state imaging device of the present embodiment has a silicon layer 175 made of amorphous silicon or polycrystalline silicon. When an oxide film is embedded in the separation part, it is difficult to set the aspect ratio of the separation part to 3 or more. However, the silicon layer 175 can be formed by the LPCVD method with excellent embedding properties. For this reason, the aspect ratio of the separation unit 163 can be increased to about 10 to 20. For this reason, the depth of the separation part 163 can be increased, and color mixing due to obliquely incident light can be further reduced.
　さらに、本実施形態においては、分離部１６３を、光入射面１５１Ｂ側にシリコン層１７５を形成し、電荷検出面１５１Ａ側に上部ＳｉＯ2膜１７６が形成された構成としている。このため、分離部１６３の上にパルス伝達配線となるゲート配線及びゲート電極を形成することができる。このため、配線層数を低減でき、低コスト及び短ＴＡＴ（Turn Around Time）の製造が可能となる。 Further, in the present embodiment, the separating portion 163 is configured such that the silicon layer 175 is formed on the light incident surface 151B side, and the upper SiO 2 film 176 is formed on the charge detection surface 151A side. For this reason, a gate wiring and a gate electrode which are pulse transmission wirings can be formed on the separation portion 163. Therefore, the number of wiring layers can be reduced, and low cost and short TAT (Turn Around Time) can be manufactured.
　具体的には、本実施形態の固体撮像装置における分離部１６３は、幅が０．２μｍで電荷検出面１５１Ａからの深さが２．０μｍ程度の分離溝に、電荷検出面１５１Ａからの深さが０．３μｍ程度の位置までシリコン層１７５を埋め込み、シリコン層１７５よりも電荷検出面１５１Ａ側には、酸化シリコンからなる上部ＳｉＯ2膜１７６を形成している。上部ＳｉＯ2膜１７６は、電荷検出面１５１Ａから５０ｎｍ程度突出するように形成されている。このような構成とすることにより、光電変換部１６１におけるｎ型不純物の濃度が最大となる位置が、分離部１６３の電荷検出面１５１Ａから最も深い位置よりも電荷検出面１５１Ａ側となる。これにより、長波長の光が隣接する画素へ侵入することを低減できる。Ｒフィルタが設けられた画素と隣接するＧフィルタが設けられた画素の出力値に対する、Ｒフィルタが設けられた画素の出力値の比として算出した混色特性は約０．５％となる。一般的に、シリコン基板へ入射した光の強度が半減する深さは、波長が４５０ｎｍの場合には０．３μｍ程度であり、波長が５５０ｎｍの場合には０．８μｍ程度であり、波長が６５０ｎｍの場合には、２．３μｍ程度である。このように、長波長の光の方がシリコン基板の深い位置まで到達するため、斜め入射光による混色が顕在化しやすい。 Specifically, the separation unit 163 in the solid-state imaging device of the present embodiment has a depth from the charge detection surface 151A in a separation groove having a width of 0.2 μm and a depth from the charge detection surface 151A of about 2.0 μm. The silicon layer 175 is buried up to a position of about 0.3 μm, and an upper SiO 2 film 176 made of silicon oxide is formed on the charge detection surface 151A side of the silicon layer 175. The upper SiO 2 film 176 is formed so as to protrude from the charge detection surface 151A by about 50 nm. With such a configuration, the position where the concentration of the n-type impurity in the photoelectric conversion unit 161 is maximum is closer to the charge detection surface 151A than the deepest position from the charge detection surface 151A of the separation unit 163. Thereby, it is possible to reduce long-wavelength light from entering adjacent pixels. The color mixture characteristic calculated as the ratio of the output value of the pixel provided with the R filter to the output value of the pixel provided with the G filter adjacent to the pixel provided with the R filter is about 0.5%. In general, the depth at which the intensity of light incident on a silicon substrate is halved is about 0.3 μm when the wavelength is 450 nm, about 0.8 μm when the wavelength is 550 nm, and the wavelength is 650 nm. In this case, it is about 2.3 μm. In this way, since long wavelength light reaches a deeper position on the silicon substrate, color mixing due to obliquely incident light is likely to be manifested.
　また、分離部１６３は、分離溝の底面及び側面に形成された側部ＳｉＯ2膜１７７を有している。このため、分離溝の側面に発生する結晶欠陥を低減することができ、暗時発生電荷に起因した感度低下を抑えることができる。側部ＳｉＯ2膜１７７は例えば、膜厚を１０ｎｍ程度とすればよい。 Further, the separation part 163 has a side SiO 2 film 177 formed on the bottom and side surfaces of the separation groove. For this reason, crystal defects generated on the side surface of the separation groove can be reduced, and a decrease in sensitivity due to dark generated charges can be suppressed. For example, the side SiO 2 film 177 may have a thickness of about 10 nm.
　本実施形態の固体撮像装置にシリコン層１７５を接地電位としたり、負電圧を印加したりしてもよい。画素数が３０万程度の固体撮像装置において、暗時の出力が６９ｍＶ以上の画素が１００００画素程度であった場合、側部ＳｉＯ2膜１７７を設けることにより１０００画素以下まで減少させることができる。さらに、シリコン層１７５に－３Ｖの電圧を印加すると、分離溝の側壁に１×１０18／ｃｍ3程度の濃度のホール蓄積層を形成できる。これにより、結晶欠陥の界面準位から発生する電荷を低減でき、暗時の出力が６９ｍＶ以上の画素数を１０画素以下にまで低減できる。 The silicon layer 175 may be set to the ground potential or a negative voltage may be applied to the solid-state imaging device of the present embodiment. In a solid-state imaging device having about 300,000 pixels, when the number of pixels having a dark output of 69 mV or more is about 10,000 pixels, the side SiO 2 film 177 can be provided to reduce the number to 1000 pixels or less. Further, when a voltage of −3 V is applied to the silicon layer 175, a hole accumulation layer having a concentration of about 1 × 10 18 / cm 3 can be formed on the side wall of the isolation trench. Thereby, the charge generated from the interface state of the crystal defect can be reduced, and the number of pixels whose output in the dark is 69 mV or more can be reduced to 10 pixels or less.
　また、半導体基板１５１をＳＯＩ基板としてもよい。一般に、ＳＯＩ基板中に拡散したＦｅ元素及びＮｉ元素は２００ｎｍ程度の埋め込み酸化（ＢＯＸ）層を拡散することが困難である。このため、Ｓｉ基板においてゲッタリングされず、ＳＯＩ層の上に残存する。従って、暗時の出力が６９ｍＶ以上の画素が増加し、特性が悪化する。これを回避するために、ＳＯＩ層にゲッタリング箇所を設けた場合には、ゲッタリング箇所に結晶欠陥が集中するため、熱による発生電荷が増大し、暗時の出力が６９ｍＶ以上の画素が増加してしまう。一方、分離部１６３にシリコン層１７５を設けた場合には、光電変換部１６１から隔離された箇所に、Ｆｅ元素及びＮｉ元素をゲッタリングすることが可能となる。この場合ＳＯＩ基板のシリコン層から９８％程度吸収することができる。このため、画素数が３０万程度の固体撮像装置において、暗時の出力が６９ｍＶ以上の画素を１０画素以下にまで低減できる。 Further, the semiconductor substrate 151 may be an SOI substrate. In general, it is difficult for the Fe element and Ni element diffused in the SOI substrate to diffuse through a buried oxide (BOX) layer of about 200 nm. For this reason, it is not gettered in the Si substrate and remains on the SOI layer. Accordingly, the number of pixels whose output in the dark is 69 mV or more increases and the characteristics deteriorate. In order to avoid this, when gettering locations are provided in the SOI layer, crystal defects are concentrated at the gettering locations, so that the charge generated by heat increases and the number of pixels whose output in the dark is 69 mV or more increases. Resulting in. On the other hand, when the silicon layer 175 is provided in the separation part 163, it is possible to getter the Fe element and the Ni element in a place isolated from the photoelectric conversion part 161. In this case, about 98% can be absorbed from the silicon layer of the SOI substrate. For this reason, in a solid-state imaging device having about 300,000 pixels, it is possible to reduce the number of pixels having a dark output of 69 mV or more to 10 or less.
　本実施形態の固体撮像装置において、光電変換部１６１は２００ｋｅＶ～２０００ｋｅＶの注入エネルギーにより形成し、不純物濃度を１×１０14／ｃｍ3～１×１０17／ｃｍ3とすればよい。分離拡散層１６４は１００ｋｅＶ～３０００ｋｅＶの注入エネルギーにより形成し、不純物濃度を１×１０15／ｃｍ3～１×１０18／ｃｍ3とすればよい。高濃度ｐ型層１７０及び高濃度ｐ型層１７１は、１ｋｅＶ～１００ｋｅＶの注入エネルギーにより形成し、不純物濃度を１×１０17／ｃｍ3～１×１０20／ｃｍ3とすればよい。高濃度ｐ型層１７０の不純物濃度を高濃度とすることにより、発生電荷のライフタイムが短くなり、結晶欠陥に起因して発生する電荷の光電変換部１６１への流入を防止できる。高濃度ｐ型層１７１により、全画素において光電変換部１６１の一部分は電荷検出面１５１Ａからの深さが等しくなっており、光電変換部１６１から浮遊拡散部への蓄積電荷の転送は、光電変換部１６１の浅い部分において行う。 In the solid-state imaging device of this embodiment, the photoelectric conversion unit 161 may be formed with an implantation energy of 200 keV to 2000 keV, and the impurity concentration may be 1 × 10 14 / cm 3 to 1 × 10 17 / cm 3 . The isolation diffusion layer 164 may be formed with an implantation energy of 100 keV to 3000 keV, and the impurity concentration may be 1 × 10 15 / cm 3 to 1 × 10 18 / cm 3 . The high-concentration p-type layer 170 and the high-concentration p-type layer 171 may be formed with an implantation energy of 1 keV to 100 keV, and the impurity concentration may be 1 × 10 17 / cm 3 to 1 × 10 20 / cm 3 . By setting the impurity concentration of the high-concentration p-type layer 170 to a high concentration, the lifetime of the generated charges is shortened, and the inflow of charges generated due to crystal defects into the photoelectric conversion unit 161 can be prevented. Due to the high-concentration p-type layer 171, in all the pixels, a part of the photoelectric conversion unit 161 has the same depth from the charge detection surface 151A, and the transfer of the accumulated charge from the photoelectric conversion unit 161 to the floating diffusion unit is photoelectric conversion. This is performed in a shallow portion of the portion 161.
　以下に、本実施形態の固体撮像装置の製造方法について説明する。まず、図３（ａ）に示すように、ＣＶＤ法により、ＳＯＩ基板又はシリコン基板等の半導体基板１５１の電荷検出面１５１Ａの上に膜厚が１０ｎｍ～２００ｎｍのシリコン窒化膜１８９を形成する。続いて、フォトリソグラフィ法及びドライエッチング法等によりシリコン窒化膜１８９における分離部と対応する箇所に開口部を形成する。 Hereinafter, a method for manufacturing the solid-state imaging device of the present embodiment will be described. First, as shown in FIG. 3A, a silicon nitride film 189 having a thickness of 10 nm to 200 nm is formed on a charge detection surface 151A of a semiconductor substrate 151 such as an SOI substrate or a silicon substrate by a CVD method. Subsequently, an opening is formed at a location corresponding to the separation portion in the silicon nitride film 189 by a photolithography method, a dry etching method, or the like.
　次に、図３（ｂ）に示すように、シリコン窒化膜１８９をハードマスクとして、ドライエッチング法により半導体基板１５１の電荷検出面１５１Ａ側に幅が０．１μｍ～０．５μｍで、深さが１μｍ～５μｍの分離溝１７４を形成する。 Next, as shown in FIG. 3B, the silicon nitride film 189 is used as a hard mask and the width is 0.1 μm to 0.5 μm and the depth is formed on the charge detection surface 151A side of the semiconductor substrate 151 by dry etching. A separation groove 174 of 1 μm to 5 μm is formed.
　次に、図３（ｃ）に示すように分離溝１７４の側面に熱ＣＶＤ法等により、厚さが５ｎｍ～２０ｎｍのＳｉＯ2からなる側部ＳｉＯ2膜１７７を形成する。続いて、ＣＶＤ法によりシリコン層１７５を分離溝１７４に形成した後、エッチバックを行い、側部ＳｉＯ2膜１７７の分離溝１７４の上部０．１μｍ～０．３μｍ程度の部分を除去する。分離溝１７４の結晶欠陥に起因する暗時発生電荷が光電変換部１６１へ流入することを防止するため、側部ＳｉＯ2膜１７７を形成した後に、分離溝１７４の側壁にｐ型不純物を注入することが好ましい。ｐ型不純物の注入条件は、注入エネルギーを５～３０ｋｅＶで、注入濃度を１×１０14／ｃｍ3～１×１０19／ｃｍ3とすればよい。 Next, as shown in FIG. 3C, a side SiO 2 film 177 made of SiO 2 having a thickness of 5 nm to 20 nm is formed on the side surface of the separation groove 174 by a thermal CVD method or the like. Subsequently, after the silicon layer 175 is formed in the separation groove 174 by the CVD method, etch back is performed to remove the upper portion of the separation groove 174 of the side SiO 2 film 177 from about 0.1 μm to 0.3 μm. In order to prevent dark charges generated due to crystal defects in the separation groove 174 from flowing into the photoelectric conversion portion 161, a p-type impurity is implanted into the sidewall of the separation groove 174 after the side SiO 2 film 177 is formed. It is preferable. The p-type impurity may be implanted at an implantation energy of 5 to 30 keV and an implantation concentration of 1 × 10 14 / cm 3 to 1 × 10 19 / cm 3 .
　次に、図３（ｄ）に示すように、ＣＶＤ法によりＳｉＯ2からなる上部ＳｉＯ2膜１７６をシリコン層１７５の上部に形成する。 Next, as shown in FIG. 3 (d), to form an upper SiO 2 film 176 made of SiO 2 by CVD on the silicon layer 175.
　次に、図４（ａ）に示すように、ＣＭＰ法によりシリコン窒化膜１８９上の上部ＳｉＯ2膜１７６を除去した後、ウエットエッチング法によりシリコン窒化膜１８９を除去する。これにより、上部ＳｉＯ2膜１７６が半導体基板の上に５０ｎｍ程度突出した分離部１６３が形成される。続いて、フォトリソグラフィ法及びイオン注入法により、所望の領域に光電変換部１６１、出力回路１６２の拡散層、高濃度ｐ型層１７１及び分離拡散層１６４等を形成する。この後、熱酸化によりゲート酸化膜（図示せず）を形成し、ＣＶＤ法によりゲート電極を形成する。 Next, as shown in FIG. 4A, after the upper SiO 2 film 176 on the silicon nitride film 189 is removed by CMP, the silicon nitride film 189 is removed by wet etching. As a result, an isolation portion 163 in which the upper SiO 2 film 176 protrudes about 50 nm on the semiconductor substrate is formed. Subsequently, the photoelectric conversion unit 161, the diffusion layer of the output circuit 162, the high-concentration p-type layer 171, the separation diffusion layer 164, and the like are formed in a desired region by photolithography and ion implantation. Thereafter, a gate oxide film (not shown) is formed by thermal oxidation, and a gate electrode is formed by a CVD method.
　次に、図４（ｂ）に示すように、層間膜１６５及び配線１６０を、スパッタ法及びＣＶＤ法を用いた成膜と、フォトリソグラフィ法及びドライエッチング法を用いたパターニングとにより形成する。 Next, as shown in FIG. 4B, the interlayer film 165 and the wiring 160 are formed by film formation using a sputtering method and a CVD method and patterning using a photolithography method and a dry etching method.
　次に、図４（ｃ）に示すように、層間膜１６５上に支持基板１９０を貼り付ける。支持基板１９０はシリコン基板等とすればよい。また、石英基板等を用いてもよい。 Next, as shown in FIG. 4C, a support substrate 190 is attached on the interlayer film 165. The support substrate 190 may be a silicon substrate or the like. Further, a quartz substrate or the like may be used.
　次に、図５（ａ）に示すように、半導体基板１５１の電荷検出面１５１Ａと反対側の面をバックグラインド及びウエットエッチングして、光電変換部１６１が露出した光入射面１５１Ｂを形成する。続いて、イオン注入法により、光入射面１５１Ｂ側に高濃度ｐ型層１７０を形成する。高濃度ｐ型層１７０の形成は、注入エネルギーを１ｋｅＶ～１００ｋｅＶとし、不純物濃度を１×１０17／ｃｍ3～１×１０20／ｃｍ3とすればよい。 Next, as shown in FIG. 5A, the surface opposite to the charge detection surface 151A of the semiconductor substrate 151 is back-ground and wet etched to form a light incident surface 151B where the photoelectric conversion portion 161 is exposed. Subsequently, a high concentration p-type layer 170 is formed on the light incident surface 151B side by ion implantation. The high-concentration p-type layer 170 may be formed by setting the implantation energy to 1 keV to 100 keV and the impurity concentration to 1 × 10 17 / cm 3 to 1 × 10 20 / cm 3 .
　続いて、図５（ｂ）に示すように、高濃度ｐ型層１７０の上に、ＣＶＤ法により厚さが０．０５μｍ～１μｍの絶縁膜１６６を形成し、スピン塗布法によりカラーフィルタ１６９を形成する。カラーフィルタ１６９は例えばベイヤ配列とすればよい。続いて、スピン塗布法及びドライエッチング法により平坦化層１７２を介してレンズ１７３を形成する。 Subsequently, as shown in FIG. 5B, an insulating film 166 having a thickness of 0.05 μm to 1 μm is formed on the high-concentration p-type layer 170 by a CVD method, and a color filter 169 is formed by a spin coating method. Form. The color filter 169 may be a Bayer array, for example. Subsequently, a lens 173 is formed through the planarization layer 172 by a spin coating method and a dry etching method.
　分離部１６３は、電荷検出面１５１Ａからの深さが光電変換部１６１における不純物濃度が最も高い位置よりも深ければよい。従って、図６に示すように、分離部１６３が高濃度ｐ型層１７０に達していてもよい。この場合、例えば半導体基板１５１の厚さと３μｍとし、分離部１６３を形成する分離溝を幅が０．３μｍで深さが２．８μｍとすればよい。分離部１６３が高濃度ｐ型層１７０に達している場合には、隣接する光電変換部１６１を物理的に分離することができる。このため、混色特性をさらに改善することができる。Ｒフィルタが設けられた画素と隣接するＧフィルタが設けられた画素における出力値に対するＲフィルタが設けられた画素の出力値の比は、最終的に約０．０１％となる。 The separation unit 163 only needs to be deeper than the position where the impurity concentration in the photoelectric conversion unit 161 is the highest from the charge detection surface 151A. Therefore, as shown in FIG. 6, the separation part 163 may reach the high concentration p-type layer 170. In this case, for example, the thickness of the semiconductor substrate 151 may be 3 μm, and the separation groove forming the separation portion 163 may have a width of 0.3 μm and a depth of 2.8 μm. When the separation unit 163 reaches the high-concentration p-type layer 170, the adjacent photoelectric conversion unit 161 can be physically separated. For this reason, the color mixing characteristics can be further improved. The ratio of the output value of the pixel provided with the R filter to the output value of the pixel provided with the G filter adjacent to the pixel provided with the R filter is finally about 0.01%.
　本開示に係る固体撮像装置は、感度の向上及び混色の低減が可能であり、特に電荷の取り出しを光入射面と反対側の面から行う固体撮像装置等として有用である。 The solid-state imaging device according to the present disclosure can improve sensitivity and reduce color mixing, and is particularly useful as a solid-state imaging device that performs charge extraction from a surface opposite to the light incident surface.
１００　　　画素
１０２　　　浮遊拡散層
１０３　　　転送トランジスタ
１０４　　　増幅トランジスタ
１０５　　　リセットトランジスタ
１０６　　　選択トランジスタ
１０８　　　垂直シフトレジスタ
１０９　　　水平シフトレジスタ
１１１　　　出力信号線
１１２　　　出力端子
１５１　　　半導体基板
１５１Ａ　　電荷検出面
１５１Ｂ　　光入射面
１６０　　　配線
１６１　　　光電変換部
１６２　　　出力回路
１６３　　　分離部
１６４　　　分離拡散層
１６５　　　層間膜
１６６　　　絶縁膜
１６９　　　カラーフィルタ
１７０　　　高濃度ｐ型層
１７１　　　高濃度ｐ型層
１７２　　　平坦化層
１７３　　　レンズ
１７４　　　分離溝
１７５　　　シリコン層
１７６　　　上部ＳｉＯ2膜
１７７　　　側部ＳｉＯ2膜
１８９　　　シリコン窒化膜
１９０　　　支持基板 100 pixel 102 floating diffusion layer 103 transfer transistor 104 amplification transistor 105 reset transistor 106 selection transistor 108 vertical shift register 109 horizontal shift register 111 output signal line 112 output terminal 151 semiconductor substrate 151A charge detection surface 151B light incident surface 160 wiring 161 photoelectric conversion unit 162 Output circuit 163 Separating section 164 Separating diffusion layer 165 Interlayer film 166 Insulating film 169 Color filter 170 High-concentration p-type layer 171 High-concentration p-type layer 172 Flattening layer 173 Lens 174 Separation groove 175 Silicon layer 176 Upper SiO 2 film 177 side SiO 2 film 189 Silicon nitride film 190 Support substrate

Claims (7)

  1. 　固体撮像装置は、
    　光入射面及び電荷検出面を有する半導体基板と、
    　前記半導体基板に形成され、第１導電型の不純物を含む複数の光電変換部と、
    　前記光電変換部の間に形成され、前記半導体基板に埋め込まれたシリコン層を有する分離部と、
    　前記光入射面側に形成されたカラーフィルタと、
    　前記電荷検出面側に形成された出力回路とを備え、
    　前記シリコン層は、非晶質シリコン又は多結晶シリコンからなる。     Solid-state imaging device
    A semiconductor substrate having a light incident surface and a charge detection surface;
    A plurality of photoelectric conversion units formed on the semiconductor substrate and including impurities of a first conductivity type;
    A separation unit formed between the photoelectric conversion units and having a silicon layer embedded in the semiconductor substrate;
    A color filter formed on the light incident surface side;
    An output circuit formed on the charge detection surface side,
    The silicon layer is made of amorphous silicon or polycrystalline silicon.
  2. 　請求項１に記載の固体撮像装置において、
    　前記分離部は、前記シリコン層と前記半導体基板との間に形成された側部シリコン酸化膜を有している。     The solid-state imaging device according to claim 1,
    The isolation part has a side silicon oxide film formed between the silicon layer and the semiconductor substrate.
  3. 　請求項１に記載の固体撮像装置において、
    　前記分離部は、前記シリコン層よりも前記電荷検出面側に形成された上部シリコン酸化膜を有し、
    　前記上部シリコン酸化膜は、前記電荷検出面から突出している。     The solid-state imaging device according to claim 1,
    The separation part has an upper silicon oxide film formed on the charge detection surface side of the silicon layer,
    The upper silicon oxide film protrudes from the charge detection surface.
  4. 　請求項１に記載の固体撮像装置において、
    　前記シリコン層は、リン、ホウ素又は砒素を含む。     The solid-state imaging device according to claim 1,
    The silicon layer includes phosphorus, boron, or arsenic.
  5. 　請求項１に記載の固体撮像装置において、
    　前記シリコン層は、負電圧が印加されている。     The solid-state imaging device according to claim 1,
    A negative voltage is applied to the silicon layer.
  6. 　請求項１に記載の固体撮像装置において、
    　前記光電変換部における前記第１導電型の不純物の濃度が最大となる位置は、前記分離部における最も前記光入射面側の位置よりも、前記光入射面側である。     The solid-state imaging device according to claim 1,
    The position where the concentration of the first conductivity type impurity in the photoelectric conversion unit is maximum is closer to the light incident surface than the position closest to the light incident surface in the separation unit.
  7. 　請求項１に記載の固体撮像装置は、
    　前記光入射面に形成され、第２導電型の不純物を含む第２導電型層をさらに備え、
    　前記分離部は、前記電荷検出面から前記第２導電型層に達する。     The solid-state imaging device according to claim 1,
    A second conductivity type layer formed on the light incident surface and including a second conductivity type impurity;
    The separation unit reaches the second conductivity type layer from the charge detection surface.
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