WO2011066668A1 - Procédé de gravure d'attributs dans un substrat - Google Patents

Procédé de gravure d'attributs dans un substrat Download PDF

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Publication number
WO2011066668A1
WO2011066668A1 PCT/CN2009/001358 CN2009001358W WO2011066668A1 WO 2011066668 A1 WO2011066668 A1 WO 2011066668A1 CN 2009001358 W CN2009001358 W CN 2009001358W WO 2011066668 A1 WO2011066668 A1 WO 2011066668A1
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WO
WIPO (PCT)
Prior art keywords
gas
etching
feature
silicon
dimensional control
Prior art date
Application number
PCT/CN2009/001358
Other languages
English (en)
Inventor
Darrell Larue Mcreynolds
Original Assignee
C Sun Mfg. Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by C Sun Mfg. Ltd. filed Critical C Sun Mfg. Ltd.
Priority to PCT/CN2009/001358 priority Critical patent/WO2011066668A1/fr
Publication of WO2011066668A1 publication Critical patent/WO2011066668A1/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching

Definitions

  • This present invention relates to the field of deep etching features into a substrate material and particular to manufacturing industries. These industries include semiconductor, micro-electronics machines (MEMS), packaging, solar cell (PV), automotive, aerospace, electronics, chemistry and research / development, although the invention is equally applicable to any other related industries.
  • MEMS micro-electronics machines
  • PV solar cell
  • automotive aerospace, electronics, chemistry and research / development, although the invention is equally applicable to any other related industries.
  • the largest known invention of etching deep features using a plasma reactor is known as the "Bosch" process.
  • US Patent 5501893. The Bosch process utilizes fluorine chemistry for etching then a second processing step for passivation.
  • the passivation step primarily utilizes a fluorocarbon based chemistry, such as CxFy or CHFx.
  • the two process steps switch simultaneously to produce deep features with a scalloping rough sidewall.
  • Another invention is a process produced by Lam Research Corp. US Patent 6191043. This process utilizes a fluorine etching gas and a reactive oxygen gas to form a Si02 oxidation of the etched feature material during a continuous etching process. Argon is added as a sputtering gas to keep the etch from stopping from the oxide passivation. Helium is also added to evenly distribute the etching temperature for a uniformed etch depth result. This process produces a large feature size change, called a critical dimension bias (CD bias) due to insufficient passivation of the etched feature. The dimension is critical to most applications in all industries and has limited use.
  • CD bias critical dimension bias
  • the present Applicant has developed a unique etching chemistry that forms a silicon monoxide (SiO) sidewall passivation instead of a Silicon Dioxide (Si02) passivation.
  • This ionic sidewall passivation allows grater feature control and a smaller CD bias, compared to a helium assisted plasma.
  • a higher temperature is achieved to ionically form a Silicon Monoxide reaction growth of the silicon substrate and the oxygen passivation gas.
  • Argon or Xenon or Boron is still required to sputter the etching material to prevent the etch from stopping from silicon monoxide growth, at the etching front.
  • a feature control gas can be added to further influence feature dimension control, to reduce further CD bias, to the original size of the patterned feature prior to etching.
  • This feature control gas can form a SiN passivation, using a nitrogen gas, or sidewall deposition of carbon.
  • the carbon source can come from a carbon or fluorocarbon type gas (CO, CFx, CxFy, etc.) or by hydrocarbon (CHFx) and in some cases a hydrogen bromide (HBr) gas can be used, or any combinations of these elements.
  • a method of etching a feature in a substrate employing a plasma formed from a gas chemistry comprising: Fluorine, Oxygen and Argon.
  • the method according to the present invention surprisingly and advantageously creates a SiO sidewall passivation to greatly improve the CD bias by at least 20% to 50% compared to etching with a helium addition.
  • the method according to the present invention can also have, but not required, an additional feature control gas composing of a nitrogen or a carbon source from a carbon or fluorocarbon type gas (CO, CFx, CxFy, etc.) or by hydrocarbon (CHFx) and in some cases hydrogen bromide (HBr).
  • an additional feature control gas composing of a nitrogen or a carbon source from a carbon or fluorocarbon type gas (CO, CFx, CxFy, etc.) or by hydrocarbon (CHFx) and in some cases hydrogen bromide (HBr).
  • the amount of the feature control gas is usually kept low to avoid heavy deposition which will block the etching feature.
  • the feature control gas chemistry in a concentration of less than 50% by volume.
  • fluorine-containing gas is SF6
  • the fluorine-containing gas is present in said gas chemistry.
  • the amount of fluorine-containing gas is usually kept high and is the dominating gas for the etching rate.
  • the substrate reacting gas is Oxygen.
  • a ratio of fluorine to oxygen is in the range of 2: 1 to 10: 1.
  • the Argon-containing gas is present in the gas chemistry in a concentration between 50 % to 200% by volume.
  • the feature dimensional control gas is a single gas or a group of gases consisting of carbon or fluorocarbon type gas (CO, CFx, CxFy, etc.) or by hydrocarbon (CHFx) and in some cases hydrogen bromide (HBr).
  • CO carbon or fluorocarbon type gas
  • CHFx hydrocarbon
  • HBr hydrogen bromide
  • Figure 1 is a spectral element analysis for two different etching chemistries which show two different etched material by-products.
  • One is an SF6/02/Ar/He etching process that produces a silicon dioxide (Si02) passivation.
  • the other analysis shows an SF6/02/Ar etching process that produces a silicon monoxide (SiO) passivation.
  • Figure 2 is a representation of the dimension control (CD bias) using an SF6/02/Ar/He etching chemistry.
  • Figure 3 is a representation of the dimension control (CD bias) using an SF6/02/Ar etching chemistry.
  • Figure 4 is a representation of the dimension control (CD bias) using an SF6/02/Ar and a dimension control gas etching chemistry.
  • the inventive etching process in accordance with one aspect of this invention is a complex application that produces deep, high aspect ratio openings with precisely controlled sidewall angles and feature dimensions.
  • Etching depth is not restricted to feature size or aspect ratio and etch depths of >250 ⁇ and aspect ratio of > 40: 1 has been achieved.
  • Sidewall angles may be greater than 87 degrees or sloped to 50 degrees depending on the etching requirements.
  • a preferred result of applying this invention is to achieve deep features etched into a silicon layer having all the desired characteristics such as vertical profiles, high etching rates/depth, minimal CD bias, minimal RIE Lag, and silicon etch uniformity.
  • desired characteristics such as vertical profiles, high etching rates/depth, minimal CD bias, minimal RIE Lag, and silicon etch uniformity.
  • a method of etching deep features in a silicon layer using a plasma etching reactor includes the steps of providing a substrate, such as silicon; into a plasma etching reactor and flowing a gas chemistry for the main etch that includes an oxygen reactant gas, a fluorine-containing additive gas, by way of example SF6, and an inert ion bombardment-enhancing, by way of example Ar and in some cases, but not required, a feature control assisting gas, such as a nitrogen or a carbon source gas, is introduced into the plasma etching reactor.
  • a gas chemistry for the main etch that includes an oxygen reactant gas, a fluorine-containing additive gas, by way of example SF6, and an inert ion bombardment-enhancing, by way of example Ar and in some cases, but not required, a feature control assisting gas, such as a nitrogen or a carbon source gas, is introduced into the plasma etching reactor.
  • the etching gas chemistry is released through a gas inlet, into the plasma etching chamber.
  • a substrate such as a wafer is introduced prior to the gas distribution, onto a cooling chuck and RF power is applied to the etching reactor.
  • the other power supply is typically located at the bottom of the plasma etching reactor chamber and applied to the platen the wafer is resting on in the plasma etching chamber. This power supply directs the free radicals towards the wafer and is called the bias power.
  • the source power may range between 300 W to about 6000 W, preferably between 1000W and about 5000 W, and more preferably at about 4500 W in one embodiment.
  • the bias power is typically lower than the source power and may range between 10 W to about 2000 W, preferably between 30 W and about 1700 W, and more preferably at about 1500 W in one embodiment.
  • Helium gas is typically induced between the wafer and wafer platen for temperature cooling.
  • the wafer platen is temperature controlled at room temperatures around 0°C and about 70°C, preferably between about 15°C and about 60°C, more preferably about 20°C in one embodiment.
  • the pressure within the plasma processing chamber is preferably between lOmTorr to about 110 mTorr, preferably between 30 mTorr to about 90 mTorr, more preferably at about 45 mTorr in one embodiment.
  • plasma etching occurs.
  • a combination of the gas ratios are used to meet different requirements of the etched materials, along with varying the plasma etching reactor's conditions.
  • the etching chemistry is typically anisotropic and etch depth occurs at a high speed, typically > 5 ⁇ /minute.
  • Process B,C and D results in a smaller CD bias by the elimination of Helium to produce the silicon monoxide passivation.
  • Figure 1 compares a spectral element analysis for the two different etching chemistries which show two different etched material by-products.
  • One is an SF6/02/Ar/He etching process (Process A) that produces a silicon dioxide (Si02) passivation.
  • the other analysis shows an SF6/02/Ar etching process (Process B) that produces a silicon monoxide (SiO) passivation.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

L'invention concerne un procédé de gravure d'un substrat, comme le silicium, au moyen d'un réacteur à plasma pour former des attributs profonds. Les étapes du procédé consistent à mettre un substrat semi-conducteur comprenant, mais sans s'y limiter, une couche de silicium, dans un réacteur à plasma, et à faire circuler un gaz de gravure qui comprend un gaz de gravure fluoré, un gaz réactif de passivation comprenant de l'oxygène et un gaz de pulvérisation inerte. Un gaz additionnel peut être ajouté, mais pas nécessairement, comme l'azote, le monoxyde de carbone, CFx, CHFx, CxFy ou le bromure d'hydrogène, pour assister au contrôle dimensionnel de l'attribut. Le gaz de contrôle dimensionnel de l'attribut peut contrôler la taille de l'attribut et l'angle de gravure. Le procédé favorise en outre une passivation des parois latérales au monoxyde de silicium pour améliorer le contrôle dimensionnel de l'attribut.
PCT/CN2009/001358 2009-12-02 2009-12-02 Procédé de gravure d'attributs dans un substrat WO2011066668A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2009/001358 WO2011066668A1 (fr) 2009-12-02 2009-12-02 Procédé de gravure d'attributs dans un substrat

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2009/001358 WO2011066668A1 (fr) 2009-12-02 2009-12-02 Procédé de gravure d'attributs dans un substrat

Publications (1)

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WO2011066668A1 true WO2011066668A1 (fr) 2011-06-09

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6191043B1 (en) * 1999-04-20 2001-02-20 Lam Research Corporation Mechanism for etching a silicon layer in a plasma processing chamber to form deep openings
CN1109357C (zh) * 1997-12-24 2003-05-21 日本电气株式会社 半导体器件生产方法
CN1973363A (zh) * 2004-06-21 2007-05-30 东京毅力科创株式会社 等离子体处理装置和方法
CN101110361A (zh) * 2006-07-19 2008-01-23 东京毅力科创株式会社 等离子体蚀刻方法及计算机可读取的存储介质

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1109357C (zh) * 1997-12-24 2003-05-21 日本电气株式会社 半导体器件生产方法
US6191043B1 (en) * 1999-04-20 2001-02-20 Lam Research Corporation Mechanism for etching a silicon layer in a plasma processing chamber to form deep openings
CN1973363A (zh) * 2004-06-21 2007-05-30 东京毅力科创株式会社 等离子体处理装置和方法
CN101110361A (zh) * 2006-07-19 2008-01-23 东京毅力科创株式会社 等离子体蚀刻方法及计算机可读取的存储介质

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