WO2011037961A2 - Procédé et système de formation de germanium sur du silicium - Google Patents

Procédé et système de formation de germanium sur du silicium Download PDF

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Publication number
WO2011037961A2
WO2011037961A2 PCT/US2010/049766 US2010049766W WO2011037961A2 WO 2011037961 A2 WO2011037961 A2 WO 2011037961A2 US 2010049766 W US2010049766 W US 2010049766W WO 2011037961 A2 WO2011037961 A2 WO 2011037961A2
Authority
WO
WIPO (PCT)
Prior art keywords
semiconductor structure
gaseous mixture
wafer
deposition
hydrogen
Prior art date
Application number
PCT/US2010/049766
Other languages
English (en)
Other versions
WO2011037961A3 (fr
Inventor
Lionel C. Kimerling
Kazumi Wada
Yasuhiko Ishikawa
Jiro Osaka
Original Assignee
Massachusetts Institute Of Technology
The University Of Tokyo
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Massachusetts Institute Of Technology, The University Of Tokyo filed Critical Massachusetts Institute Of Technology
Publication of WO2011037961A2 publication Critical patent/WO2011037961A2/fr
Publication of WO2011037961A3 publication Critical patent/WO2011037961A3/fr

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02658—Pretreatments
    • H01L21/02661—In-situ cleaning

Definitions

  • the invention is related to the field of semiconductor deposition, and in particular to a deposition process of forming Ge on Si.
  • Chemical vapor deposition (CVD) techniques have been used in the fabrication of Ge films on Si.
  • the following process steps are used for the deposition: cleaning Si wafers in hydrogen flouride (HF) solution to remove Si02 layer on the surface, terminating the Si surface with hydrogen; deposition of thin SiGe and/or Ge (typically below 100 nm in thickness) at a low temperature of 300 - 500°C; and deposition of thicker Ge at a higher temperature, typically 600°C.
  • HF hydrogen flouride
  • the Ge films deposited using the above method contain a number of defects such as dislocations, leading to poor-performance Ge devices, e.g., Ge pin photodiodes with a leakage current more than 100 A/cm2.
  • a post-deposition annealing at a high temperature of 800 - 900°C is effective for the reduction of defects and the leakage current.
  • the annealing temperature is too high for the CMOS backend process, which requires the process temperature lower than 450°C.
  • a method of forming Ge on a semiconductor structure includes providing a Si-based semiconductor structure being exposed to a HF treatment. Also, the method includes removing hydrogen from a surface having Si associated with the Si-based semiconductor structure. A gaseous mixture of Ge molecules is deposited on the surface. Furthermore, the method includes forming a Ge layer on the surface after a specified time of exposing the surface to the gaseous mixture.
  • a system for forming Ge on a semiconductor structure includes a surface treatment chamber for removing hydrogen from a surface having Si associated with the semiconductor structure.
  • a deposition chamber deposits on the surface a gaseous mixture of Ge molecules so as to form a Ge layer on the surface after a specified time of exposing the surface to the gaseous mixture.
  • FIGs. 1A-1 D are schematic diagram illustrating the process flow of the invention.
  • FIG. 2 is a schematic diagram illustrating the system for performing the invention
  • FIGs. 3A-3B are atomic force microscope images taken for Ge surfaces grown at 370°C in accordance with the invention and the conventional method;
  • FIG. 4 is a graph illustrating I-V curves for Ge pin photodiodes formed in accordance with the invention.
  • FIGs. 5A-5B are atomic force microscope images taken for mesa structure formed in accordance with the invention and the conventional method. DETAILED DESCRIPTION OF THE INVENTION
  • the invention provides a technique for efficiently reducing defects formed when Ge is deposited on a Si wafer.
  • the invention produces smooth films on a Si wafer at low temperatures below 450°C, when hydrogen is removed from the starting Si wafer surface before the Ge deposition.
  • FIGs. 1A-1D are schematic diagrams illustrating the deposition process used in accordance with the invention.
  • FIG. 1A shows a Si wafer 2 that is terminated with hydrogen (H) by a FTF treatment.
  • the invention requires that the terminated hydrogen molecules be removed by desorption as shown in FIG. I B.
  • Desorption of hydrogen can be accomplished using thermally, UV, or plasma radiation or either known techniques of removing hydrogen on a semiconductor surface such as Si.
  • FIG. 1C shows after the removal of hydrogen from the surface of the Si wafer 2, Ge nucleation is performed using Gell4 thru either chemical vapor deposition or other deposition techniques on the surface of the Si wafer 2.
  • a Ge layer 4 can be formed as shown in FIG. ID.
  • some hydrogen atoms are spontaneously decomposed from the Si surface with time, and Ge reacts selectively to the exposed Si areas to deposit Ge islands on Si.
  • This process ends with a planar Ge epitaxial layer on Si, but the surface roughness is large.
  • the islanding problem is induced by the fact that two reactions of hydrogen removal and Ge growth on Si simultaneously occur.
  • the present invention claims it separates these reactions by removing hydrogen from the surface of the Si wafer 2, and then deposition of Ge on the hydrogen-free surface of the Si wafer 2. This suppresses such a random Ge islanding.
  • FIG. 2 shows the system 10 used in performing the invention.
  • the system 10 includes a surface treatment chamber 12 where the Si wafer 2 is exposed to a radiation source that produces UV, plasma, or thermal radiation to remove hydrogen molecules on the Si wafer 2 produced during a HF treatment. Afterwards, the Si wafer 2 is then presented to a CVD chamber 12 where Ge deposition occurs on the hydrogen-less surface of the Si wafer 2 to form the Ge epi layer 4. Other types of deposition techniques can be used by the chamber 12 for depositing Ge on the Si wafer 2.
  • the invention produces smooth Ge films that can be formed at low temperatures below 450°C, when the hydrogen is removed from the starting Si wafer surface before the Ge deposition, as shown in FIG. 3A.
  • the conventional method leads to a rough Ge surface, as in FIG. 3B.
  • thicker films can be deposited at low temperatures due to the reactive Si surface without hydrogen. This enhanced deposition rate is effective to reduce the deposition time (gas consumption) for the required film thickness.
  • FIG. 4 shows the relationship of dark current in Ge pin diodes formed in accordance with the invention.
  • FIG. 4 shows the dark current at the reverse bias of 1 V is reduced from -200 A/cm2 to -50 A/cm2. This indicates that the defects causing the carrier generation are decreased, meaning the growth of high-quality Ge.
  • the reduced dark current is also effective for simple Ge pn devices and metal/Ge Schottky devices, which have a depletion layer comprising Ge.
  • FIGs. 5A-5B shows the formation of Ge mesas structures on Si.
  • FIG. 5A shows two mesas structure 22, 24.
  • the mesa structure 22 includes a structure 26 having Si wafer being covered by S1O2.
  • An exposed Si region 28 is formed on the structure 26 for the deposition of Ge.
  • the mesa structure 24 illustrates the smooth surface of Ge growth formed after the removal of hydrogen, in accordance with the invention, of the exposed Si region 28 of the mesa structure 22.
  • the mesa structure 30 is similar to the mesa structure 22 prior to processing.
  • the mesa structure 32 shows deformations on the exposed Si region 28 and layer 26 associated with depositing Ge using the conventional method and smoothing. Also, conventional HF cleaning etches the S1O2 mask of structure 26, So, the HF cleaning time tends to be shortened.
  • the S1O2 mask is hydrophilic and water remains over the Ge selective growth areas after a DI water rinse. Note the mesa structure 24 shows no deformation or damage.
  • the invention produces a significant difference in selective epi yield. Typically this yield is close to 100%, whereas the conventional method produces a yield of 10-50%.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

La présente invention concerne un procédé et un système de formation de Ge sur une structure semi-conductrice. L'hydrogène est éliminé d'une surface sur laquelle du Si est associé à la structure semi-conductrice. Un mélange gazeux de molécules de Ge est déposé sur la surface pour former une couche de Ge sur la surface après une durée d'exposition spécifiée de la surface au mélange gazeux.
PCT/US2010/049766 2009-09-22 2010-09-22 Procédé et système de formation de germanium sur du silicium WO2011037961A2 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US24467809P 2009-09-22 2009-09-22
US61/244,678 2009-09-22

Publications (2)

Publication Number Publication Date
WO2011037961A2 true WO2011037961A2 (fr) 2011-03-31
WO2011037961A3 WO2011037961A3 (fr) 2011-09-22

Family

ID=43796457

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2010/049766 WO2011037961A2 (fr) 2009-09-22 2010-09-22 Procédé et système de formation de germanium sur du silicium

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WO (1) WO2011037961A2 (fr)

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5259918A (en) * 1991-06-12 1993-11-09 International Business Machines Corporation Heteroepitaxial growth of germanium on silicon by UHV/CVD
CN100399586C (zh) * 2002-06-19 2008-07-02 麻省理工学院 Ge光电探测器

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