WO2010128586A1 - Imaging apparatus - Google Patents

Abstract

Disclosed is an imaging apparatus which achieves higher image quality with reduced noise, has minimal light-emitting phenomena at the corners of the screen, and consumes less power. To achieve this, a solid state imaging element (13) is provided with a switch (8) which connects the drive terminal of a vertical transfer unit (3) to either a vertical transfer clock generator (6) or a constant voltage source (10), and a switch (9) which connects the drive terminal of a horizontal transfer unit (4) to either a horizontal transfer clock generator (7) or a constant voltage source (11). By switching the switches (8, 9) by a control circuit (12), the drive terminal of the vertical transfer unit (3) is connected to the constant voltage source (10) and the drive terminal of the horizontal transfer unit (4) is connected to the constant voltage source (11) for all or part of the exposure period, and the feeding of the transfer clock to the solid stage imaging element (13) is halted for all or part of the exposure period.

Description

Imaging device

The present invention relates to an imaging apparatus having a solid-state imaging device.

4 and 10 show the configuration of an imaging apparatus using a conventional solid-state imaging device.

As shown in FIG. 4, the imaging apparatus includes a plurality of light receiving units 1 that photoelectrically convert an incident light image of a subject to accumulate charges, and a light shielding unit that mechanically blocks light incident on the plurality of light receiving units 1. 2, a vertical transfer unit 3 that reads out the pixel charges accumulated in the plurality of light receiving units 1 and transfers them in the vertical direction, a horizontal transfer unit 4 that transfers the pixel charges transferred from the vertical transfer unit 3 in the horizontal direction, An amplifying circuit 5 that converts, amplifies and outputs the pixel charge transferred from the horizontal transfer unit 4, and a vertical transfer clock generator 6 that generates a vertical transfer clock that drives the vertical transfer unit 3 and supplies the vertical transfer clock to the vertical transfer unit 3. And a horizontal transfer clock generator 7 that generates a horizontal transfer clock for driving the horizontal transfer unit 4 and supplies the horizontal transfer clock to the horizontal transfer unit 4. Among these, the solid-state imaging device 13 is configured by the plurality of light receiving units 1, the light shielding unit 2, the vertical transfer unit 3, the horizontal transfer unit 4, and the amplifier circuit 5.

Further, as shown in FIG. 10, the output of the amplifier circuit 5 constituting the solid-state imaging device 13 is input to the base terminal of the transistor 22. The transistor 22 has its collector terminal connected to a power source, and a resistor 23 is inserted between the emitter terminal and the ground to constitute an emitter follower circuit. The output of the emitter terminal of the transistor 22 is an analog front-end circuit (abbreviated as AFE in the figure) composed of an analog signal processing circuit and an A / D conversion circuit via a capacitor 24 for removing a DC potential. Input) 25. The digital output of the analog front end circuit 25 is input to a digital signal processing circuit (abbreviated as DSP in the figure) 26. A memory 27 is provided for temporarily storing data during the signal processing of the digital signal processing circuit 26.

The vertical transfer clock generator 6 and the horizontal transfer clock generator 7 are formed in the same circuit block as the analog front end circuit 25 in this example.

The driving method of this imaging apparatus will be described based on the timing chart of FIG. In FIG. 5, symbol VD indicates a vertical synchronization signal, symbol HD indicates a horizontal synchronization signal, symbol φH indicates a horizontal transfer clock, symbol φV indicates a vertical transfer clock, and symbol SUB indicates a charge discharge pulse. Symbol MS indicates the open / closed state of the light shielding unit (mechanical shutter).

The imaging operation period of the solid-state imaging device includes an exposure period 14 in which photoelectric conversion and charge accumulation are performed by the plurality of light receiving units 1, and a signal transfer period in which the accumulated charges are output via the vertical transfer unit 3 and the horizontal transfer unit 4. 15.

The light-shielding unit 2 is closed during the signal transfer period 15 and is open during periods other than the signal transfer period 15 (including the exposure period 14). Further, the charge discharge pulse SUB stops during the exposure period 14, the signal transfer period 15, and a certain period thereafter, and is periodically given to the substrate of the solid-state imaging device 13, thereby sweeping out accumulated charges. Done.

In the conventional technique, the vertical transfer clock φV and the horizontal transfer clock φH are continuously supplied in both the exposure period 14 and the signal transfer period 15.

JP 2004-235691 A

In the conventional driving method, the vertical transfer clock φV and the horizontal transfer clock φH are continuously supplied to the solid-state imaging device 13 in both the exposure period 14 and the signal transfer period 15.

In addition, the transistor 22, the analog front end circuit 25, the digital signal processing circuit 26, and the memory 27 constituting the emitter follower continue to operate in both the exposure period 14 and the signal transfer period 15.

This has the following problems.

(1) While the amount of charge photoelectrically converted and accumulated in the light receiving unit 1 is about several mV to several hundred mV, the vertical transfer clock φV and the horizontal transfer clock φH have voltage amplitudes of several V or more. Have. By supplying the vertical transfer clock φV and the horizontal transfer clock φH to the solid-state imaging device 13 during the exposure period 14, the vertical transfer clock φV and the horizontal transfer clock φH wrap around the light receiving unit 1 and are accumulated in the light receiving unit 1. It becomes noise to the charge and causes image quality degradation.

In addition, since the transistor 22 constituting the emitter follower is operating during the exposure period 14, a base current flows from the solid-state image sensor 13 to the transistor 22, and this base current flows in the amplifier circuit 5 constituting the solid-state image sensor 13. The charge accumulated in the light receiving unit 1 via the power source or the ground becomes noise, and the solid-state imaging device 13 deteriorates the image quality.

Further, since the analog front end circuit 25 is operating during the exposure period 14, the output digital signal becomes noise with respect to the electric charge accumulated in the light receiving unit 1 via the power supply or ground of the solid-state image pickup device 13, and the image quality. Causes deterioration.
In addition, since the digital signal processing circuit 26 and the memory 27 are operating during the exposure period 14, the digital signals transmitted and received between the digital signal processing circuit 26 and the memory 27 power and ground the solid-state imaging device 13. As a result, the charge accumulated in the light receiving unit 1 becomes noise and deteriorates the image quality.

(2) When the horizontal transfer clock φH is input, the amplifier circuit 5 in the solid-state imaging device 13 also operates. As a result, the amplifier circuit 5 generates heat, and electric charges enter the light receiving unit 1 in the vicinity of the amplifier circuit 5. Therefore, an image can be obtained in which only one corner of the screen corresponding to the portion where the amplifier circuit 5 is provided emits light.

(3) Originally, it is not necessary to supply the vertical transfer clock φV and the horizontal transfer clock φH to the vertical transfer unit 3 and the horizontal transfer unit 4 during the exposure period 14, and the emitter follower is configured during the exposure period 14. The transistor 22, the analog front-end circuit 25, the digital signal processing circuit 26, and the memory 27 that do not necessarily operate and consume unnecessary power.

In recent years, the influence of these problems has been increasing due to the demands for miniaturization of the light receiving portion of the solid-state imaging device, increase in ISO sensitivity, and long exposure.

Therefore, an object of the present invention is to provide an imaging apparatus capable of realizing high image quality with reduced noise, suppression of light emission phenomenon at the corners of the screen, and low power consumption.

In order to solve the above-described problem, an imaging apparatus according to the present invention includes a plurality of light receiving units that photoelectrically convert an incident light image of a subject to accumulate charges during an exposure period in an imaging operation period, and a signal transfer period that follows the exposure period. A light shielding unit that mechanically blocks light incident on a plurality of light receiving units, a vertical transfer unit that reads out pixel charges accumulated in the plurality of light receiving units and transfers them in the vertical direction, and a pixel charge transferred from the vertical transfer unit A horizontal transfer unit that horizontally transfers the pixel charge, an amplifier circuit that converts and amplifies the pixel charge transferred from the horizontal transfer unit, and outputs a vertical transfer clock that drives the vertical transfer unit to generate a vertical transfer unit. The vertical transfer clock generator to be supplied, the horizontal transfer clock generator that generates the horizontal transfer clock for driving the horizontal transfer unit and supplies the horizontal transfer unit to the horizontal transfer unit, and the vertical transfer clock generator in all or part of the exposure period. And a control unit for stopping the supply of the horizontal transfer clock to the feed and the horizontal transfer portion of the vertical transfer clock to the transfer portion.

According to this configuration, the control unit supplies the vertical transfer clock to the vertical transfer unit and the horizontal transfer clock to the horizontal transfer unit during all or part of the exposure period in the imaging operation period of the imaging apparatus. Stopping prevents the vertical transfer clock and horizontal transfer clock from sneaking into the light receiving unit during the exposure period, thereby making the vertical transfer clock and horizontal transfer clock noise for the charge accumulated in the light receiving unit. Image quality degradation can be avoided, and high image quality can be realized.

Further, by stopping the supply of the horizontal transfer clock to the horizontal transfer unit 4 during the exposure period, it is possible to avoid the heat generated in the amplifier circuit during the exposure period and the electric charge from entering the light receiving part near the amplifier circuit. It is possible to suppress the light emission phenomenon at the corners.

Furthermore, since the vertical transfer clock and the horizontal transfer clock are not supplied during all or part of the exposure period, unnecessary power consumption can be eliminated, and low power consumption can be realized. The effect is particularly great during long exposure or high ISO sensitivity photography.

In the imaging apparatus of the present invention, the control unit includes the first and second constant voltage sources, and the first switch that connects the vertical transfer unit to either the vertical transfer clock generator or the first constant voltage source. A second switch that connects the horizontal transfer unit to either the horizontal transfer clock generator or the second constant voltage source, and the first switch in all or part of the exposure period within the imaging operation period. It is preferable that the configuration includes a control circuit that switches to the first constant voltage source side and switches the second switch to the second constant voltage source side.

According to this configuration, means for starting / stopping the supply of the vertical transfer clock to the vertical transfer unit and starting / stopping the supply of the horizontal transfer clock to the horizontal transfer unit can be easily realized.

As described above, in the case of the configuration in which the first and second switches are switched by the control circuit, the control circuit uses the first and second switches as a trigger when the light shielding unit is released from the light shielding state. And the second constant voltage source side, and then the first switch is switched to the vertical transfer clock generator side and the second switch is generated as a horizontal transfer clock, triggered by the light-shielding unit changing from the released state to the light-shielded state. It is preferable that it is the structure switched to the container side.

According to this configuration, the vertical transfer clock generator and the horizontal transfer clock generator continue to generate clocks, and the supply of the vertical transfer clock to the vertical transfer unit during the exposure period is stopped and the horizontal transfer clock is supplied to the horizontal transfer unit. Supply stop can be easily realized.

Further, as described above, in the case of the configuration in which the first and second switches are switched by the control circuit, the control circuit is synchronized with the charge discharge pulse or the charge discharge pulse within the imaging operation period when the light shielding unit is in the released state. The first and second switches are switched to the first and second constant voltage source sides using the input of the signal as a trigger, and then the vertical transfer clock is generated using the first switch as a trigger when the light shielding unit is in the light shielding state. The second switch may be switched to the horizontal transfer clock generator side while switching to the device side.

According to this configuration, the supply of the vertical transfer clock to the vertical transfer unit and the horizontal transfer unit are limited to the exposure period, especially in the moving image mode and the preview mode that require charge transfer even when the light shielding unit is in the released state. The supply of the horizontal transfer clock to the can be easily stopped.

In the case where the first and second switches are switched by the control circuit as described above, the control circuit is triggered by the light shielding unit being released from the light shielding state or the light shielding unit is in the released state. The first and second switches are triggered by the charge discharge pulse in the imaging operation period or the input of a signal synchronized with the charge discharge pulse as a trigger, or in accordance with photometric data that determines the length of the exposure period. The first switch is switched to the vertical transfer clock generator side and the second switch is switched to the horizontal transfer clock generator side according to the photometric data that determines the length of the exposure period. Also good.

According to this configuration, since it is possible to easily stop the supply of the vertical transfer clock to the vertical transfer unit and the supply of the horizontal transfer clock to the horizontal transfer unit only for an arbitrary period, and to stop the supply of the horizontal transfer clock to the horizontal transfer unit. By restarting the transfer before the charge reading is started and the charge reading is started, dark current noise accumulated in the vertical transfer unit during the exposure period can be swept out in advance.

In the imaging apparatus of the present invention, the control unit directly controls the vertical transfer clock generator and the horizontal transfer clock generator to generate the vertical transfer clock in all or a part of the exposure period in the imaging operation period. And a control circuit for stopping the operation of the horizontal transfer clock generator.

According to this configuration, means for starting / stopping the supply of the vertical transfer clock to the vertical transfer unit and starting / stopping the supply of the horizontal transfer clock to the horizontal transfer unit can be easily realized without adding a switch.

As described above, in the configuration in which the vertical transfer clock generator and the horizontal transfer clock generator are directly controlled by the control circuit, the control circuit uses the vertical transfer clock generator and It is preferable to stop the operation of the horizontal transfer clock generator, and then start the operations of the vertical transfer clock generator and the horizontal transfer clock generator with a trigger that the light shielding unit changes from the released state to the light shielded state.

According to this configuration, it is possible to easily stop the supply of the vertical transfer clock to the vertical transfer unit and the supply of the horizontal transfer clock to the horizontal transfer unit during the exposure period without adding a switch.

Further, as described above, in the configuration in which the vertical transfer clock generator and the horizontal transfer clock generator are directly controlled by the control circuit, the control circuit has the charge discharge pulse or charge within the imaging operation period when the light shielding unit is in the released state. The vertical transfer clock generator and horizontal transfer clock generator are triggered when the operation of the vertical transfer clock generator and horizontal transfer clock generator is stopped using the input of the signal synchronized with the discharge pulse as a trigger, and then the shading unit enters the light shielding state. The structure which starts operation | movement of a container may be sufficient.

According to this configuration, the vertical transfer clock to the vertical transfer unit is limited to the exposure period, particularly in the exposure period, without adding a switch and separately from the moving image mode and the preview mode that require charge transfer even when the light shielding unit is in the open state. The supply stop and the horizontal transfer clock supply stop to the horizontal transfer unit can be easily realized.

Further, as described above, in the configuration in which the vertical transfer clock generator and the horizontal transfer clock generator are directly controlled by the control circuit, the control circuit uses the light-blocking unit from the light-blocked state to the released state as a trigger or light-blocking. Vertical transfer clock generator and horizontal transfer clock generation when the unit is in the released state and triggered by the input of a charge discharge pulse or a signal synchronized with the charge discharge pulse during the imaging operation period, or according to photometric data that determines the length of the exposure period The operation of the vertical transfer clock generator and the horizontal transfer clock generator may be started in accordance with the photometric data that determines the length of the exposure period.

According to this configuration, it is possible to easily stop the supply of the vertical transfer clock to the vertical transfer unit and the supply of the horizontal transfer clock to the horizontal transfer unit only for an arbitrary period without adding a switch. Since it can be realized, the dark current noise accumulated in the vertical transfer unit during the exposure period can be swept out in advance by restarting the transfer before the light-blocking unit is in the light-shielded state and starts reading the charges.

The solid-state imaging device may further include the following configuration. That is, a buffer that receives an output signal of an amplifier circuit that constitutes the solid-state imaging device and performs impedance conversion, a first control circuit that varies a current value flowing through the buffer, and an output signal of the buffer that removes a DC potential The analog signal processing and A / D conversion are received via a capacitor for controlling the second control circuit that changes the circuit current amount of the analog signal processing and whether or not the digital signal output of the A / D conversion is possible. An analog front-end circuit having a third control circuit and a digital signal having a fourth control circuit for performing signal processing upon receiving a digital signal output from the analog front-end circuit and controlling whether or not the signal processing operation is possible In the process of signal processing by the signal processing circuit and the digital signal processing circuit, the data is temporarily stored. Whether data can be temporarily stored A fifth control circuit for controlling may further comprise a memory with.

In this case, the first control circuit varies, specifically reduces or zeros the value of the current flowing through the buffer during all or part of the exposure period within the imaging operation period. The second control circuit makes the circuit current amount of the analog signal processing variable, specifically, reduced to zero during all or a part of the exposure period within the imaging operation period. The third control circuit stops the digital signal output during all or a part of the exposure period within the imaging operation period. The fourth control circuit stops the signal processing operation during all or a part of the exposure period within the imaging operation period. The fifth control circuit stops the operation of temporarily storing data during all or a part of the exposure period within the imaging operation period.

According to this configuration, the supply of the vertical transfer clock to the vertical transfer unit and the supply of the horizontal transfer clock to the horizontal transfer unit are stopped in all or a part of the exposure period in the image pickup operation period of the image pickup apparatus. In addition, the operation of the buffer, the analog front end circuit, the digital signal processing circuit, and the memory can be stopped or stopped during all or a part of the exposure period.

As described above, according to the present invention, the vertical transfer clock is supplied to the vertical transfer unit and the horizontal transfer clock is supplied to the horizontal transfer unit in all or a part of the exposure period in the image pickup operation period of the image pickup apparatus. By stopping the supply, it is possible to realize high image quality with reduced noise, suppression of light emission phenomenon at the corners of the screen, and low power consumption. The effect is particularly great during long exposure or high ISO sensitivity photography.

FIG. 1 is a block diagram showing the configuration of the image pickup apparatus according to Embodiment 1 of the present invention. FIG. 2 is a timing chart showing a method for driving the solid-state imaging device in the imaging apparatus of FIG. FIG. 3 is a block diagram showing the configuration of the image pickup apparatus according to Embodiment 2 of the present invention. FIG. 4 is a block diagram showing a configuration of an imaging apparatus in the prior art. FIG. 5 is a timing diagram showing a method for driving a solid-state image sensor of an imaging apparatus according to the prior art. FIG. 6 is a block diagram showing the configuration of the image pickup apparatus according to Embodiment 3 of the present invention. FIG. 7 is a block diagram showing the configuration of the image pickup apparatus according to Embodiment 4 of the present invention. FIG. 8 is a block diagram showing the configuration of the image pickup apparatus according to Embodiment 5 of the present invention. FIG. 9 is a block diagram showing the configuration of the image pickup apparatus according to Embodiment 6 of the present invention. FIG. 10 is a block diagram showing a configuration of an imaging apparatus in the prior art.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

Example 1
FIG. 1 shows the configuration of the image pickup apparatus according to the first embodiment of the present invention.

The imaging apparatus includes a plurality of light receiving units 1 that photoelectrically convert an incident light image of an object during an exposure period within an imaging operation period and accumulate electric charges, and a plurality of light receptions during a signal transfer period within an imaging operation period following the exposure period. A light-blocking unit 2 that mechanically blocks light incident on the unit 1, a vertical transfer unit 3 that reads out pixel charges accumulated in a plurality of light-receiving units 1 and transfers them in the vertical direction, and is transferred from the vertical transfer unit 3 Generates a horizontal transfer unit 4 that transfers pixel charges in the horizontal direction, an amplification circuit 5 that converts and amplifies the pixel charges transferred from the horizontal transfer unit 4, and outputs a vertical transfer clock that drives the vertical transfer unit 3. The vertical transfer clock generator 6 supplied to the drive terminal (vertical transfer clock input terminal) of the vertical transfer unit 3 and the constant voltage source for fixing the supply voltage to the drive terminal of the vertical transfer unit 3 to a constant voltage. 10 and vertical transfer unit 3 A switch 8 provided between the vertical transfer clock generator 6 and the constant voltage source 10 and connecting a drive terminal of the vertical transfer unit 3 to either the vertical transfer clock generator 6 or the constant voltage source 10, and a horizontal transfer unit The horizontal transfer clock generator 7 that generates a horizontal transfer clock for driving 4 and supplies it to the drive terminal of the horizontal transfer unit 4 (the input terminal of the horizontal transfer clock), and the supply voltage to the drive terminal of the horizontal transfer unit 4 are constant. A constant voltage source 11 for fixing to a voltage, a horizontal transfer unit 4, a horizontal transfer clock generator 7, and a constant voltage source 11 provided between the horizontal transfer clock generator 7 and the constant voltage source 11 are connected to the horizontal transfer clock generator 7. A switch 9 connected to one of the voltage sources 11 and a control circuit 12 for controlling the switches 8 and 9 are configured. Among these, the solid-state imaging device 13 is configured by the plurality of light receiving units 1, the light shielding unit 2, the vertical transfer unit 3, the horizontal transfer unit 4, and the amplifier circuit 5.

The switches 8 and 9, the constant voltage sources 10 and 11, and the control circuit 12 that controls the switches 8 and 9 are used for vertical transfer in all or part of the exposure period within the imaging operation period. The control unit 16 is configured to stop the supply of the vertical transfer clock to the unit 3 and the supply of the horizontal transfer clock to the horizontal transfer unit 4.

The control circuit 12 switches the switch 8 to the constant voltage source 10 side and switches the switch 9 to the constant voltage source 11 side during all or a part of the exposure period 14 in the imaging operation period, The switch 8 is switched to the vertical transfer clock generator 6 side and the switch 9 is switched to the horizontal transfer clock generator 7 side in a period other than all or a part of the exposure period 14.

Here, only one switch 8 is shown in FIG. 1, but the vertical transfer clock generator 6 requires a vertical transfer clock having a plurality of phases to drive the vertical transfer unit 3. Has a plurality of output terminals, and accordingly, a plurality of switches 8 and a plurality of constant voltage sources 10 are arranged in parallel according to the number of phases (signals) of the vertical transfer clock.

Similarly, only one switch 9 is shown in FIG. 1, but since a horizontal transfer clock having a plurality of phases is required for driving the horizontal transfer unit 4, a horizontal transfer clock generator is used. 7 has a plurality of output terminals. Therefore, a plurality of switches 9 and a plurality of constant voltage sources 11 are arranged in parallel according to the number of phases (signals) of the horizontal transfer clock.

The driving method of the image sensor with the above configuration will be described based on the timing chart of FIG. Symbol VD indicates a vertical synchronization signal, symbol HD indicates a horizontal synchronization signal, symbol φH indicates a horizontal transfer clock, symbol φV indicates a vertical transfer clock, and symbol SUB indicates a charge discharge pulse. Symbol MS indicates the open / closed state of the light shielding unit (mechanical shutter).

As in the conventional driving method, in the imaging operation period, an exposure period 14 in which photoelectric conversion and charge accumulation are performed by the plurality of light receiving units 1, and a signal for outputting the accumulated charges via the vertical transfer unit 3 and the horizontal transfer unit 4. And a transfer period 15.

Further, the light shielding unit 2 is closed during the signal transfer period 15 and is open during periods other than the signal transfer period 15 (including the exposure period 14). Further, the charge discharge pulse SUB stops during the exposure period 14, the signal transfer period 15, and a certain period thereafter, and is periodically given to the substrate of the solid-state imaging device 13, thereby sweeping out accumulated charges. Done.

The operation described below is different from the operation of the prior art. During the signal transfer period 15, the control circuit 12 controls the switches 8 and 9 so that the vertical transfer unit 3 is connected to the vertical transfer clock generator 6 and the horizontal transfer unit 4 is connected to the horizontal transfer clock generator 7. As a result, the vertical transfer clock φV is supplied to the vertical transfer unit 3 of the solid-state imaging device 11 and the horizontal transfer clock φH is supplied to the horizontal transfer unit 4 and the amplifier circuit 5 in the same manner as in the prior art. Then, the charge photoelectrically converted during the exposure period 14 is transferred and output from the solid-state imaging device 11 through the amplifier circuit 5.

As shown in FIG. 2, the vertical transfer clock φV is supplied to the vertical transfer unit 3 and the horizontal transfer to the horizontal transfer unit 4 and the amplification circuit 5 until the next exposure period 14 starts after the signal transfer period 15 ends. A clock φH is supplied.

On the other hand, in all or part of the exposure period 14, the control circuit 12 switches the switch 8 so as to connect the drive terminal of the vertical transfer unit 3 and the constant voltage source 10, and the drive terminal of the horizontal transfer unit 4. By switching the switch 9 so as to connect to the constant voltage source 11, the vertical transfer clock φV is supplied to the drive terminal of the vertical transfer unit 3 of the solid-state imaging device 13 and the horizontal transfer clock is supplied to the drive terminal of the horizontal transfer unit 4. The supply of φH is stopped for each phase during the exposure period 14, and the operations of the vertical transfer unit 3, the horizontal transfer unit 4 and the amplifier circuit 5 are stopped.

In this embodiment, the clock generation operation of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 itself continues during this period.

According to the first embodiment, the control unit 16 supplies the vertical transfer clock φV to the vertical transfer unit 3 and supplies it to the horizontal transfer unit 4 during all or part of the exposure period 14 in the imaging operation period of the imaging apparatus. By stopping the supply of the horizontal transfer clock φH, the wraparound of the vertical transfer clock φV and the horizontal transfer clock φH to the light receiving unit 1 during the exposure period 14 is prevented. As a result, it is possible to prevent the vertical transfer clock φV and the horizontal transfer clock φH from generating noises with respect to the charges accumulated in the light receiving unit 1 and thereby causing deterioration in image quality, thereby realizing high image quality.

Further, by stopping the supply of the horizontal transfer clock φH to the horizontal transfer unit 4 during the exposure period 14, the amplifier circuit 5 generates heat during the exposure period 14 and charges enter the light receiving unit 1 near the amplifier circuit 5. Can be avoided, and the light emission phenomenon at the corners of the screen can be suppressed.

Furthermore, since the vertical transfer clock φV and the horizontal transfer clock φH are not supplied during the exposure period 14, unnecessary power consumption can be eliminated, and low power consumption can be realized. The effect is particularly great during long exposure or high ISO sensitivity photography.

Further, according to the first embodiment, means for starting / stopping the supply of the vertical transfer clock φV to the vertical transfer unit 3 and starting / stopping the supply of the horizontal transfer clock φH to the horizontal transfer unit 4 can be easily realized. .

Note that the plurality of switches 8 corresponding to the plurality of signal lines of the vertical transfer clock φV can be individually controlled by the control circuit 12, and the supply stop process of the vertical transfer clock φV that shifts from the signal transfer period 15 to the exposure period 14 or exposure In the process of resuming the supply of the vertical transfer clock φV that shifts from the period 14 to the signal transfer period 15, it is possible to switch the plurality of switches 8 at individual timing for each signal line.

In this way, if the plurality of switches 8 are switched at individual timing for each signal line, the transfer can be resumed in order according to the transfer direction of the vertical transfer unit 3, thereby avoiding malfunctions and transfer failures due to stop / restart. it can.

A plurality of constant voltage sources 10 corresponding to each signal line also have individual voltage values, and a plurality of transfer clock input terminals of the vertical transfer unit 3 are individually provided for each signal line in all or part of the exposure period 14. Can be fixed at a constant voltage.

In this way, if the plurality of transfer clock input terminals of the vertical transfer unit 3 are fixed to individual constant voltages for each signal line, the charge of the vertical transfer unit 3 can be stopped in a stable state. It is possible to avoid malfunctions and transfer failures associated with stop / restart.

Similarly, the plurality of switches 9 corresponding to the plurality of signal lines of the horizontal transfer clock φH can be individually controlled by the control circuit 12, and the supply stop process of the horizontal transfer clock φH that shifts from the signal transfer period 15 to the exposure period 14, or In the process of restarting the supply of the horizontal transfer clock φH that shifts from the exposure period 14 to the signal transfer period 15, it is possible to switch the plurality of switches 9 at individual timing for each signal line.

In this way, if a plurality of switches 9 are switched at individual timing for each signal line, transfer can be resumed in order according to the transfer direction of the horizontal transfer unit 4, thereby avoiding malfunctions and transfer failures due to stop / restart. it can.

A plurality of constant voltage sources 11 corresponding to each signal line also have individual voltage values, and a plurality of transfer clock input terminals of the horizontal transfer unit 4 are individually provided for each signal line during all or part of the exposure period 14. Can be fixed at a constant voltage.

Thus, if the plurality of transfer clock input terminals of the horizontal transfer unit 4 are fixed to individual constant voltages for each signal line, the transfer of the horizontal transfer unit 4 can be stopped in a stable holding state. Thus, malfunctions and transfer failures associated with stop / restart can be avoided.

As another example, the control circuit 12 switches the switches 8 and 9 to the constant voltage sources 10 and 11 side by using the light shielding unit 2 from the light shielding state to the release state as a trigger, and then the light shielding unit 2 is changed from the release state to the light shielding state. As a trigger, the switch 8 may be switched to the vertical transfer clock generator 6 side and the switch 9 may be switched to the horizontal transfer clock generator 7 side.

With this configuration, the supply of the vertical transfer clock φV to the vertical transfer unit 3 during the exposure period is stopped and the horizontal transfer unit 4 is maintained while the clock generation operations of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 are continued. The supply stop of the horizontal transfer clock φH can be easily realized.

In addition to this configuration, the control circuit 12 uses the switches 8 and 9 as constant voltage sources triggered by the input of a charge discharge pulse or a signal synchronized with the charge discharge pulse within the imaging operation period when the light shielding unit 2 is in the released state. The switch 8 is switched to the vertical transfer clock generator 6 side and the switch 9 is switched to the horizontal transfer clock generator 7 side, triggered by switching to the 10 and 11 side, and then the light shielding unit 2 being in the light shielding state. Also good.

With this configuration, the supply of the vertical transfer clock φV to the vertical transfer unit 3 is stopped particularly in the exposure period, separately from the moving image mode and the preview mode that require charge transfer even when the light shielding unit 2 is in the released state. Further, the supply stop of the horizontal transfer clock φH to the horizontal transfer unit 4 can be easily realized.

Further, the control circuit 12 is triggered by the light shielding unit 2 being released from the light shielding state, or a signal synchronized with the charge discharging pulse or the charge discharging pulse within the imaging operation period when the light shielding unit 2 is in the released state. The switches 8 and 9 are switched to the constant voltage sources 10 and 11 respectively according to photometric data that determines the length of the exposure period, and then switches the switch 8 to the vertical transfer clock according to the photometric data that determines the length of the exposure period. The switch may be switched to the generator 6 side and the switch 9 may be switched to the horizontal transfer clock generator 7 side.

With this configuration, it is possible to easily realize the supply stop of the vertical transfer clock φV to the vertical transfer unit 3 and the supply stop of the horizontal transfer clock φH to the horizontal transfer unit 4 only for an arbitrary period, in addition to the exposure period. Therefore, the dark current noise accumulated in the vertical transfer unit during the exposure period can be swept out in advance by restarting the transfer before the light-blocking unit enters the light-shielded state and starts reading the charges.

In the first embodiment, when the constant voltage sources 10 and 11 are provided to stop the supply of the vertical transfer clock φV and the horizontal transfer clock φH to the vertical transfer unit 3 and the horizontal transfer unit 4, respectively, the vertical transfer is performed. A constant voltage is applied to the clock input terminals of the unit 3 and the horizontal transfer unit 4. As described above, when a constant voltage is applied to the clock input terminals of the vertical transfer unit 3 and the horizontal transfer unit 4, both the vertical transfer unit 3 and the horizontal transfer unit 4 are stopped in a stable state. And transfer failure can be avoided.

However, even if a constant voltage is not necessarily applied to the clock input terminals of the vertical transfer unit 3 and the horizontal transfer unit 4, the vertical transfer to the vertical transfer unit is performed during all or part of the exposure period during the imaging operation period of the imaging apparatus. By simply stopping the supply of the clock and the horizontal transfer clock to the horizontal transfer unit, it is possible to realize high image quality with reduced noise, suppression of the light emission phenomenon at the corners of the screen, and low power consumption.

(Example 2)
FIG. 3 shows the configuration of the image pickup apparatus according to the second embodiment of the present invention.

This imaging apparatus is provided with switches 8 and 9 and constant voltage sources 10 and 11 as in the first embodiment, and instead of switching the switches 8 and 9 by the control circuit 12, the control circuit 12A as a control unit performs vertical operation. By directly controlling the transfer clock generator 6 and the horizontal transfer clock generator 7, the operations of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 can be performed in all or a part of the exposure period within the imaging operation period. Thus, the supply of the vertical transfer clock to the vertical transfer unit 3 and the supply of the horizontal transfer clock to the horizontal transfer unit 4 during this period are stopped.

Here, as described above, when the operations of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 are stopped in all or a part of the exposure period in the imaging operation period, the vertical transfer clock generator 6 is stopped. When the clock output terminal of the horizontal transfer clock generator 7 is fixed at any voltage level, both the vertical transfer unit 3 and the horizontal transfer unit 4 stop in a stable state. This is preferable because malfunctions and transfer failures can be avoided.

However, the clock output terminals of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 may be in an open state, and the vertical transfer unit 3 in all or a part of the exposure period in the imaging operation period of the imaging apparatus. By simply stopping the supply of the vertical transfer clock to the horizontal transfer unit and the horizontal transfer clock to the horizontal transfer unit 4, it is possible to achieve high image quality with reduced noise, suppression of the light emission phenomenon at the corners of the screen, and low power consumption.

Similarly to FIG. 2, the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 are operated in a period other than all or a part of the exposure period in the imaging operation period, and the vertical transfer clock and the horizontal transfer are operated. Clocks are supplied to the vertical transfer circuit 3 and the horizontal transfer circuit 4, respectively.

Other configurations are the same as those in the first embodiment.

According to the second embodiment, as in the first embodiment, the control circuit 12A serving as a control unit performs vertical to the vertical transfer unit 3 during the exposure period 14 in the whole or a part of the imaging operation period of the imaging apparatus. By stopping the supply of the transfer clock and the supply of the horizontal transfer clock to the horizontal transfer unit 4, the vertical transfer clock and the horizontal transfer clock to the light receiving unit 1 during the exposure period 14 are prevented. As a result, it is possible to prevent the vertical transfer clock and the horizontal transfer clock from becoming noise with respect to the electric charge accumulated in the light receiving unit 1 to cause deterioration in image quality, thereby realizing high image quality.

Further, by stopping the supply of the horizontal transfer clock to the horizontal transfer unit 4 during the exposure period 14, the amplifier circuit 5 generates heat during the exposure period 14, and charges enter the light receiving unit 1 near the amplifier circuit 5. Can be avoided, and the light emission phenomenon at the corners of the screen can be suppressed.

Furthermore, since the vertical transfer clock and the horizontal transfer clock are not supplied during the exposure period 14, unnecessary power consumption can be eliminated, and low power consumption can be realized. The effect is particularly great during long exposure or high ISO sensitivity photography.

Further, according to the second embodiment, means for starting / stopping the supply of the vertical transfer clock to the vertical transfer unit 3 and starting / stopping the supply of the horizontal transfer clock to the horizontal transfer unit 4 without adding a switch are provided. It can be easily realized.

As another example, the control circuit 12A stops the operations of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 triggered by the light shielding unit 2 being released from the light shielding state, and then the light shielding unit 2 is released. The operation of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 may be started with a trigger from the state to the light shielding state.

With this configuration, it is possible to easily stop the supply of the vertical transfer clock to the vertical transfer unit 3 and the supply of the horizontal transfer clock to the horizontal transfer unit 4 during the exposure period without adding a switch.

In addition to this configuration, the control circuit 12A uses the vertical transfer clock generator 6 and the transfer circuit 6A triggered by an input of a charge discharge pulse or a signal synchronized with the charge discharge pulse within the imaging operation period when the light shielding unit 2 is in the released state. The operation of the horizontal transfer clock generator 7 may be stopped, and the operation of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 may be started by using the light shielding unit 2 as a trigger after that.

With this configuration, without adding a switch, the moving to the vertical transfer unit 3 is limited to the exposure period, especially in the moving image mode and the preview mode that require charge transfer even when the light shielding unit 2 is in the released state. The supply stop of the vertical transfer clock and the supply stop of the horizontal transfer clock to the horizontal transfer unit 4 can be easily realized.

Further, the control circuit 12A triggers the light-blocking unit 2 from the light-blocked state to the released state, or the charge discharge pulse within the imaging operation period and the signal synchronized with the charge discharge pulse when the light-blocking unit 2 is in the released state. The operation of the vertical transfer clock generator 6 and the horizontal transfer clock generator 7 is stopped using the input as a trigger or according to photometric data that determines the length of the exposure period, and then the vertical transfer clock is generated according to photometric data that determines the length of the exposure period. The operation of the device 6 and the horizontal transfer clock generator 7 may be started.

With such a configuration, the supply of the vertical transfer clock to the vertical transfer unit 3 is stopped and the supply of the horizontal transfer clock to the horizontal transfer unit 4 is stopped only during an arbitrary period without adding a switch. Therefore, the dark current noise accumulated in the vertical transfer unit during the exposure period can be swept out in advance by restarting the transfer before the light shielding unit 2 enters the light shielding state and starts reading the charges.

(Example 3)
FIG. 6 shows the configuration of the image pickup apparatus according to the third embodiment of the present invention.

This imaging apparatus is provided with a configuration as described below in addition to the configurations of the first and second embodiments.

That is, in FIG. 6, the transistor 22 whose collector is connected to the power source and the resistor 23 whose one end is connected to the emitter of the transistor 22 and whose other end is grounded are the output signal of the amplifier circuit 5 constituting the solid-state imaging device 13. Is formed from the base of the transistor 22, and an impedance follower circuit is formed. A switch 28 serving as a first control circuit is inserted between the emitter of the transistor 22 and the terminal of the resistor 23 that is not grounded. The operation of the transistor 22 is controlled by using the switch 28 by the control signal 32 from the digital signal processing circuit 50 to stop the operation of the transistor 22 in all or a part of the exposure period in the imaging operation period. Can do.

Furthermore, the emitter output of the transistor 22 is received by the analog front end circuit 40 via the capacitor 24 for removing the DC potential. This analog front-end circuit 40 performs analog signal processing and A / D conversion in the same manner as the prior art by an analog front-end circuit main part 41 (abbreviated as AFE main part in the drawing). Unlike the technology, an operation control circuit 42 that is a second control circuit that controls a circuit current amount in analog signal processing, and an output control circuit 43 that is a third control circuit that controls whether or not a digital signal can be output in A / D conversion; It has. The operation control circuit 42 includes, for example, a switch that switches the gate voltage of the current source circuit or a switch that stops the clock. In addition, the output control circuit 43 is configured by, for example, a switch that selectively switches the output to any one of a normal signal output state, a high level fixed state, a low level fixed state, and a high impedance state.

By controlling the operation of the analog front end circuit 40 by using the operation control circuit 42 and the output control circuit 43 by the control signal 31 from the digital signal processing circuit 50, all or part of the exposure period within the imaging operation period. During the period, the operation of the analog front end circuit 40 can be stopped or stopped.

Furthermore, the digital signal processing circuit 50 receives the digital output of the analog front end circuit 40. The digital signal processing circuit 50 performs digital signal processing in the same manner as the prior art by a digital signal processing circuit main part 51 (abbreviated as DSP main part in the figure), and further, unlike the prior art, whether the operation is possible or not. Is provided with an operation control circuit 52 which is a fourth control circuit for controlling. The operation control circuit 52 includes, for example, a switch for stopping a clock or a switch for stopping data output to a memory.

The memory 60 temporarily stores data in the process of the signal processing of the digital signal processing circuit 50 by the memory main unit 61 in the same manner as in the prior art. Further, unlike the prior art, the memory 60 controls whether the operation is possible. An operation control unit 62 that is a fifth control circuit is provided. The operation control circuit 62 is constituted by a switch for stopping the clock, for example.

The operation of the digital signal processing circuit 50 is controlled by using the operation control circuit 52 in the digital signal processing circuit 50, and the operation of the memory 60 is controlled by the control signal 30 from the digital signal processing circuit 50. By controlling the operation, the operation of the digital signal processing circuit 50 and the operation of the memory 60 are stopped or stopped during all or a part of the exposure period within the imaging operation period. It is possible to stop digital signals being transmitted and received with each other.

Although the detailed description of the digital signal processing circuit 50 is omitted, the exposure period within the imaging operation period is the same as that described in the control circuit 12 of the first embodiment or the control circuit 12A of the second embodiment. In all or part of the period, control signals 30 to 32 are generated for stopping or stopping the operation of the circuit to be controlled.

According to the third embodiment, the operation of the transistor 22 constituting the emitter follower is stopped by the control signal 32 by using the switch 28 during all or a part of the exposure period 14 in the imaging operation period of the imaging apparatus. As a result, the base current of the transistor 22 flows, so that the charge accumulated in the light receiving unit 1 via the power supply or ground of the amplifier circuit 5 constituting the solid-state imaging device 13 becomes noise and causes image quality degradation. You can avoid that. Furthermore, unnecessary power consumption can be eliminated, and low power consumption can be realized.

Further, the operation of the analog front-end circuit 40 is set to a stationary state or a part of the exposure period 14 in the imaging operation period of the imaging apparatus by using the operation control circuit 42 and the output control circuit 43 by the control signal 31. By stopping, it is possible to avoid that the output digital signal becomes noise with respect to the electric charge accumulated in the light receiving unit 1 via the power supply or ground of the solid-state imaging device 13 and the image quality is deteriorated. Furthermore, unnecessary power consumption can be eliminated, and low power consumption can be realized.

In addition, the operation of the digital signal processing circuit 50 is stopped or stopped during the exposure period 14 in the imaging operation period of the imaging apparatus using the operation control circuit 52, and the operation is controlled by the control signal 30. Mutual transmission / reception is performed between the digital signal processing circuit 50 and the memory 60 by using the circuit 62 to stop or stop the operation of the memory 60 during all or part of the exposure period 14 in the imaging operation period of the imaging apparatus. It can be avoided that the digital signal thus generated becomes noise with respect to the electric charge accumulated in the light receiving unit 1 via the power supply or ground of the solid-state image pickup device 13 and causes image quality degradation. Furthermore, unnecessary power consumption can be eliminated, and low power consumption can be realized.

These are particularly effective during long exposure or high ISO sensitivity shooting.

Example 4
FIG. 7 shows the configuration of the image pickup apparatus according to the fourth embodiment of the present invention.

This imaging apparatus is provided with a configuration as described below in addition to the configurations of the first and second embodiments.

In this imaging apparatus, a general-purpose control output terminal is added to the digital signal processing circuit 50 by controlling the switch 28 not by the control signal 32 from the digital signal processing circuit 50 but by the control signal 33 from the analog front end circuit 40. The operation of the transistor 22 can be stopped without any problem.

Other configurations are the same as those in the third embodiment.

(Example 5)
FIG. 8 shows the configuration of an image pickup apparatus according to the fifth embodiment of the present invention.

This imaging apparatus is provided with a configuration as described below in addition to the configurations of the first and second embodiments.

This imaging apparatus uses a push-pull type buffer circuit 21 instead of an emitter follower circuit as a buffer. With this configuration, it is possible to reduce power consumption during operation.

Other configurations are the same as those in the third embodiment.

(Example 6)
FIG. 9 shows the configuration of the image pickup apparatus according to the sixth embodiment of the present invention.

This imaging apparatus is provided with a configuration as described below in addition to the configurations of the first and second embodiments.

In this imaging apparatus, a general-purpose control output terminal is added to the digital signal processing circuit 50 by controlling the buffer circuit 21 with the control signal 33 from the analog front end circuit 40 instead of the control signal 32 from the digital signal processing circuit 50. The operation of the buffer circuit 21 can be stopped without doing so.

Other configurations are the same as those in the third embodiment.

The image pickup apparatus according to the present invention has the effect of realizing high image quality with reduced noise, suppression of the light emission phenomenon at the corners of the screen, and low power consumption, particularly for long exposure or high ISO sensitivity. It is large at the time of photographing, and is useful as an imaging device for a digital camera or a mobile phone with a digital camera.

DESCRIPTION OF SYMBOLS 1 Light-receiving part 2 Light-shielding unit 3 Vertical transfer part 4 Horizontal transfer part 5 Amplifying circuit 6 Vertical transfer clock generator 7 Horizontal transfer clock generator 8 1st switch 9 2nd switch 10 1st constant voltage source 11 2nd Constant voltage source 12, 12A Control circuit 13 Solid-state imaging device 14 Exposure period during imaging operation period 15 Signal transfer period during imaging operation period 16 Control unit 21 Buffer circuit 22 Transistor 23 Resistor 24 Capacitor 25 Analog front end circuit 26 Digital signal processing Circuit 27 Memory 28 Switch 30 Control signal 31 Control signal 32 Control signal 33 Control signal 40 Analog front end circuit 41 Analog front end circuit main part 42 Operation control circuit 43 Output control circuit 50 Digital signal processing circuit 51 Digital signal processing circuit The main portion 52 an operation control circuit 60 memory 61 memory main part 62 operation control circuit

Claims (10)

1. A plurality of light receiving units that photoelectrically convert an incident light image of an object during an exposure period within an imaging operation period and accumulate electric charges;
   A light shielding unit that mechanically blocks light incident on the plurality of light receiving units during a signal transfer period within an imaging operation period following the exposure period;
   A vertical transfer unit that reads out pixel charges accumulated in the plurality of light receiving units and transfers them in the vertical direction;
   A horizontal transfer unit for transferring the pixel charges transferred from the vertical transfer unit in a horizontal direction;
   An amplifying circuit for converting the voltage of the pixel charge transferred from the horizontal transfer unit, amplifying it,
   A vertical transfer clock generator that generates a vertical transfer clock for driving the vertical transfer unit and supplies the vertical transfer clock to the vertical transfer unit;
   A horizontal transfer clock generator for generating a horizontal transfer clock for driving the horizontal transfer unit and supplying the horizontal transfer clock to the horizontal transfer unit;
   An imaging device comprising: a control unit that stops supply of a vertical transfer clock to the vertical transfer unit and supply of a horizontal transfer clock to the horizontal transfer unit in all or a part of an exposure period within the imaging operation period apparatus.
2. The control unit includes first and second constant voltage sources, a first switch that connects the vertical transfer unit to either the vertical transfer clock generator or the first constant voltage source, and the horizontal transfer. A second switch for connecting a part to either the horizontal transfer clock generator or the second constant voltage source, and the first switch in the exposure period in the whole or a part of the imaging operation period. The imaging apparatus according to claim 1, further comprising a control circuit that switches to the first constant voltage source side and switches the second switch to the second constant voltage source side.
3. The control circuit switches at least one of the first and second switches to the first and second constant voltage sources with a trigger that the light shielding unit is released from the light shielding state, and then the light shielding unit The imaging apparatus according to claim 2, wherein the first switch is switched to the vertical transfer clock generator side and the second switch is switched to the horizontal transfer clock generator side when triggered by the light shielding state from the released state.
4. The control circuit uses the first and second switches as a constant voltage triggered by an input of a charge discharge pulse in the imaging operation period or a signal synchronized with the charge discharge pulse when the light shielding unit is in a released state. The first switch is switched to the vertical transfer clock generator side and the second switch is switched to the horizontal transfer clock generator side, triggered by switching to the source side, and then triggering the light shielding unit to be in a light shielding state. Item 3. The imaging device according to Item 2.
5. The control circuit is triggered by the light-shielding unit being released from the light-shielded state, or when the light-shielding unit is in the released state and the charge discharge pulse within the imaging operation period or a signal synchronized with the charge discharge pulse. At least one of the first and second at least one switches is switched to the first and second constant voltage source sides using an input as a trigger or in accordance with photometric data that determines the length of the exposure period, and then the length of the exposure period The imaging apparatus according to claim 2, wherein the first switch is switched to the vertical transfer clock generator side and the second switch is switched to the horizontal transfer clock generator side according to photometric data that determines the level.
6. The control unit directly controls the vertical transfer clock generator and the horizontal transfer clock generator, so that the vertical transfer clock generator and the horizontal transfer in all or a part of the exposure period in the imaging operation period. The imaging apparatus according to claim 1, further comprising a control circuit that stops at least one operation of the clock generator.
7. The control circuit stops the operation of at least one of the vertical transfer clock generator and the horizontal transfer clock generator triggered by the light shielding unit being released from the light shielding state, and then the light shielding unit is released from the released state. The imaging apparatus according to claim 6, wherein the operation of the vertical transfer clock generator and the horizontal transfer clock generator is started using a light shielding state as a trigger.
8. The control circuit uses the charge transfer pulse in the imaging operation period or a signal input synchronized with the charge discharge pulse as a trigger to trigger the vertical transfer clock generator and the horizontal transfer clock generator. The imaging apparatus according to claim 6, wherein at least one of the operations is stopped, and then the operations of the vertical transfer clock generator and the horizontal transfer clock generator are started with a trigger that the light shielding unit is in a light shielding state.
9. The control circuit is triggered by the light-shielding unit being released from the light-shielded state, or when the light-shielding unit is in the released state and the charge discharge pulse within the imaging operation period or a signal synchronized with the charge discharge pulse. The operation of at least one of the vertical transfer clock generator and the horizontal transfer clock generator is stopped using an input as a trigger or according to photometric data that determines the length of an exposure period, and then according to photometric data that determines the length of an exposure period. The imaging apparatus according to claim 6, wherein operations of a vertical transfer clock generator and the horizontal transfer clock generator are started.
10. A buffer that receives an output signal of the amplifier circuit and performs impedance conversion;
    A first control circuit that reduces a value of a current flowing through the buffer in all or a part of an exposure period within the imaging operation period;
    A second circuit that receives an output signal of the buffer, performs analog signal processing and A / D conversion, and reduces a circuit current amount of analog signal processing in all or a part of an exposure period in the imaging operation period. An analog front-end circuit having a control circuit for the above and a third control circuit for stopping the digital signal output of A / D conversion;
    A digital signal including a fourth control circuit that receives a digital signal output from the analog front-end circuit, performs signal processing, and stops the signal processing operation during all or a part of the exposure period within the imaging operation period A processing circuit;
    In the process of the signal processing of the digital signal processing circuit, data is temporarily stored, and the operation of temporarily storing the data is stopped during all or a part of the exposure period within the imaging operation period. The imaging device according to claim 1, further comprising: a memory including the control circuit of claim 1.

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