WO2010123680A2 - Wafer processing deposition shielding components - Google Patents

Wafer processing deposition shielding components Download PDF

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Publication number
WO2010123680A2
WO2010123680A2 PCT/US2010/030116 US2010030116W WO2010123680A2 WO 2010123680 A2 WO2010123680 A2 WO 2010123680A2 US 2010030116 W US2010030116 W US 2010030116W WO 2010123680 A2 WO2010123680 A2 WO 2010123680A2
Authority
WO
WIPO (PCT)
Prior art keywords
shield
collimator
band
central region
aspect ratio
Prior art date
Application number
PCT/US2010/030116
Other languages
English (en)
French (fr)
Other versions
WO2010123680A3 (en
Inventor
Martin L. Riker
Maurice E. Ewert
Anantha K. Subramani
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US12/482,846 external-priority patent/US20090308739A1/en
Priority claimed from US12/482,713 external-priority patent/US20090308732A1/en
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to KR1020187035627A priority Critical patent/KR102020010B1/ko
Priority to KR1020217013278A priority patent/KR102374073B1/ko
Priority to CN2010800064499A priority patent/CN102301451A/zh
Priority to KR1020117028097A priority patent/KR101782355B1/ko
Priority to KR1020197025908A priority patent/KR102186535B1/ko
Priority to KR1020207034181A priority patent/KR102262978B1/ko
Priority to KR1020177017742A priority patent/KR101929971B1/ko
Publication of WO2010123680A2 publication Critical patent/WO2010123680A2/en
Publication of WO2010123680A3 publication Critical patent/WO2010123680A3/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3402Gas-filled discharge tubes operating with cathodic sputtering using supplementary magnetic fields
    • H01J37/3405Magnetron sputtering
    • H01J37/3408Planar magnetron sputtering
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/35Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34Sputtering
    • C23C14/35Sputtering by application of a magnetic field, e.g. magnetron sputtering
    • C23C14/354Introduction of auxiliary energy into the plasma
    • C23C14/358Inductive energy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/34Gas-filled discharge tubes operating with cathodic sputtering
    • H01J37/3411Constructional aspects of the reactor
    • H01J37/3447Collimators, shutters, apertures

Definitions

  • Embodiments of the present invention generally relate to an apparatus and method for uniform sputter depositing of materials into the bottom and sidewalls of high aspect ratio features on a substrate.
  • PVD physical vapor deposition
  • collimator sputtering One technique developed to allow the use of PVD to deposit thin films in the bottom of a high aspect ratio feature is collimator sputtering.
  • a collimator is a filtering plate positioned between a sputtering source and a substrate.
  • the collimator typically has a uniform thickness and includes a number of passages formed through the thickness. Sputtered material must pass through the collimator on its path from the sputtering source to the substrate.
  • the collimator filters out material that would otherwise strike the workpiece at acute angles exceeding a desired angle.
  • thicker layers may be deposited near the center or the edge of the substrate, depending on the radial positioning of the small magnet.
  • This phenomenon not only leads to non-uniform deposition across the substrate, but it also leads to non-uniform deposition across high aspect ratio feature sidewalls in certain regions of the substrate as well.
  • a small magnet positioned radially to provide optimum field uniformity in the region near the perimeter of the substrate leads to source material being deposited more heavily on feature sidewalls that face the center of the substrate than those that face the perimeter of the substrate.
  • a deposition apparatus comprises an electrically grounded chamber, a sputtering target supported by the chamber and electrically isolated from the chamber, a substrate support pedestal positioned below the sputtering target and having a substrate support surface substantially parallel to the sputtering surface of the sputtering target, a shield member supported by the chamber and electrically coupled to the chamber, and a collimator mechanically and electrically coupled to the shield member and positioned between the sputtering target and the substrate support pedestal.
  • the collimator has a plurality of apertures extending therethrough.
  • the apertures located in a central region have a higher aspect ratio than the apertures located in a peripheral region.
  • a deposition apparatus comprises an electrically grounded chamber, a sputtering target supported by the chamber and electrically isolated from the chamber, a substrate support pedestal positioned below the sputtering target and having a substrate support surface substantially parallel to the sputtering surface of the sputtering target, a shield member supported by the chamber and electrically coupled to the chamber, a collimator mechanically and electrically coupled to the shield member and positioned between the sputtering target and the substrate support pedestal, a gas source, and a controller.
  • the sputtering target is electrically coupled to a DC power source.
  • the substrate support pedestal is electrically coupled to an RF power source.
  • the controller is programmed to provide signals to control the gas source, DC power source, and the RF power source.
  • the collimator has a plurality of apertures extending therethrough. In one embodiment the apertures located in a central region have a higher aspect ratio than the apertures located in a peripheral region of the collimator. In one embodiment, the controller is programmed to provide high bias to the substrate support pedestal.
  • a method for depositing material onto a substrate comprises applying a DC bias to a sputtering target in a chamber having a collimator positioned between the sputtering target and a substrate support pedestal, providing a processing gas in a region adjacent the sputtering target within the chamber, applying a bias to the substrate support pedestal, and pulsing the bias applied to the substrate support pedestal between a high bias and a low bias.
  • the collimator has a plurality of apertures extending therethrough.
  • the apertures located in a central region have a higher aspect ratio than the apertures located in a peripheral region of the collimator.
  • a collimator for mechanical and electrical coupling with a shield member positioned between a sputtering target and a substrate support pedestal.
  • the collimator comprises a central region and a peripheral region, wherein the collimator has a plurality of apertures extending therethrough and where the apertures located in the central region have a higher aspect ratio than the apertures located in the peripheral region.
  • a lower shield for encircling a substrate support pedestal that faces a target in a substrate processing chamber.
  • the lower shield comprises a cylindrical outer band having a first diameter dimensioned to encircle a sputtering surface of the sputtering target and the substrate support pedestal, the outer cylindrical band comprising a top portion that surrounds a sputtering surface of the sputtering target, a middle portion, and a bottom portion that surrounds the substrate support pedestal, a support flange having a resting surface and extending radially outward from the cylindrical outer band, a base plate extending radially inward from the bottom portion of the cylindrical outer band, and a cylindrical inner band coupled with the base plate and partially surrounding a peripheral edge of the substrate support pedestal.
  • an upper shield for encircling a sputtering target that faces a support pedestal in a substrate processing chamber.
  • the upper shield comprises a shield portion and an integrated flux optimizer for directional sputtering.
  • FIG. 1 is a schematic sectional view of a semiconductor processing system having one embodiment of a process kit described herein;
  • FIG. 2 is a top plan view of a collimator according to one embodiment described herein;
  • FIG. 3 is a schematic, cross-sectional view of a collimator according to one embodiment described herein;
  • FIG. 4 is a schematic, cross-sectional view of a collimator according to one embodiment described herein;
  • FIG. 5 is a schematic, cross-sectional view of a collimator according to one embodiment described herein;
  • FIG. 6 is an enlarged, partial cross-sectional view of a bracket for attaching a collimator to an upper shield of a PVD chamber according to one embodiment described herein;
  • FIG. 7 is a partial cross-sectional view of a bracket for attaching a collimator to an upper shield of a PVD chamber according to one embodiment described herein;
  • FIG. 8 is a schematic sectional view of a semiconductor processing system having another embodiment of a process kit described herein;
  • FIG. 9A is a partial cross-sectional view of a monolithic upper shield according to one embodiment described herein;
  • FIG. 9B is a top plan view of the monolithic upper shield of FIG. 9A according to one embodiment described herein;
  • FIG. 10A is a cross-sectional view of a lower shield according to one embodiment described herein;
  • FIG. 10B is a partial sectional view of one embodiment of the lower shield of FIG. 10A.
  • FIG. 10C is a top view of one embodiment of the lower shield of FIG. 10A. DETAILED DESCRIPTION
  • Embodiments described herein provide apparatus and methods for uniform deposition of sputtered material across high aspect ratio features of a substrate during the fabrication of integrated circuits on substrates.
  • FIG. 1 depicts an exemplary embodiment of a processing chamber 100 having one embodiment of a process kit 140 capable of processing a substrate 154.
  • the process kit 140 includes a one-piece lower shield 180, a one-piece upper shield 186, and a collimator 110.
  • the processing chamber 100 comprises a sputtering chamber, also called a physical vapor deposition (PVD) chamber, capable of depositing, for example, titanium, aluminum oxide, aluminum, copper, tantalum, tantalum nitride, tungsten, or tungsten nitride on a substrate.
  • PVD physical vapor deposition
  • PVD chambers examples include the ALPS ® Plus and SIP ENCORE ® PVD processing chambers, both commercially available from Applied Materials, Inc., Santa Clara, of California. It is contemplated that processing chambers available from other manufactures may also be utilized to perform the embodiments described herein.
  • the chamber 100 includes a sputtering source, such as a target 142 having a sputtering surface 145, and a substrate support pedestal 152, for receiving a semiconductor substrate 154 thereon, having a peripheral edge 153.
  • the substrate support pedestal may be located within a grounded chamber wall 150.
  • the chamber 100 includes the target 142 supported by a grounded conductive adapter 144 through a dielectric isolator 146.
  • the target 142 comprises the material to be deposited on the substrate 154 surface during sputtering, and may include copper for depositing as a seed layer in high aspect ratio features formed in the substrate 154.
  • the target 142 may also include a bonded composite of a metallic surface layer of sputterable material, such as copper, and a backing layer of a structural material, such as aluminum.
  • the pedestal 152 supports a substrate 154 having high aspect ratio features to be sputter coated, the bottoms of which are in planar opposition to a principal surface of the target 142.
  • the substrate support pedestal 152 has a planar substrate-receiving surface disposed generally parallel to the sputtering surface of the target 142.
  • the pedestal 152 may be vertically movable through a bellows 158 connected to a bottom chamber wall 160 to allow the substrate 154 to be transferred onto the pedestal 152 through a load lock valve (not shown) in a lower portion of the chamber 100. The pedestal 152 may then be raised to a deposition position as shown.
  • processing gas may be supplied from a gas source 162 through a mass flow controller 164 into the lower portion of the chamber 100.
  • a controllable direct current (DC) power source 148 coupled to the chamber 100, may be used to apply a negative voltage or bias to the target 142.
  • a radio frequency (RF) power source 156 may be coupled to the pedestal 152 to induce a DC self-bias on the substrate 154.
  • the pedestal 152 is grounded.
  • the pedestal 152 is electrically floated.
  • a magnetron 170 is positioned above the target 142.
  • the magnetron 170 may include a plurality of magnets 172 supported by a base plate 174 connected to a shaft 176, which may be axially aligned with the central axis of the chamber 100 and the substrate 154.
  • the magnets are aligned in a kidney-shaped pattern.
  • the magnets 172 produce a magnetic field within the chamber 100 near the front face of the target 142 to generate plasma, such that a significant flux of ions strike the target 142, causing sputter emission of target material.
  • the magnets 172 may be rotated about the shaft 176 to increase uniformity of the magnetic field across the surface of the target 142.
  • the magnetron 170 is a small magnet magnetron.
  • the magnets 172 may be both rotated and moved reciprocally in a linear direction substantially parallel to the face of the target 142 to produce a spiral motion.
  • the magnets 172 may be rotated about both a central axis and an independently-controlled secondary axis to control both their radial and angular positions.
  • the chamber 100 includes a grounded lower shield 180 having a support flange 182 supported by and electrically coupled to the chamber sidewall 150.
  • An upper shield 186 is supported by and electrically coupled to a flange 184 of the adapter 144.
  • the upper shield 186 and the lower shield 180 are electrically coupled as are the adapter 144 and the chamber wall 150.
  • both the upper shield 186 and the lower shield 180 are comprised of stainless steel.
  • the chamber 100 includes a middle shield (not shown) coupled to the upper shield 186.
  • the upper shield 186 and lower shield 180 are electrically floating within the chamber 100.
  • the upper shield 186 and lower shield 180 may be coupled to an electrical power source.
  • the upper shield 186 has an upper portion that closely fits an annular side recess of the target 142 with a narrow gap 188 between the upper shield 186 and the target 142, which is sufficiently narrow to prevent plasma from penetrating and sputter coating the dielectric isolator 146.
  • the upper shield 186 may also include a downwardly projecting tip 190, which covers the interface between the lower shield 180 and the upper shield 186, preventing them from being bonded by sputter deposited material.
  • the lower shield 180 extends downwardly into a cylindrical outer band 196, which generally extends along the chamber wall 150 to below the top surface of the pedestal 152.
  • the lower shield 180 may have a base plate 198 extending radially inward from the cylindrical outer band 196.
  • the base plate 198 may include an upwardly extending cylindrical inner band 103 surrounding the perimeter of the pedestal 152.
  • a cover ring 102 rests on the top of the cylindrical inner band 103 when the pedestal 152 is in a lower, loading position and rests on the outer periphery of the pedestal 152 when the pedestal is in an upper, deposition position to protect the pedestal 152 from sputter deposition.
  • the lower shield 180 encircles the sputtering surface 145 of the sputtering target 142 that faces the support pedestal 152 and also encircles a peripheral wall of the support pedestal 152.
  • the lower shield 160 covers and shadows the chamber wall 150 of the chamber 100 to reduce deposition of sputtering deposits originating from the sputtering surface 145 of the sputtering target 142 onto the components and surfaces behind the lower shield 180.
  • the lower shield 180 can protect the surfaces of the support pedestal 152, portions of the substrate 154, the chamber wall 150, and the bottom wall 160 of the chamber 100.
  • directional sputtering may be achieved by positioning the collimator 110 between the target 142 and the substrate support pedestal 152.
  • the collimator 110 may be mechanically and electrically coupled to the upper shield 186.
  • the collimator 110 may be coupled to a middle shield (not shown), positioned lower in the chamber 100.
  • the collimator 110 is integral to the upper shield 186, as shown in FIG. 8.
  • the collimator 110 is welded to the upper shield 186.
  • the collimator 110 may be electrically floating within the chamber 100.
  • the collimator 110 may be coupled to an electrical power source.
  • the collimator 110 includes a plurality of apertures (omitted from Figure 1 ) to direct gas and/or material flux within the chamber.
  • FIG. 2 is a top plan view of one embodiment of the collimator 110.
  • the collimator 110 is generally a honeycomb structure having hexagonal walls 126 separating hexagonal apertures 128 in a close-packed arrangement.
  • An aspect ratio of the hexagonal apertures 128 may be defined as the depth of the aperture 128 (equal to the thickness of the collimator) divided by the width 129 of the aperture 128.
  • the thickness of the walls 126 is between about 0.06 inches and about 0.18 inches.
  • the thickness of the walls 126 is between about 0.12 inches and about 0.15 inches.
  • the collimator 110 is comprised of a material selected from aluminum, copper, and stainless steel.
  • FIG. 3 is a schematic, cross-sectional view of a collimator 310 according to one embodiment described herein.
  • the collimator 310 includes a central region 320 having a high aspect ratio, such as from about 1.5:1 to about 3:1. In one embodiment, the aspect ratio of the central region 320 is about 2.5:1.
  • the aspect ratio of collimator 310 decreases along with the radial distance from the central region 320 to an outer peripheral region 340. In one embodiment, the aspect ratio of the collimator 310 decreases from a central region 320 aspect ratio of about 2.5:1 to a peripheral region 340 aspect ratio of about 1 :1.
  • the aspect ratio of the collimator 310 decreases from a central region 320 aspect ratio of about 3:1 to a peripheral region 340 aspect ratio of about 1 :1. In one embodiment, the aspect ratio of the collimator 310 decreases from a central region 320 aspect ratio of about 1.5:1 to a peripheral region 340 aspect ratio of about 1 :1.
  • the radial aperture decrease of the collimator 310 is accomplished by varying the thickness of the collimator 310.
  • the central region 320 of the collimator 310 has an increased thickness, such as between about 3 in to about 6 in.
  • the thickness of in the central region 320 of the collimator 310 is about 5 in.
  • the thickness of the collimator 310 decreases from the central region 320 to the outer peripheral region 340.
  • the thickness of the collimator 310 radially decreases from a central region 320 thickness of about 5 in to a peripheral region 340 thickness of about 2 in.
  • the thickness of the collimator 310 radially decreases from a central region 320 thickness of about 6 in to a peripheral region 340 thickness of about 2 in. In one embodiment, the thickness of the collimator 310 radially decreases from a central region 320 thickness of about 2.5 in to about 2 in.
  • the aspect ratio of the embodiment of collimator 310 depicted in FIG. 3 shows a radially decreasing thickness
  • the aspect ratio may alternatively be decreased by increasing the width of the apertures of the collimator 310 from the central region 320 to the peripheral region 340.
  • the thickness of the collimator 310 is decreased and the width of apertures of the collimator 310 is increased from the central region 320 to the peripheral region 340.
  • FIG. 3 depicts the aspect ratio radially decreasing in a linear fashion, resulting in an inverted conical shape.
  • Other embodiments of the present invention may include non-linear decreases in the aspect ratio.
  • FIG. 4 is a schematic, cross-sectional view of a collimator 410 according to one embodiment of the present invention.
  • the collimator 410 has a thickness that decreases from a central region 420 to a peripheral region 440 in a non-linear fashion, resulting in a convex shape.
  • FIG. 5 is a schematic, cross-sectional view of a collimator 510 according to one embodiment of the present invention.
  • the collimator 510 has a thickness that decreases from a central region 520 to a peripheral region 540 in a nonlinear fashion, resulting in a concave shape.
  • the central region 320, 420, 520 approaches zero, such that the central region 320, 420, 520 appears as a point on the bottom of the collimator 310, 410, 510.
  • a system controller 101 is provided outside of the chamber 100 and generally facilitates control and automation of the overall system.
  • the system controller 101 may include a central processing unit (CPU) (not shown), memory (not shown), and support circuits (not shown).
  • the CPU may be one of any computer processors used in industrial settings for controlling various system functions and chamber processes.
  • the system controller 101 provides signals to position the substrate 154 on the substrate support pedestal 152 and generate plasma in the chamber 100.
  • the system controller 101 sends signals to apply a voltage via DC power source 148 to bias the target 142 and to excite processing gas, such as argon, into plasma.
  • the system controller 101 may further provide signals to cause the RF power source 156 to DC self-bias the pedestal 152.
  • the DC self-bias helps attract positively charged ions created in the plasma deeply into high aspect ratio vias and trenches on the surface of the substrate.
  • the collimator 110 functions as a filter to trap ions and neutrals that are emitted from the target 142 at angles exceeding a selected angle, near normal to the substrate 154.
  • the collimator 110 may be one of the collimators 310, 410, or 510, depicted in FIGS. 3, 4, or 5, respectively.
  • the characteristic of the collimator 110 of having an aspect ratio that decreases radially from the center allows a greater percentage of ions emitted from peripheral regions of the target 142 to pass through the collimator 110. As a result, both the number of ions and the angle of arrival of ions deposited onto peripheral regions of the substrate 154 are increased. Therefore, according to embodiments of the present invention, material may be more uniformly sputter deposited across the surface of the substrate 154. Additionally, material may be more uniformly deposited on the bottom and sidewalls of high aspect ratio features, particularly high aspect ratio vias and trenches located near the periphery of the substrate 154.
  • material sputter deposited onto the field and bottom regions of features may be sputter etched.
  • the system controller 101 applies a high bias to the pedestal 152 such that the target 142 ions etch film already deposited on the substrate 154. As a result, the field deposition rate onto the substrate 154 is reduced, and the sputtered material re-deposits on either the sidewalls or bottom of the high aspect ratio features.
  • the system controller 101 applies high and low bias to the pedestal 152 in a pulsing, or alternating fashion such that the process becomes a pulsing deposit / etch process.
  • the collimator 110 cells specifically located below magnets 172 direct the majority of the deposition material toward the substrate 154. Therefore, at any particular time, material in one region of the substrate 154 may be deposited, while material already deposited in another region of the substrate 154 may be etched.
  • material sputter deposited onto the bottom of the features may be sputter etched using secondary plasma, such as argon plasma, generated in a region of the chamber 100 near the substrate 154.
  • the chamber 100 includes an RF coil 141 attached to the lower shield 180 by a plurality of coil standoffs 143, which electrically insulate the coil 141 from the lower shield 180.
  • the system controller 101 sends signals to apply RF power through the shield 180 to the coil 141 via feedthrough standoffs (not shown).
  • the RF coil inductively couples RF energy into the interior of the chamber 100 to ionize precursor gas, such as argon, to maintain secondary plasma near the substrate 154.
  • precursor gas such as argon
  • the secondary plasma resputters a deposition layer from the bottom of a high aspect ratio feature and redeposits the material onto the sidewalls of the feature.
  • the collimator 110 may be attached to the upper shield 186 by a plurality of radial brackets 111.
  • FIG. 6 is an enlarged, cross-sectional view of a bracket 611 for attaching the collimator 110 to the upper shield 186 according to one embodiment of the present invention.
  • the bracket 611 includes an internally threaded tube 613 that is welded to the collimator 110 and extends radially outward therefrom.
  • a fastening member 615 such as a screw, may be inserted through an aperture in the upper shield 186 and threaded into the tube 613 to attach the collimator 110 to the upper shield 186, while minimizing the potential for depositing material onto the threaded portion of the tube 613 or the fastening member 615.
  • FIG. 7 is an enlarged, cross-sectional view of a bracket 711 for attaching the collimator 110 to the upper shield 186 according to another embodiment of the present invention.
  • the bracket 711 includes a stud 713 that is welded to the collimator 110 and extends radially outward therefrom.
  • An internally threaded fastening member 715 may be inserted through an aperture in the upper shield 186 and threaded onto the stud 713 to attach the collimator 110 to the upper shield 186, while minimizing the potential for depositing material onto threaded portions of the stud 713 or the fastening member 715.
  • FIG. 8 is a schematic sectional view of a semiconductor processing system 800 having another embodiment of a process kit 840 described herein. Similar to process kit 140, the process kit 840 includes a one-piece lower shield 180. However, unlike the process kit 140 which comprises a separate collimator 110 coupled with the upper shield 186 via a radial bracket 111 , the process kit 840 includes a monolithic upper shield 886 comprising a shield portion 892 and an integrated flux optimizer portion 810. The monolithic construction of the monolithic upper shield 886 allows for maximization of cooling efficiency.
  • the integrated flux optimizer portion 810 includes a plurality of apertures (omitted from Figure 8) to direct gas and/or material flux within the chamber as discussed above.
  • FIG. 9A is a partial cross-sectional view of a monolithic upper shield 886 according to one embodiment described herein.
  • FIG. 9B is a top plan view of the monolithic upper shield 886 of FIG. 9A according to one embodiment described herein.
  • the monolithic upper shield 886 is dimensioned to encircle the sputtering surface 145 of the sputtering target 142 that faces the support pedestal 152.
  • the monolithic upper shield 886 shadows the adapter 144 of the chamber 100 to reduce deposition of sputtering deposits originating from the sputtering surface 145 of the sputtering target 142.
  • the monolithic upper shield 886 is of unitary construction and comprises a shield portion 892 and an integrated flux optimizer portion 810.
  • the shield portion 892 and the integrated flux optimizer portion 810 may be fabricated from a single mass of material.
  • the shield portion 892 comprises a cylindrical band 902.
  • the cylindrical band 902 comprises a top wall 904 and a bottom wall 906.
  • a support flange 908 extends radially outward from the top wall 904 of the cylindrical band 902.
  • the support flange 908 comprises a resting surface 910 for resting upon the adapter 144 of the chamber 800. In one embodiment, the resting surface 910 intersects with the bottom wall 906 forming a 90 degree angle.
  • the support flange 908 has a plurality of slots shaped to receive a pin to align the upper shield 892 with the adapter 144. In one embodiment the support flange 908 has one or more notches 940 positioned periodically around the cylindrical band 902.
  • the top wall 904 further comprises a top surface 925, an inner periphery 926, and an outer periphery 928.
  • the outer periphery 928 of the top wall 904 intersects with the support flange 908 to form a stepped portion 932.
  • the bottom wall 906 of the cylindrical band 902 has an outer diameter shown by arrows "A" dimensioned to fit within the adapter 144 and rest on a stepped portion 1032 (shown in FIG. 10B) of the lower shield 180.
  • the outer diameter "A" of the bottom wall 906 is between about 18 inches (45.7 cm) and about 18.5 inches (47 cm). In another embodiment, the outer diameter "A" of the bottom wall 906 is between about
  • the cylindrical band 902 has an inner diameter shown by arrows "B". In one embodiment, the inner diameter "B" of the cylindrical band 902 is between about
  • the inner diameter "B" of the cylindrical band 902 is between about 17.5 inches (44.5 cm) and about 17.7 inches (45 cm).
  • the top wall 904 has an outer diameter shown by arrows "C”. In one embodiment, the top wall 904 and the bottom wall 906 have the same inner diameter "B”.
  • the outer diameter "C" of the top wall 904 is between about 18 inches (45.7 cm) and about 18.5 inches (47 cm). In another embodiment, the outer diameter "C" of the top wall 904 is between about 18.3 inches (46.5 cm) and about 18.4 inches (46.7 cm). In one embodiment, the outer diameter "C" of the top wall 904 is greater than the outer diameter "A" of the bottom wall 906.
  • the integrated flux optimizer portion 810 may be designed similarly to one of the collimators 310, 410, or 510 depicted in FIGS. 3, 4, and 5 respectively. As shown in FIG. 9B, the integrated flux optimizer portion 810 is generally a honeycomb structure having hexagonal walls 942 separating hexagonal apertures 944 in a close-packed arrangement. An aspect ratio of the hexagonal apertures 944 may be defined as the depth of the aperture 944 (equal to the thickness off the integrated flux optimizer portion 810 divided by the width 946 of the aperture. In one embodiment, the hexagonal walls 942 adjacent to the shield portion 892 have a chamfer 950 and a radius.
  • the monolithic upper shield 886 may be machined from a single mass of aluminum.
  • the monolithic upper shield 886 may optionally be coated or anodized.
  • the monolithic upper shield 886 may be made from other materials compatible with the processing environment, and may also be comprised of one or more sections.
  • the shield portion 892 and the integrated flux optimizer portion 810 of the upper shield may are formed as separate pieces and coupled together using suitable attachment means, such as welding.
  • FIGS. 10A and 10B are partial sectional views of a lower shield according to embodiments described herein.
  • FIG. 10C is a top view of one embodiment of the lower shield of FIG. 10A.
  • the lower shield 180 is of unitary construction and comprises a cylindrical outer band 196, a base plate 198, and an inner cylindrical band 103.
  • the cylindrical outer band 196 has a diameter dimensioned to encircle the sputtering surface 145 of the sputtering target 142 and the peripheral edge 153 of the pedestal 152.
  • the cylindrical outer band 196 comprises an upper portion 1012, a middle portion 1014, and a lower portion 1016.
  • the upper portion 1012 is dimensioned to encircle the sputtering surface 145 of the sputtering target 142.
  • a support flange 182 extends radially outward from the upper portion 1012 of the cylindrical outer band 196.
  • the support flange 182 comprises a resting surface 1024 to rest upon the chamber walls 150 of the chamber 100.
  • the resting surface 1024 may have a plurality of slots shaped to receive a pin to align the lower shield 180 to the chamber walls 150 or any adapters positioned between the chamber walls 150 and the lower shield 180.
  • the resting surface 1024 has a surface roughness of from about 10 to about 80 microinches, or even from about 16 to about 63 microinches, or in one embodiment an average surface roughness of about 32 microinches.
  • the upper portion 1012 comprises a top surface 1025, an inner periphery 1026, and an outer periphery 1028.
  • the outer periphery 1028 extends upward above the top surface 1025 forming an annular lip 1030.
  • the annular lip 1030 forms a stepped portion 1032 with the top surface 1025.
  • the annular lip 1030 is positioned perpendicular to the top surface 1025 to form the stepped portion 1032.
  • the stepped portion 1032 provides a resting surface for interfacing with the upper shield 186.
  • the annular lip 1030 has an outer diameter shown by arrows "D". In one embodiment, the outer diameter "D" of the annular lip 1030 is between about 18.4 inches (46.7 cm) and about 18.7 inches (47.5 cm). In another embodiment, the outer diameter "D" of the annular lip 1030 is between about 18.5 inches (47 cm) and about 18.6 inches (47.2 cm). In one embodiment, the annular Hp 1030 has an inner diameter shown by arrows "E". In one embodiment, the inner diameter "E" of the annular lip 1030 is between about 18.2 inches (46.2 cm) and about 18.5 inches (47 cm). In another embodiment, the inner diameter "E” of the annular lip 1030 is between about 18.3 inches (46.5 cm) and about 18.4 inches (46.7 cm).
  • an outer diameter of the top surface 1025 is identical to the inner diameter of the "E" of the annular lip 1030.
  • the top surface has an inner diameter shown by arrows "F".
  • the inner diameter "F" of the top surface 1025 is between about 17.2 inches (43.7 cm) and about 18 inches (45.7 cm).
  • the inner diameter "F" of the top surface 1025 is between about 17.5 inches (44.5 cm) and about 17.6 inches (44.7 cm).
  • the inner periphery 1026 of the upper portion 1012 is angled radially outward at an angle ⁇ from vertical.
  • the angle ⁇ is from about 2 degrees to about 10 degrees from vertical. In one embodiment, the angle ⁇ is about 4 degrees from vertical.
  • the lower portion 1016 is dimensioned to encircle the pedestal 152.
  • the base plate 198 extends radially inward from the lower portion 1016 of the cylindrical outer band 196.
  • the cylindrical inner band 103 is coupled with the base plate 198 and is dimensioned to encircle the pedestal 152.
  • the cylindrical inner band 103, the base plate 198, and the cylindrical outer band 196 form a U-shaped channel.
  • the cylindrical inner band 103 comprises a height that is less than the height of the cylindrical outer band 196. In one embodiment, the height of the inner cylindrical band 103 is about one fifth of the height of the cylindrical outer band 196.
  • the middle portion 1014 has a notch 1040.
  • the cylindrical outer band 196 has a plurality of gas holes 1042.
  • the base plate 198 has an outer diameter shown by arrows "G". In one embodiment, the outer diameter "G” of the base plate 198 is between about 17 inches (43.2 cm) and about 17.4 inches (44.2 cm). In another embodiment, the outer diameter "G” of the base plate 198 is between about 17.1 inches (43.4 cm) and about 17.2 inches (43.7 cm). In one embodiment, the base plate 198 has an inner diameter shown by arrows "I”. In one embodiment, the inner diameter "I" of the base plate 198 is between about 13.9 inches (35.3 cm) and about 14.4 inches (36.6 cm). In another embodiment, the inner diameter "I” of the base plate 198 is between about 14 inches (35.6 cm) and about 14.1 inches (35.8 cm).
  • the inner cylindrical band 103 has an outer diameter shown by arrows "H".
  • the outer diameter "H” of the inner cylindrical band is between about 14.0 inches (35.6 cm) and about 14.3 inches (36.3 cm).
  • the outer diameter "H” of the inner cylindrical band 103 is between about 14.2 inches (36.1 cm) and about 14.3 inches (36.3 cm).
  • the cylindrical outer band 196, the base plate 198, and the inner cylindrical band 103 comprise a unitary structure.
  • a unitary lower shield 180 is advantageous over prior shields which included multiple components, often two or three separate pieces to make up the complete lower shield.
  • a single piece shield is more thermally uniform than a multiple-component shield, in both heating and cooling processes.
  • the single piece lower shield 180 has only one thermal interface to the chamber wall 150, allowing for more control over the heat exchange between the shield 180 and chamber wall 150.
  • a shield 180 with multiple components makes it more difficult and laborious to remove the shield for cleaning.
  • the single piece shield 180 has a continuous surface exposed to the sputtering deposits without interfaces or corners that are more difficult to clean out.
  • the single piece shield 180 also more effectively shields the chamber wall 150 from sputter deposition during process cycles.
  • the upper shields 186, 886 and/or the lower shield 180 can be made from 300 series stainless steel, or in another embodiment, aluminum.
  • the exposed surfaces of the upper shields 186, 886 and/or the lower shield 180 are treated with CLEANCOATTM, which is commercially available from Applied Materials, Santa Clara, California.
  • CLEANCOATTM is a twin-wire aluminum arc spray coating that is applied to substrate processing chamber components, such as the upper shields 186, 886 and/or the lower shield 180, to reduce particle shedding of deposits on the shields and thus prevent contamination of a substrate in the chamber.
  • the twin-wire aluminum arc spray coating on the upper shields 186, 886 and/or the lower shield 180 has a surface roughness of from about 600 to about 2300 microinches.
  • the upper shields 186, 886 and/or the lower shield 180 have exposed surfaces facing the interior volume in the chamber 100, 800.
  • the exposed surfaces are bead blasted to have a surface roughness of 175 ⁇ . 75 microinches.
  • the texturized bead blasted surfaces serve to reduce particle shedding and prevent contamination within the chamber 100, 800.
  • the surface roughness average is the mean of the absolute values of the displacements from the mean line of the peaks and valleys of the roughness features along the exposed surface.
  • the roughness average, skewness, or other properties may be determined by a profilometer that passes a needle over the exposed surface and generates a trace of the fluctuations of the height of the asperities on the surface, or by a scanning electron microscope that uses an electron beam reflected from the surface to generate an image of the surface.

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PCT/US2010/030116 2009-04-24 2010-04-06 Wafer processing deposition shielding components WO2010123680A2 (en)

Priority Applications (7)

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KR1020187035627A KR102020010B1 (ko) 2009-04-24 2010-04-06 웨이퍼 프로세싱 증착 차폐 부품
KR1020217013278A KR102374073B1 (ko) 2009-04-24 2010-04-06 웨이퍼 프로세싱 증착 차폐 부품
CN2010800064499A CN102301451A (zh) 2009-04-24 2010-04-06 晶圆处理沉积屏蔽部件
KR1020117028097A KR101782355B1 (ko) 2009-04-24 2010-04-06 웨이퍼 프로세싱 증착 차폐 부품
KR1020197025908A KR102186535B1 (ko) 2009-04-24 2010-04-06 웨이퍼 프로세싱 증착 차폐 부품
KR1020207034181A KR102262978B1 (ko) 2009-04-24 2010-04-06 웨이퍼 프로세싱 증착 차폐 부품
KR1020177017742A KR101929971B1 (ko) 2009-04-24 2010-04-06 웨이퍼 프로세싱 증착 차폐 부품

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US17262709P 2009-04-24 2009-04-24
US61/172,627 2009-04-24
US12/482,846 US20090308739A1 (en) 2008-06-17 2009-06-11 Wafer processing deposition shielding components
US12/482,713 US20090308732A1 (en) 2008-06-17 2009-06-11 Apparatus and method for uniform deposition
US12/482,713 2009-06-11
US12/482,846 2009-06-11

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3140851A4 (en) * 2014-11-26 2017-11-01 Applied Materials, Inc. Collimator for use in substrate processing chambers
US10727033B2 (en) 2015-10-27 2020-07-28 Applied Materials, Inc. Biasable flux optimizer / collimator for PVD sputter chamber
US11424112B2 (en) * 2017-11-03 2022-08-23 Varian Semiconductor Equipment Associates, Inc. Transparent halo assembly for reduced particle generation

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8702918B2 (en) * 2011-12-15 2014-04-22 Applied Materials, Inc. Apparatus for enabling concentricity of plasma dark space
KR20160002543A (ko) 2014-06-30 2016-01-08 세메스 주식회사 기판 처리 장치
US9887073B2 (en) 2015-02-13 2018-02-06 Taiwan Semiconductor Manufacturing Co., Ltd. Physical vapor deposition system and physical vapor depositing method using the same
JP6088083B1 (ja) * 2016-03-14 2017-03-01 株式会社東芝 処理装置及びコリメータ
CN116114126A (zh) 2021-06-11 2023-05-12 肖特日本株式会社 气密端子及该气密端子的制造方法
US20220406583A1 (en) * 2021-06-18 2022-12-22 Taiwan Semiconductor Manufacturing Co., Ltd. Deposition system and method
KR102594388B1 (ko) * 2021-08-24 2023-10-27 전주대학교 산학협력단 Mec 환경에서 긴급 데이터 전송을 위한 sdn 기반 패킷 스케줄링 방법
CN115449762A (zh) * 2022-08-22 2022-12-09 无锡尚积半导体科技有限公司 一种用于磁控溅射设备的准直器及磁控溅射设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004083984A (ja) * 2002-08-26 2004-03-18 Fujitsu Ltd スパッタリング装置
US6780294B1 (en) * 2002-08-19 2004-08-24 Set, Tosoh Shield assembly for substrate processing chamber
US20070102286A1 (en) * 2005-10-31 2007-05-10 Applied Materials, Inc. Process kit and target for substrate processing chamber

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5415753A (en) * 1993-07-22 1995-05-16 Materials Research Corporation Stationary aperture plate for reactive sputter deposition
JPH093639A (ja) * 1995-06-23 1997-01-07 Applied Materials Inc Pvd装置
JPH11200029A (ja) * 1998-01-13 1999-07-27 Victor Co Of Japan Ltd スパッタリング装置
US20030015421A1 (en) 2001-07-20 2003-01-23 Applied Materials, Inc. Collimated sputtering of cobalt
JP2007273490A (ja) * 2004-03-30 2007-10-18 Renesas Technology Corp 半導体集積回路装置の製造方法
TW200746268A (en) * 2006-04-11 2007-12-16 Applied Materials Inc Process for forming cobalt-containing materials

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6780294B1 (en) * 2002-08-19 2004-08-24 Set, Tosoh Shield assembly for substrate processing chamber
JP2004083984A (ja) * 2002-08-26 2004-03-18 Fujitsu Ltd スパッタリング装置
US20070102286A1 (en) * 2005-10-31 2007-05-10 Applied Materials, Inc. Process kit and target for substrate processing chamber

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3140851A4 (en) * 2014-11-26 2017-11-01 Applied Materials, Inc. Collimator for use in substrate processing chambers
EP3723113A1 (en) * 2014-11-26 2020-10-14 Applied Materials, Inc. Collimator for use in substrate processing chambers
US10727033B2 (en) 2015-10-27 2020-07-28 Applied Materials, Inc. Biasable flux optimizer / collimator for PVD sputter chamber
CN112030123A (zh) * 2015-10-27 2020-12-04 应用材料公司 用于pvd溅射腔室的可偏压式通量优化器/准直器
US11309169B2 (en) 2015-10-27 2022-04-19 Applied Materials, Inc. Biasable flux optimizer / collimator for PVD sputter chamber
US11424112B2 (en) * 2017-11-03 2022-08-23 Varian Semiconductor Equipment Associates, Inc. Transparent halo assembly for reduced particle generation

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KR20200136061A (ko) 2020-12-04
TWI844851B (zh) 2024-06-11
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TW202136549A (zh) 2021-10-01
TWI741750B (zh) 2021-10-01
TWI695078B (zh) 2020-06-01
KR20190105132A (ko) 2019-09-11
KR102020010B1 (ko) 2019-09-09
KR20180133566A (ko) 2018-12-14
KR20210052600A (ko) 2021-05-10
TW201920726A (zh) 2019-06-01
TW202000961A (zh) 2020-01-01
TW201814075A (zh) 2018-04-16
KR101929971B1 (ko) 2018-12-18
KR20170076824A (ko) 2017-07-04
TW202307237A (zh) 2023-02-16
TW202102703A (zh) 2021-01-16
TWI527921B (zh) 2016-04-01
TWI605144B (zh) 2017-11-11
TW201100571A (en) 2011-01-01
TWI654329B (zh) 2019-03-21
KR102374073B1 (ko) 2022-03-11
TWI789790B (zh) 2023-01-11
CN102301451A (zh) 2011-12-28
KR20140014378A (ko) 2014-02-06
KR102262978B1 (ko) 2021-06-08
CN107039230A (zh) 2017-08-11
TWI715279B (zh) 2021-01-01
WO2010123680A3 (en) 2011-01-13
KR101782355B1 (ko) 2017-09-27

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