WO2010116553A1 - Chip fuse and method of manufacturing same - Google Patents
Chip fuse and method of manufacturing same Download PDFInfo
- Publication number
- WO2010116553A1 WO2010116553A1 PCT/JP2009/067700 JP2009067700W WO2010116553A1 WO 2010116553 A1 WO2010116553 A1 WO 2010116553A1 JP 2009067700 W JP2009067700 W JP 2009067700W WO 2010116553 A1 WO2010116553 A1 WO 2010116553A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- film
- fuse
- chip
- forming
- glass
- Prior art date
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H69/00—Apparatus or processes for the manufacture of emergency protective devices
- H01H69/02—Manufacture of fuses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/05—Component parts thereof
- H01H85/055—Fusible members
- H01H85/08—Fusible members characterised by the shape or form of the fusible member
- H01H85/10—Fusible members characterised by the shape or form of the fusible member with constriction for localised fusing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/05—Component parts thereof
- H01H85/165—Casings
- H01H85/17—Casings characterised by the casing material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
- H01H85/00—Protective devices in which the current flows through a part of fusible material and this current is interrupted by displacement of the fusible material when this current becomes excessive
- H01H85/02—Details
- H01H85/04—Fuses, i.e. expendable parts of the protective device, e.g. cartridges
- H01H85/041—Fuses, i.e. expendable parts of the protective device, e.g. cartridges characterised by the type
- H01H85/0411—Miniature fuses
- H01H2085/0414—Surface mounted fuses
Definitions
- the present invention relates to a chip-type fuse for protecting a circuit against an abnormal current in a circuit such as an integrated circuit and a method for manufacturing the same.
- a fuse film in which a fusing narrow part is formed in a central part on a base glass film provided on an insulating substrate which is an alumina ceramic substrate, and surface electrodes are formed at both ends thereof Further, a protective film is formed on the entire surface of the fuse film.
- a protective film for example, as shown in FIG. 4, a fuse film 103 having a fusing narrow portion 106 is formed on a glass glaze film 102 as a glaze film provided on the entire upper surface of the insulating substrate 101.
- Patent Document 1 As shown in FIG.
- Patent Document 2 there is also known one in which the entire surface of the fuse film 103 on the base glass grace film 102 is coated with a protective film 105 of a resin layer. Furthermore, as shown in FIG. 6, there is a type in which the entire surface of the fuse film 103 is covered with a glass film 107 along the shape of the fuse film 103, and the entire surface thereof is covered with a resin layer as a protective film 108 (Patent Document 3).
- Patent Document 1 since the entire surface of the fuse film 103 is largely covered with the protective film of the glass film 104, the fuse film 103 is not blown instantaneously, the internal resistance value increases, and the initially planned resistance It is difficult to protect the entire circuit with values.
- Patent Document 2 since a resin layer is employed as the protective film, the internal resistance value does not increase as in the invention of Patent Document 1, but the fusing characteristics do not increase, and therefore fusing is not performed instantaneously.
- the invention of Patent Document 3 employs a configuration in which the entire surface of the fuse film 103 is covered with a glass film and a resin layer, so that an increase in internal resistance value is suppressed and a fusing characteristic is also improved.
- the object of the present invention is to maintain the same fusing characteristics as the fuse described in Patent Document 3, to sufficiently reduce the increase in internal resistance, and to sufficiently prevent explosion and scattering of the glass film even when a large current flows.
- Another object of the present invention is to provide a chip-type fuse that can be prevented.
- Another object of the present invention is to provide a chip-type fuse manufacturing method capable of easily and industrially producing the chip-type fuse of the present invention described above.
- an insulating substrate having a glaze layer, a fuse film having a fusing narrow portion provided on the glaze layer, a surface electrode formed on both ends of the upper surface of the fuse film, and provided on at least the upper surface of the fuse film
- a glass film an overcoat film made of a resin layer covering the glass film and the fuse film provided with the glass film, and an end face electrode
- a chip-type fuse having a structure in which a glass film is provided on the upper surface portion of the fuse film in which the surface electrode is not formed and an overcoat film is in contact with a side surface of the fuse film.
- the step (f) is divided along one of the vertical and horizontal slits of the collective insulating substrate, and the end face electrode is formed in the step (g) and the step (g).
- a method for manufacturing a chip-type fuse which includes a step (h) in which each chip is obtained by being divided along the other slit of the collective insulating substrate.
- the upper surface of the fuse film including the melted narrow portion is protected with a glass film, and the side surface is protected with an overcoat film made of a resin layer.
- the glass on the top surface of the fuse film can be maintained even when a large current flows by adopting a configuration that can maintain the fusing characteristics, reduce the internal resistance value, and lower the melting point of the glass film below that of the glaze layer.
- the film can be more easily melted, and the explosion and scattering of the glass film can be sufficiently prevented. Therefore, the chip-type fuse of the present invention sufficiently protects the entire circuit against a current exceeding a specific value, and is excellent in durability and safety.
- the manufacturing method of the present invention includes the step (e), the chip-type fuse of the present invention can be manufactured easily and efficiently industrially, and further, the conventional product shown in FIG. Rather than forming a glass film around the fuse film and then forming a resin layer that is an overcoat film, the thickness of the glass film will be even on the fuse film, improving the uniformity of the quality of the chip-type fuse. Can do.
- FIG. 3 is a cross-sectional view of the chip-type fuse of the present invention along AA in FIG. 2.
- FIG. 3 is a cross-sectional view taken along the line BB in FIG.
- FIG. 2 is a cross-sectional view taken along the line CC of FIG. It is sectional drawing corresponding to FIG. 3 of the conventional chip-type fuse. It is sectional drawing corresponding to FIG. 3 of the other conventional chip-type fuse. It is sectional drawing corresponding to FIG. 3 of another conventional chip-type fuse.
- FIGS. 1 denotes an insulating substrate.
- a glaze layer 2 is formed on the entire upper surface of the insulating substrate 1, and the longitudinal direction is the same length as that of the glaze layer on the glaze layer and the width direction is located slightly inward from both ends.
- a fuse film 3 having a fusing narrow portion 6 at the center is overlaid.
- the insulating substrate 1 for example, alumina ceramic substrate, alumina nitride substrate, steatite ceramic substrate composed mainly of MgO ⁇ SiO 2, including but forsterite ceramic substrate composed mainly of 2MgO ⁇ SiO 2, the It is preferable to use an alumina ceramic substrate that can exhibit the effects of the invention.
- the glaze layer 2 include glass in which glassy components such as SiO 2 , BaO, CaO, Al 2 O 3 , B 2 O 3 , and ZrO 2 are combined, for example, SiO 2 —Al 2 O 3 —CaO glass. If necessary, a black inorganic pigment having a spinel structure can be contained.
- a front electrode 7 having the same width as that of the fuse film 3 is provided on both ends of the fuse film 3.
- 2 is a glass film 8 formed on the upper surface of the fuse film 3.
- the glass film 8 is partially overlapped with the surface electrode 7 as shown in FIGS. Yes.
- the glass film 8 is formed of a glassy component in the same manner as the glaze layer 2 and is a material lower than the melting point of the glaze layer 2 in order to prevent explosion and scattering of the glass film even when a large current flows. Is preferably formed.
- it is preferably formed of SiO 2 —Bi 2 O 3 —B 2 O 3 glass or lead borosilicate glass.
- the glass film 8 and the fuse film 3 provided with the glass film 8 are covered with an overcoat film 9 of a resin layer.
- a glass film 8 is provided on the upper surface portion of the fuse film 3 where the surface electrode 7 is not formed, and an overcoat film 9 is provided on the side surface of the fuse film 3.
- the resin layer for forming the overcoat film 9 can be formed of heat resistance, for example, a silicone resin or an epoxy resin.
- a back electrode 7 ′ can be provided on the back surface of the insulating substrate 1 so as to oppose the front electrode 7 as shown in FIG. 1, and the front electrode 7 and the back electrode 7 ′ are provided.
- An end face electrode 10 and a terminal electrode 11 are provided at both ends of the insulating substrate 1 so as to cover a part of the end face electrode 10.
- the manufacturing method of the present invention includes a step (a) of preparing a collective insulating substrate having a plurality of slits for obtaining a plurality of chips by division in a vertical and horizontal direction and a chip forming portion having a glaze layer provided on the surface.
- a collective insulating substrate a known substrate conventionally used for manufacturing a chip-type fuse can be used.
- a collective insulating substrate manufactured by providing desired vertical and horizontal slits with laser light or the like can be used.
- the manufacturing method of the present invention includes a step (b) of forming a fuse film on the glaze layer in order to form a fuse film on each chip forming portion of the collective insulating substrate.
- the fuse film can be formed by a known method, for example, using a metal organic paste containing a noble metal such as gold or silver, and having the same length as the length of the chip formation portion in the longitudinal direction. Now, it can be formed by a method of screen printing with a pattern or the like that is slightly shorter in the width direction and firing. Firing conditions can be appropriately selected depending on the type of metal organic paste and the like.
- the manufacturing method of the present invention includes a step (c) of forming surface electrodes on both upper end portions of the fuse film in each chip forming portion.
- the formation of the surface electrode can be performed by a known method or the like, for example, a material for forming the surface electrode, for example, so that the width is the same at both ends of the fuse film in each fuse forming portion, for example, A thick silver paste or the like can be formed by screen printing and baking.
- the firing conditions can be appropriately selected according to the type of the material for forming the surface electrode, but in order to maintain the accuracy of the fuse film formed in the step (b), it is lower than the firing temperature in the step (b). It is preferable to carry out at temperature.
- the manufacturing method of the present invention includes a step (d) of forming a glass film on at least the fuse film on which no surface electrode is formed.
- the glass film is formed by a method in which a paste containing a glassy component is screen-printed at least on the fuse film or over the fuse film and a part of the surface electrode and fired. can do.
- the firing conditions can be appropriately selected according to the type of material forming the glass film, etc., but in order to maintain the accuracy of the fuse film formed in step (b), the firing temperature is higher than the firing temperature in step (b). It is preferable to carry out at a low temperature and at a temperature comparable to the firing temperature of the front electrode formed in step (c).
- the melting point of the material forming the glass film is preferably lower than the melting point of the glaze layer of the collective insulating substrate prepared in step (a) in order to further improve the effects of the present invention.
- the glaze layer is formed of a SiO 2 —Al 2 O 3 —CaO glass paste
- the glass film can be formed using a lead borosilicate glass paste having a lower melting point.
- the manufacturing method of the present invention includes a step (e) of partially removing a portion where the glass film is laminated on the fuse film to simultaneously form a fusing narrow portion and exposing a side surface of the fuse film at the removed portion.
- a step (e) of partially removing a portion where the glass film is laminated on the fuse film to simultaneously form a fusing narrow portion and exposing a side surface of the fuse film at the removed portion Including.
- the fuse film and the glass film are simultaneously removed, and a fusing narrow portion 6 is provided at the center of the fuse film 3 as shown in FIG. 2, thereby forming the fuse film 3 as shown in FIG.
- This is a step of forming a structure in which the glass film 8 is formed in contact with the upper surface, and the side surface of the fuse film 3 at the removed portion is exposed.
- Such removal can be performed by, for example, a laser method or a sandblast method.
- the manufacturing method of the present invention includes a step (f) of forming an overcoat film by leaving a part of both ends of the surface electrode and covering the glass film and the side surfaces of the exposed fuse film with a resin layer.
- step (f) as shown in FIG. 3, the side surface of the fuse film 3 having the glass film 8 on the upper surface portion of the fuse film 3 where the front electrode 7 is not formed, and a part of the front electrode 7 and the glass film 8 is a step of forming an overcoat film 9 that protects the whole 8.
- the overcoat film has a heat resistance, for example, a resin layer such as a silicone resin or an epoxy resin can be formed by a known method.
- the manufacturing method of the present invention includes a step (g) of forming an end face electrode by dividing along one of the vertical and horizontal slits of the collective insulating substrate to form the end face electrode.
- Step (g) is a step of performing primary division of the collective insulating substrate and forming end face electrodes by, for example, a known method.
- the back electrode 7 ′ may be formed as shown in FIG. 1 before or after the primary division of the collective insulating substrate and before the end face electrodes are formed. it can.
- the back electrode can be formed using, for example, an alloy of nickel and chromium or a conductive resin paste by sputtering or screen printing.
- the manufacturing method of the present invention includes a step (h) in which the chips are obtained by being divided along the other slit of the collective insulating substrate, which is not divided in the step (g).
- Step (h) is a step of finally dividing each chip forming portion formed on the collective insulating substrate individually by secondary division.
- the step (h) in order to mount the chip-type fuse on the circuit, for example, each layer made of copper, nickel, tin and the like is formed by plating, and the end face electrode 10 is covered as shown in FIG. Thus, the terminal electrode 11 can be provided.
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Fuses (AREA)
Abstract
Description
この保護膜としては、例えば、図4に示すように、絶縁基板101の全上面に設けたグレーズ膜としてのガラスグレーズ膜102の上に、溶断狭小部106を有するヒューズ膜103を形成し、その上に前記グレーズ膜よりやや内側の上面に全体が四角形のガラス膜104を保護膜として形成したものがある(特許文献1)。また、図5に示すように、下地ガラスグレース膜102上のヒューズ膜103の全面を樹脂層の保護膜105で被膜したものも知られている(特許文献2)。
さらに、図6に示すように、ヒューズ膜103の形状に沿って、その全面をガラス膜107で覆い、その上の全体を保護膜108として樹脂層で被覆したものもある(特許文献3)。 In general, as a chip-type fuse, a fuse film in which a fusing narrow part is formed in a central part on a base glass film provided on an insulating substrate which is an alumina ceramic substrate, and surface electrodes are formed at both ends thereof, Further, a protective film is formed on the entire surface of the fuse film.
As this protective film, for example, as shown in FIG. 4, a
Furthermore, as shown in FIG. 6, there is a type in which the entire surface of the
特許文献2の発明では、保護膜として樹脂層を採用するので、特許文献1の発明のような内部抵抗値の上昇は少ないが、溶断特性も上昇せず、したがって、溶断が瞬時に行われないという欠点がある。
特許文献3の発明では、ヒューズ膜103の全面をガラス膜及び樹脂層で被覆する構成を採用するので、内部抵抗値の上昇を抑え、溶断特性も向上する。しかし、このような構成のヒューズに非常に大きな電流が流れと、溶断狭小部を含むヒューズ膜103を覆うガラス膜が爆発、飛散するという問題が生じる場合がある。 However, in the invention of
In the invention of
The invention of
本発明の別の課題は、上記本発明のチップ型ヒューズを、容易に、かつ工業的にも効率良く生産することができるチップ型ヒューズの製造方法を提供することにある。 The object of the present invention is to maintain the same fusing characteristics as the fuse described in
Another object of the present invention is to provide a chip-type fuse manufacturing method capable of easily and industrially producing the chip-type fuse of the present invention described above.
表電極が形成されていない前記ヒューズ膜上面部分にはガラス膜が、ヒューズ膜の側面にはオーバーコート膜が接して設けられた構造を有するチップ型ヒューズが提供される。 According to the present invention, an insulating substrate having a glaze layer, a fuse film having a fusing narrow portion provided on the glaze layer, a surface electrode formed on both ends of the upper surface of the fuse film, and provided on at least the upper surface of the fuse film A glass film, an overcoat film made of a resin layer covering the glass film and the fuse film provided with the glass film, and an end face electrode,
There is provided a chip-type fuse having a structure in which a glass film is provided on the upper surface portion of the fuse film in which the surface electrode is not formed and an overcoat film is in contact with a side surface of the fuse film.
本発明のチップ型ヒューズとしては、図1乃至図3に示されるものが例示できる。1は絶縁基板であり、該絶縁基板1上の上全面には、グレーズ層2が形成され、該グレーズ層上には長手方向がグレーズ層と同じ長さで幅方向を両端から若干内側に位置する、中央部に溶断狭小部6を有するヒューズ膜3が重層されている。 Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited thereto.
Examples of the chip-type fuse of the present invention include those shown in FIGS.
前記グレーズ層2は、SiO2、BaO、CaO、Al2O3、B2O3、ZrO2等のガラス質成分を組み合わせたガラス、例えば、SiO2-Al2O3-CaO系ガラスが挙げられ、また必要によりスピネル構造を有する黒色無機顔料を含有させることもできる。 As the
Examples of the
ガラス膜8は、グレーズ層2と同様にガラス質成分で形成され、大電流が流れた場合にも、ガラス膜の爆発及び飛散をより十分に防止するために、グレーズ層2の融点より低い材料で形成されることが好ましい。例えばSiO2-Bi2O3-B2O3系のガラスやホウ珪酸鉛系ガラスにより形成されるのが好ましい。 A
The
オーバーコート膜9を形成する樹脂層としては、耐熱性を有する、例えば、シリコーン樹脂、エポキシ樹脂により形成することができる。 The
The resin layer for forming the
本発明の製造方法は、分割により複数のチップを得るためのスリットを縦横に複数有し、かつ表面にグレーズ層を設けたチップ形成部分が集合した集合絶縁基板を準備する工程(a)を含む。
このような集合絶縁基板は、従来、チップ型ヒューズの製造に使用されている公知の基板を用いることができる。また、絶縁基板上にグレーズ層を形成するためのグレーズ用ペーストを印刷し、焼成した後、レーザー光等により所望の縦横のスリットを設けて製造された集合絶縁基板を用いることもできる。 Next, a manufacturing method of the chip type fuse of the present invention will be described below.
The manufacturing method of the present invention includes a step (a) of preparing a collective insulating substrate having a plurality of slits for obtaining a plurality of chips by division in a vertical and horizontal direction and a chip forming portion having a glaze layer provided on the surface. .
As such a collective insulating substrate, a known substrate conventionally used for manufacturing a chip-type fuse can be used. In addition, after the glaze paste for forming the glaze layer is printed on the insulating substrate and baked, a collective insulating substrate manufactured by providing desired vertical and horizontal slits with laser light or the like can be used.
工程(b)において、ヒューズ膜の形成は、公知の方法等により行うことができ、例えば、金または銀等の貴金属を含む金属有機物ペーストを用いて、チップ形成部分の長手方向の長さと同じ長さで、幅方向をやや短く内側に位置するようなパターン等によりスクリーン印刷し、焼成する方法により形成することができる。焼成条件は、金属有機物ペーストの種類等に応じて適宜選択することができる。 The manufacturing method of the present invention includes a step (b) of forming a fuse film on the glaze layer in order to form a fuse film on each chip forming portion of the collective insulating substrate.
In the step (b), the fuse film can be formed by a known method, for example, using a metal organic paste containing a noble metal such as gold or silver, and having the same length as the length of the chip formation portion in the longitudinal direction. Now, it can be formed by a method of screen printing with a pattern or the like that is slightly shorter in the width direction and firing. Firing conditions can be appropriately selected depending on the type of metal organic paste and the like.
工程(c)において、表電極のの形成は、公知の方法等により行うことができ、例えば、各ヒューズ形成部分におけるヒューズ膜の両端に幅を同じくするように、表電極の形成材料、例えば、厚膜銀ペースト等をスクリーン印刷し、焼成する方法により形成することができる。焼成条件は、表電極の形成材料の種類等に応じて適宜選択することができるが、工程(b)で形成したヒューズ膜の精度を維持するために、工程(b)における焼成温度よりも低い温度で行うことが好ましい。 The manufacturing method of the present invention includes a step (c) of forming surface electrodes on both upper end portions of the fuse film in each chip forming portion.
In the step (c), the formation of the surface electrode can be performed by a known method or the like, for example, a material for forming the surface electrode, for example, so that the width is the same at both ends of the fuse film in each fuse forming portion, for example, A thick silver paste or the like can be formed by screen printing and baking. The firing conditions can be appropriately selected according to the type of the material for forming the surface electrode, but in order to maintain the accuracy of the fuse film formed in the step (b), it is lower than the firing temperature in the step (b). It is preferable to carry out at temperature.
工程(d)において、ガラス膜の形成は、ガラス質成分を含むペーストを、少なくともヒューズ膜上に、もしくは該ヒューズ膜及び表電極の一部に重層するようにスクリーン印刷し、焼成する方法により形成することができる。焼成条件は、ガラス膜を形成する材料の種類等に応じて適宜選択することができるが、工程(b)で形成したヒューズ膜の精度を維持するために、工程(b)における焼成温度よりも低い温度で、また、工程(c)で形成した表電極の焼成温度と同程度の温度で行うことが好ましい。
また、ガラス膜を形成する材料の融点は、本発明の効果をより改善するために、工程(a)で準備した集合絶縁基板のグレーズ層の融点よりも低融点とすることが好ましい。例えば、グレーズ層を、SiO2-Al2O3-CaO系ガラスペーストにより形成した場合には、ガラス膜は、これより低融点のホウ珪酸鉛系ガラスペーストを用いて形成することができる。 The manufacturing method of the present invention includes a step (d) of forming a glass film on at least the fuse film on which no surface electrode is formed.
In step (d), the glass film is formed by a method in which a paste containing a glassy component is screen-printed at least on the fuse film or over the fuse film and a part of the surface electrode and fired. can do. The firing conditions can be appropriately selected according to the type of material forming the glass film, etc., but in order to maintain the accuracy of the fuse film formed in step (b), the firing temperature is higher than the firing temperature in step (b). It is preferable to carry out at a low temperature and at a temperature comparable to the firing temperature of the front electrode formed in step (c).
The melting point of the material forming the glass film is preferably lower than the melting point of the glaze layer of the collective insulating substrate prepared in step (a) in order to further improve the effects of the present invention. For example, when the glaze layer is formed of a SiO 2 —Al 2 O 3 —CaO glass paste, the glass film can be formed using a lead borosilicate glass paste having a lower melting point.
工程(e)は、ヒューズ膜とガラス膜とを同時に除去して、図2に示すようなヒューズ膜3の中央部に溶断狭小部6を設け、これにより、図3に示すようにヒューズ膜3の上面にはガラス膜8が接して形成され、上記除去した箇所のヒューズ膜3の側面が露出される構成を形成する工程である。
上記ヒューズ膜とガラス膜とを同時に除去することにより、上記所望の構成を容易に、かつ効率的に形成することができる。このような除去は、例えば、レーザー法や、サンドブラスト法により実施することができる。 The manufacturing method of the present invention includes a step (e) of partially removing a portion where the glass film is laminated on the fuse film to simultaneously form a fusing narrow portion and exposing a side surface of the fuse film at the removed portion. Including.
In the step (e), the fuse film and the glass film are simultaneously removed, and a fusing
By removing the fuse film and the glass film at the same time, the desired configuration can be easily and efficiently formed. Such removal can be performed by, for example, a laser method or a sandblast method.
工程(f)は、図3に示されるように、表電極7が形成されていない前記ヒューズ膜3上面部分にガラス膜8を有するヒューズ膜3の側面、並びに表電極7の一部とガラス膜8全体とを保護するオーバーコート膜9を形成する工程である。
オーバーコート膜は、耐熱性を有する、例えば、シリコーン樹脂、エポキシ樹脂等の樹脂層を公知の方法等により形成することができる。 The manufacturing method of the present invention includes a step (f) of forming an overcoat film by leaving a part of both ends of the surface electrode and covering the glass film and the side surfaces of the exposed fuse film with a resin layer.
In step (f), as shown in FIG. 3, the side surface of the
The overcoat film has a heat resistance, for example, a resin layer such as a silicone resin or an epoxy resin can be formed by a known method.
工程(g)は、集合絶縁基板の一次分割を実施し、例えば、公知の方法で端面電極を形成する工程である。この工程(g)においては、例えば、集合絶縁基板の一次分割前、もしくは該一次分割後であって、端面電極の形成前に、図1に示されるように裏電極7’を形成することもできる。
裏電極の形成は、例えば、スパッタ法やスクリーン印刷法により、ニッケルとクロムの合金や、導電性樹脂ペーストを用いて行うことができる。 The manufacturing method of the present invention includes a step (g) of forming an end face electrode by dividing along one of the vertical and horizontal slits of the collective insulating substrate to form the end face electrode.
Step (g) is a step of performing primary division of the collective insulating substrate and forming end face electrodes by, for example, a known method. In this step (g), for example, the
The back electrode can be formed using, for example, an alloy of nickel and chromium or a conductive resin paste by sputtering or screen printing.
工程(h)は、集合絶縁基板に形成された各チップ形成用部分を二次分割により最終的に個々に分割する工程である。
工程(h)の後には、チップ型ヒューズを回路に実装するために、例えば、銅、ニッケル、及び錫等からなる各層をめっきにより形成し、図1に示されるように端面電極10を被覆するように端子電極11を設けることができる。 The manufacturing method of the present invention includes a step (h) in which the chips are obtained by being divided along the other slit of the collective insulating substrate, which is not divided in the step (g).
Step (h) is a step of finally dividing each chip forming portion formed on the collective insulating substrate individually by secondary division.
After the step (h), in order to mount the chip-type fuse on the circuit, for example, each layer made of copper, nickel, tin and the like is formed by plating, and the
2 グレーズ層
3 ヒューズ膜
6 溶断狭小部
7 表電極
7’裏電極
8 ガラス層
9 オーバーコート膜
10 端面電極
11 端子電極 DESCRIPTION OF
Claims (3)
- グレーズ層を有する絶縁基板と、該グレーズ層上に設けた溶断狭小部を有するヒューズ膜と、該ヒューズ膜の上面両端部分に形成した表電極と、少なくともヒューズ膜上面に設けたガラス膜と、該ガラス膜及び該ガラス膜を設けたヒューズ膜を覆う樹脂層からなるオーバーコート膜と、端面電極とを備え、
表電極が形成されていない前記ヒューズ膜上面部分にはガラス膜が、ヒューズ膜の側面にはオーバーコート膜が接して設けられた構造を有するチップ型ヒューズ。 An insulating substrate having a glaze layer, a fuse film having a fusing narrow portion provided on the glaze layer, surface electrodes formed on both ends of the upper surface of the fuse film, a glass film provided on at least the upper surface of the fuse film, An overcoat film made of a resin layer covering a glass film and a fuse film provided with the glass film, and an end face electrode;
A chip-type fuse having a structure in which a glass film is provided on an upper surface portion of the fuse film where a surface electrode is not formed, and an overcoat film is provided on a side surface of the fuse film. - ガラス膜が、グレーズ層の融点より低い材料で形成されている請求項1記載のチップ型ヒューズ。 2. The chip-type fuse according to claim 1, wherein the glass film is formed of a material having a melting point lower than that of the glaze layer.
- 分割により複数のチップを得るためのスリットを縦横に複数有し、かつ表面にグレーズ層を設けたチップ形成部分が集合した集合絶縁基板を準備する工程(a)と、
各チップ形成部分上にヒューズ膜を形成するために、前記グレーズ層上にヒューズ膜を形成する工程(b)と、
各チップ形成部分のヒューズ膜の上面両端部分に表電極を形成する工程(c)と、
少なくとも表電極を形成していない前記ヒューズ膜上にガラス膜を形成する工程(d)と、
前記ヒューズ膜上にガラス膜を積層した箇所を部分的に同時に除去して溶断狭小部を形成すると共に、除去した箇所のヒューズ膜の側面を露出させる工程(e)と、
前記表電極の両端を一部残し、前記ガラス膜及び前記露出したヒューズ膜の側面を樹脂層により被覆してオーバーコート膜を形成する工程(f)と、
端面電極を形成するために、集合絶縁基板の縦横のスリットの一方に沿って分割し、端面電極を形成する工程(g)と、
工程(g)で分割していない、集合絶縁基板の他方のスリットに沿って分割して各チップを得る工程(h)を含む、チップ型ヒューズの製造方法。 A step (a) of preparing a collective insulating substrate in which a plurality of slits for obtaining a plurality of chips by division are vertically and horizontally and a chip forming portion having a glaze layer provided on the surface is assembled;
Forming a fuse film on the glaze layer in order to form a fuse film on each chip forming portion (b);
A step (c) of forming surface electrodes on both ends of the upper surface of the fuse film of each chip forming portion;
A step (d) of forming a glass film on the fuse film not forming at least a surface electrode;
A step (e) of exposing a side surface of the fuse film at the removed portion, while simultaneously forming a portion where the glass film is laminated on the fuse film and simultaneously forming a fusing narrow portion;
(F) leaving a part of both ends of the front electrode, and covering the side surfaces of the glass film and the exposed fuse film with a resin layer;
In order to form the end face electrode, dividing along one of the vertical and horizontal slits of the collective insulating substrate, forming the end face electrode (g),
A method for manufacturing a chip-type fuse, comprising the step (h) of obtaining each chip by dividing along the other slit of the collective insulating substrate, which is not divided in the step (g).
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009550138A JP4460647B1 (en) | 2009-03-30 | 2009-10-13 | Chip-type fuse and manufacturing method thereof |
CN200980000469.2A CN101933113B (en) | 2009-03-30 | 2009-10-13 | Chip fuse and method of manufacturing same |
HK11101990.5A HK1148109A1 (en) | 2009-03-30 | 2011-02-28 | Chip fuse and method of manufacturing same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009083338 | 2009-03-30 | ||
JP2009-083338 | 2009-03-30 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2010116553A1 true WO2010116553A1 (en) | 2010-10-14 |
Family
ID=42935856
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2009/067700 WO2010116553A1 (en) | 2009-03-30 | 2009-10-13 | Chip fuse and method of manufacturing same |
Country Status (5)
Country | Link |
---|---|
KR (1) | KR101015419B1 (en) |
CN (1) | CN101933113B (en) |
HK (1) | HK1148109A1 (en) |
TW (1) | TWI397940B (en) |
WO (1) | WO2010116553A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103996583B (en) * | 2013-03-18 | 2017-02-08 | 南京萨特科技发展有限公司 | Micro paster type high voltage-resistant protection element and preparation method thereof |
CN107706066A (en) * | 2017-10-12 | 2018-02-16 | 东莞市贝特电子科技股份有限公司 | Microminiature paster fuse |
JP6947139B2 (en) * | 2018-08-29 | 2021-10-13 | 株式会社オートネットワーク技術研究所 | Overcurrent cutoff unit |
CN110828243B (en) * | 2019-11-06 | 2021-04-30 | 南京隆特电子有限公司 | Thin film type fuse and manufacturing method thereof |
CN112362662A (en) * | 2020-10-27 | 2021-02-12 | 航天科工防御技术研究试验中心 | Method and device for analyzing failure point of chip fuse |
CN114765084A (en) * | 2021-01-12 | 2022-07-19 | 国巨电子(中国)有限公司 | Fuse resistor and method of manufacturing the same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08102244A (en) * | 1994-09-29 | 1996-04-16 | Kyocera Corp | Chip fuse |
JPH09129115A (en) * | 1995-10-30 | 1997-05-16 | Kyocera Corp | Chip fuse |
JPH1050191A (en) * | 1996-07-30 | 1998-02-20 | Kyocera Corp | Manufacture of chip fuse element |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1225192A (en) * | 1996-06-07 | 1999-08-04 | 保险丝公司 | A surface-mount fuse and the manufacture thereof |
JPH1050198A (en) * | 1996-07-30 | 1998-02-20 | Kyocera Corp | Chip fuse element |
DE19704097A1 (en) * | 1997-02-04 | 1998-08-06 | Wickmann Werke Gmbh | Electrical fuse element |
CN100555500C (en) * | 2006-09-04 | 2009-10-28 | 广东风华高新科技股份有限公司 | Thick film sheet type fuse and manufacture method thereof |
-
2009
- 2009-10-13 CN CN200980000469.2A patent/CN101933113B/en active Active
- 2009-10-13 KR KR1020097025592A patent/KR101015419B1/en active IP Right Grant
- 2009-10-13 WO PCT/JP2009/067700 patent/WO2010116553A1/en active Application Filing
- 2009-10-21 TW TW098135595A patent/TWI397940B/en active
-
2011
- 2011-02-28 HK HK11101990.5A patent/HK1148109A1/en unknown
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08102244A (en) * | 1994-09-29 | 1996-04-16 | Kyocera Corp | Chip fuse |
JPH09129115A (en) * | 1995-10-30 | 1997-05-16 | Kyocera Corp | Chip fuse |
JPH1050191A (en) * | 1996-07-30 | 1998-02-20 | Kyocera Corp | Manufacture of chip fuse element |
Also Published As
Publication number | Publication date |
---|---|
CN101933113B (en) | 2015-03-11 |
TW201036023A (en) | 2010-10-01 |
HK1148109A1 (en) | 2011-08-26 |
TWI397940B (en) | 2013-06-01 |
KR20100113973A (en) | 2010-10-22 |
KR101015419B1 (en) | 2011-02-22 |
CN101933113A (en) | 2010-12-29 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20210012932A1 (en) | Chip resistor and method for manufacturing the same | |
JP7546012B2 (en) | Chip Resistors | |
WO2010116553A1 (en) | Chip fuse and method of manufacturing same | |
JP7461422B2 (en) | Chip Resistors | |
US10290402B2 (en) | Chip resistor and method of making the same | |
JP2008235523A (en) | Electronic component including resistive element | |
JP4460647B1 (en) | Chip-type fuse and manufacturing method thereof | |
WO2020189217A1 (en) | Chip resistor | |
JP2008053255A (en) | Chip resistor | |
US10763018B2 (en) | Chip resistor | |
JP2007227718A (en) | Electronic component having resistive element and manufacturing method thereof | |
JP2009277834A (en) | Method of manufacturing chip resistor, and chip resistor | |
JP7220344B2 (en) | circuit protection element | |
JP4741016B2 (en) | Fuse resistor | |
JP2002231120A (en) | Chip type electronic component | |
US20230368949A1 (en) | Chip resistor | |
JP2005078874A (en) | Jumper chip component and manufacturing method therefor | |
WO2023053594A1 (en) | Chip resistor | |
JP2005268300A (en) | Chip resistor and manufacturing method thereof | |
JPH08236004A (en) | Chip fuse and its manufacture | |
JP6454870B2 (en) | Circuit protection element and manufacturing method thereof | |
WO2014084197A1 (en) | Thin film surge absorber, thin film device, method for producing thin film surge absorber, and method for manufacturing thin film device | |
JP6650572B2 (en) | Manufacturing method of circuit protection element | |
JP2012015037A (en) | Circuit protection element | |
JPH1079301A (en) | Chip type fuse resistor and its electrode structure |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
WWE | Wipo information: entry into national phase |
Ref document number: 200980000469.2 Country of ref document: CN |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2009550138 Country of ref document: JP |
|
ENP | Entry into the national phase |
Ref document number: 20097025592 Country of ref document: KR Kind code of ref document: A |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application |
Ref document number: 09843059 Country of ref document: EP Kind code of ref document: A1 |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
122 | Ep: pct application non-entry in european phase |
Ref document number: 09843059 Country of ref document: EP Kind code of ref document: A1 |