WO2010110069A1 - Resin paste for die bonding, process for producing semiconductor device using the resin paste, and semiconductor device - Google Patents

Resin paste for die bonding, process for producing semiconductor device using the resin paste, and semiconductor device Download PDF

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Publication number
WO2010110069A1
WO2010110069A1 PCT/JP2010/054027 JP2010054027W WO2010110069A1 WO 2010110069 A1 WO2010110069 A1 WO 2010110069A1 JP 2010054027 W JP2010054027 W JP 2010054027W WO 2010110069 A1 WO2010110069 A1 WO 2010110069A1
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WIPO (PCT)
Prior art keywords
resin paste
resin
die bonding
semiconductor device
chip
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PCT/JP2010/054027
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French (fr)
Japanese (ja)
Inventor
良史 杉浦
精吾 横地
修一 森
片山 陽二
隆史 堂々
哲 江花
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日立化成工業株式会社
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Publication date
Application filed by 日立化成工業株式会社 filed Critical 日立化成工業株式会社
Priority to KR1020117015583A priority Critical patent/KR20120010220A/en
Priority to CN2010800041529A priority patent/CN102272908A/en
Priority to JP2011505970A priority patent/JPWO2010110069A1/en
Publication of WO2010110069A1 publication Critical patent/WO2010110069A1/en

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    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/295Organic, e.g. plastic containing a filler
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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    • C08ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08GMACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G59/00Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
    • C08G59/18Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing
    • C08G59/182Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups ; e.g. general methods of curing using pre-adducts of epoxy compounds with curing agents
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    • C08G59/00Polycondensates containing more than one epoxy group per molecule; Macromolecules obtained by polymerising compounds containing more than one epoxy group per molecule using curing agents or catalysts which react with the epoxy groups
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Definitions

  • the present invention is used as a bonding material (hereinafter referred to as a die bonding material) between a semiconductor chip (hereinafter also referred to as a chip) such as an IC or LSI and a support member of a lead frame or an insulating support substrate (hereinafter referred to as a substrate).
  • a bonding material hereinafter referred to as a die bonding material
  • a semiconductor chip hereinafter also referred to as a chip
  • a support member of a lead frame or an insulating support substrate hereinafter referred to as a substrate.
  • the present invention relates to a resin paste for die bonding, a semiconductor device manufacturing method using the same, and a semiconductor device.
  • Au—Si eutectic alloy, solder, silver paste, and the like are known as bonding materials between semiconductor elements such as IC and LSI and supporting members such as lead frames and insulating support substrates, that is, die bonding materials.
  • the Au—Si eutectic alloy has high heat resistance and moisture resistance, since it has a large elastic modulus, it tends to be easily broken when applied to a large chip. Further, the Au—Si eutectic alloy has a drawback that it is expensive.
  • solder is inexpensive, it is inferior in heat resistance, and its elastic modulus is as high as that of an Au—Si eutectic alloy, making it difficult to apply to a large chip.
  • silver paste (see, for example, Patent Document 1) is inexpensive, has high moisture resistance, has a lower elastic modulus than Au—Si eutectic alloy and solder, and has a thermocompression bonding wire bonder at 350 ° C. It has heat resistance that can be applied. Therefore, at present, silver paste is widely used among the above-described die bonding materials. However, it is difficult and efficient to spread the silver paste over the entire surface of the chip in response to the progress of high integration of ICs and LSIs and the accompanying increase in size of the chip. Absent.
  • a film-shaped die such as an adhesive film using a specific polyimide resin and an adhesive film for die bonding in which a conductive filler or an inorganic filler is added to a specific polyimide resin Bonding materials are known (see Patent Documents 2 to 4).
  • JP 2002-179769 A Japanese Patent Application Laid-Open No. 07-228697 Japanese Patent Laid-Open No. 06-145639 Japanese Patent Laid-Open No. 06-264035
  • the adhesive film type die bonding material can easily form a die bonding layer on a support substrate.
  • the adhesive film as disclosed in Patent Documents 2 to 4 can be suitably used for a support substrate such as 42 alloy lead frame (iron-nickel alloy), and has a good hot die shear strength. Are better.
  • a support substrate such as 42 alloy lead frame (iron-nickel alloy)
  • an adhesive device for cutting or punching the adhesive film into a chip size in advance and then attaching the adhesive film to the support substrate is required.
  • the method of punching the adhesive film and pasting a plurality of chips together tends to cause waste of the adhesive film.
  • the surface to which the adhesive film is applied has many irregularities, and voids are created when the adhesive film is applied, reducing the reliability of the semiconductor device. It tends to be easy.
  • the chip bonding method using the die bonding resin paste is, for example, that the die bonding resin paste applied to the substrate is B-staged, and then the chip is heated and pressure-bonded thereto to temporarily bond the chip and the substrate. In order to fix completely, it is common to post-cure at 180 degreeC for about 1 hour. Usually, if post-curing of the resin paste for die bonding is omitted, the adhesion between the chip and the substrate becomes insufficient, and there is a possibility that the chip vibrates and causes a defect in the wire bonding process. In the sealing process, if the adhesion between the chip and the substrate is insufficient, the chip may be peeled off due to the flow of the sealing material from the side surface of the chip.
  • a gap (hereinafter referred to as a void) may be generated between the layer of the die-bonding resin paste in a B-staged state and the chip when the chip is attached, and it is also desired that the void can be reduced.
  • the void is large, cracks are likely to occur in the die bonding material in the solder reflow process, which may reduce the reliability of the semiconductor device.
  • the resin paste for die bonding is excellent in die share strength during heating at 250 ° C. to 260 ° C. It is also required.
  • the present invention has been made in view of such circumstances, and in the B-stage, it has good adhesive strength with the chip in a wide temperature range, and can also reduce voids between the chip and solder reflow. It is an object of the present invention to provide a resin bonding for die bonding having a sufficient die shear strength during heating in the process. Another object of the present invention is to provide a method for manufacturing a semiconductor device using the die bonding resin paste. Furthermore, an object of the present invention is to provide a semiconductor device excellent in reliability using the die bonding resin paste.
  • the present invention adopts the following configuration. That is, in one embodiment of the present invention, a polymer (A) obtained by reacting a carboxyl group-containing butadiene polymer (a1) and an epoxy group-containing compound (a2), a thermosetting resin (B) and a filler ( C) containing resin paste for die bonding.
  • Another embodiment of the present invention relates to a method of manufacturing a semiconductor device using the die bonding resin paste, (1) a step of applying the die bonding resin paste on a substrate, and (2) drying the resin paste. And (3) a step of mounting a semiconductor chip on the B-staged resin paste, and a method of manufacturing a semiconductor device.
  • Another embodiment of the present invention relates to a method of manufacturing a semiconductor device using the die bonding resin paste, (1) a step of applying the die bonding resin paste on a substrate, and (2) drying the resin paste. And (3) a step of mounting a semiconductor chip on the B-staged resin paste.
  • Another embodiment of the present invention includes (1) a step of applying the die bonding resin paste on a substrate, (2) a step of mounting a semiconductor chip on the applied resin paste, and (3) sealing the semiconductor chip. And a step of sealing with an agent.
  • the disclosure of this specification relates to the subject matter included in Japanese Patent Application No. 2009-070531 (filed on Mar. 23, 2009), and is incorporated herein in its entirety with reference to these application specifications. .
  • the adhesive strength with the chip in the B-staging, can be reduced in a wide temperature range, the void between the chips can be reduced, and sufficient heat can be obtained in the solder reflow process. It is possible to provide a resin bonding for die bonding having a high die shear strength.
  • the post-curing after the chip is attached is omitted, there is no problem in the wire bonding and sealing process, so the manufacturing process can be shortened. is there.
  • the resin paste for die bonding according to an embodiment of the present invention is excellent in low-temperature adhesiveness, it is suitable for an insulating support substrate such as an organic substrate as a die bonding material. Moreover, according to one embodiment of the present invention, a method of manufacturing a semiconductor device having excellent workability can be provided by using the die bonding resin paste of the present invention. Furthermore, according to one embodiment of the present invention, a semiconductor device having excellent reliability can be provided by using the die bonding resin paste of the present invention.
  • FIG. 1 is a diagram showing an example of a manufacturing process of a semiconductor device of the present invention.
  • FIG. 2 is a cross-sectional view of a BOC which is an example of the semiconductor device of the present invention.
  • FIG. 3 is a cross-sectional view of an embodiment of a lead frame type semiconductor device which is an example of the semiconductor device of the present invention.
  • B-stage is to heat-treat the die bonding resin paste and volatilize the solvent (D), and to dry the applied die bonding resin paste. This means that the die bonding resin paste is not completely cured. Complete curing is defined as a state where there is no endothermic peak in the range of 80 to 180 ° C (temperature increase rate: 10 ° C / min) in DSC (Differential Scanning Calorimetry) measurement. is there.
  • the resin paste for die bonding according to the present invention (hereinafter sometimes simply referred to as “resin paste”) is obtained by reacting a butadiene polymer (a1) having a carboxyl group with a compound (a2) having an epoxy group.
  • a polymer (A), a thermosetting resin (B), and a filler (C) are included.
  • the butadiene polymer having a carboxyl group (hereinafter sometimes abbreviated as component (a1)) is not particularly limited as long as it has a polybutadiene structure and a carboxyl group.
  • component (a1)) a copolymer of a polybutadiene structure derived from butadiene and a compound having a carboxyl group may be used.
  • the main chain may be a copolymer of butadiene and another polymerizable compound such as acrylonitrile, and at least one of its terminals may have a carboxyl group.
  • the number average molecular weight of component (a1) is preferably 500 to 10,000, and more preferably 1000 to 7000.
  • the component (a1) is more preferably a butadiene-acrylonitrile copolymer having a carboxyl group represented by the following general formula (1).
  • x / y is 95/5 to 50/50, and n is an integer of 5 to 50.
  • the compound represented by the general formula (1) can also be obtained as a commercial product.
  • Examples of the butadiene-acrylonitrile copolymer having a carboxyl group represented by the general formula (1) include Hycar CTBN-2009 ⁇ 162, CTBN-1300 ⁇ 31, CTBN-1300 ⁇ 8, CTBN-1300 ⁇ 13, CTBNX-1300 ⁇ 9 (all manufactured by Ube Industries, Ltd.) is available as a commercial product.
  • a low molecular weight liquid polybutadiene having a carboxyl group NISSO-PB-C-2000 (manufactured by Nippon Soda Co., Ltd., trade name) (manufactured by Nippon Soda Co., Ltd.) , Product name) and the like.
  • Compound having epoxy group (a2) Although it does not specifically limit as a compound (henceforth abbreviated as component (a2)) which has an epoxy group,
  • component (a2) ethylene glycol diglycidyl ether, diethylene glycol diglycidyl ether, propylene glycol diglycidyl ether, dipropylene glycol di
  • Glycidyl ether type epoxy compounds such as glycidyl ether and glycerin triglycidyl ether
  • Glycidyl ester type epoxy compounds using polyvalent carboxylic acids such as dimer acid and anhydrides as raw materials
  • Glycidyl amine type epoxy compounds using aliphatic amines as raw materials, etc.
  • Aliphatic epoxy compounds hydroquinone, methylhydroquinone, dimethylhydroquinone, trimethylhydroquinone, resorcinol, methylresorcinol, catechol, methylcateco , Biphenol, tetramethylbiphenol, dihydroxynaphthalene, dihydroxymethylnaphthalene, dihydroxydimethylnaphthalene, bis (4-hydroxyphenyl) ketone, bis (4-hydroxy-3,5-dimethylphenyl) ketone, bis (4-hydroxy-3 , 5-dichlorophenyl) ketone, bis (4-hydroxyphenyl) sulfone, bis (4-hydroxy-3,5-dimethylphenyl) sulfone, bis (4-hydroxy-3,5-dichlorophenyl) sulfone, bis (4-hydroxy Phenyl) hexafluoropropane, bis (4-hydroxy-3,5-dimethylphenyl) hexafluoropropane, bis (4
  • a phenol glycidyl ether type epoxy resin can also be used.
  • resins include bisphenol A, bisphenol AD, bisphenol S, bisphenol F, or a condensate of halogenated bisphenol A and epichlorohydrin, glycidyl ether of phenol novolac resin, glycidyl ether of cresol novolac resin, and bisphenol A novolac resin.
  • a glycidyl ether etc. are mentioned. These can be used alone or in combination of two or more.
  • an epoxy compound represented by the following general formula (2) is particularly preferable from the viewpoint of the strength of the resin.
  • R 1 and R 2 each independently represents a hydrogen atom, an alkyl group having 1 to 6 carbon atoms or a halogen atom, and m and n each independently represents an integer of 1 to 4.
  • n is 2 or more
  • a plurality of R 1 may be the same or different
  • m is 2 or more
  • a plurality of R 2 may be the same or different.
  • the polymer (A) is obtained by reacting the component (a1) and the component (a2).
  • the compounding ratio is 0.01 or more with respect to 1 carboxylic acid equivalent of the component (a1)
  • the epoxy equivalent of the component (a2) is 0.01 or more considering the adhesive strength, and the difficulty of peeling due to outgas generation is considered. It is preferably 10 or less, more preferably 0.1 to 2, and particularly preferably 0.25 to 1.
  • the viscosity of the polymer (A) can be adjusted by the reaction temperature and reaction time during synthesis, and the viscosity tends to increase by increasing the reaction temperature or increasing the reaction time.
  • a suitable viscosity of the polymer (A) is 150 Pa ⁇ s or more, more preferably 300 to 900 Pa ⁇ s, and particularly preferably 500 to 700 Pa ⁇ s from the viewpoint of improving the adhesive strength.
  • the adhesive strength when the resin paste is obtained is further improved. It is preferable from the viewpoint of improvement, and when it is 900 Pa ⁇ s or less, workability is improved when a resin paste is used.
  • the weight average molecular weight of the polymer (A) is preferably 5000 or more, more preferably 15000 to 70000, and particularly preferably 17000 to 40000.
  • the weight average molecular weight is 5000 or more, the adhesive strength is excellent, and when it is less than 70000, the workability when the resin paste is obtained can be further improved.
  • a weight average molecular weight (Mw) and a number average molecular weight (Mn) can be measured by gel permeation chromatography (GPC) (converted with a calibration curve using standard polystyrene).
  • the acid value of the polymer (A) is preferably 10 to 25 mgKOH / g, and more preferably 15 to 23 mgKOH / g. When the acid value is 10 to 25 mg KOH / g, the workability when the resin paste is obtained can be further improved.
  • the acid value of the polymer (A) can be measured by the following method. First, about 1 g of the resin solution of polymer (A) is precisely weighed, 30 g of acetone is added to the resin solution, and the resin solution is uniformly dissolved.
  • the content of the component (A) is preferably 50 to 99% by weight in the total amount of the component (A) and the component (B) from the viewpoint of stress relaxation between the substrate and the chip and the adhesive strength. More preferably, it is ⁇ 97 wt%, particularly preferably 80 to 95 wt%.
  • thermosetting resin (B) Although it does not specifically limit as a thermosetting resin (B), for example, the imide compound etc. which have an epoxy resin, a phenol resin, and at least 2 thermosetting imide group in 1 molecule are mentioned. These are used singly or in combination of two or more.
  • the epoxy resin contains at least two epoxy groups in the molecule, and phenol glycidyl ether type epoxy resin is preferred from the viewpoint of hot die shear strength.
  • phenol glycidyl ether type epoxy resin is preferred from the viewpoint of hot die shear strength.
  • resins include bisphenol A, bisphenol AD, bisphenol S, bisphenol F, or a condensate of halogenated bisphenol A and epichlorohydrin, glycidyl ether of phenol novolac resin, glycidyl ether of cresol novolac resin, and bisphenol A novolac resin.
  • a glycidyl ether etc. are mentioned. These are used singly or in combination of two or more.
  • the content is preferably 1 to 100 parts by weight, more preferably 2 to 50 parts by weight with respect to 100 parts by weight of the polymer (A), from the viewpoint of die shear strength during heating. 3 to 20 parts by mass is particularly preferable.
  • the phenol resin has at least two phenolic hydroxyl groups in the molecule, and examples thereof include phenol novolak resin, cresol novolak resin, bisphenol A type novolak resin, poly-p-vinylphenol, phenol aralkyl resin and the like. It is done. These are used singly or in combination of two or more.
  • the content in the case of using the phenol resin is preferably 0.5 to 100 parts by mass with respect to 100 parts by weight of the polymer (A) in consideration of hot die shear strength and semiconductor package reliability.
  • the amount is more preferably 50 parts by mass, and particularly preferably 2 to 20 parts by mass.
  • thermosetting imide groups in one molecule examples include orthobismaleimide benzene, metabismaleimide benzene, parabismaleimide benzene, and 1,4-bis (p-maleimide cumyl). Examples thereof include benzene and 1,4-bis (m-maleimidocumyl) benzene. These are used singly or in combination of two or more.
  • X ′ and Y represent O, CH 2 , CF 2 , SO 2 , S, CO, C (CH 3 ) 2 or C (CF 3 ) 2 ;
  • R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 each independently represent hydrogen, a lower alkyl group, a lower alkoxy group, fluorine, chlorine or bromine;
  • D is a dicarboxylic acid having an ethylenically unsaturated double bond Represents a residue;
  • m ′ represents an integer of 0 to 4;
  • the content when the imide compound is used is more preferably less than 100 parts by weight with respect to 100 parts by weight of the polymer (A).
  • Examples of the imide compound of formula (I) include 4,4-bismaleimide diphenyl ether, 4,4-bismaleimide diphenylmethane, 4,4-bismaleimide-3,3′-dimethyl-diphenylmethane, and 4,4-bismaleimide.
  • Examples of the imide compound of the formula (II) include bis [4- (4-maleimidophenoxy) phenyl] ether, bis [4- (4-maleimidophenoxy) phenyl] methane, and bis [4- (4-maleimidophenoxy).
  • Phenyl] fluoromethane bis [4- (4-maleimidophenoxy) phenyl] sulfone, bis [4- (3-maleimidophenoxy) phenyl] sulfone, bis [4- (4-maleimidophenoxy) phenyl] sulfide, bis [4 -(4-maleimidophenoxy) phenyl] ketone, 2,2-bis [4- (4-maleimidophenoxy) phenyl] propane, 1,1,1,3,3,3-hexafluoro-2,2-bis [ 4- (4-maleimidophenoxy) phenyl] propane and the like.
  • a radical polymerization agent may be used.
  • the radical polymerization agent include acetylcyclohexylsulfonyl peroxide, isobutyryl peroxide, benzoyl peroxide, octanoyl peroxide, acetyl peroxide, dicumyl peroxide, cumene hydroperoxide, azobisisobutyronitrile and the like.
  • the content is preferably 0.01 to 1.0 part by weight with respect to 100 parts by weight of the imide compound.
  • the content of the thermosetting resin as the component (B) is the above component (A) from the viewpoint of improving the wetting and spreading of the die bonding layer at the time of chip thermocompression bonding when the B-staging is performed at a relatively high temperature.
  • It is preferably 1 to 100 parts by weight, more preferably 3 to 30 parts by weight, and particularly preferably 5 to 20 parts by weight with respect to 100 parts by weight.
  • Filler (C) examples include, but are not limited to, conductive fillers such as silver powder, gold powder, and copper powder; inorganic fillers such as silica, alumina, titania, glass, iron oxide, and ceramic; Can be mentioned. These are used singly or in combination of two or more.
  • conductive fillers such as silver powder, gold powder, and copper powder can improve the conductivity and heat conductivity of the die bonding material and the thixotropy of the resin paste.
  • inorganic fillers such as silica, alumina, titania, glass, iron oxide, and ceramic can improve the low thermal expansion, low moisture absorption, and thixotropy of the die bonding material.
  • silica is generally preferred from the viewpoint of semiconductor package reliability.
  • the filler (C) preferably has an average particle size of 0.001 ⁇ m to 10 ⁇ m, more preferably 0.005 to 5 ⁇ m, and preferably 0.01 to 1 ⁇ m. Particularly preferred.
  • An inorganic ion exchanger may be added as a filler (C) that improves the electrical reliability of the semiconductor device.
  • the inorganic ion exchanger include ions extracted into an aqueous solution when the cured resin paste is extracted in hot water, for example, ions such as Na + , K + , Cl ⁇ , F ⁇ , RCOO ⁇ and Br ⁇ . Those having a capturing action are effective.
  • Examples of such ion exchangers include naturally produced zeolites, natural minerals such as zeolites, acid clay, dolomite, hydrotalcites, and artificially synthesized synthetic zeolites.
  • conductive fillers or inorganic fillers can be used in combination of two or more. As long as the physical properties are not impaired, one or more conductive fillers and one or more inorganic fillers may be mixed and used.
  • the content of the filler (C) is preferably 1 part by weight or more when considering the thixotropy index (1.5 or more) of the resin paste with respect to 100 parts by weight of the polymer (A), and the adhesive strength and the elasticity of the cured product.
  • it is preferably 100 parts by mass or less. More preferably, it is 2 to 50 parts by mass, and particularly preferably 3 to 30 parts by mass.
  • it is preferable that it is 10 mass parts or more from a viewpoint which can suppress the wetting spread of the die-bonding layer at the time of subsequent chip
  • the mixing and kneading of the filler (C) is carried out by appropriately combining dispersers such as a normal stirrer, raky machine, three rolls, and ball mill.
  • the resin paste of the present invention may contain a solvent (D).
  • the solvent (D) is preferably selected from organic solvents that can uniformly knead or disperse the filler. It is preferable to select an organic solvent having a boiling point (atmospheric pressure) of 100 ° C. or more and less than 250 ° C. in consideration of prevention of volatilization of the organic solvent at the time of printing and drying property in B-stage.
  • organic solvents examples include N-methyl-2-pyrrolidinone, diethylene glycol dimethyl ether (also referred to as diglyme), triethylene glycol dimethyl ether (also referred to as triglyme), diethylene glycol diethyl ether, 2- (2-methoxyethoxy) ethanol, ⁇ -butyrolactone, isophorone, carbitol, carbitol acetate, 1,3-dimethyl-2-imidazolidinone, 2- (2-butoxyethoxy) ethyl acetate, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, anisole And solvents mainly composed of petroleum distillates. These are used singly or in combination of two or more.
  • carbitol acetate is particularly preferred because of its low water absorption.
  • the content in the case of using the solvent (D) is preferably 5 to 200 parts by mass, more preferably 10 to 100 parts by mass with respect to 100 parts by mass of the polymer (A) from the viewpoint of printability. It is preferably 30 to 80 parts by mass.
  • thermosetting resin (B) is liquid at room temperature from the viewpoint of printability.
  • the resin paste of the present invention preferably contains a curing accelerator (E).
  • the curing accelerator (E) can accelerate the curing of the thermosetting resin (B). This is particularly effective when an epoxy resin is used as the thermosetting resin (B).
  • curing accelerator (E) examples include imidazoles, dicyandiamide derivatives, dicarboxylic acid dihydrazide, triphenylphosphine, tetraphenylphosphonium tetraphenylborate, 2-ethyl-4-methylimidazole-tetraphenylborate, 1,8-diazabicyclo. (5,4,0) undecene-7-tetraphenylborate and the like. You may use these individually by 1 type or in combination of 2 or more types.
  • the content is preferably 0.01 parts by mass or more with respect to 100 parts by mass of the thermosetting resin (B), and is 20 parts by mass or less in consideration of storage stability of the resin paste.
  • the resin paste of the present invention includes an antifoaming agent, an antifoaming agent, an antifoaming agent, a silane coupling agent, a titanium coupling agent, a nonionic surfactant, and a fluorine surfactant as necessary.
  • Various additives such as a silicone plasticizer can also be added.
  • Each of the above components can be mixed and stirred for 10 minutes at a blade of 10 rpm using, for example, a kneading machine such as a Hibis Disper mix to obtain a resin paste.
  • the elastic modulus after curing of the resin paste (when cured at 180 ° C. for 1 hour at a thickness of 100 ⁇ m), that is, the elastic modulus of the resin paste cured product, is considered to be difficult to shift between the substrate and the chip and the assembly workability.
  • 1 MPa or more is preferable, and considering the stress relaxation property between the substrate and the chip and the temperature cycle resistance of the semiconductor package, 300 MPa or less is preferable.
  • the elastic modulus is a value of 25 ° C. when the storage elastic modulus E ′ of the cured resin paste after drying and curing is measured with a dynamic viscoelasticity measuring device.
  • “After drying and curing” means after the resin component is completely cured, for example, by applying a resin paste, forming a B-stage, and then heating at 180 ° C. for 1 hour with a dryer or the like.
  • the solid content concentration of the resin paste is preferably 20 to 95% by weight, more preferably 40 to 90% by weight or more, and particularly preferably 60 to 80% by weight.
  • the solid content is 20% by weight or more, it is preferable from the viewpoint of shape change suppression based on volume reduction after drying the resin paste, and when it is 95% by weight or less, the fluidity and printing workability of the resin paste can be further improved.
  • the thixotropy index of the resin paste is preferably 1.5 to 10.0, more preferably 2.0 to 7.0, and particularly preferably 3.0 to 5.0.
  • the thixotropy index of the resin paste is 1.5 or more, it is preferable from the viewpoint of suppressing the occurrence of sagging or the like in the resin paste supplied and applied by the printing method and maintaining a good printed shape.
  • the thixotropy index is preferably 10.0 or less from the viewpoint of suppressing the occurrence of “chips” and / or scum in the resin paste supplied and applied by the printing method.
  • the viscosity (25 ° C.) of the resin paste is preferably 5 to 1000 Pa ⁇ s, more preferably 20 to 500, and particularly preferably 50 to 200 Pa ⁇ s.
  • the viscosity of the resin paste is preferably 5 to 1000 Pa ⁇ s from the viewpoint of printability.
  • the viscosity of the resin paste is preferably adjusted as appropriate according to the type of printing method. For example, when a mesh or the like is stretched on the mask opening, such as a screen mesh plate, the viscosity of the mesh paste is taken into consideration.
  • the range is preferably from 100 to 100 Pa ⁇ s. In the case of a stencil plate or the like, it is preferably adjusted to a range from 20 to 500 Pa ⁇ s.
  • the above viscosity is a value measured at 25 ° C. and a rotation speed of 0.5 rpm using an E-type viscometer.
  • FIG. 1 is a schematic view showing an example of a manufacturing process of a semiconductor device.
  • the resin paste of the present invention is printed on a substrate.
  • printed materials include lead frames such as 42 alloy lead frames and copper lead frames; or plastic films such as polyimide resins, epoxy resins and polyimide resins; and polyimide resins and epoxy resins on substrates such as glass nonwoven fabrics.
  • Insulating support substrate made of ceramics such as alumina, or impregnated / cured plastic such as polyimide resin.
  • the printing method include a screen printing method.
  • a resin paste 104 of the present invention may be applied to a substrate 101 through a metal mask 102 using a squeegee 103.
  • the applied resin paste is heat treated to dry the solvent (B-stage), and a B-staged die bonding layer is obtained (FIG. 1B).
  • a support substrate on which a layer of a resin paste in a B-stage state (hereinafter referred to as a die bonding layer) is obtained.
  • the temperature for forming the B stage is preferably 100 to 200 ° C, more preferably 120 to 180 ° C.
  • the time for forming the B stage is preferably 120 minutes or less from the viewpoint of work efficiency, and when the solvent (D) is used, it is preferably 5 minutes or more from the viewpoint of increasing the volatility.
  • a semiconductor element such as an IC or LSI is attached to the support substrate on which the die bonding layer is formed, and the chip is pressure-bonded to the support substrate by heating.
  • the die bonding layer side of the substrate may be attached to a chip 107 placed on the heat source 106.
  • the heating temperature is preferably 200 ° C. or less from the viewpoint of heat resistance of the organic substrate, and preferably from 100 to 200 ° C. from the viewpoint of adhesive strength.
  • a cured die bonding layer 108 is obtained, and the chip is mounted on the support substrate (FIG. 1 (d)).
  • the post-curing of the die bonding layer may be performed together with the post-curing process of the sealing material.
  • the problem in the mounting assembly process mentioned here is that the chip and the substrate are not sufficiently fixed, and the chip vibrates during the wire bonding process, causing problems in the wire bonding, or in the sealing process. It means that the chip is peeled off due to the flow of the sealing material from the side surface of the chip because the chip is insufficiently fixed on the substrate.
  • the substrate and the chip may be electrically connected by a wire 109 (FIG. 1 (e)).
  • the substrate on which the chip is mounted may be placed in the mold, and the mold 110 may be filled with the sealing material 112 by the extruder 111 and sealed (FIG. 1 (f)).
  • the method for manufacturing a semiconductor device according to the present invention may include the above steps, and the semiconductor device according to the present invention can be manufactured by a manufacturing method including the above steps.
  • FIG. 2 is a schematic cross-sectional view showing the structure of a BOC type semiconductor device which is an embodiment of the semiconductor device according to the present invention.
  • a semiconductor element 6 is mounted on one surface of a substrate 2 having a window at the center via a die bonding layer 4, and a wiring pattern 8 is formed on the opposite surface of the substrate 2 to the semiconductor element mounting surface.
  • An insulating layer 10 and solder balls 12 are formed, terminal portions (not shown) of the semiconductor element 2 and the wiring pattern 8 are connected by wires 14, and at least the connecting portions are sealed by a sealing material 16 such as resin.
  • a sealing material 16 such as resin
  • the resin paste according to the present invention is not limited to the manufacture of the BOC type semiconductor device, but can be suitably used in the manufacture of a semiconductor device having other configurations (for example, the lead frame type semiconductor device shown in FIG. 3). It is.
  • the silicon chip 201 is fixed to the lead frame 203 with a resin paste 202, and the Al pad 204 on the silicon chip and the Ag plating 205 on the lead frame are electrically connected by a gold wire 206. Connected to. These are sealed with a sealing resin 207, and external plating 208 is applied to the end of the lead frame protruding outward.
  • the resin paste contains a solvent, but when used in a method for manufacturing a semiconductor device, most of the solvent is volatilized by being B-staged in the drying process, so there are few voids in the die bonding layer. A semiconductor device having good mounting reliability can be assembled.
  • the semiconductor element is pasted without using the B stage, and then the chip is bonded to the support substrate by heating. You can also. Furthermore, it is possible to omit the curing step of the sealant. Furthermore, it is possible to omit both the B-stage and the sealing agent curing step.
  • another method for manufacturing a semiconductor device includes the steps of applying a predetermined amount of the resin paste on a substrate, mounting a chip on the resin paste, and curing the resin in the resin paste.
  • another semiconductor device according to the present invention is manufactured by a manufacturing method including the above steps.
  • the measuring method of viscosity is as follows.
  • the viscosity of the resin paste at 25 ° C. was measured using a 19.4 mm diameter, 3 ° cone with an E-type viscometer manufactured by Toki Sangyo Co., Ltd. (0.5 rpm).
  • the molecular weight was measured using GPC under the following conditions.
  • thermosetting resin (B) 4.7 parts by weight of an epoxy resin (trade name: YDCN-700-7, manufactured by Toto Kasei Co., Ltd.) and a phenol resin (trade name: TrisP-PA-MF, Honshu) are used as the thermosetting resin (B).
  • B thermosetting resin
  • Example 2 A resin paste was obtained in the same manner as in Example 1 except that the types and contents of the base resin, the curing accelerator, and the filler were changed as shown in Table 1.
  • Table 2 shows the solid content concentration, viscosity, and thixotropy index of the resin pastes obtained in Examples 2 to 7 and Comparative Example 1.
  • each of the resin pastes of Examples 1 to 7 and Comparative Example 1 was performed under the condition that the set temperature for the B stage was changed to 140 ° C., 145 ° C., 150 ° C., 155 ° C., 160 ° C., 165 ° C. and 170 ° C.
  • the shear strength (kgf / chip) at 180 ° C. was measured. The results are shown in Table 3.
  • the resin pastes of Examples 1 to 7 and Comparative Example 1 were printed on a 42 alloy lead frame at 3 mm ⁇ 10 mm and a thickness of 100 ⁇ m.
  • the B stage was set to 135 ° C. to make a B stage.
  • the B-stage condition is that the temperature is raised from 40 ° C. to 135 ° C. in 30 minutes with a hot air dryer, dried at 135 ° C. for 30 minutes, and then lowered from 135 ° C. to 40 ° C. in 30 minutes.
  • a coating film (die bonding layer) was formed. Thereafter, a transparent glass plate was pressure-bonded on the die bonding layer for 1 second on a 140 ° C. heating plate with a load of 5 kg. This was heat-pressed under conditions of 180 ° C. and 4 MPa for 90 seconds, and voids were visually evaluated according to the following criteria.
  • each of the resin pastes of Examples 1 to 7 and Comparative Example 1 was performed under the condition that the set temperature for the B stage was changed to 140 ° C., 145 ° C., 150 ° C., 155 ° C., 160 ° C., 165 ° C. and 170 ° C. Similarly, the voids were visually evaluated. The results are shown in Table 3.
  • A Void area is less than 5% with respect to the bonding area between the die bonding layer and the glass substrate.
  • B Void area is 5% or more with respect to the bonding area between the die bonding layer and the glass substrate.
  • a B-staging temperature range in which the adhesive strength was 0.1 MPa or more and the void evaluation was “A” was defined as the B-staging temperature tolerance. The results are shown in Table 3. It means that it is excellent, so that B stage-izing temperature tolerance is large.
  • the adhesive strength is 0.1 MPa or more
  • the subsequent assembly process that is, wire bonding and sealing can be performed even if the post-curing process is omitted.
  • the package substrate for evaluation was prepared by applying for 1 second.
  • Each of the obtained package substrates for evaluation was sealed using a transfer molding machine (transfer press manufactured by Towa Seiki Co., Ltd.) (sealing agent; product name: CEL-9240HF-SI (manufactured by Hitachi Chemical Co., Ltd.)) Sealing conditions; mold temperature: 180 ° C., pressure: 6.9 MPa, molding time: 90 seconds).
  • the sealing material was heated and cured in a hot air dryer at 175 ° C. for 5 hours to obtain a BOC package for evaluation of 10.1 mm ⁇ 12.2 mm ⁇ 1.0 mmt.
  • the obtained evaluation BOC package was subjected to moisture absorption under the conditions of 85 ° C./85% RH / 168 hours and 85 ° C./60% RH / 168 hours, respectively, and then the maximum surface temperature of the evaluation BOC package was 260 ° C. And passed through an IR reflow furnace (made by TAMURA) set to reach 3 times.
  • SAT Scanning Automatic Tomography, HYE-FOCUS manufactured by Hitachi, Ltd.
  • the reflow resistance was evaluated. The results are shown in Table 3.
  • Level 1 No peeling of the die-bonding layer or bubbles in both conditions of 85 ° C./85% RH / 168 hours and 85 ° C./60% RH / 168 hours.
  • Level 1 means better reflow resistance than Level 2.
  • YDCN-700-7 Toto Kasei Co., Ltd., cresol novolac type epoxy resin (epoxy equivalent: 197-207 g / eq)
  • TrisP-PA Honshu Chemical Industry Co., Ltd. (4- [4- [1,1-bis (4-hydroxyphenyl) ethyl] - ⁇ , ⁇ -dimethylbenzyl] phenol)
  • TPPK Tokyo Chemical Industry Co., Ltd., Tetraphenylphosphonium Tetraphenylborate 2P4MHZ: Shikoku Chemical Industry Co., Ltd. (2-phenyl-4-methyl-5-hydroxymethylimidazole)
  • Aerosil # 50 Nippon Aerosil Co., Ltd. (silica fine powder, average particle size 0.03 ⁇ m)
  • CA carbitol acetate
  • the resin paste for die bonding of the present invention is excellent in adhesive strength with a chip in a wide temperature range in B-stage, and can reduce voids between the chips, and in the solder reflow process, Excellent reflow resistance.
  • the present invention it is possible to provide a die bonding resin paste that can be easily supplied and applied by a printing method to a substrate on which a semiconductor chip needs to be attached at a relatively low temperature.

Abstract

Disclosed is a resin paste for die bonding, which has excellent adhesion strength to chips in a wide temperature range in the process of delivering the resin paste in a B-stage and also has excellent die shear strength under high temperatures in a solder reflow process. The resin paste for die bonding comprises: (A) a polymer produced by reacting (a1) a polymer of butadiene having a carboxyl group with (a2) a compound having an epoxy group; (B) a thermosetting resin; and (C) a filler.

Description

ダイボンディング用樹脂ペースト、それを用いた半導体装置の製造方法、及び半導体装置Resin paste for die bonding, semiconductor device manufacturing method using the same, and semiconductor device
 本発明は、IC、LSI等の半導体チップ(以下チップという場合もある)とリードフレームや絶縁性支持基板等(以下基板という)の支持部材との接合材料(以下ダイボンディング材という)として用いられるダイボンディング用樹脂ペースト、それを用いた半導体装置の製造方法、及び半導体装置等に関する。 The present invention is used as a bonding material (hereinafter referred to as a die bonding material) between a semiconductor chip (hereinafter also referred to as a chip) such as an IC or LSI and a support member of a lead frame or an insulating support substrate (hereinafter referred to as a substrate). The present invention relates to a resin paste for die bonding, a semiconductor device manufacturing method using the same, and a semiconductor device.
 IC、LSI等の半導体素子とリードフレームや絶縁性支持基板等の支持部材との接合材料、すなわちダイボンディング材として、従来から、Au-Si共晶合金、半田、銀ペースト等が知られている。しかし、Au-Si共晶合金は、耐熱性及び耐湿性は高いが、弾性率が大きいために、大型チップに適用した場合に割れやすい傾向がある。また、Au-Si共晶合金は、高価であるという難点もある。一方、半田は、安価であるものの、耐熱性に劣り、その弾性率はAu-Si共晶合金と同様に高く、大型チップへの適用は難しい。 Conventionally, Au—Si eutectic alloy, solder, silver paste, and the like are known as bonding materials between semiconductor elements such as IC and LSI and supporting members such as lead frames and insulating support substrates, that is, die bonding materials. . However, although the Au—Si eutectic alloy has high heat resistance and moisture resistance, since it has a large elastic modulus, it tends to be easily broken when applied to a large chip. Further, the Au—Si eutectic alloy has a drawback that it is expensive. On the other hand, although solder is inexpensive, it is inferior in heat resistance, and its elastic modulus is as high as that of an Au—Si eutectic alloy, making it difficult to apply to a large chip.
 これに対し、銀ペースト(例えば特許文献1を参照)は、安価で、耐湿性が高く、Au-Si共晶合金及び半田と比較して弾性率が低く、さらに350℃の熱圧着型ワイヤボンダーに適用できる耐熱性を有する。そのため、現在は、上述のダイボンディング材の中でも銀ペーストが広く用いられている。しかし、ICやLSIの高集積化が進み、それに伴ってチップが大型化していく状況に対応させて、銀ペーストをチップ全面に広げて塗布することは困難であり、効率的であるとはいえない。 On the other hand, silver paste (see, for example, Patent Document 1) is inexpensive, has high moisture resistance, has a lower elastic modulus than Au—Si eutectic alloy and solder, and has a thermocompression bonding wire bonder at 350 ° C. It has heat resistance that can be applied. Therefore, at present, silver paste is widely used among the above-described die bonding materials. However, it is difficult and efficient to spread the silver paste over the entire surface of the chip in response to the progress of high integration of ICs and LSIs and the accompanying increase in size of the chip. Absent.
 一方、チップの大型化に対応できるダイボンディング材として、特定のポリイミド樹脂を用いた接着フィルム、及び特定のポリイミド樹脂に導電性フィラーや無機フィラーを加えたダイボンディング用接着フィルム等のフィルム状のダイボンディング材が知られている(特許文献2~4を参照)。 On the other hand, as a die bonding material that can cope with an increase in the size of a chip, a film-shaped die such as an adhesive film using a specific polyimide resin and an adhesive film for die bonding in which a conductive filler or an inorganic filler is added to a specific polyimide resin Bonding materials are known (see Patent Documents 2 to 4).
特開2002-179769号公報JP 2002-179769 A 特開平07-228697号公報Japanese Patent Application Laid-Open No. 07-228697 特開平06-145639号公報Japanese Patent Laid-Open No. 06-145639 特開平06-264035号公報Japanese Patent Laid-Open No. 06-264035
 接着フィルム型のダイボンディング材は、支持基板上に容易にダイボンディング層を形成することができる。特に、特許文献2~4で開示されたような接着フィルムは、42アロイリードフレーム(鉄-ニッケル合金)等の支持基板に対して好適に使用でき、さらに良好な熱時ダイシェア強度を有する点で優れている。しかし、ダイボンディング材として接着フィルムを支持基板へ効率的に貼り付ける場合には、予め接着フィルムをチップサイズに切り出すか又は打ち抜き、次いで支持基板に貼り付けるための貼付装置が必要となる。また、接着フィルムを打ち抜いて複数個のチップ分を一括で貼り付ける方法は、接着フィルムの無駄が生じやすい傾向がある。さらに、支持基板の大部分は、基板内部に内層配線が形成されているため、接着フィルムを貼り付ける表面には凹凸が多く、接着フィルム貼付時に空隙が生じて、半導体装置の信頼性が低下しやすい傾向がある。 The adhesive film type die bonding material can easily form a die bonding layer on a support substrate. In particular, the adhesive film as disclosed in Patent Documents 2 to 4 can be suitably used for a support substrate such as 42 alloy lead frame (iron-nickel alloy), and has a good hot die shear strength. Are better. However, when the adhesive film is efficiently attached to the support substrate as a die bonding material, an adhesive device for cutting or punching the adhesive film into a chip size in advance and then attaching the adhesive film to the support substrate is required. Further, the method of punching the adhesive film and pasting a plurality of chips together tends to cause waste of the adhesive film. Furthermore, since most of the support substrate has an inner layer wiring formed inside the substrate, the surface to which the adhesive film is applied has many irregularities, and voids are created when the adhesive film is applied, reducing the reliability of the semiconductor device. It tends to be easy.
 また、近年、BOC(Board On Chip)型の半導体装置が注目され、有機基板等の絶縁性支持基板が使用されている。上述の絶縁性支持基板を使用する半導体装置の製造工程では、絶縁性支持基板の耐熱性等を考慮して、例えば200℃以下の比較的低い温度で半導体素子を搭載する必要がある。しかし、特許文献2~4で開示されているような接着フィルムは、低温接着性に劣る傾向があり、比較的低い温度(200℃以下)でチップを貼り付けることが困難である場合が多い。そのため、BOC型の半導体装置の製造において、低温接着性に優れるダイボンディング用樹脂ペーストが注目されている。 In recent years, a BOC (Board On Chip) type semiconductor device has attracted attention, and an insulating support substrate such as an organic substrate has been used. In the manufacturing process of the semiconductor device using the above-described insulating support substrate, it is necessary to mount the semiconductor element at a relatively low temperature of, for example, 200 ° C. or less in consideration of the heat resistance of the insulating support substrate. However, adhesive films as disclosed in Patent Documents 2 to 4 tend to be inferior in low-temperature adhesiveness, and it is often difficult to attach a chip at a relatively low temperature (200 ° C. or lower). Therefore, in the manufacture of a BOC type semiconductor device, attention is paid to a resin paste for die bonding that is excellent in low-temperature adhesion.
 ダイボンディング用樹脂ペーストを用いたチップの貼り付け方法は、例えば、基板に塗布したダイボンディング用樹脂ペーストをBステージ化した後、そこにチップを加熱・圧着して仮接着させ、チップと基板を完全に固定するために、180℃で1時間程度後硬化するのが一般的である。通常、ダイボンディング用樹脂ペーストの後硬化を省くと、チップと基板等の接着性が不十分となり、ワイヤボンディングの工程において、チップが振動して不具合が生じる可能性がある。また、封止の工程においては、チップと基板等の接着性が不十分であると、チップ側面からの封止材の流れによってチップが剥がれてしまうことがある。 The chip bonding method using the die bonding resin paste is, for example, that the die bonding resin paste applied to the substrate is B-staged, and then the chip is heated and pressure-bonded thereto to temporarily bond the chip and the substrate. In order to fix completely, it is common to post-cure at 180 degreeC for about 1 hour. Usually, if post-curing of the resin paste for die bonding is omitted, the adhesion between the chip and the substrate becomes insufficient, and there is a possibility that the chip vibrates and causes a defect in the wire bonding process. In the sealing process, if the adhesion between the chip and the substrate is insufficient, the chip may be peeled off due to the flow of the sealing material from the side surface of the chip.
 しかし、最近、半導体パッケージの組立時間短縮の観点から、後硬化を省いても、ワイヤボンディング、及び封止の工程においても不具合が生じないダイボンディング用樹脂ペーストが求められている。従って、後硬化工程を省いたダイボンディング用樹脂ペーストを用いた貼り付け方法においては、Bステージ化状態のダイボンディング用樹脂ペーストの層が、チップとの良好な接着性を備えていることが必要である。また、Bステージ化の温度範囲によってチップとの接着性に影響を与えない、すなわち広い温度範囲で良好な接着強度を有するダイボンディング用樹脂ペーストが望まれている。また、チップ貼り付け時に、Bステージ化状態のダイボンディング用樹脂ペーストの層とチップ間に空隙(以下、ボイドという)が生じることがあり、ボイドを低減できることも望まれている。ボイドが大きい場合、半田リフロー工程においてダイボンディング材にクラックが生じ易くなり、半導体装置の信頼性が低下する可能性がある。 However, recently, from the viewpoint of shortening the assembly time of the semiconductor package, there is a demand for a resin paste for die bonding that does not cause any problems in wire bonding and sealing processes even if post-curing is omitted. Therefore, in the bonding method using the die bonding resin paste without the post-curing process, the layer of the B bonding die bonding resin paste needs to have good adhesion to the chip. It is. In addition, there is a demand for a resin paste for die bonding that does not affect the adhesiveness to the chip depending on the temperature range for B-stage formation, that is, has good adhesive strength over a wide temperature range. In addition, a gap (hereinafter referred to as a void) may be generated between the layer of the die-bonding resin paste in a B-staged state and the chip when the chip is attached, and it is also desired that the void can be reduced. When the void is large, cracks are likely to occur in the die bonding material in the solder reflow process, which may reduce the reliability of the semiconductor device.
 更に、封止工程後、半田リフロー工程があり、この際の最高温度が250℃~260℃であることから、ダイボンディング用樹脂ペーストには、250℃~260℃での熱時ダイシェア強度に優れることも要求される。 Further, there is a solder reflow process after the sealing process, and the maximum temperature at this time is 250 ° C. to 260 ° C. Therefore, the resin paste for die bonding is excellent in die share strength during heating at 250 ° C. to 260 ° C. It is also required.
 本発明はこのような事情に鑑みてなされたものであり、Bステージ化において、広い温度範囲でチップとの良好な接着強度を有すると共に、チップとの間のボイドも低減でき、且つ、半田リフロー工程においても十分な熱時ダイシェア強度を有するダイボンディング用樹脂ペーストを提供することを目的とする。また、本発明は、上記ダイボンディング用樹脂ペーストを用いた半導体装置の製造方法を提供することを目的とする。更に、本発明は、上記ダイボンディング用樹脂ペーストを用いた信頼性に優れる半導体装置を提供することを目的とする。 The present invention has been made in view of such circumstances, and in the B-stage, it has good adhesive strength with the chip in a wide temperature range, and can also reduce voids between the chip and solder reflow. It is an object of the present invention to provide a resin bonding for die bonding having a sufficient die shear strength during heating in the process. Another object of the present invention is to provide a method for manufacturing a semiconductor device using the die bonding resin paste. Furthermore, an object of the present invention is to provide a semiconductor device excellent in reliability using the die bonding resin paste.
 上記課題を達成するために、本発明では以下の構成を採用する。すなわち、本発明の一実施形態は、カルボキシル基を有するブタジエンのポリマー(a1)とエポキシ基を有する化合物(a2)を反応させて得られるポリマー(A)、熱硬化性樹脂(B)およびフィラー(C)を含む、ダイボンディング用樹脂ペーストに関する。 In order to achieve the above object, the present invention adopts the following configuration. That is, in one embodiment of the present invention, a polymer (A) obtained by reacting a carboxyl group-containing butadiene polymer (a1) and an epoxy group-containing compound (a2), a thermosetting resin (B) and a filler ( C) containing resin paste for die bonding.
 別の本発明一実施形態は、上記ダイボンディング用樹脂ペーストを用いる半導体装置の製造方法に関し、(1)基板上に上記ダイボンディング用樹脂ペーストを塗布する工程、(2)前記樹脂ペーストを乾燥して樹脂ペーストをBステージ化する工程、(3)Bステージ化した前記樹脂ペーストに半導体チップを搭載する工程と、を含む、半導体装置の製造方法に関する。 Another embodiment of the present invention relates to a method of manufacturing a semiconductor device using the die bonding resin paste, (1) a step of applying the die bonding resin paste on a substrate, and (2) drying the resin paste. And (3) a step of mounting a semiconductor chip on the B-staged resin paste, and a method of manufacturing a semiconductor device.
 別の本発明一実施形態は、上記ダイボンディング用樹脂ペーストを用いる半導体装置の製造方法に関し、(1)基板上に上記ダイボンディング用樹脂ペーストを塗布する工程、(2)前記樹脂ペーストを乾燥して樹脂ペーストをBステージ化する工程、(3)Bステージ化した前記樹脂ペーストに半導体チップを搭載する工程と、を含む製造方法により得られる半導体装置に関する。 Another embodiment of the present invention relates to a method of manufacturing a semiconductor device using the die bonding resin paste, (1) a step of applying the die bonding resin paste on a substrate, and (2) drying the resin paste. And (3) a step of mounting a semiconductor chip on the B-staged resin paste.
 別の本発明一実施形態は、(1)基板上に上記ダイボンディング用樹脂ペーストを塗布する工程、(2)塗布した樹脂ペーストに半導体チップを搭載する工程、(3)前記半導体チップを封止剤により封止する工程と、を含む、半導体装置の製造方法に関する。 Another embodiment of the present invention includes (1) a step of applying the die bonding resin paste on a substrate, (2) a step of mounting a semiconductor chip on the applied resin paste, and (3) sealing the semiconductor chip. And a step of sealing with an agent.
 さらに別の本発明一実施形態は、(1)基板上に上記ダイボンディング用樹脂ペーストを塗布する工程、(2)塗布した樹脂ペーストに半導体チップを搭載する工程、(3)前記半導体チップを封止剤により封止する工程と、を含む半導体装置の製造方法により得られる半導体装置に関する。
 本明細書の開示は、日本国特許出願2009-070531号(2009年3月23日出願)に含まれる主題に関し、これらの出願明細書を参照して全体的に本明細書に組み込むものとする。
In another embodiment of the present invention, (1) a step of applying the die bonding resin paste on a substrate, (2) a step of mounting a semiconductor chip on the applied resin paste, (3) sealing the semiconductor chip. And a step of sealing with a stopper.
The disclosure of this specification relates to the subject matter included in Japanese Patent Application No. 2009-070531 (filed on Mar. 23, 2009), and is incorporated herein in its entirety with reference to these application specifications. .
 本発明の一実施形態によれば、Bステージ化において、広い温度範囲でチップとの良好な接着強度を有すると共に、チップとの間のボイドも低減でき、且つ、半田リフロー工程においても十分な熱時ダイシェア強度を有するダイボンディング用樹脂ペーストを提供することができる。また、本発明の一実施形態によれば、チップを貼り付けた後の後硬化を省いても、ワイヤボンディング、及び封止の工程で不具合が生じないので、製造工程を短縮することが可能である。 According to one embodiment of the present invention, in the B-staging, the adhesive strength with the chip can be reduced in a wide temperature range, the void between the chips can be reduced, and sufficient heat can be obtained in the solder reflow process. It is possible to provide a resin bonding for die bonding having a high die shear strength. In addition, according to an embodiment of the present invention, even if the post-curing after the chip is attached is omitted, there is no problem in the wire bonding and sealing process, so the manufacturing process can be shortened. is there.
 本発明の一実施形態によるダイボンディング用樹脂ペーストは、低温接着性に優れるので、ダイボンディング材として、有機基板などの絶縁性支持基板に好適である。また、本発明の一実施形態によれば、上記本発明のダイボンディング用樹脂ペーストを用いることにより、作業性に優れる半導体装置の製造方法を提供することができる。更に、本発明の一実施形態によれば、上記本発明のダイボンディング用樹脂ペーストを用いることにより、信頼性に優れる半導体装置を提供することができる。 Since the resin paste for die bonding according to an embodiment of the present invention is excellent in low-temperature adhesiveness, it is suitable for an insulating support substrate such as an organic substrate as a die bonding material. Moreover, according to one embodiment of the present invention, a method of manufacturing a semiconductor device having excellent workability can be provided by using the die bonding resin paste of the present invention. Furthermore, according to one embodiment of the present invention, a semiconductor device having excellent reliability can be provided by using the die bonding resin paste of the present invention.
図1は本発明の半導体装置の製造工程の一例を示す図である。FIG. 1 is a diagram showing an example of a manufacturing process of a semiconductor device of the present invention. 図2は本発明の半導体装置の一例であるBOCの断面図である。FIG. 2 is a cross-sectional view of a BOC which is an example of the semiconductor device of the present invention. 図3は本発明の半導体装置の一例であるリードフレーム型半導体装置の一実施例の断面図である。FIG. 3 is a cross-sectional view of an embodiment of a lead frame type semiconductor device which is an example of the semiconductor device of the present invention.
 以下、場合により図面を参照しつつ、本発明の好適な実施形態について詳細に説明する。なお、図面中、同一又は相当部分には同一符号を付し、重複する説明は省略する。また、本発明において、「Bステージ化」とは、ダイボンディング用樹脂ペースト塗布後に熱処理して溶剤(D)を揮発させ、塗布したダイボンディング用樹脂ペーストを乾燥状態にすることであり、また、この状態においてダイボンディング用樹脂ペーストは完全硬化していないことを意味する。完全硬化とは、DSC(Differential scanning calorimetry)での測定において、80~180℃(昇温速度:10℃/分)の範囲で吸熱ピークがない状態と定義し、以下「後硬化」という場合もある。 Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings as the case may be. In the drawings, the same or corresponding parts are denoted by the same reference numerals, and redundant description is omitted. Further, in the present invention, “B-stage” is to heat-treat the die bonding resin paste and volatilize the solvent (D), and to dry the applied die bonding resin paste. This means that the die bonding resin paste is not completely cured. Complete curing is defined as a state where there is no endothermic peak in the range of 80 to 180 ° C (temperature increase rate: 10 ° C / min) in DSC (Differential Scanning Calorimetry) measurement. is there.
 以下、本発明をさらに詳細に説明する。 Hereinafter, the present invention will be described in more detail.
 本発明に係るダイボンディング用樹脂ペースト(以下、単に「樹脂ペースト」という場合もある。)は、カルボキシル基を有するブタジエンのポリマー(a1)とエポキシ基を有する化合物(a2)を反応させて得られるポリマー(A)、熱硬化性樹脂(B)、及びフィラー(C)を含む。 The resin paste for die bonding according to the present invention (hereinafter sometimes simply referred to as “resin paste”) is obtained by reacting a butadiene polymer (a1) having a carboxyl group with a compound (a2) having an epoxy group. A polymer (A), a thermosetting resin (B), and a filler (C) are included.
[カルボキシル基を有するブタジエンのポリマー(a1)]
 カルボキシル基を有するブタジエンのポリマー(以下、成分(a1)と略す場合がある。)としては、ポリブタジエン構造及びカルボキシル基を有していれば特に限定されない。たとえば、ブタジエンから誘導されるポリブタジエン構造と、カルボキシル基を有する化合物との共重合体であってもよい。また、ブタジエンとアクリロニトリル等の他の重合性化合物とのコポリマーを主鎖とし、その末端の少なくとも一方にカルボキシル基を有するものであってもよい。印刷性、接着強度及び作業性の観点からは、成分(a1)の数平均分子量は500~10000であることが好ましく、1000~7000であることがより好ましい。本発明において、前記成分(a1)は、下記一般式(1)で表されるカルボキシル基を有するブタジエン-アクリロニトリル共重合体がより好ましい。
Figure JPOXMLDOC01-appb-C000001
[Polybutadiene polymer having carboxyl group (a1)]
The butadiene polymer having a carboxyl group (hereinafter sometimes abbreviated as component (a1)) is not particularly limited as long as it has a polybutadiene structure and a carboxyl group. For example, a copolymer of a polybutadiene structure derived from butadiene and a compound having a carboxyl group may be used. Further, the main chain may be a copolymer of butadiene and another polymerizable compound such as acrylonitrile, and at least one of its terminals may have a carboxyl group. From the viewpoint of printability, adhesive strength, and workability, the number average molecular weight of component (a1) is preferably 500 to 10,000, and more preferably 1000 to 7000. In the present invention, the component (a1) is more preferably a butadiene-acrylonitrile copolymer having a carboxyl group represented by the following general formula (1).
Figure JPOXMLDOC01-appb-C000001
〔一般式(1)中、x/yは95/5~50/50であり、nは5~50の整数である。〕
上記一般式(1)で表される化合物は、市販品として入手することも可能である。
[In the general formula (1), x / y is 95/5 to 50/50, and n is an integer of 5 to 50. ]
The compound represented by the general formula (1) can also be obtained as a commercial product.
 前記一般式(1)で表されるカルボキシル基を有するブタジエン-アクリロニトリル共重合体としては、たとえば、Hycar CTBN-2009×162,CTBN-1300×31,CTBN-1300×8、CTBN-1300×13、CTBNX-1300×9(いずれも宇部興産株式会社製)が市販品として入手可能である。また、本発明において好適な成分(a1)の例として、カルボキシル基を有する低分子量液状ポリブタジエンである、NISSO-PB-C-2000(日本曹達株式会社製、商品名)(日本曹達(株)製、商品名)など等が挙げられる。 Examples of the butadiene-acrylonitrile copolymer having a carboxyl group represented by the general formula (1) include Hycar CTBN-2009 × 162, CTBN-1300 × 31, CTBN-1300 × 8, CTBN-1300 × 13, CTBNX-1300 × 9 (all manufactured by Ube Industries, Ltd.) is available as a commercial product. In addition, as an example of the component (a1) suitable for the present invention, a low molecular weight liquid polybutadiene having a carboxyl group, NISSO-PB-C-2000 (manufactured by Nippon Soda Co., Ltd., trade name) (manufactured by Nippon Soda Co., Ltd.) , Product name) and the like.
 これらは単独で、または2種以上を組み合わせて用いることができる。 These can be used alone or in combination of two or more.
[エポキシ基を有する化合物(a2)]
 エポキシ基を有する化合物(以下、成分(a2)と略す場合がある。)としては、特に限定されないが、例えば、エチレングリコールジグリシジルエーテル、ジエチレングリコールジグリシジルエーテル、プロピレングリコールジグリシジルエーテル、ジプロピレングリコールジグリシジルエーテル、グリセリントリグリシジルエーテルなどのグリシジルエーテル型エポキシ化合物;ダイマー酸などの多価カルボン酸とその無水物を原料とするグリシジルエステル型エポキシ化合物;脂肪族アミンを原料とするグリシジルアミン型エポキシ化合物等の脂肪族エポキシ化合物、ハイドロキノン、メチルハイドロキノン、ジメチルハイドロキノン、トリメチルハイドロキノン、レゾルシノール、メチルレゾルシノール、カテコール、メチルカテコール、ビフェノール、テトラメチルビフェノール、ジヒドロキシナフタレン、ジヒドロキシメチルナフタレン、ジヒドロキシジメチルナフタレン、ビス(4-ヒドロキシフェニル)ケトン、ビス(4-ヒドロキシ-3,5-ジメチルフェニル)ケトン、ビス(4-ヒドロキシ-3,5-ジクロロフェニル)ケトン、ビス(4-ヒドロキシフェニル)スルホン、ビス(4-ヒドロキシ-3,5-ジメチルフェニル)スルホン、ビス(4-ヒドロキシ-3,5-ジクロロフェニル)スルホン、ビス(4-ヒドロキシフェニル)ヘキサフルオロプロパン、ビス(4-ヒドロキシ-3,5-ジメチルフェニル)ヘキサフルオロプロパン、ビス(4-ヒドロキシ-3,5-ジクロロフェニル)ヘキサフルオロプロパン、ビス(4-ヒドロキシフェニル)ジメチルシラン、ビス(4-ヒドロキシ-3,5-ジメチルフェニル)ジメチルシラン、ビス(4-ヒドロキシ-3,5-ジクロロフェニル)ジメチルシラン、ビス(4-ヒドロキシフェニル)メタン、ビス(4-ヒドロキシ-3,5-ジクロロフェニル)メタン、ビス(4-ヒドロキシ-3,5-ジブロモフェニル)メタン、2,2-ビス(4-ヒドロキシフェニル)プロパン、2,2-ビス(4-ヒドロキシ-3,5-ジメチルフェニル)プロパン、2,2-ビス(4-ヒドロキシ-3,5-ジクロロフェニル)プロパン、2,2-ビス(4-ヒドロキシ-3-メチルフェニル)プロパン、2,2-ビス(4-ヒドロキシ-3-クロロフェニル)プロパン、ビス(4-ヒドロキシフェニル)エーテル、ビス(4-ヒドロキシ-3,5-ジメチルフェニル)エーテル、ビス(4-ヒドロキシ-3,5-ジクロロフェニル)エーテル、9,9-ビス(4-ヒドロキシフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3-メチルフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3-クロロフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3-ブロモフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3-フルオロフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3-メトキシフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3,5-ジメチルフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3,5-ジクロロフェニル)フルオレン、9,9-ビス(4-ヒドロキシ-3,5-ジブロモフェニル)フルオレンなどの1種以上とエピハロヒドリンとの縮合により得られるジグリシジル化合物等の芳香環を有するエポキシ化合物などの1分子内に2個のエポキシ基を有する化合物が挙げられる。
[Compound having epoxy group (a2)]
Although it does not specifically limit as a compound (henceforth abbreviated as component (a2)) which has an epoxy group, For example, ethylene glycol diglycidyl ether, diethylene glycol diglycidyl ether, propylene glycol diglycidyl ether, dipropylene glycol di Glycidyl ether type epoxy compounds such as glycidyl ether and glycerin triglycidyl ether; Glycidyl ester type epoxy compounds using polyvalent carboxylic acids such as dimer acid and anhydrides as raw materials; Glycidyl amine type epoxy compounds using aliphatic amines as raw materials, etc. Aliphatic epoxy compounds, hydroquinone, methylhydroquinone, dimethylhydroquinone, trimethylhydroquinone, resorcinol, methylresorcinol, catechol, methylcateco , Biphenol, tetramethylbiphenol, dihydroxynaphthalene, dihydroxymethylnaphthalene, dihydroxydimethylnaphthalene, bis (4-hydroxyphenyl) ketone, bis (4-hydroxy-3,5-dimethylphenyl) ketone, bis (4-hydroxy-3 , 5-dichlorophenyl) ketone, bis (4-hydroxyphenyl) sulfone, bis (4-hydroxy-3,5-dimethylphenyl) sulfone, bis (4-hydroxy-3,5-dichlorophenyl) sulfone, bis (4-hydroxy Phenyl) hexafluoropropane, bis (4-hydroxy-3,5-dimethylphenyl) hexafluoropropane, bis (4-hydroxy-3,5-dichlorophenyl) hexafluoropropane, bis (4-hydroxyphenyl) Methylsilane, bis (4-hydroxy-3,5-dimethylphenyl) dimethylsilane, bis (4-hydroxy-3,5-dichlorophenyl) dimethylsilane, bis (4-hydroxyphenyl) methane, bis (4-hydroxy-3, 5-dichlorophenyl) methane, bis (4-hydroxy-3,5-dibromophenyl) methane, 2,2-bis (4-hydroxyphenyl) propane, 2,2-bis (4-hydroxy-3,5-dimethylphenyl) ) Propane, 2,2-bis (4-hydroxy-3,5-dichlorophenyl) propane, 2,2-bis (4-hydroxy-3-methylphenyl) propane, 2,2-bis (4-hydroxy-3-) Chlorophenyl) propane, bis (4-hydroxyphenyl) ether, bis (4-hydroxy-3,5-dimethyl) Tilphenyl) ether, bis (4-hydroxy-3,5-dichlorophenyl) ether, 9,9-bis (4-hydroxyphenyl) fluorene, 9,9-bis (4-hydroxy-3-methylphenyl) fluorene, 9-bis (4-hydroxy-3-chlorophenyl) fluorene, 9,9-bis (4-hydroxy-3-bromophenyl) fluorene, 9,9-bis (4-hydroxy-3-fluorophenyl) fluorene, 9, 9-bis (4-hydroxy-3-methoxyphenyl) fluorene, 9,9-bis (4-hydroxy-3,5-dimethylphenyl) fluorene, 9,9-bis (4-hydroxy-3,5-dichlorophenyl) One or more of fluorene, 9,9-bis (4-hydroxy-3,5-dibromophenyl) fluorene and the like Compounds having two epoxy groups in one molecule, such as an epoxy compound having an aromatic ring of diglycidyl compounds obtained by condensation of halohydrin and the like.
 また、フェノールのグリシジルエーテル型のエポキシ樹脂を用いることもできる。このような樹脂としては、ビスフェノールA、ビスフェノールAD、ビスフェノールS、ビスフェノールF、または、ハロゲン化ビスフェノールAとエピクロルヒドリンの縮合物、フェノールノボラック樹脂のグリシジルエーテル、クレゾールノボラック樹脂のグリシジルエーテル、ビスフェノールAノボラック樹脂のグリシジルエーテル等が挙げられる。これらは単独で、または2種以上を組み合わせて用いることができる。これらエポキシ化合物の中でも特に、下記一般式(2)で表されるエポキシ化合物が、樹脂の強度の観点から特に好ましい。
Figure JPOXMLDOC01-appb-C000002
A phenol glycidyl ether type epoxy resin can also be used. Examples of such resins include bisphenol A, bisphenol AD, bisphenol S, bisphenol F, or a condensate of halogenated bisphenol A and epichlorohydrin, glycidyl ether of phenol novolac resin, glycidyl ether of cresol novolac resin, and bisphenol A novolac resin. A glycidyl ether etc. are mentioned. These can be used alone or in combination of two or more. Among these epoxy compounds, an epoxy compound represented by the following general formula (2) is particularly preferable from the viewpoint of the strength of the resin.
Figure JPOXMLDOC01-appb-C000002
を示し、R及びRは各々独立に水素原子、炭素数1~6のアルキル基又はハロゲン原子を示し、m及びnは各々独立に1~4の整数を示す。なお、nが2以上の場合、複数存在するRは同一でも異なっていてもよく、mが2以上の場合、複数存在するRは同一でも異なっていてもよい。]
 これらエポキシ基を有する化合物は、単独で、または2種以上を組み合わせて用いることができる。
R 1 and R 2 each independently represents a hydrogen atom, an alkyl group having 1 to 6 carbon atoms or a halogen atom, and m and n each independently represents an integer of 1 to 4. In addition, when n is 2 or more, a plurality of R 1 may be the same or different, and when m is 2 or more, a plurality of R 2 may be the same or different. ]
These compounds having an epoxy group can be used alone or in combination of two or more.
[ポリマー(A)]
 ポリマー(A)は、成分(a1)と成分(a2)を反応させて得られる。この際の配合比は、成分(a1)の1カルボン酸当量に対して、成分(a2)のエポキシ当量は、接着強度を考慮すると0.01以上、アウトガス発生による剥離のし難さを考慮すると10以下であることが好ましく、0.1~2であることがより好ましく、0.25~1であることが特に好ましい。
[Polymer (A)]
The polymer (A) is obtained by reacting the component (a1) and the component (a2). In this case, the compounding ratio is 0.01 or more with respect to 1 carboxylic acid equivalent of the component (a1), and the epoxy equivalent of the component (a2) is 0.01 or more considering the adhesive strength, and the difficulty of peeling due to outgas generation is considered. It is preferably 10 or less, more preferably 0.1 to 2, and particularly preferably 0.25 to 1.
 ポリマー(A)の粘度は、合成時の反応温度及び反応時間で調整することができ、反応温度を上げる、又は反応時間を長くすることで、粘度は高くなる傾向になる。ポリマー(A)の好適な粘度は、接着強度を向上できる観点から、150Pa・s以上であり、300~900Pa・sがより好ましく、500~700Pa・sが特に好ましい。特に、好適な材料比でカルボキシル基を有するブタジエンのホモポリマーまたはコポリマーとエポキシ基を有する化合物を反応させ、さらに、粘度を300Pa・s以上とした場合は、樹脂ペーストにしたときの接着強度をより向上できる観点で好ましく、900Pa・s以下では樹脂ペーストにした時の作業性が良好になる。 The viscosity of the polymer (A) can be adjusted by the reaction temperature and reaction time during synthesis, and the viscosity tends to increase by increasing the reaction temperature or increasing the reaction time. A suitable viscosity of the polymer (A) is 150 Pa · s or more, more preferably 300 to 900 Pa · s, and particularly preferably 500 to 700 Pa · s from the viewpoint of improving the adhesive strength. In particular, when a butadiene homopolymer or copolymer having a carboxyl group at a suitable material ratio is reacted with a compound having an epoxy group, and the viscosity is 300 Pa · s or more, the adhesive strength when the resin paste is obtained is further improved. It is preferable from the viewpoint of improvement, and when it is 900 Pa · s or less, workability is improved when a resin paste is used.
 ポリマー(A)の重量平均分子量は、5000以上であることが好ましく、15000~70000であることがより好ましく、17000~40000であることが特に好ましい。重量平均分子量が、5000以上であると、接着強度により優れ、70000未満であると、樹脂ペーストにした時の作業性をより向上させることができる。 The weight average molecular weight of the polymer (A) is preferably 5000 or more, more preferably 15000 to 70000, and particularly preferably 17000 to 40000. When the weight average molecular weight is 5000 or more, the adhesive strength is excellent, and when it is less than 70000, the workability when the resin paste is obtained can be further improved.
 なお、重量平均分子量(Mw)及び数平均分子量(Mn)は、ゲルパーミエーションクロマトグラフィー(GPC)により測定することができる(標準ポリスチレンを用いた検量線による換算)。
 また、ポリマー(A)の酸価は、10~25mgKOH/gであることが好ましく、15~23mgKOH/gであることがより好ましい。
 酸価が10~25mgKOH/gであると、樹脂ペーストにした時の作業性をより向上させることができる。
 上記ポリマー(A)の酸価は、以下の方法により測定することができる。まず、ポリマー(A)の樹脂溶液を約1gを精秤した後、その樹脂溶液にアセトンを30g添加し、樹脂溶液を均一に溶解する。次いで、指示薬であるフェノールフタレインをその溶液に適量添加して、0.1NのKOH水溶液を用いて滴定を行う。そして、滴定結果より以下の式(3);
  A=10×Vf×56.1/(Wp×I)・・・・・(3)
 により酸価を算出する。なお、式(I)中、Aは酸価(mgKOH/g)を示し、Vfはフェノールフタレインの滴定量(mL)を示し、Wpはポリマー(A)の樹脂溶液重量(g)を示し、Iはポリマー(A)の樹脂溶液の不揮発分の割合(質量%)を示す。
In addition, a weight average molecular weight (Mw) and a number average molecular weight (Mn) can be measured by gel permeation chromatography (GPC) (converted with a calibration curve using standard polystyrene).
The acid value of the polymer (A) is preferably 10 to 25 mgKOH / g, and more preferably 15 to 23 mgKOH / g.
When the acid value is 10 to 25 mg KOH / g, the workability when the resin paste is obtained can be further improved.
The acid value of the polymer (A) can be measured by the following method. First, about 1 g of the resin solution of polymer (A) is precisely weighed, 30 g of acetone is added to the resin solution, and the resin solution is uniformly dissolved. Next, an appropriate amount of phenolphthalein as an indicator is added to the solution, and titration is performed using a 0.1N aqueous KOH solution. And from the titration result, the following formula (3);
A = 10 × Vf × 56.1 / (Wp × I) (3)
To calculate the acid value. In formula (I), A represents the acid value (mgKOH / g), Vf represents the titration amount (mL) of phenolphthalein, Wp represents the resin solution weight (g) of polymer (A), I shows the ratio (mass%) of the non volatile matter of the resin solution of polymer (A).
 (A)成分の含有率は、基板とチップ間の応力緩和性、及び接着強度の観点から、(A)成分及び(B)成分の総量中、50~99重量%であることが好ましく、75~97重量%であることがより好ましく、80~95重量%であることが特に好ましい。 The content of the component (A) is preferably 50 to 99% by weight in the total amount of the component (A) and the component (B) from the viewpoint of stress relaxation between the substrate and the chip and the adhesive strength. More preferably, it is ˜97 wt%, particularly preferably 80 to 95 wt%.
[熱硬化性樹脂(B)]
 熱硬化性樹脂(B)としては、特に限定されないが、たとえば、エポキシ樹脂、フェノール樹脂、1分子中に少なくとも2個の熱硬化性イミド基を有するイミド化合物等が挙げられる。これらは、1種を単独で又は2種以上を組み合わせて用いられる。
[Thermosetting resin (B)]
Although it does not specifically limit as a thermosetting resin (B), For example, the imide compound etc. which have an epoxy resin, a phenol resin, and at least 2 thermosetting imide group in 1 molecule are mentioned. These are used singly or in combination of two or more.
 前記エポキシ樹脂は、分子内に少なくとも2個のエポキシ基を含むものであり、熱時ダイシェア強度の観点から、フェノールのグリシジルエーテル型のエポキシ樹脂が好ましい。このような樹脂としては、ビスフェノールA、ビスフェノールAD、ビスフェノールS、ビスフェノールF、または、ハロゲン化ビスフェノールAとエピクロルヒドリンの縮合物、フェノールノボラック樹脂のグリシジルエーテル、クレゾールノボラック樹脂のグリシジルエーテル、ビスフェノールAノボラック樹脂のグリシジルエーテル等が挙げられる。これらは、1種を単独で又は2種以上を組み合わせて用いられる。 The epoxy resin contains at least two epoxy groups in the molecule, and phenol glycidyl ether type epoxy resin is preferred from the viewpoint of hot die shear strength. Examples of such resins include bisphenol A, bisphenol AD, bisphenol S, bisphenol F, or a condensate of halogenated bisphenol A and epichlorohydrin, glycidyl ether of phenol novolac resin, glycidyl ether of cresol novolac resin, and bisphenol A novolac resin. A glycidyl ether etc. are mentioned. These are used singly or in combination of two or more.
 エポキシ樹脂を用いる場合の含有量は、熱時ダイシェア強度の観点から、ポリマー(A)100重量部に対して1~100質量部であることが好ましく、2~50質量部であることがより好ましく、3~20質量部であることが特に好ましい。 In the case of using an epoxy resin, the content is preferably 1 to 100 parts by weight, more preferably 2 to 50 parts by weight with respect to 100 parts by weight of the polymer (A), from the viewpoint of die shear strength during heating. 3 to 20 parts by mass is particularly preferable.
 前記フェノール樹脂は、分子中に少なくとも2個のフェノール性水酸基を有するものであり、たとえば、フェノールノボラック樹脂、クレゾールノボラック樹脂、ビスフェノールA型ノボラック樹脂、ポリ-p-ビニルフェノール、フェノールアラルキル樹脂等が挙げられる。これらは、1種を単独で又は2種以上を組み合わせて用いられる。 The phenol resin has at least two phenolic hydroxyl groups in the molecule, and examples thereof include phenol novolak resin, cresol novolak resin, bisphenol A type novolak resin, poly-p-vinylphenol, phenol aralkyl resin and the like. It is done. These are used singly or in combination of two or more.
 前記フェノール樹脂を用いる場合の含有量は、熱時ダイシェア強度、及び半導体パッケージ信頼性を考慮すると、ポリマー(A)100重量部に対して0.5~100質量部であることが好ましく、1~50質量部であることがより好ましく、2~20質量部であることが特に好ましい。 The content in the case of using the phenol resin is preferably 0.5 to 100 parts by mass with respect to 100 parts by weight of the polymer (A) in consideration of hot die shear strength and semiconductor package reliability. The amount is more preferably 50 parts by mass, and particularly preferably 2 to 20 parts by mass.
 半導体パッケージ信頼性を向上できる観点からは、エポキシ樹脂とフェノール樹脂を併用することが好ましい。 From the viewpoint of improving semiconductor package reliability, it is preferable to use an epoxy resin and a phenol resin in combination.
 前記1分子中に少なくとも2個の熱硬化性イミド基を有するイミド化合物としては、たとえば、オルトビスマレイミドベンゼン、メタビスマレイミドベンゼン、パラビスマレイミドベンゼン、1,4-ビス(p-マレイミドクミル)ベンゼン、1,4-ビス(m-マレイミドクミル)ベンゼン等が挙げられる。これらは1種を単独で又は2種以上を組み合わせて用いられる。 Examples of the imide compound having at least two thermosetting imide groups in one molecule include orthobismaleimide benzene, metabismaleimide benzene, parabismaleimide benzene, and 1,4-bis (p-maleimide cumyl). Examples thereof include benzene and 1,4-bis (m-maleimidocumyl) benzene. These are used singly or in combination of two or more.
さらに、下記の式(I)~(III)で表されるイミド化合物等を用いることも好ましい。
Figure JPOXMLDOC01-appb-C000003
Further, it is also preferable to use imide compounds represented by the following formulas (I) to (III).
Figure JPOXMLDOC01-appb-C000003
〔式中、X’やYは、O、CH、CF、SO、S、CO、C(CHまたはC(CFを示し;R、R、R、R、R、R、RおよびRは、それぞれ独立に水素、低級アルキル基、低級アルコキシ基、フッ素、塩素または臭素を示し;Dはエチレン性不飽和二重結合を有するジカルボン酸残基を示し;m’は0~4の整数を示す。〕
 イミド化合物を用いる場合の含有量は、樹脂ペーストの保管安定性を考慮すると、ポリマー(A)100重量部に対して、100重量部未満であることがより好ましい。
[Wherein, X ′ and Y represent O, CH 2 , CF 2 , SO 2 , S, CO, C (CH 3 ) 2 or C (CF 3 ) 2 ; R 1 , R 2 , R 3 , R 4 , R 5 , R 6 , R 7 and R 8 each independently represent hydrogen, a lower alkyl group, a lower alkoxy group, fluorine, chlorine or bromine; D is a dicarboxylic acid having an ethylenically unsaturated double bond Represents a residue; m ′ represents an integer of 0 to 4; ]
In consideration of the storage stability of the resin paste, the content when the imide compound is used is more preferably less than 100 parts by weight with respect to 100 parts by weight of the polymer (A).
 式(I)のイミド化合物としては、たとえば、4,4-ビスマレイミドジフェニルエーテル、4,4-ビスマレイミドジフェニルメタン、4,4-ビスマレイミド-3,3’-ジメチル-ジフェニルメタン、4,4-ビスマレイミドジフェニルスルホン、4,4-ビスマレイミドジフェニルスルフィド、4,4-ビスマレイミドジフェニルケトン、2,2’-ビス(4-マレイミドフェニル)プロパン、4,4-ビスマレイミドジフェニルフルオロメタン、1,1,1,3,3,3-ヘキサフルオロ-2,2-ビス(4-マレイミドフェニル)プロパン等が挙げられる。 Examples of the imide compound of formula (I) include 4,4-bismaleimide diphenyl ether, 4,4-bismaleimide diphenylmethane, 4,4-bismaleimide-3,3′-dimethyl-diphenylmethane, and 4,4-bismaleimide. Diphenylsulfone, 4,4-bismaleimide diphenyl sulfide, 4,4-bismaleimide diphenyl ketone, 2,2′-bis (4-maleimidophenyl) propane, 4,4-bismaleimide diphenylfluoromethane, 1,1,1 3,3,3-hexafluoro-2,2-bis (4-maleimidophenyl) propane and the like.
 式(II)のイミド化合物としては、たとえば、ビス〔4-(4-マレイミドフェノキシ)フェニル〕エーテル、ビス〔4-(4-マレイミドフェノキシ)フェニル〕メタン、ビス〔4-(4-マレイミドフェノキシ)フェニル〕フルオロメタン、ビス〔4-(4-マレイミドフェノキシ)フェニル〕スルホン、ビス〔4-(3-マレイミドフェノキシ)フェニル〕スルホン、ビス〔4-(4-マレイミドフェノキシ)フェニル〕スルフィド、ビス〔4-(4-マレイミドフェノキシ)フェニル〕ケトン、2,2-ビス〔4-(4-マレイミドフェノキシ)フェニル〕プロパン、1,1,1,3,3,3-ヘキサフルオロ-2,2-ビス〔4-(4-マレイミドフェノキシ)フェニル〕プロパン等が挙げられる。 Examples of the imide compound of the formula (II) include bis [4- (4-maleimidophenoxy) phenyl] ether, bis [4- (4-maleimidophenoxy) phenyl] methane, and bis [4- (4-maleimidophenoxy). Phenyl] fluoromethane, bis [4- (4-maleimidophenoxy) phenyl] sulfone, bis [4- (3-maleimidophenoxy) phenyl] sulfone, bis [4- (4-maleimidophenoxy) phenyl] sulfide, bis [4 -(4-maleimidophenoxy) phenyl] ketone, 2,2-bis [4- (4-maleimidophenoxy) phenyl] propane, 1,1,1,3,3,3-hexafluoro-2,2-bis [ 4- (4-maleimidophenoxy) phenyl] propane and the like.
 これらイミド化合物の硬化を促進するため、ラジカル重合剤を使用してもよい。ラジカル重合剤としては、アセチルシクロヘキシルスルホニルパーオキサイド、イソブチリルパーオキサイド、ベンゾイルパーオキサイド、オクタノイルパーオキサイド、アセチルパーオキサイド、ジクミルパーオキサイド、クメンハイドロパーオキサイド、アゾビスイソブチロニトリル等が挙げられる。ラジカル重合剤を用いる場合の含有量は、イミド化合物100重量部に対して、0.01~1.0重量部が好ましい。 In order to accelerate the curing of these imide compounds, a radical polymerization agent may be used. Examples of the radical polymerization agent include acetylcyclohexylsulfonyl peroxide, isobutyryl peroxide, benzoyl peroxide, octanoyl peroxide, acetyl peroxide, dicumyl peroxide, cumene hydroperoxide, azobisisobutyronitrile and the like. . When the radical polymerization agent is used, the content is preferably 0.01 to 1.0 part by weight with respect to 100 parts by weight of the imide compound.
(B)成分である熱硬化性樹脂の含有量は、Bステージ化を比較的高温で行う場合は、その後のチップ加熱圧着時のダイボンディング層の濡れ広がりを向上できる観点から、上記成分(A)100質量部に対して、1~100質量部であることが好ましく、3~30質量部であることがより好ましく、5~20質量部であることが特に好ましい。 The content of the thermosetting resin as the component (B) is the above component (A) from the viewpoint of improving the wetting and spreading of the die bonding layer at the time of chip thermocompression bonding when the B-staging is performed at a relatively high temperature. ) It is preferably 1 to 100 parts by weight, more preferably 3 to 30 parts by weight, and particularly preferably 5 to 20 parts by weight with respect to 100 parts by weight.
[フィラー(C)]
 フィラー(C)としては、以下の例には限定されないが、たとえば、銀粉、金粉、銅粉等の導電性フィラー;シリカ、アルミナ、チタニア、ガラス、酸化鉄、セラミック等の無機物質フィラー;等が挙げられる。これらは1種を単独で又は2種以上を組み合わせて用いられる。
[Filler (C)]
Examples of the filler (C) include, but are not limited to, conductive fillers such as silver powder, gold powder, and copper powder; inorganic fillers such as silica, alumina, titania, glass, iron oxide, and ceramic; Can be mentioned. These are used singly or in combination of two or more.
 フィラー(C)のうち、銀粉、金粉、銅粉等の導電性フィラーは、ダイボンディング材の導電性、伝熱性、及び樹脂ペーストのチキソトロピー性を向上することができる。また、シリカ、アルミナ、チタニア、ガラス、酸化鉄、セラミック等の無機物質フィラーは、ダイボンディング材の低熱膨張性、低吸湿率、及びチキソトロピー性を向上することができる。 Among the fillers (C), conductive fillers such as silver powder, gold powder, and copper powder can improve the conductivity and heat conductivity of the die bonding material and the thixotropy of the resin paste. In addition, inorganic fillers such as silica, alumina, titania, glass, iron oxide, and ceramic can improve the low thermal expansion, low moisture absorption, and thixotropy of the die bonding material.
 これらの中でも特に、半導体パッケージ信頼性の観点から、シリカであることが概ね好ましい。 Of these, silica is generally preferred from the viewpoint of semiconductor package reliability.
 フィラー(C)は、半導体パッケージ信頼性を考慮すると、平均粒径が0.001μm~10μmであることが好ましく、0.005~5μmであることがより好ましく、0.01~1μmであることが特に好ましい。 In view of semiconductor package reliability, the filler (C) preferably has an average particle size of 0.001 μm to 10 μm, more preferably 0.005 to 5 μm, and preferably 0.01 to 1 μm. Particularly preferred.
 半導体装置の電気的信頼性を向上させるフィラー(C)として、無機イオン交換体を加えてもよい。無機イオン交換体としては、樹脂ペースト硬化物を熱水中で抽出したとき、水溶液中に抽出されるイオン、たとえば、Na、K、Cl、F、RCOO、Br等のイオン捕捉作用が認められるものが有効である。このようなイオン交換体としては、天然に産出されるゼオライト、沸石類、酸性白土、白雲石、ハイドロタルサイト類などの天然鉱物、人工的に合成された合成ゼオライトなどが例として挙げられる。 An inorganic ion exchanger may be added as a filler (C) that improves the electrical reliability of the semiconductor device. Examples of the inorganic ion exchanger include ions extracted into an aqueous solution when the cured resin paste is extracted in hot water, for example, ions such as Na + , K + , Cl , F , RCOO and Br −. Those having a capturing action are effective. Examples of such ion exchangers include naturally produced zeolites, natural minerals such as zeolites, acid clay, dolomite, hydrotalcites, and artificially synthesized synthetic zeolites.
 これら導電性フィラーまたは無機物質フィラーは、それぞれ2種以上を混合して用いることもできる。物性を損なわない範囲で、導電性フィラーの1種以上と無機物質フィラーの1種以上とを混合して用いてもよい。 These conductive fillers or inorganic fillers can be used in combination of two or more. As long as the physical properties are not impaired, one or more conductive fillers and one or more inorganic fillers may be mixed and used.
 フィラー(C)の含有量は、上記ポリマー(A)100質量部に対して、樹脂ペーストのチキソトロピー指数(1.5以上)を考慮すると、1重量部以上が好ましく、接着強度、硬化物の弾性率、ダイボンディング材の応力緩和能、及び半導体装置の実装信頼性を考慮すると、100質量部以下であることが好ましい。より好ましくは、2~50質量部であり、3~30質量部であることが特に好ましい。また、Bステージ化を比較的低温で行う場合は、その後のチップ加熱圧着時のダイボンディング層の濡れ広がりを抑制できる観点から、10質量部以上であることが好ましい。 The content of the filler (C) is preferably 1 part by weight or more when considering the thixotropy index (1.5 or more) of the resin paste with respect to 100 parts by weight of the polymer (A), and the adhesive strength and the elasticity of the cured product. In consideration of the rate, the stress relaxation ability of the die bonding material, and the mounting reliability of the semiconductor device, it is preferably 100 parts by mass or less. More preferably, it is 2 to 50 parts by mass, and particularly preferably 3 to 30 parts by mass. Moreover, when performing B-stage formation at a comparatively low temperature, it is preferable that it is 10 mass parts or more from a viewpoint which can suppress the wetting spread of the die-bonding layer at the time of subsequent chip | tip thermocompression bonding.
 フィラー(C)の混合・混練は、通常の攪拌機、らいかい機、三本ロール、ボールミルなどの分散機を適宜、組み合せて行う。 The mixing and kneading of the filler (C) is carried out by appropriately combining dispersers such as a normal stirrer, raky machine, three rolls, and ball mill.
[溶剤(D)]
 本発明の樹脂ペーストは、溶剤(D)を含有してもよい。溶剤(D)は、フィラーを均一に混練または分散できる有機溶剤の中から選択することが好ましい。印刷時の有機溶剤の揮散防止及びBステージ化における乾燥性を考慮して、沸点(大気圧)が100℃以上250℃未満の有機溶剤を選ぶことが好ましい。
[Solvent (D)]
The resin paste of the present invention may contain a solvent (D). The solvent (D) is preferably selected from organic solvents that can uniformly knead or disperse the filler. It is preferable to select an organic solvent having a boiling point (atmospheric pressure) of 100 ° C. or more and less than 250 ° C. in consideration of prevention of volatilization of the organic solvent at the time of printing and drying property in B-stage.
 このような有機溶剤としては、たとえば、N-メチル-2-ピロリジノン、ジエチレングリコールジメチルエーテル(ジグライムともいう)、トリエチレングリコールジメチルエーテル(トリグライムともいう)、ジエチレングリコールジエチルエーテル、2-(2-メトキシエトキシ)エタノール、γ-ブチロラクトン、イソホロン、カルビトール、カルビトールアセテート、1,3-ジメチル-2-イミダゾリジノン、酢酸2-(2-ブトキシエトキシ)エチル、エチルセロソルブ、エチルセロソルブアセテート、ブチルセロソルブ、ジオキサン、シクロヘキサノン、アニソール、石油蒸留物を主体とした溶剤などが挙げられる。これらは1種を単独で又は2種以上を組み合わせて用いられる。 Examples of such organic solvents include N-methyl-2-pyrrolidinone, diethylene glycol dimethyl ether (also referred to as diglyme), triethylene glycol dimethyl ether (also referred to as triglyme), diethylene glycol diethyl ether, 2- (2-methoxyethoxy) ethanol, γ-butyrolactone, isophorone, carbitol, carbitol acetate, 1,3-dimethyl-2-imidazolidinone, 2- (2-butoxyethoxy) ethyl acetate, ethyl cellosolve, ethyl cellosolve acetate, butyl cellosolve, dioxane, cyclohexanone, anisole And solvents mainly composed of petroleum distillates. These are used singly or in combination of two or more.
 これら溶剤の中でも特に、吸水性が低くいことから、カルビトールアセテートが特に好ましい。 Of these solvents, carbitol acetate is particularly preferred because of its low water absorption.
 溶剤(D)を用いる場合の含有量は、印刷性の観点から、ポリマー(A)100質量部に対して、5~200質量部であることが好ましく、10~100質量部であることがより好ましく、30~80質量部であることが特に好ましくい。 The content in the case of using the solvent (D) is preferably 5 to 200 parts by mass, more preferably 10 to 100 parts by mass with respect to 100 parts by mass of the polymer (A) from the viewpoint of printability. It is preferably 30 to 80 parts by mass.
 また、樹脂ペーストは、溶剤(D)を用いない場合、Bステージ化の工程を省く事が可能である。溶剤(D)を用いない場合は、印刷性の観点から、熱硬化性樹脂(B)が常温で液状であることが好ましい。 Also, when the resin paste does not use the solvent (D), it is possible to omit the B-stage process. When the solvent (D) is not used, it is preferable that the thermosetting resin (B) is liquid at room temperature from the viewpoint of printability.
[硬化促進剤(E)]
 本発明の樹脂ペーストは、硬化促進剤(E)を含有することが好ましい。硬化促進剤(E)は、熱硬化性樹脂(B)の硬化を促進させることできる。特に熱硬化性樹脂(B)としてエポキシ樹脂を用いる場合に特に有効である。
[Curing accelerator (E)]
The resin paste of the present invention preferably contains a curing accelerator (E). The curing accelerator (E) can accelerate the curing of the thermosetting resin (B). This is particularly effective when an epoxy resin is used as the thermosetting resin (B).
 硬化促進剤(E)としては、たとえば、イミダゾール類、ジシアンジアミド誘導体、ジカルボン酸ジヒドラジド、トリフェニルホスフィン、テトラフェニルホスホニウムテトラフェニルボレート、2-エチル-4-メチルイミダゾール-テトラフェニルボレート、1,8-ジアザビシクロ(5,4,0)ウンデセン-7-テトラフェニルボレート等が挙げられる。これらは、1種を単独で又は2種以上を組み合わせて用いてもよい。 Examples of the curing accelerator (E) include imidazoles, dicyandiamide derivatives, dicarboxylic acid dihydrazide, triphenylphosphine, tetraphenylphosphonium tetraphenylborate, 2-ethyl-4-methylimidazole-tetraphenylborate, 1,8-diazabicyclo. (5,4,0) undecene-7-tetraphenylborate and the like. You may use these individually by 1 type or in combination of 2 or more types.
 硬化促進剤(E)を用いる場合の含有量は、熱硬化性樹脂(B)100質量部に対し、0.01質量部以上が好ましく、樹脂ペーストの保管安定性を考慮すると20質量部以下であることが好ましい。より好ましくは0.1~10重量部で、0.5~5重量部であることが特に好ましい。 When the curing accelerator (E) is used, the content is preferably 0.01 parts by mass or more with respect to 100 parts by mass of the thermosetting resin (B), and is 20 parts by mass or less in consideration of storage stability of the resin paste. Preferably there is. More preferred is 0.1 to 10 parts by weight, and particularly preferred is 0.5 to 5 parts by weight.
[その他の成分]
 更に、本発明の樹脂ペーストには、必要に応じて、消泡剤、破泡剤、抑泡剤、シラン系カップリング剤、チタン系カップリング剤、ノニオン系界面活性剤、フッ素系界面活性剤、シリコーン系可塑剤等の各種添加剤を添加することもできる。
[Other ingredients]
Furthermore, the resin paste of the present invention includes an antifoaming agent, an antifoaming agent, an antifoaming agent, a silane coupling agent, a titanium coupling agent, a nonionic surfactant, and a fluorine surfactant as necessary. Various additives such as a silicone plasticizer can also be added.
 上記の各成分は、例えば、ハイビスディスパーミックス等の混練機を用いて、ブレード10rpmで10分間混合・撹拌することで樹脂ペーストを得ることができる。 Each of the above components can be mixed and stirred for 10 minutes at a blade of 10 rpm using, for example, a kneading machine such as a Hibis Disper mix to obtain a resin paste.
 樹脂ペーストの硬化後(180℃で1時間、厚さ100μmで硬化させた場合)の弾性率、すなわち樹脂ペースト硬化物の弾性率は、基板とチップのずれにくさ、及び組立作業性を考慮すると、1MPa以上が好ましく、基板とチップ間の応力緩和性及び半導体パッケージの耐温度サイクル性を考慮すると、300MPa以下が好ましい。 The elastic modulus after curing of the resin paste (when cured at 180 ° C. for 1 hour at a thickness of 100 μm), that is, the elastic modulus of the resin paste cured product, is considered to be difficult to shift between the substrate and the chip and the assembly workability. 1 MPa or more is preferable, and considering the stress relaxation property between the substrate and the chip and the temperature cycle resistance of the semiconductor package, 300 MPa or less is preferable.
 上記弾性率は、動的粘弾性測定装置にて乾燥硬化後の樹脂ペースト硬化物の貯蔵弾性率E’を測定したときの25℃の値とする。「乾燥硬化後」とは、樹脂成分を完全硬化させた後のことを意味し、例えば、樹脂ペーストを塗布し、Bステージ化したのち乾燥機等で180℃、1時間加熱することである。 The elastic modulus is a value of 25 ° C. when the storage elastic modulus E ′ of the cured resin paste after drying and curing is measured with a dynamic viscoelasticity measuring device. “After drying and curing” means after the resin component is completely cured, for example, by applying a resin paste, forming a B-stage, and then heating at 180 ° C. for 1 hour with a dryer or the like.
 さらに、樹脂ペーストの固形分濃度は、20~95重量%であることが好ましく、40~90重量%以上であることがより好ましく、60~80重量%であることが特に好ましい。上記固形分が20重量%以上であると、樹脂ペースト乾燥後の体積減少に基づく形状変化抑制の観点から好ましく、95重量%以下であると、樹脂ペーストの流動性および印刷作業性をより向上できる。 Further, the solid content concentration of the resin paste is preferably 20 to 95% by weight, more preferably 40 to 90% by weight or more, and particularly preferably 60 to 80% by weight. When the solid content is 20% by weight or more, it is preferable from the viewpoint of shape change suppression based on volume reduction after drying the resin paste, and when it is 95% by weight or less, the fluidity and printing workability of the resin paste can be further improved. .
 樹脂ペーストのチキソトロピー指数は、1.5~10.0であることが好ましく、2.0~7.0であることがより好ましく、3.0~5.0であることが特に好ましい。樹脂ペーストのチキソトロピー指数が1.5以上であると、印刷法によって供給・塗布された樹脂ペーストにおけるダレ等の発生を抑制して、印刷形状を良好に保つとの観点から好ましい。さらに、このチキソトロピー指数が10.0以下であると、印刷法によって供給・塗布された樹脂ペーストにおける「欠け」やカスレ等の発生抑制の観点から好ましい。 The thixotropy index of the resin paste is preferably 1.5 to 10.0, more preferably 2.0 to 7.0, and particularly preferably 3.0 to 5.0. When the thixotropy index of the resin paste is 1.5 or more, it is preferable from the viewpoint of suppressing the occurrence of sagging or the like in the resin paste supplied and applied by the printing method and maintaining a good printed shape. Further, the thixotropy index is preferably 10.0 or less from the viewpoint of suppressing the occurrence of “chips” and / or scum in the resin paste supplied and applied by the printing method.
 樹脂ペーストの粘度(25℃)は、5~1000Pa・sであることが好ましく、20~500であることがより好ましく、50~200Pa・sであることが特に好ましい。樹脂ペーストの粘度が5~1000Pa・sであると、印刷性の観点から好ましい。樹脂ペーストの粘度は、印刷法の種類により適宜調整することが好ましく、たとえば、スクリーンメッシュ版等のようにマスク開口部にメッシュ等が張ってある場合は、メッシュ部の抜け性を考慮して5~100Pa・sの範囲であることが好ましく、ステンシル版等の場合は20~500Pa・sの範囲に調整することが好ましい。また、Bステージ化におけるダイボンディング層に残存するボイドが多く見られる場合は、150Pa・s以下の粘度に調整することが好ましい。 The viscosity (25 ° C.) of the resin paste is preferably 5 to 1000 Pa · s, more preferably 20 to 500, and particularly preferably 50 to 200 Pa · s. The viscosity of the resin paste is preferably 5 to 1000 Pa · s from the viewpoint of printability. The viscosity of the resin paste is preferably adjusted as appropriate according to the type of printing method. For example, when a mesh or the like is stretched on the mask opening, such as a screen mesh plate, the viscosity of the mesh paste is taken into consideration. The range is preferably from 100 to 100 Pa · s. In the case of a stencil plate or the like, it is preferably adjusted to a range from 20 to 500 Pa · s. Moreover, when many voids remain in the die bonding layer in the B-stage formation, it is preferable to adjust the viscosity to 150 Pa · s or less.
 上記粘度は、E型回転粘度計を用いて、25℃で、回転数0.5rpmで測定したときの値とする。チキソトロピー指数は、E型回転粘度計で、25℃で、回転数0.5rpmで測定したときの値と、回転数5rpmで測定したときの値との比で定義する(チキソトロピー指数=0.5rpmでの粘度)/(5rpmでの粘度))。 The above viscosity is a value measured at 25 ° C. and a rotation speed of 0.5 rpm using an E-type viscometer. The thixotropy index is defined as a ratio of a value measured at 25 ° C. at a rotation speed of 0.5 rpm and a value measured at a rotation speed of 5 rpm with an E-type rotational viscometer (thixotropy index = 0.5 rpm). Viscosity) / (viscosity at 5 rpm)).
[半導体装置(半導体パッケージ)の製造]
 以下、半導体装置の製造方法について説明する。
[Manufacture of semiconductor devices (semiconductor packages)]
Hereinafter, a method for manufacturing a semiconductor device will be described.
 図1は、半導体装置の製造工程の一例を示す模式図である。 FIG. 1 is a schematic view showing an example of a manufacturing process of a semiconductor device.
 まず、本発明の樹脂ペーストを被印刷体に印刷する。被印刷体としては、42アロイリードフレームや銅リードフレーム等のリードフレーム;または、ポリイミド樹脂、エポキシ樹脂、ポリイミド系樹脂等のプラスチックフィルム;さらには、ガラス不織布等の基材にポリイミド樹脂、エポキシ樹脂、ポリイミド系樹脂等のプラスチックを含浸・硬化させたもの;あるいは、アルミナ等のセラミックス製などの絶縁性支持基板が挙げられる。印刷方法は、例えば、スクリーン印刷法が挙げられる。具体的には、図1(a)に示すように、基板101に、スキージ103を用いて、メタルマスク102を介して本願発明の樹脂ペースト104を塗布してもよい。 First, the resin paste of the present invention is printed on a substrate. Examples of printed materials include lead frames such as 42 alloy lead frames and copper lead frames; or plastic films such as polyimide resins, epoxy resins and polyimide resins; and polyimide resins and epoxy resins on substrates such as glass nonwoven fabrics. Insulating support substrate made of ceramics such as alumina, or impregnated / cured plastic such as polyimide resin. Examples of the printing method include a screen printing method. Specifically, as shown in FIG. 1A, a resin paste 104 of the present invention may be applied to a substrate 101 through a metal mask 102 using a squeegee 103.
 次に、塗布した樹脂ペーストを熱処理して溶剤を乾燥させ(Bステージ化)、Bステージ化したダイボンディング層を得る(図1(b))。それにより、Bステージ化状態の樹脂ペーストの層(以下、ダイボンディング層という)が形成された支持基板が得られる。Bステージ化させる温度としては、100~200℃が好ましく、120~180℃であることがより好ましい。Bステージ化させる時間は、作業効率の観点から120分以下が好ましく、溶剤(D)を用いる場合は揮発率を高くする観点から5分以上が好ましい。また、Bステージ化の条件としては、ダイボンディング層のクラックを防ぐ観点からは、室温からの昇温、及び室温への降温工程を10分以上かけ徐々に加熱、降温することが好ましい。 Next, the applied resin paste is heat treated to dry the solvent (B-stage), and a B-staged die bonding layer is obtained (FIG. 1B). Thereby, a support substrate on which a layer of a resin paste in a B-stage state (hereinafter referred to as a die bonding layer) is obtained. The temperature for forming the B stage is preferably 100 to 200 ° C, more preferably 120 to 180 ° C. The time for forming the B stage is preferably 120 minutes or less from the viewpoint of work efficiency, and when the solvent (D) is used, it is preferably 5 minutes or more from the viewpoint of increasing the volatility. Further, as a condition for forming the B stage, from the viewpoint of preventing cracks in the die bonding layer, it is preferable to gradually heat and lower the temperature rising from room temperature and the temperature lowering process to room temperature over 10 minutes.
 次に、このダイボンディング層が形成された支持基板に、IC、LSI等の半導体素子(チップ)を貼り付け、加熱してチップを支持基板に圧着する。図1(c)に示すように、熱源106上に載置したチップ107に、基板のダイボンディング層側を貼り付けてもよい。加熱温度は、有機基板等を用いる場合には、有機基板の耐熱性の観点から200℃以下が好ましく、接着強度の観点からは100~200℃であることが好ましい。 Next, a semiconductor element (chip) such as an IC or LSI is attached to the support substrate on which the die bonding layer is formed, and the chip is pressure-bonded to the support substrate by heating. As shown in FIG. 1C, the die bonding layer side of the substrate may be attached to a chip 107 placed on the heat source 106. When an organic substrate or the like is used, the heating temperature is preferably 200 ° C. or less from the viewpoint of heat resistance of the organic substrate, and preferably from 100 to 200 ° C. from the viewpoint of adhesive strength.
 次に、ダイボンディング層を後硬化される工程にて、硬化状態のダイボンディング層108が得られ、チップが支持基板に搭載される(図1(d))。ダイボンディング層の後硬化は、実装組立工程での問題がない場合は、封止材の後硬化工程の際に併せて行ってもよい。ここで言う実装組立工程での問題とは、チップと基板等の固定が不十分となりワイヤボンディングの工程の際、チップが振動してしまいワイヤボンディングで不具合が生じる、又は封止の工程の際はチップの基板上での固定不足であるため、チップ側面からの封止材の流れによってチップが剥がれてしまうことをいう。 Next, in a step of post-curing the die bonding layer, a cured die bonding layer 108 is obtained, and the chip is mounted on the support substrate (FIG. 1 (d)). If there is no problem in the mounting assembly process, the post-curing of the die bonding layer may be performed together with the post-curing process of the sealing material. The problem in the mounting assembly process mentioned here is that the chip and the substrate are not sufficiently fixed, and the chip vibrates during the wire bonding process, causing problems in the wire bonding, or in the sealing process. It means that the chip is peeled off due to the flow of the sealing material from the side surface of the chip because the chip is insufficiently fixed on the substrate.
 次に、基板とチップとをワイヤ109により電気的に接続してもよい(図1(e))。 Next, the substrate and the chip may be electrically connected by a wire 109 (FIG. 1 (e)).
 次に、金型内にチップが搭載された基板を配置し、押し出し機111により封止材112を金型110内に充填させて封止してもよい(図1(f))。 Next, the substrate on which the chip is mounted may be placed in the mold, and the mold 110 may be filled with the sealing material 112 by the extruder 111 and sealed (FIG. 1 (f)).
 本発明に係る半導体装置の製造方法は、以上の各工程を含んでいてもよく、本発明に係る半導体装置は、以上の各工程を含む製造方法により製造することができる。 The method for manufacturing a semiconductor device according to the present invention may include the above steps, and the semiconductor device according to the present invention can be manufactured by a manufacturing method including the above steps.
 図2は、本発明による半導体装置の一実施形態であるBOC型半導体装置の構造を示す模式的断面図である。BOC型半導体装置100は、中央部に窓を設けた基板2の一方の面にダイボンディング層4を介して半導体素子6が搭載され、基板2の半導体素子搭載面と反対面に配線パターン8、絶縁層10及び半田ボール12が形成され、半導体素子2の端子部(不図示)と配線パターン8とがワイヤ14によって接続され、さらに少なくともその接続部が樹脂等の封止材16によって封止された構造を有する。本発明による樹脂ペーストは、IC、LSI等の半導体素子(チップ)を加熱して貼り付ける工程において、100~200℃で接合可能であることから、有機基板を使用するBOC型半導体装置の製造において特に好適である。しかし、本発明による樹脂ペーストは、BOC型半導体装置の製造に限定されることなく、その他の構成を有する半導体装置(例えば、図3に示すリードフレーム型半導体装置)の製造においても好適に使用可能である。 FIG. 2 is a schematic cross-sectional view showing the structure of a BOC type semiconductor device which is an embodiment of the semiconductor device according to the present invention. In the BOC type semiconductor device 100, a semiconductor element 6 is mounted on one surface of a substrate 2 having a window at the center via a die bonding layer 4, and a wiring pattern 8 is formed on the opposite surface of the substrate 2 to the semiconductor element mounting surface. An insulating layer 10 and solder balls 12 are formed, terminal portions (not shown) of the semiconductor element 2 and the wiring pattern 8 are connected by wires 14, and at least the connecting portions are sealed by a sealing material 16 such as resin. Has a structure. Since the resin paste according to the present invention can be bonded at a temperature of 100 to 200 ° C. in a process of heating and bonding a semiconductor element (chip) such as an IC or LSI, in manufacturing a BOC type semiconductor device using an organic substrate. Particularly preferred. However, the resin paste according to the present invention is not limited to the manufacture of the BOC type semiconductor device, but can be suitably used in the manufacture of a semiconductor device having other configurations (for example, the lead frame type semiconductor device shown in FIG. 3). It is.
 図3のリードフレーム型半導体装置において、シリコンチップ201は樹脂ペースト202によりリードフレーム203に固定されており、シリコンチップ上のAlパッド204とリードフレーム上のAgめっき205とは金線206により電気的に接続している。
これらは封止樹脂207により封止されており、外部に突き出たリードフレームの端部には外部めっき208が施されている。
In the lead frame type semiconductor device of FIG. 3, the silicon chip 201 is fixed to the lead frame 203 with a resin paste 202, and the Al pad 204 on the silicon chip and the Ag plating 205 on the lead frame are electrically connected by a gold wire 206. Connected to.
These are sealed with a sealing resin 207, and external plating 208 is applied to the end of the lead frame protruding outward.
 上記樹脂ペーストは溶剤を含有しているが、半導体装置の製造方法に用いる際には、乾燥工程にてBステージ化することにより溶剤の大部分が揮発するため、ダイボンディング層にボイドの少ない、良好な実装信頼性をもつ半導体装置を組み立てることができる。 The resin paste contains a solvent, but when used in a method for manufacturing a semiconductor device, most of the solvent is volatilized by being B-staged in the drying process, so there are few voids in the die bonding layer. A semiconductor device having good mounting reliability can be assembled.
 一方、樹脂ペーストを印刷法によって塗布した後に、半導体パッケージ信頼性に影響が無ければ、Bステージ化させることなく半導体素子(チップ)を貼り付け、その後、加熱してチップを支持基板に接合することもできる。さらには封止剤の硬化工程を省くことも可能である。さらにはBステージ化と封止剤の硬化工程の両方も省く事が可能である。 On the other hand, if the reliability of the semiconductor package is not affected after the resin paste is applied by the printing method, the semiconductor element (chip) is pasted without using the B stage, and then the chip is bonded to the support substrate by heating. You can also. Furthermore, it is possible to omit the curing step of the sealant. Furthermore, it is possible to omit both the B-stage and the sealing agent curing step.
 したがって、別の本発明に係る半導体装置の製造方法は、基板上に所定量の上記樹脂ペーストを塗布し、樹脂ペーストにチップを搭載し、樹脂ペースト中の樹脂を硬化する各工程を含むものであり、別の本発明に係る半導体装置は、以上の各工程を含む製造方法により製造されるものである。 Therefore, another method for manufacturing a semiconductor device according to the present invention includes the steps of applying a predetermined amount of the resin paste on a substrate, mounting a chip on the resin paste, and curing the resin in the resin paste. In addition, another semiconductor device according to the present invention is manufactured by a manufacturing method including the above steps.
 以下、実施例により、本発明をさらに具体的に説明する。 Hereinafter, the present invention will be described more specifically with reference to examples.
(合成例1)
 成分(a1)としてCTBNX-1300×9(宇部興産株式会社製、カルボキシル基含有アクリロニトリルポリブタジエン共重合体の商品名、アクリロニトリルの含有量は約17重量%)を100重量部及び成分(a2)としてEXA-830CRP(DIC株式会社製、一般式(2)において、Xが-CH-であり、R及びRが水素原子であり、n及びmが4であるビスフェノールF型エポキシ化合物)を10重量部秤取しフラスコに加えた。(カルボン酸当量:エポキシ当量=1:1)これを145℃で加熱しながら1時間攪拌させ、ポリマー(A)として樹脂Aを得た。粘度450Pa・sであった。重量平均分子量(Mw)は25000であった。
(Synthesis Example 1)
100 parts by weight of CTBNX-1300 × 9 (manufactured by Ube Industries, Ltd., trade name of carboxyl group-containing acrylonitrile polybutadiene copolymer, content of acrylonitrile is about 17% by weight) as component (a1) and EXA as component (a2) -830CRP (manufactured by DIC Corporation, bisphenol F-type epoxy compound in which in general formula (2), X is —CH 2 —, R 1 and R 2 are hydrogen atoms, and n and m are 4) The weight part was weighed and added to the flask. (Carboxylic acid equivalent: Epoxy equivalent = 1: 1) This was stirred for 1 hour while heating at 145 ° C. to obtain Resin A as polymer (A). The viscosity was 450 Pa · s. The weight average molecular weight (Mw) was 25000.
(合成例2)
 撹拌時間を1時間から30分に変更した以外は、合成例1と同様にして樹脂Bを得た。粘度188Pa・sであった。重量平均分子量(Mw)は17000であった。
(Synthesis Example 2)
Resin B was obtained in the same manner as in Synthesis Example 1 except that the stirring time was changed from 1 hour to 30 minutes. The viscosity was 188 Pa · s. The weight average molecular weight (Mw) was 17000.
(合成例3)
 撹拌時間を1時間から1時間45分に変更した以外は、合成例1と同様にして樹脂Cを得た。粘度962Pa・sであった。重量平均分子量(Mw)は37000であった。
(Synthesis Example 3)
Resin C was obtained in the same manner as in Synthesis Example 1 except that the stirring time was changed from 1 hour to 1 hour 45 minutes. The viscosity was 962 Pa · s. The weight average molecular weight (Mw) was 37000.
(合成例4)
 成分(a2)であるEXA-830CRPの量を、10重量部から2.5重量部に変更した以外は、実施例1と同様にして樹脂Dを得た(カルボン酸当量:エポキシ当量=1:0.25)。粘度212Pa・sであった。重量平均分子量(Mw)は18700であった。
(Synthesis Example 4)
Resin D was obtained in the same manner as in Example 1 except that the amount of the component (a2) EXA-830CRP was changed from 10 parts by weight to 2.5 parts by weight (carboxylic acid equivalent: epoxy equivalent = 1: 0.25). The viscosity was 212 Pa · s. The weight average molecular weight (Mw) was 18,700.
(合成例5)
 成分(a2)であるEXA-830CRPを10重量部から100重量部に変更した以外は、実施例1と同様にして樹脂Eを得た(カルボン酸当量:エポキシ当量=1:10)。粘度472Pa・sであった。重量平均分子量(Mw)は23500であった。
(Synthesis Example 5)
Resin E was obtained in the same manner as in Example 1 except that EXA-830CRP (component (a2)) was changed from 10 parts by weight to 100 parts by weight (carboxylic acid equivalent: epoxy equivalent = 1: 10). The viscosity was 472 Pa · s. The weight average molecular weight (Mw) was 23500.
(合成例6)
 成分(a2)を、EXA-830CRP10重量部からR1710(ビスフェノールAD型、三井化学株式会社製)10重量部に変更した以外は、実施例1と同様にして樹脂Fを得た(カルボン酸当量:エポキシ当量=1:1)。粘度412Pa・sであった。重量平均分子量(Mw)は25000であった。
(Synthesis Example 6)
Resin F was obtained (carboxylic acid equivalent: Epoxy equivalent = 1: 1). The viscosity was 412 Pa · s. The weight average molecular weight (Mw) was 25000.
 粘度の測定方法は以下の通りである。 The measuring method of viscosity is as follows.
 東機産業株式会社製E型粘度計で直径19.4mm,3°コーンを用いて、25℃での樹脂ペーストの粘度を測定した(0.5rpm)。 The viscosity of the resin paste at 25 ° C. was measured using a 19.4 mm diameter, 3 ° cone with an E-type viscometer manufactured by Toki Sangyo Co., Ltd. (0.5 rpm).
 分子量の測定方法はGPCを用いて以下の条件で測定した。 The molecular weight was measured using GPC under the following conditions.
 機種:日立  L6000
 検出器:日立 L-3300 RI
 データ処理機:ATT
 カラム:Gelpack GL-R440+Gelpack GL-R450+Gelpack GL-R400M
 カラムサイズ:10.7mmφ×300mm
 溶媒:THF
 試料濃度:120mg/5ml
 注入量:200μl
 圧力:34kgf/cm
 流量:2.05ml/min
(実施例1)
 ポリマー(A)(ベース樹脂)として、樹脂Aを80重量部秤取し、これを混練機に入れた。ここに、熱硬化性樹脂(B)として、エポキシ樹脂(商品名:YDCN-700-7、東都化成株式会社社製)4.7重量部及びフェノール樹脂(商品名:TrisP-PA-MF、本州化学工業株式会社製)3.3重量部を、溶剤(D)であるカルビトールアセテート(CA)40重量部で溶解した溶液(熱硬化性樹脂の固形分濃度は約40重量%)と、硬化促進剤(商品名:TPPK、東京化成工業株式会社製)0.12重量部を加え、混合した。次に、フィラー(C)としてシリカ微粉末(商品名:アエロジル#50、日本アエロジル株式会社製)を15重量部、さらにカルビトールアセテート(CA)を11.4重量部加え1時間撹拌・混練し、樹脂ペーストを得た。実施例1で得られた樹脂ペーストの固形分濃度、粘度及びチキソトロピー指数を表2に示す。
Model: Hitachi L6000
Detector: Hitachi L-3300 RI
Data processor: ATT
Column: Gelpack GL-R440 + Gelpack GL-R450 + Gelpack GL-R400M
Column size: 10.7mmφ × 300mm
Solvent: THF
Sample concentration: 120 mg / 5 ml
Injection volume: 200 μl
Pressure: 34 kgf / cm 2
Flow rate: 2.05 ml / min
Example 1
As polymer (A) (base resin), 80 parts by weight of resin A was weighed and placed in a kneader. Here, 4.7 parts by weight of an epoxy resin (trade name: YDCN-700-7, manufactured by Toto Kasei Co., Ltd.) and a phenol resin (trade name: TrisP-PA-MF, Honshu) are used as the thermosetting resin (B). (Chemical Industry Co., Ltd.) 3.3 parts by weight dissolved in 40 parts by weight of carbitol acetate (CA) as solvent (D) (solid content concentration of thermosetting resin is about 40% by weight) and curing An accelerator (trade name: TPPK, manufactured by Tokyo Chemical Industry Co., Ltd.) 0.12 parts by weight was added and mixed. Next, 15 parts by weight of silica fine powder (trade name: Aerosil # 50, manufactured by Nippon Aerosil Co., Ltd.) and 11.4 parts by weight of carbitol acetate (CA) are added as filler (C), and the mixture is stirred and kneaded for 1 hour. A resin paste was obtained. Table 2 shows the solid content concentration, viscosity, and thixotropy index of the resin paste obtained in Example 1.
(実施例2~7、比較例1)
 ベース樹脂、硬化促進剤、フィラーの種類および含有量を表1のように替えた以外は、実施例1と同様にして樹脂ペーストを得た。実施例2~7及び比較例1で得られた樹脂ペーストの固形分濃度、粘度及びチキソトロピー指数を表2に示す。
(Examples 2 to 7, Comparative Example 1)
A resin paste was obtained in the same manner as in Example 1 except that the types and contents of the base resin, the curing accelerator, and the filler were changed as shown in Table 1. Table 2 shows the solid content concentration, viscosity, and thixotropy index of the resin pastes obtained in Examples 2 to 7 and Comparative Example 1.
[接着強度]
 実施例1~7、及び比較例1の樹脂ペーストを、42アロイリードフレーム上に100μm厚で印刷した。次に、Bステージ化温度を135℃に設定してBステージ化した。Bステージ化条件としては、熱風乾燥機で40℃から135℃まで30分間で昇温し、135℃で30分間乾燥後、135℃から40℃まで30分間で降温させることによって、Bステージ化状態の塗膜(ダイボンディング層)を形成した。その後、ダイボンディング層上に5×5mmのシリコンチップ(厚さ0.5mm)を140℃の熱盤上で5kgの荷重を掛けて1秒間圧着させた。これを、自動接着力試験機(商品名:serie-4000、デイジ社製)を用い、180℃におけるせん断強さ(kgf/チップ)を測定した。
[Adhesive strength]
The resin pastes of Examples 1 to 7 and Comparative Example 1 were printed on a 42 alloy lead frame with a thickness of 100 μm. Next, the B stage was set to 135 ° C. to form a B stage. The B-stage condition is that the temperature is raised from 40 ° C. to 135 ° C. in 30 minutes with a hot air dryer, dried at 135 ° C. for 30 minutes, and then lowered from 135 ° C. to 40 ° C. in 30 minutes. A coating film (die bonding layer) was formed. Thereafter, a 5 × 5 mm silicon chip (thickness: 0.5 mm) was pressure-bonded on the die bonding layer for 1 second on a 140 ° C. heating plate with a load of 5 kg. The shear strength (kgf / chip) at 180 ° C. was measured using an automatic adhesive strength tester (trade name: series-4000, manufactured by Daisy).
 また、Bステージ化の設定温度を140℃、145℃、150℃、155℃、160℃、165℃及び170℃に変更した条件で、実施例1~7、及び比較例1の樹脂ペーストそれぞれについて180℃におけるせん断強さ(kgf/チップ)を測定した。結果を表3に示す。 Also, each of the resin pastes of Examples 1 to 7 and Comparative Example 1 was performed under the condition that the set temperature for the B stage was changed to 140 ° C., 145 ° C., 150 ° C., 155 ° C., 160 ° C., 165 ° C. and 170 ° C. The shear strength (kgf / chip) at 180 ° C. was measured. The results are shown in Table 3.
[ボイド]
 実施例1~7、及び比較例1の樹脂ペーストを、42アロイリードフレーム上に3mm×10mm、厚さ100μmで印刷した。次ぎに、Bステージ化温度を135℃に設定してBステージ化した。Bステージ化条件としては、熱風乾燥機で40℃から135℃まで30分間で昇温し、135℃で30分間乾燥後、135℃から40℃まで30分間で降温させることによって、Bステージ化状態の塗膜(ダイボンディング層)を形成した。その後、ダイボンディング層上に透明なガラスプレートを、140℃の熱盤上で5kgの荷重を掛けて1秒間圧着させた。これを、180℃、4MPaで90秒間の条件で加熱圧着させて、以下の基準によりボイドを目視で評価した。
[void]
The resin pastes of Examples 1 to 7 and Comparative Example 1 were printed on a 42 alloy lead frame at 3 mm × 10 mm and a thickness of 100 μm. Next, the B stage was set to 135 ° C. to make a B stage. The B-stage condition is that the temperature is raised from 40 ° C. to 135 ° C. in 30 minutes with a hot air dryer, dried at 135 ° C. for 30 minutes, and then lowered from 135 ° C. to 40 ° C. in 30 minutes. A coating film (die bonding layer) was formed. Thereafter, a transparent glass plate was pressure-bonded on the die bonding layer for 1 second on a 140 ° C. heating plate with a load of 5 kg. This was heat-pressed under conditions of 180 ° C. and 4 MPa for 90 seconds, and voids were visually evaluated according to the following criteria.
 また、Bステージ化の設定温度を140℃、145℃、150℃、155℃、160℃、165℃及び170℃に変更した条件で、実施例1~7、及び比較例1の樹脂ペーストそれぞれについても同様にボイドを目視で評価した。結果を表3に示す。 Also, each of the resin pastes of Examples 1 to 7 and Comparative Example 1 was performed under the condition that the set temperature for the B stage was changed to 140 ° C., 145 ° C., 150 ° C., 155 ° C., 160 ° C., 165 ° C. and 170 ° C. Similarly, the voids were visually evaluated. The results are shown in Table 3.
 A:ダイボンディング層とガラス基板の接着面積に対して、ボイド面積が5%未満
 B:ダイボンディング層とガラス基板の接着面積に対して、ボイド面積が5%以上
[Bステージ化温度裕度]
 接着強度が0.1MPa以上で、且つ、ボイドの評価が「A」となるBステージ化温度範囲をBステージ化温度裕度とした。結果を表3に示す。Bステージ化温度裕度が大きい程優れることを意味する。
A: Void area is less than 5% with respect to the bonding area between the die bonding layer and the glass substrate. B: Void area is 5% or more with respect to the bonding area between the die bonding layer and the glass substrate.
A B-staging temperature range in which the adhesive strength was 0.1 MPa or more and the void evaluation was “A” was defined as the B-staging temperature tolerance. The results are shown in Table 3. It means that it is excellent, so that B stage-izing temperature tolerance is large.
 通常、接着強度が0.1MPa以上であれば、後硬化の工程を省いても以降の組立工程、すなわち、ワイヤボンディングと封止が可能である。 Usually, if the adhesive strength is 0.1 MPa or more, the subsequent assembly process, that is, wire bonding and sealing can be performed even if the post-curing process is omitted.
 [250℃における熱時ダイシェア強度]
 樹脂ペーストを42アロイリードフレーム上に100μmm厚で印刷し、熱風乾燥機で40℃から160℃まで30分間で昇温し、160℃で30分間、160℃から40℃まで30分間で降温させることによって乾燥し、Bステージ化状態の塗膜(ダイボンディング層)を形成した。その後、ダイボンディング層上に5×5mmのシリコンチップ(厚さ0.5mm)を140℃の熱盤上で5kgの荷重を掛けて1秒間圧着させた。次いで、180℃の熱風乾燥機で60分間加熱し、後硬化させた。これを、自動接着力試験機(商品名:serie-4000、デイジ社製)を用い、250℃におけるせん断強さ(kgf/チップ)を測定し、250℃における熱時ダイシェア強度とした。
[Die shear strength when heated at 250 ° C]
The resin paste is printed on a 42 alloy lead frame with a thickness of 100 μm, and the temperature is increased from 40 ° C. to 160 ° C. in 30 minutes by a hot air dryer, and the temperature is decreased from 160 ° C. for 30 minutes and from 160 ° C. to 40 ° C. for 30 minutes. Was dried to form a B-staged coating film (die bonding layer). Thereafter, a 5 × 5 mm silicon chip (thickness: 0.5 mm) was pressure-bonded on the die bonding layer for 1 second on a 140 ° C. heating plate with a load of 5 kg. Subsequently, it was heated for 60 minutes with a hot air dryer at 180 ° C. and post-cured. This was measured for shear strength (kgf / chip) at 250 ° C. using an automatic adhesive strength tester (trade name: series-4000, manufactured by Daisy) to obtain a hot die shear strength at 250 ° C.
結果を表3に示す。 The results are shown in Table 3.
[耐リフロー性評価]
 ソルダーレジスト(商品名:AUS-308、太陽インキ製造(株)社製)が塗布された有機基板上に、印刷機とメタルマスク(マスク形状9.0×4.0×120um×2箇所)を用い、実施例1~7及び比較例1の樹脂ペーストをそれぞれ印刷した。次に、実施例1~7及び比較例1の樹脂ペーストを印刷したそれぞれの有機基板において、熱風乾燥機により40℃からBステージ化温度裕度における最下限温度(例えば、実施例1の樹脂ペーストでは155℃)まで30分間で昇温し、Bステージ化温度裕度における最下限温度で30分間保持し、その後40℃まで30分間で降温させることによって乾燥し、Bステージ化状態の塗膜(ダイボンディング層)を形成した。次に、ダイボンディング層上に熱酸化膜付きシリコンチップ(8.8mm×8.8mm×280umt)を日立製作所製チップマウンタ(CM-110)を用いて140℃の熱盤上で6kgの荷重を掛けて1秒間圧着して評価用パッケージ基板を作成した。得られたそれぞれの評価用パッケージ基板を、トランスファ成形機(藤和精機製トランスファプレス)を用いて封止した(封止剤;商品名:CEL-9240HF-SI(日立化成工業(株)製、)封止条件;金型温度:180℃、圧力:6.9MPa、成形時間:90秒間)。その後、175℃の熱風乾燥機中で5時間、封止材を加熱硬化して、10.1mm×12.2mm×1.0mmtの評価用BOCパッケージを得た。
[Reflow resistance evaluation]
A printing machine and a metal mask (mask shape 9.0 × 4.0 × 120 um × 2 locations) are placed on an organic substrate on which a solder resist (trade name: AUS-308, manufactured by Taiyo Ink Manufacturing Co., Ltd.) is applied. The resin pastes of Examples 1 to 7 and Comparative Example 1 were respectively printed. Next, in each organic substrate on which the resin pastes of Examples 1 to 7 and Comparative Example 1 were printed, the lowest temperature in the B-stage temperature tolerance from 40 ° C. (for example, the resin paste of Example 1) using a hot air dryer The temperature is increased to 155 ° C. for 30 minutes, held at the lowest temperature limit for B-stage formation temperature tolerance for 30 minutes, and then dried by lowering the temperature to 40 ° C. for 30 minutes. Die bonding layer) was formed. Next, a silicon chip with a thermal oxide film (8.8 mm × 8.8 mm × 280 umt) is placed on the die bonding layer with a load of 6 kg on a 140 ° C. hot platen using a Hitachi chip mounter (CM-110). The package substrate for evaluation was prepared by applying for 1 second. Each of the obtained package substrates for evaluation was sealed using a transfer molding machine (transfer press manufactured by Towa Seiki Co., Ltd.) (sealing agent; product name: CEL-9240HF-SI (manufactured by Hitachi Chemical Co., Ltd.)) Sealing conditions; mold temperature: 180 ° C., pressure: 6.9 MPa, molding time: 90 seconds). Thereafter, the sealing material was heated and cured in a hot air dryer at 175 ° C. for 5 hours to obtain a BOC package for evaluation of 10.1 mm × 12.2 mm × 1.0 mmt.
 得られた評価用BOCパッケージを、それぞれ、85℃/85%RH/168時間、及び85℃/60%RH/168時間の条件で吸湿処理した後、評価用BOCパッケージの最高表面温度が260℃に達するように設定したIRリフロー炉(TAMURA製)に3回繰り返して通した。次に、その評価用BOCパッケージについて、超音波探査映像装置(SAT:Scanning Automatic Tomogragh 日立製作所製 HYE-FOCUS)を用いて、ダイボンディング層の剥がれ又は気泡の有無を目視で確認し、以下の基準で耐リフロー性を評価した。結果を表3に示す。 The obtained evaluation BOC package was subjected to moisture absorption under the conditions of 85 ° C./85% RH / 168 hours and 85 ° C./60% RH / 168 hours, respectively, and then the maximum surface temperature of the evaluation BOC package was 260 ° C. And passed through an IR reflow furnace (made by TAMURA) set to reach 3 times. Next, for the evaluation BOC package, using an ultrasonic exploration imaging apparatus (SAT: Scanning Automatic Tomography, HYE-FOCUS manufactured by Hitachi, Ltd.), the presence or absence of peeling of the die bonding layer or bubbles is visually confirmed. The reflow resistance was evaluated. The results are shown in Table 3.
 Level1;85℃/85%RH/168時間、及び85℃/60%RH/168時間のどちらの条件でも、ダイボンディング層の剥がれ又は気泡無し。 Level 1: No peeling of the die-bonding layer or bubbles in both conditions of 85 ° C./85% RH / 168 hours and 85 ° C./60% RH / 168 hours.
 Level2;85℃/60%RH/168時間の条件ではダイボンディング層の剥がれ又は気泡は無いが、85℃/85%RH/168時間の条件ではダイボンディング層の剥がれ又は気泡有り。 Level 2: There is no peeling or bubbles of the die bonding layer under the conditions of 85 ° C./60% RH / 168 hours, but there is peeling or bubbles of the die bonding layers under the conditions of 85 ° C./85% RH / 168 hours.
 Level1はLevel2より耐リフロー性に優れることを意味する。
Figure JPOXMLDOC01-appb-T000004
Figure JPOXMLDOC01-appb-T000005
Level 1 means better reflow resistance than Level 2.
Figure JPOXMLDOC01-appb-T000004
Figure JPOXMLDOC01-appb-T000005
 表1において、種々の記号は下記の意味である。 In Table 1, various symbols have the following meanings.
YDCN-700-7:東都化成株式会社、クレゾールノボラック型エポキシ樹脂(エポキシ当量:197-207g/eq)
TrisP-PA:本州化学工業株式会社、(4-〔4-[1,1-ビス(4-ヒドロキシフェニル)エチル]-α,α-ジメチルベンジル〕フェノール)
TPPK:東京化成工業株式会社、テトラフェニルホスホニウムテトラフェニルボラート2P4MHZ:四国化成工業株式会社、(2-フェニル-4-メチル-5-ヒドロキシメチルイミダゾール)
アエロジル#50:日本アエロジル株式会社、(シリカの微粉末、平均粒径0.03μm)
CA:カルビトールアセテート
Figure JPOXMLDOC01-appb-T000006
YDCN-700-7: Toto Kasei Co., Ltd., cresol novolac type epoxy resin (epoxy equivalent: 197-207 g / eq)
TrisP-PA: Honshu Chemical Industry Co., Ltd. (4- [4- [1,1-bis (4-hydroxyphenyl) ethyl] -α, α-dimethylbenzyl] phenol)
TPPK: Tokyo Chemical Industry Co., Ltd., Tetraphenylphosphonium Tetraphenylborate 2P4MHZ: Shikoku Chemical Industry Co., Ltd. (2-phenyl-4-methyl-5-hydroxymethylimidazole)
Aerosil # 50: Nippon Aerosil Co., Ltd. (silica fine powder, average particle size 0.03 μm)
CA: carbitol acetate
Figure JPOXMLDOC01-appb-T000006
 本発明のダイボンディング用樹脂ペーストは、Bステージ化において、広い温度範囲でチップとの接着強度に優れると共に、チップとの間のボイドも低減でき、且つ、半田リフロー工程においても熱時ダイシェア強度及び耐リフロー性が優れている。 The resin paste for die bonding of the present invention is excellent in adhesive strength with a chip in a wide temperature range in B-stage, and can reduce voids between the chips, and in the solder reflow process, Excellent reflow resistance.
 本発明により、比較的低い温度で半導体チップを貼り付ける必要がある基板に対して、印刷法によって容易に供給・塗布できるダイボンディング用樹脂ペーストを提供できる。 According to the present invention, it is possible to provide a die bonding resin paste that can be easily supplied and applied by a printing method to a substrate on which a semiconductor chip needs to be attached at a relatively low temperature.
 既に述べられたもの以外に、本発明の新規かつ有利な特徴から外れることなく、上記の実施形態に様々な修正や変更を加えてもよいことに注意すべきである。したがって、そのような全ての修正や変更は、添付の請求の範囲に含まれることが意図されている。 It should be noted that various modifications and changes may be made to the above-described embodiments without departing from the novel and advantageous features of the present invention other than those already described. Accordingly, all such modifications and changes are intended to be included within the scope of the appended claims.
 2 基板
 4 ダイボンディング層
 6 半導体チップ
 8 配線パターン
 10 絶縁層
 12 はんだボール
 14 ワイヤ
 16 封止材
 100 半導体装置
 101 基板
 102 メタルマスク
 103 スキージ
 104 ダイボンディング用樹脂ペースト
 105 ダイボンディング層(Bステージ化状態)
 106 熱源
 107 チップ
 108 ダイボンディング層(完全硬化状態)
 109 ワイヤ
 110 金型
 111 押し出し機
 112 封止材
 201 シリコンチップ
 202 ダイボンディング用樹脂ペースト
 203 リードフレーム
 204 Alパッド
 205 Agめっき
 206 金線
 207 封止樹脂
 208 外部めっき
2 Substrate 4 Die Bonding Layer 6 Semiconductor Chip 8 Wiring Pattern 10 Insulating Layer 12 Solder Ball 14 Wire 16 Sealing Material 100 Semiconductor Device 101 Substrate 102 Metal Mask 103 Squeegee 104 Resin Paste for Die Bonding 105 Die Bonding Layer (B Stage)
106 Heat source 107 Chip 108 Die bonding layer (fully cured)
109 Wire 110 Mold 111 Extruder 112 Sealing Material 201 Silicon Chip 202 Resin Paste for Die Bonding 203 Lead Frame 204 Al Pad 205 Ag Plating 206 Gold Wire 207 Sealing Resin 208 External Plating

Claims (8)

  1.  カルボキシル基を有するブタジエンのポリマー(a1)とエポキシ基を有する化合物(a2)を反応させて得られるポリマー(A)、熱硬化性樹脂(B)及びフィラー(C)を含む、ダイボンディング用樹脂ペースト。 Resin paste for die bonding comprising a polymer (A) obtained by reacting a carboxyl group-containing butadiene polymer (a1) and an epoxy group-containing compound (a2), a thermosetting resin (B) and a filler (C) .
  2.  さらに溶剤(D)を含む請求項1に記載のダイボンディング用樹脂ペースト。 The resin paste for die bonding according to claim 1, further comprising a solvent (D).
  3.  さらに硬化促進剤(E)を含む請求項1に記載のダイボンディング用樹脂ペースト。 The resin paste for die bonding according to claim 1, further comprising a curing accelerator (E).
  4.  前記カルボキシル基を有するブタジエンのポリマー(a1)とエポキシ基を有する化合物(a2)を反応させて得られるポリマー(A)の重量平均分子量が、15,000~70,000である請求項1に記載のダイボンディング用樹脂ペースト。 The weight average molecular weight of the polymer (A) obtained by reacting the carboxyl group-containing butadiene polymer (a1) and the epoxy group-containing compound (a2) is 15,000 to 70,000. Resin paste for die bonding.
  5.  (1)基板上に、請求項1~3のいずれか一項に記載のダイボンディング用樹脂ペーストを塗布する工程、(2)前記樹脂ペーストをBステージ化する工程、(3)Bステージ化した前記樹脂ペーストに半導体チップを搭載する工程と、を含む半導体装置の製造方法。 (1) A step of applying the resin paste for die bonding according to any one of claims 1 to 3 on a substrate, (2) a step of forming the resin paste into a B stage, and (3) forming a B stage. Mounting a semiconductor chip on the resin paste.
  6.  請求項5に記載の半導体装置の製造方法により得られる半導体装置。 A semiconductor device obtained by the method for manufacturing a semiconductor device according to claim 5.
  7.  (1)基板上に、請求項1~3のいずれか一項に記載のダイボンディング用樹脂ペーストを塗布する工程、(2)前記樹脂ペーストに半導体チップを搭載する工程、(3)前記半導体チップを封止剤により封止する工程と、を含む半導体装置の製造方法。 (1) A step of applying the resin paste for die bonding according to any one of claims 1 to 3 on a substrate, (2) a step of mounting a semiconductor chip on the resin paste, (3) the semiconductor chip And a step of sealing the substrate with a sealing agent.
  8.  請求項7に記載の半導体装置の製造方法により得られる半導体装置。 A semiconductor device obtained by the method for manufacturing a semiconductor device according to claim 7.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018172695A (en) * 2016-06-02 2018-11-08 日立化成株式会社 Resin composition and method for producing laminate
US11024598B2 (en) 2016-08-22 2021-06-01 Senju Metal Industry Co., Ltd. Metallic sintered bonding body and die bonding method

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US11236227B2 (en) 2015-06-29 2022-02-01 Tatsuta Electric Wire & Cable Co., Ltd. Heat dissipation material adhering composition, heat dissipation material having adhesive, inlay substrate, and method for manufacturing same
US9704820B1 (en) * 2016-02-26 2017-07-11 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor manufacturing method and associated semiconductor manufacturing system
CN107541168A (en) * 2017-07-31 2018-01-05 常州聚盛节能工程有限公司 A kind of construction structure glue and preparation method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002526618A (en) * 1998-10-06 2002-08-20 ヘンケル・テロソン・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Impact resistant epoxy resin composition
JP2009019171A (en) * 2007-07-13 2009-01-29 Kyocera Chemical Corp Die bonding paste

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20090075736A (en) * 2000-02-15 2009-07-08 히다치 가세고교 가부시끼가이샤 Adhesive Composition, Process for Producing the Same, Adhesive Film Made with the Same, Substrate for Semiconductor Mounting, and Semiconductor Device
JP2005281673A (en) * 2004-03-02 2005-10-13 Tamura Kaken Co Ltd Thermosetting resin composition, resin film and product

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002526618A (en) * 1998-10-06 2002-08-20 ヘンケル・テロソン・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Impact resistant epoxy resin composition
JP2009019171A (en) * 2007-07-13 2009-01-29 Kyocera Chemical Corp Die bonding paste

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018172695A (en) * 2016-06-02 2018-11-08 日立化成株式会社 Resin composition and method for producing laminate
US11024598B2 (en) 2016-08-22 2021-06-01 Senju Metal Industry Co., Ltd. Metallic sintered bonding body and die bonding method

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