WO2010095167A1

WO2010095167A1 - Test apparatus, calibration method and program

Info

Publication number: WO2010095167A1
Application number: PCT/JP2009/000646
Authority: WO
Inventors: 松原康夫
Original assignee: 株式会社アドバンテスト
Priority date: 2009-02-17
Filing date: 2009-02-17
Publication date: 2010-08-26
Also published as: TW201037332A

Abstract

Provided is a test apparatus that tests devices to be tested, and that is provided with a first terminal group and a second terminal group that have multiple signal I/O parts, each of which outputs a signal to a terminal of a tested device and to which a signal output from the terminal is input, a measurement part that measures the difference in signal I/O reference phases for each pair of the first terminal group signal I/O parts and the second terminal group signal I/O parts connected to each other when the respective signal I/O parts of the first terminal group and the respective signal I/O parts of the second terminal group are connected to each other, and an adjustment part that brings the reference phases close to each other based on the difference in reference phases for each pair of first terminal group signal I/O parts and second terminal group signal I/O parts connected to each other.

Description

Test apparatus, calibration method and program

The present invention relates to a test apparatus, a calibration method, and a program for testing a device under test.

The test apparatus outputs a test signal having a designated waveform at a timing delayed by a designated time from the reference phase for each test cycle. In addition, the test apparatus acquires the value of the response signal from the device under test at a timing delayed by a specified time from the reference phase. The test apparatus also includes a large number of signal input / output units that exchange signals with the device under test. The plurality of signal input / output units are adjusted prior to the test so that their reference phases coincide with each other (Patent Document 1).
International Publication No. 2007/072738 Pamphlet

By the way, a plurality of signal input / output units are provided distributed on a plurality of substrates. The phase difference in the reference phase between the two signal input / output units is based on differences in physical conditions (for example, temperature conditions, transmission paths, relay connector fitting conditions, power supply voltage conditions, etc.) for each board. The case where the substrates are different tends to be larger than the case of. Therefore, it is preferable that the test apparatus can reduce the phase difference between the substrates by simple processing when adjusting the reference phase in each signal input / output unit.

In order to solve the above problems, in the first aspect of the present invention, a test apparatus for testing a device under test, each of which outputs a signal to a terminal of the device under test and is output from the terminal. A first terminal group and a second terminal group having a plurality of signal input / output units for inputting signals; the signal input / output units of each of the first terminal groups; and the signal input / output units of each of the second terminal groups. With respect to each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other, a difference in reference phase for inputting / outputting a signal is obtained. For each pair of the measurement unit to be measured and the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other, the base Providing a test device comprising an adjustment unit for the reference phase based on the difference of the phase closer to each other, the.

According to a second aspect of the present invention, there is provided a calibration method for calibrating a test apparatus for testing a device under test, wherein each of the test apparatuses outputs a signal to a terminal of the device under test and outputs from the terminal. A first terminal group and a second terminal group each having a plurality of signal input / output units for inputting the received signals, each of the signal input / output units of the first terminal group and each of the signals of the second terminal group A reference phase for inputting / outputting a signal for each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other in a state where the input / output unit is connected to each other. For each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other, To provide a calibration method close to each other the reference phase based on the difference between the quasi-phase.

According to a third aspect of the present invention, there is provided a program for causing a computer to function as a calibration apparatus that calibrates a test apparatus that tests a device under test, each of which sends a signal to a terminal of the device under test. A first terminal group and a second terminal group having a plurality of signal input / output units for outputting and inputting signals output from the terminals, and the computer is connected to each of the signal input / output units of the first terminal group. The signal input / output units of the first terminal group and the signal input / output units of the second terminal group connected to each other in a state where the signal input / output units of the second terminal group are connected to each other. For each pair, a measurement unit for measuring a difference between reference phases for inputting and outputting signals, and the signal input of the first terminal group connected to each other. For each pair of the force unit and the signal output portion of the second terminal group, and the reference phase adjusting unit close to each other the reference phase based on the difference of, providing a program for causing to function.

Note that the above summary of the invention does not enumerate all the necessary features of the present invention, and sub-combinations of these feature groups can also be the invention.

FIG. 1 shows a configuration of a test apparatus 10 according to the present embodiment. FIG. 2 shows an example of the configuration of the signal input / output unit 30. FIG. 3 shows an example of the configuration of the calibration unit 50. 4 shows the reference phase distribution A of the signal input / output units 30 belonging to the first terminal group 21, the reference phase distribution B of the signal input / output units 30 belonging to the second terminal group 22, and the average value of the reference phases. Distribution A and distribution B after matching are shown. FIG. 5 shows the distribution A and the distribution B after the average value of the reference phase is matched between the terminal groups, and after the reference phase is further adjusted from the state where the average value of the reference phase is substantially matched between the terminal groups. 2 shows a reference phase distribution C in which the first terminal group 21 and the second terminal group 22 are combined. FIG. 6 shows a flowchart of the calibration process of the test apparatus 10 according to the present embodiment. FIG. 7 shows a configuration of a test apparatus 10 according to a modification of the present embodiment. 2 shows an exemplary hardware configuration of a computer 1900 according to an embodiment of the present invention.

Hereinafter, the (1) aspect of the present invention will be described through embodiments of the invention. However, the following embodiments do not limit the invention according to the scope of claims, and the features described in the embodiments are as follows. Not all combinations are essential for the solution of the invention.

FIG. 1 shows a configuration of a test apparatus 10 according to the present embodiment. The test apparatus 10 tests a device under test such as a semiconductor device.

The test apparatus 10 is mounted with a device under test by a handler device or the like when testing the device under test. Further, the test apparatus 10 calibrates the test apparatus 10 prior to the test.

The test apparatus 10 includes a first terminal group 21, a second terminal group 22, and a control apparatus 24. Each of the first terminal group 21 and the second terminal group 22 includes a plurality of signal input / output units 30, a group register 34, and a plurality of terminal registers 36.

The plurality of signal input / output units 30 each output a signal to the terminal of the device under test. Further, each of the plurality of signal input / output units 30 inputs a signal output from the corresponding terminal of the device under test, and determines whether or not the logical value of the input signal matches the expected value.

The group register 34 stores an offset delay amount for collectively shifting the reference phase in the plurality of signal input / output units 30 in units of the terminal group. Here, the reference phase represents a reference phase for controlling the generation timing of the signal to be transmitted to the device under test and the acquisition timing of the logical value of the signal received from the device under test to the designated phase.

The plurality of terminal registers 36 are provided in one-to-one correspondence with the plurality of signal input / output units 30. Each terminal register 36 stores an offset delay amount for individually shifting the reference phase in the corresponding signal input / output unit 30.

In such a first terminal group 21, for example, each member is provided on one substrate. In the second terminal group 22, for example, each member is provided on a substrate different from the first terminal group 21. Further, the test apparatus 10 may be configured to include one or a plurality of other terminal groups having the same configuration as the first terminal group 21 and the second terminal group 22.

In the present embodiment, the test apparatus 10 includes a calibration connection unit 200 that connects the signal input / output units 30 of the first terminal group 21 and the signal input / output units 30 of the second terminal group 22 to each other. Is provided. In the present embodiment, the calibration connection unit 200 connects the signal input / output units 30 of the first terminal group 21 and the signal input / output units 30 of the second terminal group 22 on a one-to-one basis. It is a calibration board.

The control device 24 is a control computer that controls the first terminal group 21 and the second terminal group 22 via a bus or the like. The control device 24 includes a test unit 48 and a calibration unit 50.

The test unit 48 is a functional block realized by the control device 24 executing a program. The test unit 48 causes each of the first terminal group 21 and the second terminal group 22 to execute a test sequence that specifies the waveform of the test signal and the expected value of the response signal. Thus, the first terminal group 21 and the second terminal group 22 supply a test signal corresponding to the test sequence to the device under test, compare the response signal from the device under test with the expected value, and select the device under test. Can be tested.

The calibration unit 50 is a functional block realized by the control device 24 executing a program. The calibration unit 50 includes a measurement unit 52 and an adjustment unit 54.

The measuring unit 52 is connected to each other in the state where the signal input / output units 30 of the first terminal group 21 and the signal input / output units 30 of the second terminal group 22 are connected to each other. For each pair of the signal input / output unit 30 and the signal input / output unit 30 of the second terminal group 22, the difference in the reference phase for inputting and outputting the signal is measured. As an example, the measurement unit 52 includes a calibration sequence for each of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 with the calibration connection unit 200 mounted. To measure the difference between the reference phases for inputting and outputting signals for each pair.

The adjusting unit 54 brings the reference phase closer to each other based on the difference in the reference phase for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. As an example, the adjustment unit 54 writes the offset delay amount to the group register 34 and the terminal register 36 of the first terminal group 21 and the second terminal group 22, respectively, so that the reference phases of the pairs are brought closer to each other. adjust.

For example, the adjustment unit 54 reduces the difference between the average of the reference phases of the signal input / output units 30 belonging to the first terminal group 21 and the average of the reference phases of the signal input / output units 30 belonging to the second terminal group 22. In addition, the difference in the reference phase is reduced for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other.

In this case, for example, the adjustment unit 54 approximately sets the average of the reference phases of the signal input / output units 30 belonging to the first terminal group 21 and the average of the reference phases of the signal input / output units 30 belonging to the second terminal group 22. Match. In addition, the reference phase of the signal input / output unit 30 of the first terminal group 21 and the reference phase of the signal input / output unit 30 of the second terminal group 22 that are connected to each other may be substantially matched. For example, the adjustment unit 54 determines the reference phase of the signal input / output unit 30 of the first terminal group 21 and the reference phase of the signal input / output unit 30 of the second terminal group 22 connected to each other as the reference phase. You may make it substantially correspond with mutual average value.

FIG. 2 shows an example of the configuration of the signal input / output unit 30. The signal input / output unit 30 includes a driver 56, a comparator 58, a pattern generator 60, a timing generator 62, an output side delay unit 64, a generation unit 66, an acquisition side delay unit 68, and an acquisition unit 70. The determination unit 72 is included.

The driver 56 supplies a signal of a voltage level corresponding to the logic signal given from the generation unit 66 to the corresponding terminal of the device under test. The comparator 58 inputs a signal from a corresponding terminal of the device under test and generates a logic signal representing a logic value corresponding to the voltage level of the input signal. The comparator 58 gives the generated logic signal to the acquisition unit 70. The terminal from which the driver 56 outputs a signal and the terminal from which the comparator 58 inputs a signal are the same.

The pattern generator 60 generates a logic pattern that specifies the waveform and generation timing of the signal generated from the signal input / output unit 30. Further, the pattern generator 60 generates an expected pattern that specifies an expected value of the signal input by the signal input / output unit 30 and an acquisition timing for acquiring the signal. The pattern generator 60 supplies the generated logic pattern to the output side delay unit 64 and the generation unit 66 for each test period. The pattern generator 60 supplies the generated expected pattern to the acquisition-side delay unit 68 and the determination unit 72.

The timing generator 62 generates a timing signal for designating the timing at which the signal input / output unit 30 outputs a signal. The timing generator 62 generates a strobe signal for designating the timing at which the signal input / output unit 30 inputs a signal value. As an example, the timing generator 62 generates a timing signal and a strobe signal for each test period. The timing generator 62 supplies the timing signal to the output side delay unit 64 and supplies the strobe signal to the acquisition side delay unit 68.

The output side delay unit 64 delays the timing signal supplied from the timing generator 62 for each test cycle by a delay amount corresponding to the generation timing specified by the pattern generator 60 from the reference phase to the generation unit 66. Supply. Further, the output side delay unit 64 is given an offset delay amount from each of the group register 34 and the terminal register 36. The output side delay unit 64 sets the reference phase to a phase corresponding to a delay amount obtained by adding the offset delay amount given from the group register 34 and the offset delay amount given from the terminal register 36.

The generation unit 66 generates a logic signal having a waveform designated by the pattern generator 60 at the timing of the timing signal delayed by the output side delay unit 64. The generation unit 66 supplies the generated logic signal to the driver 56.

The acquisition-side delay unit 68 delays the strobe signal supplied from the timing generator 62 for each test cycle by a delay amount corresponding to the acquisition timing specified by the pattern generator 60 from the reference phase to the acquisition unit 70. Supply. The acquisition-side delay unit 68 is given an offset delay amount from each of the group register 34 and the terminal register 36. Here, the acquisition-side delay unit 68 sets the reference phase to a phase corresponding to the delay amount obtained by adding the offset delay amount given from the group register 34 and the offset delay amount given from the terminal register 36.

The acquisition unit 70 acquires the logical value of the logical signal output from the comparator 58 at the timing of the strobe signal delayed by the acquisition side delay unit 68. The acquisition unit 70 supplies the acquired logical value to the determination unit 72.

The determination unit 72 compares the logical value acquired by the acquisition unit 70 with the expected value specified by the pattern generator 60. The acquisition unit 70 supplies the comparison result to the pattern generator 60 or the control device 24. Further, the acquisition unit 70 may write the comparison result in a memory or the like that can be read from the control device 24.

Such a signal input / output unit 30 can output a signal to the terminal of the device under test. Furthermore, the signal input / output unit 30 can input a signal output from the terminal of the device under test and determine whether or not the logical value of the input signal matches the expected value. Note that the pattern generator 60 and the timing generator 62 may be configured to be used in common by the plurality of signal input / output units 30 as an example.

FIG. 3 shows an example of the configuration of the calibration unit 50. The measurement unit 52 of the calibration unit 50 includes a first shift amount detection unit 80, a second shift amount detection unit 82, and a difference calculation unit 84.

The first shift amount detection unit 80 performs signal input / output of the first terminal group 21 for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. The signal output from the unit 30 is acquired by the signal input / output unit 30 of the second terminal group 22. And the 1st shift amount detection part 80 detects the phase shift amount in the case of acquiring in this way.

Here, when the signal generated by one signal input / output unit 30 is acquired by the other signal input / output unit 30, the signal acquisition timing must be matched with the timing delayed by the signal propagation time from the signal generation timing. Don't be. In this way, the amount of phase shift is the amount by which the phase of the timing signal or strobe signal is relatively changed in order to match the signal acquisition timing with the signal generation timing delayed by the signal propagation time. Say.

The second shift amount detection unit 82 performs signal input / output of the second terminal group 22 for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. The signal output from the unit 30 is acquired by the signal input / output unit 30 of the first terminal group 21. And the 2nd shift amount detection part 82 detects the phase shift amount in the case of making it acquire in this way.

The difference calculation unit 84 detects the phase shift detected by the first shift amount detection unit 80 for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. The value of ½ of the difference between the amount and the phase shift amount detected by the second shift amount detector 82 is calculated. The value calculated in this way represents the difference in the reference phase for the pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other.

Such a measuring unit 52 can measure the difference in the reference phase for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. . Then, the measurement unit 52 gives the difference of the reference phase calculated in this way to the adjustment unit 54.

The adjustment unit 54 includes an average calculation unit 86, an inter-group adjustment unit 88, and an inter-terminal adjustment unit 90. The average calculation unit 86 calculates the average value of the differences in the reference phase measured for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22.

The inter-group adjustment unit 88 calculates the average of the reference phase of each signal input / output unit 30 of the first terminal group 21 relative to the reference phase of each signal input / output unit 30 of the second terminal group 22. The average value of the reference phase of the signal input / output unit 30 belonging to the first terminal group 21 and the average value of the reference phase of the signal input / output unit 30 belonging to the second terminal group 22 are shifted by the average value calculated by the unit 86. And approximately match. In the present embodiment, the inter-group adjustment unit 88 writes the corresponding offset delay amount to each of the group register 34 included in the first terminal group 21 and the group register 34 included in the second terminal group 22. Thus, the reference phase is uniformly shifted for each terminal group.

The inter-terminal adjustment unit 90 averages the reference phases of the signal input / output units 30 for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. Match the value. In the present embodiment, the inter-terminal adjustment unit 90 writes the corresponding offset delay amount to each terminal register 36 corresponding to each pair, so that the reference between the signal input / output units 30 for each pair is obtained. Match the phase to the average value.

Such an adjustment unit 54 substantially matches the average of the reference phases of the signal input / output units 30 belonging to the first terminal group 21 and the average of the reference phases of the signal input / output units 30 belonging to the second terminal group 22. Can do. Further, such an adjusting unit 54 can substantially match the reference phase of the signal input / output unit 30 of the first terminal group 21 and the reference phase of the signal input / output unit 30 of the second terminal group 22 connected to each other. .

4 shows the reference phase distribution A of the signal input / output units 30 belonging to the first terminal group 21, the reference phase distribution B of the signal input / output units 30 belonging to the second terminal group 22, and the average value of the reference phases. Distribution A and distribution B after matching are shown. Assume that the reference phase of timing signals and strobe signals supplied to the plurality of signal input / output units 30 is calibrated in units of the first terminal group 21 and the second terminal group 22.

In this case, the distribution of the reference phases (TA1, TA2, TA3,...) Of the first terminal group 21 is, for example, a distribution having a peak at the first average phase (MA) as shown in FIG. For example, Gaussian distribution). The distribution of the reference phases (TB1, TB2, TB3,...) Of the second terminal group 22 is, for example, a distribution having a peak at the second average phase (MB) as shown in FIG. Gaussian distribution).

In such a case, in order to make the average value of the reference phase substantially coincide between the terminal groups, the calibration unit 50 determines the difference (MB−MA) between the first average phase (MA) and the second average phase (MB). ) Is substantially 0, the reference phases of the plurality of signal input / output units 30 belonging to the first terminal group 21 are set to the respective reference phases of the plurality of signal input / output units 30 belonging to the second second terminal group 22. What is necessary is just to shift relatively uniformly with respect to the reference phase. Here, when the number of the plurality of signal input / output units 30 included in each of the first terminal group 21 and the second terminal group 22 is n, the first average phase (MA) and the second average phase (MB). Is represented by Formula (1) and Formula (2).

From Equation (1) and Equation (2), the difference in the average value of the reference phase (MB-MA) is expressed by Equation (3). Furthermore, when the right side of the formula (3) is rewritten, it is represented by the formula (4).

Referring to Equation (4), the difference (MB−MA) between the first average phase (MA) and the second average phase (MB) is the signal input / output unit 30 of the first terminal group 21 connected to each other. It can be seen that the difference is the average of the differences in the reference phase for each pair of the signal input / output units 30 of the second terminal group 22. Therefore, in order to make the average value of the reference phase substantially coincide between the terminal groups, the calibration unit 50 calculates the difference of the reference phase for each pair of signal input / output units 30 connected to each other, and calculates the average of the calculated differences. Calculate the value. Then, the calibration unit 50 calculates the reference phase of each signal input / output unit 30 of the first terminal group 21 relative to the reference phase of each signal input / output unit 30 of the second terminal group 22. What is necessary is just to make a uniform shift by the average value of a difference.

FIG. 5 shows the distribution A and the distribution B after the average value of the reference phase is matched between the terminal groups, and after the reference phase is further adjusted from the state where the average value of the reference phase is substantially matched between the terminal groups. 2 shows a reference phase distribution C in which the first terminal group 21 and the second terminal group 22 are combined. The calibration unit 50 adjusts the reference phase as shown in FIG. 4, and further, for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 that are connected to each other. The reference phase between the signal input / output units 30 is adjusted to match the average value.

Here, the first terminal group 21 one signal input and output unit 30 belonging to the reference phase (T _{AX ')} and the second belongs to the terminal group 22 one signal input and output unit 30 of the reference phase (T _AX connected together think about. The reference phase (T _AX ′) is smaller than the average of the distribution A and is located at the end of the distribution A. The reference phase (T _BX ′) is smaller than the average of the distribution B and is located at the end of the distribution B. Further, the reference phase (T _AX ′) is larger than the reference phase (T _BX ′).

In this case, the reference phase _{(T AX} ') and a reference phase _{(T BX')} of the average value matched to so adjusted after the reference phase _{_{(T AX'' = T BX''}} ) is, _{(T AX} '+ T _BX ') / 2. This value is closer to the average value than the reference phase (T _BX ′). Therefore, the distribution of the reference phase obtained by combining the first terminal group 21 and the second terminal group 22 is smaller than the distribution before adjustment. From the above, according to the calibration unit 50, the distribution of the reference phase of the signal input / output unit 30 belonging to the first terminal group 21 and the reference phase of the signal input / output unit 30 belonging to the second terminal group 22 can be further reduced. .

FIG. 6 shows a flowchart of the calibration process of the test apparatus 10 according to the present embodiment. First, in step S 11, the test apparatus 10 attaches the calibration connection unit 200 to the test apparatus 10 in place of the device under test. Accordingly, the test apparatus 10 can connect the signal input / output units 30 of the first terminal group 21 and the signal input / output units 30 of the second terminal group 22 in a one-to-one relationship.

Next, the measurement unit 52 repeats the processing from step S13 to step S15 for each pair of signal input / output units 30 connected one-to-one (S12, S16). In step S 13, the first shift amount detection unit 80 outputs a signal from the signal input / output unit 30 of the first terminal group 21 and causes the signal input / output unit 30 of the second terminal group 22 to acquire the signal. Then, the first shift amount detector 80 detects the phase shift amount when the signal is acquired in this way.

For example, the first shift amount detection unit 80 repeatedly outputs a signal whose logic changes at a fixed generation timing from the signal input / output unit 30 of the first terminal group 21 for each test cycle, and sequentially changes the acquisition timing. Then, the signal input / output unit 30 of the second terminal group 22 is made to acquire signals repeatedly. The first shift amount detection unit 80 detects the phase of the strobe signal when the signal input / output unit 30 of the second terminal group 22 captures an edge, and captures an edge from the reference phase of the strobe signal. The amount of change up to the phase of the strobe signal is detected as a phase shift amount.

Alternatively, the first shift amount detection unit 80 repeatedly outputs a signal whose logic changes while changing the generation timing sequentially from the signal input / output unit 30 of the first terminal group 21 for each test cycle. The signal input / output unit 30 of the second terminal group 22 is repeatedly acquired at a fixed acquisition timing. The first shift amount detection unit 80 detects the phase of the timing signal when the signal input / output unit 30 of the second terminal group 22 captures the edge, and captures the edge from the reference phase of the timing signal. The amount of change up to the phase of the timing signal may be detected as a phase shift amount.

Next, in step S 14, the second shift amount detection unit 82 outputs a signal from the signal input / output unit 30 of the second terminal group 22 and causes the signal input / output unit 30 of the first terminal group 21 to acquire the signal. Then, the second shift amount detector 82 detects the phase shift amount when the signal is acquired in this way. For example, the second shift amount detection unit 82 may detect the phase shift amount by performing the same processing as step S13 with the relationship between the signal output side and the input side reversed.

Next, in step S15, the difference calculation unit 84 detects the phase shift amount detected by the first shift amount detection unit 80 by the process of step S13 and the phase shift detected by the second shift amount detection unit 82 by the process of step S14. The value of 1/2 of the difference from the quantity is calculated. In the present embodiment, the difference calculation unit 84 subtracts the phase shift amount detected by the first shift amount detection unit 80 from the phase shift amount detected by the second shift amount detection unit 82, and 1 / of the value obtained by subtraction. 2 is calculated. Thereby, the difference calculation part 84 can measure the difference of the reference phase for the pair of the signal input / output part 30 of the first terminal group 21 and the signal input / output part 30 of the second terminal group 22 connected to each other. .

When the processing from step S12 to step S15 is completed for all the pairs of signal input / output units 30 connected in a one-to-one relationship (S16), then in step S17, the average calculation unit 86 selects all signal input / output units. An average value M of reference phase differences for 30 pairs is calculated.

Next, in step S18, the inter-group adjustment unit 88 multiplies the average value M of the reference phase difference by a first coefficient α (0 ≦ α ≦ 1) of 0 or more and 1 for the timing signal (and strobe). Signal) is calculated. Then, the inter-group adjustment unit 88 adds the calculated offset delay amount to the offset delay amount stored in the group register 34 belonging to the first terminal group 21 and writes it back to the group register 34.

Further, the inter-group adjustment unit 88 generates a timing signal (and a strobe signal) corresponding to the phase obtained by multiplying the average value of the reference phase differences by the second coefficient (1-α) (a value obtained by subtracting the first coefficient α from 1). The amount of offset delay that delays is calculated. Then, the inter-group adjustment unit 88 subtracts the calculated offset delay amount from the offset delay amount stored in the group register 34 belonging to the second terminal group 22 and writes it back to the group register 34.

Thereby, the inter-group adjustment unit 88 makes the reference phase of each signal input / output unit 30 of the first terminal group 21 relatively to the reference phase of each signal input / output unit 30 of the second terminal group 22. The average value calculated by the average calculator 86 can be made uniform. The inter-group adjusting unit 88 substantially matches the average value of the reference phase of the signal input / output unit 30 belonging to the first terminal group 21 and the average value of the reference phase of the signal input / output unit 30 belonging to the second terminal group 22. Can be made. Note that the first coefficient α and the second coefficient α-1 may each be 0.5.

Next, the measurement unit 52 repeats the processing from step S20 to step S23 for each pair of signal input / output units 30 connected one-to-one (S19, S24). In step S 20, the first shift amount detection unit 80 outputs a signal from the signal input / output unit 30 of the first terminal group 21 and causes the signal input / output unit 30 of the second terminal group 22 to acquire the signal. Then, the first shift amount detection unit 80 detects the phase shift amount when the signal is acquired in this way. In step S20, the first shift amount detection unit 80 may perform the same process as in step S13.

Next, in step S 21, the second shift amount detection unit 82 outputs a signal from the signal input / output unit 30 of the second terminal group 22 and causes the signal input / output unit 30 of the first terminal group 21 to acquire the signal. Then, the second shift amount detector 82 detects the phase shift amount when the signal is acquired in this way. In step S21, the second shift amount detection unit 82 may perform the same process as in step S14.

Next, in step S22, the difference calculation unit 84 detects the phase shift amount detected by the first shift amount detection unit 80 by the process of step S20 and the phase shift detected by the second shift amount detection unit 82 by the process of step S21. The value of 1/2 of the difference from the quantity is calculated. In the present embodiment, the difference calculation unit 84 subtracts the phase shift amount detected by the first shift amount detection unit 80 from the phase shift amount detected by the second shift amount detection unit 82, and subtracts 1 as a result of the subtraction. / 2 is calculated. Thereby, the difference calculation part 84 can measure the difference of the reference phase for the pair of the signal input / output part 30 of the first terminal group 21 and the signal input / output part 30 of the second terminal group 22 connected to each other. .

Next, in step S23, the inter-terminal adjustment unit 90 corresponds to the pair belonging to the first terminal group 21 with an offset delay amount that is delayed by a phase amount that is ½ of the reference phase difference calculated in step S22. The offset delay amount stored in the terminal register 36 to be added is added back to the terminal register 36. Further, the inter-terminal adjusting unit 90 delays an offset delay amount that is delayed by a phase amount that is ½ of the reference phase difference calculated in step S22, to the terminal register 36 that corresponds to the pair belonging to the second terminal group 22. Is subtracted from the offset delay amount stored in the terminal register 36 and written back to the terminal register 36. As a result, the inter-terminal adjustment unit 90 is configured such that the signal input / output units 30 are connected to each other for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 connected to each other. The phase can be matched to the average value.

When the processing from step S20 to step S23 is completed for all pairs of signal input / output units 30 connected in a one-to-one relationship, the calibration unit 50 ends all processing. According to the test apparatus 10 as described above, the distribution of the reference phases of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 can be reduced.

Note that, as an example, the test apparatus 10 may perform the processing from step S19 to step S24 without performing the processing from step S11 to step S18. That is, for example, the adjustment unit 54 determines the reference phase of the signal input / output unit 30 of the first terminal group 21 and the reference phase of the signal input / output unit 30 of the second terminal group 22 connected to each other as the reference phase. Set to the average phase of each other. Accordingly, the test apparatus 10 does not have to perform the phase shift amount detection process, the average calculation process, and the like, so that the processing time can be reduced.

FIG. 7 shows a configuration of a test apparatus 10 according to a modification of the present embodiment. Since the test apparatus 10 according to this modification employs substantially the same configuration and function as the test apparatus 10 shown in FIG. 1, members having substantially the same configuration and function as those shown in FIG. The description will be omitted except for the differences.

The calibration unit 50 according to this modification further includes a verification unit 92. The adjustment unit 54 according to this modification shifts the reference phase of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22 that are connected to each other by substantially the same amount. Bring them closer together.

After each adjustment by the adjustment unit 54, the verification unit 92 causes the measurement unit 52 to measure the difference in the reference phase of the signal input / output unit 30 between the first terminal group 21 and the second terminal group 22. Verify whether the average value is within the reference range. Then, the verification unit 92 instructs the adjustment unit 54 to further adjust the reference phase when the average difference value is outside the reference range. Thereby, according to the calibration unit 50 according to the present modification, the reference phase of the signal input / output unit 30 of the first terminal group 21 and the second terminal group 22 is more reliably determined, and the average value of the differences becomes the reference range. Can be adjusted as follows.

Further, the calibration unit 50 according to this modification may further include a history storage unit 94. The history storage unit 94 stores a history of reference phases set in the past for each signal input / output unit 30 of the first terminal group 21 and each signal input / output unit 30 of the second terminal group 22. In this case, the adjustment unit 54 brings the reference phases closer to each other and sets each reference phase for each pair of the signal input / output unit 30 of the first terminal group 21 and the signal input / output unit 30 of the second terminal group 22. The corresponding reference phase stored in the history storage unit 94 is approached.

For example, the adjustment unit 54 calculates the reference phase of each signal input / output unit 30 of the first terminal group 21 relative to the reference phase of each signal input / output unit 30 of the second terminal group 22. The phase is shifted uniformly by the average value of the difference, and set to a phase that matches or is closer to the corresponding reference phase stored in the history storage unit 94. According to the calibration unit 50 according to this modification example, since the device under test can be tested with a reference phase close to a reference phase set in the past, the reproducibility of the test result can be increased.

FIG. 8 shows an example of a hardware configuration of a computer 1900 according to this embodiment. A computer 1900 according to this embodiment is connected to a CPU peripheral unit having a CPU 2000, a RAM 2020, a graphic controller 2075, and a display device 2080 that are connected to each other by a host controller 2082, and to the host controller 2082 by an input / output controller 2084. Input / output unit having communication interface 2030, hard disk drive 2040, and CD-ROM drive 2060, and legacy input / output unit having ROM 2010, flexible disk drive 2050, and input / output chip 2070 connected to input / output controller 2084 With.

The host controller 2082 connects the RAM 2020 to the CPU 2000 and the graphic controller 2075 that access the RAM 2020 at a high transfer rate. The CPU 2000 operates based on programs stored in the ROM 2010 and the RAM 2020 and controls each unit. The graphic controller 2075 acquires image data generated by the CPU 2000 or the like on a frame buffer provided in the RAM 2020 and displays it on the display device 2080. Instead of this, the graphic controller 2075 may include a frame buffer for storing image data generated by the CPU 2000 or the like.

The input / output controller 2084 connects the host controller 2082 to the communication interface 2030, the hard disk drive 2040, and the CD-ROM drive 2060, which are relatively high-speed input / output devices. The communication interface 2030 communicates with other devices via a network. The hard disk drive 2040 stores programs and data used by the CPU 2000 in the computer 1900. The CD-ROM drive 2060 reads a program or data from the CD-ROM 2095 and provides it to the hard disk drive 2040 via the RAM 2020.

Also, the ROM 2010, the flexible disk drive 2050, and the relatively low-speed input / output device of the input / output chip 2070 are connected to the input / output controller 2084. The ROM 2010 stores a boot program that the computer 1900 executes at startup and / or a program that depends on the hardware of the computer 1900. The flexible disk drive 2050 reads a program or data from the flexible disk 2090 and provides it to the hard disk drive 2040 via the RAM 2020. The input / output chip 2070 connects the flexible disk drive 2050 to the input / output controller 2084 and inputs / outputs various input / output devices via, for example, a parallel port, a serial port, a keyboard port, a mouse port, and the like. Connect to controller 2084.

The program provided to the hard disk drive 2040 via the RAM 2020 is stored in a recording medium such as the flexible disk 2090, the CD-ROM 2095, or an IC card and provided by the user. The program is read from the recording medium, installed in the hard disk drive 2040 in the computer 1900 via the RAM 2020, and executed by the CPU 2000.

A program that is installed in the computer 1900 and causes the computer 1900 to function as the calibration unit 50 includes a measurement module and an adjustment module. These programs or modules work on the CPU 2000 or the like to cause the computer 1900 to function as the measurement unit 52 and the adjustment unit 54, respectively.

The information processing described in these programs functions as the measurement unit 52 and the adjustment unit 54, which are specific means in which the software and the various hardware resources described above cooperate with each other when read into the computer 1900. And the specific calibration part 50 according to the intended purpose is constructed | assembled by implement | achieving the calculation or processing of the information according to the intended purpose of the computer 1900 in this embodiment by these specific means.

As an example, when communication is performed between the computer 1900 and an external device or the like, the CPU 2000 executes a communication program loaded on the RAM 2020 and executes a communication interface based on the processing content described in the communication program. A communication process is instructed to 2030. Under the control of the CPU 2000, the communication interface 2030 reads transmission data stored in a transmission buffer area or the like provided on a storage device such as the RAM 2020, the hard disk drive 2040, the flexible disk 2090, or the CD-ROM 2095, and sends it to the network. The reception data transmitted or received from the network is written into a reception buffer area or the like provided on the storage device. As described above, the communication interface 2030 may transfer transmission / reception data to / from the storage device by a DMA (direct memory access) method. Instead, the CPU 2000 transfers the storage device or the communication interface 2030 as a transfer source. The transmission / reception data may be transferred by reading the data from the data and writing the data to the communication interface 2030 or the storage device of the transfer destination.

The CPU 2000 is all or necessary from among files or databases stored in an external storage device such as a hard disk drive 2040, a CD-ROM drive 2060 (CD-ROM 2095), and a flexible disk drive 2050 (flexible disk 2090). This portion is read into the RAM 2020 by DMA transfer or the like, and various processes are performed on the data on the RAM 2020. Then, CPU 2000 writes the processed data back to the external storage device by DMA transfer or the like. In such processing, since the RAM 2020 can be regarded as temporarily holding the contents of the external storage device, in the present embodiment, the RAM 2020 and the external storage device are collectively referred to as a memory, a storage unit, or a storage device. Various types of information such as various programs, data, tables, and databases in the present embodiment are stored on such a storage device and are subjected to information processing. Note that the CPU 2000 can also store a part of the RAM 2020 in the cache memory and perform reading and writing on the cache memory. Even in such a form, the cache memory bears a part of the function of the RAM 2020. Therefore, in the present embodiment, the cache memory is also included in the RAM 2020, the memory, and / or the storage device unless otherwise indicated. To do.

In addition, the CPU 2000 performs various operations, such as various operations, information processing, condition determination, information search / replacement, etc., described in the present embodiment, specified for the data read from the RAM 2020 by the instruction sequence of the program. Is written back to the RAM 2020. For example, when performing the condition determination, the CPU 2000 determines whether the various variables shown in the present embodiment satisfy the conditions such as large, small, above, below, equal, etc., compared to other variables or constants. When the condition is satisfied (or not satisfied), the program branches to a different instruction sequence or calls a subroutine.

Further, the CPU 2000 can search for information stored in a file or database in the storage device. For example, in the case where a plurality of entries in which the attribute value of the second attribute is associated with the attribute value of the first attribute are stored in the storage device, the CPU 2000 displays the plurality of entries stored in the storage device. The entry that matches the condition in which the attribute value of the first attribute is specified is retrieved, and the attribute value of the second attribute that is stored in the entry is read, thereby associating with the first attribute that satisfies the predetermined condition The attribute value of the specified second attribute can be obtained.

The program or module shown above may be stored in an external recording medium. As the recording medium, in addition to the flexible disk 2090 and the CD-ROM 2095, an optical recording medium such as DVD or CD, a magneto-optical recording medium such as MO, a tape medium, a semiconductor memory such as an IC card, and the like can be used. Further, a storage device such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet may be used as a recording medium, and the program may be provided to the computer 1900 via the network.

As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

The execution order of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior”. It should be noted that they can be implemented in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for the sake of convenience, it means that it is essential to carry out in this order. is not.

Claims

A test apparatus for testing a device under test,
A first terminal group and a second terminal group each having a plurality of signal input / output units for outputting signals to the terminals of the device under test and inputting signals output from the terminals;
The signal input / output of the first terminal group connected to each other in a state where the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group are connected to each other. And a measurement unit for measuring a difference in a reference phase for inputting / outputting a signal for each pair of the signal input / output units of the second terminal group; and
For each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other, an adjustment unit that brings the reference phase closer to each other based on the difference of the reference phase;
A test apparatus comprising:
The test apparatus according to claim 1, further comprising a calibration connection unit that connects the signal input / output units of the first terminal group and the signal input / output units of the second terminal group to each other.
The adjusting unit reduces an average difference between the reference phases of the signal input / output units belonging to the first terminal group and an average of the reference phases of the signal input / output units belonging to the second terminal group; and The test apparatus according to claim 1, wherein a difference in the reference phase is reduced for each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group that are connected to each other.
The adjusting unit substantially matches an average of the reference phases of the signal input / output units belonging to the first terminal group and an average of the reference phases of the signal input / output units belonging to the second terminal group; and The test apparatus according to claim 3, wherein the reference phase of the signal input / output unit of the first terminal group connected to each other and the reference phase of the signal input / output unit of the second terminal group are substantially matched.
The adjusting unit calculates an average of the reference phases of the reference phase of the signal input / output unit of the first terminal group and the reference phase of the signal input / output unit of the second terminal group connected to each other. The test apparatus according to claim 4, which is substantially coincident with the value.
The adjustment unit calculates an average phase between the reference phases of the reference phase of the signal input / output unit of the first terminal group and the reference phase of the signal input / output unit of the second terminal group connected to each other. The test apparatus according to claim 1, wherein the test apparatus is set as follows.
The adjustment unit is
An average calculating unit that calculates an average value of differences in reference phases measured for each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group;
The average value calculated by the average calculator relative to the reference phase of each of the signal input / output units of the second terminal group, relative to the reference phase of each of the signal input / output units of the second terminal group. A group shift is performed so that the average value of the reference phase of the signal input / output unit belonging to the first terminal group and the average value of the reference phase of the signal input / output unit belonging to the second terminal group are substantially matched. An adjustment unit;
2. For each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group that are connected to each other, a reference phase of the signal input / output units is made to coincide with an average value. To 5. The test apparatus according to any one of 5 to 5.
After the adjustment by the adjustment unit, the difference in the reference phase of the signal input / output unit between the first terminal group and the second terminal group is measured by the measurement unit, and whether the average value of the difference is within the reference range The test apparatus according to claim 1, further comprising a verification unit that verifies whether or not.
The test apparatus according to claim 8, wherein the verification unit instructs the adjustment unit to further adjust a reference phase when the average value of the differences is outside the reference range.
The adjustment unit shifts the reference phases of the signal input / output units of the first terminal group and the signal input / output units of the second terminal group connected to each other by substantially the same amount to bring the reference phases closer to each other. Item 10. The test apparatus according to any one of Items 1 to 9.
A history storage unit for storing a history of reference phases set in the past for each of the signal input / output units of the first terminal group and the signal input / output unit of the second terminal group;
The adjusting unit brings the reference phases closer to each other for each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group, and sets each reference phase in the history storage unit. The test apparatus according to claim 1, wherein the test apparatus approaches a stored reference phase.
The calibration connection unit is a calibration board that connects the signal input / output units of the first terminal group and the signal input / output units of the second terminal group in a one-to-one relationship. Item 3. The test apparatus according to Item 2.
A calibration method for calibrating a test apparatus for testing a device under test,
The test apparatus includes a first terminal group and a second terminal group each having a plurality of signal input / output units that output signals to the terminals of the device under test and input signals output from the terminals,
The signal input / output of the first terminal group connected to each other in a state where the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group are connected to each other. For each pair of signal input / output units of the second terminal group and a reference phase for inputting / outputting signals,
A calibration method for bringing the reference phase closer to each other based on the difference in the reference phase for each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other.
A program for causing a computer to function as a calibration apparatus for calibrating a test apparatus for testing a device under test,
The test apparatus includes a first terminal group and a second terminal group each having a plurality of signal input / output units that output signals to the terminals of the device under test and input signals output from the terminals,
The computer,
The signal input / output of the first terminal group connected to each other in a state where the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group are connected to each other. And a measurement unit for measuring a difference in a reference phase for inputting / outputting a signal for each pair of the signal input / output units of the second terminal group; and
For each pair of the signal input / output unit of the first terminal group and the signal input / output unit of the second terminal group connected to each other, an adjustment unit that brings the reference phase closer to each other based on the difference of the reference phase;
Program to make it work.