JP2011089857A - Testing device, adjustment method, board for calibration, adjusting device, and program - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To solve the problem wherein mount work time of a board for calibration, and expenses, and the like of a board for calibration increase and hence test costs rise. <P>SOLUTION: A testing device for testing a device to be tested includes a plurality of terminal groups each including a plurality of drivers that partially include a common driver where a reference phase of a signal to be output is common to that of other drivers and supply a signal to the device to be tested, an intragroup adjustment section for mutually bringing closer respective reference phases of a plurality of drivers that the terminal group includes for each of the plurality of terminal groups, and an intergroup adjustment section for bringing closer the respective reference phases of a plurality of drivers among a plurality of terminal groups, based on a difference in the reference phases among common drivers that the plurality of terminal groups include each. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a test apparatus, an adjustment method, a calibration board, an adjustment apparatus, and a program.

  The test apparatus includes a plurality of input / output units that exchange signals with the device under test. Each of the plurality of input / output units outputs a test signal having a designated waveform at a timing delayed by a designated time from the reference phase for each test cycle. Each of the plurality of input / output units acquires the value of the response signal from the device under test at a timing delayed from the reference phase by a specified time.

  In addition, prior to the test, the test apparatus adjusts so that the reference phases of the plurality of input / output units match. For example, the test apparatus adjusts a plurality of input / output units by a method described in Patent Document 1, for example.

  In the adjustment method of Patent Document 1, the input / output terminals of a plurality of input / output units are short-circuited by a calibration board, and a pair of two input / output units among the plurality of input / output units is sequentially selected, The signal is input and output with each other to measure the difference in the reference phase. In this adjustment method, the reference phases of the plurality of input / output units are matched with each other based on the difference in the reference phase for each pair.

Japanese Patent No. 3565837

  By the way, if the number of input / output units included in the test apparatus is large, the number of branches of the signal output from one input / output unit increases. Therefore, in this case, the amplitude of the signal input / output between the pair is attenuated, and the reference phase difference cannot be measured with high accuracy.

  Therefore, it is conceivable to divide a plurality of input / output units provided in the test apparatus into a plurality of groups so that the reference phases coincide with each other. In this case, first, in the first stage, the reference phase of the input / output unit is adjusted in units of groups. Subsequently, in the second stage, the reference phase of the input / output unit is adjusted among a plurality of groups.

  However, when the adjustment is performed in two stages as described above, a calibration board for adjusting the reference phase of the input / output unit for each group and a reference phase of the input / output unit among a plurality of groups are adjusted. A calibration board is required. Therefore, the time for attaching the calibration board and the cost of the calibration board are increased, and as a result, the test cost is increased.

  In order to solve the above problems, in the first aspect of the present invention, a test apparatus for testing a device under test, which includes a common driver in which a reference phase of a signal to be output is common to other drivers A plurality of terminal groups each having a plurality of drivers for supplying signals to the device under test, and a group for bringing the reference phases of the plurality of drivers included in the terminal group closer to each other for each of the plurality of terminal groups An inter-group adjustment unit that brings the reference phases of the plurality of drivers close to each other between the plurality of terminal groups based on a difference in reference phase between the internal adjustment unit and the common driver that each of the plurality of terminal groups has A test apparatus comprising: and an adjustment method related to such a test apparatus, a calibration baud To provide an adjusting device and a program.

  The above summary of the invention does not enumerate all necessary features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

1 shows a hardware configuration of a test apparatus 10 according to the present embodiment, together with a device under test 300. The functional structure at the time of adjustment of the test apparatus 10 which concerns on this embodiment is shown. An example of the configuration of the input / output unit 30 other than the common input / output unit 32 is shown. An example of the configuration of the common input / output unit 32 and the configuration of the common input / output unit 32 having a common reference phase with the common input / output unit 32 are shown. The adjustment processing flow of the test apparatus 10 which concerns on this embodiment is shown. The signal flow in the process of step S11 of FIG. 5 is shown. The structure of the in-group adjustment part 56 which concerns on this embodiment, and the flow of the signal in the process of FIG.5 S12 are shown. The structure of the adjustment part 58 between groups which concerns on this embodiment, and the flow of the signal in the process of FIG.5 S13 are shown. An example of the reference phase of the common input / output unit 32 and the input / output unit 30 included in each of the terminal groups 22 of groups A to D after the process of step S12 of FIG. The difference of the reference phase between the different terminal groups 22 after finishing the process of step S12 of FIG. An example of the reference phase of the common input / output unit 32 and the input / output unit 30 included in each of the terminal groups 22 of groups A to D after the process of step S13 of FIG. The terminal group 22 and the calibration board 24 which concern on the 1st modification of this embodiment are shown. The structure of the test apparatus 10 which concerns on the 2nd modification of this embodiment is shown. 2 shows an exemplary hardware configuration of a computer 1900 according to the present embodiment.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

  FIG. 1 shows a hardware configuration of a test apparatus 10 according to this embodiment together with a device under test 300. The test apparatus 10 according to the present embodiment tests a device under test (DUT) 300. The test apparatus 10 includes a main body 12, a test board 14, and a control device 16.

  The main body 12 carries a plurality of test modules 18. Each of the plurality of test modules 18 executes a test program and transmits / receives signals to / from the device under test 300 to test the device under test 300.

  More specifically, each of the plurality of test modules 18 outputs a test signal having a designated waveform at a timing delayed by a designated time from the reference phase for each test period. In addition, each of the plurality of test modules 18 acquires the value of the response signal from the device under test 300 at a timing delayed by a specified time from the reference phase.

  The test board 14 is placed on the main body 12. The test board 14 mounts the device under test 300 and connects between the plurality of test modules 18 and the device under test 300. As an example, the test board 14 may be a performance board or the like placed on the main body 12.

  The control device 16 controls the test module 18 mounted on the main body unit 12 to cause the plurality of test modules 18 to perform the test of the device under test 300. Further, the control device 16 functions as an adjustment device 20 that adjusts each of the plurality of test modules 18. The adjustment device 20 makes the reference phases of the plurality of test modules 18 coincide with each other at the time of adjustment performed prior to the test.

  FIG. 2 shows a functional configuration during adjustment of the test apparatus 10 according to the present embodiment. The test apparatus 10 includes a plurality of terminal groups 22, a calibration board 24, and an adjustment apparatus 20. The adjustment device 20 is realized by the control device 16. The plurality of terminal groups 22 are realized by the plurality of test modules 18 in the main body 12. The calibration board 24 is attached to the main body 12 instead of the test board 14.

  Each of the plurality of terminal groups 22 has a plurality of input / output units 30. Each of the plurality of input / output units 30 is provided corresponding to each terminal of the device under test 300. Each of the plurality of input / output units 30 includes a driver that outputs a signal to a terminal of the device under test 300 and a comparator that inputs a signal from the terminal. Each of the plurality of input / output units 30 inputs / outputs signals to / from corresponding terminals of the device under test 300 to test the device under test 300. An example of the configuration of the input / output unit 30 will be further described with reference to FIGS.

  Each of the plurality of input / output units 30 included in each terminal group 22 includes at least one input / output unit 30 having a reference phase of an output signal in common with other input / output units 30. That is, at least one of the plurality of input / output units 30 included in each terminal group 22 includes therein a driver in which a reference phase of an output signal is common to drivers in other input / output units 30.

  When testing a plurality of devices under test 300 in parallel, for example, the test apparatus 10 branches test signals formed by the same waveform shaper and supplies them to a plurality of drivers. A signal is supplied to a terminal corresponding to each of the test devices 300. In such a case, a driver to which a test signal shaped by the same waveform shaper is given outputs a signal having a common reference phase. Accordingly, a part of the plurality of input / output units 30 included in each terminal group 22 may be, for example, the input / output unit 30 including such a driver.

  Hereinafter, a driver having a reference phase of an output signal that is common to other drivers is referred to as a common driver. The input / output unit 30 including such a common driver is referred to as a common input / output unit 32.

  The calibration board 24 has a plurality of intra-group connection wirings 26 and inter-group connection wirings 28. The plurality of intra-group connection wirings 26 correspond to each of the plurality of terminal groups 22. Each of the plurality of in-group connection wirings 26 shorts between the plurality of input / output units 30 except the common input / output unit 32 included in the corresponding terminal group 22. The inter-group connection wiring 28 shorts between the common input / output units 32 included in each of the plurality of terminal groups 22.

  The adjusting device 20 performs adjustment so that the reference phases of the input / output units 30 included in each of the plurality of terminal groups 22 are matched. The adjustment device 20 includes a terminal adjustment unit 54, an in-group adjustment unit 56, and an inter-group adjustment unit 58.

  For each of the plurality of input / output units 30 included in the test apparatus 10, the terminal adjustment unit 54 closely matches the reference phase of the signal output by the driver and the reference phase of the timing for acquiring the signal input by the comparator. Let The processing and configuration of the terminal adjustment unit 54 will be further described with reference to FIG.

  For each of the plurality of terminal groups 22, the intra-group adjustment unit 56 has the respective reference phases of the plurality of input / output units 30 included in the terminal group 22 (that is, the reference phases of the signals output from the plurality of drivers and the plurality of comparators). The reference phase of the timing for acquiring the input signal is brought close to each other and matched. For example, the intra-group adjustment unit 56 adjusts the reference phase of each of the plurality of terminal groups 22 after the terminal adjustment unit 54 has adjusted. The processing and configuration of the in-group adjustment unit 56 will be further described with reference to FIG.

  The inter-group adjustment unit 58 includes a reference phase of each of the plurality of input / output units 30 (that is, a reference phase of a signal output from the driver and a reference phase of a timing at which the comparator inputs a signal) between the plurality of terminal groups 22. Bring them closer together to match. In this case, the inter-group adjustment unit 58 includes a plurality of terminal groups based on a reference phase difference between the common input / output units 32 included in each of the plurality of terminal groups 22 (that is, a reference phase difference between common drivers). 22, the reference phases of the plurality of input / output units 30 are brought close to each other.

  For example, the inter-group adjustment unit 58 adjusts the reference phase of each of the plurality of input / output units 30 for each terminal group 22 after the intra-group adjustment unit 56 performs adjustment. The processing and configuration of the in-group adjustment unit 56 will be further described with reference to FIGS.

  FIG. 3 shows an example of the configuration of the input / output unit 30 other than the common input / output unit 32. The input / output unit 30 includes a driver 60, a comparator 62, a pattern generator 64, a timing generator 66, an output-side delay circuit 68, a shaping unit 70, an acquisition-side delay circuit 72, and an acquisition unit 74. And a determination unit 76 and a setting unit 78.

  The driver 60 supplies a signal of a voltage level corresponding to the logic signal given from the forming unit 70 to the corresponding terminal of the device under test 300. The comparator 62 receives a signal from a corresponding terminal of the device under test 300 and generates a logic signal representing a logic value corresponding to the voltage level of the input signal. The comparator 62 gives the generated logic signal to the acquisition unit 74.

  The output terminal of the driver 60 included in the input / output unit 30 and the input terminal of the comparator 62 included in the input / output unit 30 are connected in common. That is, the output terminal from which the driver 60 outputs a signal and the input terminal from which the comparator 62 inputs a signal are common.

  The pattern generator 64 generates a logic pattern that specifies the waveform and generation timing of the signal generated from the input / output unit 30. Further, the pattern generator 64 generates an expected pattern that specifies an expected value of the signal input by the input / output unit 30 and an acquisition timing for acquiring the signal. The pattern generator 64 supplies the generated logical pattern to the forming unit 70 every test cycle. The pattern generator 64 supplies the generated expected pattern to the determination unit 76.

  The timing generator 66 generates a timing signal for designating the timing at which the input / output unit 30 outputs a signal. The timing generator 66 generates a strobe signal for designating the timing at which the input / output unit 30 acquires a signal value. As an example, the timing generator 66 generates a timing signal and a strobe signal for each test cycle. The timing generator 66 supplies the timing signal to the delay circuit 68 on the output side, and supplies the strobe signal to the delay circuit 72 on the acquisition side.

  The delay circuit 68 on the output side delays the timing signal supplied from the timing generator 66 for each test cycle by a delay amount corresponding to the specified generation timing from the reference phase, and supplies the delayed signal to the forming unit 70. The shaping unit 70 generates a logic signal having a waveform designated by the pattern generator 64 at the timing of the timing signal delayed by the delay circuit 68 on the output side. The forming unit 70 supplies the generated logic signal to the driver 60.

  The acquisition-side delay circuit 72 delays the strobe signal supplied from the timing generator 66 every test cycle by a delay amount corresponding to the designated acquisition timing from the reference phase, and supplies the strobe signal to the acquisition unit 74. The acquisition unit 74 acquires the logical value of the logical signal output from the comparator 62 at the timing of the strobe signal delayed by the acquisition-side delay circuit 72. The acquisition unit 74 supplies the acquired logical value to the determination unit 76.

  The determination unit 76 compares the logical value acquired by the acquisition unit 74 with the expected value designated by the pattern generator 64. The acquisition unit 74 supplies the comparison result to the pattern generator 64, the control device 16, or a memory that can be read from the control device 16.

  The setting unit 78 sets the reference phase of the signal output from the driver 60 in accordance with the control of the adjustment device 20. For example, the setting unit 78 sets an offset delay amount of the output-side delay circuit 68 that delays the timing signal. In addition, the setting unit 78 sets a reference phase of timing for acquiring the signal input by the comparator 62 according to the control of the adjustment device 20. For example, the setting unit 78 sets the delay amount of the offset of the delay circuit 72 on the acquisition side that delays the strobe signal.

  FIG. 4 shows an example of the configuration of the common input / output unit 32 and the configuration of the common input / output unit 32 having a common reference phase with the common input / output unit 32. Compared with the input / output unit 30 shown in FIG. 3, the common input / output unit 32 does not include the output-side delay circuit 68 and the forming unit 70. That is, the common input / output unit 32 includes all members except the output-side delay circuit 68 and the forming unit 70 from the input / output unit 30 shown in FIG.

  The driver 60 in the common input / output unit 32 receives a signal from the molding unit 70 in any one of the input / output units 30 among the plurality of input / output units 30 included in the terminal group 22. Accordingly, the common input / output unit 32 can output the same signal having the same reference phase as any one of the plurality of input / output units 30 in the terminal group 22.

  Note that the setting unit 78 in the common input / output unit 32 sets only the reference phase of the timing for acquiring the signal input by the comparator 62 in accordance with the control of the adjustment device 20. For example, the setting unit 78 sets the delay amount of the offset of the delay circuit 72 on the acquisition side that delays the strobe signal.

  FIG. 5 shows an adjustment process flow of the test apparatus 10 according to the present embodiment. Prior to the test, the test apparatus 10 sequentially performs the following adjustment processes in steps S10 to S13. First, in step S <b> 10, the calibration board 24 is attached to the test apparatus 10.

  Subsequently, in step S <b> 11, the test apparatus 10 acquires the reference phase of the signal output from the driver 60 and the timing at which the signal input by the comparator 62 is acquired for each of the plurality of input / output units 30 included in the test apparatus 10. The reference phase is brought close to each other and matched. The process of step S11 will be further described with reference to FIG.

  Subsequently, in step S <b> 12, the test apparatus 10 brings the reference phases of the plurality of input / output units 30 included in the terminal group 22 close to each other and matches each of the plurality of terminal groups 22. The process of step S12 will be further described with reference to FIG.

  Subsequently, in step S <b> 13, the test apparatus 10 brings the reference phases of the plurality of input / output units 30 close to each other and matches between the plurality of terminal groups 22. The process of step S13 will be further described with reference to FIGS. By executing the above processing, the test apparatus 10 can match the reference phases of all the input / output units 30 in the test apparatus 10 with each other.

  FIG. 6 shows a signal flow in the process of step S11 of FIG. In step S <b> 11, the terminal adjustment unit 54 performs the following process for each of the plurality of input / output units 30.

  The terminal adjustment unit 54 causes the driver 60 to output a signal having a predetermined waveform. The signal output from the driver 60 is looped back and provided to the comparator 62 in the input / output unit 30. The terminal adjustment unit 54 sets the offset delay amount of the output-side delay circuit 68 or the acquisition-side delay circuit 72 so that the acquisition unit 74 acquires the output signal having the predetermined waveform for the time delayed by the wiring. change.

  Thereby, the terminal adjustment unit 54 can match the reference phase of the signal output from the driver 60 with the reference phase of the timing for acquiring the signal input by the comparator 62 for each of the plurality of input / output units 30. When executing the process of step S11, the terminal adjustment unit 54 opens the relay between the input / output unit 30 and the device under test 300, and the input / output unit 30 to be adjusted and the other input / output unit 30. It is preferable to cut the wiring between the two.

  Further, the terminal adjustment unit 54 determines, for the common input / output unit 32, the reference phase of the timing at which the signal input by the comparator 62 of the common input / output unit 32 is acquired by the driver 60 of the common input / output unit 32. Match to the reference phase of the output signal. Specifically, the terminal adjustment unit 54 acquires the reference phase of the signal output by the driver 60 and the signal input by the comparator 62 for the input / output unit 30 having the same reference phase as the common input / output unit 32. To match the reference phase. Subsequently, the terminal adjustment unit 54 outputs a signal having a predetermined waveform from the driver 60 of the common input / output unit 32, and the acquisition unit 74 acquires the signal having the predetermined waveform at a time delayed by wiring. The delay amount of the offset given to the delay circuit 72 on the acquisition side of the input / output unit 32 is changed.

  FIG. 7 shows the configuration of the intra-group adjustment unit 56 and the signal flow in the process of step S12 of FIG. The intra-group adjustment unit 56 includes a measurement unit 80, a calculation unit 82, and a shift unit 84. For each of the plurality of terminal groups 22, the measurement unit 80 measures a difference in reference phase between each of the plurality of input / output units 30 included in the terminal group 22.

  For each of the plurality of terminal groups 22, the calculation unit 82 sets the reference phases of the plurality of input / output units 30 included in the terminal group 22 to each other based on the measurement result by the measurement unit 80 of the intra-group adjustment unit 56. The shift amount to be matched is calculated for each of the plurality of input / output units 30 included in the terminal group 22. The shift unit 84 shifts the reference phase by the shift amount calculated by the calculation unit 82 of the intra-group adjustment unit 56 for each of the plurality of terminal groups 22 and for each of the plurality of input / output units 30.

  The intra-group adjustment unit 56 having such a configuration executes the following processing for each of the plurality of terminal groups 22 in step S12.

  First, the measurement unit 80 of the intra-group adjustment unit 56 performs calibration for each pair of the plurality of one input / output units 30 included in the terminal group 22 and the other input / output units 30 included in the terminal group 22. Signals are input / output via the in-group connection wiring 26 of the board 24 and the difference in the reference phase of the pair is measured.

  As an example, the measurement unit 80 includes a pair of the first and second input / output units 30, a pair of the second and third input / output units 30, a pair of the third and fourth input / output units 30, and the like. Pairs are sequentially formed for the plurality of input / output units 30, and the difference in the reference phase for each pair is measured. Instead, the measuring unit 80 is a pair of the first and second input / output units 30, a pair of the first and third input / output units 30, a pair of the first and fourth input / output units 30, and so on. Alternatively, a pair of one input / output unit 30 and all other input / output units 30 may be formed, and the difference in the reference phase for each pair may be measured.

  In addition, the measurement unit 80, as an example, calculates the difference in reference phase between one input / output unit 30 and another input / output unit 30 when one input / output unit 30 and another input / output unit 30 are paired. Measure as follows. First, the measurement unit 80 outputs a signal having a predetermined waveform from one input / output unit 30, and the other input / output unit 30 acquires a signal having a predetermined waveform output from the one input / output unit 30. The output timing of a signal output from one input / output unit 30 or the acquisition timing of a signal acquired by another input / output unit 30 is changed. The amount of change from the initial value of the output timing or acquisition timing at this time is taken as the first amount of change.

  Subsequently, the measurement unit 80 causes the other input / output unit 30 to output a signal having a predetermined waveform, and the one input / output unit 30 acquires the signal having the predetermined waveform output from the other input / output unit 30. The output timing of the signal output by the other input / output unit 30 or the acquisition timing of the signal acquired by one input / output unit 30 is changed. The amount of change from the initial value of the output timing or acquisition timing at this time is taken as the second amount of change.

  Then, the measurement unit 80 calculates ½ of the difference between the first change amount and the second change amount. The measurement unit 80 outputs the value calculated in this way as a difference in reference phase between one input / output unit 30 and another input / output unit 30.

  Subsequently, the calculation unit 82 of the intra-group adjustment unit 56 calculates each reference phase of the plurality of input / output units 30 included in the terminal group 22 based on the difference in the reference phase for each pair calculated by the measurement unit 80. The shift amounts that match each other are calculated for each of the plurality of input / output units 30 included in the terminal group 22.

  For example, the calculation unit 82 calculates, for each of the plurality of input / output units 30, a shift amount that matches the reference phase of each of the plurality of other input / output units 30 with the reference phase of the first input / output unit 30. Further, the calculation unit 82 calculates a shift amount for causing each reference phase of the plurality of input / output units 30 to coincide with an average reference phase of the plurality of input / output units 30 for each of the plurality of input / output units 30.

  Subsequently, the shift unit 84 of the in-group adjustment unit 56 offsets each of the plurality of input / output units 30 from the output side delay circuit 68 and the acquisition side delay circuit 72 of the input / output unit 30. The delay amount is shifted by a delay amount corresponding to the shift amount calculated for the input / output unit 30. Thereby, the shift unit 84 can shift the reference phase of each of the plurality of input / output units 30 by the shift amount calculated by the calculation unit 82 of the intra-group adjustment unit 56.

  FIG. 8 shows the configuration of the inter-group adjustment unit 58 and the signal flow in the process of step S13 of FIG. The inter-group adjustment unit 58 includes a measurement unit 86, a calculation unit 88, and a shift unit 90. The measuring unit 86 measures a difference in reference phase between each of the common input / output units 32 included in each of the plurality of terminal groups 22.

  Based on the measurement result by the measurement unit 86 of the inter-group adjustment unit 58, the calculation unit 88 sets a plurality of shift amounts for matching the reference phases of the common input / output units 32 included in each of the plurality of terminal groups 22 to each other. The calculation is performed for each common input / output unit 32 included in each terminal group 22. The shift unit 90 includes, for each of the plurality of terminal groups 22, the terminal group 22 corresponding to the shift amount of the common input / output unit 32 included in the terminal group 22 calculated by the calculation unit 88 of the inter-group adjustment unit 58. The reference phases of the plurality of input / output units 30 are collectively shifted.

  The inter-group adjustment unit 58 having such a configuration executes the following processing in step S13.

  First, the measurement unit 86 of the inter-group adjustment unit 58 sets the inter-group connection wiring 28 of the calibration board 24 for each pair of the one common input / output unit 32 and the other common input / output unit 32. The signal is input / output to / from each other, and the difference in the reference phase of the pair is measured. Note that the method of measuring the difference in the reference phase for each pair is performed by the same process as the measurement unit 80 included in the intra-group adjustment unit 56.

  Subsequently, the calculation unit 88 of the inter-group adjustment unit 58 shifts the respective reference phases of the plurality of common input / output units 32 to match each other based on the difference in the reference phase for each pair calculated by the measurement unit 86. Is calculated for each of the plurality of common input / output units 32. For example, the calculation unit 82 sets the shift amount for matching the reference phases of the plurality of other common input / output units 32 to the reference phase of the first common input / output unit 32 for each of the plurality of common input / output units 32. calculate. Further, the calculation unit 82 calculates, for each of the plurality of common input / output units 32, a shift amount that matches the reference phase of each of the plurality of common input / output units 32 with the average reference phase of the plurality of common input / output units 32. To do.

  Subsequently, the shift unit 90 of the inter-group adjustment unit 58 outputs the delay circuit 68 on the output side of each of the plurality of input / output units 30 included in the common input / output unit 32 and the acquisition side for each of the plurality of terminal groups 22. The delay amounts of the offsets of the delay circuit 72 are collectively shifted. In this case, the shift unit 90 shifts by the delay amount corresponding to the shift amount of the common input / output unit 32 included in the terminal group 22 calculated by the calculation unit 88. Thereby, the shift unit 90 has the plurality of input / output units 30 included in the terminal group 22 by the shift amount of the common input / output unit 32 included in the terminal group 22 calculated by the calculation unit 88 of the inter-group adjustment unit 58. These reference phases can be shifted together.

  FIG. 9 shows the common input / output unit 32 (P11A, P12A, P13A, P14A) and the input / output unit 30 (P11B) included in each of the terminal groups 22 of groups A to D after the process of step S12 of FIG. To P14, P12B to P24, P13B to P23, and P41B to P44). In FIG. 9, P11A to P14 indicate group A, P21A to P24 indicate group B, P31A to P34 indicate group C, and P41A to P44 indicate group D reference phases. The same applies to FIGS. 10 and 11.

  As shown in FIG. 9, after the process of step S12 of FIG. However, the reference phases do not match between different groups.

  FIG. 10 shows the difference in the reference phase between the different terminal groups 22 after finishing the process of step S12 of FIG. In FIG. 10, P11A indicates the reference phase of the common input / output unit 32 of group A, P21A indicates the reference phase of the common input / output unit 32 of group B, and P31A indicates the reference phase of the common input / output unit 32 of group C. P41A indicates the reference phase of the common input / output unit 32 of group D.

  In step S <b> 13, the inter-group adjustment unit 58 measures the reference phase difference for each pair of the two common input / output units 32. In the example of FIG. 9, the inter-group adjustment unit 58 includes a reference phase difference (ΔY) between group A and group B, a reference phase difference (ΔZ) between group A and group C, and group A. And the reference phase difference (ΔX) between the group D and the group D is measured.

  FIG. 11 shows an example of the reference phase of the common input / output unit 32 and the input / output unit 30 included in each of the terminal groups 22 of the groups A to D after the process of step S13 of FIG.

  In step S <b> 13, the inter-group adjustment unit 58 collects the reference phases of the plurality of input / output units 30 for each of the plurality of terminal groups 22 based on the difference in reference phase for each pair of the two common input / output units 32. Shift. In the example of FIG. 9, the inter-group adjustment unit 58 collectively shifts all reference phases of the input / output units 30 (and the common input / output unit 32) of the group B by −ΔZ. In addition, the inter-group adjustment unit 58 collectively shifts all the reference phases of the input / output units 30 (and the common input / output unit 32) of the group C by −ΔY. The inter-group adjustment unit 58 collectively shifts all reference phases of the input / output units 30 (and the common input / output unit 32) of the group D by −ΔX. Thereby, the inter-group adjustment unit 58 can match all the reference phases of the plurality of input / output units 30 included in each of the groups A to D.

  As described above, according to the test apparatus 10 according to the present embodiment, all the reference phases of the plurality of input / output units 30 included in the test apparatus 10 can be matched with one calibration board 24. Thereby, according to the test apparatus 10 which concerns on this embodiment, the time of the mounting operation | work of the calibration board 24, the expense of the calibration board 24, etc. can be made small, and test cost can be made small.

  FIG. 12 shows a terminal group 22 and a calibration board 24 according to a first modification of the present embodiment. Since the test apparatus 10 according to the present modification has substantially the same configuration and function as the test apparatus 10 shown in FIGS. 1 to 11, the member has substantially the same configuration and function as the members shown in FIGS. The same reference numerals are assigned to the above, and the description thereof will be omitted except for the following differences.

  Each of the plurality of terminal groups 22 included in the test apparatus 10 according to the present modification includes a first common input / output unit 32-1 and a second common input / output unit 32- 2 is included. The first common input / output unit 32-1 includes a common driver having a common reference phase with the drivers included in the other input / output units 30. The second common input / output unit 32-2 includes a common driver having a common reference phase with a driver included in another input / output unit 30 that does not share a reference phase with the first common input / output unit 32.

  Further, the calibration board 24 according to this modification includes a first inter-group connection wiring 28-1 and a second inter-group connection wiring 28-2. The first inter-group connection wiring 28-1 shorts between the first common input / output units 32-1 included in each of the plurality of terminal groups 22. The second inter-group connection wiring 28-2 shorts between the second common input / output units 32-2 included in each of the plurality of terminal groups 22.

  The inter-group adjustment unit 58 sets the first group of the calibration board 24 for each pair of each of the plurality of first common input / output units 32-1 and the other first common input / output units 32-1. Signals are mutually input and output via the inter-connection wiring 28-1, and the difference in the reference phase of the pair is measured. Subsequently, the inter-group adjustment unit 58 performs a plurality of terminal groups 22 for each of the plurality of terminal groups 22 based on the reference phase difference between the first common input / output units 32-1 included in each of the plurality of terminal groups 22. A first shift amount is calculated for matching the reference phases of the plurality of input / output units 30 close to each other between the terminal groups 22.

  Subsequently, the inter-group adjustment unit 58 sets the second of the plurality of second common input / output units 32-2 and the second common input / output unit 32-2 for each pair of the calibration board 24. Signals are mutually input and output through the two inter-group connection wirings 28-2, and the difference in the reference phase of the pair is measured. Subsequently, the inter-group adjustment unit 58 determines a plurality of terminal groups 22 for each of the plurality of terminal groups 22 based on the reference phase difference between the second common input / output units 32-2 included in each of the plurality of terminal groups 22. A second shift amount is calculated for matching the reference phases of the plurality of input / output units 30 close to each other between the terminal groups 22.

  Subsequently, the inter-group adjustment unit 58 calculates the average of the first shift amount and the second shift amount for each of the plurality of terminal groups 22. Then, the inter-group adjustment unit 58 determines, for each of the plurality of terminal groups 22, the average amount of the first shift amount and the second shift amount, and the respective reference phases of the plurality of input / output units 30 included in the terminal group 22. Shift all at once.

  As described above, the test apparatus 10 according to the present modification includes the difference in the reference phase between the first common input / output units 32-1 of the plurality of terminal groups 22 and each of the plurality of terminal groups 22. The shift amount of each of the plurality of terminal groups 22 is calculated from the difference in the reference phase between the second common input / output units 32-2. Therefore, according to the test apparatus 10 according to this modification, the reference phases of the plurality of input / output units 30 included in the test apparatus 10 can be matched with higher accuracy.

  FIG. 13 shows a configuration of a test apparatus 10 according to a second modification of the present embodiment. Since the test apparatus 10 according to the present modification has substantially the same configuration and function as the test apparatus 10 shown in FIGS. 1 to 11, the member has substantially the same configuration and function as the members shown in FIGS. The same reference numerals are assigned to the above, and the description thereof will be omitted except for the following differences.

  The test apparatus 10 according to this modification includes a plurality of upper groups 92 each having a plurality of terminal groups 22. Each of the plurality of upper groups 92 has an upper input / output unit 93 in at least a part of the plurality of input / output units 30 included therein. The higher-level input / output unit 93 includes a higher-level driver 94 that has a common reference phase with drivers included in the other input / output units 30. The upper input / output unit 93 is a member different from the common input / output unit 32.

  Further, the calibration board 24 according to the present modification further includes a higher level group connection wiring 96. The upper group connection wiring 96 shorts between the upper input / output units 93 included in each of the plurality of upper groups 92.

  In addition, the adjustment device 20 according to this modification further includes a higher-order adjustment unit 98. The upper adjustment unit 98 determines the reference phases of the plurality of input / output units 30 (that is, the reference phase of the signal output by the driver and the reference phase of the timing at which the comparator inputs the signal) between the plurality of upper groups 92. Move closer to each other and match. In this case, the upper adjustment unit 98 uses a plurality of upper groups based on a reference phase difference between the upper input / output units 93 included in each of the plurality of upper groups 92 (that is, a reference phase difference between the upper drivers 94). The reference phases of the plurality of input / output units 30 between the groups 92 are brought close to each other and matched.

  The upper adjustment unit 98 adjusts the reference phase of each of the plurality of input / output units 30 for each of the plurality of upper groups 92 after the adjustment by the inter-group adjustment unit 58.

  According to the test apparatus 10 according to such a modified example, even if the test apparatus 10 includes a larger number of input / output units 30, a plurality of input / output units 30 can be connected by a single calibration board 24. All reference phases can be matched.

  FIG. 14 shows an example of a hardware configuration of a computer 1900 according to this embodiment. A computer 1900 according to this embodiment is connected to a CPU peripheral unit having a CPU 2000, a RAM 2020, a graphic controller 2075, and a display device 2080 that are connected to each other by a host controller 2082, and to the host controller 2082 by an input / output controller 2084. Input / output unit having communication interface 2030, hard disk drive 2040, and CD-ROM drive 2060, and legacy input / output unit having ROM 2010, flexible disk drive 2050, and input / output chip 2070 connected to input / output controller 2084 With.

  The host controller 2082 connects the RAM 2020 to the CPU 2000 and the graphic controller 2075 that access the RAM 2020 at a high transfer rate. The CPU 2000 operates based on programs stored in the ROM 2010 and the RAM 2020 and controls each unit. The graphic controller 2075 acquires image data generated by the CPU 2000 or the like on a frame buffer provided in the RAM 2020 and displays it on the display device 2080. Instead of this, the graphic controller 2075 may include a frame buffer for storing image data generated by the CPU 2000 or the like.

  The input / output controller 2084 connects the host controller 2082 to the communication interface 2030, the hard disk drive 2040, and the CD-ROM drive 2060, which are relatively high-speed input / output devices. The communication interface 2030 communicates with other devices via a network. The hard disk drive 2040 stores programs and data used by the CPU 2000 in the computer 1900. The CD-ROM drive 2060 reads a program or data from the CD-ROM 2095 and provides it to the hard disk drive 2040 via the RAM 2020.

  The input / output controller 2084 is connected to the ROM 2010, the flexible disk drive 2050, and the relatively low-speed input / output device of the input / output chip 2070. The ROM 2010 stores a boot program that the computer 1900 executes at startup and / or a program that depends on the hardware of the computer 1900. The flexible disk drive 2050 reads a program or data from the flexible disk 2090 and provides it to the hard disk drive 2040 via the RAM 2020. The input / output chip 2070 connects the flexible disk drive 2050 to the input / output controller 2084 and inputs / outputs various input / output devices via, for example, a parallel port, a serial port, a keyboard port, a mouse port, and the like. Connect to controller 2084.

  A program provided to the hard disk drive 2040 via the RAM 2020 is stored in a recording medium such as the flexible disk 2090, the CD-ROM 2095, or an IC card and provided by the user. The program is read from the recording medium, installed in the hard disk drive 2040 in the computer 1900 via the RAM 2020, and executed by the CPU 2000.

  A program installed in the computer 1900 and causing the computer 1900 to function as the adjustment device 20 includes a terminal adjustment module, an intra-group adjustment module, and an inter-group adjustment module. These programs or modules work on the CPU 2000 or the like to cause the computer 1900 to function as the terminal adjustment unit 54, the intra-group adjustment unit 56, and the inter-group adjustment unit 58, respectively.

  The information processing described in these programs is read into the computer 1900, whereby the terminal adjustment unit 54, the in-group adjustment unit 56, and the specific means in which the software and the various hardware resources described above cooperate. It functions as an inter-group adjustment unit 58. And the specific adjustment apparatus 20 according to the intended use is constructed | assembled by implement | achieving the calculation or processing of the information according to the intended use of the computer 1900 in this embodiment by these specific means.

  As an example, when communication is performed between the computer 1900 and an external device or the like, the CPU 2000 executes a communication program loaded on the RAM 2020 and executes a communication interface based on the processing content described in the communication program. A communication process is instructed to 2030. Under the control of the CPU 2000, the communication interface 2030 reads transmission data stored in a transmission buffer area or the like provided on a storage device such as the RAM 2020, the hard disk drive 2040, the flexible disk 2090, or the CD-ROM 2095, and sends it to the network. The reception data transmitted or received from the network is written into a reception buffer area or the like provided on the storage device. As described above, the communication interface 2030 may transfer transmission / reception data to / from the storage device by a DMA (direct memory access) method. Instead, the CPU 2000 transfers the storage device or the communication interface 2030 as a transfer source. The transmission / reception data may be transferred by reading the data from the data and writing the data to the communication interface 2030 or the storage device of the transfer destination.

  The CPU 2000 is all or necessary from among files or databases stored in an external storage device such as a hard disk drive 2040, a CD-ROM drive 2060 (CD-ROM 2095), and a flexible disk drive 2050 (flexible disk 2090). This portion is read into the RAM 2020 by DMA transfer or the like, and various processes are performed on the data on the RAM 2020. Then, CPU 2000 writes the processed data back to the external storage device by DMA transfer or the like. In such processing, since the RAM 2020 can be regarded as temporarily holding the contents of the external storage device, in the present embodiment, the RAM 2020 and the external storage device are collectively referred to as a memory, a storage unit, or a storage device. Various types of information such as various programs, data, tables, and databases in the present embodiment are stored on such a storage device and are subjected to information processing. Note that the CPU 2000 can also hold a part of the RAM 2020 in the cache memory and perform reading and writing on the cache memory. Even in such a form, the cache memory bears a part of the function of the RAM 2020. Therefore, in the present embodiment, the cache memory is also included in the RAM 2020, the memory, and / or the storage device unless otherwise indicated. To do.

  In addition, the CPU 2000 performs various operations, such as various operations, information processing, condition determination, information search / replacement, etc., described in the present embodiment, specified for the data read from the RAM 2020 by the instruction sequence of the program. Is written back to the RAM 2020. For example, when performing the condition determination, the CPU 2000 determines whether or not the various variables shown in the present embodiment satisfy the conditions such as large, small, above, below, equal, etc., compared to other variables or constants. If the condition is satisfied (or not satisfied), the program branches to a different instruction sequence or calls a subroutine.

  Further, the CPU 2000 can search for information stored in a file or database in the storage device. For example, in the case where a plurality of entries in which the attribute value of the second attribute is associated with the attribute value of the first attribute are stored in the storage device, the CPU 2000 displays the plurality of entries stored in the storage device. The entry that matches the condition in which the attribute value of the first attribute is specified is retrieved, and the attribute value of the second attribute that is stored in the entry is read, thereby associating with the first attribute that satisfies the predetermined condition The attribute value of the specified second attribute can be obtained.

  The program or module shown above may be stored in an external recording medium. As the recording medium, in addition to the flexible disk 2090 and the CD-ROM 2095, an optical recording medium such as DVD or CD, a magneto-optical recording medium such as MO, a tape medium, a semiconductor memory such as an IC card, and the like can be used. Further, a storage device such as a hard disk or RAM provided in a server system connected to a dedicated communication network or the Internet may be used as a recording medium, and the program may be provided to the computer 1900 via the network.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the scope of the claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.

10 test equipment, 12 main body, 14 test board, 16 control device, 18 test module, 20 adjustment device, 22 terminal group, 24 calibration board, 26 intra-group connection wiring, 28 inter-group connection wiring, 30 input / output Part, 32 common input / output part, 54 terminal adjustment part, 56 group adjustment part, 58 group adjustment part, 60 driver, 62 comparator, 64 pattern generator, 66 timing generator, 68 output side delay circuit, 70 molding 72, delay circuit on the acquisition side, 74 acquisition unit, 76 determination unit, 78 setting unit, 80 measurement unit, 82 calculation unit, 84 shift unit, 86 measurement unit, 88 calculation unit, 90 shift unit, 92 upper group, 93 Upper I / O section, 94 Upper driver, 96 Upper group connection wiring, 98 Upper adjustment section 300 device under test, 1900 computer, 2000 CPU, 2010 ROM, 2020 RAM, 2030 communication interface, 2040 hard disk drive, 2050 flexible disk drive, 2060 CD-ROM drive, 2070 input / output chip, 2075 graphic controller, 2080 display device 2082 Host controller 2084 I / O controller 2090 Flexible disk 2095 CD-ROM

Claims (16)

A test apparatus for testing a device under test,
A plurality of terminal groups each having a plurality of drivers for supplying signals to the device under test, including a common driver whose reference phase of the output signal is in common with other drivers;
For each of the plurality of terminal groups, an in-group adjustment unit that brings the reference phases of the plurality of drivers included in the terminal group closer to each other;
An inter-group adjustment unit that brings each reference phase of the plurality of drivers close to each other between the plurality of terminal groups based on a difference in reference phase between common drivers included in each of the plurality of terminal groups;
A test apparatus comprising: Each of the plurality of terminal groups includes a plurality of inputs / outputs including one driver and a comparator having an input terminal connected in common to the output terminal of the one driver and inputting a signal output from the device under test. The test apparatus according to claim 1, further comprising a portion. The intra-group adjustment unit and the inter-group adjustment unit delay a delay amount of a delay circuit that delays a timing signal indicating a timing at which the driver outputs a signal and a strobe signal that indicates a timing at which the comparator receives an input signal. The test apparatus according to claim 2, wherein a delay amount of the delay circuit is controlled to adjust a reference phase of each of the plurality of input / output units. The inter-group adjustment unit adjusts the reference phase of each of the plurality of input / output units for each of the plurality of terminal groups after the intra-group adjustment unit has adjusted. The test apparatus described. The intra-group adjustment unit
For each of the plurality of terminal groups, a measurement unit that measures a difference in reference phase between each of the plurality of input / output units included in the terminal group;
For each of the plurality of terminal groups, based on a measurement result by the measurement unit of the adjustment unit in the group, a shift amount that matches each reference phase of the plurality of input / output units of the terminal group, A calculation unit for calculating each of the plurality of input / output units included in the terminal group;
For each of the plurality of terminal groups and for each of the plurality of input / output units, a shift unit that shifts a reference phase by the shift amount calculated by the calculation unit of the intra-group adjustment unit, and
The test apparatus according to claim 2, comprising: Each of the plurality of terminal groups has a common input / output unit including the common driver in a part of the plurality of input / output units,
The inter-group adjustment unit
A measurement unit that measures a difference in reference phase between each of the common input / output units included in each of the plurality of terminal groups;
Based on the measurement result by the measurement unit of the inter-group adjustment unit, each of the plurality of terminal groups has a shift amount that matches each reference phase of the common input / output unit of each of the plurality of terminal groups. A calculation unit for calculating each of the common input / output units;
For each of the plurality of terminal groups, the shift amount of the common input / output unit included in the terminal group calculated by the calculation unit of the inter-group adjustment unit, the plurality of input / output units included in the terminal group. A shift unit that collectively shifts each reference phase;
The test apparatus according to claim 2, comprising: The test apparatus further includes a calibration board attached to the test apparatus instead of the test board on which the device under test is mounted,
The calibration board corresponds to each of the plurality of terminal groups, and a plurality of in-group connection wirings that short-circuit each of the plurality of input / output units excluding the common input / output unit of the corresponding terminal group Including
For each of the plurality of terminal groups, the intra-group adjustment unit is configured to connect each of a plurality of one input / output unit of the terminal group and another input / output unit via the calibration board. The test apparatus according to claim 6, wherein signals are input / output to / from each other and a difference in reference phase of the pair is measured. The calibration board further includes an inter-group connection wiring that short-circuits between the common input / output units included in each of the plurality of terminal groups.
The inter-group adjustment unit inputs / outputs signals to / from each other via the calibration board for each pair of a plurality of one common input / output unit and another common input / output unit. The test apparatus according to claim 7, wherein the difference is measured. Each of the plurality of terminal groups is part of the plurality of input / output units,
A first common input / output unit including the common driver;
The first common input / output unit includes a second common input / output unit including the common driver whose reference phase is not shared,
The inter-group adjustment unit
Each of the plurality of terminal groups is based on a difference in reference phase between the first common input / output units and a difference in reference phase between the second common input / output units of each of the plurality of terminal groups. And calculating a shift amount that brings the reference phases of the plurality of input / output units closer to each other between the plurality of terminal groups,
The test apparatus according to claim 2, wherein, for each of the plurality of terminal groups, the reference phases of the plurality of input / output units included in the terminal group are collectively shifted by the calculated shift amount. . The inter-group adjustment unit
Calculating a first shift amount for each of the plurality of terminal groups based on a difference in reference phase between the first common input / output units included in each of the plurality of terminal groups;
Calculating a second shift amount for each of the plurality of terminal groups based on a difference in a reference phase between the second common input / output units included in each of the plurality of terminal groups;
The reference phase of each of the plurality of input / output units included in the terminal group is collectively shifted for each of the plurality of terminal groups by an average of the first shift amount and the second shift amount. 9. The test apparatus according to 9. A plurality of upper groups each having the plurality of terminal groups, each including a plurality of higher-level drivers having a reference phase common to other drivers;
An upper adjustment unit configured to bring the reference phases of the plurality of drivers closer to each other among the plurality of upper groups based on a difference in reference phase between the upper drivers included in each of the plurality of upper groups. Item 11. The test apparatus according to any one of Items 1 to 10. The test apparatus according to claim 11, wherein the upper adjustment unit adjusts the reference phase of each of the plurality of drivers for each of the plurality of upper groups after the adjustment unit between the groups adjusts. An adjustment method for adjusting a test apparatus for testing a device under test,
The test apparatus comprises:
A plurality of terminal groups each having a plurality of drivers for supplying a signal to the device under test, including a common driver whose reference phase is common to other drivers, in part,
For each of the plurality of terminal groups, the reference phases of the plurality of drivers included in the terminal group are brought close to each other,
An adjustment method for bringing the reference phases of the plurality of drivers close to each other between the plurality of terminal groups based on a difference in reference phase between common drivers included in each of the plurality of terminal groups.   A calibration board used in the test apparatus according to claim 7 or 8. An adjustment device for adjusting a test apparatus for testing a device under test,
The test apparatus includes a plurality of terminal groups each having a plurality of drivers for supplying signals to a device under test, including a common driver having a reference phase common to other drivers as a reference phase.
The adjustment device is
For each of the plurality of terminal groups, an in-group adjustment unit that brings the reference phases of the plurality of drivers included in the terminal group closer to each other;
An inter-group adjustment unit that brings each reference phase of the plurality of drivers close to each other between the plurality of terminal groups based on a difference in reference phase between common drivers included in each of the plurality of terminal groups;
An adjustment device comprising:   A program causing a computer to function as the adjustment device according to claim 15.

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